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ixgbe: Fix coexistence of FCoE and Flow Director in 82599
[linux-2.6-block.git] / drivers / net / ixgbe / ixgbe_dcb_nl.c
CommitLineData
2f90b865
AD		 1/*******************************************************************************
2
3 Intel 10 Gigabit PCI Express Linux driver
3efac5a0 4 Copyright(c) 1999 - 2009 Intel Corporation.
2f90b865
AD		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "ixgbe.h"
30#include <linux/dcbnl.h>
62551d3e
PWJ		 31#include "ixgbe_dcb_82598.h"
32#include "ixgbe_dcb_82599.h"
2f90b865
AD		 33
34/* Callbacks for DCB netlink in the kernel */
35#define BIT_DCB_MODE 0x01
36#define BIT_PFC 0x02
37#define BIT_PG_RX 0x04
38#define BIT_PG_TX 0x08
62551d3e 39#define BIT_RESETLINK 0x40
235ea828 40#define BIT_LINKSPEED 0x80
2f90b865 41
62551d3e
PWJ		 42/* Responses for the DCB_C_SET_ALL command */
43#define DCB_HW_CHG_RST 0 /* DCB configuration changed with reset */
44#define DCB_NO_HW_CHG 1 /* DCB configuration did not change */
45#define DCB_HW_CHG 2 /* DCB configuration changed, no reset */
46
2f90b865
AD		 47int ixgbe_copy_dcb_cfg(struct ixgbe_dcb_config *src_dcb_cfg,
48 struct ixgbe_dcb_config *dst_dcb_cfg, int tc_max)
49{
50 struct tc_configuration *src_tc_cfg = NULL;
51 struct tc_configuration *dst_tc_cfg = NULL;
52 int i;
53
54 if (!src_dcb_cfg || !dst_dcb_cfg)
55 return -EINVAL;
56
57 for (i = DCB_PG_ATTR_TC_0; i < tc_max + DCB_PG_ATTR_TC_0; i++) {
58 src_tc_cfg = &src_dcb_cfg->tc_config[i - DCB_PG_ATTR_TC_0];
59 dst_tc_cfg = &dst_dcb_cfg->tc_config[i - DCB_PG_ATTR_TC_0];
60
61 dst_tc_cfg->path[DCB_TX_CONFIG].prio_type =
62 src_tc_cfg->path[DCB_TX_CONFIG].prio_type;
63
64 dst_tc_cfg->path[DCB_TX_CONFIG].bwg_id =
65 src_tc_cfg->path[DCB_TX_CONFIG].bwg_id;
66
67 dst_tc_cfg->path[DCB_TX_CONFIG].bwg_percent =
68 src_tc_cfg->path[DCB_TX_CONFIG].bwg_percent;
69
70 dst_tc_cfg->path[DCB_TX_CONFIG].up_to_tc_bitmap =
71 src_tc_cfg->path[DCB_TX_CONFIG].up_to_tc_bitmap;
72
73 dst_tc_cfg->path[DCB_RX_CONFIG].prio_type =
74 src_tc_cfg->path[DCB_RX_CONFIG].prio_type;
75
76 dst_tc_cfg->path[DCB_RX_CONFIG].bwg_id =
77 src_tc_cfg->path[DCB_RX_CONFIG].bwg_id;
78
79 dst_tc_cfg->path[DCB_RX_CONFIG].bwg_percent =
80 src_tc_cfg->path[DCB_RX_CONFIG].bwg_percent;
81
82 dst_tc_cfg->path[DCB_RX_CONFIG].up_to_tc_bitmap =
83 src_tc_cfg->path[DCB_RX_CONFIG].up_to_tc_bitmap;
84 }
85
86 for (i = DCB_PG_ATTR_BW_ID_0; i < DCB_PG_ATTR_BW_ID_MAX; i++) {
87 dst_dcb_cfg->bw_percentage[DCB_TX_CONFIG]
88 [i-DCB_PG_ATTR_BW_ID_0] = src_dcb_cfg->bw_percentage
89 [DCB_TX_CONFIG][i-DCB_PG_ATTR_BW_ID_0];
90 dst_dcb_cfg->bw_percentage[DCB_RX_CONFIG]
91 [i-DCB_PG_ATTR_BW_ID_0] = src_dcb_cfg->bw_percentage
92 [DCB_RX_CONFIG][i-DCB_PG_ATTR_BW_ID_0];
93 }
94
95 for (i = DCB_PFC_UP_ATTR_0; i < DCB_PFC_UP_ATTR_MAX; i++) {
96 dst_dcb_cfg->tc_config[i - DCB_PFC_UP_ATTR_0].dcb_pfc =
97 src_dcb_cfg->tc_config[i - DCB_PFC_UP_ATTR_0].dcb_pfc;
98 }
99
ea4af4f4
PW		 100 dst_dcb_cfg->pfc_mode_enable = src_dcb_cfg->pfc_mode_enable;
101
2f90b865
AD		 102 return 0;
103}
104
105static u8 ixgbe_dcbnl_get_state(struct net_device *netdev)
106{
107 struct ixgbe_adapter *adapter = netdev_priv(netdev);
108
109 DPRINTK(DRV, INFO, "Get DCB Admin Mode.\n");
110
111 return !!(adapter->flags & IXGBE_FLAG_DCB_ENABLED);
112}
113
1486a61e 114static u8 ixgbe_dcbnl_set_state(struct net_device *netdev, u8 state)
2f90b865 115{
1486a61e 116 u8 err = 0;
2f90b865
AD		 117 struct ixgbe_adapter *adapter = netdev_priv(netdev);
118
119 DPRINTK(DRV, INFO, "Set DCB Admin Mode.\n");
120
121 if (state > 0) {
122 /* Turn on DCB */
1486a61e
DS		 123 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED)
124 goto out;
2f90b865 125
1486a61e
DS		 126 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
127 DPRINTK(DRV, ERR, "Enable failed, needs MSI-X\n");
128 err = 1;
129 goto out;
2f90b865 130 }
1486a61e
DS		 131
132 if (netif_running(netdev))
133 netdev->netdev_ops->ndo_stop(netdev);
7a921c93 134 ixgbe_clear_interrupt_scheme(adapter);
1486a61e 135
264857b8
PWJ		 136 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
137 adapter->last_lfc_mode = adapter->hw.fc.current_mode;
138 adapter->hw.fc.requested_mode = ixgbe_fc_none;
139 }
1486a61e 140 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
8faa2a78
YZ		 141 if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
142 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
143 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
144 }
1486a61e
DS		 145 adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
146 ixgbe_init_interrupt_scheme(adapter);
1486a61e
DS		 147 if (netif_running(netdev))
148 netdev->netdev_ops->ndo_open(netdev);
2f90b865
AD		 149 } else {
150 /* Turn off DCB */
151 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
152 if (netif_running(netdev))
1486a61e 153 netdev->netdev_ops->ndo_stop(netdev);
7a921c93 154 ixgbe_clear_interrupt_scheme(adapter);
2f90b865 155
264857b8
PWJ		 156 adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
157 adapter->temp_dcb_cfg.pfc_mode_enable = false;
158 adapter->dcb_cfg.pfc_mode_enable = false;
2f90b865
AD		 159 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
160 adapter->flags |= IXGBE_FLAG_RSS_ENABLED;
8faa2a78
YZ		 161 if (adapter->hw.mac.type == ixgbe_mac_82599EB)
162 adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
2f90b865 163 ixgbe_init_interrupt_scheme(adapter);
2f90b865 164 if (netif_running(netdev))
1486a61e 165 netdev->netdev_ops->ndo_open(netdev);
2f90b865
AD		 166 }
167 }
1486a61e
DS		 168out:
169 return err;
2f90b865
AD		 170}
171
172static void ixgbe_dcbnl_get_perm_hw_addr(struct net_device *netdev,
173 u8 *perm_addr)
174{
175 struct ixgbe_adapter *adapter = netdev_priv(netdev);
aca6bee7 176 int i, j;
2f90b865
AD		 177
178 for (i = 0; i < netdev->addr_len; i++)
179 perm_addr[i] = adapter->hw.mac.perm_addr[i];
aca6bee7
WJP		 180
181 if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
182 for (j = 0; j < netdev->addr_len; j++, i++)
183 perm_addr[i] = adapter->hw.mac.san_addr[j];
184 }
2f90b865
AD		 185}
186
187static void ixgbe_dcbnl_set_pg_tc_cfg_tx(struct net_device *netdev, int tc,
188 u8 prio, u8 bwg_id, u8 bw_pct,
189 u8 up_map)
190{
191 struct ixgbe_adapter *adapter = netdev_priv(netdev);
192
193 if (prio != DCB_ATTR_VALUE_UNDEFINED)
194 adapter->temp_dcb_cfg.tc_config[tc].path[0].prio_type = prio;
195 if (bwg_id != DCB_ATTR_VALUE_UNDEFINED)
196 adapter->temp_dcb_cfg.tc_config[tc].path[0].bwg_id = bwg_id;
197 if (bw_pct != DCB_ATTR_VALUE_UNDEFINED)
198 adapter->temp_dcb_cfg.tc_config[tc].path[0].bwg_percent =
199 bw_pct;
200 if (up_map != DCB_ATTR_VALUE_UNDEFINED)
201 adapter->temp_dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap =
202 up_map;
203
204 if ((adapter->temp_dcb_cfg.tc_config[tc].path[0].prio_type !=
205 adapter->dcb_cfg.tc_config[tc].path[0].prio_type) ||
206 (adapter->temp_dcb_cfg.tc_config[tc].path[0].bwg_id !=
207 adapter->dcb_cfg.tc_config[tc].path[0].bwg_id) ||
208 (adapter->temp_dcb_cfg.tc_config[tc].path[0].bwg_percent !=
209 adapter->dcb_cfg.tc_config[tc].path[0].bwg_percent) ||
210 (adapter->temp_dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap !=
62551d3e 211 adapter->dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap)) {
2f90b865 212 adapter->dcb_set_bitmap |= BIT_PG_TX;
62551d3e
PWJ		 213 adapter->dcb_set_bitmap |= BIT_RESETLINK;
214 }
2f90b865
AD		 215}
216
217static void ixgbe_dcbnl_set_pg_bwg_cfg_tx(struct net_device *netdev, int bwg_id,
218 u8 bw_pct)
219{
220 struct ixgbe_adapter *adapter = netdev_priv(netdev);
221
222 adapter->temp_dcb_cfg.bw_percentage[0][bwg_id] = bw_pct;
223
224 if (adapter->temp_dcb_cfg.bw_percentage[0][bwg_id] !=
62551d3e 225 adapter->dcb_cfg.bw_percentage[0][bwg_id]) {
2f90b865 226 adapter->dcb_set_bitmap |= BIT_PG_RX;
62551d3e
PWJ		 227 adapter->dcb_set_bitmap |= BIT_RESETLINK;
228 }
2f90b865
AD		 229}
230
231static void ixgbe_dcbnl_set_pg_tc_cfg_rx(struct net_device *netdev, int tc,
232 u8 prio, u8 bwg_id, u8 bw_pct,
233 u8 up_map)
234{
235 struct ixgbe_adapter *adapter = netdev_priv(netdev);
236
237 if (prio != DCB_ATTR_VALUE_UNDEFINED)
238 adapter->temp_dcb_cfg.tc_config[tc].path[1].prio_type = prio;
239 if (bwg_id != DCB_ATTR_VALUE_UNDEFINED)
240 adapter->temp_dcb_cfg.tc_config[tc].path[1].bwg_id = bwg_id;
241 if (bw_pct != DCB_ATTR_VALUE_UNDEFINED)
242 adapter->temp_dcb_cfg.tc_config[tc].path[1].bwg_percent =
243 bw_pct;
244 if (up_map != DCB_ATTR_VALUE_UNDEFINED)
245 adapter->temp_dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap =
246 up_map;
247
248 if ((adapter->temp_dcb_cfg.tc_config[tc].path[1].prio_type !=
249 adapter->dcb_cfg.tc_config[tc].path[1].prio_type) ||
250 (adapter->temp_dcb_cfg.tc_config[tc].path[1].bwg_id !=
251 adapter->dcb_cfg.tc_config[tc].path[1].bwg_id) ||
252 (adapter->temp_dcb_cfg.tc_config[tc].path[1].bwg_percent !=
253 adapter->dcb_cfg.tc_config[tc].path[1].bwg_percent) ||
254 (adapter->temp_dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap !=
62551d3e 255 adapter->dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap)) {
2f90b865 256 adapter->dcb_set_bitmap |= BIT_PG_RX;
62551d3e
PWJ		 257 adapter->dcb_set_bitmap |= BIT_RESETLINK;
258 }
2f90b865
AD		 259}
260
261static void ixgbe_dcbnl_set_pg_bwg_cfg_rx(struct net_device *netdev, int bwg_id,
262 u8 bw_pct)
263{
264 struct ixgbe_adapter *adapter = netdev_priv(netdev);
265
266 adapter->temp_dcb_cfg.bw_percentage[1][bwg_id] = bw_pct;
267
268 if (adapter->temp_dcb_cfg.bw_percentage[1][bwg_id] !=
62551d3e 269 adapter->dcb_cfg.bw_percentage[1][bwg_id]) {
2f90b865 270 adapter->dcb_set_bitmap |= BIT_PG_RX;
62551d3e
PWJ		 271 adapter->dcb_set_bitmap |= BIT_RESETLINK;
272 }
2f90b865
AD		 273}
274
275static void ixgbe_dcbnl_get_pg_tc_cfg_tx(struct net_device *netdev, int tc,
276 u8 *prio, u8 *bwg_id, u8 *bw_pct,
277 u8 *up_map)
278{
279 struct ixgbe_adapter *adapter = netdev_priv(netdev);
280
281 *prio = adapter->dcb_cfg.tc_config[tc].path[0].prio_type;
282 *bwg_id = adapter->dcb_cfg.tc_config[tc].path[0].bwg_id;
283 *bw_pct = adapter->dcb_cfg.tc_config[tc].path[0].bwg_percent;
284 *up_map = adapter->dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap;
285}
286
287static void ixgbe_dcbnl_get_pg_bwg_cfg_tx(struct net_device *netdev, int bwg_id,
288 u8 *bw_pct)
289{
290 struct ixgbe_adapter *adapter = netdev_priv(netdev);
291
292 *bw_pct = adapter->dcb_cfg.bw_percentage[0][bwg_id];
293}
294
295static void ixgbe_dcbnl_get_pg_tc_cfg_rx(struct net_device *netdev, int tc,
296 u8 *prio, u8 *bwg_id, u8 *bw_pct,
297 u8 *up_map)
298{
299 struct ixgbe_adapter *adapter = netdev_priv(netdev);
300
301 *prio = adapter->dcb_cfg.tc_config[tc].path[1].prio_type;
302 *bwg_id = adapter->dcb_cfg.tc_config[tc].path[1].bwg_id;
303 *bw_pct = adapter->dcb_cfg.tc_config[tc].path[1].bwg_percent;
304 *up_map = adapter->dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap;
305}
306
307static void ixgbe_dcbnl_get_pg_bwg_cfg_rx(struct net_device *netdev, int bwg_id,
308 u8 *bw_pct)
309{
310 struct ixgbe_adapter *adapter = netdev_priv(netdev);
311
312 *bw_pct = adapter->dcb_cfg.bw_percentage[1][bwg_id];
313}
314
315static void ixgbe_dcbnl_set_pfc_cfg(struct net_device *netdev, int priority,
316 u8 setting)
317{
318 struct ixgbe_adapter *adapter = netdev_priv(netdev);
319
320 adapter->temp_dcb_cfg.tc_config[priority].dcb_pfc = setting;
321 if (adapter->temp_dcb_cfg.tc_config[priority].dcb_pfc !=
ea4af4f4 322 adapter->dcb_cfg.tc_config[priority].dcb_pfc) {
2f90b865 323 adapter->dcb_set_bitmap |= BIT_PFC;
ea4af4f4
PW		 324 adapter->temp_dcb_cfg.pfc_mode_enable = true;
325 }
2f90b865
AD		 326}
327
328static void ixgbe_dcbnl_get_pfc_cfg(struct net_device *netdev, int priority,
329 u8 *setting)
330{
331 struct ixgbe_adapter *adapter = netdev_priv(netdev);
332
333 *setting = adapter->dcb_cfg.tc_config[priority].dcb_pfc;
334}
335
336static u8 ixgbe_dcbnl_set_all(struct net_device *netdev)
337{
338 struct ixgbe_adapter *adapter = netdev_priv(netdev);
339 int ret;
340
341 if (!adapter->dcb_set_bitmap)
62551d3e 342 return DCB_NO_HW_CHG;
2f90b865 343
62551d3e
PWJ		 344 /*
345 * Only take down the adapter if the configuration change
346 * requires a reset.
347 */
348 if (adapter->dcb_set_bitmap & BIT_RESETLINK) {
349 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
350 msleep(1);
2f90b865 351
62551d3e
PWJ		 352 if (netif_running(netdev))
353 ixgbe_down(adapter);
354 }
2f90b865
AD		 355
356 ret = ixgbe_copy_dcb_cfg(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
357 adapter->ring_feature[RING_F_DCB].indices);
358 if (ret) {
62551d3e
PWJ		 359 if (adapter->dcb_set_bitmap & BIT_RESETLINK)
360 clear_bit(__IXGBE_RESETTING, &adapter->state);
361 return DCB_NO_HW_CHG;
2f90b865
AD		 362 }
363
264857b8
PWJ		 364 if (adapter->dcb_cfg.pfc_mode_enable) {
365 if ((adapter->hw.mac.type != ixgbe_mac_82598EB) &&
366 (adapter->hw.fc.current_mode != ixgbe_fc_pfc))
367 adapter->last_lfc_mode = adapter->hw.fc.current_mode;
368 adapter->hw.fc.requested_mode = ixgbe_fc_pfc;
369 } else {
370 if (adapter->hw.mac.type != ixgbe_mac_82598EB)
371 adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
372 else
373 adapter->hw.fc.requested_mode = ixgbe_fc_none;
374 }
375
62551d3e
PWJ		 376 if (adapter->dcb_set_bitmap & BIT_RESETLINK) {
377 if (netif_running(netdev))
378 ixgbe_up(adapter);
379 ret = DCB_HW_CHG_RST;
380 } else if (adapter->dcb_set_bitmap & BIT_PFC) {
381 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
382 ixgbe_dcb_config_pfc_82598(&adapter->hw,
383 &adapter->dcb_cfg);
384 else if (adapter->hw.mac.type == ixgbe_mac_82599EB)
385 ixgbe_dcb_config_pfc_82599(&adapter->hw,
386 &adapter->dcb_cfg);
387 ret = DCB_HW_CHG;
388 }
264857b8
PWJ		 389 if (adapter->dcb_cfg.pfc_mode_enable)
390 adapter->hw.fc.current_mode = ixgbe_fc_pfc;
391
62551d3e
PWJ		 392 if (adapter->dcb_set_bitmap & BIT_RESETLINK)
393 clear_bit(__IXGBE_RESETTING, &adapter->state);
2f90b865 394 adapter->dcb_set_bitmap = 0x00;
2f90b865
AD		 395 return ret;
396}
397
46132188
AD		 398static u8 ixgbe_dcbnl_getcap(struct net_device *netdev, int capid, u8 *cap)
399{
400 struct ixgbe_adapter *adapter = netdev_priv(netdev);
401 u8 rval = 0;
402
403 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
404 switch (capid) {
405 case DCB_CAP_ATTR_PG:
406 *cap = true;
407 break;
408 case DCB_CAP_ATTR_PFC:
409 *cap = true;
410 break;
411 case DCB_CAP_ATTR_UP2TC:
412 *cap = false;
413 break;
414 case DCB_CAP_ATTR_PG_TCS:
415 *cap = 0x80;
416 break;
417 case DCB_CAP_ATTR_PFC_TCS:
418 *cap = 0x80;
419 break;
420 case DCB_CAP_ATTR_GSP:
421 *cap = true;
422 break;
423 case DCB_CAP_ATTR_BCN:
424 *cap = false;
425 break;
426 default:
427 rval = -EINVAL;
428 break;
429 }
430 } else {
431 rval = -EINVAL;
432 }
433
434 return rval;
435}
436
33dbabc4
AD		 437static u8 ixgbe_dcbnl_getnumtcs(struct net_device *netdev, int tcid, u8 *num)
438{
439 struct ixgbe_adapter *adapter = netdev_priv(netdev);
440 u8 rval = 0;
441
442 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
443 switch (tcid) {
444 case DCB_NUMTCS_ATTR_PG:
445 *num = MAX_TRAFFIC_CLASS;
446 break;
447 case DCB_NUMTCS_ATTR_PFC:
448 *num = MAX_TRAFFIC_CLASS;
449 break;
450 default:
451 rval = -EINVAL;
452 break;
453 }
454 } else {
455 rval = -EINVAL;
456 }
457
458 return rval;
459}
460
461static u8 ixgbe_dcbnl_setnumtcs(struct net_device *netdev, int tcid, u8 num)
462{
463 return -EINVAL;
464}
465
0eb3aa9b
AD		 466static u8 ixgbe_dcbnl_getpfcstate(struct net_device *netdev)
467{
468 struct ixgbe_adapter *adapter = netdev_priv(netdev);
469
264857b8 470 return adapter->dcb_cfg.pfc_mode_enable;
0eb3aa9b
AD		 471}
472
473static void ixgbe_dcbnl_setpfcstate(struct net_device *netdev, u8 state)
474{
264857b8
PWJ		 475 struct ixgbe_adapter *adapter = netdev_priv(netdev);
476
477 adapter->temp_dcb_cfg.pfc_mode_enable = state;
478 if (adapter->temp_dcb_cfg.pfc_mode_enable !=
479 adapter->dcb_cfg.pfc_mode_enable)
480 adapter->dcb_set_bitmap |= BIT_PFC;
0eb3aa9b
AD		 481 return;
482}
483
2f90b865
AD		 484struct dcbnl_rtnl_ops dcbnl_ops = {
485 .getstate = ixgbe_dcbnl_get_state,
486 .setstate = ixgbe_dcbnl_set_state,
487 .getpermhwaddr = ixgbe_dcbnl_get_perm_hw_addr,
488 .setpgtccfgtx = ixgbe_dcbnl_set_pg_tc_cfg_tx,
489 .setpgbwgcfgtx = ixgbe_dcbnl_set_pg_bwg_cfg_tx,
490 .setpgtccfgrx = ixgbe_dcbnl_set_pg_tc_cfg_rx,
491 .setpgbwgcfgrx = ixgbe_dcbnl_set_pg_bwg_cfg_rx,
492 .getpgtccfgtx = ixgbe_dcbnl_get_pg_tc_cfg_tx,
493 .getpgbwgcfgtx = ixgbe_dcbnl_get_pg_bwg_cfg_tx,
494 .getpgtccfgrx = ixgbe_dcbnl_get_pg_tc_cfg_rx,
495 .getpgbwgcfgrx = ixgbe_dcbnl_get_pg_bwg_cfg_rx,
496 .setpfccfg = ixgbe_dcbnl_set_pfc_cfg,
497 .getpfccfg = ixgbe_dcbnl_get_pfc_cfg,
46132188 498 .setall = ixgbe_dcbnl_set_all,
33dbabc4
AD		 499 .getcap = ixgbe_dcbnl_getcap,
500 .getnumtcs = ixgbe_dcbnl_getnumtcs,
0eb3aa9b
AD		 501 .setnumtcs = ixgbe_dcbnl_setnumtcs,
502 .getpfcstate = ixgbe_dcbnl_getpfcstate,
859ee3c4 503 .setpfcstate = ixgbe_dcbnl_setpfcstate,
2f90b865
AD		 504};
505
Linux 6.x block layer and io_uring tree(s)