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ixgbe: DCB, implement capabilities flags
[linux-2.6-block.git] / drivers / net / ixgbe / ixgbe_dcb_nl.c
CommitLineData
2f90b865
AD		 1/*******************************************************************************
2
3 Intel 10 Gigabit PCI Express Linux driver
a52055e0 4 Copyright(c) 1999 - 2011 Intel Corporation.
2f90b865
AD		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "ixgbe.h"
30#include <linux/dcbnl.h>
62551d3e
PWJ		 31#include "ixgbe_dcb_82598.h"
32#include "ixgbe_dcb_82599.h"
2f90b865
AD		 33
34/* Callbacks for DCB netlink in the kernel */
35#define BIT_DCB_MODE 0x01
36#define BIT_PFC 0x02
37#define BIT_PG_RX 0x04
38#define BIT_PG_TX 0x08
8de8b2e6 39#define BIT_APP_UPCHG 0x10
235ea828 40#define BIT_LINKSPEED 0x80
2f90b865 41
62551d3e
PWJ		 42/* Responses for the DCB_C_SET_ALL command */
43#define DCB_HW_CHG_RST 0 /* DCB configuration changed with reset */
44#define DCB_NO_HW_CHG 1 /* DCB configuration did not change */
45#define DCB_HW_CHG 2 /* DCB configuration changed, no reset */
46
2f90b865
AD		 47int ixgbe_copy_dcb_cfg(struct ixgbe_dcb_config *src_dcb_cfg,
48 struct ixgbe_dcb_config *dst_dcb_cfg, int tc_max)
49{
50 struct tc_configuration *src_tc_cfg = NULL;
51 struct tc_configuration *dst_tc_cfg = NULL;
52 int i;
53
54 if (!src_dcb_cfg || !dst_dcb_cfg)
55 return -EINVAL;
56
57 for (i = DCB_PG_ATTR_TC_0; i < tc_max + DCB_PG_ATTR_TC_0; i++) {
58 src_tc_cfg = &src_dcb_cfg->tc_config[i - DCB_PG_ATTR_TC_0];
59 dst_tc_cfg = &dst_dcb_cfg->tc_config[i - DCB_PG_ATTR_TC_0];
60
61 dst_tc_cfg->path[DCB_TX_CONFIG].prio_type =
62 src_tc_cfg->path[DCB_TX_CONFIG].prio_type;
63
64 dst_tc_cfg->path[DCB_TX_CONFIG].bwg_id =
65 src_tc_cfg->path[DCB_TX_CONFIG].bwg_id;
66
67 dst_tc_cfg->path[DCB_TX_CONFIG].bwg_percent =
68 src_tc_cfg->path[DCB_TX_CONFIG].bwg_percent;
69
70 dst_tc_cfg->path[DCB_TX_CONFIG].up_to_tc_bitmap =
71 src_tc_cfg->path[DCB_TX_CONFIG].up_to_tc_bitmap;
72
73 dst_tc_cfg->path[DCB_RX_CONFIG].prio_type =
74 src_tc_cfg->path[DCB_RX_CONFIG].prio_type;
75
76 dst_tc_cfg->path[DCB_RX_CONFIG].bwg_id =
77 src_tc_cfg->path[DCB_RX_CONFIG].bwg_id;
78
79 dst_tc_cfg->path[DCB_RX_CONFIG].bwg_percent =
80 src_tc_cfg->path[DCB_RX_CONFIG].bwg_percent;
81
82 dst_tc_cfg->path[DCB_RX_CONFIG].up_to_tc_bitmap =
83 src_tc_cfg->path[DCB_RX_CONFIG].up_to_tc_bitmap;
84 }
85
86 for (i = DCB_PG_ATTR_BW_ID_0; i < DCB_PG_ATTR_BW_ID_MAX; i++) {
87 dst_dcb_cfg->bw_percentage[DCB_TX_CONFIG]
88 [i-DCB_PG_ATTR_BW_ID_0] = src_dcb_cfg->bw_percentage
89 [DCB_TX_CONFIG][i-DCB_PG_ATTR_BW_ID_0];
90 dst_dcb_cfg->bw_percentage[DCB_RX_CONFIG]
91 [i-DCB_PG_ATTR_BW_ID_0] = src_dcb_cfg->bw_percentage
92 [DCB_RX_CONFIG][i-DCB_PG_ATTR_BW_ID_0];
93 }
94
95 for (i = DCB_PFC_UP_ATTR_0; i < DCB_PFC_UP_ATTR_MAX; i++) {
96 dst_dcb_cfg->tc_config[i - DCB_PFC_UP_ATTR_0].dcb_pfc =
97 src_dcb_cfg->tc_config[i - DCB_PFC_UP_ATTR_0].dcb_pfc;
98 }
99
ea4af4f4
PW		 100 dst_dcb_cfg->pfc_mode_enable = src_dcb_cfg->pfc_mode_enable;
101
2f90b865
AD		 102 return 0;
103}
104
105static u8 ixgbe_dcbnl_get_state(struct net_device *netdev)
106{
107 struct ixgbe_adapter *adapter = netdev_priv(netdev);
108
2f90b865
AD		 109 return !!(adapter->flags & IXGBE_FLAG_DCB_ENABLED);
110}
111
1486a61e 112static u8 ixgbe_dcbnl_set_state(struct net_device *netdev, u8 state)
2f90b865 113{
1486a61e 114 u8 err = 0;
2f90b865
AD		 115 struct ixgbe_adapter *adapter = netdev_priv(netdev);
116
2f90b865
AD		 117 if (state > 0) {
118 /* Turn on DCB */
1486a61e
DS		 119 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED)
120 goto out;
2f90b865 121
1486a61e 122 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
396e799c 123 e_err(drv, "Enable failed, needs MSI-X\n");
1486a61e
DS		 124 err = 1;
125 goto out;
2f90b865 126 }
1486a61e
DS		 127
128 if (netif_running(netdev))
129 netdev->netdev_ops->ndo_stop(netdev);
7a921c93 130 ixgbe_clear_interrupt_scheme(adapter);
1486a61e 131
b93a2226
DS		 132 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
133 switch (adapter->hw.mac.type) {
134 case ixgbe_mac_82598EB:
264857b8
PWJ		 135 adapter->last_lfc_mode = adapter->hw.fc.current_mode;
136 adapter->hw.fc.requested_mode = ixgbe_fc_none;
b93a2226
DS		 137 break;
138 case ixgbe_mac_82599EB:
139 case ixgbe_mac_X540:
8faa2a78
YZ		 140 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
141 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
b93a2226
DS		 142 break;
143 default:
144 break;
8faa2a78 145 }
b93a2226 146
1486a61e
DS		 147 adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
148 ixgbe_init_interrupt_scheme(adapter);
1486a61e
DS		 149 if (netif_running(netdev))
150 netdev->netdev_ops->ndo_open(netdev);
2f90b865
AD		 151 } else {
152 /* Turn off DCB */
153 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
154 if (netif_running(netdev))
1486a61e 155 netdev->netdev_ops->ndo_stop(netdev);
7a921c93 156 ixgbe_clear_interrupt_scheme(adapter);
2f90b865 157
264857b8
PWJ		 158 adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
159 adapter->temp_dcb_cfg.pfc_mode_enable = false;
160 adapter->dcb_cfg.pfc_mode_enable = false;
2f90b865
AD		 161 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
162 adapter->flags |= IXGBE_FLAG_RSS_ENABLED;
b93a2226
DS		 163 switch (adapter->hw.mac.type) {
164 case ixgbe_mac_82599EB:
165 case ixgbe_mac_X540:
8faa2a78 166 adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
b93a2226
DS		 167 break;
168 default:
169 break;
170 }
0d551589 171
2f90b865 172 ixgbe_init_interrupt_scheme(adapter);
2f90b865 173 if (netif_running(netdev))
1486a61e 174 netdev->netdev_ops->ndo_open(netdev);
2f90b865
AD		 175 }
176 }
1486a61e
DS		 177out:
178 return err;
2f90b865
AD		 179}
180
181static void ixgbe_dcbnl_get_perm_hw_addr(struct net_device *netdev,
182 u8 *perm_addr)
183{
184 struct ixgbe_adapter *adapter = netdev_priv(netdev);
aca6bee7 185 int i, j;
2f90b865 186
86e713a0
LL		 187 memset(perm_addr, 0xff, MAX_ADDR_LEN);
188
2f90b865
AD		 189 for (i = 0; i < netdev->addr_len; i++)
190 perm_addr[i] = adapter->hw.mac.perm_addr[i];
aca6bee7 191
b93a2226
DS		 192 switch (adapter->hw.mac.type) {
193 case ixgbe_mac_82599EB:
194 case ixgbe_mac_X540:
aca6bee7
WJP		 195 for (j = 0; j < netdev->addr_len; j++, i++)
196 perm_addr[i] = adapter->hw.mac.san_addr[j];
b93a2226
DS		 197 break;
198 default:
199 break;
aca6bee7 200 }
2f90b865
AD		 201}
202
203static void ixgbe_dcbnl_set_pg_tc_cfg_tx(struct net_device *netdev, int tc,
204 u8 prio, u8 bwg_id, u8 bw_pct,
205 u8 up_map)
206{
207 struct ixgbe_adapter *adapter = netdev_priv(netdev);
208
209 if (prio != DCB_ATTR_VALUE_UNDEFINED)
210 adapter->temp_dcb_cfg.tc_config[tc].path[0].prio_type = prio;
211 if (bwg_id != DCB_ATTR_VALUE_UNDEFINED)
212 adapter->temp_dcb_cfg.tc_config[tc].path[0].bwg_id = bwg_id;
213 if (bw_pct != DCB_ATTR_VALUE_UNDEFINED)
214 adapter->temp_dcb_cfg.tc_config[tc].path[0].bwg_percent =
215 bw_pct;
216 if (up_map != DCB_ATTR_VALUE_UNDEFINED)
217 adapter->temp_dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap =
218 up_map;
219
220 if ((adapter->temp_dcb_cfg.tc_config[tc].path[0].prio_type !=
221 adapter->dcb_cfg.tc_config[tc].path[0].prio_type) ||
222 (adapter->temp_dcb_cfg.tc_config[tc].path[0].bwg_id !=
223 adapter->dcb_cfg.tc_config[tc].path[0].bwg_id) ||
224 (adapter->temp_dcb_cfg.tc_config[tc].path[0].bwg_percent !=
225 adapter->dcb_cfg.tc_config[tc].path[0].bwg_percent) ||
226 (adapter->temp_dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap !=
d43f5c21 227 adapter->dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap))
2f90b865
AD		 228 adapter->dcb_set_bitmap |= BIT_PG_TX;
229}
230
231static void ixgbe_dcbnl_set_pg_bwg_cfg_tx(struct net_device *netdev, int bwg_id,
232 u8 bw_pct)
233{
234 struct ixgbe_adapter *adapter = netdev_priv(netdev);
235
236 adapter->temp_dcb_cfg.bw_percentage[0][bwg_id] = bw_pct;
237
238 if (adapter->temp_dcb_cfg.bw_percentage[0][bwg_id] !=
d43f5c21 239 adapter->dcb_cfg.bw_percentage[0][bwg_id])
ebe1b30c 240 adapter->dcb_set_bitmap |= BIT_PG_TX;
2f90b865
AD		 241}
242
243static void ixgbe_dcbnl_set_pg_tc_cfg_rx(struct net_device *netdev, int tc,
244 u8 prio, u8 bwg_id, u8 bw_pct,
245 u8 up_map)
246{
247 struct ixgbe_adapter *adapter = netdev_priv(netdev);
248
249 if (prio != DCB_ATTR_VALUE_UNDEFINED)
250 adapter->temp_dcb_cfg.tc_config[tc].path[1].prio_type = prio;
251 if (bwg_id != DCB_ATTR_VALUE_UNDEFINED)
252 adapter->temp_dcb_cfg.tc_config[tc].path[1].bwg_id = bwg_id;
253 if (bw_pct != DCB_ATTR_VALUE_UNDEFINED)
254 adapter->temp_dcb_cfg.tc_config[tc].path[1].bwg_percent =
255 bw_pct;
256 if (up_map != DCB_ATTR_VALUE_UNDEFINED)
257 adapter->temp_dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap =
258 up_map;
259
260 if ((adapter->temp_dcb_cfg.tc_config[tc].path[1].prio_type !=
261 adapter->dcb_cfg.tc_config[tc].path[1].prio_type) ||
262 (adapter->temp_dcb_cfg.tc_config[tc].path[1].bwg_id !=
263 adapter->dcb_cfg.tc_config[tc].path[1].bwg_id) ||
264 (adapter->temp_dcb_cfg.tc_config[tc].path[1].bwg_percent !=
265 adapter->dcb_cfg.tc_config[tc].path[1].bwg_percent) ||
266 (adapter->temp_dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap !=
d43f5c21 267 adapter->dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap))
2f90b865
AD		 268 adapter->dcb_set_bitmap |= BIT_PG_RX;
269}
270
271static void ixgbe_dcbnl_set_pg_bwg_cfg_rx(struct net_device *netdev, int bwg_id,
272 u8 bw_pct)
273{
274 struct ixgbe_adapter *adapter = netdev_priv(netdev);
275
276 adapter->temp_dcb_cfg.bw_percentage[1][bwg_id] = bw_pct;
277
278 if (adapter->temp_dcb_cfg.bw_percentage[1][bwg_id] !=
d43f5c21 279 adapter->dcb_cfg.bw_percentage[1][bwg_id])
2f90b865
AD		 280 adapter->dcb_set_bitmap |= BIT_PG_RX;
281}
282
283static void ixgbe_dcbnl_get_pg_tc_cfg_tx(struct net_device *netdev, int tc,
284 u8 *prio, u8 *bwg_id, u8 *bw_pct,
285 u8 *up_map)
286{
287 struct ixgbe_adapter *adapter = netdev_priv(netdev);
288
289 *prio = adapter->dcb_cfg.tc_config[tc].path[0].prio_type;
290 *bwg_id = adapter->dcb_cfg.tc_config[tc].path[0].bwg_id;
291 *bw_pct = adapter->dcb_cfg.tc_config[tc].path[0].bwg_percent;
292 *up_map = adapter->dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap;
293}
294
295static void ixgbe_dcbnl_get_pg_bwg_cfg_tx(struct net_device *netdev, int bwg_id,
296 u8 *bw_pct)
297{
298 struct ixgbe_adapter *adapter = netdev_priv(netdev);
299
300 *bw_pct = adapter->dcb_cfg.bw_percentage[0][bwg_id];
301}
302
303static void ixgbe_dcbnl_get_pg_tc_cfg_rx(struct net_device *netdev, int tc,
304 u8 *prio, u8 *bwg_id, u8 *bw_pct,
305 u8 *up_map)
306{
307 struct ixgbe_adapter *adapter = netdev_priv(netdev);
308
309 *prio = adapter->dcb_cfg.tc_config[tc].path[1].prio_type;
310 *bwg_id = adapter->dcb_cfg.tc_config[tc].path[1].bwg_id;
311 *bw_pct = adapter->dcb_cfg.tc_config[tc].path[1].bwg_percent;
312 *up_map = adapter->dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap;
313}
314
315static void ixgbe_dcbnl_get_pg_bwg_cfg_rx(struct net_device *netdev, int bwg_id,
316 u8 *bw_pct)
317{
318 struct ixgbe_adapter *adapter = netdev_priv(netdev);
319
320 *bw_pct = adapter->dcb_cfg.bw_percentage[1][bwg_id];
321}
322
323static void ixgbe_dcbnl_set_pfc_cfg(struct net_device *netdev, int priority,
324 u8 setting)
325{
326 struct ixgbe_adapter *adapter = netdev_priv(netdev);
327
328 adapter->temp_dcb_cfg.tc_config[priority].dcb_pfc = setting;
329 if (adapter->temp_dcb_cfg.tc_config[priority].dcb_pfc !=
ea4af4f4 330 adapter->dcb_cfg.tc_config[priority].dcb_pfc) {
2f90b865 331 adapter->dcb_set_bitmap |= BIT_PFC;
ea4af4f4
PW		 332 adapter->temp_dcb_cfg.pfc_mode_enable = true;
333 }
2f90b865
AD		 334}
335
336static void ixgbe_dcbnl_get_pfc_cfg(struct net_device *netdev, int priority,
337 u8 *setting)
338{
339 struct ixgbe_adapter *adapter = netdev_priv(netdev);
340
341 *setting = adapter->dcb_cfg.tc_config[priority].dcb_pfc;
342}
343
344static u8 ixgbe_dcbnl_set_all(struct net_device *netdev)
345{
346 struct ixgbe_adapter *adapter = netdev_priv(netdev);
347 int ret;
348
3032309b
JF		 349 if (!adapter->dcb_set_bitmap ||
350 !(adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE))
62551d3e 351 return DCB_NO_HW_CHG;
2f90b865 352
3ce1cc52
JF		 353 ret = ixgbe_copy_dcb_cfg(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
354 adapter->ring_feature[RING_F_DCB].indices);
355
356 if (ret)
357 return DCB_NO_HW_CHG;
358
62551d3e 359 /*
d37e1d0e
JF		 360 * Only take down the adapter if an app change occured. FCoE
361 * may shuffle tx rings in this case and this can not be done
362 * without a reset currently.
62551d3e 363 */
d37e1d0e 364 if (adapter->dcb_set_bitmap & BIT_APP_UPCHG) {
62551d3e
PWJ		 365 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
366 msleep(1);
2f90b865 367
d37e1d0e
JF		 368 if (netif_running(netdev))
369 netdev->netdev_ops->ndo_stop(netdev);
370 ixgbe_clear_interrupt_scheme(adapter);
62551d3e 371 }
2f90b865 372
264857b8 373 if (adapter->dcb_cfg.pfc_mode_enable) {
b93a2226
DS		 374 switch (adapter->hw.mac.type) {
375 case ixgbe_mac_82599EB:
376 case ixgbe_mac_X540:
377 if (adapter->hw.fc.current_mode != ixgbe_fc_pfc)
378 adapter->last_lfc_mode =
379 adapter->hw.fc.current_mode;
380 break;
381 default:
382 break;
383 }
264857b8
PWJ		 384 adapter->hw.fc.requested_mode = ixgbe_fc_pfc;
385 } else {
b93a2226
DS		 386 switch (adapter->hw.mac.type) {
387 case ixgbe_mac_82598EB:
264857b8 388 adapter->hw.fc.requested_mode = ixgbe_fc_none;
b93a2226
DS		 389 break;
390 case ixgbe_mac_82599EB:
391 case ixgbe_mac_X540:
392 adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
393 break;
394 default:
395 break;
396 }
264857b8
PWJ		 397 }
398
d37e1d0e
JF		 399 if (adapter->dcb_set_bitmap & BIT_APP_UPCHG) {
400 ixgbe_init_interrupt_scheme(adapter);
401 if (netif_running(netdev))
402 netdev->netdev_ops->ndo_open(netdev);
62551d3e 403 ret = DCB_HW_CHG_RST;
d43f5c21
JF		 404 }
405
406 if (adapter->dcb_set_bitmap & BIT_PFC) {
55320cb5
JF		 407 u8 pfc_en;
408 ixgbe_dcb_unpack_pfc(&adapter->dcb_cfg, &pfc_en);
5977deaa 409 ixgbe_dcb_hw_pfc_config(&adapter->hw, pfc_en);
62551d3e
PWJ		 410 ret = DCB_HW_CHG;
411 }
d43f5c21
JF		 412
413 if (adapter->dcb_set_bitmap & (BIT_PG_TX|BIT_PG_RX)) {
414 u16 refill[MAX_TRAFFIC_CLASS], max[MAX_TRAFFIC_CLASS];
415 u8 bwg_id[MAX_TRAFFIC_CLASS], prio_type[MAX_TRAFFIC_CLASS];
416 int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
417
418#ifdef CONFIG_FCOE
419 if (adapter->netdev->features & NETIF_F_FCOE_MTU)
420 max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE);
421#endif
422
423 ixgbe_dcb_calculate_tc_credits(&adapter->hw, &adapter->dcb_cfg,
424 max_frame, DCB_TX_CONFIG);
425 ixgbe_dcb_calculate_tc_credits(&adapter->hw, &adapter->dcb_cfg,
426 max_frame, DCB_RX_CONFIG);
427
428 ixgbe_dcb_unpack_refill(&adapter->dcb_cfg,
429 DCB_TX_CONFIG, refill);
430 ixgbe_dcb_unpack_max(&adapter->dcb_cfg, max);
431 ixgbe_dcb_unpack_bwgid(&adapter->dcb_cfg,
432 DCB_TX_CONFIG, bwg_id);
433 ixgbe_dcb_unpack_prio(&adapter->dcb_cfg,
434 DCB_TX_CONFIG, prio_type);
435
436 ixgbe_dcb_hw_ets_config(&adapter->hw, refill, max,
437 bwg_id, prio_type);
438 }
439
264857b8
PWJ		 440 if (adapter->dcb_cfg.pfc_mode_enable)
441 adapter->hw.fc.current_mode = ixgbe_fc_pfc;
442
d37e1d0e 443 if (adapter->dcb_set_bitmap & BIT_APP_UPCHG)
62551d3e 444 clear_bit(__IXGBE_RESETTING, &adapter->state);
2f90b865 445 adapter->dcb_set_bitmap = 0x00;
2f90b865
AD		 446 return ret;
447}
448
46132188
AD		 449static u8 ixgbe_dcbnl_getcap(struct net_device *netdev, int capid, u8 *cap)
450{
451 struct ixgbe_adapter *adapter = netdev_priv(netdev);
46132188 452
3032309b
JF		 453 switch (capid) {
454 case DCB_CAP_ATTR_PG:
455 *cap = true;
456 break;
457 case DCB_CAP_ATTR_PFC:
458 *cap = true;
459 break;
460 case DCB_CAP_ATTR_UP2TC:
461 *cap = false;
462 break;
463 case DCB_CAP_ATTR_PG_TCS:
464 *cap = 0x80;
465 break;
466 case DCB_CAP_ATTR_PFC_TCS:
467 *cap = 0x80;
468 break;
469 case DCB_CAP_ATTR_GSP:
470 *cap = true;
471 break;
472 case DCB_CAP_ATTR_BCN:
473 *cap = false;
474 break;
475 case DCB_CAP_ATTR_DCBX:
476 *cap = adapter->dcbx_cap;
477 break;
478 default:
479 *cap = false;
480 break;
46132188
AD		 481 }
482
3032309b 483 return 0;
46132188
AD		 484}
485
33dbabc4
AD		 486static u8 ixgbe_dcbnl_getnumtcs(struct net_device *netdev, int tcid, u8 *num)
487{
488 struct ixgbe_adapter *adapter = netdev_priv(netdev);
489 u8 rval = 0;
490
491 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
492 switch (tcid) {
493 case DCB_NUMTCS_ATTR_PG:
494 *num = MAX_TRAFFIC_CLASS;
495 break;
496 case DCB_NUMTCS_ATTR_PFC:
497 *num = MAX_TRAFFIC_CLASS;
498 break;
499 default:
500 rval = -EINVAL;
501 break;
502 }
503 } else {
504 rval = -EINVAL;
505 }
506
507 return rval;
508}
509
510static u8 ixgbe_dcbnl_setnumtcs(struct net_device *netdev, int tcid, u8 num)
511{
512 return -EINVAL;
513}
514
0eb3aa9b
AD		 515static u8 ixgbe_dcbnl_getpfcstate(struct net_device *netdev)
516{
517 struct ixgbe_adapter *adapter = netdev_priv(netdev);
518
264857b8 519 return adapter->dcb_cfg.pfc_mode_enable;
0eb3aa9b
AD		 520}
521
522static void ixgbe_dcbnl_setpfcstate(struct net_device *netdev, u8 state)
523{
264857b8
PWJ		 524 struct ixgbe_adapter *adapter = netdev_priv(netdev);
525
526 adapter->temp_dcb_cfg.pfc_mode_enable = state;
527 if (adapter->temp_dcb_cfg.pfc_mode_enable !=
528 adapter->dcb_cfg.pfc_mode_enable)
529 adapter->dcb_set_bitmap |= BIT_PFC;
0eb3aa9b
AD		 530}
531
6ee16520
YZ		 532/**
533 * ixgbe_dcbnl_getapp - retrieve the DCBX application user priority
534 * @netdev : the corresponding netdev
535 * @idtype : identifies the id as ether type or TCP/UDP port number
536 * @id: id is either ether type or TCP/UDP port number
537 *
538 * Returns : on success, returns a non-zero 802.1p user priority bitmap
539 * otherwise returns 0 as the invalid user priority bitmap to indicate an
540 * error.
541 */
542static u8 ixgbe_dcbnl_getapp(struct net_device *netdev, u8 idtype, u16 id)
543{
3032309b 544 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6ee16520
YZ		 545 u8 rval = 0;
546
3032309b
JF		 547 if (!(adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE))
548 return rval;
549
6ee16520
YZ		 550 switch (idtype) {
551 case DCB_APP_IDTYPE_ETHTYPE:
552#ifdef IXGBE_FCOE
553 if (id == ETH_P_FCOE)
3032309b 554 rval = ixgbe_fcoe_getapp(adapter);
6ee16520
YZ		 555#endif
556 break;
557 case DCB_APP_IDTYPE_PORTNUM:
558 break;
559 default:
560 break;
561 }
562 return rval;
563}
564
565/**
566 * ixgbe_dcbnl_setapp - set the DCBX application user priority
567 * @netdev : the corresponding netdev
568 * @idtype : identifies the id as ether type or TCP/UDP port number
569 * @id: id is either ether type or TCP/UDP port number
570 * @up: the 802.1p user priority bitmap
571 *
572 * Returns : 0 on success or 1 on error
573 */
574static u8 ixgbe_dcbnl_setapp(struct net_device *netdev,
575 u8 idtype, u16 id, u8 up)
576{
3032309b 577 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6ee16520
YZ		 578 u8 rval = 1;
579
3032309b
JF		 580 if (!(adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE))
581 return rval;
582
6ee16520
YZ		 583 switch (idtype) {
584 case DCB_APP_IDTYPE_ETHTYPE:
585#ifdef IXGBE_FCOE
8de8b2e6 586 if (id == ETH_P_FCOE) {
53bb9f80 587 u8 old_tc;
8de8b2e6 588
53bb9f80
JF		 589 /* Get current programmed tc */
590 old_tc = adapter->fcoe.tc;
8de8b2e6 591 rval = ixgbe_fcoe_setapp(adapter, up);
53bb9f80
JF		 592
593 if (rval ||
594 !(adapter->flags & IXGBE_FLAG_DCB_ENABLED) ||
595 !(adapter->flags & IXGBE_FLAG_FCOE_ENABLED))
596 break;
597
598 /* The FCoE application priority may be changed multiple
599 * times in quick sucession with switches that build up
600 * TLVs. To avoid creating uneeded device resets this
601 * checks the actual HW configuration and clears
602 * BIT_APP_UPCHG if a HW configuration change is not
603 * need
604 */
605 if (old_tc == adapter->fcoe.tc)
606 adapter->dcb_set_bitmap &= ~BIT_APP_UPCHG;
607 else
8de8b2e6 608 adapter->dcb_set_bitmap |= BIT_APP_UPCHG;
8de8b2e6 609 }
6ee16520
YZ		 610#endif
611 break;
612 case DCB_APP_IDTYPE_PORTNUM:
613 break;
614 default:
615 break;
616 }
617 return rval;
618}
619
d033d526
JF		 620static int ixgbe_dcbnl_ieee_getets(struct net_device *dev,
621 struct ieee_ets *ets)
622{
623 struct ixgbe_adapter *adapter = netdev_priv(dev);
624 struct ieee_ets *my_ets = adapter->ixgbe_ieee_ets;
625
626 /* No IEEE PFC settings available */
627 if (!my_ets)
628 return -EINVAL;
629
630 ets->ets_cap = MAX_TRAFFIC_CLASS;
631 ets->cbs = my_ets->cbs;
632 memcpy(ets->tc_tx_bw, my_ets->tc_tx_bw, sizeof(ets->tc_tx_bw));
633 memcpy(ets->tc_rx_bw, my_ets->tc_rx_bw, sizeof(ets->tc_rx_bw));
634 memcpy(ets->tc_tsa, my_ets->tc_tsa, sizeof(ets->tc_tsa));
635 memcpy(ets->prio_tc, my_ets->prio_tc, sizeof(ets->prio_tc));
636 return 0;
637}
638
639static int ixgbe_dcbnl_ieee_setets(struct net_device *dev,
640 struct ieee_ets *ets)
641{
642 struct ixgbe_adapter *adapter = netdev_priv(dev);
643 __u16 refill[IEEE_8021QAZ_MAX_TCS], max[IEEE_8021QAZ_MAX_TCS];
644 int max_frame = dev->mtu + ETH_HLEN + ETH_FCS_LEN;
645 int err;
646 /* naively give each TC a bwg to map onto CEE hardware */
647 __u8 bwg_id[IEEE_8021QAZ_MAX_TCS] = {0, 1, 2, 3, 4, 5, 6, 7};
648
3032309b
JF		 649 if (!(adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE))
650 return -EINVAL;
651
d033d526
JF		 652 if (!adapter->ixgbe_ieee_ets) {
653 adapter->ixgbe_ieee_ets = kmalloc(sizeof(struct ieee_ets),
654 GFP_KERNEL);
655 if (!adapter->ixgbe_ieee_ets)
656 return -ENOMEM;
657 }
658
d033d526
JF		 659 memcpy(adapter->ixgbe_ieee_ets, ets, sizeof(*adapter->ixgbe_ieee_ets));
660
661 ixgbe_ieee_credits(ets->tc_tx_bw, refill, max, max_frame);
662 err = ixgbe_dcb_hw_ets_config(&adapter->hw, refill, max,
663 bwg_id, ets->tc_tsa);
664 return err;
665}
666
667static int ixgbe_dcbnl_ieee_getpfc(struct net_device *dev,
668 struct ieee_pfc *pfc)
669{
670 struct ixgbe_adapter *adapter = netdev_priv(dev);
671 struct ieee_pfc *my_pfc = adapter->ixgbe_ieee_pfc;
672 int i;
673
674 /* No IEEE PFC settings available */
675 if (!my_pfc)
676 return -EINVAL;
677
678 pfc->pfc_cap = MAX_TRAFFIC_CLASS;
679 pfc->pfc_en = my_pfc->pfc_en;
680 pfc->mbc = my_pfc->mbc;
681 pfc->delay = my_pfc->delay;
682
683 for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
684 pfc->requests[i] = adapter->stats.pxoffrxc[i];
685 pfc->indications[i] = adapter->stats.pxofftxc[i];
686 }
687
688 return 0;
689}
690
691static int ixgbe_dcbnl_ieee_setpfc(struct net_device *dev,
692 struct ieee_pfc *pfc)
693{
694 struct ixgbe_adapter *adapter = netdev_priv(dev);
695 int err;
696
3032309b
JF		 697 if (!(adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE))
698 return -EINVAL;
699
d033d526
JF		 700 if (!adapter->ixgbe_ieee_pfc) {
701 adapter->ixgbe_ieee_pfc = kmalloc(sizeof(struct ieee_pfc),
702 GFP_KERNEL);
703 if (!adapter->ixgbe_ieee_pfc)
704 return -ENOMEM;
705 }
706
707 memcpy(adapter->ixgbe_ieee_pfc, pfc, sizeof(*adapter->ixgbe_ieee_pfc));
708 err = ixgbe_dcb_hw_pfc_config(&adapter->hw, pfc->pfc_en);
709 return err;
710}
711
3032309b
JF		 712static u8 ixgbe_dcbnl_getdcbx(struct net_device *dev)
713{
714 struct ixgbe_adapter *adapter = netdev_priv(dev);
715 return adapter->dcbx_cap;
716}
717
718static u8 ixgbe_dcbnl_setdcbx(struct net_device *dev, u8 mode)
719{
720 struct ixgbe_adapter *adapter = netdev_priv(dev);
721 struct ieee_ets ets = {0};
722 struct ieee_pfc pfc = {0};
723
724 /* no support for LLD_MANAGED modes or CEE+IEEE */
725 if ((mode & DCB_CAP_DCBX_LLD_MANAGED) ||
726 ((mode & DCB_CAP_DCBX_VER_IEEE) && (mode & DCB_CAP_DCBX_VER_CEE)) ||
727 !(mode & DCB_CAP_DCBX_HOST))
728 return 1;
729
730 if (mode == adapter->dcbx_cap)
731 return 0;
732
733 adapter->dcbx_cap = mode;
734
735 /* ETS and PFC defaults */
736 ets.ets_cap = 8;
737 pfc.pfc_cap = 8;
738
739 if (mode & DCB_CAP_DCBX_VER_IEEE) {
740 ixgbe_dcbnl_ieee_setets(dev, &ets);
741 ixgbe_dcbnl_ieee_setpfc(dev, &pfc);
742 } else if (mode & DCB_CAP_DCBX_VER_CEE) {
743 adapter->dcb_set_bitmap |= (BIT_PFC & BIT_PG_TX & BIT_PG_RX);
744 ixgbe_dcbnl_set_all(dev);
745 } else {
746 /* Drop into single TC mode strict priority as this
747 * indicates CEE and IEEE versions are disabled
748 */
749 ixgbe_dcbnl_ieee_setets(dev, &ets);
750 ixgbe_dcbnl_ieee_setpfc(dev, &pfc);
751 ixgbe_dcbnl_set_state(dev, 0);
752 }
753
754 return 0;
755}
756
32953543 757const struct dcbnl_rtnl_ops dcbnl_ops = {
d033d526
JF		 758 .ieee_getets = ixgbe_dcbnl_ieee_getets,
759 .ieee_setets = ixgbe_dcbnl_ieee_setets,
760 .ieee_getpfc = ixgbe_dcbnl_ieee_getpfc,
761 .ieee_setpfc = ixgbe_dcbnl_ieee_setpfc,
2f90b865
AD		 762 .getstate = ixgbe_dcbnl_get_state,
763 .setstate = ixgbe_dcbnl_set_state,
764 .getpermhwaddr = ixgbe_dcbnl_get_perm_hw_addr,
765 .setpgtccfgtx = ixgbe_dcbnl_set_pg_tc_cfg_tx,
766 .setpgbwgcfgtx = ixgbe_dcbnl_set_pg_bwg_cfg_tx,
767 .setpgtccfgrx = ixgbe_dcbnl_set_pg_tc_cfg_rx,
768 .setpgbwgcfgrx = ixgbe_dcbnl_set_pg_bwg_cfg_rx,
769 .getpgtccfgtx = ixgbe_dcbnl_get_pg_tc_cfg_tx,
770 .getpgbwgcfgtx = ixgbe_dcbnl_get_pg_bwg_cfg_tx,
771 .getpgtccfgrx = ixgbe_dcbnl_get_pg_tc_cfg_rx,
772 .getpgbwgcfgrx = ixgbe_dcbnl_get_pg_bwg_cfg_rx,
773 .setpfccfg = ixgbe_dcbnl_set_pfc_cfg,
774 .getpfccfg = ixgbe_dcbnl_get_pfc_cfg,
46132188 775 .setall = ixgbe_dcbnl_set_all,
33dbabc4
AD		 776 .getcap = ixgbe_dcbnl_getcap,
777 .getnumtcs = ixgbe_dcbnl_getnumtcs,
0eb3aa9b
AD		 778 .setnumtcs = ixgbe_dcbnl_setnumtcs,
779 .getpfcstate = ixgbe_dcbnl_getpfcstate,
859ee3c4 780 .setpfcstate = ixgbe_dcbnl_setpfcstate,
6ee16520
YZ		 781 .getapp = ixgbe_dcbnl_getapp,
782 .setapp = ixgbe_dcbnl_setapp,
3032309b
JF		 783 .getdcbx = ixgbe_dcbnl_getdcbx,
784 .setdcbx = ixgbe_dcbnl_setdcbx,
2f90b865 785};
Linux 6.x block layer and io_uring tree(s)