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1da177e4 LT |
1 | /******************************************************************************* |
2 | ||
3 | ||
4 | Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved. | |
5 | ||
6 | This program is free software; you can redistribute it and/or modify it | |
7 | under the terms of the GNU General Public License as published by the Free | |
8 | Software Foundation; either version 2 of the License, or (at your option) | |
9 | any later version. | |
10 | ||
11 | This program is distributed in the hope that it will be useful, but WITHOUT | |
12 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
13 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
14 | more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License along with | |
17 | this program; if not, write to the Free Software Foundation, Inc., 59 | |
18 | Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
19 | ||
20 | The full GNU General Public License is included in this distribution in the | |
21 | file called LICENSE. | |
22 | ||
23 | Contact Information: | |
24 | Linux NICS <linux.nics@intel.com> | |
25 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
26 | ||
27 | *******************************************************************************/ | |
28 | ||
29 | #include "ixgb.h" | |
30 | ||
31 | /* Change Log | |
ab707da7 MC |
32 | * 1.0.96 04/19/05 |
33 | * - Make needlessly global code static -- bunk@stusta.de | |
34 | * - ethtool cleanup -- shemminger@osdl.org | |
35 | * - Support for MODULE_VERSION -- linville@tuxdriver.com | |
36 | * - add skb_header_cloned check to the tso path -- herbert@apana.org.au | |
1da177e4 LT |
37 | * 1.0.88 01/05/05 |
38 | * - include fix to the condition that determines when to quit NAPI - Robert Olsson | |
39 | * - use netif_poll_{disable/enable} to synchronize between NAPI and i/f up/down | |
40 | * 1.0.84 10/26/04 | |
41 | * - reset buffer_info->dma in Tx resource cleanup logic | |
42 | * 1.0.83 10/12/04 | |
43 | * - sparse cleanup - shemminger@osdl.org | |
44 | * - fix tx resource cleanup logic | |
45 | */ | |
46 | ||
47 | char ixgb_driver_name[] = "ixgb"; | |
48 | char ixgb_driver_string[] = "Intel(R) PRO/10GbE Network Driver"; | |
49 | ||
50 | #ifndef CONFIG_IXGB_NAPI | |
51 | #define DRIVERNAPI | |
52 | #else | |
53 | #define DRIVERNAPI "-NAPI" | |
54 | #endif | |
ab707da7 | 55 | #define DRV_VERSION "1.0.100-k2"DRIVERNAPI |
01e5abc2 | 56 | char ixgb_driver_version[] = DRV_VERSION; |
ab707da7 | 57 | static char ixgb_copyright[] = "Copyright (c) 1999-2005 Intel Corporation."; |
1da177e4 LT |
58 | |
59 | /* ixgb_pci_tbl - PCI Device ID Table | |
60 | * | |
61 | * Wildcard entries (PCI_ANY_ID) should come last | |
62 | * Last entry must be all 0s | |
63 | * | |
64 | * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, | |
65 | * Class, Class Mask, private data (not used) } | |
66 | */ | |
67 | static struct pci_device_id ixgb_pci_tbl[] = { | |
68 | {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX, | |
69 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
70 | {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_SR, | |
71 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
72 | {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_LR, | |
73 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
74 | ||
75 | /* required last entry */ | |
76 | {0,} | |
77 | }; | |
78 | ||
79 | MODULE_DEVICE_TABLE(pci, ixgb_pci_tbl); | |
80 | ||
81 | /* Local Function Prototypes */ | |
82 | ||
83 | int ixgb_up(struct ixgb_adapter *adapter); | |
84 | void ixgb_down(struct ixgb_adapter *adapter, boolean_t kill_watchdog); | |
85 | void ixgb_reset(struct ixgb_adapter *adapter); | |
86 | int ixgb_setup_tx_resources(struct ixgb_adapter *adapter); | |
87 | int ixgb_setup_rx_resources(struct ixgb_adapter *adapter); | |
88 | void ixgb_free_tx_resources(struct ixgb_adapter *adapter); | |
89 | void ixgb_free_rx_resources(struct ixgb_adapter *adapter); | |
90 | void ixgb_update_stats(struct ixgb_adapter *adapter); | |
91 | ||
92 | static int ixgb_init_module(void); | |
93 | static void ixgb_exit_module(void); | |
94 | static int ixgb_probe(struct pci_dev *pdev, const struct pci_device_id *ent); | |
95 | static void __devexit ixgb_remove(struct pci_dev *pdev); | |
96 | static int ixgb_sw_init(struct ixgb_adapter *adapter); | |
97 | static int ixgb_open(struct net_device *netdev); | |
98 | static int ixgb_close(struct net_device *netdev); | |
99 | static void ixgb_configure_tx(struct ixgb_adapter *adapter); | |
100 | static void ixgb_configure_rx(struct ixgb_adapter *adapter); | |
101 | static void ixgb_setup_rctl(struct ixgb_adapter *adapter); | |
102 | static void ixgb_clean_tx_ring(struct ixgb_adapter *adapter); | |
103 | static void ixgb_clean_rx_ring(struct ixgb_adapter *adapter); | |
104 | static void ixgb_set_multi(struct net_device *netdev); | |
105 | static void ixgb_watchdog(unsigned long data); | |
106 | static int ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev); | |
107 | static struct net_device_stats *ixgb_get_stats(struct net_device *netdev); | |
108 | static int ixgb_change_mtu(struct net_device *netdev, int new_mtu); | |
109 | static int ixgb_set_mac(struct net_device *netdev, void *p); | |
110 | static irqreturn_t ixgb_intr(int irq, void *data, struct pt_regs *regs); | |
111 | static boolean_t ixgb_clean_tx_irq(struct ixgb_adapter *adapter); | |
ac79c82e | 112 | |
1da177e4 LT |
113 | #ifdef CONFIG_IXGB_NAPI |
114 | static int ixgb_clean(struct net_device *netdev, int *budget); | |
115 | static boolean_t ixgb_clean_rx_irq(struct ixgb_adapter *adapter, | |
116 | int *work_done, int work_to_do); | |
117 | #else | |
118 | static boolean_t ixgb_clean_rx_irq(struct ixgb_adapter *adapter); | |
119 | #endif | |
120 | static void ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter); | |
121 | void ixgb_set_ethtool_ops(struct net_device *netdev); | |
122 | static void ixgb_tx_timeout(struct net_device *dev); | |
123 | static void ixgb_tx_timeout_task(struct net_device *dev); | |
124 | static void ixgb_vlan_rx_register(struct net_device *netdev, | |
125 | struct vlan_group *grp); | |
126 | static void ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid); | |
127 | static void ixgb_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid); | |
128 | static void ixgb_restore_vlan(struct ixgb_adapter *adapter); | |
129 | ||
1da177e4 LT |
130 | #ifdef CONFIG_NET_POLL_CONTROLLER |
131 | /* for netdump / net console */ | |
132 | static void ixgb_netpoll(struct net_device *dev); | |
133 | #endif | |
134 | ||
1da177e4 LT |
135 | /* Exported from other modules */ |
136 | ||
137 | extern void ixgb_check_options(struct ixgb_adapter *adapter); | |
138 | ||
139 | static struct pci_driver ixgb_driver = { | |
c2eba932 | 140 | .name = ixgb_driver_name, |
1da177e4 | 141 | .id_table = ixgb_pci_tbl, |
c2eba932 MC |
142 | .probe = ixgb_probe, |
143 | .remove = __devexit_p(ixgb_remove), | |
1da177e4 LT |
144 | }; |
145 | ||
146 | MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>"); | |
147 | MODULE_DESCRIPTION("Intel(R) PRO/10GbE Network Driver"); | |
148 | MODULE_LICENSE("GPL"); | |
01e5abc2 | 149 | MODULE_VERSION(DRV_VERSION); |
1da177e4 LT |
150 | |
151 | /* some defines for controlling descriptor fetches in h/w */ | |
1da177e4 | 152 | #define RXDCTL_WTHRESH_DEFAULT 16 /* chip writes back at this many or RXT0 */ |
9c15d24f MC |
153 | #define RXDCTL_PTHRESH_DEFAULT 0 /* chip considers prefech below |
154 | * this */ | |
155 | #define RXDCTL_HTHRESH_DEFAULT 0 /* chip will only prefetch if tail | |
156 | * is pushed this many descriptors | |
157 | * from head */ | |
1da177e4 LT |
158 | |
159 | /** | |
160 | * ixgb_init_module - Driver Registration Routine | |
161 | * | |
162 | * ixgb_init_module is the first routine called when the driver is | |
163 | * loaded. All it does is register with the PCI subsystem. | |
164 | **/ | |
165 | ||
166 | static int __init | |
167 | ixgb_init_module(void) | |
168 | { | |
1da177e4 LT |
169 | printk(KERN_INFO "%s - version %s\n", |
170 | ixgb_driver_string, ixgb_driver_version); | |
171 | ||
172 | printk(KERN_INFO "%s\n", ixgb_copyright); | |
173 | ||
c2eba932 | 174 | return pci_module_init(&ixgb_driver); |
1da177e4 LT |
175 | } |
176 | ||
177 | module_init(ixgb_init_module); | |
178 | ||
179 | /** | |
180 | * ixgb_exit_module - Driver Exit Cleanup Routine | |
181 | * | |
182 | * ixgb_exit_module is called just before the driver is removed | |
183 | * from memory. | |
184 | **/ | |
185 | ||
186 | static void __exit | |
187 | ixgb_exit_module(void) | |
188 | { | |
1da177e4 LT |
189 | pci_unregister_driver(&ixgb_driver); |
190 | } | |
191 | ||
192 | module_exit(ixgb_exit_module); | |
193 | ||
194 | /** | |
195 | * ixgb_irq_disable - Mask off interrupt generation on the NIC | |
196 | * @adapter: board private structure | |
197 | **/ | |
198 | ||
199 | static inline void | |
200 | ixgb_irq_disable(struct ixgb_adapter *adapter) | |
201 | { | |
202 | atomic_inc(&adapter->irq_sem); | |
203 | IXGB_WRITE_REG(&adapter->hw, IMC, ~0); | |
204 | IXGB_WRITE_FLUSH(&adapter->hw); | |
205 | synchronize_irq(adapter->pdev->irq); | |
206 | } | |
207 | ||
208 | /** | |
209 | * ixgb_irq_enable - Enable default interrupt generation settings | |
210 | * @adapter: board private structure | |
211 | **/ | |
212 | ||
213 | static inline void | |
214 | ixgb_irq_enable(struct ixgb_adapter *adapter) | |
215 | { | |
216 | if(atomic_dec_and_test(&adapter->irq_sem)) { | |
217 | IXGB_WRITE_REG(&adapter->hw, IMS, | |
6dfbb6dd MC |
218 | IXGB_INT_RXT0 | IXGB_INT_RXDMT0 | IXGB_INT_TXDW | |
219 | IXGB_INT_LSC); | |
1da177e4 LT |
220 | IXGB_WRITE_FLUSH(&adapter->hw); |
221 | } | |
222 | } | |
223 | ||
224 | int | |
225 | ixgb_up(struct ixgb_adapter *adapter) | |
226 | { | |
227 | struct net_device *netdev = adapter->netdev; | |
228 | int err; | |
229 | int max_frame = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH; | |
230 | struct ixgb_hw *hw = &adapter->hw; | |
231 | ||
232 | /* hardware has been reset, we need to reload some things */ | |
233 | ||
234 | ixgb_set_multi(netdev); | |
235 | ||
236 | ixgb_restore_vlan(adapter); | |
237 | ||
238 | ixgb_configure_tx(adapter); | |
239 | ixgb_setup_rctl(adapter); | |
240 | ixgb_configure_rx(adapter); | |
241 | ixgb_alloc_rx_buffers(adapter); | |
242 | ||
243 | #ifdef CONFIG_PCI_MSI | |
244 | { | |
245 | boolean_t pcix = (IXGB_READ_REG(&adapter->hw, STATUS) & | |
246 | IXGB_STATUS_PCIX_MODE) ? TRUE : FALSE; | |
247 | adapter->have_msi = TRUE; | |
248 | ||
249 | if (!pcix) | |
250 | adapter->have_msi = FALSE; | |
251 | else if((err = pci_enable_msi(adapter->pdev))) { | |
252 | printk (KERN_ERR | |
253 | "Unable to allocate MSI interrupt Error: %d\n", err); | |
254 | adapter->have_msi = FALSE; | |
255 | /* proceed to try to request regular interrupt */ | |
256 | } | |
257 | } | |
258 | ||
259 | #endif | |
260 | if((err = request_irq(adapter->pdev->irq, &ixgb_intr, | |
261 | SA_SHIRQ | SA_SAMPLE_RANDOM, | |
262 | netdev->name, netdev))) | |
263 | return err; | |
264 | ||
265 | /* disable interrupts and get the hardware into a known state */ | |
266 | IXGB_WRITE_REG(&adapter->hw, IMC, 0xffffffff); | |
267 | ||
268 | if((hw->max_frame_size != max_frame) || | |
269 | (hw->max_frame_size != | |
270 | (IXGB_READ_REG(hw, MFS) >> IXGB_MFS_SHIFT))) { | |
271 | ||
272 | hw->max_frame_size = max_frame; | |
273 | ||
274 | IXGB_WRITE_REG(hw, MFS, hw->max_frame_size << IXGB_MFS_SHIFT); | |
275 | ||
276 | if(hw->max_frame_size > | |
277 | IXGB_MAX_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH) { | |
278 | uint32_t ctrl0 = IXGB_READ_REG(hw, CTRL0); | |
279 | ||
280 | if(!(ctrl0 & IXGB_CTRL0_JFE)) { | |
281 | ctrl0 |= IXGB_CTRL0_JFE; | |
282 | IXGB_WRITE_REG(hw, CTRL0, ctrl0); | |
283 | } | |
284 | } | |
285 | } | |
286 | ||
287 | mod_timer(&adapter->watchdog_timer, jiffies); | |
288 | ixgb_irq_enable(adapter); | |
289 | ||
290 | #ifdef CONFIG_IXGB_NAPI | |
291 | netif_poll_enable(netdev); | |
292 | #endif | |
293 | return 0; | |
294 | } | |
295 | ||
296 | void | |
297 | ixgb_down(struct ixgb_adapter *adapter, boolean_t kill_watchdog) | |
298 | { | |
299 | struct net_device *netdev = adapter->netdev; | |
300 | ||
301 | ixgb_irq_disable(adapter); | |
302 | free_irq(adapter->pdev->irq, netdev); | |
303 | #ifdef CONFIG_PCI_MSI | |
304 | if(adapter->have_msi == TRUE) | |
305 | pci_disable_msi(adapter->pdev); | |
306 | ||
307 | #endif | |
308 | if(kill_watchdog) | |
309 | del_timer_sync(&adapter->watchdog_timer); | |
310 | #ifdef CONFIG_IXGB_NAPI | |
311 | netif_poll_disable(netdev); | |
312 | #endif | |
313 | adapter->link_speed = 0; | |
314 | adapter->link_duplex = 0; | |
315 | netif_carrier_off(netdev); | |
316 | netif_stop_queue(netdev); | |
317 | ||
318 | ixgb_reset(adapter); | |
319 | ixgb_clean_tx_ring(adapter); | |
320 | ixgb_clean_rx_ring(adapter); | |
321 | } | |
322 | ||
323 | void | |
324 | ixgb_reset(struct ixgb_adapter *adapter) | |
325 | { | |
326 | ||
327 | ixgb_adapter_stop(&adapter->hw); | |
328 | if(!ixgb_init_hw(&adapter->hw)) | |
329 | IXGB_DBG("ixgb_init_hw failed.\n"); | |
330 | } | |
331 | ||
332 | /** | |
333 | * ixgb_probe - Device Initialization Routine | |
334 | * @pdev: PCI device information struct | |
335 | * @ent: entry in ixgb_pci_tbl | |
336 | * | |
337 | * Returns 0 on success, negative on failure | |
338 | * | |
339 | * ixgb_probe initializes an adapter identified by a pci_dev structure. | |
340 | * The OS initialization, configuring of the adapter private structure, | |
341 | * and a hardware reset occur. | |
342 | **/ | |
343 | ||
344 | static int __devinit | |
345 | ixgb_probe(struct pci_dev *pdev, | |
346 | const struct pci_device_id *ent) | |
347 | { | |
348 | struct net_device *netdev = NULL; | |
349 | struct ixgb_adapter *adapter; | |
350 | static int cards_found = 0; | |
351 | unsigned long mmio_start; | |
352 | int mmio_len; | |
353 | int pci_using_dac; | |
354 | int i; | |
355 | int err; | |
356 | ||
357 | if((err = pci_enable_device(pdev))) | |
358 | return err; | |
359 | ||
360 | if(!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) { | |
361 | pci_using_dac = 1; | |
362 | } else { | |
363 | if((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK))) { | |
364 | IXGB_ERR("No usable DMA configuration, aborting\n"); | |
365 | return err; | |
366 | } | |
367 | pci_using_dac = 0; | |
368 | } | |
369 | ||
370 | if((err = pci_request_regions(pdev, ixgb_driver_name))) | |
371 | return err; | |
372 | ||
373 | pci_set_master(pdev); | |
374 | ||
375 | netdev = alloc_etherdev(sizeof(struct ixgb_adapter)); | |
376 | if(!netdev) { | |
377 | err = -ENOMEM; | |
378 | goto err_alloc_etherdev; | |
379 | } | |
380 | ||
381 | SET_MODULE_OWNER(netdev); | |
382 | SET_NETDEV_DEV(netdev, &pdev->dev); | |
383 | ||
384 | pci_set_drvdata(pdev, netdev); | |
8908c6cd | 385 | adapter = netdev_priv(netdev); |
1da177e4 LT |
386 | adapter->netdev = netdev; |
387 | adapter->pdev = pdev; | |
388 | adapter->hw.back = adapter; | |
389 | ||
390 | mmio_start = pci_resource_start(pdev, BAR_0); | |
391 | mmio_len = pci_resource_len(pdev, BAR_0); | |
392 | ||
393 | adapter->hw.hw_addr = ioremap(mmio_start, mmio_len); | |
394 | if(!adapter->hw.hw_addr) { | |
395 | err = -EIO; | |
396 | goto err_ioremap; | |
397 | } | |
398 | ||
399 | for(i = BAR_1; i <= BAR_5; i++) { | |
400 | if(pci_resource_len(pdev, i) == 0) | |
401 | continue; | |
402 | if(pci_resource_flags(pdev, i) & IORESOURCE_IO) { | |
403 | adapter->hw.io_base = pci_resource_start(pdev, i); | |
404 | break; | |
405 | } | |
406 | } | |
407 | ||
408 | netdev->open = &ixgb_open; | |
409 | netdev->stop = &ixgb_close; | |
410 | netdev->hard_start_xmit = &ixgb_xmit_frame; | |
411 | netdev->get_stats = &ixgb_get_stats; | |
412 | netdev->set_multicast_list = &ixgb_set_multi; | |
413 | netdev->set_mac_address = &ixgb_set_mac; | |
414 | netdev->change_mtu = &ixgb_change_mtu; | |
415 | ixgb_set_ethtool_ops(netdev); | |
416 | netdev->tx_timeout = &ixgb_tx_timeout; | |
417 | netdev->watchdog_timeo = HZ; | |
418 | #ifdef CONFIG_IXGB_NAPI | |
419 | netdev->poll = &ixgb_clean; | |
420 | netdev->weight = 64; | |
421 | #endif | |
422 | netdev->vlan_rx_register = ixgb_vlan_rx_register; | |
423 | netdev->vlan_rx_add_vid = ixgb_vlan_rx_add_vid; | |
424 | netdev->vlan_rx_kill_vid = ixgb_vlan_rx_kill_vid; | |
425 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
426 | netdev->poll_controller = ixgb_netpoll; | |
427 | #endif | |
428 | ||
429 | netdev->mem_start = mmio_start; | |
430 | netdev->mem_end = mmio_start + mmio_len; | |
431 | netdev->base_addr = adapter->hw.io_base; | |
432 | ||
433 | adapter->bd_number = cards_found; | |
434 | adapter->link_speed = 0; | |
435 | adapter->link_duplex = 0; | |
436 | ||
437 | /* setup the private structure */ | |
438 | ||
439 | if((err = ixgb_sw_init(adapter))) | |
440 | goto err_sw_init; | |
441 | ||
442 | netdev->features = NETIF_F_SG | | |
443 | NETIF_F_HW_CSUM | | |
444 | NETIF_F_HW_VLAN_TX | | |
445 | NETIF_F_HW_VLAN_RX | | |
446 | NETIF_F_HW_VLAN_FILTER; | |
447 | #ifdef NETIF_F_TSO | |
448 | netdev->features |= NETIF_F_TSO; | |
449 | #endif | |
450 | ||
451 | if(pci_using_dac) | |
452 | netdev->features |= NETIF_F_HIGHDMA; | |
453 | ||
454 | /* make sure the EEPROM is good */ | |
455 | ||
456 | if(!ixgb_validate_eeprom_checksum(&adapter->hw)) { | |
457 | printk(KERN_ERR "The EEPROM Checksum Is Not Valid\n"); | |
458 | err = -EIO; | |
459 | goto err_eeprom; | |
460 | } | |
461 | ||
462 | ixgb_get_ee_mac_addr(&adapter->hw, netdev->dev_addr); | |
463 | ||
464 | if(!is_valid_ether_addr(netdev->dev_addr)) { | |
465 | err = -EIO; | |
466 | goto err_eeprom; | |
467 | } | |
468 | ||
469 | adapter->part_num = ixgb_get_ee_pba_number(&adapter->hw); | |
470 | ||
471 | init_timer(&adapter->watchdog_timer); | |
472 | adapter->watchdog_timer.function = &ixgb_watchdog; | |
473 | adapter->watchdog_timer.data = (unsigned long)adapter; | |
474 | ||
475 | INIT_WORK(&adapter->tx_timeout_task, | |
476 | (void (*)(void *))ixgb_tx_timeout_task, netdev); | |
477 | ||
478 | if((err = register_netdev(netdev))) | |
479 | goto err_register; | |
480 | ||
481 | /* we're going to reset, so assume we have no link for now */ | |
482 | ||
483 | netif_carrier_off(netdev); | |
484 | netif_stop_queue(netdev); | |
485 | ||
486 | printk(KERN_INFO "%s: Intel(R) PRO/10GbE Network Connection\n", | |
487 | netdev->name); | |
488 | ixgb_check_options(adapter); | |
489 | /* reset the hardware with the new settings */ | |
490 | ||
491 | ixgb_reset(adapter); | |
492 | ||
493 | cards_found++; | |
494 | return 0; | |
495 | ||
496 | err_register: | |
497 | err_sw_init: | |
498 | err_eeprom: | |
499 | iounmap(adapter->hw.hw_addr); | |
500 | err_ioremap: | |
501 | free_netdev(netdev); | |
502 | err_alloc_etherdev: | |
503 | pci_release_regions(pdev); | |
504 | return err; | |
505 | } | |
506 | ||
507 | /** | |
508 | * ixgb_remove - Device Removal Routine | |
509 | * @pdev: PCI device information struct | |
510 | * | |
511 | * ixgb_remove is called by the PCI subsystem to alert the driver | |
512 | * that it should release a PCI device. The could be caused by a | |
513 | * Hot-Plug event, or because the driver is going to be removed from | |
514 | * memory. | |
515 | **/ | |
516 | ||
517 | static void __devexit | |
518 | ixgb_remove(struct pci_dev *pdev) | |
519 | { | |
520 | struct net_device *netdev = pci_get_drvdata(pdev); | |
8908c6cd | 521 | struct ixgb_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
522 | |
523 | unregister_netdev(netdev); | |
524 | ||
525 | iounmap(adapter->hw.hw_addr); | |
526 | pci_release_regions(pdev); | |
527 | ||
528 | free_netdev(netdev); | |
529 | } | |
530 | ||
531 | /** | |
532 | * ixgb_sw_init - Initialize general software structures (struct ixgb_adapter) | |
533 | * @adapter: board private structure to initialize | |
534 | * | |
535 | * ixgb_sw_init initializes the Adapter private data structure. | |
536 | * Fields are initialized based on PCI device information and | |
537 | * OS network device settings (MTU size). | |
538 | **/ | |
539 | ||
540 | static int __devinit | |
541 | ixgb_sw_init(struct ixgb_adapter *adapter) | |
542 | { | |
543 | struct ixgb_hw *hw = &adapter->hw; | |
544 | struct net_device *netdev = adapter->netdev; | |
545 | struct pci_dev *pdev = adapter->pdev; | |
546 | ||
547 | /* PCI config space info */ | |
548 | ||
549 | hw->vendor_id = pdev->vendor; | |
550 | hw->device_id = pdev->device; | |
551 | hw->subsystem_vendor_id = pdev->subsystem_vendor; | |
552 | hw->subsystem_id = pdev->subsystem_device; | |
553 | ||
554 | adapter->rx_buffer_len = IXGB_RXBUFFER_2048; | |
555 | ||
556 | hw->max_frame_size = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH; | |
557 | ||
558 | if((hw->device_id == IXGB_DEVICE_ID_82597EX) | |
559 | ||(hw->device_id == IXGB_DEVICE_ID_82597EX_LR) | |
560 | ||(hw->device_id == IXGB_DEVICE_ID_82597EX_SR)) | |
561 | hw->mac_type = ixgb_82597; | |
562 | else { | |
563 | /* should never have loaded on this device */ | |
564 | printk(KERN_ERR "ixgb: unsupported device id\n"); | |
565 | } | |
566 | ||
567 | /* enable flow control to be programmed */ | |
568 | hw->fc.send_xon = 1; | |
569 | ||
570 | atomic_set(&adapter->irq_sem, 1); | |
571 | spin_lock_init(&adapter->tx_lock); | |
572 | ||
573 | return 0; | |
574 | } | |
575 | ||
576 | /** | |
577 | * ixgb_open - Called when a network interface is made active | |
578 | * @netdev: network interface device structure | |
579 | * | |
580 | * Returns 0 on success, negative value on failure | |
581 | * | |
582 | * The open entry point is called when a network interface is made | |
583 | * active by the system (IFF_UP). At this point all resources needed | |
584 | * for transmit and receive operations are allocated, the interrupt | |
585 | * handler is registered with the OS, the watchdog timer is started, | |
586 | * and the stack is notified that the interface is ready. | |
587 | **/ | |
588 | ||
589 | static int | |
590 | ixgb_open(struct net_device *netdev) | |
591 | { | |
8908c6cd | 592 | struct ixgb_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
593 | int err; |
594 | ||
595 | /* allocate transmit descriptors */ | |
596 | ||
597 | if((err = ixgb_setup_tx_resources(adapter))) | |
598 | goto err_setup_tx; | |
599 | ||
600 | /* allocate receive descriptors */ | |
601 | ||
602 | if((err = ixgb_setup_rx_resources(adapter))) | |
603 | goto err_setup_rx; | |
604 | ||
605 | if((err = ixgb_up(adapter))) | |
606 | goto err_up; | |
607 | ||
608 | return 0; | |
609 | ||
610 | err_up: | |
611 | ixgb_free_rx_resources(adapter); | |
612 | err_setup_rx: | |
613 | ixgb_free_tx_resources(adapter); | |
614 | err_setup_tx: | |
615 | ixgb_reset(adapter); | |
616 | ||
617 | return err; | |
618 | } | |
619 | ||
620 | /** | |
621 | * ixgb_close - Disables a network interface | |
622 | * @netdev: network interface device structure | |
623 | * | |
624 | * Returns 0, this is not allowed to fail | |
625 | * | |
626 | * The close entry point is called when an interface is de-activated | |
627 | * by the OS. The hardware is still under the drivers control, but | |
628 | * needs to be disabled. A global MAC reset is issued to stop the | |
629 | * hardware, and all transmit and receive resources are freed. | |
630 | **/ | |
631 | ||
632 | static int | |
633 | ixgb_close(struct net_device *netdev) | |
634 | { | |
8908c6cd | 635 | struct ixgb_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
636 | |
637 | ixgb_down(adapter, TRUE); | |
638 | ||
639 | ixgb_free_tx_resources(adapter); | |
640 | ixgb_free_rx_resources(adapter); | |
641 | ||
642 | return 0; | |
643 | } | |
644 | ||
645 | /** | |
646 | * ixgb_setup_tx_resources - allocate Tx resources (Descriptors) | |
647 | * @adapter: board private structure | |
648 | * | |
649 | * Return 0 on success, negative on failure | |
650 | **/ | |
651 | ||
652 | int | |
653 | ixgb_setup_tx_resources(struct ixgb_adapter *adapter) | |
654 | { | |
655 | struct ixgb_desc_ring *txdr = &adapter->tx_ring; | |
656 | struct pci_dev *pdev = adapter->pdev; | |
657 | int size; | |
658 | ||
659 | size = sizeof(struct ixgb_buffer) * txdr->count; | |
660 | txdr->buffer_info = vmalloc(size); | |
661 | if(!txdr->buffer_info) { | |
662 | return -ENOMEM; | |
663 | } | |
664 | memset(txdr->buffer_info, 0, size); | |
665 | ||
666 | /* round up to nearest 4K */ | |
667 | ||
668 | txdr->size = txdr->count * sizeof(struct ixgb_tx_desc); | |
669 | IXGB_ROUNDUP(txdr->size, 4096); | |
670 | ||
671 | txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma); | |
672 | if(!txdr->desc) { | |
673 | vfree(txdr->buffer_info); | |
674 | return -ENOMEM; | |
675 | } | |
676 | memset(txdr->desc, 0, txdr->size); | |
677 | ||
678 | txdr->next_to_use = 0; | |
679 | txdr->next_to_clean = 0; | |
680 | ||
681 | return 0; | |
682 | } | |
683 | ||
684 | /** | |
685 | * ixgb_configure_tx - Configure 82597 Transmit Unit after Reset. | |
686 | * @adapter: board private structure | |
687 | * | |
688 | * Configure the Tx unit of the MAC after a reset. | |
689 | **/ | |
690 | ||
691 | static void | |
692 | ixgb_configure_tx(struct ixgb_adapter *adapter) | |
693 | { | |
694 | uint64_t tdba = adapter->tx_ring.dma; | |
695 | uint32_t tdlen = adapter->tx_ring.count * sizeof(struct ixgb_tx_desc); | |
696 | uint32_t tctl; | |
697 | struct ixgb_hw *hw = &adapter->hw; | |
698 | ||
699 | /* Setup the Base and Length of the Tx Descriptor Ring | |
700 | * tx_ring.dma can be either a 32 or 64 bit value | |
701 | */ | |
702 | ||
703 | IXGB_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL)); | |
704 | IXGB_WRITE_REG(hw, TDBAH, (tdba >> 32)); | |
705 | ||
706 | IXGB_WRITE_REG(hw, TDLEN, tdlen); | |
707 | ||
708 | /* Setup the HW Tx Head and Tail descriptor pointers */ | |
709 | ||
710 | IXGB_WRITE_REG(hw, TDH, 0); | |
711 | IXGB_WRITE_REG(hw, TDT, 0); | |
712 | ||
713 | /* don't set up txdctl, it induces performance problems if configured | |
714 | * incorrectly */ | |
715 | /* Set the Tx Interrupt Delay register */ | |
716 | ||
717 | IXGB_WRITE_REG(hw, TIDV, adapter->tx_int_delay); | |
718 | ||
719 | /* Program the Transmit Control Register */ | |
720 | ||
721 | tctl = IXGB_TCTL_TCE | IXGB_TCTL_TXEN | IXGB_TCTL_TPDE; | |
722 | IXGB_WRITE_REG(hw, TCTL, tctl); | |
723 | ||
724 | /* Setup Transmit Descriptor Settings for this adapter */ | |
725 | adapter->tx_cmd_type = | |
726 | IXGB_TX_DESC_TYPE | |
727 | | (adapter->tx_int_delay_enable ? IXGB_TX_DESC_CMD_IDE : 0); | |
728 | } | |
729 | ||
730 | /** | |
731 | * ixgb_setup_rx_resources - allocate Rx resources (Descriptors) | |
732 | * @adapter: board private structure | |
733 | * | |
734 | * Returns 0 on success, negative on failure | |
735 | **/ | |
736 | ||
737 | int | |
738 | ixgb_setup_rx_resources(struct ixgb_adapter *adapter) | |
739 | { | |
740 | struct ixgb_desc_ring *rxdr = &adapter->rx_ring; | |
741 | struct pci_dev *pdev = adapter->pdev; | |
742 | int size; | |
743 | ||
744 | size = sizeof(struct ixgb_buffer) * rxdr->count; | |
745 | rxdr->buffer_info = vmalloc(size); | |
746 | if(!rxdr->buffer_info) { | |
747 | return -ENOMEM; | |
748 | } | |
749 | memset(rxdr->buffer_info, 0, size); | |
750 | ||
751 | /* Round up to nearest 4K */ | |
752 | ||
753 | rxdr->size = rxdr->count * sizeof(struct ixgb_rx_desc); | |
754 | IXGB_ROUNDUP(rxdr->size, 4096); | |
755 | ||
756 | rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma); | |
757 | ||
758 | if(!rxdr->desc) { | |
759 | vfree(rxdr->buffer_info); | |
760 | return -ENOMEM; | |
761 | } | |
762 | memset(rxdr->desc, 0, rxdr->size); | |
763 | ||
764 | rxdr->next_to_clean = 0; | |
765 | rxdr->next_to_use = 0; | |
766 | ||
767 | return 0; | |
768 | } | |
769 | ||
770 | /** | |
771 | * ixgb_setup_rctl - configure the receive control register | |
772 | * @adapter: Board private structure | |
773 | **/ | |
774 | ||
775 | static void | |
776 | ixgb_setup_rctl(struct ixgb_adapter *adapter) | |
777 | { | |
778 | uint32_t rctl; | |
779 | ||
780 | rctl = IXGB_READ_REG(&adapter->hw, RCTL); | |
781 | ||
782 | rctl &= ~(3 << IXGB_RCTL_MO_SHIFT); | |
783 | ||
784 | rctl |= | |
785 | IXGB_RCTL_BAM | IXGB_RCTL_RDMTS_1_2 | | |
786 | IXGB_RCTL_RXEN | IXGB_RCTL_CFF | | |
787 | (adapter->hw.mc_filter_type << IXGB_RCTL_MO_SHIFT); | |
788 | ||
789 | rctl |= IXGB_RCTL_SECRC; | |
790 | ||
791 | switch (adapter->rx_buffer_len) { | |
792 | case IXGB_RXBUFFER_2048: | |
793 | default: | |
794 | rctl |= IXGB_RCTL_BSIZE_2048; | |
795 | break; | |
796 | case IXGB_RXBUFFER_4096: | |
797 | rctl |= IXGB_RCTL_BSIZE_4096; | |
798 | break; | |
799 | case IXGB_RXBUFFER_8192: | |
800 | rctl |= IXGB_RCTL_BSIZE_8192; | |
801 | break; | |
802 | case IXGB_RXBUFFER_16384: | |
803 | rctl |= IXGB_RCTL_BSIZE_16384; | |
804 | break; | |
805 | } | |
806 | ||
807 | IXGB_WRITE_REG(&adapter->hw, RCTL, rctl); | |
808 | } | |
809 | ||
810 | /** | |
811 | * ixgb_configure_rx - Configure 82597 Receive Unit after Reset. | |
812 | * @adapter: board private structure | |
813 | * | |
814 | * Configure the Rx unit of the MAC after a reset. | |
815 | **/ | |
816 | ||
817 | static void | |
818 | ixgb_configure_rx(struct ixgb_adapter *adapter) | |
819 | { | |
820 | uint64_t rdba = adapter->rx_ring.dma; | |
821 | uint32_t rdlen = adapter->rx_ring.count * sizeof(struct ixgb_rx_desc); | |
822 | struct ixgb_hw *hw = &adapter->hw; | |
823 | uint32_t rctl; | |
824 | uint32_t rxcsum; | |
825 | uint32_t rxdctl; | |
826 | ||
827 | /* make sure receives are disabled while setting up the descriptors */ | |
828 | ||
829 | rctl = IXGB_READ_REG(hw, RCTL); | |
830 | IXGB_WRITE_REG(hw, RCTL, rctl & ~IXGB_RCTL_RXEN); | |
831 | ||
832 | /* set the Receive Delay Timer Register */ | |
833 | ||
834 | IXGB_WRITE_REG(hw, RDTR, adapter->rx_int_delay); | |
835 | ||
836 | /* Setup the Base and Length of the Rx Descriptor Ring */ | |
837 | ||
838 | IXGB_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL)); | |
839 | IXGB_WRITE_REG(hw, RDBAH, (rdba >> 32)); | |
840 | ||
841 | IXGB_WRITE_REG(hw, RDLEN, rdlen); | |
842 | ||
843 | /* Setup the HW Rx Head and Tail Descriptor Pointers */ | |
844 | IXGB_WRITE_REG(hw, RDH, 0); | |
845 | IXGB_WRITE_REG(hw, RDT, 0); | |
846 | ||
847 | /* set up pre-fetching of receive buffers so we get some before we | |
848 | * run out (default hardware behavior is to run out before fetching | |
849 | * more). This sets up to fetch if HTHRESH rx descriptors are avail | |
850 | * and the descriptors in hw cache are below PTHRESH. This avoids | |
851 | * the hardware behavior of fetching <=512 descriptors in a single | |
852 | * burst that pre-empts all other activity, usually causing fifo | |
853 | * overflows. */ | |
854 | /* use WTHRESH to burst write 16 descriptors or burst when RXT0 */ | |
855 | rxdctl = RXDCTL_WTHRESH_DEFAULT << IXGB_RXDCTL_WTHRESH_SHIFT | | |
856 | RXDCTL_HTHRESH_DEFAULT << IXGB_RXDCTL_HTHRESH_SHIFT | | |
857 | RXDCTL_PTHRESH_DEFAULT << IXGB_RXDCTL_PTHRESH_SHIFT; | |
858 | IXGB_WRITE_REG(hw, RXDCTL, rxdctl); | |
859 | ||
860 | /* Enable Receive Checksum Offload for TCP and UDP */ | |
861 | if(adapter->rx_csum == TRUE) { | |
862 | rxcsum = IXGB_READ_REG(hw, RXCSUM); | |
863 | rxcsum |= IXGB_RXCSUM_TUOFL; | |
864 | IXGB_WRITE_REG(hw, RXCSUM, rxcsum); | |
865 | } | |
866 | ||
867 | /* Enable Receives */ | |
868 | ||
869 | IXGB_WRITE_REG(hw, RCTL, rctl); | |
870 | } | |
871 | ||
872 | /** | |
873 | * ixgb_free_tx_resources - Free Tx Resources | |
874 | * @adapter: board private structure | |
875 | * | |
876 | * Free all transmit software resources | |
877 | **/ | |
878 | ||
879 | void | |
880 | ixgb_free_tx_resources(struct ixgb_adapter *adapter) | |
881 | { | |
882 | struct pci_dev *pdev = adapter->pdev; | |
883 | ||
884 | ixgb_clean_tx_ring(adapter); | |
885 | ||
886 | vfree(adapter->tx_ring.buffer_info); | |
887 | adapter->tx_ring.buffer_info = NULL; | |
888 | ||
889 | pci_free_consistent(pdev, adapter->tx_ring.size, | |
890 | adapter->tx_ring.desc, adapter->tx_ring.dma); | |
891 | ||
892 | adapter->tx_ring.desc = NULL; | |
893 | } | |
894 | ||
895 | static inline void | |
896 | ixgb_unmap_and_free_tx_resource(struct ixgb_adapter *adapter, | |
897 | struct ixgb_buffer *buffer_info) | |
898 | { | |
899 | struct pci_dev *pdev = adapter->pdev; | |
900 | if(buffer_info->dma) { | |
901 | pci_unmap_page(pdev, | |
902 | buffer_info->dma, | |
903 | buffer_info->length, | |
904 | PCI_DMA_TODEVICE); | |
905 | buffer_info->dma = 0; | |
906 | } | |
907 | if(buffer_info->skb) { | |
908 | dev_kfree_skb_any(buffer_info->skb); | |
909 | buffer_info->skb = NULL; | |
910 | } | |
911 | } | |
912 | ||
913 | /** | |
914 | * ixgb_clean_tx_ring - Free Tx Buffers | |
915 | * @adapter: board private structure | |
916 | **/ | |
917 | ||
918 | static void | |
919 | ixgb_clean_tx_ring(struct ixgb_adapter *adapter) | |
920 | { | |
921 | struct ixgb_desc_ring *tx_ring = &adapter->tx_ring; | |
922 | struct ixgb_buffer *buffer_info; | |
923 | unsigned long size; | |
924 | unsigned int i; | |
925 | ||
926 | /* Free all the Tx ring sk_buffs */ | |
927 | ||
928 | for(i = 0; i < tx_ring->count; i++) { | |
929 | buffer_info = &tx_ring->buffer_info[i]; | |
930 | ixgb_unmap_and_free_tx_resource(adapter, buffer_info); | |
931 | } | |
932 | ||
933 | size = sizeof(struct ixgb_buffer) * tx_ring->count; | |
934 | memset(tx_ring->buffer_info, 0, size); | |
935 | ||
936 | /* Zero out the descriptor ring */ | |
937 | ||
938 | memset(tx_ring->desc, 0, tx_ring->size); | |
939 | ||
940 | tx_ring->next_to_use = 0; | |
941 | tx_ring->next_to_clean = 0; | |
942 | ||
943 | IXGB_WRITE_REG(&adapter->hw, TDH, 0); | |
944 | IXGB_WRITE_REG(&adapter->hw, TDT, 0); | |
945 | } | |
946 | ||
947 | /** | |
948 | * ixgb_free_rx_resources - Free Rx Resources | |
949 | * @adapter: board private structure | |
950 | * | |
951 | * Free all receive software resources | |
952 | **/ | |
953 | ||
954 | void | |
955 | ixgb_free_rx_resources(struct ixgb_adapter *adapter) | |
956 | { | |
957 | struct ixgb_desc_ring *rx_ring = &adapter->rx_ring; | |
958 | struct pci_dev *pdev = adapter->pdev; | |
959 | ||
960 | ixgb_clean_rx_ring(adapter); | |
961 | ||
962 | vfree(rx_ring->buffer_info); | |
963 | rx_ring->buffer_info = NULL; | |
964 | ||
965 | pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma); | |
966 | ||
967 | rx_ring->desc = NULL; | |
968 | } | |
969 | ||
970 | /** | |
971 | * ixgb_clean_rx_ring - Free Rx Buffers | |
972 | * @adapter: board private structure | |
973 | **/ | |
974 | ||
975 | static void | |
976 | ixgb_clean_rx_ring(struct ixgb_adapter *adapter) | |
977 | { | |
978 | struct ixgb_desc_ring *rx_ring = &adapter->rx_ring; | |
979 | struct ixgb_buffer *buffer_info; | |
980 | struct pci_dev *pdev = adapter->pdev; | |
981 | unsigned long size; | |
982 | unsigned int i; | |
983 | ||
984 | /* Free all the Rx ring sk_buffs */ | |
985 | ||
986 | for(i = 0; i < rx_ring->count; i++) { | |
987 | buffer_info = &rx_ring->buffer_info[i]; | |
988 | if(buffer_info->skb) { | |
989 | ||
990 | pci_unmap_single(pdev, | |
991 | buffer_info->dma, | |
992 | buffer_info->length, | |
993 | PCI_DMA_FROMDEVICE); | |
994 | ||
995 | dev_kfree_skb(buffer_info->skb); | |
996 | ||
997 | buffer_info->skb = NULL; | |
998 | } | |
999 | } | |
1000 | ||
1001 | size = sizeof(struct ixgb_buffer) * rx_ring->count; | |
1002 | memset(rx_ring->buffer_info, 0, size); | |
1003 | ||
1004 | /* Zero out the descriptor ring */ | |
1005 | ||
1006 | memset(rx_ring->desc, 0, rx_ring->size); | |
1007 | ||
1008 | rx_ring->next_to_clean = 0; | |
1009 | rx_ring->next_to_use = 0; | |
1010 | ||
1011 | IXGB_WRITE_REG(&adapter->hw, RDH, 0); | |
1012 | IXGB_WRITE_REG(&adapter->hw, RDT, 0); | |
1013 | } | |
1014 | ||
1015 | /** | |
1016 | * ixgb_set_mac - Change the Ethernet Address of the NIC | |
1017 | * @netdev: network interface device structure | |
1018 | * @p: pointer to an address structure | |
1019 | * | |
1020 | * Returns 0 on success, negative on failure | |
1021 | **/ | |
1022 | ||
1023 | static int | |
1024 | ixgb_set_mac(struct net_device *netdev, void *p) | |
1025 | { | |
8908c6cd | 1026 | struct ixgb_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
1027 | struct sockaddr *addr = p; |
1028 | ||
1029 | if(!is_valid_ether_addr(addr->sa_data)) | |
1030 | return -EADDRNOTAVAIL; | |
1031 | ||
1032 | memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); | |
1033 | ||
1034 | ixgb_rar_set(&adapter->hw, addr->sa_data, 0); | |
1035 | ||
1036 | return 0; | |
1037 | } | |
1038 | ||
1039 | /** | |
1040 | * ixgb_set_multi - Multicast and Promiscuous mode set | |
1041 | * @netdev: network interface device structure | |
1042 | * | |
1043 | * The set_multi entry point is called whenever the multicast address | |
1044 | * list or the network interface flags are updated. This routine is | |
1045 | * responsible for configuring the hardware for proper multicast, | |
1046 | * promiscuous mode, and all-multi behavior. | |
1047 | **/ | |
1048 | ||
1049 | static void | |
1050 | ixgb_set_multi(struct net_device *netdev) | |
1051 | { | |
8908c6cd | 1052 | struct ixgb_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
1053 | struct ixgb_hw *hw = &adapter->hw; |
1054 | struct dev_mc_list *mc_ptr; | |
1055 | uint32_t rctl; | |
1056 | int i; | |
1057 | ||
1058 | /* Check for Promiscuous and All Multicast modes */ | |
1059 | ||
1060 | rctl = IXGB_READ_REG(hw, RCTL); | |
1061 | ||
1062 | if(netdev->flags & IFF_PROMISC) { | |
1063 | rctl |= (IXGB_RCTL_UPE | IXGB_RCTL_MPE); | |
1064 | } else if(netdev->flags & IFF_ALLMULTI) { | |
1065 | rctl |= IXGB_RCTL_MPE; | |
1066 | rctl &= ~IXGB_RCTL_UPE; | |
1067 | } else { | |
1068 | rctl &= ~(IXGB_RCTL_UPE | IXGB_RCTL_MPE); | |
1069 | } | |
1070 | ||
1071 | if(netdev->mc_count > IXGB_MAX_NUM_MULTICAST_ADDRESSES) { | |
1072 | rctl |= IXGB_RCTL_MPE; | |
1073 | IXGB_WRITE_REG(hw, RCTL, rctl); | |
1074 | } else { | |
1075 | uint8_t mta[netdev->mc_count * IXGB_ETH_LENGTH_OF_ADDRESS]; | |
1076 | ||
1077 | IXGB_WRITE_REG(hw, RCTL, rctl); | |
1078 | ||
1079 | for(i = 0, mc_ptr = netdev->mc_list; mc_ptr; | |
1080 | i++, mc_ptr = mc_ptr->next) | |
1081 | memcpy(&mta[i * IXGB_ETH_LENGTH_OF_ADDRESS], | |
1082 | mc_ptr->dmi_addr, IXGB_ETH_LENGTH_OF_ADDRESS); | |
1083 | ||
1084 | ixgb_mc_addr_list_update(hw, mta, netdev->mc_count, 0); | |
1085 | } | |
1086 | } | |
1087 | ||
1088 | /** | |
1089 | * ixgb_watchdog - Timer Call-back | |
1090 | * @data: pointer to netdev cast into an unsigned long | |
1091 | **/ | |
1092 | ||
1093 | static void | |
1094 | ixgb_watchdog(unsigned long data) | |
1095 | { | |
1096 | struct ixgb_adapter *adapter = (struct ixgb_adapter *)data; | |
1097 | struct net_device *netdev = adapter->netdev; | |
1098 | struct ixgb_desc_ring *txdr = &adapter->tx_ring; | |
1099 | ||
1100 | ixgb_check_for_link(&adapter->hw); | |
1101 | ||
1102 | if (ixgb_check_for_bad_link(&adapter->hw)) { | |
1103 | /* force the reset path */ | |
1104 | netif_stop_queue(netdev); | |
1105 | } | |
1106 | ||
1107 | if(adapter->hw.link_up) { | |
1108 | if(!netif_carrier_ok(netdev)) { | |
1109 | printk(KERN_INFO "ixgb: %s NIC Link is Up %d Mbps %s\n", | |
1110 | netdev->name, 10000, "Full Duplex"); | |
1111 | adapter->link_speed = 10000; | |
1112 | adapter->link_duplex = FULL_DUPLEX; | |
1113 | netif_carrier_on(netdev); | |
1114 | netif_wake_queue(netdev); | |
1115 | } | |
1116 | } else { | |
1117 | if(netif_carrier_ok(netdev)) { | |
1118 | adapter->link_speed = 0; | |
1119 | adapter->link_duplex = 0; | |
1120 | printk(KERN_INFO | |
1121 | "ixgb: %s NIC Link is Down\n", | |
1122 | netdev->name); | |
1123 | netif_carrier_off(netdev); | |
1124 | netif_stop_queue(netdev); | |
1125 | ||
1126 | } | |
1127 | } | |
1128 | ||
1129 | ixgb_update_stats(adapter); | |
1130 | ||
1131 | if(!netif_carrier_ok(netdev)) { | |
1132 | if(IXGB_DESC_UNUSED(txdr) + 1 < txdr->count) { | |
1133 | /* We've lost link, so the controller stops DMA, | |
1134 | * but we've got queued Tx work that's never going | |
1135 | * to get done, so reset controller to flush Tx. | |
1136 | * (Do the reset outside of interrupt context). */ | |
1137 | schedule_work(&adapter->tx_timeout_task); | |
1138 | } | |
1139 | } | |
1140 | ||
1141 | /* Force detection of hung controller every watchdog period */ | |
1142 | adapter->detect_tx_hung = TRUE; | |
1143 | ||
1144 | /* generate an interrupt to force clean up of any stragglers */ | |
1145 | IXGB_WRITE_REG(&adapter->hw, ICS, IXGB_INT_TXDW); | |
1146 | ||
1147 | /* Reset the timer */ | |
1148 | mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ); | |
1149 | } | |
1150 | ||
1151 | #define IXGB_TX_FLAGS_CSUM 0x00000001 | |
1152 | #define IXGB_TX_FLAGS_VLAN 0x00000002 | |
1153 | #define IXGB_TX_FLAGS_TSO 0x00000004 | |
1154 | ||
1155 | static inline int | |
1156 | ixgb_tso(struct ixgb_adapter *adapter, struct sk_buff *skb) | |
1157 | { | |
1158 | #ifdef NETIF_F_TSO | |
1159 | struct ixgb_context_desc *context_desc; | |
1160 | unsigned int i; | |
1161 | uint8_t ipcss, ipcso, tucss, tucso, hdr_len; | |
1162 | uint16_t ipcse, tucse, mss; | |
1163 | int err; | |
1164 | ||
1165 | if(likely(skb_shinfo(skb)->tso_size)) { | |
1166 | if (skb_header_cloned(skb)) { | |
1167 | err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC); | |
1168 | if (err) | |
1169 | return err; | |
1170 | } | |
1171 | ||
1172 | hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2)); | |
1173 | mss = skb_shinfo(skb)->tso_size; | |
1174 | skb->nh.iph->tot_len = 0; | |
1175 | skb->nh.iph->check = 0; | |
1176 | skb->h.th->check = ~csum_tcpudp_magic(skb->nh.iph->saddr, | |
1177 | skb->nh.iph->daddr, | |
1178 | 0, IPPROTO_TCP, 0); | |
1179 | ipcss = skb->nh.raw - skb->data; | |
1180 | ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data; | |
1181 | ipcse = skb->h.raw - skb->data - 1; | |
1182 | tucss = skb->h.raw - skb->data; | |
1183 | tucso = (void *)&(skb->h.th->check) - (void *)skb->data; | |
1184 | tucse = 0; | |
1185 | ||
1186 | i = adapter->tx_ring.next_to_use; | |
1187 | context_desc = IXGB_CONTEXT_DESC(adapter->tx_ring, i); | |
1188 | ||
1189 | context_desc->ipcss = ipcss; | |
1190 | context_desc->ipcso = ipcso; | |
1191 | context_desc->ipcse = cpu_to_le16(ipcse); | |
1192 | context_desc->tucss = tucss; | |
1193 | context_desc->tucso = tucso; | |
1194 | context_desc->tucse = cpu_to_le16(tucse); | |
1195 | context_desc->mss = cpu_to_le16(mss); | |
1196 | context_desc->hdr_len = hdr_len; | |
1197 | context_desc->status = 0; | |
1198 | context_desc->cmd_type_len = cpu_to_le32( | |
1199 | IXGB_CONTEXT_DESC_TYPE | |
1200 | | IXGB_CONTEXT_DESC_CMD_TSE | |
1201 | | IXGB_CONTEXT_DESC_CMD_IP | |
1202 | | IXGB_CONTEXT_DESC_CMD_TCP | |
1da177e4 LT |
1203 | | IXGB_CONTEXT_DESC_CMD_IDE |
1204 | | (skb->len - (hdr_len))); | |
1205 | ||
06c2f9ec | 1206 | |
1da177e4 LT |
1207 | if(++i == adapter->tx_ring.count) i = 0; |
1208 | adapter->tx_ring.next_to_use = i; | |
1209 | ||
1210 | return 1; | |
1211 | } | |
1212 | #endif | |
1213 | ||
1214 | return 0; | |
1215 | } | |
1216 | ||
1217 | static inline boolean_t | |
1218 | ixgb_tx_csum(struct ixgb_adapter *adapter, struct sk_buff *skb) | |
1219 | { | |
1220 | struct ixgb_context_desc *context_desc; | |
1221 | unsigned int i; | |
1222 | uint8_t css, cso; | |
1223 | ||
1224 | if(likely(skb->ip_summed == CHECKSUM_HW)) { | |
1225 | css = skb->h.raw - skb->data; | |
1226 | cso = (skb->h.raw + skb->csum) - skb->data; | |
1227 | ||
1228 | i = adapter->tx_ring.next_to_use; | |
1229 | context_desc = IXGB_CONTEXT_DESC(adapter->tx_ring, i); | |
1230 | ||
1231 | context_desc->tucss = css; | |
1232 | context_desc->tucso = cso; | |
1233 | context_desc->tucse = 0; | |
1234 | /* zero out any previously existing data in one instruction */ | |
1235 | *(uint32_t *)&(context_desc->ipcss) = 0; | |
1236 | context_desc->status = 0; | |
1237 | context_desc->hdr_len = 0; | |
1238 | context_desc->mss = 0; | |
1239 | context_desc->cmd_type_len = | |
1240 | cpu_to_le32(IXGB_CONTEXT_DESC_TYPE | |
06c2f9ec | 1241 | | IXGB_TX_DESC_CMD_IDE); |
1da177e4 LT |
1242 | |
1243 | if(++i == adapter->tx_ring.count) i = 0; | |
1244 | adapter->tx_ring.next_to_use = i; | |
1245 | ||
1246 | return TRUE; | |
1247 | } | |
1248 | ||
1249 | return FALSE; | |
1250 | } | |
1251 | ||
1252 | #define IXGB_MAX_TXD_PWR 14 | |
1253 | #define IXGB_MAX_DATA_PER_TXD (1<<IXGB_MAX_TXD_PWR) | |
1254 | ||
1255 | static inline int | |
1256 | ixgb_tx_map(struct ixgb_adapter *adapter, struct sk_buff *skb, | |
1257 | unsigned int first) | |
1258 | { | |
1259 | struct ixgb_desc_ring *tx_ring = &adapter->tx_ring; | |
1260 | struct ixgb_buffer *buffer_info; | |
1261 | int len = skb->len; | |
1262 | unsigned int offset = 0, size, count = 0, i; | |
1263 | ||
1264 | unsigned int nr_frags = skb_shinfo(skb)->nr_frags; | |
1265 | unsigned int f; | |
ac79c82e | 1266 | |
1da177e4 LT |
1267 | len -= skb->data_len; |
1268 | ||
1269 | i = tx_ring->next_to_use; | |
1270 | ||
1271 | while(len) { | |
1272 | buffer_info = &tx_ring->buffer_info[i]; | |
1273 | size = min(len, IXGB_MAX_JUMBO_FRAME_SIZE); | |
1274 | buffer_info->length = size; | |
1275 | buffer_info->dma = | |
1276 | pci_map_single(adapter->pdev, | |
1277 | skb->data + offset, | |
1278 | size, | |
1279 | PCI_DMA_TODEVICE); | |
1280 | buffer_info->time_stamp = jiffies; | |
1281 | ||
1282 | len -= size; | |
1283 | offset += size; | |
1284 | count++; | |
1285 | if(++i == tx_ring->count) i = 0; | |
1286 | } | |
1287 | ||
1288 | for(f = 0; f < nr_frags; f++) { | |
1289 | struct skb_frag_struct *frag; | |
1290 | ||
1291 | frag = &skb_shinfo(skb)->frags[f]; | |
1292 | len = frag->size; | |
1293 | offset = 0; | |
1294 | ||
1295 | while(len) { | |
1296 | buffer_info = &tx_ring->buffer_info[i]; | |
1297 | size = min(len, IXGB_MAX_JUMBO_FRAME_SIZE); | |
1298 | buffer_info->length = size; | |
1299 | buffer_info->dma = | |
1300 | pci_map_page(adapter->pdev, | |
1301 | frag->page, | |
1302 | frag->page_offset + offset, | |
1303 | size, | |
1304 | PCI_DMA_TODEVICE); | |
1305 | buffer_info->time_stamp = jiffies; | |
1306 | ||
1307 | len -= size; | |
1308 | offset += size; | |
1309 | count++; | |
1310 | if(++i == tx_ring->count) i = 0; | |
1311 | } | |
1312 | } | |
1313 | i = (i == 0) ? tx_ring->count - 1 : i - 1; | |
1314 | tx_ring->buffer_info[i].skb = skb; | |
1315 | tx_ring->buffer_info[first].next_to_watch = i; | |
1316 | ||
1317 | return count; | |
1318 | } | |
1319 | ||
1320 | static inline void | |
1321 | ixgb_tx_queue(struct ixgb_adapter *adapter, int count, int vlan_id,int tx_flags) | |
1322 | { | |
1323 | struct ixgb_desc_ring *tx_ring = &adapter->tx_ring; | |
1324 | struct ixgb_tx_desc *tx_desc = NULL; | |
1325 | struct ixgb_buffer *buffer_info; | |
1326 | uint32_t cmd_type_len = adapter->tx_cmd_type; | |
1327 | uint8_t status = 0; | |
1328 | uint8_t popts = 0; | |
1329 | unsigned int i; | |
1330 | ||
1331 | if(tx_flags & IXGB_TX_FLAGS_TSO) { | |
1332 | cmd_type_len |= IXGB_TX_DESC_CMD_TSE; | |
1333 | popts |= (IXGB_TX_DESC_POPTS_IXSM | IXGB_TX_DESC_POPTS_TXSM); | |
1334 | } | |
1335 | ||
1336 | if(tx_flags & IXGB_TX_FLAGS_CSUM) | |
1337 | popts |= IXGB_TX_DESC_POPTS_TXSM; | |
1338 | ||
1339 | if(tx_flags & IXGB_TX_FLAGS_VLAN) { | |
1340 | cmd_type_len |= IXGB_TX_DESC_CMD_VLE; | |
1341 | } | |
1342 | ||
1343 | i = tx_ring->next_to_use; | |
1344 | ||
1345 | while(count--) { | |
1346 | buffer_info = &tx_ring->buffer_info[i]; | |
1347 | tx_desc = IXGB_TX_DESC(*tx_ring, i); | |
1348 | tx_desc->buff_addr = cpu_to_le64(buffer_info->dma); | |
1349 | tx_desc->cmd_type_len = | |
1350 | cpu_to_le32(cmd_type_len | buffer_info->length); | |
1351 | tx_desc->status = status; | |
1352 | tx_desc->popts = popts; | |
1353 | tx_desc->vlan = cpu_to_le16(vlan_id); | |
1354 | ||
1355 | if(++i == tx_ring->count) i = 0; | |
1356 | } | |
1357 | ||
1358 | tx_desc->cmd_type_len |= cpu_to_le32(IXGB_TX_DESC_CMD_EOP | |
1359 | | IXGB_TX_DESC_CMD_RS ); | |
1360 | ||
1361 | /* Force memory writes to complete before letting h/w | |
1362 | * know there are new descriptors to fetch. (Only | |
1363 | * applicable for weak-ordered memory model archs, | |
1364 | * such as IA-64). */ | |
1365 | wmb(); | |
1366 | ||
1367 | tx_ring->next_to_use = i; | |
1368 | IXGB_WRITE_REG(&adapter->hw, TDT, i); | |
1369 | } | |
1370 | ||
1371 | /* Tx Descriptors needed, worst case */ | |
1372 | #define TXD_USE_COUNT(S) (((S) >> IXGB_MAX_TXD_PWR) + \ | |
1373 | (((S) & (IXGB_MAX_DATA_PER_TXD - 1)) ? 1 : 0)) | |
1374 | #define DESC_NEEDED TXD_USE_COUNT(IXGB_MAX_DATA_PER_TXD) + \ | |
1375 | MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1 | |
1376 | ||
1377 | static int | |
1378 | ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev) | |
1379 | { | |
8908c6cd | 1380 | struct ixgb_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
1381 | unsigned int first; |
1382 | unsigned int tx_flags = 0; | |
1383 | unsigned long flags; | |
1384 | int vlan_id = 0; | |
1385 | int tso; | |
1386 | ||
1387 | if(skb->len <= 0) { | |
1388 | dev_kfree_skb_any(skb); | |
1389 | return 0; | |
1390 | } | |
1391 | ||
1392 | spin_lock_irqsave(&adapter->tx_lock, flags); | |
1393 | if(unlikely(IXGB_DESC_UNUSED(&adapter->tx_ring) < DESC_NEEDED)) { | |
1394 | netif_stop_queue(netdev); | |
1395 | spin_unlock_irqrestore(&adapter->tx_lock, flags); | |
1396 | return 1; | |
1397 | } | |
1398 | spin_unlock_irqrestore(&adapter->tx_lock, flags); | |
1399 | ||
1400 | if(adapter->vlgrp && vlan_tx_tag_present(skb)) { | |
1401 | tx_flags |= IXGB_TX_FLAGS_VLAN; | |
1402 | vlan_id = vlan_tx_tag_get(skb); | |
1403 | } | |
1404 | ||
1405 | first = adapter->tx_ring.next_to_use; | |
1406 | ||
1407 | tso = ixgb_tso(adapter, skb); | |
1408 | if (tso < 0) { | |
1409 | dev_kfree_skb_any(skb); | |
1410 | return NETDEV_TX_OK; | |
1411 | } | |
1412 | ||
1413 | if (tso) | |
1414 | tx_flags |= IXGB_TX_FLAGS_TSO; | |
1415 | else if(ixgb_tx_csum(adapter, skb)) | |
1416 | tx_flags |= IXGB_TX_FLAGS_CSUM; | |
1417 | ||
1418 | ixgb_tx_queue(adapter, ixgb_tx_map(adapter, skb, first), vlan_id, | |
1419 | tx_flags); | |
1420 | ||
1421 | netdev->trans_start = jiffies; | |
1422 | ||
1423 | return 0; | |
1424 | } | |
1425 | ||
1426 | /** | |
1427 | * ixgb_tx_timeout - Respond to a Tx Hang | |
1428 | * @netdev: network interface device structure | |
1429 | **/ | |
1430 | ||
1431 | static void | |
1432 | ixgb_tx_timeout(struct net_device *netdev) | |
1433 | { | |
8908c6cd | 1434 | struct ixgb_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
1435 | |
1436 | /* Do the reset outside of interrupt context */ | |
1437 | schedule_work(&adapter->tx_timeout_task); | |
1438 | } | |
1439 | ||
1440 | static void | |
1441 | ixgb_tx_timeout_task(struct net_device *netdev) | |
1442 | { | |
8908c6cd | 1443 | struct ixgb_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
1444 | |
1445 | ixgb_down(adapter, TRUE); | |
1446 | ixgb_up(adapter); | |
1447 | } | |
1448 | ||
1449 | /** | |
1450 | * ixgb_get_stats - Get System Network Statistics | |
1451 | * @netdev: network interface device structure | |
1452 | * | |
1453 | * Returns the address of the device statistics structure. | |
1454 | * The statistics are actually updated from the timer callback. | |
1455 | **/ | |
1456 | ||
1457 | static struct net_device_stats * | |
1458 | ixgb_get_stats(struct net_device *netdev) | |
1459 | { | |
8908c6cd | 1460 | struct ixgb_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
1461 | |
1462 | return &adapter->net_stats; | |
1463 | } | |
1464 | ||
1465 | /** | |
1466 | * ixgb_change_mtu - Change the Maximum Transfer Unit | |
1467 | * @netdev: network interface device structure | |
1468 | * @new_mtu: new value for maximum frame size | |
1469 | * | |
1470 | * Returns 0 on success, negative on failure | |
1471 | **/ | |
1472 | ||
1473 | static int | |
1474 | ixgb_change_mtu(struct net_device *netdev, int new_mtu) | |
1475 | { | |
8908c6cd | 1476 | struct ixgb_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
1477 | int max_frame = new_mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH; |
1478 | int old_max_frame = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH; | |
1479 | ||
1480 | ||
1481 | if((max_frame < IXGB_MIN_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH) | |
1482 | || (max_frame > IXGB_MAX_JUMBO_FRAME_SIZE + ENET_FCS_LENGTH)) { | |
1483 | IXGB_ERR("Invalid MTU setting\n"); | |
1484 | return -EINVAL; | |
1485 | } | |
1486 | ||
1487 | if((max_frame <= IXGB_MAX_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH) | |
1488 | || (max_frame <= IXGB_RXBUFFER_2048)) { | |
1489 | adapter->rx_buffer_len = IXGB_RXBUFFER_2048; | |
1490 | ||
1491 | } else if(max_frame <= IXGB_RXBUFFER_4096) { | |
1492 | adapter->rx_buffer_len = IXGB_RXBUFFER_4096; | |
1493 | ||
1494 | } else if(max_frame <= IXGB_RXBUFFER_8192) { | |
1495 | adapter->rx_buffer_len = IXGB_RXBUFFER_8192; | |
1496 | ||
1497 | } else { | |
1498 | adapter->rx_buffer_len = IXGB_RXBUFFER_16384; | |
1499 | } | |
1500 | ||
1501 | netdev->mtu = new_mtu; | |
1502 | ||
1503 | if(old_max_frame != max_frame && netif_running(netdev)) { | |
1504 | ||
1505 | ixgb_down(adapter, TRUE); | |
1506 | ixgb_up(adapter); | |
1507 | } | |
1508 | ||
1509 | return 0; | |
1510 | } | |
1511 | ||
1512 | /** | |
1513 | * ixgb_update_stats - Update the board statistics counters. | |
1514 | * @adapter: board private structure | |
1515 | **/ | |
1516 | ||
1517 | void | |
1518 | ixgb_update_stats(struct ixgb_adapter *adapter) | |
1519 | { | |
5633684d MC |
1520 | struct net_device *netdev = adapter->netdev; |
1521 | ||
1522 | if((netdev->flags & IFF_PROMISC) || (netdev->flags & IFF_ALLMULTI) || | |
1523 | (netdev->mc_count > IXGB_MAX_NUM_MULTICAST_ADDRESSES)) { | |
1524 | u64 multi = IXGB_READ_REG(&adapter->hw, MPRCL); | |
1525 | u32 bcast_l = IXGB_READ_REG(&adapter->hw, BPRCL); | |
1526 | u32 bcast_h = IXGB_READ_REG(&adapter->hw, BPRCH); | |
1527 | u64 bcast = ((u64)bcast_h << 32) | bcast_l; | |
1528 | ||
1529 | multi |= ((u64)IXGB_READ_REG(&adapter->hw, MPRCH) << 32); | |
1530 | /* fix up multicast stats by removing broadcasts */ | |
7b89178d MC |
1531 | if(multi >= bcast) |
1532 | multi -= bcast; | |
5633684d MC |
1533 | |
1534 | adapter->stats.mprcl += (multi & 0xFFFFFFFF); | |
1535 | adapter->stats.mprch += (multi >> 32); | |
1536 | adapter->stats.bprcl += bcast_l; | |
1537 | adapter->stats.bprch += bcast_h; | |
1538 | } else { | |
1539 | adapter->stats.mprcl += IXGB_READ_REG(&adapter->hw, MPRCL); | |
1540 | adapter->stats.mprch += IXGB_READ_REG(&adapter->hw, MPRCH); | |
1541 | adapter->stats.bprcl += IXGB_READ_REG(&adapter->hw, BPRCL); | |
1542 | adapter->stats.bprch += IXGB_READ_REG(&adapter->hw, BPRCH); | |
1543 | } | |
1da177e4 LT |
1544 | adapter->stats.tprl += IXGB_READ_REG(&adapter->hw, TPRL); |
1545 | adapter->stats.tprh += IXGB_READ_REG(&adapter->hw, TPRH); | |
1546 | adapter->stats.gprcl += IXGB_READ_REG(&adapter->hw, GPRCL); | |
1547 | adapter->stats.gprch += IXGB_READ_REG(&adapter->hw, GPRCH); | |
1da177e4 LT |
1548 | adapter->stats.uprcl += IXGB_READ_REG(&adapter->hw, UPRCL); |
1549 | adapter->stats.uprch += IXGB_READ_REG(&adapter->hw, UPRCH); | |
1550 | adapter->stats.vprcl += IXGB_READ_REG(&adapter->hw, VPRCL); | |
1551 | adapter->stats.vprch += IXGB_READ_REG(&adapter->hw, VPRCH); | |
1552 | adapter->stats.jprcl += IXGB_READ_REG(&adapter->hw, JPRCL); | |
1553 | adapter->stats.jprch += IXGB_READ_REG(&adapter->hw, JPRCH); | |
1554 | adapter->stats.gorcl += IXGB_READ_REG(&adapter->hw, GORCL); | |
1555 | adapter->stats.gorch += IXGB_READ_REG(&adapter->hw, GORCH); | |
1556 | adapter->stats.torl += IXGB_READ_REG(&adapter->hw, TORL); | |
1557 | adapter->stats.torh += IXGB_READ_REG(&adapter->hw, TORH); | |
1558 | adapter->stats.rnbc += IXGB_READ_REG(&adapter->hw, RNBC); | |
1559 | adapter->stats.ruc += IXGB_READ_REG(&adapter->hw, RUC); | |
1560 | adapter->stats.roc += IXGB_READ_REG(&adapter->hw, ROC); | |
1561 | adapter->stats.rlec += IXGB_READ_REG(&adapter->hw, RLEC); | |
1562 | adapter->stats.crcerrs += IXGB_READ_REG(&adapter->hw, CRCERRS); | |
1563 | adapter->stats.icbc += IXGB_READ_REG(&adapter->hw, ICBC); | |
1564 | adapter->stats.ecbc += IXGB_READ_REG(&adapter->hw, ECBC); | |
1565 | adapter->stats.mpc += IXGB_READ_REG(&adapter->hw, MPC); | |
1566 | adapter->stats.tptl += IXGB_READ_REG(&adapter->hw, TPTL); | |
1567 | adapter->stats.tpth += IXGB_READ_REG(&adapter->hw, TPTH); | |
1568 | adapter->stats.gptcl += IXGB_READ_REG(&adapter->hw, GPTCL); | |
1569 | adapter->stats.gptch += IXGB_READ_REG(&adapter->hw, GPTCH); | |
1570 | adapter->stats.bptcl += IXGB_READ_REG(&adapter->hw, BPTCL); | |
1571 | adapter->stats.bptch += IXGB_READ_REG(&adapter->hw, BPTCH); | |
1572 | adapter->stats.mptcl += IXGB_READ_REG(&adapter->hw, MPTCL); | |
1573 | adapter->stats.mptch += IXGB_READ_REG(&adapter->hw, MPTCH); | |
1574 | adapter->stats.uptcl += IXGB_READ_REG(&adapter->hw, UPTCL); | |
1575 | adapter->stats.uptch += IXGB_READ_REG(&adapter->hw, UPTCH); | |
1576 | adapter->stats.vptcl += IXGB_READ_REG(&adapter->hw, VPTCL); | |
1577 | adapter->stats.vptch += IXGB_READ_REG(&adapter->hw, VPTCH); | |
1578 | adapter->stats.jptcl += IXGB_READ_REG(&adapter->hw, JPTCL); | |
1579 | adapter->stats.jptch += IXGB_READ_REG(&adapter->hw, JPTCH); | |
1580 | adapter->stats.gotcl += IXGB_READ_REG(&adapter->hw, GOTCL); | |
1581 | adapter->stats.gotch += IXGB_READ_REG(&adapter->hw, GOTCH); | |
1582 | adapter->stats.totl += IXGB_READ_REG(&adapter->hw, TOTL); | |
1583 | adapter->stats.toth += IXGB_READ_REG(&adapter->hw, TOTH); | |
1584 | adapter->stats.dc += IXGB_READ_REG(&adapter->hw, DC); | |
1585 | adapter->stats.plt64c += IXGB_READ_REG(&adapter->hw, PLT64C); | |
1586 | adapter->stats.tsctc += IXGB_READ_REG(&adapter->hw, TSCTC); | |
1587 | adapter->stats.tsctfc += IXGB_READ_REG(&adapter->hw, TSCTFC); | |
1588 | adapter->stats.ibic += IXGB_READ_REG(&adapter->hw, IBIC); | |
1589 | adapter->stats.rfc += IXGB_READ_REG(&adapter->hw, RFC); | |
1590 | adapter->stats.lfc += IXGB_READ_REG(&adapter->hw, LFC); | |
1591 | adapter->stats.pfrc += IXGB_READ_REG(&adapter->hw, PFRC); | |
1592 | adapter->stats.pftc += IXGB_READ_REG(&adapter->hw, PFTC); | |
1593 | adapter->stats.mcfrc += IXGB_READ_REG(&adapter->hw, MCFRC); | |
1594 | adapter->stats.mcftc += IXGB_READ_REG(&adapter->hw, MCFTC); | |
1595 | adapter->stats.xonrxc += IXGB_READ_REG(&adapter->hw, XONRXC); | |
1596 | adapter->stats.xontxc += IXGB_READ_REG(&adapter->hw, XONTXC); | |
1597 | adapter->stats.xoffrxc += IXGB_READ_REG(&adapter->hw, XOFFRXC); | |
1598 | adapter->stats.xofftxc += IXGB_READ_REG(&adapter->hw, XOFFTXC); | |
1599 | adapter->stats.rjc += IXGB_READ_REG(&adapter->hw, RJC); | |
1600 | ||
1601 | /* Fill out the OS statistics structure */ | |
1602 | ||
1603 | adapter->net_stats.rx_packets = adapter->stats.gprcl; | |
1604 | adapter->net_stats.tx_packets = adapter->stats.gptcl; | |
1605 | adapter->net_stats.rx_bytes = adapter->stats.gorcl; | |
1606 | adapter->net_stats.tx_bytes = adapter->stats.gotcl; | |
1607 | adapter->net_stats.multicast = adapter->stats.mprcl; | |
1608 | adapter->net_stats.collisions = 0; | |
1609 | ||
1610 | /* ignore RLEC as it reports errors for padded (<64bytes) frames | |
1611 | * with a length in the type/len field */ | |
1612 | adapter->net_stats.rx_errors = | |
1613 | /* adapter->stats.rnbc + */ adapter->stats.crcerrs + | |
1614 | adapter->stats.ruc + | |
1615 | adapter->stats.roc /*+ adapter->stats.rlec */ + | |
1616 | adapter->stats.icbc + | |
1617 | adapter->stats.ecbc + adapter->stats.mpc; | |
1618 | ||
1da177e4 LT |
1619 | /* see above |
1620 | * adapter->net_stats.rx_length_errors = adapter->stats.rlec; | |
1621 | */ | |
1622 | ||
1623 | adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs; | |
1624 | adapter->net_stats.rx_fifo_errors = adapter->stats.mpc; | |
1625 | adapter->net_stats.rx_missed_errors = adapter->stats.mpc; | |
1626 | adapter->net_stats.rx_over_errors = adapter->stats.mpc; | |
1627 | ||
1628 | adapter->net_stats.tx_errors = 0; | |
1629 | adapter->net_stats.rx_frame_errors = 0; | |
1630 | adapter->net_stats.tx_aborted_errors = 0; | |
1631 | adapter->net_stats.tx_carrier_errors = 0; | |
1632 | adapter->net_stats.tx_fifo_errors = 0; | |
1633 | adapter->net_stats.tx_heartbeat_errors = 0; | |
1634 | adapter->net_stats.tx_window_errors = 0; | |
1635 | } | |
1636 | ||
1637 | #define IXGB_MAX_INTR 10 | |
1638 | /** | |
1639 | * ixgb_intr - Interrupt Handler | |
1640 | * @irq: interrupt number | |
1641 | * @data: pointer to a network interface device structure | |
1642 | * @pt_regs: CPU registers structure | |
1643 | **/ | |
1644 | ||
1645 | static irqreturn_t | |
1646 | ixgb_intr(int irq, void *data, struct pt_regs *regs) | |
1647 | { | |
1648 | struct net_device *netdev = data; | |
8908c6cd | 1649 | struct ixgb_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
1650 | struct ixgb_hw *hw = &adapter->hw; |
1651 | uint32_t icr = IXGB_READ_REG(hw, ICR); | |
1652 | #ifndef CONFIG_IXGB_NAPI | |
1653 | unsigned int i; | |
1654 | #endif | |
1655 | ||
1656 | if(unlikely(!icr)) | |
1657 | return IRQ_NONE; /* Not our interrupt */ | |
1658 | ||
1659 | if(unlikely(icr & (IXGB_INT_RXSEQ | IXGB_INT_LSC))) { | |
1660 | mod_timer(&adapter->watchdog_timer, jiffies); | |
1661 | } | |
1662 | ||
1663 | #ifdef CONFIG_IXGB_NAPI | |
1664 | if(netif_rx_schedule_prep(netdev)) { | |
1665 | ||
1666 | /* Disable interrupts and register for poll. The flush | |
1667 | of the posted write is intentionally left out. | |
1668 | */ | |
1669 | ||
1670 | atomic_inc(&adapter->irq_sem); | |
1671 | IXGB_WRITE_REG(&adapter->hw, IMC, ~0); | |
1672 | __netif_rx_schedule(netdev); | |
1673 | } | |
1674 | #else | |
1675 | /* yes, that is actually a & and it is meant to make sure that | |
1676 | * every pass through this for loop checks both receive and | |
1677 | * transmit queues for completed descriptors, intended to | |
1678 | * avoid starvation issues and assist tx/rx fairness. */ | |
1679 | for(i = 0; i < IXGB_MAX_INTR; i++) | |
1680 | if(!ixgb_clean_rx_irq(adapter) & | |
1681 | !ixgb_clean_tx_irq(adapter)) | |
1682 | break; | |
1683 | #endif | |
1684 | return IRQ_HANDLED; | |
1685 | } | |
1686 | ||
1687 | #ifdef CONFIG_IXGB_NAPI | |
1688 | /** | |
1689 | * ixgb_clean - NAPI Rx polling callback | |
1690 | * @adapter: board private structure | |
1691 | **/ | |
1692 | ||
1693 | static int | |
1694 | ixgb_clean(struct net_device *netdev, int *budget) | |
1695 | { | |
8908c6cd | 1696 | struct ixgb_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
1697 | int work_to_do = min(*budget, netdev->quota); |
1698 | int tx_cleaned; | |
1699 | int work_done = 0; | |
1700 | ||
1701 | tx_cleaned = ixgb_clean_tx_irq(adapter); | |
1702 | ixgb_clean_rx_irq(adapter, &work_done, work_to_do); | |
1703 | ||
1704 | *budget -= work_done; | |
1705 | netdev->quota -= work_done; | |
1706 | ||
1707 | /* if no Tx and not enough Rx work done, exit the polling mode */ | |
1708 | if((!tx_cleaned && (work_done == 0)) || !netif_running(netdev)) { | |
1709 | netif_rx_complete(netdev); | |
1710 | ixgb_irq_enable(adapter); | |
1711 | return 0; | |
1712 | } | |
1713 | ||
1714 | return 1; | |
1715 | } | |
1716 | #endif | |
1717 | ||
1718 | /** | |
1719 | * ixgb_clean_tx_irq - Reclaim resources after transmit completes | |
1720 | * @adapter: board private structure | |
1721 | **/ | |
1722 | ||
1723 | static boolean_t | |
1724 | ixgb_clean_tx_irq(struct ixgb_adapter *adapter) | |
1725 | { | |
1726 | struct ixgb_desc_ring *tx_ring = &adapter->tx_ring; | |
1727 | struct net_device *netdev = adapter->netdev; | |
1728 | struct ixgb_tx_desc *tx_desc, *eop_desc; | |
1729 | struct ixgb_buffer *buffer_info; | |
1730 | unsigned int i, eop; | |
1731 | boolean_t cleaned = FALSE; | |
1732 | ||
1733 | i = tx_ring->next_to_clean; | |
1734 | eop = tx_ring->buffer_info[i].next_to_watch; | |
1735 | eop_desc = IXGB_TX_DESC(*tx_ring, eop); | |
1736 | ||
1737 | while(eop_desc->status & IXGB_TX_DESC_STATUS_DD) { | |
1738 | ||
1739 | for(cleaned = FALSE; !cleaned; ) { | |
1740 | tx_desc = IXGB_TX_DESC(*tx_ring, i); | |
1741 | buffer_info = &tx_ring->buffer_info[i]; | |
1742 | ||
1743 | if (tx_desc->popts | |
1744 | & (IXGB_TX_DESC_POPTS_TXSM | | |
1745 | IXGB_TX_DESC_POPTS_IXSM)) | |
1746 | adapter->hw_csum_tx_good++; | |
1747 | ||
1748 | ixgb_unmap_and_free_tx_resource(adapter, buffer_info); | |
1749 | ||
1750 | *(uint32_t *)&(tx_desc->status) = 0; | |
1751 | ||
1752 | cleaned = (i == eop); | |
1753 | if(++i == tx_ring->count) i = 0; | |
1754 | } | |
1755 | ||
1756 | eop = tx_ring->buffer_info[i].next_to_watch; | |
1757 | eop_desc = IXGB_TX_DESC(*tx_ring, eop); | |
1758 | } | |
1759 | ||
1760 | tx_ring->next_to_clean = i; | |
1761 | ||
1762 | spin_lock(&adapter->tx_lock); | |
1763 | if(cleaned && netif_queue_stopped(netdev) && netif_carrier_ok(netdev) && | |
1764 | (IXGB_DESC_UNUSED(tx_ring) > IXGB_TX_QUEUE_WAKE)) { | |
1765 | ||
1766 | netif_wake_queue(netdev); | |
1767 | } | |
1768 | spin_unlock(&adapter->tx_lock); | |
1769 | ||
1770 | if(adapter->detect_tx_hung) { | |
1771 | /* detect a transmit hang in hardware, this serializes the | |
1772 | * check with the clearing of time_stamp and movement of i */ | |
1773 | adapter->detect_tx_hung = FALSE; | |
1774 | if(tx_ring->buffer_info[i].dma && | |
1775 | time_after(jiffies, tx_ring->buffer_info[i].time_stamp + HZ) | |
1776 | && !(IXGB_READ_REG(&adapter->hw, STATUS) & | |
1777 | IXGB_STATUS_TXOFF)) | |
1778 | netif_stop_queue(netdev); | |
1779 | } | |
1780 | ||
1781 | return cleaned; | |
1782 | } | |
1783 | ||
1784 | /** | |
1785 | * ixgb_rx_checksum - Receive Checksum Offload for 82597. | |
1786 | * @adapter: board private structure | |
1787 | * @rx_desc: receive descriptor | |
1788 | * @sk_buff: socket buffer with received data | |
1789 | **/ | |
1790 | ||
1791 | static inline void | |
1792 | ixgb_rx_checksum(struct ixgb_adapter *adapter, | |
1793 | struct ixgb_rx_desc *rx_desc, | |
1794 | struct sk_buff *skb) | |
1795 | { | |
1796 | /* Ignore Checksum bit is set OR | |
1797 | * TCP Checksum has not been calculated | |
1798 | */ | |
1799 | if((rx_desc->status & IXGB_RX_DESC_STATUS_IXSM) || | |
1800 | (!(rx_desc->status & IXGB_RX_DESC_STATUS_TCPCS))) { | |
1801 | skb->ip_summed = CHECKSUM_NONE; | |
1802 | return; | |
1803 | } | |
1804 | ||
1805 | /* At this point we know the hardware did the TCP checksum */ | |
1806 | /* now look at the TCP checksum error bit */ | |
1807 | if(rx_desc->errors & IXGB_RX_DESC_ERRORS_TCPE) { | |
1808 | /* let the stack verify checksum errors */ | |
1809 | skb->ip_summed = CHECKSUM_NONE; | |
1810 | adapter->hw_csum_rx_error++; | |
1811 | } else { | |
1812 | /* TCP checksum is good */ | |
1813 | skb->ip_summed = CHECKSUM_UNNECESSARY; | |
1814 | adapter->hw_csum_rx_good++; | |
1815 | } | |
1816 | } | |
1817 | ||
1818 | /** | |
1819 | * ixgb_clean_rx_irq - Send received data up the network stack, | |
1820 | * @adapter: board private structure | |
1821 | **/ | |
1822 | ||
1823 | static boolean_t | |
1824 | #ifdef CONFIG_IXGB_NAPI | |
1825 | ixgb_clean_rx_irq(struct ixgb_adapter *adapter, int *work_done, int work_to_do) | |
1826 | #else | |
1827 | ixgb_clean_rx_irq(struct ixgb_adapter *adapter) | |
1828 | #endif | |
1829 | { | |
1830 | struct ixgb_desc_ring *rx_ring = &adapter->rx_ring; | |
1831 | struct net_device *netdev = adapter->netdev; | |
1832 | struct pci_dev *pdev = adapter->pdev; | |
1833 | struct ixgb_rx_desc *rx_desc, *next_rxd; | |
1834 | struct ixgb_buffer *buffer_info, *next_buffer, *next2_buffer; | |
1da177e4 LT |
1835 | uint32_t length; |
1836 | unsigned int i, j; | |
1837 | boolean_t cleaned = FALSE; | |
1838 | ||
1839 | i = rx_ring->next_to_clean; | |
1840 | rx_desc = IXGB_RX_DESC(*rx_ring, i); | |
1841 | buffer_info = &rx_ring->buffer_info[i]; | |
1842 | ||
1843 | while(rx_desc->status & IXGB_RX_DESC_STATUS_DD) { | |
f404de1c MC |
1844 | struct sk_buff *skb, *next_skb; |
1845 | u8 status; | |
1da177e4 LT |
1846 | |
1847 | #ifdef CONFIG_IXGB_NAPI | |
1848 | if(*work_done >= work_to_do) | |
1849 | break; | |
1850 | ||
1851 | (*work_done)++; | |
1852 | #endif | |
f404de1c | 1853 | status = rx_desc->status; |
1da177e4 | 1854 | skb = buffer_info->skb; |
f404de1c | 1855 | |
1da177e4 LT |
1856 | prefetch(skb->data); |
1857 | ||
1858 | if(++i == rx_ring->count) i = 0; | |
1859 | next_rxd = IXGB_RX_DESC(*rx_ring, i); | |
1860 | prefetch(next_rxd); | |
1861 | ||
1862 | if((j = i + 1) == rx_ring->count) j = 0; | |
1863 | next2_buffer = &rx_ring->buffer_info[j]; | |
1864 | prefetch(next2_buffer); | |
1865 | ||
1866 | next_buffer = &rx_ring->buffer_info[i]; | |
1867 | next_skb = next_buffer->skb; | |
1868 | prefetch(next_skb); | |
1869 | ||
1da177e4 LT |
1870 | cleaned = TRUE; |
1871 | ||
1872 | pci_unmap_single(pdev, | |
1873 | buffer_info->dma, | |
1874 | buffer_info->length, | |
1875 | PCI_DMA_FROMDEVICE); | |
1876 | ||
1877 | length = le16_to_cpu(rx_desc->length); | |
1878 | ||
f404de1c | 1879 | if(unlikely(!(status & IXGB_RX_DESC_STATUS_EOP))) { |
1da177e4 LT |
1880 | |
1881 | /* All receives must fit into a single buffer */ | |
1882 | ||
1883 | IXGB_DBG("Receive packet consumed multiple buffers " | |
1884 | "length<%x>\n", length); | |
1885 | ||
1886 | dev_kfree_skb_irq(skb); | |
f404de1c | 1887 | goto rxdesc_done; |
1da177e4 LT |
1888 | } |
1889 | ||
1890 | if (unlikely(rx_desc->errors | |
1891 | & (IXGB_RX_DESC_ERRORS_CE | IXGB_RX_DESC_ERRORS_SE | |
1892 | | IXGB_RX_DESC_ERRORS_P | | |
1893 | IXGB_RX_DESC_ERRORS_RXE))) { | |
1894 | ||
1895 | dev_kfree_skb_irq(skb); | |
f404de1c | 1896 | goto rxdesc_done; |
1da177e4 LT |
1897 | } |
1898 | ||
1899 | /* Good Receive */ | |
1900 | skb_put(skb, length); | |
1901 | ||
1902 | /* Receive Checksum Offload */ | |
1903 | ixgb_rx_checksum(adapter, rx_desc, skb); | |
1904 | ||
1905 | skb->protocol = eth_type_trans(skb, netdev); | |
1906 | #ifdef CONFIG_IXGB_NAPI | |
f404de1c | 1907 | if(adapter->vlgrp && (status & IXGB_RX_DESC_STATUS_VP)) { |
1da177e4 LT |
1908 | vlan_hwaccel_receive_skb(skb, adapter->vlgrp, |
1909 | le16_to_cpu(rx_desc->special) & | |
1910 | IXGB_RX_DESC_SPECIAL_VLAN_MASK); | |
1911 | } else { | |
1912 | netif_receive_skb(skb); | |
1913 | } | |
1914 | #else /* CONFIG_IXGB_NAPI */ | |
f404de1c | 1915 | if(adapter->vlgrp && (status & IXGB_RX_DESC_STATUS_VP)) { |
1da177e4 LT |
1916 | vlan_hwaccel_rx(skb, adapter->vlgrp, |
1917 | le16_to_cpu(rx_desc->special) & | |
1918 | IXGB_RX_DESC_SPECIAL_VLAN_MASK); | |
1919 | } else { | |
1920 | netif_rx(skb); | |
1921 | } | |
1922 | #endif /* CONFIG_IXGB_NAPI */ | |
1923 | netdev->last_rx = jiffies; | |
1924 | ||
f404de1c MC |
1925 | rxdesc_done: |
1926 | /* clean up descriptor, might be written over by hw */ | |
1da177e4 LT |
1927 | rx_desc->status = 0; |
1928 | buffer_info->skb = NULL; | |
1929 | ||
f404de1c | 1930 | /* use prefetched values */ |
1da177e4 LT |
1931 | rx_desc = next_rxd; |
1932 | buffer_info = next_buffer; | |
1933 | } | |
1934 | ||
1935 | rx_ring->next_to_clean = i; | |
1936 | ||
1937 | ixgb_alloc_rx_buffers(adapter); | |
1938 | ||
1939 | return cleaned; | |
1940 | } | |
1941 | ||
1942 | /** | |
1943 | * ixgb_alloc_rx_buffers - Replace used receive buffers | |
1944 | * @adapter: address of board private structure | |
1945 | **/ | |
1946 | ||
1947 | static void | |
1948 | ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter) | |
1949 | { | |
1950 | struct ixgb_desc_ring *rx_ring = &adapter->rx_ring; | |
1951 | struct net_device *netdev = adapter->netdev; | |
1952 | struct pci_dev *pdev = adapter->pdev; | |
1953 | struct ixgb_rx_desc *rx_desc; | |
1954 | struct ixgb_buffer *buffer_info; | |
1955 | struct sk_buff *skb; | |
1956 | unsigned int i; | |
1957 | int num_group_tail_writes; | |
1958 | long cleancount; | |
1959 | ||
1960 | i = rx_ring->next_to_use; | |
1961 | buffer_info = &rx_ring->buffer_info[i]; | |
1962 | cleancount = IXGB_DESC_UNUSED(rx_ring); | |
1963 | ||
1964 | num_group_tail_writes = IXGB_RX_BUFFER_WRITE; | |
1965 | ||
41639fed MC |
1966 | /* leave three descriptors unused */ |
1967 | while(--cleancount > 2) { | |
1da177e4 LT |
1968 | rx_desc = IXGB_RX_DESC(*rx_ring, i); |
1969 | ||
1970 | skb = dev_alloc_skb(adapter->rx_buffer_len + NET_IP_ALIGN); | |
1971 | ||
1972 | if(unlikely(!skb)) { | |
1973 | /* Better luck next round */ | |
1974 | break; | |
1975 | } | |
1976 | ||
1977 | /* Make buffer alignment 2 beyond a 16 byte boundary | |
1978 | * this will result in a 16 byte aligned IP header after | |
1979 | * the 14 byte MAC header is removed | |
1980 | */ | |
1981 | skb_reserve(skb, NET_IP_ALIGN); | |
1982 | ||
1983 | skb->dev = netdev; | |
1984 | ||
1985 | buffer_info->skb = skb; | |
1986 | buffer_info->length = adapter->rx_buffer_len; | |
1987 | buffer_info->dma = | |
1988 | pci_map_single(pdev, | |
1989 | skb->data, | |
1990 | adapter->rx_buffer_len, | |
1991 | PCI_DMA_FROMDEVICE); | |
1992 | ||
1993 | rx_desc->buff_addr = cpu_to_le64(buffer_info->dma); | |
41639fed MC |
1994 | /* guarantee DD bit not set now before h/w gets descriptor |
1995 | * this is the rest of the workaround for h/w double | |
1996 | * writeback. */ | |
1997 | rx_desc->status = 0; | |
1da177e4 LT |
1998 | |
1999 | if((i & ~(num_group_tail_writes- 1)) == i) { | |
2000 | /* Force memory writes to complete before letting h/w | |
2001 | * know there are new descriptors to fetch. (Only | |
2002 | * applicable for weak-ordered memory model archs, | |
2003 | * such as IA-64). */ | |
2004 | wmb(); | |
2005 | ||
2006 | IXGB_WRITE_REG(&adapter->hw, RDT, i); | |
2007 | } | |
2008 | ||
2009 | if(++i == rx_ring->count) i = 0; | |
2010 | buffer_info = &rx_ring->buffer_info[i]; | |
2011 | } | |
2012 | ||
2013 | rx_ring->next_to_use = i; | |
2014 | } | |
2015 | ||
2016 | /** | |
2017 | * ixgb_vlan_rx_register - enables or disables vlan tagging/stripping. | |
2018 | * | |
2019 | * @param netdev network interface device structure | |
2020 | * @param grp indicates to enable or disable tagging/stripping | |
2021 | **/ | |
2022 | static void | |
2023 | ixgb_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp) | |
2024 | { | |
8908c6cd | 2025 | struct ixgb_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
2026 | uint32_t ctrl, rctl; |
2027 | ||
2028 | ixgb_irq_disable(adapter); | |
2029 | adapter->vlgrp = grp; | |
2030 | ||
2031 | if(grp) { | |
2032 | /* enable VLAN tag insert/strip */ | |
2033 | ctrl = IXGB_READ_REG(&adapter->hw, CTRL0); | |
2034 | ctrl |= IXGB_CTRL0_VME; | |
2035 | IXGB_WRITE_REG(&adapter->hw, CTRL0, ctrl); | |
2036 | ||
2037 | /* enable VLAN receive filtering */ | |
2038 | ||
2039 | rctl = IXGB_READ_REG(&adapter->hw, RCTL); | |
2040 | rctl |= IXGB_RCTL_VFE; | |
2041 | rctl &= ~IXGB_RCTL_CFIEN; | |
2042 | IXGB_WRITE_REG(&adapter->hw, RCTL, rctl); | |
2043 | } else { | |
2044 | /* disable VLAN tag insert/strip */ | |
2045 | ||
2046 | ctrl = IXGB_READ_REG(&adapter->hw, CTRL0); | |
2047 | ctrl &= ~IXGB_CTRL0_VME; | |
2048 | IXGB_WRITE_REG(&adapter->hw, CTRL0, ctrl); | |
2049 | ||
2050 | /* disable VLAN filtering */ | |
2051 | ||
2052 | rctl = IXGB_READ_REG(&adapter->hw, RCTL); | |
2053 | rctl &= ~IXGB_RCTL_VFE; | |
2054 | IXGB_WRITE_REG(&adapter->hw, RCTL, rctl); | |
2055 | } | |
2056 | ||
2057 | ixgb_irq_enable(adapter); | |
2058 | } | |
2059 | ||
2060 | static void | |
2061 | ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid) | |
2062 | { | |
8908c6cd | 2063 | struct ixgb_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
2064 | uint32_t vfta, index; |
2065 | ||
2066 | /* add VID to filter table */ | |
2067 | ||
2068 | index = (vid >> 5) & 0x7F; | |
2069 | vfta = IXGB_READ_REG_ARRAY(&adapter->hw, VFTA, index); | |
2070 | vfta |= (1 << (vid & 0x1F)); | |
2071 | ixgb_write_vfta(&adapter->hw, index, vfta); | |
2072 | } | |
2073 | ||
2074 | static void | |
2075 | ixgb_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid) | |
2076 | { | |
8908c6cd | 2077 | struct ixgb_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
2078 | uint32_t vfta, index; |
2079 | ||
2080 | ixgb_irq_disable(adapter); | |
2081 | ||
2082 | if(adapter->vlgrp) | |
2083 | adapter->vlgrp->vlan_devices[vid] = NULL; | |
2084 | ||
2085 | ixgb_irq_enable(adapter); | |
2086 | ||
2087 | /* remove VID from filter table*/ | |
2088 | ||
2089 | index = (vid >> 5) & 0x7F; | |
2090 | vfta = IXGB_READ_REG_ARRAY(&adapter->hw, VFTA, index); | |
2091 | vfta &= ~(1 << (vid & 0x1F)); | |
2092 | ixgb_write_vfta(&adapter->hw, index, vfta); | |
2093 | } | |
2094 | ||
2095 | static void | |
2096 | ixgb_restore_vlan(struct ixgb_adapter *adapter) | |
2097 | { | |
2098 | ixgb_vlan_rx_register(adapter->netdev, adapter->vlgrp); | |
2099 | ||
2100 | if(adapter->vlgrp) { | |
2101 | uint16_t vid; | |
2102 | for(vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) { | |
2103 | if(!adapter->vlgrp->vlan_devices[vid]) | |
2104 | continue; | |
2105 | ixgb_vlan_rx_add_vid(adapter->netdev, vid); | |
2106 | } | |
2107 | } | |
2108 | } | |
2109 | ||
1da177e4 LT |
2110 | #ifdef CONFIG_NET_POLL_CONTROLLER |
2111 | /* | |
2112 | * Polling 'interrupt' - used by things like netconsole to send skbs | |
2113 | * without having to re-enable interrupts. It's not called while | |
2114 | * the interrupt routine is executing. | |
2115 | */ | |
2116 | ||
2117 | static void ixgb_netpoll(struct net_device *dev) | |
2118 | { | |
2119 | struct ixgb_adapter *adapter = dev->priv; | |
ac79c82e | 2120 | |
1da177e4 LT |
2121 | disable_irq(adapter->pdev->irq); |
2122 | ixgb_intr(adapter->pdev->irq, dev, NULL); | |
2123 | enable_irq(adapter->pdev->irq); | |
2124 | } | |
2125 | #endif | |
2126 | ||
2127 | /* ixgb_main.c */ |