ixgb: make sure jumbos stay enabled after reset
[linux-2.6-block.git] / drivers / net / ixgb / ixgb_main.c
CommitLineData
1da177e4
LT
1/*******************************************************************************
2
0abb6eb1
AK
3 Intel PRO/10GbE Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
1da177e4 13 more details.
0abb6eb1 14
1da177e4 15 You should have received a copy of the GNU General Public License along with
0abb6eb1
AK
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
1da177e4
LT
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
0abb6eb1 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
1da177e4
LT
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "ixgb.h"
30
1da177e4 31char ixgb_driver_name[] = "ixgb";
e9ab1d14 32static char ixgb_driver_string[] = "Intel(R) PRO/10GbE Network Driver";
1da177e4
LT
33
34#ifndef CONFIG_IXGB_NAPI
35#define DRIVERNAPI
36#else
37#define DRIVERNAPI "-NAPI"
38#endif
a3ffab87 39#define DRV_VERSION "1.0.126-k2"DRIVERNAPI
273dc74e
SH
40const char ixgb_driver_version[] = DRV_VERSION;
41static const char ixgb_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
1da177e4
LT
42
43/* ixgb_pci_tbl - PCI Device ID Table
44 *
45 * Wildcard entries (PCI_ANY_ID) should come last
46 * Last entry must be all 0s
47 *
48 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
49 * Class, Class Mask, private data (not used) }
50 */
51static struct pci_device_id ixgb_pci_tbl[] = {
52 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX,
53 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
940829e2
AK
54 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_CX4,
55 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1da177e4
LT
56 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_SR,
57 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
58 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_LR,
59 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
60
61 /* required last entry */
62 {0,}
63};
64
65MODULE_DEVICE_TABLE(pci, ixgb_pci_tbl);
66
67/* Local Function Prototypes */
68
69int ixgb_up(struct ixgb_adapter *adapter);
70void ixgb_down(struct ixgb_adapter *adapter, boolean_t kill_watchdog);
71void ixgb_reset(struct ixgb_adapter *adapter);
72int ixgb_setup_tx_resources(struct ixgb_adapter *adapter);
73int ixgb_setup_rx_resources(struct ixgb_adapter *adapter);
74void ixgb_free_tx_resources(struct ixgb_adapter *adapter);
75void ixgb_free_rx_resources(struct ixgb_adapter *adapter);
76void ixgb_update_stats(struct ixgb_adapter *adapter);
77
78static int ixgb_init_module(void);
79static void ixgb_exit_module(void);
80static int ixgb_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
81static void __devexit ixgb_remove(struct pci_dev *pdev);
82static int ixgb_sw_init(struct ixgb_adapter *adapter);
83static int ixgb_open(struct net_device *netdev);
84static int ixgb_close(struct net_device *netdev);
85static void ixgb_configure_tx(struct ixgb_adapter *adapter);
86static void ixgb_configure_rx(struct ixgb_adapter *adapter);
87static void ixgb_setup_rctl(struct ixgb_adapter *adapter);
88static void ixgb_clean_tx_ring(struct ixgb_adapter *adapter);
89static void ixgb_clean_rx_ring(struct ixgb_adapter *adapter);
90static void ixgb_set_multi(struct net_device *netdev);
91static void ixgb_watchdog(unsigned long data);
92static int ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
93static struct net_device_stats *ixgb_get_stats(struct net_device *netdev);
94static int ixgb_change_mtu(struct net_device *netdev, int new_mtu);
95static int ixgb_set_mac(struct net_device *netdev, void *p);
7d12e780 96static irqreturn_t ixgb_intr(int irq, void *data);
1da177e4 97static boolean_t ixgb_clean_tx_irq(struct ixgb_adapter *adapter);
ac79c82e 98
1da177e4 99#ifdef CONFIG_IXGB_NAPI
bea3348e 100static int ixgb_clean(struct napi_struct *napi, int budget);
1da177e4
LT
101static boolean_t ixgb_clean_rx_irq(struct ixgb_adapter *adapter,
102 int *work_done, int work_to_do);
103#else
104static boolean_t ixgb_clean_rx_irq(struct ixgb_adapter *adapter);
105#endif
106static void ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter);
1da177e4 107static void ixgb_tx_timeout(struct net_device *dev);
c4028958 108static void ixgb_tx_timeout_task(struct work_struct *work);
1da177e4
LT
109static void ixgb_vlan_rx_register(struct net_device *netdev,
110 struct vlan_group *grp);
111static void ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
112static void ixgb_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
113static void ixgb_restore_vlan(struct ixgb_adapter *adapter);
114
1da177e4
LT
115#ifdef CONFIG_NET_POLL_CONTROLLER
116/* for netdump / net console */
117static void ixgb_netpoll(struct net_device *dev);
118#endif
119
01748fbb
LV
120static pci_ers_result_t ixgb_io_error_detected (struct pci_dev *pdev,
121 enum pci_channel_state state);
122static pci_ers_result_t ixgb_io_slot_reset (struct pci_dev *pdev);
123static void ixgb_io_resume (struct pci_dev *pdev);
1da177e4 124
01748fbb
LV
125static struct pci_error_handlers ixgb_err_handler = {
126 .error_detected = ixgb_io_error_detected,
127 .slot_reset = ixgb_io_slot_reset,
128 .resume = ixgb_io_resume,
129};
130
1da177e4 131static struct pci_driver ixgb_driver = {
c2eba932 132 .name = ixgb_driver_name,
1da177e4 133 .id_table = ixgb_pci_tbl,
c2eba932
MC
134 .probe = ixgb_probe,
135 .remove = __devexit_p(ixgb_remove),
01748fbb 136 .err_handler = &ixgb_err_handler
1da177e4
LT
137};
138
139MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
140MODULE_DESCRIPTION("Intel(R) PRO/10GbE Network Driver");
141MODULE_LICENSE("GPL");
01e5abc2 142MODULE_VERSION(DRV_VERSION);
1da177e4 143
ec9c3f5d
AK
144#define DEFAULT_DEBUG_LEVEL_SHIFT 3
145static int debug = DEFAULT_DEBUG_LEVEL_SHIFT;
146module_param(debug, int, 0);
147MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
148
1da177e4 149/* some defines for controlling descriptor fetches in h/w */
3ae84d92
JB
150#define RXDCTL_WTHRESH_DEFAULT 15 /* chip writes back at this many or RXT0 */
151#define RXDCTL_PTHRESH_DEFAULT 0 /* chip considers prefech below
152 * this */
153#define RXDCTL_HTHRESH_DEFAULT 0 /* chip will only prefetch if tail
154 * is pushed this many descriptors
155 * from head */
1da177e4
LT
156
157/**
158 * ixgb_init_module - Driver Registration Routine
159 *
160 * ixgb_init_module is the first routine called when the driver is
161 * loaded. All it does is register with the PCI subsystem.
162 **/
163
164static int __init
165ixgb_init_module(void)
166{
1da177e4
LT
167 printk(KERN_INFO "%s - version %s\n",
168 ixgb_driver_string, ixgb_driver_version);
169
170 printk(KERN_INFO "%s\n", ixgb_copyright);
171
29917620 172 return pci_register_driver(&ixgb_driver);
1da177e4
LT
173}
174
175module_init(ixgb_init_module);
176
177/**
178 * ixgb_exit_module - Driver Exit Cleanup Routine
179 *
180 * ixgb_exit_module is called just before the driver is removed
181 * from memory.
182 **/
183
184static void __exit
185ixgb_exit_module(void)
186{
1da177e4
LT
187 pci_unregister_driver(&ixgb_driver);
188}
189
190module_exit(ixgb_exit_module);
191
192/**
193 * ixgb_irq_disable - Mask off interrupt generation on the NIC
194 * @adapter: board private structure
195 **/
196
235949d1 197static void
1da177e4
LT
198ixgb_irq_disable(struct ixgb_adapter *adapter)
199{
200 atomic_inc(&adapter->irq_sem);
201 IXGB_WRITE_REG(&adapter->hw, IMC, ~0);
202 IXGB_WRITE_FLUSH(&adapter->hw);
203 synchronize_irq(adapter->pdev->irq);
204}
205
206/**
207 * ixgb_irq_enable - Enable default interrupt generation settings
208 * @adapter: board private structure
209 **/
210
235949d1 211static void
1da177e4
LT
212ixgb_irq_enable(struct ixgb_adapter *adapter)
213{
214 if(atomic_dec_and_test(&adapter->irq_sem)) {
215 IXGB_WRITE_REG(&adapter->hw, IMS,
6dfbb6dd
MC
216 IXGB_INT_RXT0 | IXGB_INT_RXDMT0 | IXGB_INT_TXDW |
217 IXGB_INT_LSC);
1da177e4
LT
218 IXGB_WRITE_FLUSH(&adapter->hw);
219 }
220}
221
222int
223ixgb_up(struct ixgb_adapter *adapter)
224{
225 struct net_device *netdev = adapter->netdev;
fb136c07 226 int err, irq_flags = IRQF_SHARED;
1da177e4
LT
227 int max_frame = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
228 struct ixgb_hw *hw = &adapter->hw;
229
230 /* hardware has been reset, we need to reload some things */
231
8556f0d1 232 ixgb_rar_set(hw, netdev->dev_addr, 0);
1da177e4
LT
233 ixgb_set_multi(netdev);
234
235 ixgb_restore_vlan(adapter);
236
237 ixgb_configure_tx(adapter);
238 ixgb_setup_rctl(adapter);
239 ixgb_configure_rx(adapter);
240 ixgb_alloc_rx_buffers(adapter);
241
e59d1696
AK
242 /* disable interrupts and get the hardware into a known state */
243 IXGB_WRITE_REG(&adapter->hw, IMC, 0xffffffff);
244
fb136c07
AK
245 /* only enable MSI if bus is in PCI-X mode */
246 if (IXGB_READ_REG(&adapter->hw, STATUS) & IXGB_STATUS_PCIX_MODE) {
247 err = pci_enable_msi(adapter->pdev);
248 if (!err) {
249 adapter->have_msi = 1;
250 irq_flags = 0;
251 }
1da177e4
LT
252 /* proceed to try to request regular interrupt */
253 }
1da177e4 254
fb136c07
AK
255 err = request_irq(adapter->pdev->irq, &ixgb_intr, irq_flags,
256 netdev->name, netdev);
257 if (err) {
258 if (adapter->have_msi)
259 pci_disable_msi(adapter->pdev);
ec9c3f5d
AK
260 DPRINTK(PROBE, ERR,
261 "Unable to allocate interrupt Error: %d\n", err);
1da177e4 262 return err;
ec9c3f5d 263 }
1da177e4 264
1da177e4
LT
265 if((hw->max_frame_size != max_frame) ||
266 (hw->max_frame_size !=
267 (IXGB_READ_REG(hw, MFS) >> IXGB_MFS_SHIFT))) {
268
269 hw->max_frame_size = max_frame;
270
271 IXGB_WRITE_REG(hw, MFS, hw->max_frame_size << IXGB_MFS_SHIFT);
272
273 if(hw->max_frame_size >
274 IXGB_MAX_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH) {
275 uint32_t ctrl0 = IXGB_READ_REG(hw, CTRL0);
276
277 if(!(ctrl0 & IXGB_CTRL0_JFE)) {
278 ctrl0 |= IXGB_CTRL0_JFE;
279 IXGB_WRITE_REG(hw, CTRL0, ctrl0);
280 }
281 }
282 }
283
284 mod_timer(&adapter->watchdog_timer, jiffies);
1da177e4
LT
285
286#ifdef CONFIG_IXGB_NAPI
bea3348e 287 napi_enable(&adapter->napi);
1da177e4 288#endif
e59d1696
AK
289 ixgb_irq_enable(adapter);
290
1da177e4
LT
291 return 0;
292}
293
294void
295ixgb_down(struct ixgb_adapter *adapter, boolean_t kill_watchdog)
296{
297 struct net_device *netdev = adapter->netdev;
298
299 ixgb_irq_disable(adapter);
300 free_irq(adapter->pdev->irq, netdev);
fb136c07
AK
301
302 if (adapter->have_msi)
1da177e4
LT
303 pci_disable_msi(adapter->pdev);
304
1da177e4
LT
305 if(kill_watchdog)
306 del_timer_sync(&adapter->watchdog_timer);
307#ifdef CONFIG_IXGB_NAPI
bea3348e 308 napi_disable(&adapter->napi);
1da177e4
LT
309#endif
310 adapter->link_speed = 0;
311 adapter->link_duplex = 0;
312 netif_carrier_off(netdev);
313 netif_stop_queue(netdev);
314
315 ixgb_reset(adapter);
316 ixgb_clean_tx_ring(adapter);
317 ixgb_clean_rx_ring(adapter);
318}
319
320void
321ixgb_reset(struct ixgb_adapter *adapter)
322{
3fd7131f 323 struct ixgb_hw *hw = &adapter->hw;
1da177e4 324
3fd7131f
MW
325 ixgb_adapter_stop(hw);
326 if (!ixgb_init_hw(hw))
ec9c3f5d 327 DPRINTK(PROBE, ERR, "ixgb_init_hw failed.\n");
3fd7131f
MW
328
329 /* restore frame size information */
330 IXGB_WRITE_REG(hw, MFS, hw->max_frame_size << IXGB_MFS_SHIFT);
331 if (hw->max_frame_size >
332 IXGB_MAX_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH) {
333 u32 ctrl0 = IXGB_READ_REG(hw, CTRL0);
334 if (!(ctrl0 & IXGB_CTRL0_JFE)) {
335 ctrl0 |= IXGB_CTRL0_JFE;
336 IXGB_WRITE_REG(hw, CTRL0, ctrl0);
337 }
338 }
1da177e4
LT
339}
340
341/**
342 * ixgb_probe - Device Initialization Routine
343 * @pdev: PCI device information struct
344 * @ent: entry in ixgb_pci_tbl
345 *
346 * Returns 0 on success, negative on failure
347 *
348 * ixgb_probe initializes an adapter identified by a pci_dev structure.
349 * The OS initialization, configuring of the adapter private structure,
350 * and a hardware reset occur.
351 **/
352
353static int __devinit
354ixgb_probe(struct pci_dev *pdev,
355 const struct pci_device_id *ent)
356{
357 struct net_device *netdev = NULL;
358 struct ixgb_adapter *adapter;
359 static int cards_found = 0;
360 unsigned long mmio_start;
361 int mmio_len;
362 int pci_using_dac;
363 int i;
364 int err;
365
366 if((err = pci_enable_device(pdev)))
367 return err;
368
c91e468a
AS
369 if(!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
370 !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
1da177e4
LT
371 pci_using_dac = 1;
372 } else {
c91e468a
AS
373 if((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) ||
374 (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
ec9c3f5d
AK
375 printk(KERN_ERR
376 "ixgb: No usable DMA configuration, aborting\n");
c91e468a 377 goto err_dma_mask;
1da177e4
LT
378 }
379 pci_using_dac = 0;
380 }
381
382 if((err = pci_request_regions(pdev, ixgb_driver_name)))
c91e468a 383 goto err_request_regions;
1da177e4
LT
384
385 pci_set_master(pdev);
386
387 netdev = alloc_etherdev(sizeof(struct ixgb_adapter));
388 if(!netdev) {
389 err = -ENOMEM;
390 goto err_alloc_etherdev;
391 }
392
1da177e4
LT
393 SET_NETDEV_DEV(netdev, &pdev->dev);
394
395 pci_set_drvdata(pdev, netdev);
8908c6cd 396 adapter = netdev_priv(netdev);
1da177e4
LT
397 adapter->netdev = netdev;
398 adapter->pdev = pdev;
399 adapter->hw.back = adapter;
ec9c3f5d 400 adapter->msg_enable = netif_msg_init(debug, DEFAULT_DEBUG_LEVEL_SHIFT);
1da177e4
LT
401
402 mmio_start = pci_resource_start(pdev, BAR_0);
403 mmio_len = pci_resource_len(pdev, BAR_0);
404
405 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
406 if(!adapter->hw.hw_addr) {
407 err = -EIO;
408 goto err_ioremap;
409 }
410
411 for(i = BAR_1; i <= BAR_5; i++) {
412 if(pci_resource_len(pdev, i) == 0)
413 continue;
414 if(pci_resource_flags(pdev, i) & IORESOURCE_IO) {
415 adapter->hw.io_base = pci_resource_start(pdev, i);
416 break;
417 }
418 }
419
420 netdev->open = &ixgb_open;
421 netdev->stop = &ixgb_close;
422 netdev->hard_start_xmit = &ixgb_xmit_frame;
423 netdev->get_stats = &ixgb_get_stats;
424 netdev->set_multicast_list = &ixgb_set_multi;
425 netdev->set_mac_address = &ixgb_set_mac;
426 netdev->change_mtu = &ixgb_change_mtu;
427 ixgb_set_ethtool_ops(netdev);
428 netdev->tx_timeout = &ixgb_tx_timeout;
9b8118df 429 netdev->watchdog_timeo = 5 * HZ;
1da177e4 430#ifdef CONFIG_IXGB_NAPI
bea3348e 431 netif_napi_add(netdev, &adapter->napi, ixgb_clean, 64);
1da177e4
LT
432#endif
433 netdev->vlan_rx_register = ixgb_vlan_rx_register;
434 netdev->vlan_rx_add_vid = ixgb_vlan_rx_add_vid;
435 netdev->vlan_rx_kill_vid = ixgb_vlan_rx_kill_vid;
436#ifdef CONFIG_NET_POLL_CONTROLLER
437 netdev->poll_controller = ixgb_netpoll;
438#endif
439
0eb5a34c 440 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1da177e4
LT
441 netdev->mem_start = mmio_start;
442 netdev->mem_end = mmio_start + mmio_len;
443 netdev->base_addr = adapter->hw.io_base;
444
445 adapter->bd_number = cards_found;
446 adapter->link_speed = 0;
447 adapter->link_duplex = 0;
448
449 /* setup the private structure */
450
451 if((err = ixgb_sw_init(adapter)))
452 goto err_sw_init;
453
454 netdev->features = NETIF_F_SG |
455 NETIF_F_HW_CSUM |
456 NETIF_F_HW_VLAN_TX |
457 NETIF_F_HW_VLAN_RX |
458 NETIF_F_HW_VLAN_FILTER;
1da177e4 459 netdev->features |= NETIF_F_TSO;
f017f14b
AK
460#ifdef NETIF_F_LLTX
461 netdev->features |= NETIF_F_LLTX;
462#endif
1da177e4
LT
463
464 if(pci_using_dac)
465 netdev->features |= NETIF_F_HIGHDMA;
466
467 /* make sure the EEPROM is good */
468
469 if(!ixgb_validate_eeprom_checksum(&adapter->hw)) {
ec9c3f5d 470 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
1da177e4
LT
471 err = -EIO;
472 goto err_eeprom;
473 }
474
475 ixgb_get_ee_mac_addr(&adapter->hw, netdev->dev_addr);
df859c51 476 memcpy(netdev->perm_addr, netdev->dev_addr, netdev->addr_len);
1da177e4 477
df859c51 478 if(!is_valid_ether_addr(netdev->perm_addr)) {
ec9c3f5d 479 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
1da177e4
LT
480 err = -EIO;
481 goto err_eeprom;
482 }
483
484 adapter->part_num = ixgb_get_ee_pba_number(&adapter->hw);
485
486 init_timer(&adapter->watchdog_timer);
487 adapter->watchdog_timer.function = &ixgb_watchdog;
488 adapter->watchdog_timer.data = (unsigned long)adapter;
489
c4028958 490 INIT_WORK(&adapter->tx_timeout_task, ixgb_tx_timeout_task);
1da177e4 491
ec9c3f5d 492 strcpy(netdev->name, "eth%d");
1da177e4
LT
493 if((err = register_netdev(netdev)))
494 goto err_register;
495
496 /* we're going to reset, so assume we have no link for now */
497
498 netif_carrier_off(netdev);
499 netif_stop_queue(netdev);
500
ec9c3f5d 501 DPRINTK(PROBE, INFO, "Intel(R) PRO/10GbE Network Connection\n");
1da177e4
LT
502 ixgb_check_options(adapter);
503 /* reset the hardware with the new settings */
504
505 ixgb_reset(adapter);
506
507 cards_found++;
508 return 0;
509
510err_register:
511err_sw_init:
512err_eeprom:
513 iounmap(adapter->hw.hw_addr);
514err_ioremap:
515 free_netdev(netdev);
516err_alloc_etherdev:
517 pci_release_regions(pdev);
c91e468a
AS
518err_request_regions:
519err_dma_mask:
520 pci_disable_device(pdev);
1da177e4
LT
521 return err;
522}
523
524/**
525 * ixgb_remove - Device Removal Routine
526 * @pdev: PCI device information struct
527 *
528 * ixgb_remove is called by the PCI subsystem to alert the driver
529 * that it should release a PCI device. The could be caused by a
530 * Hot-Plug event, or because the driver is going to be removed from
531 * memory.
532 **/
533
534static void __devexit
535ixgb_remove(struct pci_dev *pdev)
536{
537 struct net_device *netdev = pci_get_drvdata(pdev);
8908c6cd 538 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
539
540 unregister_netdev(netdev);
541
542 iounmap(adapter->hw.hw_addr);
543 pci_release_regions(pdev);
544
545 free_netdev(netdev);
546}
547
548/**
549 * ixgb_sw_init - Initialize general software structures (struct ixgb_adapter)
550 * @adapter: board private structure to initialize
551 *
552 * ixgb_sw_init initializes the Adapter private data structure.
553 * Fields are initialized based on PCI device information and
554 * OS network device settings (MTU size).
555 **/
556
557static int __devinit
558ixgb_sw_init(struct ixgb_adapter *adapter)
559{
560 struct ixgb_hw *hw = &adapter->hw;
561 struct net_device *netdev = adapter->netdev;
562 struct pci_dev *pdev = adapter->pdev;
563
564 /* PCI config space info */
565
566 hw->vendor_id = pdev->vendor;
567 hw->device_id = pdev->device;
568 hw->subsystem_vendor_id = pdev->subsystem_vendor;
569 hw->subsystem_id = pdev->subsystem_device;
570
1da177e4 571 hw->max_frame_size = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
3f3dc0dd 572 adapter->rx_buffer_len = hw->max_frame_size;
1da177e4
LT
573
574 if((hw->device_id == IXGB_DEVICE_ID_82597EX)
940829e2
AK
575 || (hw->device_id == IXGB_DEVICE_ID_82597EX_CX4)
576 || (hw->device_id == IXGB_DEVICE_ID_82597EX_LR)
577 || (hw->device_id == IXGB_DEVICE_ID_82597EX_SR))
1da177e4
LT
578 hw->mac_type = ixgb_82597;
579 else {
580 /* should never have loaded on this device */
ec9c3f5d 581 DPRINTK(PROBE, ERR, "unsupported device id\n");
1da177e4
LT
582 }
583
584 /* enable flow control to be programmed */
585 hw->fc.send_xon = 1;
586
587 atomic_set(&adapter->irq_sem, 1);
588 spin_lock_init(&adapter->tx_lock);
589
590 return 0;
591}
592
593/**
594 * ixgb_open - Called when a network interface is made active
595 * @netdev: network interface device structure
596 *
597 * Returns 0 on success, negative value on failure
598 *
599 * The open entry point is called when a network interface is made
600 * active by the system (IFF_UP). At this point all resources needed
601 * for transmit and receive operations are allocated, the interrupt
602 * handler is registered with the OS, the watchdog timer is started,
603 * and the stack is notified that the interface is ready.
604 **/
605
606static int
607ixgb_open(struct net_device *netdev)
608{
8908c6cd 609 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
610 int err;
611
612 /* allocate transmit descriptors */
613
614 if((err = ixgb_setup_tx_resources(adapter)))
615 goto err_setup_tx;
616
617 /* allocate receive descriptors */
618
619 if((err = ixgb_setup_rx_resources(adapter)))
620 goto err_setup_rx;
621
622 if((err = ixgb_up(adapter)))
623 goto err_up;
624
625 return 0;
626
627err_up:
628 ixgb_free_rx_resources(adapter);
629err_setup_rx:
630 ixgb_free_tx_resources(adapter);
631err_setup_tx:
632 ixgb_reset(adapter);
633
634 return err;
635}
636
637/**
638 * ixgb_close - Disables a network interface
639 * @netdev: network interface device structure
640 *
641 * Returns 0, this is not allowed to fail
642 *
643 * The close entry point is called when an interface is de-activated
644 * by the OS. The hardware is still under the drivers control, but
645 * needs to be disabled. A global MAC reset is issued to stop the
646 * hardware, and all transmit and receive resources are freed.
647 **/
648
649static int
650ixgb_close(struct net_device *netdev)
651{
8908c6cd 652 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
653
654 ixgb_down(adapter, TRUE);
655
656 ixgb_free_tx_resources(adapter);
657 ixgb_free_rx_resources(adapter);
658
659 return 0;
660}
661
662/**
663 * ixgb_setup_tx_resources - allocate Tx resources (Descriptors)
664 * @adapter: board private structure
665 *
666 * Return 0 on success, negative on failure
667 **/
668
669int
670ixgb_setup_tx_resources(struct ixgb_adapter *adapter)
671{
672 struct ixgb_desc_ring *txdr = &adapter->tx_ring;
673 struct pci_dev *pdev = adapter->pdev;
674 int size;
675
676 size = sizeof(struct ixgb_buffer) * txdr->count;
677 txdr->buffer_info = vmalloc(size);
678 if(!txdr->buffer_info) {
ec9c3f5d
AK
679 DPRINTK(PROBE, ERR,
680 "Unable to allocate transmit descriptor ring memory\n");
1da177e4
LT
681 return -ENOMEM;
682 }
683 memset(txdr->buffer_info, 0, size);
684
685 /* round up to nearest 4K */
686
687 txdr->size = txdr->count * sizeof(struct ixgb_tx_desc);
55e924cf 688 txdr->size = ALIGN(txdr->size, 4096);
1da177e4
LT
689
690 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
691 if(!txdr->desc) {
692 vfree(txdr->buffer_info);
ec9c3f5d
AK
693 DPRINTK(PROBE, ERR,
694 "Unable to allocate transmit descriptor memory\n");
1da177e4
LT
695 return -ENOMEM;
696 }
697 memset(txdr->desc, 0, txdr->size);
698
699 txdr->next_to_use = 0;
700 txdr->next_to_clean = 0;
701
702 return 0;
703}
704
705/**
706 * ixgb_configure_tx - Configure 82597 Transmit Unit after Reset.
707 * @adapter: board private structure
708 *
709 * Configure the Tx unit of the MAC after a reset.
710 **/
711
712static void
713ixgb_configure_tx(struct ixgb_adapter *adapter)
714{
715 uint64_t tdba = adapter->tx_ring.dma;
716 uint32_t tdlen = adapter->tx_ring.count * sizeof(struct ixgb_tx_desc);
717 uint32_t tctl;
718 struct ixgb_hw *hw = &adapter->hw;
719
720 /* Setup the Base and Length of the Tx Descriptor Ring
721 * tx_ring.dma can be either a 32 or 64 bit value
722 */
723
724 IXGB_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
725 IXGB_WRITE_REG(hw, TDBAH, (tdba >> 32));
726
727 IXGB_WRITE_REG(hw, TDLEN, tdlen);
728
729 /* Setup the HW Tx Head and Tail descriptor pointers */
730
731 IXGB_WRITE_REG(hw, TDH, 0);
732 IXGB_WRITE_REG(hw, TDT, 0);
733
734 /* don't set up txdctl, it induces performance problems if configured
735 * incorrectly */
736 /* Set the Tx Interrupt Delay register */
737
738 IXGB_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
739
740 /* Program the Transmit Control Register */
741
742 tctl = IXGB_TCTL_TCE | IXGB_TCTL_TXEN | IXGB_TCTL_TPDE;
743 IXGB_WRITE_REG(hw, TCTL, tctl);
744
745 /* Setup Transmit Descriptor Settings for this adapter */
746 adapter->tx_cmd_type =
747 IXGB_TX_DESC_TYPE
748 | (adapter->tx_int_delay_enable ? IXGB_TX_DESC_CMD_IDE : 0);
749}
750
751/**
752 * ixgb_setup_rx_resources - allocate Rx resources (Descriptors)
753 * @adapter: board private structure
754 *
755 * Returns 0 on success, negative on failure
756 **/
757
758int
759ixgb_setup_rx_resources(struct ixgb_adapter *adapter)
760{
761 struct ixgb_desc_ring *rxdr = &adapter->rx_ring;
762 struct pci_dev *pdev = adapter->pdev;
763 int size;
764
765 size = sizeof(struct ixgb_buffer) * rxdr->count;
766 rxdr->buffer_info = vmalloc(size);
767 if(!rxdr->buffer_info) {
ec9c3f5d
AK
768 DPRINTK(PROBE, ERR,
769 "Unable to allocate receive descriptor ring\n");
1da177e4
LT
770 return -ENOMEM;
771 }
772 memset(rxdr->buffer_info, 0, size);
773
774 /* Round up to nearest 4K */
775
776 rxdr->size = rxdr->count * sizeof(struct ixgb_rx_desc);
55e924cf 777 rxdr->size = ALIGN(rxdr->size, 4096);
1da177e4
LT
778
779 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
780
781 if(!rxdr->desc) {
782 vfree(rxdr->buffer_info);
ec9c3f5d
AK
783 DPRINTK(PROBE, ERR,
784 "Unable to allocate receive descriptors\n");
1da177e4
LT
785 return -ENOMEM;
786 }
787 memset(rxdr->desc, 0, rxdr->size);
788
789 rxdr->next_to_clean = 0;
790 rxdr->next_to_use = 0;
791
792 return 0;
793}
794
795/**
796 * ixgb_setup_rctl - configure the receive control register
797 * @adapter: Board private structure
798 **/
799
800static void
801ixgb_setup_rctl(struct ixgb_adapter *adapter)
802{
803 uint32_t rctl;
804
805 rctl = IXGB_READ_REG(&adapter->hw, RCTL);
806
807 rctl &= ~(3 << IXGB_RCTL_MO_SHIFT);
808
809 rctl |=
810 IXGB_RCTL_BAM | IXGB_RCTL_RDMTS_1_2 |
811 IXGB_RCTL_RXEN | IXGB_RCTL_CFF |
812 (adapter->hw.mc_filter_type << IXGB_RCTL_MO_SHIFT);
813
814 rctl |= IXGB_RCTL_SECRC;
815
3f3dc0dd 816 if (adapter->rx_buffer_len <= IXGB_RXBUFFER_2048)
1da177e4 817 rctl |= IXGB_RCTL_BSIZE_2048;
3f3dc0dd 818 else if (adapter->rx_buffer_len <= IXGB_RXBUFFER_4096)
1da177e4 819 rctl |= IXGB_RCTL_BSIZE_4096;
3f3dc0dd 820 else if (adapter->rx_buffer_len <= IXGB_RXBUFFER_8192)
1da177e4 821 rctl |= IXGB_RCTL_BSIZE_8192;
3f3dc0dd 822 else if (adapter->rx_buffer_len <= IXGB_RXBUFFER_16384)
1da177e4 823 rctl |= IXGB_RCTL_BSIZE_16384;
1da177e4
LT
824
825 IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
826}
827
828/**
829 * ixgb_configure_rx - Configure 82597 Receive Unit after Reset.
830 * @adapter: board private structure
831 *
832 * Configure the Rx unit of the MAC after a reset.
833 **/
834
835static void
836ixgb_configure_rx(struct ixgb_adapter *adapter)
837{
838 uint64_t rdba = adapter->rx_ring.dma;
839 uint32_t rdlen = adapter->rx_ring.count * sizeof(struct ixgb_rx_desc);
840 struct ixgb_hw *hw = &adapter->hw;
841 uint32_t rctl;
842 uint32_t rxcsum;
843 uint32_t rxdctl;
844
845 /* make sure receives are disabled while setting up the descriptors */
846
847 rctl = IXGB_READ_REG(hw, RCTL);
848 IXGB_WRITE_REG(hw, RCTL, rctl & ~IXGB_RCTL_RXEN);
849
850 /* set the Receive Delay Timer Register */
851
852 IXGB_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
853
854 /* Setup the Base and Length of the Rx Descriptor Ring */
855
856 IXGB_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
857 IXGB_WRITE_REG(hw, RDBAH, (rdba >> 32));
858
859 IXGB_WRITE_REG(hw, RDLEN, rdlen);
860
861 /* Setup the HW Rx Head and Tail Descriptor Pointers */
862 IXGB_WRITE_REG(hw, RDH, 0);
863 IXGB_WRITE_REG(hw, RDT, 0);
864
865 /* set up pre-fetching of receive buffers so we get some before we
866 * run out (default hardware behavior is to run out before fetching
867 * more). This sets up to fetch if HTHRESH rx descriptors are avail
868 * and the descriptors in hw cache are below PTHRESH. This avoids
869 * the hardware behavior of fetching <=512 descriptors in a single
870 * burst that pre-empts all other activity, usually causing fifo
871 * overflows. */
872 /* use WTHRESH to burst write 16 descriptors or burst when RXT0 */
873 rxdctl = RXDCTL_WTHRESH_DEFAULT << IXGB_RXDCTL_WTHRESH_SHIFT |
874 RXDCTL_HTHRESH_DEFAULT << IXGB_RXDCTL_HTHRESH_SHIFT |
875 RXDCTL_PTHRESH_DEFAULT << IXGB_RXDCTL_PTHRESH_SHIFT;
876 IXGB_WRITE_REG(hw, RXDCTL, rxdctl);
877
878 /* Enable Receive Checksum Offload for TCP and UDP */
879 if(adapter->rx_csum == TRUE) {
880 rxcsum = IXGB_READ_REG(hw, RXCSUM);
881 rxcsum |= IXGB_RXCSUM_TUOFL;
882 IXGB_WRITE_REG(hw, RXCSUM, rxcsum);
883 }
884
885 /* Enable Receives */
886
887 IXGB_WRITE_REG(hw, RCTL, rctl);
888}
889
890/**
891 * ixgb_free_tx_resources - Free Tx Resources
892 * @adapter: board private structure
893 *
894 * Free all transmit software resources
895 **/
896
897void
898ixgb_free_tx_resources(struct ixgb_adapter *adapter)
899{
900 struct pci_dev *pdev = adapter->pdev;
901
902 ixgb_clean_tx_ring(adapter);
903
904 vfree(adapter->tx_ring.buffer_info);
905 adapter->tx_ring.buffer_info = NULL;
906
907 pci_free_consistent(pdev, adapter->tx_ring.size,
908 adapter->tx_ring.desc, adapter->tx_ring.dma);
909
910 adapter->tx_ring.desc = NULL;
911}
912
235949d1 913static void
1da177e4
LT
914ixgb_unmap_and_free_tx_resource(struct ixgb_adapter *adapter,
915 struct ixgb_buffer *buffer_info)
916{
917 struct pci_dev *pdev = adapter->pdev;
1dfdd7df
AK
918
919 if (buffer_info->dma)
920 pci_unmap_page(pdev, buffer_info->dma, buffer_info->length,
921 PCI_DMA_TODEVICE);
922
923 if (buffer_info->skb)
1da177e4 924 dev_kfree_skb_any(buffer_info->skb);
1dfdd7df
AK
925
926 buffer_info->skb = NULL;
927 buffer_info->dma = 0;
928 buffer_info->time_stamp = 0;
929 /* these fields must always be initialized in tx
930 * buffer_info->length = 0;
931 * buffer_info->next_to_watch = 0; */
1da177e4
LT
932}
933
934/**
935 * ixgb_clean_tx_ring - Free Tx Buffers
936 * @adapter: board private structure
937 **/
938
939static void
940ixgb_clean_tx_ring(struct ixgb_adapter *adapter)
941{
942 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
943 struct ixgb_buffer *buffer_info;
944 unsigned long size;
945 unsigned int i;
946
947 /* Free all the Tx ring sk_buffs */
948
949 for(i = 0; i < tx_ring->count; i++) {
950 buffer_info = &tx_ring->buffer_info[i];
951 ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
952 }
953
954 size = sizeof(struct ixgb_buffer) * tx_ring->count;
955 memset(tx_ring->buffer_info, 0, size);
956
957 /* Zero out the descriptor ring */
958
959 memset(tx_ring->desc, 0, tx_ring->size);
960
961 tx_ring->next_to_use = 0;
962 tx_ring->next_to_clean = 0;
963
964 IXGB_WRITE_REG(&adapter->hw, TDH, 0);
965 IXGB_WRITE_REG(&adapter->hw, TDT, 0);
966}
967
968/**
969 * ixgb_free_rx_resources - Free Rx Resources
970 * @adapter: board private structure
971 *
972 * Free all receive software resources
973 **/
974
975void
976ixgb_free_rx_resources(struct ixgb_adapter *adapter)
977{
978 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
979 struct pci_dev *pdev = adapter->pdev;
980
981 ixgb_clean_rx_ring(adapter);
982
983 vfree(rx_ring->buffer_info);
984 rx_ring->buffer_info = NULL;
985
986 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
987
988 rx_ring->desc = NULL;
989}
990
991/**
992 * ixgb_clean_rx_ring - Free Rx Buffers
993 * @adapter: board private structure
994 **/
995
996static void
997ixgb_clean_rx_ring(struct ixgb_adapter *adapter)
998{
999 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
1000 struct ixgb_buffer *buffer_info;
1001 struct pci_dev *pdev = adapter->pdev;
1002 unsigned long size;
1003 unsigned int i;
1004
1005 /* Free all the Rx ring sk_buffs */
1006
1007 for(i = 0; i < rx_ring->count; i++) {
1008 buffer_info = &rx_ring->buffer_info[i];
1009 if(buffer_info->skb) {
1010
1011 pci_unmap_single(pdev,
1012 buffer_info->dma,
1013 buffer_info->length,
1014 PCI_DMA_FROMDEVICE);
1015
1016 dev_kfree_skb(buffer_info->skb);
1017
1018 buffer_info->skb = NULL;
1019 }
1020 }
1021
1022 size = sizeof(struct ixgb_buffer) * rx_ring->count;
1023 memset(rx_ring->buffer_info, 0, size);
1024
1025 /* Zero out the descriptor ring */
1026
1027 memset(rx_ring->desc, 0, rx_ring->size);
1028
1029 rx_ring->next_to_clean = 0;
1030 rx_ring->next_to_use = 0;
1031
1032 IXGB_WRITE_REG(&adapter->hw, RDH, 0);
1033 IXGB_WRITE_REG(&adapter->hw, RDT, 0);
1034}
1035
1036/**
1037 * ixgb_set_mac - Change the Ethernet Address of the NIC
1038 * @netdev: network interface device structure
1039 * @p: pointer to an address structure
1040 *
1041 * Returns 0 on success, negative on failure
1042 **/
1043
1044static int
1045ixgb_set_mac(struct net_device *netdev, void *p)
1046{
8908c6cd 1047 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
1048 struct sockaddr *addr = p;
1049
1050 if(!is_valid_ether_addr(addr->sa_data))
1051 return -EADDRNOTAVAIL;
1052
1053 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1054
1055 ixgb_rar_set(&adapter->hw, addr->sa_data, 0);
1056
1057 return 0;
1058}
1059
1060/**
1061 * ixgb_set_multi - Multicast and Promiscuous mode set
1062 * @netdev: network interface device structure
1063 *
1064 * The set_multi entry point is called whenever the multicast address
1065 * list or the network interface flags are updated. This routine is
1066 * responsible for configuring the hardware for proper multicast,
1067 * promiscuous mode, and all-multi behavior.
1068 **/
1069
1070static void
1071ixgb_set_multi(struct net_device *netdev)
1072{
8908c6cd 1073 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
1074 struct ixgb_hw *hw = &adapter->hw;
1075 struct dev_mc_list *mc_ptr;
1076 uint32_t rctl;
1077 int i;
1078
1079 /* Check for Promiscuous and All Multicast modes */
1080
1081 rctl = IXGB_READ_REG(hw, RCTL);
1082
1083 if(netdev->flags & IFF_PROMISC) {
1084 rctl |= (IXGB_RCTL_UPE | IXGB_RCTL_MPE);
1085 } else if(netdev->flags & IFF_ALLMULTI) {
1086 rctl |= IXGB_RCTL_MPE;
1087 rctl &= ~IXGB_RCTL_UPE;
1088 } else {
1089 rctl &= ~(IXGB_RCTL_UPE | IXGB_RCTL_MPE);
1090 }
1091
1092 if(netdev->mc_count > IXGB_MAX_NUM_MULTICAST_ADDRESSES) {
1093 rctl |= IXGB_RCTL_MPE;
1094 IXGB_WRITE_REG(hw, RCTL, rctl);
1095 } else {
273dc74e
SH
1096 uint8_t mta[IXGB_MAX_NUM_MULTICAST_ADDRESSES *
1097 IXGB_ETH_LENGTH_OF_ADDRESS];
1da177e4
LT
1098
1099 IXGB_WRITE_REG(hw, RCTL, rctl);
1100
1101 for(i = 0, mc_ptr = netdev->mc_list; mc_ptr;
1102 i++, mc_ptr = mc_ptr->next)
1103 memcpy(&mta[i * IXGB_ETH_LENGTH_OF_ADDRESS],
1104 mc_ptr->dmi_addr, IXGB_ETH_LENGTH_OF_ADDRESS);
1105
1106 ixgb_mc_addr_list_update(hw, mta, netdev->mc_count, 0);
1107 }
1108}
1109
1110/**
1111 * ixgb_watchdog - Timer Call-back
1112 * @data: pointer to netdev cast into an unsigned long
1113 **/
1114
1115static void
1116ixgb_watchdog(unsigned long data)
1117{
1118 struct ixgb_adapter *adapter = (struct ixgb_adapter *)data;
1119 struct net_device *netdev = adapter->netdev;
1120 struct ixgb_desc_ring *txdr = &adapter->tx_ring;
1121
1122 ixgb_check_for_link(&adapter->hw);
1123
1124 if (ixgb_check_for_bad_link(&adapter->hw)) {
1125 /* force the reset path */
1126 netif_stop_queue(netdev);
1127 }
1128
1129 if(adapter->hw.link_up) {
1130 if(!netif_carrier_ok(netdev)) {
ec9c3f5d
AK
1131 DPRINTK(LINK, INFO,
1132 "NIC Link is Up 10000 Mbps Full Duplex\n");
1da177e4
LT
1133 adapter->link_speed = 10000;
1134 adapter->link_duplex = FULL_DUPLEX;
1135 netif_carrier_on(netdev);
1136 netif_wake_queue(netdev);
1137 }
1138 } else {
1139 if(netif_carrier_ok(netdev)) {
1140 adapter->link_speed = 0;
1141 adapter->link_duplex = 0;
ec9c3f5d 1142 DPRINTK(LINK, INFO, "NIC Link is Down\n");
1da177e4
LT
1143 netif_carrier_off(netdev);
1144 netif_stop_queue(netdev);
1145
1146 }
1147 }
1148
1149 ixgb_update_stats(adapter);
1150
1151 if(!netif_carrier_ok(netdev)) {
1152 if(IXGB_DESC_UNUSED(txdr) + 1 < txdr->count) {
1153 /* We've lost link, so the controller stops DMA,
1154 * but we've got queued Tx work that's never going
1155 * to get done, so reset controller to flush Tx.
1156 * (Do the reset outside of interrupt context). */
1157 schedule_work(&adapter->tx_timeout_task);
1158 }
1159 }
1160
1161 /* Force detection of hung controller every watchdog period */
1162 adapter->detect_tx_hung = TRUE;
1163
1164 /* generate an interrupt to force clean up of any stragglers */
1165 IXGB_WRITE_REG(&adapter->hw, ICS, IXGB_INT_TXDW);
1166
1167 /* Reset the timer */
1168 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
1169}
1170
1171#define IXGB_TX_FLAGS_CSUM 0x00000001
1172#define IXGB_TX_FLAGS_VLAN 0x00000002
1173#define IXGB_TX_FLAGS_TSO 0x00000004
1174
235949d1 1175static int
1da177e4
LT
1176ixgb_tso(struct ixgb_adapter *adapter, struct sk_buff *skb)
1177{
1da177e4
LT
1178 struct ixgb_context_desc *context_desc;
1179 unsigned int i;
1180 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
1181 uint16_t ipcse, tucse, mss;
1182 int err;
1183
89114afd 1184 if (likely(skb_is_gso(skb))) {
adc54139 1185 struct ixgb_buffer *buffer_info;
eddc9ec5
ACM
1186 struct iphdr *iph;
1187
1da177e4
LT
1188 if (skb_header_cloned(skb)) {
1189 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
1190 if (err)
1191 return err;
1192 }
1193
ab6a5bb6 1194 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
7967168c 1195 mss = skb_shinfo(skb)->gso_size;
eddc9ec5
ACM
1196 iph = ip_hdr(skb);
1197 iph->tot_len = 0;
1198 iph->check = 0;
aa8223c7
ACM
1199 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
1200 iph->daddr, 0,
1201 IPPROTO_TCP, 0);
bbe735e4 1202 ipcss = skb_network_offset(skb);
eddc9ec5 1203 ipcso = (void *)&(iph->check) - (void *)skb->data;
ea2ae17d
ACM
1204 ipcse = skb_transport_offset(skb) - 1;
1205 tucss = skb_transport_offset(skb);
aa8223c7 1206 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
1da177e4
LT
1207 tucse = 0;
1208
1209 i = adapter->tx_ring.next_to_use;
1210 context_desc = IXGB_CONTEXT_DESC(adapter->tx_ring, i);
adc54139
JB
1211 buffer_info = &adapter->tx_ring.buffer_info[i];
1212 WARN_ON(buffer_info->dma != 0);
1da177e4
LT
1213
1214 context_desc->ipcss = ipcss;
1215 context_desc->ipcso = ipcso;
1216 context_desc->ipcse = cpu_to_le16(ipcse);
1217 context_desc->tucss = tucss;
1218 context_desc->tucso = tucso;
1219 context_desc->tucse = cpu_to_le16(tucse);
1220 context_desc->mss = cpu_to_le16(mss);
1221 context_desc->hdr_len = hdr_len;
1222 context_desc->status = 0;
1223 context_desc->cmd_type_len = cpu_to_le32(
1224 IXGB_CONTEXT_DESC_TYPE
1225 | IXGB_CONTEXT_DESC_CMD_TSE
1226 | IXGB_CONTEXT_DESC_CMD_IP
1227 | IXGB_CONTEXT_DESC_CMD_TCP
1da177e4
LT
1228 | IXGB_CONTEXT_DESC_CMD_IDE
1229 | (skb->len - (hdr_len)));
1230
06c2f9ec 1231
1da177e4
LT
1232 if(++i == adapter->tx_ring.count) i = 0;
1233 adapter->tx_ring.next_to_use = i;
1234
1235 return 1;
1236 }
1da177e4
LT
1237
1238 return 0;
1239}
1240
235949d1 1241static boolean_t
1da177e4
LT
1242ixgb_tx_csum(struct ixgb_adapter *adapter, struct sk_buff *skb)
1243{
1244 struct ixgb_context_desc *context_desc;
1245 unsigned int i;
1246 uint8_t css, cso;
1247
84fa7933 1248 if(likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
adc54139 1249 struct ixgb_buffer *buffer_info;
ea2ae17d 1250 css = skb_transport_offset(skb);
ff1dcadb 1251 cso = css + skb->csum_offset;
1da177e4
LT
1252
1253 i = adapter->tx_ring.next_to_use;
1254 context_desc = IXGB_CONTEXT_DESC(adapter->tx_ring, i);
adc54139
JB
1255 buffer_info = &adapter->tx_ring.buffer_info[i];
1256 WARN_ON(buffer_info->dma != 0);
1da177e4
LT
1257
1258 context_desc->tucss = css;
1259 context_desc->tucso = cso;
1260 context_desc->tucse = 0;
1261 /* zero out any previously existing data in one instruction */
1262 *(uint32_t *)&(context_desc->ipcss) = 0;
1263 context_desc->status = 0;
1264 context_desc->hdr_len = 0;
1265 context_desc->mss = 0;
1266 context_desc->cmd_type_len =
1267 cpu_to_le32(IXGB_CONTEXT_DESC_TYPE
06c2f9ec 1268 | IXGB_TX_DESC_CMD_IDE);
1da177e4
LT
1269
1270 if(++i == adapter->tx_ring.count) i = 0;
1271 adapter->tx_ring.next_to_use = i;
1272
1273 return TRUE;
1274 }
1275
1276 return FALSE;
1277}
1278
1279#define IXGB_MAX_TXD_PWR 14
1280#define IXGB_MAX_DATA_PER_TXD (1<<IXGB_MAX_TXD_PWR)
1281
235949d1 1282static int
1da177e4
LT
1283ixgb_tx_map(struct ixgb_adapter *adapter, struct sk_buff *skb,
1284 unsigned int first)
1285{
1286 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1287 struct ixgb_buffer *buffer_info;
1288 int len = skb->len;
1289 unsigned int offset = 0, size, count = 0, i;
5d927853 1290 unsigned int mss = skb_shinfo(skb)->gso_size;
1da177e4
LT
1291
1292 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
1293 unsigned int f;
ac79c82e 1294
1da177e4
LT
1295 len -= skb->data_len;
1296
1297 i = tx_ring->next_to_use;
1298
1299 while(len) {
1300 buffer_info = &tx_ring->buffer_info[i];
709cf018 1301 size = min(len, IXGB_MAX_DATA_PER_TXD);
5d927853
JB
1302 /* Workaround for premature desc write-backs
1303 * in TSO mode. Append 4-byte sentinel desc */
1304 if (unlikely(mss && !nr_frags && size == len && size > 8))
1305 size -= 4;
1306
1da177e4 1307 buffer_info->length = size;
adc54139 1308 WARN_ON(buffer_info->dma != 0);
1da177e4
LT
1309 buffer_info->dma =
1310 pci_map_single(adapter->pdev,
1311 skb->data + offset,
1312 size,
1313 PCI_DMA_TODEVICE);
1314 buffer_info->time_stamp = jiffies;
1dfdd7df 1315 buffer_info->next_to_watch = 0;
1da177e4
LT
1316
1317 len -= size;
1318 offset += size;
1319 count++;
1320 if(++i == tx_ring->count) i = 0;
1321 }
1322
1323 for(f = 0; f < nr_frags; f++) {
1324 struct skb_frag_struct *frag;
1325
1326 frag = &skb_shinfo(skb)->frags[f];
1327 len = frag->size;
1328 offset = 0;
1329
1330 while(len) {
1331 buffer_info = &tx_ring->buffer_info[i];
709cf018 1332 size = min(len, IXGB_MAX_DATA_PER_TXD);
5d927853
JB
1333
1334 /* Workaround for premature desc write-backs
1335 * in TSO mode. Append 4-byte sentinel desc */
19abe86d
AK
1336 if (unlikely(mss && (f == (nr_frags - 1))
1337 && size == len && size > 8))
5d927853
JB
1338 size -= 4;
1339
1da177e4
LT
1340 buffer_info->length = size;
1341 buffer_info->dma =
1342 pci_map_page(adapter->pdev,
1343 frag->page,
1344 frag->page_offset + offset,
1345 size,
1346 PCI_DMA_TODEVICE);
1347 buffer_info->time_stamp = jiffies;
1dfdd7df 1348 buffer_info->next_to_watch = 0;
1da177e4
LT
1349
1350 len -= size;
1351 offset += size;
1352 count++;
1353 if(++i == tx_ring->count) i = 0;
1354 }
1355 }
1356 i = (i == 0) ? tx_ring->count - 1 : i - 1;
1357 tx_ring->buffer_info[i].skb = skb;
1358 tx_ring->buffer_info[first].next_to_watch = i;
1359
1360 return count;
1361}
1362
235949d1 1363static void
1da177e4
LT
1364ixgb_tx_queue(struct ixgb_adapter *adapter, int count, int vlan_id,int tx_flags)
1365{
1366 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1367 struct ixgb_tx_desc *tx_desc = NULL;
1368 struct ixgb_buffer *buffer_info;
1369 uint32_t cmd_type_len = adapter->tx_cmd_type;
1370 uint8_t status = 0;
1371 uint8_t popts = 0;
1372 unsigned int i;
1373
1374 if(tx_flags & IXGB_TX_FLAGS_TSO) {
1375 cmd_type_len |= IXGB_TX_DESC_CMD_TSE;
1376 popts |= (IXGB_TX_DESC_POPTS_IXSM | IXGB_TX_DESC_POPTS_TXSM);
1377 }
1378
1379 if(tx_flags & IXGB_TX_FLAGS_CSUM)
1380 popts |= IXGB_TX_DESC_POPTS_TXSM;
1381
1382 if(tx_flags & IXGB_TX_FLAGS_VLAN) {
1383 cmd_type_len |= IXGB_TX_DESC_CMD_VLE;
1384 }
1385
1386 i = tx_ring->next_to_use;
1387
1388 while(count--) {
1389 buffer_info = &tx_ring->buffer_info[i];
1390 tx_desc = IXGB_TX_DESC(*tx_ring, i);
1391 tx_desc->buff_addr = cpu_to_le64(buffer_info->dma);
1392 tx_desc->cmd_type_len =
1393 cpu_to_le32(cmd_type_len | buffer_info->length);
1394 tx_desc->status = status;
1395 tx_desc->popts = popts;
1396 tx_desc->vlan = cpu_to_le16(vlan_id);
1397
1398 if(++i == tx_ring->count) i = 0;
1399 }
1400
1401 tx_desc->cmd_type_len |= cpu_to_le32(IXGB_TX_DESC_CMD_EOP
1402 | IXGB_TX_DESC_CMD_RS );
1403
1404 /* Force memory writes to complete before letting h/w
1405 * know there are new descriptors to fetch. (Only
1406 * applicable for weak-ordered memory model archs,
1407 * such as IA-64). */
1408 wmb();
1409
1410 tx_ring->next_to_use = i;
1411 IXGB_WRITE_REG(&adapter->hw, TDT, i);
1412}
1413
dfd341e4
JB
1414static int __ixgb_maybe_stop_tx(struct net_device *netdev, int size)
1415{
1416 struct ixgb_adapter *adapter = netdev_priv(netdev);
1417 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1418
1419 netif_stop_queue(netdev);
1420 /* Herbert's original patch had:
1421 * smp_mb__after_netif_stop_queue();
1422 * but since that doesn't exist yet, just open code it. */
1423 smp_mb();
1424
1425 /* We need to check again in a case another CPU has just
1426 * made room available. */
1427 if (likely(IXGB_DESC_UNUSED(tx_ring) < size))
1428 return -EBUSY;
1429
1430 /* A reprieve! */
1431 netif_start_queue(netdev);
1432 ++adapter->restart_queue;
1433 return 0;
1434}
1435
1436static int ixgb_maybe_stop_tx(struct net_device *netdev,
1437 struct ixgb_desc_ring *tx_ring, int size)
1438{
1439 if (likely(IXGB_DESC_UNUSED(tx_ring) >= size))
1440 return 0;
1441 return __ixgb_maybe_stop_tx(netdev, size);
1442}
1443
1444
1da177e4
LT
1445/* Tx Descriptors needed, worst case */
1446#define TXD_USE_COUNT(S) (((S) >> IXGB_MAX_TXD_PWR) + \
1447 (((S) & (IXGB_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
5d927853
JB
1448#define DESC_NEEDED TXD_USE_COUNT(IXGB_MAX_DATA_PER_TXD) /* skb->date */ + \
1449 MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1 /* for context */ \
1450 + 1 /* one more needed for sentinel TSO workaround */
1da177e4
LT
1451
1452static int
1453ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
1454{
8908c6cd 1455 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
1456 unsigned int first;
1457 unsigned int tx_flags = 0;
1458 unsigned long flags;
1459 int vlan_id = 0;
1460 int tso;
1461
1462 if(skb->len <= 0) {
1463 dev_kfree_skb_any(skb);
1464 return 0;
1465 }
1466
f017f14b
AK
1467#ifdef NETIF_F_LLTX
1468 local_irq_save(flags);
1469 if (!spin_trylock(&adapter->tx_lock)) {
1470 /* Collision - tell upper layer to requeue */
1471 local_irq_restore(flags);
1472 return NETDEV_TX_LOCKED;
1473 }
1474#else
1da177e4 1475 spin_lock_irqsave(&adapter->tx_lock, flags);
f017f14b
AK
1476#endif
1477
dfd341e4
JB
1478 if (unlikely(ixgb_maybe_stop_tx(netdev, &adapter->tx_ring,
1479 DESC_NEEDED))) {
1da177e4
LT
1480 netif_stop_queue(netdev);
1481 spin_unlock_irqrestore(&adapter->tx_lock, flags);
f017f14b 1482 return NETDEV_TX_BUSY;
1da177e4 1483 }
f017f14b
AK
1484
1485#ifndef NETIF_F_LLTX
1da177e4 1486 spin_unlock_irqrestore(&adapter->tx_lock, flags);
f017f14b 1487#endif
1da177e4
LT
1488
1489 if(adapter->vlgrp && vlan_tx_tag_present(skb)) {
1490 tx_flags |= IXGB_TX_FLAGS_VLAN;
1491 vlan_id = vlan_tx_tag_get(skb);
1492 }
1493
1494 first = adapter->tx_ring.next_to_use;
1495
1496 tso = ixgb_tso(adapter, skb);
1497 if (tso < 0) {
1498 dev_kfree_skb_any(skb);
f017f14b
AK
1499#ifdef NETIF_F_LLTX
1500 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1501#endif
1da177e4
LT
1502 return NETDEV_TX_OK;
1503 }
1504
96f9c2e2 1505 if (likely(tso))
1da177e4
LT
1506 tx_flags |= IXGB_TX_FLAGS_TSO;
1507 else if(ixgb_tx_csum(adapter, skb))
1508 tx_flags |= IXGB_TX_FLAGS_CSUM;
1509
1510 ixgb_tx_queue(adapter, ixgb_tx_map(adapter, skb, first), vlan_id,
1511 tx_flags);
1512
1513 netdev->trans_start = jiffies;
1514
f017f14b
AK
1515#ifdef NETIF_F_LLTX
1516 /* Make sure there is space in the ring for the next send. */
dfd341e4 1517 ixgb_maybe_stop_tx(netdev, &adapter->tx_ring, DESC_NEEDED);
f017f14b
AK
1518
1519 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1520
1521#endif
1522 return NETDEV_TX_OK;
1da177e4
LT
1523}
1524
1525/**
1526 * ixgb_tx_timeout - Respond to a Tx Hang
1527 * @netdev: network interface device structure
1528 **/
1529
1530static void
1531ixgb_tx_timeout(struct net_device *netdev)
1532{
8908c6cd 1533 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
1534
1535 /* Do the reset outside of interrupt context */
1536 schedule_work(&adapter->tx_timeout_task);
1537}
1538
1539static void
c4028958 1540ixgb_tx_timeout_task(struct work_struct *work)
1da177e4 1541{
c4028958
DH
1542 struct ixgb_adapter *adapter =
1543 container_of(work, struct ixgb_adapter, tx_timeout_task);
1da177e4 1544
9b8118df 1545 adapter->tx_timeout_count++;
1da177e4
LT
1546 ixgb_down(adapter, TRUE);
1547 ixgb_up(adapter);
1548}
1549
1550/**
1551 * ixgb_get_stats - Get System Network Statistics
1552 * @netdev: network interface device structure
1553 *
1554 * Returns the address of the device statistics structure.
1555 * The statistics are actually updated from the timer callback.
1556 **/
1557
1558static struct net_device_stats *
1559ixgb_get_stats(struct net_device *netdev)
1560{
8908c6cd 1561 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
1562
1563 return &adapter->net_stats;
1564}
1565
1566/**
1567 * ixgb_change_mtu - Change the Maximum Transfer Unit
1568 * @netdev: network interface device structure
1569 * @new_mtu: new value for maximum frame size
1570 *
1571 * Returns 0 on success, negative on failure
1572 **/
1573
1574static int
1575ixgb_change_mtu(struct net_device *netdev, int new_mtu)
1576{
8908c6cd 1577 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
1578 int max_frame = new_mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
1579 int old_max_frame = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
1580
1581
1582 if((max_frame < IXGB_MIN_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH)
1583 || (max_frame > IXGB_MAX_JUMBO_FRAME_SIZE + ENET_FCS_LENGTH)) {
ec9c3f5d 1584 DPRINTK(PROBE, ERR, "Invalid MTU setting %d\n", new_mtu);
1da177e4
LT
1585 return -EINVAL;
1586 }
1587
3f3dc0dd 1588 adapter->rx_buffer_len = max_frame;
1da177e4
LT
1589
1590 netdev->mtu = new_mtu;
1591
3f3dc0dd 1592 if ((old_max_frame != max_frame) && netif_running(netdev)) {
1da177e4
LT
1593 ixgb_down(adapter, TRUE);
1594 ixgb_up(adapter);
1595 }
1596
1597 return 0;
1598}
1599
1600/**
1601 * ixgb_update_stats - Update the board statistics counters.
1602 * @adapter: board private structure
1603 **/
1604
1605void
1606ixgb_update_stats(struct ixgb_adapter *adapter)
1607{
5633684d 1608 struct net_device *netdev = adapter->netdev;
01748fbb
LV
1609 struct pci_dev *pdev = adapter->pdev;
1610
1611 /* Prevent stats update while adapter is being reset */
81b1955e 1612 if (pci_channel_offline(pdev))
01748fbb 1613 return;
5633684d
MC
1614
1615 if((netdev->flags & IFF_PROMISC) || (netdev->flags & IFF_ALLMULTI) ||
1616 (netdev->mc_count > IXGB_MAX_NUM_MULTICAST_ADDRESSES)) {
1617 u64 multi = IXGB_READ_REG(&adapter->hw, MPRCL);
1618 u32 bcast_l = IXGB_READ_REG(&adapter->hw, BPRCL);
1619 u32 bcast_h = IXGB_READ_REG(&adapter->hw, BPRCH);
1620 u64 bcast = ((u64)bcast_h << 32) | bcast_l;
1621
1622 multi |= ((u64)IXGB_READ_REG(&adapter->hw, MPRCH) << 32);
1623 /* fix up multicast stats by removing broadcasts */
7b89178d
MC
1624 if(multi >= bcast)
1625 multi -= bcast;
5633684d
MC
1626
1627 adapter->stats.mprcl += (multi & 0xFFFFFFFF);
1628 adapter->stats.mprch += (multi >> 32);
1629 adapter->stats.bprcl += bcast_l;
1630 adapter->stats.bprch += bcast_h;
1631 } else {
1632 adapter->stats.mprcl += IXGB_READ_REG(&adapter->hw, MPRCL);
1633 adapter->stats.mprch += IXGB_READ_REG(&adapter->hw, MPRCH);
1634 adapter->stats.bprcl += IXGB_READ_REG(&adapter->hw, BPRCL);
1635 adapter->stats.bprch += IXGB_READ_REG(&adapter->hw, BPRCH);
1636 }
1da177e4
LT
1637 adapter->stats.tprl += IXGB_READ_REG(&adapter->hw, TPRL);
1638 adapter->stats.tprh += IXGB_READ_REG(&adapter->hw, TPRH);
1639 adapter->stats.gprcl += IXGB_READ_REG(&adapter->hw, GPRCL);
1640 adapter->stats.gprch += IXGB_READ_REG(&adapter->hw, GPRCH);
1da177e4
LT
1641 adapter->stats.uprcl += IXGB_READ_REG(&adapter->hw, UPRCL);
1642 adapter->stats.uprch += IXGB_READ_REG(&adapter->hw, UPRCH);
1643 adapter->stats.vprcl += IXGB_READ_REG(&adapter->hw, VPRCL);
1644 adapter->stats.vprch += IXGB_READ_REG(&adapter->hw, VPRCH);
1645 adapter->stats.jprcl += IXGB_READ_REG(&adapter->hw, JPRCL);
1646 adapter->stats.jprch += IXGB_READ_REG(&adapter->hw, JPRCH);
1647 adapter->stats.gorcl += IXGB_READ_REG(&adapter->hw, GORCL);
1648 adapter->stats.gorch += IXGB_READ_REG(&adapter->hw, GORCH);
1649 adapter->stats.torl += IXGB_READ_REG(&adapter->hw, TORL);
1650 adapter->stats.torh += IXGB_READ_REG(&adapter->hw, TORH);
1651 adapter->stats.rnbc += IXGB_READ_REG(&adapter->hw, RNBC);
1652 adapter->stats.ruc += IXGB_READ_REG(&adapter->hw, RUC);
1653 adapter->stats.roc += IXGB_READ_REG(&adapter->hw, ROC);
1654 adapter->stats.rlec += IXGB_READ_REG(&adapter->hw, RLEC);
1655 adapter->stats.crcerrs += IXGB_READ_REG(&adapter->hw, CRCERRS);
1656 adapter->stats.icbc += IXGB_READ_REG(&adapter->hw, ICBC);
1657 adapter->stats.ecbc += IXGB_READ_REG(&adapter->hw, ECBC);
1658 adapter->stats.mpc += IXGB_READ_REG(&adapter->hw, MPC);
1659 adapter->stats.tptl += IXGB_READ_REG(&adapter->hw, TPTL);
1660 adapter->stats.tpth += IXGB_READ_REG(&adapter->hw, TPTH);
1661 adapter->stats.gptcl += IXGB_READ_REG(&adapter->hw, GPTCL);
1662 adapter->stats.gptch += IXGB_READ_REG(&adapter->hw, GPTCH);
1663 adapter->stats.bptcl += IXGB_READ_REG(&adapter->hw, BPTCL);
1664 adapter->stats.bptch += IXGB_READ_REG(&adapter->hw, BPTCH);
1665 adapter->stats.mptcl += IXGB_READ_REG(&adapter->hw, MPTCL);
1666 adapter->stats.mptch += IXGB_READ_REG(&adapter->hw, MPTCH);
1667 adapter->stats.uptcl += IXGB_READ_REG(&adapter->hw, UPTCL);
1668 adapter->stats.uptch += IXGB_READ_REG(&adapter->hw, UPTCH);
1669 adapter->stats.vptcl += IXGB_READ_REG(&adapter->hw, VPTCL);
1670 adapter->stats.vptch += IXGB_READ_REG(&adapter->hw, VPTCH);
1671 adapter->stats.jptcl += IXGB_READ_REG(&adapter->hw, JPTCL);
1672 adapter->stats.jptch += IXGB_READ_REG(&adapter->hw, JPTCH);
1673 adapter->stats.gotcl += IXGB_READ_REG(&adapter->hw, GOTCL);
1674 adapter->stats.gotch += IXGB_READ_REG(&adapter->hw, GOTCH);
1675 adapter->stats.totl += IXGB_READ_REG(&adapter->hw, TOTL);
1676 adapter->stats.toth += IXGB_READ_REG(&adapter->hw, TOTH);
1677 adapter->stats.dc += IXGB_READ_REG(&adapter->hw, DC);
1678 adapter->stats.plt64c += IXGB_READ_REG(&adapter->hw, PLT64C);
1679 adapter->stats.tsctc += IXGB_READ_REG(&adapter->hw, TSCTC);
1680 adapter->stats.tsctfc += IXGB_READ_REG(&adapter->hw, TSCTFC);
1681 adapter->stats.ibic += IXGB_READ_REG(&adapter->hw, IBIC);
1682 adapter->stats.rfc += IXGB_READ_REG(&adapter->hw, RFC);
1683 adapter->stats.lfc += IXGB_READ_REG(&adapter->hw, LFC);
1684 adapter->stats.pfrc += IXGB_READ_REG(&adapter->hw, PFRC);
1685 adapter->stats.pftc += IXGB_READ_REG(&adapter->hw, PFTC);
1686 adapter->stats.mcfrc += IXGB_READ_REG(&adapter->hw, MCFRC);
1687 adapter->stats.mcftc += IXGB_READ_REG(&adapter->hw, MCFTC);
1688 adapter->stats.xonrxc += IXGB_READ_REG(&adapter->hw, XONRXC);
1689 adapter->stats.xontxc += IXGB_READ_REG(&adapter->hw, XONTXC);
1690 adapter->stats.xoffrxc += IXGB_READ_REG(&adapter->hw, XOFFRXC);
1691 adapter->stats.xofftxc += IXGB_READ_REG(&adapter->hw, XOFFTXC);
1692 adapter->stats.rjc += IXGB_READ_REG(&adapter->hw, RJC);
1693
1694 /* Fill out the OS statistics structure */
1695
1696 adapter->net_stats.rx_packets = adapter->stats.gprcl;
1697 adapter->net_stats.tx_packets = adapter->stats.gptcl;
1698 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
1699 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
1700 adapter->net_stats.multicast = adapter->stats.mprcl;
1701 adapter->net_stats.collisions = 0;
1702
1703 /* ignore RLEC as it reports errors for padded (<64bytes) frames
1704 * with a length in the type/len field */
1705 adapter->net_stats.rx_errors =
1706 /* adapter->stats.rnbc + */ adapter->stats.crcerrs +
1707 adapter->stats.ruc +
1708 adapter->stats.roc /*+ adapter->stats.rlec */ +
1709 adapter->stats.icbc +
1710 adapter->stats.ecbc + adapter->stats.mpc;
1711
1da177e4
LT
1712 /* see above
1713 * adapter->net_stats.rx_length_errors = adapter->stats.rlec;
1714 */
1715
1716 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
1717 adapter->net_stats.rx_fifo_errors = adapter->stats.mpc;
1718 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
1719 adapter->net_stats.rx_over_errors = adapter->stats.mpc;
1720
1721 adapter->net_stats.tx_errors = 0;
1722 adapter->net_stats.rx_frame_errors = 0;
1723 adapter->net_stats.tx_aborted_errors = 0;
1724 adapter->net_stats.tx_carrier_errors = 0;
1725 adapter->net_stats.tx_fifo_errors = 0;
1726 adapter->net_stats.tx_heartbeat_errors = 0;
1727 adapter->net_stats.tx_window_errors = 0;
1728}
1729
1730#define IXGB_MAX_INTR 10
1731/**
1732 * ixgb_intr - Interrupt Handler
1733 * @irq: interrupt number
1734 * @data: pointer to a network interface device structure
1da177e4
LT
1735 **/
1736
1737static irqreturn_t
7d12e780 1738ixgb_intr(int irq, void *data)
1da177e4
LT
1739{
1740 struct net_device *netdev = data;
8908c6cd 1741 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
1742 struct ixgb_hw *hw = &adapter->hw;
1743 uint32_t icr = IXGB_READ_REG(hw, ICR);
1744#ifndef CONFIG_IXGB_NAPI
1745 unsigned int i;
1746#endif
1747
1748 if(unlikely(!icr))
1749 return IRQ_NONE; /* Not our interrupt */
1750
1751 if(unlikely(icr & (IXGB_INT_RXSEQ | IXGB_INT_LSC))) {
1752 mod_timer(&adapter->watchdog_timer, jiffies);
1753 }
1754
1755#ifdef CONFIG_IXGB_NAPI
bea3348e 1756 if (netif_rx_schedule_prep(netdev, &adapter->napi)) {
1da177e4
LT
1757
1758 /* Disable interrupts and register for poll. The flush
1759 of the posted write is intentionally left out.
1760 */
1761
1762 atomic_inc(&adapter->irq_sem);
1763 IXGB_WRITE_REG(&adapter->hw, IMC, ~0);
bea3348e 1764 __netif_rx_schedule(netdev, &adapter->napi);
1da177e4
LT
1765 }
1766#else
1767 /* yes, that is actually a & and it is meant to make sure that
1768 * every pass through this for loop checks both receive and
1769 * transmit queues for completed descriptors, intended to
1770 * avoid starvation issues and assist tx/rx fairness. */
1771 for(i = 0; i < IXGB_MAX_INTR; i++)
1772 if(!ixgb_clean_rx_irq(adapter) &
1773 !ixgb_clean_tx_irq(adapter))
1774 break;
1775#endif
1776 return IRQ_HANDLED;
1777}
1778
1779#ifdef CONFIG_IXGB_NAPI
1780/**
1781 * ixgb_clean - NAPI Rx polling callback
1782 * @adapter: board private structure
1783 **/
1784
1785static int
bea3348e 1786ixgb_clean(struct napi_struct *napi, int budget)
1da177e4 1787{
bea3348e
SH
1788 struct ixgb_adapter *adapter = container_of(napi, struct ixgb_adapter, napi);
1789 struct net_device *netdev = adapter->netdev;
1da177e4
LT
1790 int tx_cleaned;
1791 int work_done = 0;
1792
1793 tx_cleaned = ixgb_clean_tx_irq(adapter);
bea3348e 1794 ixgb_clean_rx_irq(adapter, &work_done, budget);
1da177e4
LT
1795
1796 /* if no Tx and not enough Rx work done, exit the polling mode */
1797 if((!tx_cleaned && (work_done == 0)) || !netif_running(netdev)) {
bea3348e 1798 netif_rx_complete(netdev, napi);
1da177e4 1799 ixgb_irq_enable(adapter);
1da177e4
LT
1800 }
1801
bea3348e 1802 return work_done;
1da177e4
LT
1803}
1804#endif
1805
1806/**
1807 * ixgb_clean_tx_irq - Reclaim resources after transmit completes
1808 * @adapter: board private structure
1809 **/
1810
1811static boolean_t
1812ixgb_clean_tx_irq(struct ixgb_adapter *adapter)
1813{
1814 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1815 struct net_device *netdev = adapter->netdev;
1816 struct ixgb_tx_desc *tx_desc, *eop_desc;
1817 struct ixgb_buffer *buffer_info;
1818 unsigned int i, eop;
1819 boolean_t cleaned = FALSE;
1820
1821 i = tx_ring->next_to_clean;
1822 eop = tx_ring->buffer_info[i].next_to_watch;
1823 eop_desc = IXGB_TX_DESC(*tx_ring, eop);
1824
1825 while(eop_desc->status & IXGB_TX_DESC_STATUS_DD) {
1826
1827 for(cleaned = FALSE; !cleaned; ) {
1828 tx_desc = IXGB_TX_DESC(*tx_ring, i);
1829 buffer_info = &tx_ring->buffer_info[i];
1830
1831 if (tx_desc->popts
1832 & (IXGB_TX_DESC_POPTS_TXSM |
1833 IXGB_TX_DESC_POPTS_IXSM))
1834 adapter->hw_csum_tx_good++;
1835
1836 ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
1837
1838 *(uint32_t *)&(tx_desc->status) = 0;
1839
1840 cleaned = (i == eop);
1841 if(++i == tx_ring->count) i = 0;
1842 }
1843
1844 eop = tx_ring->buffer_info[i].next_to_watch;
1845 eop_desc = IXGB_TX_DESC(*tx_ring, eop);
1846 }
1847
1848 tx_ring->next_to_clean = i;
1849
3352a3b2
AK
1850 if (unlikely(netif_queue_stopped(netdev))) {
1851 spin_lock(&adapter->tx_lock);
1852 if (netif_queue_stopped(netdev) && netif_carrier_ok(netdev) &&
ab8ced2f 1853 (IXGB_DESC_UNUSED(tx_ring) >= DESC_NEEDED))
3352a3b2
AK
1854 netif_wake_queue(netdev);
1855 spin_unlock(&adapter->tx_lock);
1da177e4 1856 }
1da177e4
LT
1857
1858 if(adapter->detect_tx_hung) {
1859 /* detect a transmit hang in hardware, this serializes the
1860 * check with the clearing of time_stamp and movement of i */
1861 adapter->detect_tx_hung = FALSE;
9b8118df
AK
1862 if (tx_ring->buffer_info[eop].dma &&
1863 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp + HZ)
1da177e4 1864 && !(IXGB_READ_REG(&adapter->hw, STATUS) &
9b8118df
AK
1865 IXGB_STATUS_TXOFF)) {
1866 /* detected Tx unit hang */
1867 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
1868 " TDH <%x>\n"
1869 " TDT <%x>\n"
1870 " next_to_use <%x>\n"
1871 " next_to_clean <%x>\n"
1872 "buffer_info[next_to_clean]\n"
1873 " time_stamp <%lx>\n"
1874 " next_to_watch <%x>\n"
1875 " jiffies <%lx>\n"
1876 " next_to_watch.status <%x>\n",
1877 IXGB_READ_REG(&adapter->hw, TDH),
1878 IXGB_READ_REG(&adapter->hw, TDT),
1879 tx_ring->next_to_use,
1880 tx_ring->next_to_clean,
1881 tx_ring->buffer_info[eop].time_stamp,
1882 eop,
1883 jiffies,
1884 eop_desc->status);
1da177e4 1885 netif_stop_queue(netdev);
9b8118df 1886 }
1da177e4
LT
1887 }
1888
1889 return cleaned;
1890}
1891
1892/**
1893 * ixgb_rx_checksum - Receive Checksum Offload for 82597.
1894 * @adapter: board private structure
1895 * @rx_desc: receive descriptor
1896 * @sk_buff: socket buffer with received data
1897 **/
1898
235949d1 1899static void
1da177e4
LT
1900ixgb_rx_checksum(struct ixgb_adapter *adapter,
1901 struct ixgb_rx_desc *rx_desc,
1902 struct sk_buff *skb)
1903{
1904 /* Ignore Checksum bit is set OR
1905 * TCP Checksum has not been calculated
1906 */
1907 if((rx_desc->status & IXGB_RX_DESC_STATUS_IXSM) ||
1908 (!(rx_desc->status & IXGB_RX_DESC_STATUS_TCPCS))) {
1909 skb->ip_summed = CHECKSUM_NONE;
1910 return;
1911 }
1912
1913 /* At this point we know the hardware did the TCP checksum */
1914 /* now look at the TCP checksum error bit */
1915 if(rx_desc->errors & IXGB_RX_DESC_ERRORS_TCPE) {
1916 /* let the stack verify checksum errors */
1917 skb->ip_summed = CHECKSUM_NONE;
1918 adapter->hw_csum_rx_error++;
1919 } else {
1920 /* TCP checksum is good */
1921 skb->ip_summed = CHECKSUM_UNNECESSARY;
1922 adapter->hw_csum_rx_good++;
1923 }
1924}
1925
1926/**
1927 * ixgb_clean_rx_irq - Send received data up the network stack,
1928 * @adapter: board private structure
1929 **/
1930
1931static boolean_t
1932#ifdef CONFIG_IXGB_NAPI
1933ixgb_clean_rx_irq(struct ixgb_adapter *adapter, int *work_done, int work_to_do)
1934#else
1935ixgb_clean_rx_irq(struct ixgb_adapter *adapter)
1936#endif
1937{
1938 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
1939 struct net_device *netdev = adapter->netdev;
1940 struct pci_dev *pdev = adapter->pdev;
1941 struct ixgb_rx_desc *rx_desc, *next_rxd;
1942 struct ixgb_buffer *buffer_info, *next_buffer, *next2_buffer;
1da177e4
LT
1943 uint32_t length;
1944 unsigned int i, j;
1945 boolean_t cleaned = FALSE;
1946
1947 i = rx_ring->next_to_clean;
1948 rx_desc = IXGB_RX_DESC(*rx_ring, i);
1949 buffer_info = &rx_ring->buffer_info[i];
1950
1951 while(rx_desc->status & IXGB_RX_DESC_STATUS_DD) {
f404de1c
MC
1952 struct sk_buff *skb, *next_skb;
1953 u8 status;
1da177e4
LT
1954
1955#ifdef CONFIG_IXGB_NAPI
1956 if(*work_done >= work_to_do)
1957 break;
1958
1959 (*work_done)++;
1960#endif
f404de1c 1961 status = rx_desc->status;
1da177e4 1962 skb = buffer_info->skb;
1dfdd7df 1963 buffer_info->skb = NULL;
f404de1c 1964
1da177e4
LT
1965 prefetch(skb->data);
1966
1967 if(++i == rx_ring->count) i = 0;
1968 next_rxd = IXGB_RX_DESC(*rx_ring, i);
1969 prefetch(next_rxd);
1970
1971 if((j = i + 1) == rx_ring->count) j = 0;
1972 next2_buffer = &rx_ring->buffer_info[j];
1973 prefetch(next2_buffer);
1974
1975 next_buffer = &rx_ring->buffer_info[i];
1976 next_skb = next_buffer->skb;
1977 prefetch(next_skb);
1978
1da177e4
LT
1979 cleaned = TRUE;
1980
1981 pci_unmap_single(pdev,
1982 buffer_info->dma,
1983 buffer_info->length,
1984 PCI_DMA_FROMDEVICE);
1985
1986 length = le16_to_cpu(rx_desc->length);
1987
f404de1c 1988 if(unlikely(!(status & IXGB_RX_DESC_STATUS_EOP))) {
1da177e4
LT
1989
1990 /* All receives must fit into a single buffer */
1991
1992 IXGB_DBG("Receive packet consumed multiple buffers "
1993 "length<%x>\n", length);
1994
1995 dev_kfree_skb_irq(skb);
f404de1c 1996 goto rxdesc_done;
1da177e4
LT
1997 }
1998
1999 if (unlikely(rx_desc->errors
2000 & (IXGB_RX_DESC_ERRORS_CE | IXGB_RX_DESC_ERRORS_SE
2001 | IXGB_RX_DESC_ERRORS_P |
2002 IXGB_RX_DESC_ERRORS_RXE))) {
2003
2004 dev_kfree_skb_irq(skb);
f404de1c 2005 goto rxdesc_done;
1da177e4
LT
2006 }
2007
6b900bb4
AK
2008 /* code added for copybreak, this should improve
2009 * performance for small packets with large amounts
2010 * of reassembly being done in the stack */
2011#define IXGB_CB_LENGTH 256
2012 if (length < IXGB_CB_LENGTH) {
2013 struct sk_buff *new_skb =
5791704f 2014 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
6b900bb4
AK
2015 if (new_skb) {
2016 skb_reserve(new_skb, NET_IP_ALIGN);
27d7ff46
ACM
2017 skb_copy_to_linear_data_offset(new_skb,
2018 -NET_IP_ALIGN,
2019 (skb->data -
2020 NET_IP_ALIGN),
2021 (length +
2022 NET_IP_ALIGN));
6b900bb4
AK
2023 /* save the skb in buffer_info as good */
2024 buffer_info->skb = skb;
2025 skb = new_skb;
2026 }
2027 }
2028 /* end copybreak code */
2029
1da177e4
LT
2030 /* Good Receive */
2031 skb_put(skb, length);
2032
2033 /* Receive Checksum Offload */
2034 ixgb_rx_checksum(adapter, rx_desc, skb);
2035
2036 skb->protocol = eth_type_trans(skb, netdev);
2037#ifdef CONFIG_IXGB_NAPI
f404de1c 2038 if(adapter->vlgrp && (status & IXGB_RX_DESC_STATUS_VP)) {
1da177e4
LT
2039 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
2040 le16_to_cpu(rx_desc->special) &
2041 IXGB_RX_DESC_SPECIAL_VLAN_MASK);
2042 } else {
2043 netif_receive_skb(skb);
2044 }
2045#else /* CONFIG_IXGB_NAPI */
f404de1c 2046 if(adapter->vlgrp && (status & IXGB_RX_DESC_STATUS_VP)) {
1da177e4
LT
2047 vlan_hwaccel_rx(skb, adapter->vlgrp,
2048 le16_to_cpu(rx_desc->special) &
2049 IXGB_RX_DESC_SPECIAL_VLAN_MASK);
2050 } else {
2051 netif_rx(skb);
2052 }
2053#endif /* CONFIG_IXGB_NAPI */
2054 netdev->last_rx = jiffies;
2055
f404de1c
MC
2056rxdesc_done:
2057 /* clean up descriptor, might be written over by hw */
1da177e4 2058 rx_desc->status = 0;
1da177e4 2059
f404de1c 2060 /* use prefetched values */
1da177e4
LT
2061 rx_desc = next_rxd;
2062 buffer_info = next_buffer;
2063 }
2064
2065 rx_ring->next_to_clean = i;
2066
2067 ixgb_alloc_rx_buffers(adapter);
2068
2069 return cleaned;
2070}
2071
2072/**
2073 * ixgb_alloc_rx_buffers - Replace used receive buffers
2074 * @adapter: address of board private structure
2075 **/
2076
2077static void
2078ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter)
2079{
2080 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
2081 struct net_device *netdev = adapter->netdev;
2082 struct pci_dev *pdev = adapter->pdev;
2083 struct ixgb_rx_desc *rx_desc;
2084 struct ixgb_buffer *buffer_info;
2085 struct sk_buff *skb;
2086 unsigned int i;
2087 int num_group_tail_writes;
2088 long cleancount;
2089
2090 i = rx_ring->next_to_use;
2091 buffer_info = &rx_ring->buffer_info[i];
2092 cleancount = IXGB_DESC_UNUSED(rx_ring);
2093
2094 num_group_tail_writes = IXGB_RX_BUFFER_WRITE;
2095
41639fed
MC
2096 /* leave three descriptors unused */
2097 while(--cleancount > 2) {
1dfdd7df 2098 /* recycle! its good for you */
69c7a940
AK
2099 skb = buffer_info->skb;
2100 if (skb) {
1dfdd7df
AK
2101 skb_trim(skb, 0);
2102 goto map_skb;
2103 }
1da177e4 2104
69c7a940
AK
2105 skb = netdev_alloc_skb(netdev, adapter->rx_buffer_len
2106 + NET_IP_ALIGN);
1dfdd7df 2107 if (unlikely(!skb)) {
1da177e4 2108 /* Better luck next round */
1dfdd7df 2109 adapter->alloc_rx_buff_failed++;
1da177e4
LT
2110 break;
2111 }
2112
2113 /* Make buffer alignment 2 beyond a 16 byte boundary
2114 * this will result in a 16 byte aligned IP header after
2115 * the 14 byte MAC header is removed
2116 */
2117 skb_reserve(skb, NET_IP_ALIGN);
2118
1da177e4
LT
2119 buffer_info->skb = skb;
2120 buffer_info->length = adapter->rx_buffer_len;
1dfdd7df
AK
2121map_skb:
2122 buffer_info->dma = pci_map_single(pdev,
2123 skb->data,
2124 adapter->rx_buffer_len,
2125 PCI_DMA_FROMDEVICE);
1da177e4 2126
1dfdd7df 2127 rx_desc = IXGB_RX_DESC(*rx_ring, i);
1da177e4 2128 rx_desc->buff_addr = cpu_to_le64(buffer_info->dma);
41639fed
MC
2129 /* guarantee DD bit not set now before h/w gets descriptor
2130 * this is the rest of the workaround for h/w double
2131 * writeback. */
2132 rx_desc->status = 0;
1da177e4 2133
1da177e4
LT
2134
2135 if(++i == rx_ring->count) i = 0;
2136 buffer_info = &rx_ring->buffer_info[i];
2137 }
2138
1dfdd7df
AK
2139 if (likely(rx_ring->next_to_use != i)) {
2140 rx_ring->next_to_use = i;
2141 if (unlikely(i-- == 0))
2142 i = (rx_ring->count - 1);
2143
2144 /* Force memory writes to complete before letting h/w
2145 * know there are new descriptors to fetch. (Only
2146 * applicable for weak-ordered memory model archs, such
2147 * as IA-64). */
2148 wmb();
2149 IXGB_WRITE_REG(&adapter->hw, RDT, i);
2150 }
1da177e4
LT
2151}
2152
2153/**
2154 * ixgb_vlan_rx_register - enables or disables vlan tagging/stripping.
2155 *
2156 * @param netdev network interface device structure
2157 * @param grp indicates to enable or disable tagging/stripping
2158 **/
2159static void
2160ixgb_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
2161{
8908c6cd 2162 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
2163 uint32_t ctrl, rctl;
2164
2165 ixgb_irq_disable(adapter);
2166 adapter->vlgrp = grp;
2167
2168 if(grp) {
2169 /* enable VLAN tag insert/strip */
2170 ctrl = IXGB_READ_REG(&adapter->hw, CTRL0);
2171 ctrl |= IXGB_CTRL0_VME;
2172 IXGB_WRITE_REG(&adapter->hw, CTRL0, ctrl);
2173
2174 /* enable VLAN receive filtering */
2175
2176 rctl = IXGB_READ_REG(&adapter->hw, RCTL);
2177 rctl |= IXGB_RCTL_VFE;
2178 rctl &= ~IXGB_RCTL_CFIEN;
2179 IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
2180 } else {
2181 /* disable VLAN tag insert/strip */
2182
2183 ctrl = IXGB_READ_REG(&adapter->hw, CTRL0);
2184 ctrl &= ~IXGB_CTRL0_VME;
2185 IXGB_WRITE_REG(&adapter->hw, CTRL0, ctrl);
2186
2187 /* disable VLAN filtering */
2188
2189 rctl = IXGB_READ_REG(&adapter->hw, RCTL);
2190 rctl &= ~IXGB_RCTL_VFE;
2191 IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
2192 }
2193
2194 ixgb_irq_enable(adapter);
2195}
2196
2197static void
2198ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
2199{
8908c6cd 2200 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
2201 uint32_t vfta, index;
2202
2203 /* add VID to filter table */
2204
2205 index = (vid >> 5) & 0x7F;
2206 vfta = IXGB_READ_REG_ARRAY(&adapter->hw, VFTA, index);
2207 vfta |= (1 << (vid & 0x1F));
2208 ixgb_write_vfta(&adapter->hw, index, vfta);
2209}
2210
2211static void
2212ixgb_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
2213{
8908c6cd 2214 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
2215 uint32_t vfta, index;
2216
2217 ixgb_irq_disable(adapter);
2218
5c15bdec 2219 vlan_group_set_device(adapter->vlgrp, vid, NULL);
1da177e4
LT
2220
2221 ixgb_irq_enable(adapter);
2222
2223 /* remove VID from filter table*/
2224
2225 index = (vid >> 5) & 0x7F;
2226 vfta = IXGB_READ_REG_ARRAY(&adapter->hw, VFTA, index);
2227 vfta &= ~(1 << (vid & 0x1F));
2228 ixgb_write_vfta(&adapter->hw, index, vfta);
2229}
2230
2231static void
2232ixgb_restore_vlan(struct ixgb_adapter *adapter)
2233{
2234 ixgb_vlan_rx_register(adapter->netdev, adapter->vlgrp);
2235
2236 if(adapter->vlgrp) {
2237 uint16_t vid;
2238 for(vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
5c15bdec 2239 if(!vlan_group_get_device(adapter->vlgrp, vid))
1da177e4
LT
2240 continue;
2241 ixgb_vlan_rx_add_vid(adapter->netdev, vid);
2242 }
2243 }
2244}
2245
1da177e4
LT
2246#ifdef CONFIG_NET_POLL_CONTROLLER
2247/*
2248 * Polling 'interrupt' - used by things like netconsole to send skbs
2249 * without having to re-enable interrupts. It's not called while
2250 * the interrupt routine is executing.
2251 */
2252
2253static void ixgb_netpoll(struct net_device *dev)
2254{
f990b426 2255 struct ixgb_adapter *adapter = netdev_priv(dev);
ac79c82e 2256
1da177e4 2257 disable_irq(adapter->pdev->irq);
7d12e780 2258 ixgb_intr(adapter->pdev->irq, dev);
1da177e4
LT
2259 enable_irq(adapter->pdev->irq);
2260}
2261#endif
2262
01748fbb
LV
2263/**
2264 * ixgb_io_error_detected() - called when PCI error is detected
2265 * @pdev pointer to pci device with error
2266 * @state pci channel state after error
2267 *
2268 * This callback is called by the PCI subsystem whenever
2269 * a PCI bus error is detected.
2270 */
2271static pci_ers_result_t ixgb_io_error_detected (struct pci_dev *pdev,
2272 enum pci_channel_state state)
2273{
2274 struct net_device *netdev = pci_get_drvdata(pdev);
f7d4fa01 2275 struct ixgb_adapter *adapter = netdev_priv(netdev);
01748fbb
LV
2276
2277 if(netif_running(netdev))
2278 ixgb_down(adapter, TRUE);
2279
2280 pci_disable_device(pdev);
2281
2282 /* Request a slot reset. */
2283 return PCI_ERS_RESULT_NEED_RESET;
2284}
2285
2286/**
2287 * ixgb_io_slot_reset - called after the pci bus has been reset.
2288 * @pdev pointer to pci device with error
2289 *
2290 * This callback is called after the PCI buss has been reset.
2291 * Basically, this tries to restart the card from scratch.
2292 * This is a shortened version of the device probe/discovery code,
2293 * it resembles the first-half of the ixgb_probe() routine.
2294 */
2295static pci_ers_result_t ixgb_io_slot_reset (struct pci_dev *pdev)
2296{
2297 struct net_device *netdev = pci_get_drvdata(pdev);
f7d4fa01 2298 struct ixgb_adapter *adapter = netdev_priv(netdev);
01748fbb
LV
2299
2300 if(pci_enable_device(pdev)) {
2301 DPRINTK(PROBE, ERR, "Cannot re-enable PCI device after reset.\n");
2302 return PCI_ERS_RESULT_DISCONNECT;
2303 }
2304
2305 /* Perform card reset only on one instance of the card */
2306 if (0 != PCI_FUNC (pdev->devfn))
2307 return PCI_ERS_RESULT_RECOVERED;
2308
2309 pci_set_master(pdev);
2310
2311 netif_carrier_off(netdev);
2312 netif_stop_queue(netdev);
2313 ixgb_reset(adapter);
2314
2315 /* Make sure the EEPROM is good */
2316 if(!ixgb_validate_eeprom_checksum(&adapter->hw)) {
2317 DPRINTK(PROBE, ERR, "After reset, the EEPROM checksum is not valid.\n");
2318 return PCI_ERS_RESULT_DISCONNECT;
2319 }
2320 ixgb_get_ee_mac_addr(&adapter->hw, netdev->dev_addr);
2321 memcpy(netdev->perm_addr, netdev->dev_addr, netdev->addr_len);
2322
2323 if(!is_valid_ether_addr(netdev->perm_addr)) {
2324 DPRINTK(PROBE, ERR, "After reset, invalid MAC address.\n");
2325 return PCI_ERS_RESULT_DISCONNECT;
2326 }
2327
2328 return PCI_ERS_RESULT_RECOVERED;
2329}
2330
2331/**
2332 * ixgb_io_resume - called when its OK to resume normal operations
2333 * @pdev pointer to pci device with error
2334 *
2335 * The error recovery driver tells us that its OK to resume
2336 * normal operation. Implementation resembles the second-half
2337 * of the ixgb_probe() routine.
2338 */
2339static void ixgb_io_resume (struct pci_dev *pdev)
2340{
2341 struct net_device *netdev = pci_get_drvdata(pdev);
f7d4fa01 2342 struct ixgb_adapter *adapter = netdev_priv(netdev);
01748fbb
LV
2343
2344 pci_set_master(pdev);
2345
2346 if(netif_running(netdev)) {
2347 if(ixgb_up(adapter)) {
2348 printk ("ixgb: can't bring device back up after reset\n");
2349 return;
2350 }
2351 }
2352
2353 netif_device_attach(netdev);
2354 mod_timer(&adapter->watchdog_timer, jiffies);
2355}
2356
1da177e4 2357/* ixgb_main.c */