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phy subsystem: more cleanups
[linux-block.git] / drivers / net / ixgb / ixgb_main.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2
3
4 Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 2 of the License, or (at your option)
9 any later version.
10
11 This program is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 more details.
15
16 You should have received a copy of the GNU General Public License along with
17 this program; if not, write to the Free Software Foundation, Inc., 59
18 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19
20 The full GNU General Public License is included in this distribution in the
21 file called LICENSE.
22
23 Contact Information:
24 Linux NICS <linux.nics@intel.com>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "ixgb.h"
30
31/* Change Log
32 * 1.0.88 01/05/05
33 * - include fix to the condition that determines when to quit NAPI - Robert Olsson
34 * - use netif_poll_{disable/enable} to synchronize between NAPI and i/f up/down
35 * 1.0.84 10/26/04
36 * - reset buffer_info->dma in Tx resource cleanup logic
37 * 1.0.83 10/12/04
38 * - sparse cleanup - shemminger@osdl.org
39 * - fix tx resource cleanup logic
40 */
41
42char ixgb_driver_name[] = "ixgb";
43char ixgb_driver_string[] = "Intel(R) PRO/10GbE Network Driver";
44
45#ifndef CONFIG_IXGB_NAPI
46#define DRIVERNAPI
47#else
48#define DRIVERNAPI "-NAPI"
49#endif
8b0ee07e
JG		 50
51#define DRV_VERSION "1.0.95-k2"DRIVERNAPI
01e5abc2 52char ixgb_driver_version[] = DRV_VERSION;
1da177e4
LT		 53char ixgb_copyright[] = "Copyright (c) 1999-2005 Intel Corporation.";
54
55/* ixgb_pci_tbl - PCI Device ID Table
56 *
57 * Wildcard entries (PCI_ANY_ID) should come last
58 * Last entry must be all 0s
59 *
60 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
61 * Class, Class Mask, private data (not used) }
62 */
63static struct pci_device_id ixgb_pci_tbl[] = {
64 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX,
65 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
66 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_SR,
67 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
68 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_LR,
69 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
70
71 /* required last entry */
72 {0,}
73};
74
75MODULE_DEVICE_TABLE(pci, ixgb_pci_tbl);
76
77/* Local Function Prototypes */
78
79int ixgb_up(struct ixgb_adapter *adapter);
80void ixgb_down(struct ixgb_adapter *adapter, boolean_t kill_watchdog);
81void ixgb_reset(struct ixgb_adapter *adapter);
82int ixgb_setup_tx_resources(struct ixgb_adapter *adapter);
83int ixgb_setup_rx_resources(struct ixgb_adapter *adapter);
84void ixgb_free_tx_resources(struct ixgb_adapter *adapter);
85void ixgb_free_rx_resources(struct ixgb_adapter *adapter);
86void ixgb_update_stats(struct ixgb_adapter *adapter);
87
88static int ixgb_init_module(void);
89static void ixgb_exit_module(void);
90static int ixgb_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
91static void __devexit ixgb_remove(struct pci_dev *pdev);
92static int ixgb_sw_init(struct ixgb_adapter *adapter);
93static int ixgb_open(struct net_device *netdev);
94static int ixgb_close(struct net_device *netdev);
95static void ixgb_configure_tx(struct ixgb_adapter *adapter);
96static void ixgb_configure_rx(struct ixgb_adapter *adapter);
97static void ixgb_setup_rctl(struct ixgb_adapter *adapter);
98static void ixgb_clean_tx_ring(struct ixgb_adapter *adapter);
99static void ixgb_clean_rx_ring(struct ixgb_adapter *adapter);
100static void ixgb_set_multi(struct net_device *netdev);
101static void ixgb_watchdog(unsigned long data);
102static int ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
103static struct net_device_stats *ixgb_get_stats(struct net_device *netdev);
104static int ixgb_change_mtu(struct net_device *netdev, int new_mtu);
105static int ixgb_set_mac(struct net_device *netdev, void *p);
106static irqreturn_t ixgb_intr(int irq, void *data, struct pt_regs *regs);
107static boolean_t ixgb_clean_tx_irq(struct ixgb_adapter *adapter);
ac79c82e 108
1da177e4
LT		 109#ifdef CONFIG_IXGB_NAPI
110static int ixgb_clean(struct net_device *netdev, int *budget);
111static boolean_t ixgb_clean_rx_irq(struct ixgb_adapter *adapter,
112 int *work_done, int work_to_do);
113#else
114static boolean_t ixgb_clean_rx_irq(struct ixgb_adapter *adapter);
115#endif
116static void ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter);
117void ixgb_set_ethtool_ops(struct net_device *netdev);
118static void ixgb_tx_timeout(struct net_device *dev);
119static void ixgb_tx_timeout_task(struct net_device *dev);
120static void ixgb_vlan_rx_register(struct net_device *netdev,
121 struct vlan_group *grp);
122static void ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
123static void ixgb_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
124static void ixgb_restore_vlan(struct ixgb_adapter *adapter);
125
1da177e4
LT		 126#ifdef CONFIG_NET_POLL_CONTROLLER
127/* for netdump / net console */
128static void ixgb_netpoll(struct net_device *dev);
129#endif
130
1da177e4
LT		 131/* Exported from other modules */
132
133extern void ixgb_check_options(struct ixgb_adapter *adapter);
134
135static struct pci_driver ixgb_driver = {
c2eba932 136 .name = ixgb_driver_name,
1da177e4 137 .id_table = ixgb_pci_tbl,
c2eba932
MC		 138 .probe = ixgb_probe,
139 .remove = __devexit_p(ixgb_remove),
1da177e4
LT		 140};
141
142MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
143MODULE_DESCRIPTION("Intel(R) PRO/10GbE Network Driver");
144MODULE_LICENSE("GPL");
01e5abc2 145MODULE_VERSION(DRV_VERSION);
1da177e4
LT		 146
147/* some defines for controlling descriptor fetches in h/w */
148#define RXDCTL_PTHRESH_DEFAULT 128 /* chip considers prefech below this */
149#define RXDCTL_HTHRESH_DEFAULT 16 /* chip will only prefetch if tail is
150 pushed this many descriptors from head */
151#define RXDCTL_WTHRESH_DEFAULT 16 /* chip writes back at this many or RXT0 */
152
153/**
154 * ixgb_init_module - Driver Registration Routine
155 *
156 * ixgb_init_module is the first routine called when the driver is
157 * loaded. All it does is register with the PCI subsystem.
158 **/
159
160static int __init
161ixgb_init_module(void)
162{
1da177e4
LT		 163 printk(KERN_INFO "%s - version %s\n",
164 ixgb_driver_string, ixgb_driver_version);
165
166 printk(KERN_INFO "%s\n", ixgb_copyright);
167
c2eba932 168 return pci_module_init(&ixgb_driver);
1da177e4
LT		 169}
170
171module_init(ixgb_init_module);
172
173/**
174 * ixgb_exit_module - Driver Exit Cleanup Routine
175 *
176 * ixgb_exit_module is called just before the driver is removed
177 * from memory.
178 **/
179
180static void __exit
181ixgb_exit_module(void)
182{
1da177e4
LT		 183 pci_unregister_driver(&ixgb_driver);
184}
185
186module_exit(ixgb_exit_module);
187
188/**
189 * ixgb_irq_disable - Mask off interrupt generation on the NIC
190 * @adapter: board private structure
191 **/
192
193static inline void
194ixgb_irq_disable(struct ixgb_adapter *adapter)
195{
196 atomic_inc(&adapter->irq_sem);
197 IXGB_WRITE_REG(&adapter->hw, IMC, ~0);
198 IXGB_WRITE_FLUSH(&adapter->hw);
199 synchronize_irq(adapter->pdev->irq);
200}
201
202/**
203 * ixgb_irq_enable - Enable default interrupt generation settings
204 * @adapter: board private structure
205 **/
206
207static inline void
208ixgb_irq_enable(struct ixgb_adapter *adapter)
209{
210 if(atomic_dec_and_test(&adapter->irq_sem)) {
211 IXGB_WRITE_REG(&adapter->hw, IMS,
6dfbb6dd
MC		 212 IXGB_INT_RXT0 | IXGB_INT_RXDMT0 | IXGB_INT_TXDW |
213 IXGB_INT_LSC);
1da177e4
LT		 214 IXGB_WRITE_FLUSH(&adapter->hw);
215 }
216}
217
218int
219ixgb_up(struct ixgb_adapter *adapter)
220{
221 struct net_device *netdev = adapter->netdev;
222 int err;
223 int max_frame = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
224 struct ixgb_hw *hw = &adapter->hw;
225
226 /* hardware has been reset, we need to reload some things */
227
228 ixgb_set_multi(netdev);
229
230 ixgb_restore_vlan(adapter);
231
232 ixgb_configure_tx(adapter);
233 ixgb_setup_rctl(adapter);
234 ixgb_configure_rx(adapter);
235 ixgb_alloc_rx_buffers(adapter);
236
237#ifdef CONFIG_PCI_MSI
238 {
239 boolean_t pcix = (IXGB_READ_REG(&adapter->hw, STATUS) &
240 IXGB_STATUS_PCIX_MODE) ? TRUE : FALSE;
241 adapter->have_msi = TRUE;
242
243 if (!pcix)
244 adapter->have_msi = FALSE;
245 else if((err = pci_enable_msi(adapter->pdev))) {
246 printk (KERN_ERR
247 "Unable to allocate MSI interrupt Error: %d\n", err);
248 adapter->have_msi = FALSE;
249 /* proceed to try to request regular interrupt */
250 }
251 }
252
253#endif
254 if((err = request_irq(adapter->pdev->irq, &ixgb_intr,
255 SA_SHIRQ | SA_SAMPLE_RANDOM,
256 netdev->name, netdev)))
257 return err;
258
259 /* disable interrupts and get the hardware into a known state */
260 IXGB_WRITE_REG(&adapter->hw, IMC, 0xffffffff);
261
262 if((hw->max_frame_size != max_frame) ||
263 (hw->max_frame_size !=
264 (IXGB_READ_REG(hw, MFS) >> IXGB_MFS_SHIFT))) {
265
266 hw->max_frame_size = max_frame;
267
268 IXGB_WRITE_REG(hw, MFS, hw->max_frame_size << IXGB_MFS_SHIFT);
269
270 if(hw->max_frame_size >
271 IXGB_MAX_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH) {
272 uint32_t ctrl0 = IXGB_READ_REG(hw, CTRL0);
273
274 if(!(ctrl0 & IXGB_CTRL0_JFE)) {
275 ctrl0 |= IXGB_CTRL0_JFE;
276 IXGB_WRITE_REG(hw, CTRL0, ctrl0);
277 }
278 }
279 }
280
281 mod_timer(&adapter->watchdog_timer, jiffies);
282 ixgb_irq_enable(adapter);
283
284#ifdef CONFIG_IXGB_NAPI
285 netif_poll_enable(netdev);
286#endif
287 return 0;
288}
289
290void
291ixgb_down(struct ixgb_adapter *adapter, boolean_t kill_watchdog)
292{
293 struct net_device *netdev = adapter->netdev;
294
295 ixgb_irq_disable(adapter);
296 free_irq(adapter->pdev->irq, netdev);
297#ifdef CONFIG_PCI_MSI
298 if(adapter->have_msi == TRUE)
299 pci_disable_msi(adapter->pdev);
300
301#endif
302 if(kill_watchdog)
303 del_timer_sync(&adapter->watchdog_timer);
304#ifdef CONFIG_IXGB_NAPI
305 netif_poll_disable(netdev);
306#endif
307 adapter->link_speed = 0;
308 adapter->link_duplex = 0;
309 netif_carrier_off(netdev);
310 netif_stop_queue(netdev);
311
312 ixgb_reset(adapter);
313 ixgb_clean_tx_ring(adapter);
314 ixgb_clean_rx_ring(adapter);
315}
316
317void
318ixgb_reset(struct ixgb_adapter *adapter)
319{
320
321 ixgb_adapter_stop(&adapter->hw);
322 if(!ixgb_init_hw(&adapter->hw))
323 IXGB_DBG("ixgb_init_hw failed.\n");
324}
325
326/**
327 * ixgb_probe - Device Initialization Routine
328 * @pdev: PCI device information struct
329 * @ent: entry in ixgb_pci_tbl
330 *
331 * Returns 0 on success, negative on failure
332 *
333 * ixgb_probe initializes an adapter identified by a pci_dev structure.
334 * The OS initialization, configuring of the adapter private structure,
335 * and a hardware reset occur.
336 **/
337
338static int __devinit
339ixgb_probe(struct pci_dev *pdev,
340 const struct pci_device_id *ent)
341{
342 struct net_device *netdev = NULL;
343 struct ixgb_adapter *adapter;
344 static int cards_found = 0;
345 unsigned long mmio_start;
346 int mmio_len;
347 int pci_using_dac;
348 int i;
349 int err;
350
351 if((err = pci_enable_device(pdev)))
352 return err;
353
354 if(!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) {
355 pci_using_dac = 1;
356 } else {
357 if((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK))) {
358 IXGB_ERR("No usable DMA configuration, aborting\n");
359 return err;
360 }
361 pci_using_dac = 0;
362 }
363
364 if((err = pci_request_regions(pdev, ixgb_driver_name)))
365 return err;
366
367 pci_set_master(pdev);
368
369 netdev = alloc_etherdev(sizeof(struct ixgb_adapter));
370 if(!netdev) {
371 err = -ENOMEM;
372 goto err_alloc_etherdev;
373 }
374
375 SET_MODULE_OWNER(netdev);
376 SET_NETDEV_DEV(netdev, &pdev->dev);
377
378 pci_set_drvdata(pdev, netdev);
379 adapter = netdev->priv;
380 adapter->netdev = netdev;
381 adapter->pdev = pdev;
382 adapter->hw.back = adapter;
383
384 mmio_start = pci_resource_start(pdev, BAR_0);
385 mmio_len = pci_resource_len(pdev, BAR_0);
386
387 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
388 if(!adapter->hw.hw_addr) {
389 err = -EIO;
390 goto err_ioremap;
391 }
392
393 for(i = BAR_1; i <= BAR_5; i++) {
394 if(pci_resource_len(pdev, i) == 0)
395 continue;
396 if(pci_resource_flags(pdev, i) & IORESOURCE_IO) {
397 adapter->hw.io_base = pci_resource_start(pdev, i);
398 break;
399 }
400 }
401
402 netdev->open = &ixgb_open;
403 netdev->stop = &ixgb_close;
404 netdev->hard_start_xmit = &ixgb_xmit_frame;
405 netdev->get_stats = &ixgb_get_stats;
406 netdev->set_multicast_list = &ixgb_set_multi;
407 netdev->set_mac_address = &ixgb_set_mac;
408 netdev->change_mtu = &ixgb_change_mtu;
409 ixgb_set_ethtool_ops(netdev);
410 netdev->tx_timeout = &ixgb_tx_timeout;
411 netdev->watchdog_timeo = HZ;
412#ifdef CONFIG_IXGB_NAPI
413 netdev->poll = &ixgb_clean;
414 netdev->weight = 64;
415#endif
416 netdev->vlan_rx_register = ixgb_vlan_rx_register;
417 netdev->vlan_rx_add_vid = ixgb_vlan_rx_add_vid;
418 netdev->vlan_rx_kill_vid = ixgb_vlan_rx_kill_vid;
419#ifdef CONFIG_NET_POLL_CONTROLLER
420 netdev->poll_controller = ixgb_netpoll;
421#endif
422
423 netdev->mem_start = mmio_start;
424 netdev->mem_end = mmio_start + mmio_len;
425 netdev->base_addr = adapter->hw.io_base;
426
427 adapter->bd_number = cards_found;
428 adapter->link_speed = 0;
429 adapter->link_duplex = 0;
430
431 /* setup the private structure */
432
433 if((err = ixgb_sw_init(adapter)))
434 goto err_sw_init;
435
436 netdev->features = NETIF_F_SG |
437 NETIF_F_HW_CSUM |
438 NETIF_F_HW_VLAN_TX |
439 NETIF_F_HW_VLAN_RX |
440 NETIF_F_HW_VLAN_FILTER;
441#ifdef NETIF_F_TSO
442 netdev->features |= NETIF_F_TSO;
443#endif
444
445 if(pci_using_dac)
446 netdev->features |= NETIF_F_HIGHDMA;
447
448 /* make sure the EEPROM is good */
449
450 if(!ixgb_validate_eeprom_checksum(&adapter->hw)) {
451 printk(KERN_ERR "The EEPROM Checksum Is Not Valid\n");
452 err = -EIO;
453 goto err_eeprom;
454 }
455
456 ixgb_get_ee_mac_addr(&adapter->hw, netdev->dev_addr);
457
458 if(!is_valid_ether_addr(netdev->dev_addr)) {
459 err = -EIO;
460 goto err_eeprom;
461 }
462
463 adapter->part_num = ixgb_get_ee_pba_number(&adapter->hw);
464
465 init_timer(&adapter->watchdog_timer);
466 adapter->watchdog_timer.function = &ixgb_watchdog;
467 adapter->watchdog_timer.data = (unsigned long)adapter;
468
469 INIT_WORK(&adapter->tx_timeout_task,
470 (void (*)(void *))ixgb_tx_timeout_task, netdev);
471
472 if((err = register_netdev(netdev)))
473 goto err_register;
474
475 /* we're going to reset, so assume we have no link for now */
476
477 netif_carrier_off(netdev);
478 netif_stop_queue(netdev);
479
480 printk(KERN_INFO "%s: Intel(R) PRO/10GbE Network Connection\n",
481 netdev->name);
482 ixgb_check_options(adapter);
483 /* reset the hardware with the new settings */
484
485 ixgb_reset(adapter);
486
487 cards_found++;
488 return 0;
489
490err_register:
491err_sw_init:
492err_eeprom:
493 iounmap(adapter->hw.hw_addr);
494err_ioremap:
495 free_netdev(netdev);
496err_alloc_etherdev:
497 pci_release_regions(pdev);
498 return err;
499}
500
501/**
502 * ixgb_remove - Device Removal Routine
503 * @pdev: PCI device information struct
504 *
505 * ixgb_remove is called by the PCI subsystem to alert the driver
506 * that it should release a PCI device. The could be caused by a
507 * Hot-Plug event, or because the driver is going to be removed from
508 * memory.
509 **/
510
511static void __devexit
512ixgb_remove(struct pci_dev *pdev)
513{
514 struct net_device *netdev = pci_get_drvdata(pdev);
515 struct ixgb_adapter *adapter = netdev->priv;
516
517 unregister_netdev(netdev);
518
519 iounmap(adapter->hw.hw_addr);
520 pci_release_regions(pdev);
521
522 free_netdev(netdev);
523}
524
525/**
526 * ixgb_sw_init - Initialize general software structures (struct ixgb_adapter)
527 * @adapter: board private structure to initialize
528 *
529 * ixgb_sw_init initializes the Adapter private data structure.
530 * Fields are initialized based on PCI device information and
531 * OS network device settings (MTU size).
532 **/
533
534static int __devinit
535ixgb_sw_init(struct ixgb_adapter *adapter)
536{
537 struct ixgb_hw *hw = &adapter->hw;
538 struct net_device *netdev = adapter->netdev;
539 struct pci_dev *pdev = adapter->pdev;
540
541 /* PCI config space info */
542
543 hw->vendor_id = pdev->vendor;
544 hw->device_id = pdev->device;
545 hw->subsystem_vendor_id = pdev->subsystem_vendor;
546 hw->subsystem_id = pdev->subsystem_device;
547
548 adapter->rx_buffer_len = IXGB_RXBUFFER_2048;
549
550 hw->max_frame_size = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
551
552 if((hw->device_id == IXGB_DEVICE_ID_82597EX)
553 ||(hw->device_id == IXGB_DEVICE_ID_82597EX_LR)
554 ||(hw->device_id == IXGB_DEVICE_ID_82597EX_SR))
555 hw->mac_type = ixgb_82597;
556 else {
557 /* should never have loaded on this device */
558 printk(KERN_ERR "ixgb: unsupported device id\n");
559 }
560
561 /* enable flow control to be programmed */
562 hw->fc.send_xon = 1;
563
564 atomic_set(&adapter->irq_sem, 1);
565 spin_lock_init(&adapter->tx_lock);
566
567 return 0;
568}
569
570/**
571 * ixgb_open - Called when a network interface is made active
572 * @netdev: network interface device structure
573 *
574 * Returns 0 on success, negative value on failure
575 *
576 * The open entry point is called when a network interface is made
577 * active by the system (IFF_UP). At this point all resources needed
578 * for transmit and receive operations are allocated, the interrupt
579 * handler is registered with the OS, the watchdog timer is started,
580 * and the stack is notified that the interface is ready.
581 **/
582
583static int
584ixgb_open(struct net_device *netdev)
585{
586 struct ixgb_adapter *adapter = netdev->priv;
587 int err;
588
589 /* allocate transmit descriptors */
590
591 if((err = ixgb_setup_tx_resources(adapter)))
592 goto err_setup_tx;
593
594 /* allocate receive descriptors */
595
596 if((err = ixgb_setup_rx_resources(adapter)))
597 goto err_setup_rx;
598
599 if((err = ixgb_up(adapter)))
600 goto err_up;
601
602 return 0;
603
604err_up:
605 ixgb_free_rx_resources(adapter);
606err_setup_rx:
607 ixgb_free_tx_resources(adapter);
608err_setup_tx:
609 ixgb_reset(adapter);
610
611 return err;
612}
613
614/**
615 * ixgb_close - Disables a network interface
616 * @netdev: network interface device structure
617 *
618 * Returns 0, this is not allowed to fail
619 *
620 * The close entry point is called when an interface is de-activated
621 * by the OS. The hardware is still under the drivers control, but
622 * needs to be disabled. A global MAC reset is issued to stop the
623 * hardware, and all transmit and receive resources are freed.
624 **/
625
626static int
627ixgb_close(struct net_device *netdev)
628{
629 struct ixgb_adapter *adapter = netdev->priv;
630
631 ixgb_down(adapter, TRUE);
632
633 ixgb_free_tx_resources(adapter);
634 ixgb_free_rx_resources(adapter);
635
636 return 0;
637}
638
639/**
640 * ixgb_setup_tx_resources - allocate Tx resources (Descriptors)
641 * @adapter: board private structure
642 *
643 * Return 0 on success, negative on failure
644 **/
645
646int
647ixgb_setup_tx_resources(struct ixgb_adapter *adapter)
648{
649 struct ixgb_desc_ring *txdr = &adapter->tx_ring;
650 struct pci_dev *pdev = adapter->pdev;
651 int size;
652
653 size = sizeof(struct ixgb_buffer) * txdr->count;
654 txdr->buffer_info = vmalloc(size);
655 if(!txdr->buffer_info) {
656 return -ENOMEM;
657 }
658 memset(txdr->buffer_info, 0, size);
659
660 /* round up to nearest 4K */
661
662 txdr->size = txdr->count * sizeof(struct ixgb_tx_desc);
663 IXGB_ROUNDUP(txdr->size, 4096);
664
665 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
666 if(!txdr->desc) {
667 vfree(txdr->buffer_info);
668 return -ENOMEM;
669 }
670 memset(txdr->desc, 0, txdr->size);
671
672 txdr->next_to_use = 0;
673 txdr->next_to_clean = 0;
674
675 return 0;
676}
677
678/**
679 * ixgb_configure_tx - Configure 82597 Transmit Unit after Reset.
680 * @adapter: board private structure
681 *
682 * Configure the Tx unit of the MAC after a reset.
683 **/
684
685static void
686ixgb_configure_tx(struct ixgb_adapter *adapter)
687{
688 uint64_t tdba = adapter->tx_ring.dma;
689 uint32_t tdlen = adapter->tx_ring.count * sizeof(struct ixgb_tx_desc);
690 uint32_t tctl;
691 struct ixgb_hw *hw = &adapter->hw;
692
693 /* Setup the Base and Length of the Tx Descriptor Ring
694 * tx_ring.dma can be either a 32 or 64 bit value
695 */
696
697 IXGB_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
698 IXGB_WRITE_REG(hw, TDBAH, (tdba >> 32));
699
700 IXGB_WRITE_REG(hw, TDLEN, tdlen);
701
702 /* Setup the HW Tx Head and Tail descriptor pointers */
703
704 IXGB_WRITE_REG(hw, TDH, 0);
705 IXGB_WRITE_REG(hw, TDT, 0);
706
707 /* don't set up txdctl, it induces performance problems if configured
708 * incorrectly */
709 /* Set the Tx Interrupt Delay register */
710
711 IXGB_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
712
713 /* Program the Transmit Control Register */
714
715 tctl = IXGB_TCTL_TCE | IXGB_TCTL_TXEN | IXGB_TCTL_TPDE;
716 IXGB_WRITE_REG(hw, TCTL, tctl);
717
718 /* Setup Transmit Descriptor Settings for this adapter */
719 adapter->tx_cmd_type =
720 IXGB_TX_DESC_TYPE
721 | (adapter->tx_int_delay_enable ? IXGB_TX_DESC_CMD_IDE : 0);
722}
723
724/**
725 * ixgb_setup_rx_resources - allocate Rx resources (Descriptors)
726 * @adapter: board private structure
727 *
728 * Returns 0 on success, negative on failure
729 **/
730
731int
732ixgb_setup_rx_resources(struct ixgb_adapter *adapter)
733{
734 struct ixgb_desc_ring *rxdr = &adapter->rx_ring;
735 struct pci_dev *pdev = adapter->pdev;
736 int size;
737
738 size = sizeof(struct ixgb_buffer) * rxdr->count;
739 rxdr->buffer_info = vmalloc(size);
740 if(!rxdr->buffer_info) {
741 return -ENOMEM;
742 }
743 memset(rxdr->buffer_info, 0, size);
744
745 /* Round up to nearest 4K */
746
747 rxdr->size = rxdr->count * sizeof(struct ixgb_rx_desc);
748 IXGB_ROUNDUP(rxdr->size, 4096);
749
750 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
751
752 if(!rxdr->desc) {
753 vfree(rxdr->buffer_info);
754 return -ENOMEM;
755 }
756 memset(rxdr->desc, 0, rxdr->size);
757
758 rxdr->next_to_clean = 0;
759 rxdr->next_to_use = 0;
760
761 return 0;
762}
763
764/**
765 * ixgb_setup_rctl - configure the receive control register
766 * @adapter: Board private structure
767 **/
768
769static void
770ixgb_setup_rctl(struct ixgb_adapter *adapter)
771{
772 uint32_t rctl;
773
774 rctl = IXGB_READ_REG(&adapter->hw, RCTL);
775
776 rctl &= ~(3 << IXGB_RCTL_MO_SHIFT);
777
778 rctl |=
779 IXGB_RCTL_BAM | IXGB_RCTL_RDMTS_1_2 |
780 IXGB_RCTL_RXEN | IXGB_RCTL_CFF |
781 (adapter->hw.mc_filter_type << IXGB_RCTL_MO_SHIFT);
782
783 rctl |= IXGB_RCTL_SECRC;
784
785 switch (adapter->rx_buffer_len) {
786 case IXGB_RXBUFFER_2048:
787 default:
788 rctl |= IXGB_RCTL_BSIZE_2048;
789 break;
790 case IXGB_RXBUFFER_4096:
791 rctl |= IXGB_RCTL_BSIZE_4096;
792 break;
793 case IXGB_RXBUFFER_8192:
794 rctl |= IXGB_RCTL_BSIZE_8192;
795 break;
796 case IXGB_RXBUFFER_16384:
797 rctl |= IXGB_RCTL_BSIZE_16384;
798 break;
799 }
800
801 IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
802}
803
804/**
805 * ixgb_configure_rx - Configure 82597 Receive Unit after Reset.
806 * @adapter: board private structure
807 *
808 * Configure the Rx unit of the MAC after a reset.
809 **/
810
811static void
812ixgb_configure_rx(struct ixgb_adapter *adapter)
813{
814 uint64_t rdba = adapter->rx_ring.dma;
815 uint32_t rdlen = adapter->rx_ring.count * sizeof(struct ixgb_rx_desc);
816 struct ixgb_hw *hw = &adapter->hw;
817 uint32_t rctl;
818 uint32_t rxcsum;
819 uint32_t rxdctl;
820
821 /* make sure receives are disabled while setting up the descriptors */
822
823 rctl = IXGB_READ_REG(hw, RCTL);
824 IXGB_WRITE_REG(hw, RCTL, rctl & ~IXGB_RCTL_RXEN);
825
826 /* set the Receive Delay Timer Register */
827
828 IXGB_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
829
830 /* Setup the Base and Length of the Rx Descriptor Ring */
831
832 IXGB_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
833 IXGB_WRITE_REG(hw, RDBAH, (rdba >> 32));
834
835 IXGB_WRITE_REG(hw, RDLEN, rdlen);
836
837 /* Setup the HW Rx Head and Tail Descriptor Pointers */
838 IXGB_WRITE_REG(hw, RDH, 0);
839 IXGB_WRITE_REG(hw, RDT, 0);
840
841 /* set up pre-fetching of receive buffers so we get some before we
842 * run out (default hardware behavior is to run out before fetching
843 * more). This sets up to fetch if HTHRESH rx descriptors are avail
844 * and the descriptors in hw cache are below PTHRESH. This avoids
845 * the hardware behavior of fetching <=512 descriptors in a single
846 * burst that pre-empts all other activity, usually causing fifo
847 * overflows. */
848 /* use WTHRESH to burst write 16 descriptors or burst when RXT0 */
849 rxdctl = RXDCTL_WTHRESH_DEFAULT << IXGB_RXDCTL_WTHRESH_SHIFT |
850 RXDCTL_HTHRESH_DEFAULT << IXGB_RXDCTL_HTHRESH_SHIFT |
851 RXDCTL_PTHRESH_DEFAULT << IXGB_RXDCTL_PTHRESH_SHIFT;
852 IXGB_WRITE_REG(hw, RXDCTL, rxdctl);
853
854 /* Enable Receive Checksum Offload for TCP and UDP */
855 if(adapter->rx_csum == TRUE) {
856 rxcsum = IXGB_READ_REG(hw, RXCSUM);
857 rxcsum |= IXGB_RXCSUM_TUOFL;
858 IXGB_WRITE_REG(hw, RXCSUM, rxcsum);
859 }
860
861 /* Enable Receives */
862
863 IXGB_WRITE_REG(hw, RCTL, rctl);
864}
865
866/**
867 * ixgb_free_tx_resources - Free Tx Resources
868 * @adapter: board private structure
869 *
870 * Free all transmit software resources
871 **/
872
873void
874ixgb_free_tx_resources(struct ixgb_adapter *adapter)
875{
876 struct pci_dev *pdev = adapter->pdev;
877
878 ixgb_clean_tx_ring(adapter);
879
880 vfree(adapter->tx_ring.buffer_info);
881 adapter->tx_ring.buffer_info = NULL;
882
883 pci_free_consistent(pdev, adapter->tx_ring.size,
884 adapter->tx_ring.desc, adapter->tx_ring.dma);
885
886 adapter->tx_ring.desc = NULL;
887}
888
889static inline void
890ixgb_unmap_and_free_tx_resource(struct ixgb_adapter *adapter,
891 struct ixgb_buffer *buffer_info)
892{
893 struct pci_dev *pdev = adapter->pdev;
894 if(buffer_info->dma) {
895 pci_unmap_page(pdev,
896 buffer_info->dma,
897 buffer_info->length,
898 PCI_DMA_TODEVICE);
899 buffer_info->dma = 0;
900 }
901 if(buffer_info->skb) {
902 dev_kfree_skb_any(buffer_info->skb);
903 buffer_info->skb = NULL;
904 }
905}
906
907/**
908 * ixgb_clean_tx_ring - Free Tx Buffers
909 * @adapter: board private structure
910 **/
911
912static void
913ixgb_clean_tx_ring(struct ixgb_adapter *adapter)
914{
915 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
916 struct ixgb_buffer *buffer_info;
917 unsigned long size;
918 unsigned int i;
919
920 /* Free all the Tx ring sk_buffs */
921
922 for(i = 0; i < tx_ring->count; i++) {
923 buffer_info = &tx_ring->buffer_info[i];
924 ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
925 }
926
927 size = sizeof(struct ixgb_buffer) * tx_ring->count;
928 memset(tx_ring->buffer_info, 0, size);
929
930 /* Zero out the descriptor ring */
931
932 memset(tx_ring->desc, 0, tx_ring->size);
933
934 tx_ring->next_to_use = 0;
935 tx_ring->next_to_clean = 0;
936
937 IXGB_WRITE_REG(&adapter->hw, TDH, 0);
938 IXGB_WRITE_REG(&adapter->hw, TDT, 0);
939}
940
941/**
942 * ixgb_free_rx_resources - Free Rx Resources
943 * @adapter: board private structure
944 *
945 * Free all receive software resources
946 **/
947
948void
949ixgb_free_rx_resources(struct ixgb_adapter *adapter)
950{
951 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
952 struct pci_dev *pdev = adapter->pdev;
953
954 ixgb_clean_rx_ring(adapter);
955
956 vfree(rx_ring->buffer_info);
957 rx_ring->buffer_info = NULL;
958
959 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
960
961 rx_ring->desc = NULL;
962}
963
964/**
965 * ixgb_clean_rx_ring - Free Rx Buffers
966 * @adapter: board private structure
967 **/
968
969static void
970ixgb_clean_rx_ring(struct ixgb_adapter *adapter)
971{
972 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
973 struct ixgb_buffer *buffer_info;
974 struct pci_dev *pdev = adapter->pdev;
975 unsigned long size;
976 unsigned int i;
977
978 /* Free all the Rx ring sk_buffs */
979
980 for(i = 0; i < rx_ring->count; i++) {
981 buffer_info = &rx_ring->buffer_info[i];
982 if(buffer_info->skb) {
983
984 pci_unmap_single(pdev,
985 buffer_info->dma,
986 buffer_info->length,
987 PCI_DMA_FROMDEVICE);
988
989 dev_kfree_skb(buffer_info->skb);
990
991 buffer_info->skb = NULL;
992 }
993 }
994
995 size = sizeof(struct ixgb_buffer) * rx_ring->count;
996 memset(rx_ring->buffer_info, 0, size);
997
998 /* Zero out the descriptor ring */
999
1000 memset(rx_ring->desc, 0, rx_ring->size);
1001
1002 rx_ring->next_to_clean = 0;
1003 rx_ring->next_to_use = 0;
1004
1005 IXGB_WRITE_REG(&adapter->hw, RDH, 0);
1006 IXGB_WRITE_REG(&adapter->hw, RDT, 0);
1007}
1008
1009/**
1010 * ixgb_set_mac - Change the Ethernet Address of the NIC
1011 * @netdev: network interface device structure
1012 * @p: pointer to an address structure
1013 *
1014 * Returns 0 on success, negative on failure
1015 **/
1016
1017static int
1018ixgb_set_mac(struct net_device *netdev, void *p)
1019{
1020 struct ixgb_adapter *adapter = netdev->priv;
1021 struct sockaddr *addr = p;
1022
1023 if(!is_valid_ether_addr(addr->sa_data))
1024 return -EADDRNOTAVAIL;
1025
1026 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1027
1028 ixgb_rar_set(&adapter->hw, addr->sa_data, 0);
1029
1030 return 0;
1031}
1032
1033/**
1034 * ixgb_set_multi - Multicast and Promiscuous mode set
1035 * @netdev: network interface device structure
1036 *
1037 * The set_multi entry point is called whenever the multicast address
1038 * list or the network interface flags are updated. This routine is
1039 * responsible for configuring the hardware for proper multicast,
1040 * promiscuous mode, and all-multi behavior.
1041 **/
1042
1043static void
1044ixgb_set_multi(struct net_device *netdev)
1045{
1046 struct ixgb_adapter *adapter = netdev->priv;
1047 struct ixgb_hw *hw = &adapter->hw;
1048 struct dev_mc_list *mc_ptr;
1049 uint32_t rctl;
1050 int i;
1051
1052 /* Check for Promiscuous and All Multicast modes */
1053
1054 rctl = IXGB_READ_REG(hw, RCTL);
1055
1056 if(netdev->flags & IFF_PROMISC) {
1057 rctl |= (IXGB_RCTL_UPE | IXGB_RCTL_MPE);
1058 } else if(netdev->flags & IFF_ALLMULTI) {
1059 rctl |= IXGB_RCTL_MPE;
1060 rctl &= ~IXGB_RCTL_UPE;
1061 } else {
1062 rctl &= ~(IXGB_RCTL_UPE | IXGB_RCTL_MPE);
1063 }
1064
1065 if(netdev->mc_count > IXGB_MAX_NUM_MULTICAST_ADDRESSES) {
1066 rctl |= IXGB_RCTL_MPE;
1067 IXGB_WRITE_REG(hw, RCTL, rctl);
1068 } else {
1069 uint8_t mta[netdev->mc_count * IXGB_ETH_LENGTH_OF_ADDRESS];
1070
1071 IXGB_WRITE_REG(hw, RCTL, rctl);
1072
1073 for(i = 0, mc_ptr = netdev->mc_list; mc_ptr;
1074 i++, mc_ptr = mc_ptr->next)
1075 memcpy(&mta[i * IXGB_ETH_LENGTH_OF_ADDRESS],
1076 mc_ptr->dmi_addr, IXGB_ETH_LENGTH_OF_ADDRESS);
1077
1078 ixgb_mc_addr_list_update(hw, mta, netdev->mc_count, 0);
1079 }
1080}
1081
1082/**
1083 * ixgb_watchdog - Timer Call-back
1084 * @data: pointer to netdev cast into an unsigned long
1085 **/
1086
1087static void
1088ixgb_watchdog(unsigned long data)
1089{
1090 struct ixgb_adapter *adapter = (struct ixgb_adapter *)data;
1091 struct net_device *netdev = adapter->netdev;
1092 struct ixgb_desc_ring *txdr = &adapter->tx_ring;
1093
1094 ixgb_check_for_link(&adapter->hw);
1095
1096 if (ixgb_check_for_bad_link(&adapter->hw)) {
1097 /* force the reset path */
1098 netif_stop_queue(netdev);
1099 }
1100
1101 if(adapter->hw.link_up) {
1102 if(!netif_carrier_ok(netdev)) {
1103 printk(KERN_INFO "ixgb: %s NIC Link is Up %d Mbps %s\n",
1104 netdev->name, 10000, "Full Duplex");
1105 adapter->link_speed = 10000;
1106 adapter->link_duplex = FULL_DUPLEX;
1107 netif_carrier_on(netdev);
1108 netif_wake_queue(netdev);
1109 }
1110 } else {
1111 if(netif_carrier_ok(netdev)) {
1112 adapter->link_speed = 0;
1113 adapter->link_duplex = 0;
1114 printk(KERN_INFO
1115 "ixgb: %s NIC Link is Down\n",
1116 netdev->name);
1117 netif_carrier_off(netdev);
1118 netif_stop_queue(netdev);
1119
1120 }
1121 }
1122
1123 ixgb_update_stats(adapter);
1124
1125 if(!netif_carrier_ok(netdev)) {
1126 if(IXGB_DESC_UNUSED(txdr) + 1 < txdr->count) {
1127 /* We've lost link, so the controller stops DMA,
1128 * but we've got queued Tx work that's never going
1129 * to get done, so reset controller to flush Tx.
1130 * (Do the reset outside of interrupt context). */
1131 schedule_work(&adapter->tx_timeout_task);
1132 }
1133 }
1134
1135 /* Force detection of hung controller every watchdog period */
1136 adapter->detect_tx_hung = TRUE;
1137
1138 /* generate an interrupt to force clean up of any stragglers */
1139 IXGB_WRITE_REG(&adapter->hw, ICS, IXGB_INT_TXDW);
1140
1141 /* Reset the timer */
1142 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
1143}
1144
1145#define IXGB_TX_FLAGS_CSUM 0x00000001
1146#define IXGB_TX_FLAGS_VLAN 0x00000002
1147#define IXGB_TX_FLAGS_TSO 0x00000004
1148
1149static inline int
1150ixgb_tso(struct ixgb_adapter *adapter, struct sk_buff *skb)
1151{
1152#ifdef NETIF_F_TSO
1153 struct ixgb_context_desc *context_desc;
1154 unsigned int i;
1155 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
1156 uint16_t ipcse, tucse, mss;
1157 int err;
1158
1159 if(likely(skb_shinfo(skb)->tso_size)) {
1160 if (skb_header_cloned(skb)) {
1161 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
1162 if (err)
1163 return err;
1164 }
1165
1166 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
1167 mss = skb_shinfo(skb)->tso_size;
1168 skb->nh.iph->tot_len = 0;
1169 skb->nh.iph->check = 0;
1170 skb->h.th->check = ~csum_tcpudp_magic(skb->nh.iph->saddr,
1171 skb->nh.iph->daddr,
1172 0, IPPROTO_TCP, 0);
1173 ipcss = skb->nh.raw - skb->data;
1174 ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
1175 ipcse = skb->h.raw - skb->data - 1;
1176 tucss = skb->h.raw - skb->data;
1177 tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
1178 tucse = 0;
1179
1180 i = adapter->tx_ring.next_to_use;
1181 context_desc = IXGB_CONTEXT_DESC(adapter->tx_ring, i);
1182
1183 context_desc->ipcss = ipcss;
1184 context_desc->ipcso = ipcso;
1185 context_desc->ipcse = cpu_to_le16(ipcse);
1186 context_desc->tucss = tucss;
1187 context_desc->tucso = tucso;
1188 context_desc->tucse = cpu_to_le16(tucse);
1189 context_desc->mss = cpu_to_le16(mss);
1190 context_desc->hdr_len = hdr_len;
1191 context_desc->status = 0;
1192 context_desc->cmd_type_len = cpu_to_le32(
1193 IXGB_CONTEXT_DESC_TYPE
1194 | IXGB_CONTEXT_DESC_CMD_TSE
1195 | IXGB_CONTEXT_DESC_CMD_IP
1196 | IXGB_CONTEXT_DESC_CMD_TCP
1da177e4
LT		 1197 | IXGB_CONTEXT_DESC_CMD_IDE
1198 | (skb->len - (hdr_len)));
1199
06c2f9ec 1200
1da177e4
LT		 1201 if(++i == adapter->tx_ring.count) i = 0;
1202 adapter->tx_ring.next_to_use = i;
1203
1204 return 1;
1205 }
1206#endif
1207
1208 return 0;
1209}
1210
1211static inline boolean_t
1212ixgb_tx_csum(struct ixgb_adapter *adapter, struct sk_buff *skb)
1213{
1214 struct ixgb_context_desc *context_desc;
1215 unsigned int i;
1216 uint8_t css, cso;
1217
1218 if(likely(skb->ip_summed == CHECKSUM_HW)) {
1219 css = skb->h.raw - skb->data;
1220 cso = (skb->h.raw + skb->csum) - skb->data;
1221
1222 i = adapter->tx_ring.next_to_use;
1223 context_desc = IXGB_CONTEXT_DESC(adapter->tx_ring, i);
1224
1225 context_desc->tucss = css;
1226 context_desc->tucso = cso;
1227 context_desc->tucse = 0;
1228 /* zero out any previously existing data in one instruction */
1229 *(uint32_t *)&(context_desc->ipcss) = 0;
1230 context_desc->status = 0;
1231 context_desc->hdr_len = 0;
1232 context_desc->mss = 0;
1233 context_desc->cmd_type_len =
1234 cpu_to_le32(IXGB_CONTEXT_DESC_TYPE
06c2f9ec 1235 | IXGB_TX_DESC_CMD_IDE);
1da177e4
LT		 1236
1237 if(++i == adapter->tx_ring.count) i = 0;
1238 adapter->tx_ring.next_to_use = i;
1239
1240 return TRUE;
1241 }
1242
1243 return FALSE;
1244}
1245
1246#define IXGB_MAX_TXD_PWR 14
1247#define IXGB_MAX_DATA_PER_TXD (1<<IXGB_MAX_TXD_PWR)
1248
1249static inline int
1250ixgb_tx_map(struct ixgb_adapter *adapter, struct sk_buff *skb,
1251 unsigned int first)
1252{
1253 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1254 struct ixgb_buffer *buffer_info;
1255 int len = skb->len;
1256 unsigned int offset = 0, size, count = 0, i;
1257
1258 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
1259 unsigned int f;
ac79c82e 1260
1da177e4
LT		 1261 len -= skb->data_len;
1262
1263 i = tx_ring->next_to_use;
1264
1265 while(len) {
1266 buffer_info = &tx_ring->buffer_info[i];
1267 size = min(len, IXGB_MAX_JUMBO_FRAME_SIZE);
1268 buffer_info->length = size;
1269 buffer_info->dma =
1270 pci_map_single(adapter->pdev,
1271 skb->data + offset,
1272 size,
1273 PCI_DMA_TODEVICE);
1274 buffer_info->time_stamp = jiffies;
1275
1276 len -= size;
1277 offset += size;
1278 count++;
1279 if(++i == tx_ring->count) i = 0;
1280 }
1281
1282 for(f = 0; f < nr_frags; f++) {
1283 struct skb_frag_struct *frag;
1284
1285 frag = &skb_shinfo(skb)->frags[f];
1286 len = frag->size;
1287 offset = 0;
1288
1289 while(len) {
1290 buffer_info = &tx_ring->buffer_info[i];
1291 size = min(len, IXGB_MAX_JUMBO_FRAME_SIZE);
1292 buffer_info->length = size;
1293 buffer_info->dma =
1294 pci_map_page(adapter->pdev,
1295 frag->page,
1296 frag->page_offset + offset,
1297 size,
1298 PCI_DMA_TODEVICE);
1299 buffer_info->time_stamp = jiffies;
1300
1301 len -= size;
1302 offset += size;
1303 count++;
1304 if(++i == tx_ring->count) i = 0;
1305 }
1306 }
1307 i = (i == 0) ? tx_ring->count - 1 : i - 1;
1308 tx_ring->buffer_info[i].skb = skb;
1309 tx_ring->buffer_info[first].next_to_watch = i;
1310
1311 return count;
1312}
1313
1314static inline void
1315ixgb_tx_queue(struct ixgb_adapter *adapter, int count, int vlan_id,int tx_flags)
1316{
1317 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1318 struct ixgb_tx_desc *tx_desc = NULL;
1319 struct ixgb_buffer *buffer_info;
1320 uint32_t cmd_type_len = adapter->tx_cmd_type;
1321 uint8_t status = 0;
1322 uint8_t popts = 0;
1323 unsigned int i;
1324
1325 if(tx_flags & IXGB_TX_FLAGS_TSO) {
1326 cmd_type_len |= IXGB_TX_DESC_CMD_TSE;
1327 popts |= (IXGB_TX_DESC_POPTS_IXSM | IXGB_TX_DESC_POPTS_TXSM);
1328 }
1329
1330 if(tx_flags & IXGB_TX_FLAGS_CSUM)
1331 popts |= IXGB_TX_DESC_POPTS_TXSM;
1332
1333 if(tx_flags & IXGB_TX_FLAGS_VLAN) {
1334 cmd_type_len |= IXGB_TX_DESC_CMD_VLE;
1335 }
1336
1337 i = tx_ring->next_to_use;
1338
1339 while(count--) {
1340 buffer_info = &tx_ring->buffer_info[i];
1341 tx_desc = IXGB_TX_DESC(*tx_ring, i);
1342 tx_desc->buff_addr = cpu_to_le64(buffer_info->dma);
1343 tx_desc->cmd_type_len =
1344 cpu_to_le32(cmd_type_len | buffer_info->length);
1345 tx_desc->status = status;
1346 tx_desc->popts = popts;
1347 tx_desc->vlan = cpu_to_le16(vlan_id);
1348
1349 if(++i == tx_ring->count) i = 0;
1350 }
1351
1352 tx_desc->cmd_type_len |= cpu_to_le32(IXGB_TX_DESC_CMD_EOP
1353 | IXGB_TX_DESC_CMD_RS );
1354
1355 /* Force memory writes to complete before letting h/w
1356 * know there are new descriptors to fetch. (Only
1357 * applicable for weak-ordered memory model archs,
1358 * such as IA-64). */
1359 wmb();
1360
1361 tx_ring->next_to_use = i;
1362 IXGB_WRITE_REG(&adapter->hw, TDT, i);
1363}
1364
1365/* Tx Descriptors needed, worst case */
1366#define TXD_USE_COUNT(S) (((S) >> IXGB_MAX_TXD_PWR) + \
1367 (((S) & (IXGB_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
1368#define DESC_NEEDED TXD_USE_COUNT(IXGB_MAX_DATA_PER_TXD) + \
1369 MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1
1370
1371static int
1372ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
1373{
1374 struct ixgb_adapter *adapter = netdev->priv;
1375 unsigned int first;
1376 unsigned int tx_flags = 0;
1377 unsigned long flags;
1378 int vlan_id = 0;
1379 int tso;
1380
1381 if(skb->len <= 0) {
1382 dev_kfree_skb_any(skb);
1383 return 0;
1384 }
1385
1386 spin_lock_irqsave(&adapter->tx_lock, flags);
1387 if(unlikely(IXGB_DESC_UNUSED(&adapter->tx_ring) < DESC_NEEDED)) {
1388 netif_stop_queue(netdev);
1389 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1390 return 1;
1391 }
1392 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1393
1394 if(adapter->vlgrp && vlan_tx_tag_present(skb)) {
1395 tx_flags |= IXGB_TX_FLAGS_VLAN;
1396 vlan_id = vlan_tx_tag_get(skb);
1397 }
1398
1399 first = adapter->tx_ring.next_to_use;
1400
1401 tso = ixgb_tso(adapter, skb);
1402 if (tso < 0) {
1403 dev_kfree_skb_any(skb);
1404 return NETDEV_TX_OK;
1405 }
1406
1407 if (tso)
1408 tx_flags |= IXGB_TX_FLAGS_TSO;
1409 else if(ixgb_tx_csum(adapter, skb))
1410 tx_flags |= IXGB_TX_FLAGS_CSUM;
1411
1412 ixgb_tx_queue(adapter, ixgb_tx_map(adapter, skb, first), vlan_id,
1413 tx_flags);
1414
1415 netdev->trans_start = jiffies;
1416
1417 return 0;
1418}
1419
1420/**
1421 * ixgb_tx_timeout - Respond to a Tx Hang
1422 * @netdev: network interface device structure
1423 **/
1424
1425static void
1426ixgb_tx_timeout(struct net_device *netdev)
1427{
1428 struct ixgb_adapter *adapter = netdev->priv;
1429
1430 /* Do the reset outside of interrupt context */
1431 schedule_work(&adapter->tx_timeout_task);
1432}
1433
1434static void
1435ixgb_tx_timeout_task(struct net_device *netdev)
1436{
1437 struct ixgb_adapter *adapter = netdev->priv;
1438
1439 ixgb_down(adapter, TRUE);
1440 ixgb_up(adapter);
1441}
1442
1443/**
1444 * ixgb_get_stats - Get System Network Statistics
1445 * @netdev: network interface device structure
1446 *
1447 * Returns the address of the device statistics structure.
1448 * The statistics are actually updated from the timer callback.
1449 **/
1450
1451static struct net_device_stats *
1452ixgb_get_stats(struct net_device *netdev)
1453{
1454 struct ixgb_adapter *adapter = netdev->priv;
1455
1456 return &adapter->net_stats;
1457}
1458
1459/**
1460 * ixgb_change_mtu - Change the Maximum Transfer Unit
1461 * @netdev: network interface device structure
1462 * @new_mtu: new value for maximum frame size
1463 *
1464 * Returns 0 on success, negative on failure
1465 **/
1466
1467static int
1468ixgb_change_mtu(struct net_device *netdev, int new_mtu)
1469{
1470 struct ixgb_adapter *adapter = netdev->priv;
1471 int max_frame = new_mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
1472 int old_max_frame = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
1473
1474
1475 if((max_frame < IXGB_MIN_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH)
1476 || (max_frame > IXGB_MAX_JUMBO_FRAME_SIZE + ENET_FCS_LENGTH)) {
1477 IXGB_ERR("Invalid MTU setting\n");
1478 return -EINVAL;
1479 }
1480
1481 if((max_frame <= IXGB_MAX_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH)
1482 || (max_frame <= IXGB_RXBUFFER_2048)) {
1483 adapter->rx_buffer_len = IXGB_RXBUFFER_2048;
1484
1485 } else if(max_frame <= IXGB_RXBUFFER_4096) {
1486 adapter->rx_buffer_len = IXGB_RXBUFFER_4096;
1487
1488 } else if(max_frame <= IXGB_RXBUFFER_8192) {
1489 adapter->rx_buffer_len = IXGB_RXBUFFER_8192;
1490
1491 } else {
1492 adapter->rx_buffer_len = IXGB_RXBUFFER_16384;
1493 }
1494
1495 netdev->mtu = new_mtu;
1496
1497 if(old_max_frame != max_frame && netif_running(netdev)) {
1498
1499 ixgb_down(adapter, TRUE);
1500 ixgb_up(adapter);
1501 }
1502
1503 return 0;
1504}
1505
1506/**
1507 * ixgb_update_stats - Update the board statistics counters.
1508 * @adapter: board private structure
1509 **/
1510
1511void
1512ixgb_update_stats(struct ixgb_adapter *adapter)
1513{
5633684d
MC		 1514 struct net_device *netdev = adapter->netdev;
1515
1516 if((netdev->flags & IFF_PROMISC) || (netdev->flags & IFF_ALLMULTI) ||
1517 (netdev->mc_count > IXGB_MAX_NUM_MULTICAST_ADDRESSES)) {
1518 u64 multi = IXGB_READ_REG(&adapter->hw, MPRCL);
1519 u32 bcast_l = IXGB_READ_REG(&adapter->hw, BPRCL);
1520 u32 bcast_h = IXGB_READ_REG(&adapter->hw, BPRCH);
1521 u64 bcast = ((u64)bcast_h << 32) | bcast_l;
1522
1523 multi |= ((u64)IXGB_READ_REG(&adapter->hw, MPRCH) << 32);
1524 /* fix up multicast stats by removing broadcasts */
1525 multi -= bcast;
1526
1527 adapter->stats.mprcl += (multi & 0xFFFFFFFF);
1528 adapter->stats.mprch += (multi >> 32);
1529 adapter->stats.bprcl += bcast_l;
1530 adapter->stats.bprch += bcast_h;
1531 } else {
1532 adapter->stats.mprcl += IXGB_READ_REG(&adapter->hw, MPRCL);
1533 adapter->stats.mprch += IXGB_READ_REG(&adapter->hw, MPRCH);
1534 adapter->stats.bprcl += IXGB_READ_REG(&adapter->hw, BPRCL);
1535 adapter->stats.bprch += IXGB_READ_REG(&adapter->hw, BPRCH);
1536 }
1da177e4
LT		 1537 adapter->stats.tprl += IXGB_READ_REG(&adapter->hw, TPRL);
1538 adapter->stats.tprh += IXGB_READ_REG(&adapter->hw, TPRH);
1539 adapter->stats.gprcl += IXGB_READ_REG(&adapter->hw, GPRCL);
1540 adapter->stats.gprch += IXGB_READ_REG(&adapter->hw, GPRCH);
1da177e4
LT		 1541 adapter->stats.uprcl += IXGB_READ_REG(&adapter->hw, UPRCL);
1542 adapter->stats.uprch += IXGB_READ_REG(&adapter->hw, UPRCH);
1543 adapter->stats.vprcl += IXGB_READ_REG(&adapter->hw, VPRCL);
1544 adapter->stats.vprch += IXGB_READ_REG(&adapter->hw, VPRCH);
1545 adapter->stats.jprcl += IXGB_READ_REG(&adapter->hw, JPRCL);
1546 adapter->stats.jprch += IXGB_READ_REG(&adapter->hw, JPRCH);
1547 adapter->stats.gorcl += IXGB_READ_REG(&adapter->hw, GORCL);
1548 adapter->stats.gorch += IXGB_READ_REG(&adapter->hw, GORCH);
1549 adapter->stats.torl += IXGB_READ_REG(&adapter->hw, TORL);
1550 adapter->stats.torh += IXGB_READ_REG(&adapter->hw, TORH);
1551 adapter->stats.rnbc += IXGB_READ_REG(&adapter->hw, RNBC);
1552 adapter->stats.ruc += IXGB_READ_REG(&adapter->hw, RUC);
1553 adapter->stats.roc += IXGB_READ_REG(&adapter->hw, ROC);
1554 adapter->stats.rlec += IXGB_READ_REG(&adapter->hw, RLEC);
1555 adapter->stats.crcerrs += IXGB_READ_REG(&adapter->hw, CRCERRS);
1556 adapter->stats.icbc += IXGB_READ_REG(&adapter->hw, ICBC);
1557 adapter->stats.ecbc += IXGB_READ_REG(&adapter->hw, ECBC);
1558 adapter->stats.mpc += IXGB_READ_REG(&adapter->hw, MPC);
1559 adapter->stats.tptl += IXGB_READ_REG(&adapter->hw, TPTL);
1560 adapter->stats.tpth += IXGB_READ_REG(&adapter->hw, TPTH);
1561 adapter->stats.gptcl += IXGB_READ_REG(&adapter->hw, GPTCL);
1562 adapter->stats.gptch += IXGB_READ_REG(&adapter->hw, GPTCH);
1563 adapter->stats.bptcl += IXGB_READ_REG(&adapter->hw, BPTCL);
1564 adapter->stats.bptch += IXGB_READ_REG(&adapter->hw, BPTCH);
1565 adapter->stats.mptcl += IXGB_READ_REG(&adapter->hw, MPTCL);
1566 adapter->stats.mptch += IXGB_READ_REG(&adapter->hw, MPTCH);
1567 adapter->stats.uptcl += IXGB_READ_REG(&adapter->hw, UPTCL);
1568 adapter->stats.uptch += IXGB_READ_REG(&adapter->hw, UPTCH);
1569 adapter->stats.vptcl += IXGB_READ_REG(&adapter->hw, VPTCL);
1570 adapter->stats.vptch += IXGB_READ_REG(&adapter->hw, VPTCH);
1571 adapter->stats.jptcl += IXGB_READ_REG(&adapter->hw, JPTCL);
1572 adapter->stats.jptch += IXGB_READ_REG(&adapter->hw, JPTCH);
1573 adapter->stats.gotcl += IXGB_READ_REG(&adapter->hw, GOTCL);
1574 adapter->stats.gotch += IXGB_READ_REG(&adapter->hw, GOTCH);
1575 adapter->stats.totl += IXGB_READ_REG(&adapter->hw, TOTL);
1576 adapter->stats.toth += IXGB_READ_REG(&adapter->hw, TOTH);
1577 adapter->stats.dc += IXGB_READ_REG(&adapter->hw, DC);
1578 adapter->stats.plt64c += IXGB_READ_REG(&adapter->hw, PLT64C);
1579 adapter->stats.tsctc += IXGB_READ_REG(&adapter->hw, TSCTC);
1580 adapter->stats.tsctfc += IXGB_READ_REG(&adapter->hw, TSCTFC);
1581 adapter->stats.ibic += IXGB_READ_REG(&adapter->hw, IBIC);
1582 adapter->stats.rfc += IXGB_READ_REG(&adapter->hw, RFC);
1583 adapter->stats.lfc += IXGB_READ_REG(&adapter->hw, LFC);
1584 adapter->stats.pfrc += IXGB_READ_REG(&adapter->hw, PFRC);
1585 adapter->stats.pftc += IXGB_READ_REG(&adapter->hw, PFTC);
1586 adapter->stats.mcfrc += IXGB_READ_REG(&adapter->hw, MCFRC);
1587 adapter->stats.mcftc += IXGB_READ_REG(&adapter->hw, MCFTC);
1588 adapter->stats.xonrxc += IXGB_READ_REG(&adapter->hw, XONRXC);
1589 adapter->stats.xontxc += IXGB_READ_REG(&adapter->hw, XONTXC);
1590 adapter->stats.xoffrxc += IXGB_READ_REG(&adapter->hw, XOFFRXC);
1591 adapter->stats.xofftxc += IXGB_READ_REG(&adapter->hw, XOFFTXC);
1592 adapter->stats.rjc += IXGB_READ_REG(&adapter->hw, RJC);
1593
1594 /* Fill out the OS statistics structure */
1595
1596 adapter->net_stats.rx_packets = adapter->stats.gprcl;
1597 adapter->net_stats.tx_packets = adapter->stats.gptcl;
1598 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
1599 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
1600 adapter->net_stats.multicast = adapter->stats.mprcl;
1601 adapter->net_stats.collisions = 0;
1602
1603 /* ignore RLEC as it reports errors for padded (<64bytes) frames
1604 * with a length in the type/len field */
1605 adapter->net_stats.rx_errors =
1606 /* adapter->stats.rnbc + */ adapter->stats.crcerrs +
1607 adapter->stats.ruc +
1608 adapter->stats.roc /*+ adapter->stats.rlec */ +
1609 adapter->stats.icbc +
1610 adapter->stats.ecbc + adapter->stats.mpc;
1611
1612 adapter->net_stats.rx_dropped = adapter->stats.mpc;
1613
1614 /* see above
1615 * adapter->net_stats.rx_length_errors = adapter->stats.rlec;
1616 */
1617
1618 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
1619 adapter->net_stats.rx_fifo_errors = adapter->stats.mpc;
1620 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
1621 adapter->net_stats.rx_over_errors = adapter->stats.mpc;
1622
1623 adapter->net_stats.tx_errors = 0;
1624 adapter->net_stats.rx_frame_errors = 0;
1625 adapter->net_stats.tx_aborted_errors = 0;
1626 adapter->net_stats.tx_carrier_errors = 0;
1627 adapter->net_stats.tx_fifo_errors = 0;
1628 adapter->net_stats.tx_heartbeat_errors = 0;
1629 adapter->net_stats.tx_window_errors = 0;
1630}
1631
1632#define IXGB_MAX_INTR 10
1633/**
1634 * ixgb_intr - Interrupt Handler
1635 * @irq: interrupt number
1636 * @data: pointer to a network interface device structure
1637 * @pt_regs: CPU registers structure
1638 **/
1639
1640static irqreturn_t
1641ixgb_intr(int irq, void *data, struct pt_regs *regs)
1642{
1643 struct net_device *netdev = data;
1644 struct ixgb_adapter *adapter = netdev->priv;
1645 struct ixgb_hw *hw = &adapter->hw;
1646 uint32_t icr = IXGB_READ_REG(hw, ICR);
1647#ifndef CONFIG_IXGB_NAPI
1648 unsigned int i;
1649#endif
1650
1651 if(unlikely(!icr))
1652 return IRQ_NONE; /* Not our interrupt */
1653
1654 if(unlikely(icr & (IXGB_INT_RXSEQ | IXGB_INT_LSC))) {
1655 mod_timer(&adapter->watchdog_timer, jiffies);
1656 }
1657
1658#ifdef CONFIG_IXGB_NAPI
1659 if(netif_rx_schedule_prep(netdev)) {
1660
1661 /* Disable interrupts and register for poll. The flush
1662 of the posted write is intentionally left out.
1663 */
1664
1665 atomic_inc(&adapter->irq_sem);
1666 IXGB_WRITE_REG(&adapter->hw, IMC, ~0);
1667 __netif_rx_schedule(netdev);
1668 }
1669#else
1670 /* yes, that is actually a & and it is meant to make sure that
1671 * every pass through this for loop checks both receive and
1672 * transmit queues for completed descriptors, intended to
1673 * avoid starvation issues and assist tx/rx fairness. */
1674 for(i = 0; i < IXGB_MAX_INTR; i++)
1675 if(!ixgb_clean_rx_irq(adapter) &
1676 !ixgb_clean_tx_irq(adapter))
1677 break;
1678#endif
1679 return IRQ_HANDLED;
1680}
1681
1682#ifdef CONFIG_IXGB_NAPI
1683/**
1684 * ixgb_clean - NAPI Rx polling callback
1685 * @adapter: board private structure
1686 **/
1687
1688static int
1689ixgb_clean(struct net_device *netdev, int *budget)
1690{
1691 struct ixgb_adapter *adapter = netdev->priv;
1692 int work_to_do = min(*budget, netdev->quota);
1693 int tx_cleaned;
1694 int work_done = 0;
1695
1696 tx_cleaned = ixgb_clean_tx_irq(adapter);
1697 ixgb_clean_rx_irq(adapter, &work_done, work_to_do);
1698
1699 *budget -= work_done;
1700 netdev->quota -= work_done;
1701
1702 /* if no Tx and not enough Rx work done, exit the polling mode */
1703 if((!tx_cleaned && (work_done == 0)) || !netif_running(netdev)) {
1704 netif_rx_complete(netdev);
1705 ixgb_irq_enable(adapter);
1706 return 0;
1707 }
1708
1709 return 1;
1710}
1711#endif
1712
1713/**
1714 * ixgb_clean_tx_irq - Reclaim resources after transmit completes
1715 * @adapter: board private structure
1716 **/
1717
1718static boolean_t
1719ixgb_clean_tx_irq(struct ixgb_adapter *adapter)
1720{
1721 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1722 struct net_device *netdev = adapter->netdev;
1723 struct ixgb_tx_desc *tx_desc, *eop_desc;
1724 struct ixgb_buffer *buffer_info;
1725 unsigned int i, eop;
1726 boolean_t cleaned = FALSE;
1727
1728 i = tx_ring->next_to_clean;
1729 eop = tx_ring->buffer_info[i].next_to_watch;
1730 eop_desc = IXGB_TX_DESC(*tx_ring, eop);
1731
1732 while(eop_desc->status & IXGB_TX_DESC_STATUS_DD) {
1733
1734 for(cleaned = FALSE; !cleaned; ) {
1735 tx_desc = IXGB_TX_DESC(*tx_ring, i);
1736 buffer_info = &tx_ring->buffer_info[i];
1737
1738 if (tx_desc->popts
1739 & (IXGB_TX_DESC_POPTS_TXSM |
1740 IXGB_TX_DESC_POPTS_IXSM))
1741 adapter->hw_csum_tx_good++;
1742
1743 ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
1744
1745 *(uint32_t *)&(tx_desc->status) = 0;
1746
1747 cleaned = (i == eop);
1748 if(++i == tx_ring->count) i = 0;
1749 }
1750
1751 eop = tx_ring->buffer_info[i].next_to_watch;
1752 eop_desc = IXGB_TX_DESC(*tx_ring, eop);
1753 }
1754
1755 tx_ring->next_to_clean = i;
1756
1757 spin_lock(&adapter->tx_lock);
1758 if(cleaned && netif_queue_stopped(netdev) && netif_carrier_ok(netdev) &&
1759 (IXGB_DESC_UNUSED(tx_ring) > IXGB_TX_QUEUE_WAKE)) {
1760
1761 netif_wake_queue(netdev);
1762 }
1763 spin_unlock(&adapter->tx_lock);
1764
1765 if(adapter->detect_tx_hung) {
1766 /* detect a transmit hang in hardware, this serializes the
1767 * check with the clearing of time_stamp and movement of i */
1768 adapter->detect_tx_hung = FALSE;
1769 if(tx_ring->buffer_info[i].dma &&
1770 time_after(jiffies, tx_ring->buffer_info[i].time_stamp + HZ)
1771 && !(IXGB_READ_REG(&adapter->hw, STATUS) &
1772 IXGB_STATUS_TXOFF))
1773 netif_stop_queue(netdev);
1774 }
1775
1776 return cleaned;
1777}
1778
1779/**
1780 * ixgb_rx_checksum - Receive Checksum Offload for 82597.
1781 * @adapter: board private structure
1782 * @rx_desc: receive descriptor
1783 * @sk_buff: socket buffer with received data
1784 **/
1785
1786static inline void
1787ixgb_rx_checksum(struct ixgb_adapter *adapter,
1788 struct ixgb_rx_desc *rx_desc,
1789 struct sk_buff *skb)
1790{
1791 /* Ignore Checksum bit is set OR
1792 * TCP Checksum has not been calculated
1793 */
1794 if((rx_desc->status & IXGB_RX_DESC_STATUS_IXSM) ||
1795 (!(rx_desc->status & IXGB_RX_DESC_STATUS_TCPCS))) {
1796 skb->ip_summed = CHECKSUM_NONE;
1797 return;
1798 }
1799
1800 /* At this point we know the hardware did the TCP checksum */
1801 /* now look at the TCP checksum error bit */
1802 if(rx_desc->errors & IXGB_RX_DESC_ERRORS_TCPE) {
1803 /* let the stack verify checksum errors */
1804 skb->ip_summed = CHECKSUM_NONE;
1805 adapter->hw_csum_rx_error++;
1806 } else {
1807 /* TCP checksum is good */
1808 skb->ip_summed = CHECKSUM_UNNECESSARY;
1809 adapter->hw_csum_rx_good++;
1810 }
1811}
1812
1813/**
1814 * ixgb_clean_rx_irq - Send received data up the network stack,
1815 * @adapter: board private structure
1816 **/
1817
1818static boolean_t
1819#ifdef CONFIG_IXGB_NAPI
1820ixgb_clean_rx_irq(struct ixgb_adapter *adapter, int *work_done, int work_to_do)
1821#else
1822ixgb_clean_rx_irq(struct ixgb_adapter *adapter)
1823#endif
1824{
1825 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
1826 struct net_device *netdev = adapter->netdev;
1827 struct pci_dev *pdev = adapter->pdev;
1828 struct ixgb_rx_desc *rx_desc, *next_rxd;
1829 struct ixgb_buffer *buffer_info, *next_buffer, *next2_buffer;
1da177e4
LT		 1830 uint32_t length;
1831 unsigned int i, j;
1832 boolean_t cleaned = FALSE;
1833
1834 i = rx_ring->next_to_clean;
1835 rx_desc = IXGB_RX_DESC(*rx_ring, i);
1836 buffer_info = &rx_ring->buffer_info[i];
1837
1838 while(rx_desc->status & IXGB_RX_DESC_STATUS_DD) {
f404de1c
MC		 1839 struct sk_buff *skb, *next_skb;
1840 u8 status;
1da177e4
LT		 1841
1842#ifdef CONFIG_IXGB_NAPI
1843 if(*work_done >= work_to_do)
1844 break;
1845
1846 (*work_done)++;
1847#endif
f404de1c 1848 status = rx_desc->status;
1da177e4 1849 skb = buffer_info->skb;
f404de1c 1850
1da177e4
LT		 1851 prefetch(skb->data);
1852
1853 if(++i == rx_ring->count) i = 0;
1854 next_rxd = IXGB_RX_DESC(*rx_ring, i);
1855 prefetch(next_rxd);
1856
1857 if((j = i + 1) == rx_ring->count) j = 0;
1858 next2_buffer = &rx_ring->buffer_info[j];
1859 prefetch(next2_buffer);
1860
1861 next_buffer = &rx_ring->buffer_info[i];
1862 next_skb = next_buffer->skb;
1863 prefetch(next_skb);
1864
1da177e4
LT		 1865 cleaned = TRUE;
1866
1867 pci_unmap_single(pdev,
1868 buffer_info->dma,
1869 buffer_info->length,
1870 PCI_DMA_FROMDEVICE);
1871
1872 length = le16_to_cpu(rx_desc->length);
1873
f404de1c 1874 if(unlikely(!(status & IXGB_RX_DESC_STATUS_EOP))) {
1da177e4
LT		 1875
1876 /* All receives must fit into a single buffer */
1877
1878 IXGB_DBG("Receive packet consumed multiple buffers "
1879 "length<%x>\n", length);
1880
1881 dev_kfree_skb_irq(skb);
f404de1c 1882 goto rxdesc_done;
1da177e4
LT		 1883 }
1884
1885 if (unlikely(rx_desc->errors
1886 & (IXGB_RX_DESC_ERRORS_CE | IXGB_RX_DESC_ERRORS_SE
1887 | IXGB_RX_DESC_ERRORS_P |
1888 IXGB_RX_DESC_ERRORS_RXE))) {
1889
1890 dev_kfree_skb_irq(skb);
f404de1c 1891 goto rxdesc_done;
1da177e4
LT		 1892 }
1893
1894 /* Good Receive */
1895 skb_put(skb, length);
1896
1897 /* Receive Checksum Offload */
1898 ixgb_rx_checksum(adapter, rx_desc, skb);
1899
1900 skb->protocol = eth_type_trans(skb, netdev);
1901#ifdef CONFIG_IXGB_NAPI
f404de1c 1902 if(adapter->vlgrp && (status & IXGB_RX_DESC_STATUS_VP)) {
1da177e4
LT		 1903 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
1904 le16_to_cpu(rx_desc->special) &
1905 IXGB_RX_DESC_SPECIAL_VLAN_MASK);
1906 } else {
1907 netif_receive_skb(skb);
1908 }
1909#else /* CONFIG_IXGB_NAPI */
f404de1c 1910 if(adapter->vlgrp && (status & IXGB_RX_DESC_STATUS_VP)) {
1da177e4
LT		 1911 vlan_hwaccel_rx(skb, adapter->vlgrp,
1912 le16_to_cpu(rx_desc->special) &
1913 IXGB_RX_DESC_SPECIAL_VLAN_MASK);
1914 } else {
1915 netif_rx(skb);
1916 }
1917#endif /* CONFIG_IXGB_NAPI */
1918 netdev->last_rx = jiffies;
1919
f404de1c
MC		 1920rxdesc_done:
1921 /* clean up descriptor, might be written over by hw */
1da177e4
LT		 1922 rx_desc->status = 0;
1923 buffer_info->skb = NULL;
1924
f404de1c 1925 /* use prefetched values */
1da177e4
LT		 1926 rx_desc = next_rxd;
1927 buffer_info = next_buffer;
1928 }
1929
1930 rx_ring->next_to_clean = i;
1931
1932 ixgb_alloc_rx_buffers(adapter);
1933
1934 return cleaned;
1935}
1936
1937/**
1938 * ixgb_alloc_rx_buffers - Replace used receive buffers
1939 * @adapter: address of board private structure
1940 **/
1941
1942static void
1943ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter)
1944{
1945 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
1946 struct net_device *netdev = adapter->netdev;
1947 struct pci_dev *pdev = adapter->pdev;
1948 struct ixgb_rx_desc *rx_desc;
1949 struct ixgb_buffer *buffer_info;
1950 struct sk_buff *skb;
1951 unsigned int i;
1952 int num_group_tail_writes;
1953 long cleancount;
1954
1955 i = rx_ring->next_to_use;
1956 buffer_info = &rx_ring->buffer_info[i];
1957 cleancount = IXGB_DESC_UNUSED(rx_ring);
1958
1959 num_group_tail_writes = IXGB_RX_BUFFER_WRITE;
1960
41639fed
MC		 1961 /* leave three descriptors unused */
1962 while(--cleancount > 2) {
1da177e4
LT		 1963 rx_desc = IXGB_RX_DESC(*rx_ring, i);
1964
1965 skb = dev_alloc_skb(adapter->rx_buffer_len + NET_IP_ALIGN);
1966
1967 if(unlikely(!skb)) {
1968 /* Better luck next round */
1969 break;
1970 }
1971
1972 /* Make buffer alignment 2 beyond a 16 byte boundary
1973 * this will result in a 16 byte aligned IP header after
1974 * the 14 byte MAC header is removed
1975 */
1976 skb_reserve(skb, NET_IP_ALIGN);
1977
1978 skb->dev = netdev;
1979
1980 buffer_info->skb = skb;
1981 buffer_info->length = adapter->rx_buffer_len;
1982 buffer_info->dma =
1983 pci_map_single(pdev,
1984 skb->data,
1985 adapter->rx_buffer_len,
1986 PCI_DMA_FROMDEVICE);
1987
1988 rx_desc->buff_addr = cpu_to_le64(buffer_info->dma);
41639fed
MC		 1989 /* guarantee DD bit not set now before h/w gets descriptor
1990 * this is the rest of the workaround for h/w double
1991 * writeback. */
1992 rx_desc->status = 0;
1da177e4
LT		 1993
1994 if((i & ~(num_group_tail_writes- 1)) == i) {
1995 /* Force memory writes to complete before letting h/w
1996 * know there are new descriptors to fetch. (Only
1997 * applicable for weak-ordered memory model archs,
1998 * such as IA-64). */
1999 wmb();
2000
2001 IXGB_WRITE_REG(&adapter->hw, RDT, i);
2002 }
2003
2004 if(++i == rx_ring->count) i = 0;
2005 buffer_info = &rx_ring->buffer_info[i];
2006 }
2007
2008 rx_ring->next_to_use = i;
2009}
2010
2011/**
2012 * ixgb_vlan_rx_register - enables or disables vlan tagging/stripping.
2013 *
2014 * @param netdev network interface device structure
2015 * @param grp indicates to enable or disable tagging/stripping
2016 **/
2017static void
2018ixgb_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
2019{
2020 struct ixgb_adapter *adapter = netdev->priv;
2021 uint32_t ctrl, rctl;
2022
2023 ixgb_irq_disable(adapter);
2024 adapter->vlgrp = grp;
2025
2026 if(grp) {
2027 /* enable VLAN tag insert/strip */
2028 ctrl = IXGB_READ_REG(&adapter->hw, CTRL0);
2029 ctrl |= IXGB_CTRL0_VME;
2030 IXGB_WRITE_REG(&adapter->hw, CTRL0, ctrl);
2031
2032 /* enable VLAN receive filtering */
2033
2034 rctl = IXGB_READ_REG(&adapter->hw, RCTL);
2035 rctl |= IXGB_RCTL_VFE;
2036 rctl &= ~IXGB_RCTL_CFIEN;
2037 IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
2038 } else {
2039 /* disable VLAN tag insert/strip */
2040
2041 ctrl = IXGB_READ_REG(&adapter->hw, CTRL0);
2042 ctrl &= ~IXGB_CTRL0_VME;
2043 IXGB_WRITE_REG(&adapter->hw, CTRL0, ctrl);
2044
2045 /* disable VLAN filtering */
2046
2047 rctl = IXGB_READ_REG(&adapter->hw, RCTL);
2048 rctl &= ~IXGB_RCTL_VFE;
2049 IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
2050 }
2051
2052 ixgb_irq_enable(adapter);
2053}
2054
2055static void
2056ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
2057{
2058 struct ixgb_adapter *adapter = netdev->priv;
2059 uint32_t vfta, index;
2060
2061 /* add VID to filter table */
2062
2063 index = (vid >> 5) & 0x7F;
2064 vfta = IXGB_READ_REG_ARRAY(&adapter->hw, VFTA, index);
2065 vfta |= (1 << (vid & 0x1F));
2066 ixgb_write_vfta(&adapter->hw, index, vfta);
2067}
2068
2069static void
2070ixgb_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
2071{
2072 struct ixgb_adapter *adapter = netdev->priv;
2073 uint32_t vfta, index;
2074
2075 ixgb_irq_disable(adapter);
2076
2077 if(adapter->vlgrp)
2078 adapter->vlgrp->vlan_devices[vid] = NULL;
2079
2080 ixgb_irq_enable(adapter);
2081
2082 /* remove VID from filter table*/
2083
2084 index = (vid >> 5) & 0x7F;
2085 vfta = IXGB_READ_REG_ARRAY(&adapter->hw, VFTA, index);
2086 vfta &= ~(1 << (vid & 0x1F));
2087 ixgb_write_vfta(&adapter->hw, index, vfta);
2088}
2089
2090static void
2091ixgb_restore_vlan(struct ixgb_adapter *adapter)
2092{
2093 ixgb_vlan_rx_register(adapter->netdev, adapter->vlgrp);
2094
2095 if(adapter->vlgrp) {
2096 uint16_t vid;
2097 for(vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
2098 if(!adapter->vlgrp->vlan_devices[vid])
2099 continue;
2100 ixgb_vlan_rx_add_vid(adapter->netdev, vid);
2101 }
2102 }
2103}
2104
1da177e4
LT		 2105#ifdef CONFIG_NET_POLL_CONTROLLER
2106/*
2107 * Polling 'interrupt' - used by things like netconsole to send skbs
2108 * without having to re-enable interrupts. It's not called while
2109 * the interrupt routine is executing.
2110 */
2111
2112static void ixgb_netpoll(struct net_device *dev)
2113{
2114 struct ixgb_adapter *adapter = dev->priv;
ac79c82e 2115
1da177e4
LT		 2116 disable_irq(adapter->pdev->irq);
2117 ixgb_intr(adapter->pdev->irq, dev, NULL);
2118 enable_irq(adapter->pdev->irq);
2119}
2120#endif
2121
2122/* ixgb_main.c */
Linux 6.x block layer and io_uring tree(s)