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1da177e4 LT |
1 | /******************************************************************************* |
2 | ||
3 | ||
4 | Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved. | |
5 | ||
6 | This program is free software; you can redistribute it and/or modify it | |
7 | under the terms of the GNU General Public License as published by the Free | |
8 | Software Foundation; either version 2 of the License, or (at your option) | |
9 | any later version. | |
10 | ||
11 | This program is distributed in the hope that it will be useful, but WITHOUT | |
12 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
13 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
14 | more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License along with | |
17 | this program; if not, write to the Free Software Foundation, Inc., 59 | |
18 | Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
19 | ||
20 | The full GNU General Public License is included in this distribution in the | |
21 | file called LICENSE. | |
22 | ||
23 | Contact Information: | |
24 | Linux NICS <linux.nics@intel.com> | |
25 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
26 | ||
27 | *******************************************************************************/ | |
28 | ||
29 | #ifndef _IXGB_H_ | |
30 | #define _IXGB_H_ | |
31 | ||
32 | #include <linux/stddef.h> | |
33 | #include <linux/config.h> | |
34 | #include <linux/module.h> | |
35 | #include <linux/types.h> | |
36 | #include <asm/byteorder.h> | |
37 | #include <linux/init.h> | |
38 | #include <linux/mm.h> | |
39 | #include <linux/errno.h> | |
40 | #include <linux/ioport.h> | |
41 | #include <linux/pci.h> | |
42 | #include <linux/kernel.h> | |
43 | #include <linux/netdevice.h> | |
44 | #include <linux/etherdevice.h> | |
45 | #include <linux/skbuff.h> | |
46 | #include <linux/delay.h> | |
47 | #include <linux/timer.h> | |
48 | #include <linux/slab.h> | |
49 | #include <linux/vmalloc.h> | |
50 | #include <linux/interrupt.h> | |
51 | #include <linux/string.h> | |
52 | #include <linux/pagemap.h> | |
53 | #include <linux/dma-mapping.h> | |
54 | #include <linux/bitops.h> | |
55 | #include <asm/io.h> | |
56 | #include <asm/irq.h> | |
57 | #include <linux/capability.h> | |
58 | #include <linux/in.h> | |
59 | #include <linux/ip.h> | |
60 | #include <linux/tcp.h> | |
61 | #include <linux/udp.h> | |
62 | #include <net/pkt_sched.h> | |
63 | #include <linux/list.h> | |
64 | #include <linux/reboot.h> | |
65 | #ifdef NETIF_F_TSO | |
66 | #include <net/checksum.h> | |
67 | #endif | |
68 | ||
69 | #include <linux/ethtool.h> | |
70 | #include <linux/if_vlan.h> | |
71 | ||
72 | #define BAR_0 0 | |
73 | #define BAR_1 1 | |
74 | #define BAR_5 5 | |
75 | ||
76 | struct ixgb_adapter; | |
77 | #include "ixgb_hw.h" | |
78 | #include "ixgb_ee.h" | |
79 | #include "ixgb_ids.h" | |
80 | ||
81 | #ifdef _DEBUG_DRIVER_ | |
82 | #define IXGB_DBG(args...) printk(KERN_DEBUG "ixgb: " args) | |
83 | #else | |
84 | #define IXGB_DBG(args...) | |
85 | #endif | |
86 | ||
ec9c3f5d AK |
87 | #define PFX "ixgb: " |
88 | #define DPRINTK(nlevel, klevel, fmt, args...) \ | |
89 | (void)((NETIF_MSG_##nlevel & adapter->msg_enable) && \ | |
90 | printk(KERN_##klevel PFX "%s: %s: " fmt, adapter->netdev->name, \ | |
91 | __FUNCTION__ , ## args)) | |
92 | ||
1da177e4 LT |
93 | |
94 | /* TX/RX descriptor defines */ | |
95 | #define DEFAULT_TXD 256 | |
96 | #define MAX_TXD 4096 | |
97 | #define MIN_TXD 64 | |
98 | ||
99 | /* hardware cannot reliably support more than 512 descriptors owned by | |
100 | * hardware descrioptor cache otherwise an unreliable ring under heavy | |
101 | * recieve load may result */ | |
102 | /* #define DEFAULT_RXD 1024 */ | |
103 | /* #define MAX_RXD 4096 */ | |
104 | #define DEFAULT_RXD 512 | |
105 | #define MAX_RXD 512 | |
106 | #define MIN_RXD 64 | |
107 | ||
108 | /* Supported Rx Buffer Sizes */ | |
109 | #define IXGB_RXBUFFER_2048 2048 | |
110 | #define IXGB_RXBUFFER_4096 4096 | |
111 | #define IXGB_RXBUFFER_8192 8192 | |
112 | #define IXGB_RXBUFFER_16384 16384 | |
113 | ||
114 | /* How many Tx Descriptors do we need to call netif_wake_queue? */ | |
115 | #define IXGB_TX_QUEUE_WAKE 16 | |
116 | ||
117 | /* How many Rx Buffers do we bundle into one write to the hardware ? */ | |
0c73f586 | 118 | #define IXGB_RX_BUFFER_WRITE 4 /* Must be power of 2 */ |
1da177e4 LT |
119 | |
120 | /* only works for sizes that are powers of 2 */ | |
121 | #define IXGB_ROUNDUP(i, size) ((i) = (((i) + (size) - 1) & ~((size) - 1))) | |
122 | ||
123 | /* wrapper around a pointer to a socket buffer, | |
124 | * so a DMA handle can be stored along with the buffer */ | |
125 | struct ixgb_buffer { | |
126 | struct sk_buff *skb; | |
b40a1f06 | 127 | dma_addr_t dma; |
1da177e4 LT |
128 | unsigned long time_stamp; |
129 | uint16_t length; | |
130 | uint16_t next_to_watch; | |
131 | }; | |
132 | ||
133 | struct ixgb_desc_ring { | |
134 | /* pointer to the descriptor ring memory */ | |
135 | void *desc; | |
136 | /* physical address of the descriptor ring */ | |
137 | dma_addr_t dma; | |
138 | /* length of descriptor ring in bytes */ | |
139 | unsigned int size; | |
140 | /* number of descriptors in the ring */ | |
141 | unsigned int count; | |
142 | /* next descriptor to associate a buffer with */ | |
143 | unsigned int next_to_use; | |
144 | /* next descriptor to check for DD status bit */ | |
145 | unsigned int next_to_clean; | |
146 | /* array of buffer information structs */ | |
147 | struct ixgb_buffer *buffer_info; | |
148 | }; | |
149 | ||
150 | #define IXGB_DESC_UNUSED(R) \ | |
151 | ((((R)->next_to_clean > (R)->next_to_use) ? 0 : (R)->count) + \ | |
152 | (R)->next_to_clean - (R)->next_to_use - 1) | |
153 | ||
154 | #define IXGB_GET_DESC(R, i, type) (&(((struct type *)((R).desc))[i])) | |
155 | #define IXGB_RX_DESC(R, i) IXGB_GET_DESC(R, i, ixgb_rx_desc) | |
156 | #define IXGB_TX_DESC(R, i) IXGB_GET_DESC(R, i, ixgb_tx_desc) | |
157 | #define IXGB_CONTEXT_DESC(R, i) IXGB_GET_DESC(R, i, ixgb_context_desc) | |
158 | ||
159 | /* board specific private data structure */ | |
160 | ||
161 | struct ixgb_adapter { | |
162 | struct timer_list watchdog_timer; | |
163 | struct vlan_group *vlgrp; | |
164 | uint32_t bd_number; | |
165 | uint32_t rx_buffer_len; | |
166 | uint32_t part_num; | |
167 | uint16_t link_speed; | |
168 | uint16_t link_duplex; | |
169 | spinlock_t tx_lock; | |
170 | atomic_t irq_sem; | |
171 | struct work_struct tx_timeout_task; | |
172 | ||
173 | struct timer_list blink_timer; | |
174 | unsigned long led_status; | |
175 | ||
176 | /* TX */ | |
177 | struct ixgb_desc_ring tx_ring; | |
178 | unsigned long timeo_start; | |
179 | uint32_t tx_cmd_type; | |
180 | uint64_t hw_csum_tx_good; | |
181 | uint64_t hw_csum_tx_error; | |
182 | uint32_t tx_int_delay; | |
9b8118df | 183 | uint32_t tx_timeout_count; |
1da177e4 LT |
184 | boolean_t tx_int_delay_enable; |
185 | boolean_t detect_tx_hung; | |
186 | ||
187 | /* RX */ | |
188 | struct ixgb_desc_ring rx_ring; | |
189 | uint64_t hw_csum_rx_error; | |
190 | uint64_t hw_csum_rx_good; | |
191 | uint32_t rx_int_delay; | |
192 | boolean_t rx_csum; | |
193 | ||
194 | /* OS defined structs */ | |
195 | struct net_device *netdev; | |
196 | struct pci_dev *pdev; | |
197 | struct net_device_stats net_stats; | |
198 | ||
199 | /* structs defined in ixgb_hw.h */ | |
200 | struct ixgb_hw hw; | |
ec9c3f5d | 201 | u16 msg_enable; |
1da177e4 LT |
202 | struct ixgb_hw_stats stats; |
203 | #ifdef CONFIG_PCI_MSI | |
204 | boolean_t have_msi; | |
205 | #endif | |
206 | }; | |
207 | #endif /* _IXGB_H_ */ |