Commit | Line | Data |
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6f475c01 NP |
1 | /* |
2 | * linux/drivers/net/irda/pxaficp_ir.c | |
3 | * | |
4 | * Based on sa1100_ir.c by Russell King | |
5 | * | |
6 | * Changes copyright (C) 2003-2005 MontaVista Software, Inc. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | * | |
12 | * Infra-red driver (SIR/FIR) for the PXA2xx embedded microprocessor | |
13 | * | |
14 | */ | |
6f475c01 | 15 | #include <linux/module.h> |
6f475c01 | 16 | #include <linux/netdevice.h> |
f6a26293 | 17 | #include <linux/etherdevice.h> |
d052d1be | 18 | #include <linux/platform_device.h> |
82d553c6 | 19 | #include <linux/clk.h> |
6f475c01 NP |
20 | |
21 | #include <net/irda/irda.h> | |
22 | #include <net/irda/irmod.h> | |
23 | #include <net/irda/wrapper.h> | |
24 | #include <net/irda/irda_device.h> | |
25 | ||
dcea83ad | 26 | #include <mach/dma.h> |
a09e64fb | 27 | #include <mach/irda.h> |
02f65262 | 28 | #include <mach/regs-uart.h> |
5bf3df3f | 29 | #include <mach/regs-ost.h> |
6f475c01 | 30 | |
b40ddf57 EM |
31 | #define FICP __REG(0x40800000) /* Start of FICP area */ |
32 | #define ICCR0 __REG(0x40800000) /* ICP Control Register 0 */ | |
33 | #define ICCR1 __REG(0x40800004) /* ICP Control Register 1 */ | |
34 | #define ICCR2 __REG(0x40800008) /* ICP Control Register 2 */ | |
35 | #define ICDR __REG(0x4080000c) /* ICP Data Register */ | |
36 | #define ICSR0 __REG(0x40800014) /* ICP Status Register 0 */ | |
37 | #define ICSR1 __REG(0x40800018) /* ICP Status Register 1 */ | |
38 | ||
39 | #define ICCR0_AME (1 << 7) /* Address match enable */ | |
40 | #define ICCR0_TIE (1 << 6) /* Transmit FIFO interrupt enable */ | |
41 | #define ICCR0_RIE (1 << 5) /* Recieve FIFO interrupt enable */ | |
42 | #define ICCR0_RXE (1 << 4) /* Receive enable */ | |
43 | #define ICCR0_TXE (1 << 3) /* Transmit enable */ | |
44 | #define ICCR0_TUS (1 << 2) /* Transmit FIFO underrun select */ | |
45 | #define ICCR0_LBM (1 << 1) /* Loopback mode */ | |
46 | #define ICCR0_ITR (1 << 0) /* IrDA transmission */ | |
47 | ||
48 | #define ICCR2_RXP (1 << 3) /* Receive Pin Polarity select */ | |
49 | #define ICCR2_TXP (1 << 2) /* Transmit Pin Polarity select */ | |
50 | #define ICCR2_TRIG (3 << 0) /* Receive FIFO Trigger threshold */ | |
51 | #define ICCR2_TRIG_8 (0 << 0) /* >= 8 bytes */ | |
52 | #define ICCR2_TRIG_16 (1 << 0) /* >= 16 bytes */ | |
53 | #define ICCR2_TRIG_32 (2 << 0) /* >= 32 bytes */ | |
54 | ||
55 | #ifdef CONFIG_PXA27x | |
56 | #define ICSR0_EOC (1 << 6) /* DMA End of Descriptor Chain */ | |
57 | #endif | |
58 | #define ICSR0_FRE (1 << 5) /* Framing error */ | |
59 | #define ICSR0_RFS (1 << 4) /* Receive FIFO service request */ | |
60 | #define ICSR0_TFS (1 << 3) /* Transnit FIFO service request */ | |
61 | #define ICSR0_RAB (1 << 2) /* Receiver abort */ | |
62 | #define ICSR0_TUR (1 << 1) /* Trunsmit FIFO underun */ | |
63 | #define ICSR0_EIF (1 << 0) /* End/Error in FIFO */ | |
64 | ||
65 | #define ICSR1_ROR (1 << 6) /* Receiver FIFO underrun */ | |
66 | #define ICSR1_CRE (1 << 5) /* CRC error */ | |
67 | #define ICSR1_EOF (1 << 4) /* End of frame */ | |
68 | #define ICSR1_TNF (1 << 3) /* Transmit FIFO not full */ | |
69 | #define ICSR1_RNE (1 << 2) /* Receive FIFO not empty */ | |
70 | #define ICSR1_TBY (1 << 1) /* Tramsmiter busy flag */ | |
71 | #define ICSR1_RSY (1 << 0) /* Recevier synchronized flag */ | |
6f475c01 | 72 | |
6f475c01 NP |
73 | #define IrSR_RXPL_NEG_IS_ZERO (1<<4) |
74 | #define IrSR_RXPL_POS_IS_ZERO 0x0 | |
75 | #define IrSR_TXPL_NEG_IS_ZERO (1<<3) | |
76 | #define IrSR_TXPL_POS_IS_ZERO 0x0 | |
77 | #define IrSR_XMODE_PULSE_1_6 (1<<2) | |
78 | #define IrSR_XMODE_PULSE_3_16 0x0 | |
79 | #define IrSR_RCVEIR_IR_MODE (1<<1) | |
80 | #define IrSR_RCVEIR_UART_MODE 0x0 | |
81 | #define IrSR_XMITIR_IR_MODE (1<<0) | |
82 | #define IrSR_XMITIR_UART_MODE 0x0 | |
83 | ||
84 | #define IrSR_IR_RECEIVE_ON (\ | |
85 | IrSR_RXPL_NEG_IS_ZERO | \ | |
86 | IrSR_TXPL_POS_IS_ZERO | \ | |
87 | IrSR_XMODE_PULSE_3_16 | \ | |
88 | IrSR_RCVEIR_IR_MODE | \ | |
89 | IrSR_XMITIR_UART_MODE) | |
90 | ||
91 | #define IrSR_IR_TRANSMIT_ON (\ | |
92 | IrSR_RXPL_NEG_IS_ZERO | \ | |
93 | IrSR_TXPL_POS_IS_ZERO | \ | |
94 | IrSR_XMODE_PULSE_3_16 | \ | |
95 | IrSR_RCVEIR_UART_MODE | \ | |
96 | IrSR_XMITIR_IR_MODE) | |
97 | ||
98 | struct pxa_irda { | |
99 | int speed; | |
100 | int newspeed; | |
101 | unsigned long last_oscr; | |
102 | ||
103 | unsigned char *dma_rx_buff; | |
104 | unsigned char *dma_tx_buff; | |
105 | dma_addr_t dma_rx_buff_phy; | |
106 | dma_addr_t dma_tx_buff_phy; | |
107 | unsigned int dma_tx_buff_len; | |
108 | int txdma; | |
109 | int rxdma; | |
110 | ||
6f475c01 NP |
111 | struct irlap_cb *irlap; |
112 | struct qos_info qos; | |
113 | ||
114 | iobuff_t tx_buff; | |
115 | iobuff_t rx_buff; | |
116 | ||
117 | struct device *dev; | |
118 | struct pxaficp_platform_data *pdata; | |
82d553c6 RK |
119 | struct clk *fir_clk; |
120 | struct clk *sir_clk; | |
121 | struct clk *cur_clk; | |
6f475c01 NP |
122 | }; |
123 | ||
82d553c6 RK |
124 | static inline void pxa_irda_disable_clk(struct pxa_irda *si) |
125 | { | |
126 | if (si->cur_clk) | |
127 | clk_disable(si->cur_clk); | |
128 | si->cur_clk = NULL; | |
129 | } | |
130 | ||
131 | static inline void pxa_irda_enable_firclk(struct pxa_irda *si) | |
132 | { | |
133 | si->cur_clk = si->fir_clk; | |
134 | clk_enable(si->fir_clk); | |
135 | } | |
136 | ||
137 | static inline void pxa_irda_enable_sirclk(struct pxa_irda *si) | |
138 | { | |
139 | si->cur_clk = si->sir_clk; | |
140 | clk_enable(si->sir_clk); | |
141 | } | |
142 | ||
6f475c01 NP |
143 | |
144 | #define IS_FIR(si) ((si)->speed >= 4000000) | |
145 | #define IRDA_FRAME_SIZE_LIMIT 2047 | |
146 | ||
147 | inline static void pxa_irda_fir_dma_rx_start(struct pxa_irda *si) | |
148 | { | |
149 | DCSR(si->rxdma) = DCSR_NODESC; | |
150 | DSADR(si->rxdma) = __PREG(ICDR); | |
151 | DTADR(si->rxdma) = si->dma_rx_buff_phy; | |
152 | DCMD(si->rxdma) = DCMD_INCTRGADDR | DCMD_FLOWSRC | DCMD_WIDTH1 | DCMD_BURST32 | IRDA_FRAME_SIZE_LIMIT; | |
153 | DCSR(si->rxdma) |= DCSR_RUN; | |
154 | } | |
155 | ||
156 | inline static void pxa_irda_fir_dma_tx_start(struct pxa_irda *si) | |
157 | { | |
158 | DCSR(si->txdma) = DCSR_NODESC; | |
159 | DSADR(si->txdma) = si->dma_tx_buff_phy; | |
160 | DTADR(si->txdma) = __PREG(ICDR); | |
161 | DCMD(si->txdma) = DCMD_INCSRCADDR | DCMD_FLOWTRG | DCMD_ENDIRQEN | DCMD_WIDTH1 | DCMD_BURST32 | si->dma_tx_buff_len; | |
162 | DCSR(si->txdma) |= DCSR_RUN; | |
163 | } | |
164 | ||
165 | /* | |
166 | * Set the IrDA communications speed. | |
167 | */ | |
168 | static int pxa_irda_set_speed(struct pxa_irda *si, int speed) | |
169 | { | |
170 | unsigned long flags; | |
171 | unsigned int divisor; | |
172 | ||
173 | switch (speed) { | |
174 | case 9600: case 19200: case 38400: | |
175 | case 57600: case 115200: | |
176 | ||
177 | /* refer to PXA250/210 Developer's Manual 10-7 */ | |
178 | /* BaudRate = 14.7456 MHz / (16*Divisor) */ | |
179 | divisor = 14745600 / (16 * speed); | |
180 | ||
181 | local_irq_save(flags); | |
182 | ||
183 | if (IS_FIR(si)) { | |
184 | /* stop RX DMA */ | |
185 | DCSR(si->rxdma) &= ~DCSR_RUN; | |
186 | /* disable FICP */ | |
187 | ICCR0 = 0; | |
82d553c6 | 188 | pxa_irda_disable_clk(si); |
6f475c01 NP |
189 | |
190 | /* set board transceiver to SIR mode */ | |
191 | si->pdata->transceiver_mode(si->dev, IR_SIRMODE); | |
192 | ||
6f475c01 | 193 | /* enable the STUART clock */ |
82d553c6 | 194 | pxa_irda_enable_sirclk(si); |
6f475c01 NP |
195 | } |
196 | ||
197 | /* disable STUART first */ | |
198 | STIER = 0; | |
199 | ||
200 | /* access DLL & DLH */ | |
201 | STLCR |= LCR_DLAB; | |
202 | STDLL = divisor & 0xff; | |
203 | STDLH = divisor >> 8; | |
204 | STLCR &= ~LCR_DLAB; | |
205 | ||
206 | si->speed = speed; | |
207 | STISR = IrSR_IR_RECEIVE_ON | IrSR_XMODE_PULSE_1_6; | |
208 | STIER = IER_UUE | IER_RLSE | IER_RAVIE | IER_RTIOE; | |
209 | ||
210 | local_irq_restore(flags); | |
211 | break; | |
212 | ||
213 | case 4000000: | |
214 | local_irq_save(flags); | |
215 | ||
216 | /* disable STUART */ | |
217 | STIER = 0; | |
218 | STISR = 0; | |
82d553c6 | 219 | pxa_irda_disable_clk(si); |
6f475c01 NP |
220 | |
221 | /* disable FICP first */ | |
222 | ICCR0 = 0; | |
223 | ||
224 | /* set board transceiver to FIR mode */ | |
225 | si->pdata->transceiver_mode(si->dev, IR_FIRMODE); | |
226 | ||
6f475c01 | 227 | /* enable the FICP clock */ |
82d553c6 | 228 | pxa_irda_enable_firclk(si); |
6f475c01 NP |
229 | |
230 | si->speed = speed; | |
231 | pxa_irda_fir_dma_rx_start(si); | |
232 | ICCR0 = ICCR0_ITR | ICCR0_RXE; | |
233 | ||
234 | local_irq_restore(flags); | |
235 | break; | |
236 | ||
237 | default: | |
238 | return -EINVAL; | |
239 | } | |
240 | ||
241 | return 0; | |
242 | } | |
243 | ||
244 | /* SIR interrupt service routine. */ | |
7d12e780 | 245 | static irqreturn_t pxa_irda_sir_irq(int irq, void *dev_id) |
6f475c01 NP |
246 | { |
247 | struct net_device *dev = dev_id; | |
248 | struct pxa_irda *si = netdev_priv(dev); | |
249 | int iir, lsr, data; | |
250 | ||
251 | iir = STIIR; | |
252 | ||
253 | switch (iir & 0x0F) { | |
254 | case 0x06: /* Receiver Line Status */ | |
255 | lsr = STLSR; | |
256 | while (lsr & LSR_FIFOE) { | |
257 | data = STRBR; | |
258 | if (lsr & (LSR_OE | LSR_PE | LSR_FE | LSR_BI)) { | |
259 | printk(KERN_DEBUG "pxa_ir: sir receiving error\n"); | |
af049081 | 260 | dev->stats.rx_errors++; |
6f475c01 | 261 | if (lsr & LSR_FE) |
af049081 | 262 | dev->stats.rx_frame_errors++; |
6f475c01 | 263 | if (lsr & LSR_OE) |
af049081 | 264 | dev->stats.rx_fifo_errors++; |
6f475c01 | 265 | } else { |
af049081 SH |
266 | dev->stats.rx_bytes++; |
267 | async_unwrap_char(dev, &dev->stats, | |
268 | &si->rx_buff, data); | |
6f475c01 NP |
269 | } |
270 | lsr = STLSR; | |
271 | } | |
6f475c01 NP |
272 | si->last_oscr = OSCR; |
273 | break; | |
274 | ||
275 | case 0x04: /* Received Data Available */ | |
276 | /* forth through */ | |
277 | ||
278 | case 0x0C: /* Character Timeout Indication */ | |
279 | do { | |
af049081 SH |
280 | dev->stats.rx_bytes++; |
281 | async_unwrap_char(dev, &dev->stats, &si->rx_buff, STRBR); | |
6f475c01 | 282 | } while (STLSR & LSR_DR); |
6f475c01 NP |
283 | si->last_oscr = OSCR; |
284 | break; | |
285 | ||
286 | case 0x02: /* Transmit FIFO Data Request */ | |
287 | while ((si->tx_buff.len) && (STLSR & LSR_TDRQ)) { | |
288 | STTHR = *si->tx_buff.data++; | |
289 | si->tx_buff.len -= 1; | |
290 | } | |
291 | ||
292 | if (si->tx_buff.len == 0) { | |
af049081 SH |
293 | dev->stats.tx_packets++; |
294 | dev->stats.tx_bytes += si->tx_buff.data - si->tx_buff.head; | |
6f475c01 NP |
295 | |
296 | /* We need to ensure that the transmitter has finished. */ | |
297 | while ((STLSR & LSR_TEMT) == 0) | |
298 | cpu_relax(); | |
299 | si->last_oscr = OSCR; | |
300 | ||
301 | /* | |
302 | * Ok, we've finished transmitting. Now enable | |
303 | * the receiver. Sometimes we get a receive IRQ | |
304 | * immediately after a transmit... | |
305 | */ | |
306 | if (si->newspeed) { | |
307 | pxa_irda_set_speed(si, si->newspeed); | |
308 | si->newspeed = 0; | |
309 | } else { | |
310 | /* enable IR Receiver, disable IR Transmitter */ | |
311 | STISR = IrSR_IR_RECEIVE_ON | IrSR_XMODE_PULSE_1_6; | |
312 | /* enable STUART and receive interrupts */ | |
313 | STIER = IER_UUE | IER_RLSE | IER_RAVIE | IER_RTIOE; | |
314 | } | |
315 | /* I'm hungry! */ | |
316 | netif_wake_queue(dev); | |
317 | } | |
318 | break; | |
319 | } | |
320 | ||
321 | return IRQ_HANDLED; | |
322 | } | |
323 | ||
324 | /* FIR Receive DMA interrupt handler */ | |
7d12e780 | 325 | static void pxa_irda_fir_dma_rx_irq(int channel, void *data) |
6f475c01 NP |
326 | { |
327 | int dcsr = DCSR(channel); | |
328 | ||
329 | DCSR(channel) = dcsr & ~DCSR_RUN; | |
330 | ||
331 | printk(KERN_DEBUG "pxa_ir: fir rx dma bus error %#x\n", dcsr); | |
332 | } | |
333 | ||
334 | /* FIR Transmit DMA interrupt handler */ | |
7d12e780 | 335 | static void pxa_irda_fir_dma_tx_irq(int channel, void *data) |
6f475c01 NP |
336 | { |
337 | struct net_device *dev = data; | |
338 | struct pxa_irda *si = netdev_priv(dev); | |
339 | int dcsr; | |
340 | ||
341 | dcsr = DCSR(channel); | |
342 | DCSR(channel) = dcsr & ~DCSR_RUN; | |
343 | ||
344 | if (dcsr & DCSR_ENDINTR) { | |
af049081 SH |
345 | dev->stats.tx_packets++; |
346 | dev->stats.tx_bytes += si->dma_tx_buff_len; | |
6f475c01 | 347 | } else { |
af049081 | 348 | dev->stats.tx_errors++; |
6f475c01 NP |
349 | } |
350 | ||
351 | while (ICSR1 & ICSR1_TBY) | |
352 | cpu_relax(); | |
353 | si->last_oscr = OSCR; | |
354 | ||
355 | /* | |
356 | * HACK: It looks like the TBY bit is dropped too soon. | |
357 | * Without this delay things break. | |
358 | */ | |
359 | udelay(120); | |
360 | ||
361 | if (si->newspeed) { | |
362 | pxa_irda_set_speed(si, si->newspeed); | |
363 | si->newspeed = 0; | |
364 | } else { | |
9a4d93d4 GL |
365 | int i = 64; |
366 | ||
6f475c01 NP |
367 | ICCR0 = 0; |
368 | pxa_irda_fir_dma_rx_start(si); | |
9a4d93d4 GL |
369 | while ((ICSR1 & ICSR1_RNE) && i--) |
370 | (void)ICDR; | |
6f475c01 | 371 | ICCR0 = ICCR0_ITR | ICCR0_RXE; |
9a4d93d4 GL |
372 | |
373 | if (i < 0) | |
374 | printk(KERN_ERR "pxa_ir: cannot clear Rx FIFO!\n"); | |
6f475c01 NP |
375 | } |
376 | netif_wake_queue(dev); | |
377 | } | |
378 | ||
379 | /* EIF(Error in FIFO/End in Frame) handler for FIR */ | |
9a4d93d4 | 380 | static void pxa_irda_fir_irq_eif(struct pxa_irda *si, struct net_device *dev, int icsr0) |
6f475c01 NP |
381 | { |
382 | unsigned int len, stat, data; | |
383 | ||
384 | /* Get the current data position. */ | |
385 | len = DTADR(si->rxdma) - si->dma_rx_buff_phy; | |
386 | ||
387 | do { | |
388 | /* Read Status, and then Data. */ | |
389 | stat = ICSR1; | |
390 | rmb(); | |
391 | data = ICDR; | |
392 | ||
393 | if (stat & (ICSR1_CRE | ICSR1_ROR)) { | |
af049081 | 394 | dev->stats.rx_errors++; |
6f475c01 NP |
395 | if (stat & ICSR1_CRE) { |
396 | printk(KERN_DEBUG "pxa_ir: fir receive CRC error\n"); | |
af049081 | 397 | dev->stats.rx_crc_errors++; |
6f475c01 NP |
398 | } |
399 | if (stat & ICSR1_ROR) { | |
400 | printk(KERN_DEBUG "pxa_ir: fir receive overrun\n"); | |
af049081 | 401 | dev->stats.rx_over_errors++; |
6f475c01 NP |
402 | } |
403 | } else { | |
404 | si->dma_rx_buff[len++] = data; | |
405 | } | |
406 | /* If we hit the end of frame, there's no point in continuing. */ | |
407 | if (stat & ICSR1_EOF) | |
408 | break; | |
409 | } while (ICSR0 & ICSR0_EIF); | |
410 | ||
411 | if (stat & ICSR1_EOF) { | |
412 | /* end of frame. */ | |
9a4d93d4 GL |
413 | struct sk_buff *skb; |
414 | ||
415 | if (icsr0 & ICSR0_FRE) { | |
416 | printk(KERN_ERR "pxa_ir: dropping erroneous frame\n"); | |
af049081 | 417 | dev->stats.rx_dropped++; |
9a4d93d4 GL |
418 | return; |
419 | } | |
420 | ||
421 | skb = alloc_skb(len+1,GFP_ATOMIC); | |
6f475c01 NP |
422 | if (!skb) { |
423 | printk(KERN_ERR "pxa_ir: fir out of memory for receive skb\n"); | |
af049081 | 424 | dev->stats.rx_dropped++; |
6f475c01 NP |
425 | return; |
426 | } | |
427 | ||
428 | /* Align IP header to 20 bytes */ | |
429 | skb_reserve(skb, 1); | |
27d7ff46 | 430 | skb_copy_to_linear_data(skb, si->dma_rx_buff, len); |
6f475c01 NP |
431 | skb_put(skb, len); |
432 | ||
433 | /* Feed it to IrLAP */ | |
434 | skb->dev = dev; | |
459a98ed | 435 | skb_reset_mac_header(skb); |
6f475c01 NP |
436 | skb->protocol = htons(ETH_P_IRDA); |
437 | netif_rx(skb); | |
438 | ||
af049081 SH |
439 | dev->stats.rx_packets++; |
440 | dev->stats.rx_bytes += len; | |
6f475c01 NP |
441 | } |
442 | } | |
443 | ||
444 | /* FIR interrupt handler */ | |
7d12e780 | 445 | static irqreturn_t pxa_irda_fir_irq(int irq, void *dev_id) |
6f475c01 NP |
446 | { |
447 | struct net_device *dev = dev_id; | |
448 | struct pxa_irda *si = netdev_priv(dev); | |
9a4d93d4 | 449 | int icsr0, i = 64; |
6f475c01 NP |
450 | |
451 | /* stop RX DMA */ | |
452 | DCSR(si->rxdma) &= ~DCSR_RUN; | |
453 | si->last_oscr = OSCR; | |
454 | icsr0 = ICSR0; | |
455 | ||
456 | if (icsr0 & (ICSR0_FRE | ICSR0_RAB)) { | |
457 | if (icsr0 & ICSR0_FRE) { | |
458 | printk(KERN_DEBUG "pxa_ir: fir receive frame error\n"); | |
af049081 | 459 | dev->stats.rx_frame_errors++; |
6f475c01 NP |
460 | } else { |
461 | printk(KERN_DEBUG "pxa_ir: fir receive abort\n"); | |
af049081 | 462 | dev->stats.rx_errors++; |
6f475c01 NP |
463 | } |
464 | ICSR0 = icsr0 & (ICSR0_FRE | ICSR0_RAB); | |
465 | } | |
466 | ||
467 | if (icsr0 & ICSR0_EIF) { | |
468 | /* An error in FIFO occured, or there is a end of frame */ | |
9a4d93d4 | 469 | pxa_irda_fir_irq_eif(si, dev, icsr0); |
6f475c01 NP |
470 | } |
471 | ||
472 | ICCR0 = 0; | |
473 | pxa_irda_fir_dma_rx_start(si); | |
9a4d93d4 GL |
474 | while ((ICSR1 & ICSR1_RNE) && i--) |
475 | (void)ICDR; | |
6f475c01 NP |
476 | ICCR0 = ICCR0_ITR | ICCR0_RXE; |
477 | ||
9a4d93d4 GL |
478 | if (i < 0) |
479 | printk(KERN_ERR "pxa_ir: cannot clear Rx FIFO!\n"); | |
480 | ||
6f475c01 NP |
481 | return IRQ_HANDLED; |
482 | } | |
483 | ||
484 | /* hard_xmit interface of irda device */ | |
485 | static int pxa_irda_hard_xmit(struct sk_buff *skb, struct net_device *dev) | |
486 | { | |
487 | struct pxa_irda *si = netdev_priv(dev); | |
488 | int speed = irda_get_next_speed(skb); | |
489 | ||
490 | /* | |
491 | * Does this packet contain a request to change the interface | |
492 | * speed? If so, remember it until we complete the transmission | |
493 | * of this frame. | |
494 | */ | |
495 | if (speed != si->speed && speed != -1) | |
496 | si->newspeed = speed; | |
497 | ||
498 | /* | |
499 | * If this is an empty frame, we can bypass a lot. | |
500 | */ | |
501 | if (skb->len == 0) { | |
502 | if (si->newspeed) { | |
503 | si->newspeed = 0; | |
504 | pxa_irda_set_speed(si, speed); | |
505 | } | |
506 | dev_kfree_skb(skb); | |
507 | return 0; | |
508 | } | |
509 | ||
510 | netif_stop_queue(dev); | |
511 | ||
512 | if (!IS_FIR(si)) { | |
513 | si->tx_buff.data = si->tx_buff.head; | |
514 | si->tx_buff.len = async_wrap_skb(skb, si->tx_buff.data, si->tx_buff.truesize); | |
515 | ||
516 | /* Disable STUART interrupts and switch to transmit mode. */ | |
517 | STIER = 0; | |
518 | STISR = IrSR_IR_TRANSMIT_ON | IrSR_XMODE_PULSE_1_6; | |
519 | ||
520 | /* enable STUART and transmit interrupts */ | |
521 | STIER = IER_UUE | IER_TIE; | |
522 | } else { | |
523 | unsigned long mtt = irda_get_mtt(skb); | |
524 | ||
525 | si->dma_tx_buff_len = skb->len; | |
d626f62b | 526 | skb_copy_from_linear_data(skb, si->dma_tx_buff, skb->len); |
6f475c01 NP |
527 | |
528 | if (mtt) | |
529 | while ((unsigned)(OSCR - si->last_oscr)/4 < mtt) | |
530 | cpu_relax(); | |
531 | ||
532 | /* stop RX DMA, disable FICP */ | |
533 | DCSR(si->rxdma) &= ~DCSR_RUN; | |
534 | ICCR0 = 0; | |
535 | ||
536 | pxa_irda_fir_dma_tx_start(si); | |
537 | ICCR0 = ICCR0_ITR | ICCR0_TXE; | |
538 | } | |
539 | ||
540 | dev_kfree_skb(skb); | |
541 | dev->trans_start = jiffies; | |
542 | return 0; | |
543 | } | |
544 | ||
545 | static int pxa_irda_ioctl(struct net_device *dev, struct ifreq *ifreq, int cmd) | |
546 | { | |
547 | struct if_irda_req *rq = (struct if_irda_req *)ifreq; | |
548 | struct pxa_irda *si = netdev_priv(dev); | |
549 | int ret; | |
550 | ||
551 | switch (cmd) { | |
552 | case SIOCSBANDWIDTH: | |
553 | ret = -EPERM; | |
554 | if (capable(CAP_NET_ADMIN)) { | |
555 | /* | |
556 | * We are unable to set the speed if the | |
557 | * device is not running. | |
558 | */ | |
559 | if (netif_running(dev)) { | |
560 | ret = pxa_irda_set_speed(si, | |
561 | rq->ifr_baudrate); | |
562 | } else { | |
563 | printk(KERN_INFO "pxa_ir: SIOCSBANDWIDTH: !netif_running\n"); | |
564 | ret = 0; | |
565 | } | |
566 | } | |
567 | break; | |
568 | ||
569 | case SIOCSMEDIABUSY: | |
570 | ret = -EPERM; | |
571 | if (capable(CAP_NET_ADMIN)) { | |
572 | irda_device_set_media_busy(dev, TRUE); | |
573 | ret = 0; | |
574 | } | |
575 | break; | |
576 | ||
577 | case SIOCGRECEIVING: | |
578 | ret = 0; | |
579 | rq->ifr_receiving = IS_FIR(si) ? 0 | |
580 | : si->rx_buff.state != OUTSIDE_FRAME; | |
581 | break; | |
582 | ||
583 | default: | |
584 | ret = -EOPNOTSUPP; | |
585 | break; | |
586 | } | |
587 | ||
588 | return ret; | |
589 | } | |
590 | ||
6f475c01 NP |
591 | static void pxa_irda_startup(struct pxa_irda *si) |
592 | { | |
593 | /* Disable STUART interrupts */ | |
594 | STIER = 0; | |
595 | /* enable STUART interrupt to the processor */ | |
596 | STMCR = MCR_OUT2; | |
597 | /* configure SIR frame format: StartBit - Data 7 ... Data 0 - Stop Bit */ | |
598 | STLCR = LCR_WLS0 | LCR_WLS1; | |
599 | /* enable FIFO, we use FIFO to improve performance */ | |
600 | STFCR = FCR_TRFIFOE | FCR_ITL_32; | |
601 | ||
602 | /* disable FICP */ | |
603 | ICCR0 = 0; | |
604 | /* configure FICP ICCR2 */ | |
605 | ICCR2 = ICCR2_TXP | ICCR2_TRIG_32; | |
606 | ||
607 | /* configure DMAC */ | |
87f3dd77 EM |
608 | DRCMR(17) = si->rxdma | DRCMR_MAPVLD; |
609 | DRCMR(18) = si->txdma | DRCMR_MAPVLD; | |
6f475c01 NP |
610 | |
611 | /* force SIR reinitialization */ | |
612 | si->speed = 4000000; | |
613 | pxa_irda_set_speed(si, 9600); | |
614 | ||
615 | printk(KERN_DEBUG "pxa_ir: irda startup\n"); | |
616 | } | |
617 | ||
618 | static void pxa_irda_shutdown(struct pxa_irda *si) | |
619 | { | |
620 | unsigned long flags; | |
621 | ||
622 | local_irq_save(flags); | |
623 | ||
624 | /* disable STUART and interrupt */ | |
625 | STIER = 0; | |
626 | /* disable STUART SIR mode */ | |
627 | STISR = 0; | |
6f475c01 NP |
628 | |
629 | /* disable DMA */ | |
630 | DCSR(si->txdma) &= ~DCSR_RUN; | |
631 | DCSR(si->rxdma) &= ~DCSR_RUN; | |
632 | /* disable FICP */ | |
633 | ICCR0 = 0; | |
82d553c6 RK |
634 | |
635 | /* disable the STUART or FICP clocks */ | |
636 | pxa_irda_disable_clk(si); | |
6f475c01 | 637 | |
87f3dd77 EM |
638 | DRCMR(17) = 0; |
639 | DRCMR(18) = 0; | |
6f475c01 NP |
640 | |
641 | local_irq_restore(flags); | |
642 | ||
643 | /* power off board transceiver */ | |
644 | si->pdata->transceiver_mode(si->dev, IR_OFF); | |
645 | ||
646 | printk(KERN_DEBUG "pxa_ir: irda shutdown\n"); | |
647 | } | |
648 | ||
649 | static int pxa_irda_start(struct net_device *dev) | |
650 | { | |
651 | struct pxa_irda *si = netdev_priv(dev); | |
652 | int err; | |
653 | ||
654 | si->speed = 9600; | |
655 | ||
656 | err = request_irq(IRQ_STUART, pxa_irda_sir_irq, 0, dev->name, dev); | |
657 | if (err) | |
658 | goto err_irq1; | |
659 | ||
660 | err = request_irq(IRQ_ICP, pxa_irda_fir_irq, 0, dev->name, dev); | |
661 | if (err) | |
662 | goto err_irq2; | |
663 | ||
664 | /* | |
665 | * The interrupt must remain disabled for now. | |
666 | */ | |
667 | disable_irq(IRQ_STUART); | |
668 | disable_irq(IRQ_ICP); | |
669 | ||
670 | err = -EBUSY; | |
671 | si->rxdma = pxa_request_dma("FICP_RX",DMA_PRIO_LOW, pxa_irda_fir_dma_rx_irq, dev); | |
672 | if (si->rxdma < 0) | |
673 | goto err_rx_dma; | |
674 | ||
675 | si->txdma = pxa_request_dma("FICP_TX",DMA_PRIO_LOW, pxa_irda_fir_dma_tx_irq, dev); | |
676 | if (si->txdma < 0) | |
677 | goto err_tx_dma; | |
678 | ||
679 | err = -ENOMEM; | |
680 | si->dma_rx_buff = dma_alloc_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT, | |
681 | &si->dma_rx_buff_phy, GFP_KERNEL ); | |
682 | if (!si->dma_rx_buff) | |
683 | goto err_dma_rx_buff; | |
684 | ||
685 | si->dma_tx_buff = dma_alloc_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT, | |
686 | &si->dma_tx_buff_phy, GFP_KERNEL ); | |
687 | if (!si->dma_tx_buff) | |
688 | goto err_dma_tx_buff; | |
689 | ||
690 | /* Setup the serial port for the initial speed. */ | |
691 | pxa_irda_startup(si); | |
692 | ||
693 | /* | |
694 | * Open a new IrLAP layer instance. | |
695 | */ | |
696 | si->irlap = irlap_open(dev, &si->qos, "pxa"); | |
697 | err = -ENOMEM; | |
698 | if (!si->irlap) | |
699 | goto err_irlap; | |
700 | ||
701 | /* | |
702 | * Now enable the interrupt and start the queue | |
703 | */ | |
704 | enable_irq(IRQ_STUART); | |
705 | enable_irq(IRQ_ICP); | |
706 | netif_start_queue(dev); | |
707 | ||
708 | printk(KERN_DEBUG "pxa_ir: irda driver opened\n"); | |
709 | ||
710 | return 0; | |
711 | ||
712 | err_irlap: | |
713 | pxa_irda_shutdown(si); | |
714 | dma_free_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT, si->dma_tx_buff, si->dma_tx_buff_phy); | |
715 | err_dma_tx_buff: | |
716 | dma_free_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT, si->dma_rx_buff, si->dma_rx_buff_phy); | |
717 | err_dma_rx_buff: | |
718 | pxa_free_dma(si->txdma); | |
719 | err_tx_dma: | |
720 | pxa_free_dma(si->rxdma); | |
721 | err_rx_dma: | |
722 | free_irq(IRQ_ICP, dev); | |
723 | err_irq2: | |
724 | free_irq(IRQ_STUART, dev); | |
725 | err_irq1: | |
726 | ||
727 | return err; | |
728 | } | |
729 | ||
730 | static int pxa_irda_stop(struct net_device *dev) | |
731 | { | |
732 | struct pxa_irda *si = netdev_priv(dev); | |
733 | ||
734 | netif_stop_queue(dev); | |
735 | ||
736 | pxa_irda_shutdown(si); | |
737 | ||
738 | /* Stop IrLAP */ | |
739 | if (si->irlap) { | |
740 | irlap_close(si->irlap); | |
741 | si->irlap = NULL; | |
742 | } | |
743 | ||
744 | free_irq(IRQ_STUART, dev); | |
745 | free_irq(IRQ_ICP, dev); | |
746 | ||
747 | pxa_free_dma(si->rxdma); | |
748 | pxa_free_dma(si->txdma); | |
749 | ||
750 | if (si->dma_rx_buff) | |
751 | dma_free_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT, si->dma_tx_buff, si->dma_tx_buff_phy); | |
752 | if (si->dma_tx_buff) | |
753 | dma_free_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT, si->dma_rx_buff, si->dma_rx_buff_phy); | |
754 | ||
755 | printk(KERN_DEBUG "pxa_ir: irda driver closed\n"); | |
756 | return 0; | |
757 | } | |
758 | ||
b259e7d2 | 759 | static int pxa_irda_suspend(struct platform_device *_dev, pm_message_t state) |
6f475c01 | 760 | { |
b259e7d2 | 761 | struct net_device *dev = platform_get_drvdata(_dev); |
6f475c01 NP |
762 | struct pxa_irda *si; |
763 | ||
91e1a512 | 764 | if (dev && netif_running(dev)) { |
6f475c01 NP |
765 | si = netdev_priv(dev); |
766 | netif_device_detach(dev); | |
767 | pxa_irda_shutdown(si); | |
768 | } | |
769 | ||
770 | return 0; | |
771 | } | |
772 | ||
b259e7d2 | 773 | static int pxa_irda_resume(struct platform_device *_dev) |
6f475c01 | 774 | { |
b259e7d2 | 775 | struct net_device *dev = platform_get_drvdata(_dev); |
6f475c01 NP |
776 | struct pxa_irda *si; |
777 | ||
91e1a512 | 778 | if (dev && netif_running(dev)) { |
6f475c01 NP |
779 | si = netdev_priv(dev); |
780 | pxa_irda_startup(si); | |
781 | netif_device_attach(dev); | |
782 | netif_wake_queue(dev); | |
783 | } | |
784 | ||
785 | return 0; | |
786 | } | |
787 | ||
788 | ||
789 | static int pxa_irda_init_iobuf(iobuff_t *io, int size) | |
790 | { | |
791 | io->head = kmalloc(size, GFP_KERNEL | GFP_DMA); | |
792 | if (io->head != NULL) { | |
793 | io->truesize = size; | |
794 | io->in_frame = FALSE; | |
795 | io->state = OUTSIDE_FRAME; | |
796 | io->data = io->head; | |
797 | } | |
798 | return io->head ? 0 : -ENOMEM; | |
799 | } | |
800 | ||
c76ccd6a AB |
801 | static const struct net_device_ops pxa_irda_netdev_ops = { |
802 | .ndo_open = pxa_irda_start, | |
803 | .ndo_stop = pxa_irda_stop, | |
804 | .ndo_start_xmit = pxa_irda_hard_xmit, | |
805 | .ndo_do_ioctl = pxa_irda_ioctl, | |
c76ccd6a AB |
806 | }; |
807 | ||
b259e7d2 | 808 | static int pxa_irda_probe(struct platform_device *pdev) |
6f475c01 | 809 | { |
6f475c01 NP |
810 | struct net_device *dev; |
811 | struct pxa_irda *si; | |
812 | unsigned int baudrate_mask; | |
813 | int err; | |
814 | ||
815 | if (!pdev->dev.platform_data) | |
816 | return -ENODEV; | |
817 | ||
818 | err = request_mem_region(__PREG(STUART), 0x24, "IrDA") ? 0 : -EBUSY; | |
819 | if (err) | |
820 | goto err_mem_1; | |
821 | ||
822 | err = request_mem_region(__PREG(FICP), 0x1c, "IrDA") ? 0 : -EBUSY; | |
823 | if (err) | |
824 | goto err_mem_2; | |
825 | ||
826 | dev = alloc_irdadev(sizeof(struct pxa_irda)); | |
827 | if (!dev) | |
828 | goto err_mem_3; | |
829 | ||
d2f3ad4c | 830 | SET_NETDEV_DEV(dev, &pdev->dev); |
6f475c01 NP |
831 | si = netdev_priv(dev); |
832 | si->dev = &pdev->dev; | |
833 | si->pdata = pdev->dev.platform_data; | |
834 | ||
82d553c6 RK |
835 | si->sir_clk = clk_get(&pdev->dev, "UARTCLK"); |
836 | si->fir_clk = clk_get(&pdev->dev, "FICPCLK"); | |
837 | if (IS_ERR(si->sir_clk) || IS_ERR(si->fir_clk)) { | |
838 | err = PTR_ERR(IS_ERR(si->sir_clk) ? si->sir_clk : si->fir_clk); | |
839 | goto err_mem_4; | |
840 | } | |
841 | ||
6f475c01 NP |
842 | /* |
843 | * Initialise the SIR buffers | |
844 | */ | |
845 | err = pxa_irda_init_iobuf(&si->rx_buff, 14384); | |
846 | if (err) | |
847 | goto err_mem_4; | |
848 | err = pxa_irda_init_iobuf(&si->tx_buff, 4000); | |
849 | if (err) | |
850 | goto err_mem_5; | |
851 | ||
baf1c5d2 DB |
852 | if (si->pdata->startup) |
853 | err = si->pdata->startup(si->dev); | |
854 | if (err) | |
855 | goto err_startup; | |
856 | ||
c76ccd6a | 857 | dev->netdev_ops = &pxa_irda_netdev_ops; |
6f475c01 NP |
858 | |
859 | irda_init_max_qos_capabilies(&si->qos); | |
860 | ||
861 | baudrate_mask = 0; | |
862 | if (si->pdata->transceiver_cap & IR_SIRMODE) | |
863 | baudrate_mask |= IR_9600|IR_19200|IR_38400|IR_57600|IR_115200; | |
864 | if (si->pdata->transceiver_cap & IR_FIRMODE) | |
865 | baudrate_mask |= IR_4000000 << 8; | |
866 | ||
867 | si->qos.baud_rate.bits &= baudrate_mask; | |
868 | si->qos.min_turn_time.bits = 7; /* 1ms or more */ | |
869 | ||
870 | irda_qos_bits_to_value(&si->qos); | |
871 | ||
872 | err = register_netdev(dev); | |
873 | ||
874 | if (err == 0) | |
875 | dev_set_drvdata(&pdev->dev, dev); | |
876 | ||
877 | if (err) { | |
baf1c5d2 DB |
878 | if (si->pdata->shutdown) |
879 | si->pdata->shutdown(si->dev); | |
880 | err_startup: | |
6f475c01 NP |
881 | kfree(si->tx_buff.head); |
882 | err_mem_5: | |
883 | kfree(si->rx_buff.head); | |
884 | err_mem_4: | |
82d553c6 RK |
885 | if (si->sir_clk && !IS_ERR(si->sir_clk)) |
886 | clk_put(si->sir_clk); | |
887 | if (si->fir_clk && !IS_ERR(si->fir_clk)) | |
888 | clk_put(si->fir_clk); | |
6f475c01 NP |
889 | free_netdev(dev); |
890 | err_mem_3: | |
891 | release_mem_region(__PREG(FICP), 0x1c); | |
892 | err_mem_2: | |
893 | release_mem_region(__PREG(STUART), 0x24); | |
894 | } | |
895 | err_mem_1: | |
896 | return err; | |
897 | } | |
898 | ||
b259e7d2 | 899 | static int pxa_irda_remove(struct platform_device *_dev) |
6f475c01 | 900 | { |
b259e7d2 | 901 | struct net_device *dev = platform_get_drvdata(_dev); |
6f475c01 NP |
902 | |
903 | if (dev) { | |
904 | struct pxa_irda *si = netdev_priv(dev); | |
905 | unregister_netdev(dev); | |
baf1c5d2 DB |
906 | if (si->pdata->shutdown) |
907 | si->pdata->shutdown(si->dev); | |
6f475c01 NP |
908 | kfree(si->tx_buff.head); |
909 | kfree(si->rx_buff.head); | |
82d553c6 RK |
910 | clk_put(si->fir_clk); |
911 | clk_put(si->sir_clk); | |
6f475c01 NP |
912 | free_netdev(dev); |
913 | } | |
914 | ||
915 | release_mem_region(__PREG(STUART), 0x24); | |
916 | release_mem_region(__PREG(FICP), 0x1c); | |
917 | ||
918 | return 0; | |
919 | } | |
920 | ||
b259e7d2 PS |
921 | static struct platform_driver pxa_ir_driver = { |
922 | .driver = { | |
923 | .name = "pxa2xx-ir", | |
72abb461 | 924 | .owner = THIS_MODULE, |
b259e7d2 | 925 | }, |
6f475c01 NP |
926 | .probe = pxa_irda_probe, |
927 | .remove = pxa_irda_remove, | |
928 | .suspend = pxa_irda_suspend, | |
929 | .resume = pxa_irda_resume, | |
930 | }; | |
931 | ||
932 | static int __init pxa_irda_init(void) | |
933 | { | |
b259e7d2 | 934 | return platform_driver_register(&pxa_ir_driver); |
6f475c01 NP |
935 | } |
936 | ||
937 | static void __exit pxa_irda_exit(void) | |
938 | { | |
b259e7d2 | 939 | platform_driver_unregister(&pxa_ir_driver); |
6f475c01 NP |
940 | } |
941 | ||
942 | module_init(pxa_irda_init); | |
943 | module_exit(pxa_irda_exit); | |
944 | ||
945 | MODULE_LICENSE("GPL"); | |
72abb461 | 946 | MODULE_ALIAS("platform:pxa2xx-ir"); |