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1da177e4 LT |
1 | /********************************************************************* |
2 | * | |
3 | * Filename: nsc-ircc.c | |
4 | * Version: 1.0 | |
5 | * Description: Driver for the NSC PC'108 and PC'338 IrDA chipsets | |
6 | * Status: Stable. | |
7 | * Author: Dag Brattli <dagb@cs.uit.no> | |
8 | * Created at: Sat Nov 7 21:43:15 1998 | |
9 | * Modified at: Wed Mar 1 11:29:34 2000 | |
10 | * Modified by: Dag Brattli <dagb@cs.uit.no> | |
11 | * | |
12 | * Copyright (c) 1998-2000 Dag Brattli <dagb@cs.uit.no> | |
13 | * Copyright (c) 1998 Lichen Wang, <lwang@actisys.com> | |
14 | * Copyright (c) 1998 Actisys Corp., www.actisys.com | |
ec4f32d5 | 15 | * Copyright (c) 2000-2004 Jean Tourrilhes <jt@hpl.hp.com> |
1da177e4 LT |
16 | * All Rights Reserved |
17 | * | |
18 | * This program is free software; you can redistribute it and/or | |
19 | * modify it under the terms of the GNU General Public License as | |
20 | * published by the Free Software Foundation; either version 2 of | |
21 | * the License, or (at your option) any later version. | |
22 | * | |
96de0e25 | 23 | * Neither Dag Brattli nor University of Tromsø admit liability nor |
1da177e4 LT |
24 | * provide warranty for any of this software. This material is |
25 | * provided "AS-IS" and at no charge. | |
26 | * | |
27 | * Notice that all functions that needs to access the chip in _any_ | |
28 | * way, must save BSR register on entry, and restore it on exit. | |
29 | * It is _very_ important to follow this policy! | |
30 | * | |
31 | * __u8 bank; | |
32 | * | |
33 | * bank = inb(iobase+BSR); | |
34 | * | |
35 | * do_your_stuff_here(); | |
36 | * | |
37 | * outb(bank, iobase+BSR); | |
38 | * | |
39 | * If you find bugs in this file, its very likely that the same bug | |
40 | * will also be in w83977af_ir.c since the implementations are quite | |
41 | * similar. | |
42 | * | |
43 | ********************************************************************/ | |
44 | ||
45 | #include <linux/module.h> | |
5a0e3ad6 | 46 | #include <linux/gfp.h> |
1da177e4 LT |
47 | |
48 | #include <linux/kernel.h> | |
49 | #include <linux/types.h> | |
50 | #include <linux/skbuff.h> | |
51 | #include <linux/netdevice.h> | |
52 | #include <linux/ioport.h> | |
53 | #include <linux/delay.h> | |
1da177e4 | 54 | #include <linux/init.h> |
a6b7a407 | 55 | #include <linux/interrupt.h> |
1da177e4 LT |
56 | #include <linux/rtnetlink.h> |
57 | #include <linux/dma-mapping.h> | |
ec4f32d5 | 58 | #include <linux/pnp.h> |
3b99b93b | 59 | #include <linux/platform_device.h> |
1da177e4 LT |
60 | |
61 | #include <asm/io.h> | |
62 | #include <asm/dma.h> | |
63 | #include <asm/byteorder.h> | |
64 | ||
1da177e4 LT |
65 | #include <net/irda/wrapper.h> |
66 | #include <net/irda/irda.h> | |
67 | #include <net/irda/irda_device.h> | |
68 | ||
69 | #include "nsc-ircc.h" | |
70 | ||
71 | #define CHIP_IO_EXTENT 8 | |
72 | #define BROKEN_DONGLE_ID | |
73 | ||
74 | static char *driver_name = "nsc-ircc"; | |
75 | ||
3b99b93b DT |
76 | /* Power Management */ |
77 | #define NSC_IRCC_DRIVER_NAME "nsc-ircc" | |
78 | static int nsc_ircc_suspend(struct platform_device *dev, pm_message_t state); | |
79 | static int nsc_ircc_resume(struct platform_device *dev); | |
80 | ||
81 | static struct platform_driver nsc_ircc_driver = { | |
82 | .suspend = nsc_ircc_suspend, | |
83 | .resume = nsc_ircc_resume, | |
84 | .driver = { | |
85 | .name = NSC_IRCC_DRIVER_NAME, | |
86 | }, | |
87 | }; | |
88 | ||
1da177e4 LT |
89 | /* Module parameters */ |
90 | static int qos_mtt_bits = 0x07; /* 1 ms or more */ | |
91 | static int dongle_id; | |
92 | ||
93 | /* Use BIOS settions by default, but user may supply module parameters */ | |
0ed79c9b JT |
94 | static unsigned int io[] = { ~0, ~0, ~0, ~0, ~0 }; |
95 | static unsigned int irq[] = { 0, 0, 0, 0, 0 }; | |
96 | static unsigned int dma[] = { 0, 0, 0, 0, 0 }; | |
1da177e4 LT |
97 | |
98 | static int nsc_ircc_probe_108(nsc_chip_t *chip, chipio_t *info); | |
99 | static int nsc_ircc_probe_338(nsc_chip_t *chip, chipio_t *info); | |
100 | static int nsc_ircc_probe_39x(nsc_chip_t *chip, chipio_t *info); | |
101 | static int nsc_ircc_init_108(nsc_chip_t *chip, chipio_t *info); | |
102 | static int nsc_ircc_init_338(nsc_chip_t *chip, chipio_t *info); | |
103 | static int nsc_ircc_init_39x(nsc_chip_t *chip, chipio_t *info); | |
c17f888f | 104 | #ifdef CONFIG_PNP |
ec4f32d5 | 105 | static int nsc_ircc_pnp_probe(struct pnp_dev *dev, const struct pnp_device_id *id); |
c17f888f | 106 | #endif |
1da177e4 LT |
107 | |
108 | /* These are the known NSC chips */ | |
109 | static nsc_chip_t chips[] = { | |
110 | /* Name, {cfg registers}, chip id index reg, chip id expected value, revision mask */ | |
111 | { "PC87108", { 0x150, 0x398, 0xea }, 0x05, 0x10, 0xf0, | |
112 | nsc_ircc_probe_108, nsc_ircc_init_108 }, | |
113 | { "PC87338", { 0x398, 0x15c, 0x2e }, 0x08, 0xb0, 0xf8, | |
114 | nsc_ircc_probe_338, nsc_ircc_init_338 }, | |
115 | /* Contributed by Steffen Pingel - IBM X40 */ | |
2fd19a68 | 116 | { "PC8738x", { 0x164e, 0x4e, 0x2e }, 0x20, 0xf4, 0xff, |
1da177e4 LT |
117 | nsc_ircc_probe_39x, nsc_ircc_init_39x }, |
118 | /* Contributed by Jan Frey - IBM A30/A31 */ | |
119 | { "PC8739x", { 0x2e, 0x4e, 0x0 }, 0x20, 0xea, 0xff, | |
120 | nsc_ircc_probe_39x, nsc_ircc_init_39x }, | |
d83561a4 BC |
121 | /* IBM ThinkPads using PC8738x (T60/X60/Z60) */ |
122 | { "IBM-PC8738x", { 0x2e, 0x4e, 0x0 }, 0x20, 0xf4, 0xff, | |
123 | nsc_ircc_probe_39x, nsc_ircc_init_39x }, | |
124 | /* IBM ThinkPads using PC8394T (T43/R52/?) */ | |
125 | { "IBM-PC8394T", { 0x2e, 0x4e, 0x0 }, 0x20, 0xf9, 0xff, | |
126 | nsc_ircc_probe_39x, nsc_ircc_init_39x }, | |
1da177e4 LT |
127 | { NULL } |
128 | }; | |
129 | ||
0ed79c9b | 130 | static struct nsc_ircc_cb *dev_self[] = { NULL, NULL, NULL, NULL, NULL }; |
1da177e4 LT |
131 | |
132 | static char *dongle_types[] = { | |
133 | "Differential serial interface", | |
134 | "Differential serial interface", | |
135 | "Reserved", | |
136 | "Reserved", | |
137 | "Sharp RY5HD01", | |
138 | "Reserved", | |
139 | "Single-ended serial interface", | |
140 | "Consumer-IR only", | |
141 | "HP HSDL-2300, HP HSDL-3600/HSDL-3610", | |
142 | "IBM31T1100 or Temic TFDS6000/TFDS6500", | |
143 | "Reserved", | |
144 | "Reserved", | |
145 | "HP HSDL-1100/HSDL-2100", | |
146 | "HP HSDL-1100/HSDL-2100", | |
147 | "Supports SIR Mode only", | |
148 | "No dongle connected", | |
149 | }; | |
150 | ||
ec4f32d5 JT |
151 | /* PNP probing */ |
152 | static chipio_t pnp_info; | |
153 | static const struct pnp_device_id nsc_ircc_pnp_table[] = { | |
154 | { .id = "NSC6001", .driver_data = 0 }, | |
02307080 | 155 | { .id = "HWPC224", .driver_data = 0 }, |
1fa98174 | 156 | { .id = "IBM0071", .driver_data = NSC_FORCE_DONGLE_TYPE9 }, |
ec4f32d5 JT |
157 | { } |
158 | }; | |
159 | ||
160 | MODULE_DEVICE_TABLE(pnp, nsc_ircc_pnp_table); | |
161 | ||
162 | static struct pnp_driver nsc_ircc_pnp_driver = { | |
c17f888f | 163 | #ifdef CONFIG_PNP |
ec4f32d5 JT |
164 | .name = "nsc-ircc", |
165 | .id_table = nsc_ircc_pnp_table, | |
166 | .probe = nsc_ircc_pnp_probe, | |
c17f888f | 167 | #endif |
ec4f32d5 JT |
168 | }; |
169 | ||
1da177e4 | 170 | /* Some prototypes */ |
ec4f32d5 | 171 | static int nsc_ircc_open(chipio_t *info); |
1da177e4 LT |
172 | static int nsc_ircc_close(struct nsc_ircc_cb *self); |
173 | static int nsc_ircc_setup(chipio_t *info); | |
174 | static void nsc_ircc_pio_receive(struct nsc_ircc_cb *self); | |
175 | static int nsc_ircc_dma_receive(struct nsc_ircc_cb *self); | |
176 | static int nsc_ircc_dma_receive_complete(struct nsc_ircc_cb *self, int iobase); | |
6518bbb8 SH |
177 | static netdev_tx_t nsc_ircc_hard_xmit_sir(struct sk_buff *skb, |
178 | struct net_device *dev); | |
179 | static netdev_tx_t nsc_ircc_hard_xmit_fir(struct sk_buff *skb, | |
180 | struct net_device *dev); | |
1da177e4 LT |
181 | static int nsc_ircc_pio_write(int iobase, __u8 *buf, int len, int fifo_size); |
182 | static void nsc_ircc_dma_xmit(struct nsc_ircc_cb *self, int iobase); | |
183 | static __u8 nsc_ircc_change_speed(struct nsc_ircc_cb *self, __u32 baud); | |
184 | static int nsc_ircc_is_receiving(struct nsc_ircc_cb *self); | |
185 | static int nsc_ircc_read_dongle_id (int iobase); | |
186 | static void nsc_ircc_init_dongle_interface (int iobase, int dongle_id); | |
187 | ||
188 | static int nsc_ircc_net_open(struct net_device *dev); | |
189 | static int nsc_ircc_net_close(struct net_device *dev); | |
190 | static int nsc_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd); | |
1da177e4 | 191 | |
ec4f32d5 JT |
192 | /* Globals */ |
193 | static int pnp_registered; | |
194 | static int pnp_succeeded; | |
195 | ||
1da177e4 LT |
196 | /* |
197 | * Function nsc_ircc_init () | |
198 | * | |
199 | * Initialize chip. Just try to find out how many chips we are dealing with | |
200 | * and where they are | |
201 | */ | |
202 | static int __init nsc_ircc_init(void) | |
203 | { | |
204 | chipio_t info; | |
205 | nsc_chip_t *chip; | |
ec4f32d5 | 206 | int ret; |
1da177e4 LT |
207 | int cfg_base; |
208 | int cfg, id; | |
209 | int reg; | |
210 | int i = 0; | |
211 | ||
3b99b93b DT |
212 | ret = platform_driver_register(&nsc_ircc_driver); |
213 | if (ret) { | |
214 | IRDA_ERROR("%s, Can't register driver!\n", driver_name); | |
215 | return ret; | |
216 | } | |
217 | ||
ec4f32d5 JT |
218 | /* Register with PnP subsystem to detect disable ports */ |
219 | ret = pnp_register_driver(&nsc_ircc_pnp_driver); | |
220 | ||
803d0abb | 221 | if (!ret) |
ec4f32d5 JT |
222 | pnp_registered = 1; |
223 | ||
224 | ret = -ENODEV; | |
225 | ||
1da177e4 | 226 | /* Probe for all the NSC chipsets we know about */ |
ec4f32d5 | 227 | for (chip = chips; chip->name ; chip++) { |
a97a6f10 | 228 | IRDA_DEBUG(2, "%s(), Probing for %s ...\n", __func__, |
1da177e4 LT |
229 | chip->name); |
230 | ||
231 | /* Try all config registers for this chip */ | |
ec4f32d5 | 232 | for (cfg = 0; cfg < ARRAY_SIZE(chip->cfg); cfg++) { |
1da177e4 LT |
233 | cfg_base = chip->cfg[cfg]; |
234 | if (!cfg_base) | |
235 | continue; | |
1da177e4 LT |
236 | |
237 | /* Read index register */ | |
238 | reg = inb(cfg_base); | |
239 | if (reg == 0xff) { | |
a97a6f10 | 240 | IRDA_DEBUG(2, "%s() no chip at 0x%03x\n", __func__, cfg_base); |
1da177e4 LT |
241 | continue; |
242 | } | |
243 | ||
244 | /* Read chip identification register */ | |
245 | outb(chip->cid_index, cfg_base); | |
246 | id = inb(cfg_base+1); | |
247 | if ((id & chip->cid_mask) == chip->cid_value) { | |
248 | IRDA_DEBUG(2, "%s() Found %s chip, revision=%d\n", | |
a97a6f10 | 249 | __func__, chip->name, id & ~chip->cid_mask); |
ec4f32d5 JT |
250 | |
251 | /* | |
252 | * If we found a correct PnP setting, | |
253 | * we first try it. | |
254 | */ | |
255 | if (pnp_succeeded) { | |
256 | memset(&info, 0, sizeof(chipio_t)); | |
257 | info.cfg_base = cfg_base; | |
258 | info.fir_base = pnp_info.fir_base; | |
259 | info.dma = pnp_info.dma; | |
260 | info.irq = pnp_info.irq; | |
261 | ||
262 | if (info.fir_base < 0x2000) { | |
263 | IRDA_MESSAGE("%s, chip->init\n", driver_name); | |
264 | chip->init(chip, &info); | |
265 | } else | |
266 | chip->probe(chip, &info); | |
267 | ||
268 | if (nsc_ircc_open(&info) >= 0) | |
269 | ret = 0; | |
270 | } | |
271 | ||
272 | /* | |
273 | * Opening based on PnP values failed. | |
274 | * Let's fallback to user values, or probe | |
275 | * the chip. | |
276 | */ | |
277 | if (ret) { | |
278 | IRDA_DEBUG(2, "%s, PnP init failed\n", driver_name); | |
279 | memset(&info, 0, sizeof(chipio_t)); | |
280 | info.cfg_base = cfg_base; | |
281 | info.fir_base = io[i]; | |
282 | info.dma = dma[i]; | |
283 | info.irq = irq[i]; | |
284 | ||
285 | /* | |
286 | * If the user supplies the base address, then | |
287 | * we init the chip, if not we probe the values | |
288 | * set by the BIOS | |
289 | */ | |
290 | if (io[i] < 0x2000) { | |
291 | chip->init(chip, &info); | |
292 | } else | |
293 | chip->probe(chip, &info); | |
294 | ||
295 | if (nsc_ircc_open(&info) >= 0) | |
296 | ret = 0; | |
297 | } | |
1da177e4 LT |
298 | i++; |
299 | } else { | |
a97a6f10 | 300 | IRDA_DEBUG(2, "%s(), Wrong chip id=0x%02x\n", __func__, id); |
1da177e4 LT |
301 | } |
302 | } | |
ec4f32d5 JT |
303 | } |
304 | ||
305 | if (ret) { | |
3b99b93b | 306 | platform_driver_unregister(&nsc_ircc_driver); |
ec4f32d5 JT |
307 | pnp_unregister_driver(&nsc_ircc_pnp_driver); |
308 | pnp_registered = 0; | |
1da177e4 LT |
309 | } |
310 | ||
311 | return ret; | |
312 | } | |
313 | ||
314 | /* | |
315 | * Function nsc_ircc_cleanup () | |
316 | * | |
317 | * Close all configured chips | |
318 | * | |
319 | */ | |
320 | static void __exit nsc_ircc_cleanup(void) | |
321 | { | |
322 | int i; | |
323 | ||
ec4f32d5 | 324 | for (i = 0; i < ARRAY_SIZE(dev_self); i++) { |
1da177e4 LT |
325 | if (dev_self[i]) |
326 | nsc_ircc_close(dev_self[i]); | |
327 | } | |
ec4f32d5 | 328 | |
3b99b93b DT |
329 | platform_driver_unregister(&nsc_ircc_driver); |
330 | ||
ec4f32d5 JT |
331 | if (pnp_registered) |
332 | pnp_unregister_driver(&nsc_ircc_pnp_driver); | |
333 | ||
334 | pnp_registered = 0; | |
1da177e4 LT |
335 | } |
336 | ||
c279b8c9 SH |
337 | static const struct net_device_ops nsc_ircc_sir_ops = { |
338 | .ndo_open = nsc_ircc_net_open, | |
339 | .ndo_stop = nsc_ircc_net_close, | |
340 | .ndo_start_xmit = nsc_ircc_hard_xmit_sir, | |
341 | .ndo_do_ioctl = nsc_ircc_net_ioctl, | |
342 | }; | |
343 | ||
344 | static const struct net_device_ops nsc_ircc_fir_ops = { | |
345 | .ndo_open = nsc_ircc_net_open, | |
346 | .ndo_stop = nsc_ircc_net_close, | |
347 | .ndo_start_xmit = nsc_ircc_hard_xmit_fir, | |
348 | .ndo_do_ioctl = nsc_ircc_net_ioctl, | |
349 | }; | |
350 | ||
1da177e4 LT |
351 | /* |
352 | * Function nsc_ircc_open (iobase, irq) | |
353 | * | |
354 | * Open driver instance | |
355 | * | |
356 | */ | |
ec4f32d5 | 357 | static int __init nsc_ircc_open(chipio_t *info) |
1da177e4 LT |
358 | { |
359 | struct net_device *dev; | |
360 | struct nsc_ircc_cb *self; | |
1da177e4 | 361 | void *ret; |
ec4f32d5 | 362 | int err, chip_index; |
1da177e4 | 363 | |
a97a6f10 | 364 | IRDA_DEBUG(2, "%s()\n", __func__); |
1da177e4 | 365 | |
ec4f32d5 JT |
366 | |
367 | for (chip_index = 0; chip_index < ARRAY_SIZE(dev_self); chip_index++) { | |
368 | if (!dev_self[chip_index]) | |
369 | break; | |
370 | } | |
371 | ||
372 | if (chip_index == ARRAY_SIZE(dev_self)) { | |
a97a6f10 | 373 | IRDA_ERROR("%s(), maximum number of supported chips reached!\n", __func__); |
ec4f32d5 JT |
374 | return -ENOMEM; |
375 | } | |
376 | ||
1da177e4 LT |
377 | IRDA_MESSAGE("%s, Found chip at base=0x%03x\n", driver_name, |
378 | info->cfg_base); | |
379 | ||
380 | if ((nsc_ircc_setup(info)) == -1) | |
381 | return -1; | |
382 | ||
383 | IRDA_MESSAGE("%s, driver loaded (Dag Brattli)\n", driver_name); | |
384 | ||
385 | dev = alloc_irdadev(sizeof(struct nsc_ircc_cb)); | |
386 | if (dev == NULL) { | |
387 | IRDA_ERROR("%s(), can't allocate memory for " | |
a97a6f10 | 388 | "control block!\n", __func__); |
1da177e4 LT |
389 | return -ENOMEM; |
390 | } | |
391 | ||
4cf1653a | 392 | self = netdev_priv(dev); |
1da177e4 LT |
393 | self->netdev = dev; |
394 | spin_lock_init(&self->lock); | |
395 | ||
396 | /* Need to store self somewhere */ | |
ec4f32d5 JT |
397 | dev_self[chip_index] = self; |
398 | self->index = chip_index; | |
1da177e4 LT |
399 | |
400 | /* Initialize IO */ | |
401 | self->io.cfg_base = info->cfg_base; | |
402 | self->io.fir_base = info->fir_base; | |
403 | self->io.irq = info->irq; | |
404 | self->io.fir_ext = CHIP_IO_EXTENT; | |
405 | self->io.dma = info->dma; | |
406 | self->io.fifo_size = 32; | |
407 | ||
408 | /* Reserve the ioports that we need */ | |
409 | ret = request_region(self->io.fir_base, self->io.fir_ext, driver_name); | |
410 | if (!ret) { | |
411 | IRDA_WARNING("%s(), can't get iobase of 0x%03x\n", | |
a97a6f10 | 412 | __func__, self->io.fir_base); |
1da177e4 LT |
413 | err = -ENODEV; |
414 | goto out1; | |
415 | } | |
416 | ||
417 | /* Initialize QoS for this device */ | |
418 | irda_init_max_qos_capabilies(&self->qos); | |
419 | ||
420 | /* The only value we must override it the baudrate */ | |
421 | self->qos.baud_rate.bits = IR_9600|IR_19200|IR_38400|IR_57600| | |
422 | IR_115200|IR_576000|IR_1152000 |(IR_4000000 << 8); | |
423 | ||
424 | self->qos.min_turn_time.bits = qos_mtt_bits; | |
425 | irda_qos_bits_to_value(&self->qos); | |
426 | ||
427 | /* Max DMA buffer size needed = (data_size + 6) * (window_size) + 6; */ | |
428 | self->rx_buff.truesize = 14384; | |
429 | self->tx_buff.truesize = 14384; | |
430 | ||
431 | /* Allocate memory if needed */ | |
432 | self->rx_buff.head = | |
433 | dma_alloc_coherent(NULL, self->rx_buff.truesize, | |
434 | &self->rx_buff_dma, GFP_KERNEL); | |
435 | if (self->rx_buff.head == NULL) { | |
436 | err = -ENOMEM; | |
437 | goto out2; | |
438 | ||
439 | } | |
440 | memset(self->rx_buff.head, 0, self->rx_buff.truesize); | |
441 | ||
442 | self->tx_buff.head = | |
443 | dma_alloc_coherent(NULL, self->tx_buff.truesize, | |
444 | &self->tx_buff_dma, GFP_KERNEL); | |
445 | if (self->tx_buff.head == NULL) { | |
446 | err = -ENOMEM; | |
447 | goto out3; | |
448 | } | |
449 | memset(self->tx_buff.head, 0, self->tx_buff.truesize); | |
450 | ||
451 | self->rx_buff.in_frame = FALSE; | |
452 | self->rx_buff.state = OUTSIDE_FRAME; | |
453 | self->tx_buff.data = self->tx_buff.head; | |
454 | self->rx_buff.data = self->rx_buff.head; | |
455 | ||
456 | /* Reset Tx queue info */ | |
457 | self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0; | |
458 | self->tx_fifo.tail = self->tx_buff.head; | |
459 | ||
460 | /* Override the network functions we need to use */ | |
c279b8c9 | 461 | dev->netdev_ops = &nsc_ircc_sir_ops; |
1da177e4 LT |
462 | |
463 | err = register_netdev(dev); | |
464 | if (err) { | |
a97a6f10 | 465 | IRDA_ERROR("%s(), register_netdev() failed!\n", __func__); |
1da177e4 LT |
466 | goto out4; |
467 | } | |
468 | IRDA_MESSAGE("IrDA: Registered device %s\n", dev->name); | |
469 | ||
470 | /* Check if user has supplied a valid dongle id or not */ | |
471 | if ((dongle_id <= 0) || | |
ec4f32d5 | 472 | (dongle_id >= ARRAY_SIZE(dongle_types))) { |
1da177e4 LT |
473 | dongle_id = nsc_ircc_read_dongle_id(self->io.fir_base); |
474 | ||
475 | IRDA_MESSAGE("%s, Found dongle: %s\n", driver_name, | |
476 | dongle_types[dongle_id]); | |
477 | } else { | |
478 | IRDA_MESSAGE("%s, Using dongle: %s\n", driver_name, | |
479 | dongle_types[dongle_id]); | |
480 | } | |
481 | ||
482 | self->io.dongle_id = dongle_id; | |
483 | nsc_ircc_init_dongle_interface(self->io.fir_base, dongle_id); | |
484 | ||
3b99b93b DT |
485 | self->pldev = platform_device_register_simple(NSC_IRCC_DRIVER_NAME, |
486 | self->index, NULL, 0); | |
487 | if (IS_ERR(self->pldev)) { | |
488 | err = PTR_ERR(self->pldev); | |
489 | goto out5; | |
490 | } | |
491 | platform_set_drvdata(self->pldev, self); | |
1da177e4 | 492 | |
ec4f32d5 | 493 | return chip_index; |
3b99b93b DT |
494 | |
495 | out5: | |
496 | unregister_netdev(dev); | |
1da177e4 LT |
497 | out4: |
498 | dma_free_coherent(NULL, self->tx_buff.truesize, | |
499 | self->tx_buff.head, self->tx_buff_dma); | |
500 | out3: | |
501 | dma_free_coherent(NULL, self->rx_buff.truesize, | |
502 | self->rx_buff.head, self->rx_buff_dma); | |
503 | out2: | |
504 | release_region(self->io.fir_base, self->io.fir_ext); | |
505 | out1: | |
506 | free_netdev(dev); | |
ec4f32d5 | 507 | dev_self[chip_index] = NULL; |
1da177e4 LT |
508 | return err; |
509 | } | |
510 | ||
511 | /* | |
512 | * Function nsc_ircc_close (self) | |
513 | * | |
514 | * Close driver instance | |
515 | * | |
516 | */ | |
517 | static int __exit nsc_ircc_close(struct nsc_ircc_cb *self) | |
518 | { | |
519 | int iobase; | |
520 | ||
a97a6f10 | 521 | IRDA_DEBUG(4, "%s()\n", __func__); |
1da177e4 LT |
522 | |
523 | IRDA_ASSERT(self != NULL, return -1;); | |
524 | ||
525 | iobase = self->io.fir_base; | |
526 | ||
3b99b93b DT |
527 | platform_device_unregister(self->pldev); |
528 | ||
1da177e4 LT |
529 | /* Remove netdevice */ |
530 | unregister_netdev(self->netdev); | |
531 | ||
532 | /* Release the PORT that this driver is using */ | |
533 | IRDA_DEBUG(4, "%s(), Releasing Region %03x\n", | |
a97a6f10 | 534 | __func__, self->io.fir_base); |
1da177e4 LT |
535 | release_region(self->io.fir_base, self->io.fir_ext); |
536 | ||
537 | if (self->tx_buff.head) | |
538 | dma_free_coherent(NULL, self->tx_buff.truesize, | |
539 | self->tx_buff.head, self->tx_buff_dma); | |
540 | ||
541 | if (self->rx_buff.head) | |
542 | dma_free_coherent(NULL, self->rx_buff.truesize, | |
543 | self->rx_buff.head, self->rx_buff_dma); | |
544 | ||
545 | dev_self[self->index] = NULL; | |
546 | free_netdev(self->netdev); | |
547 | ||
548 | return 0; | |
549 | } | |
550 | ||
551 | /* | |
552 | * Function nsc_ircc_init_108 (iobase, cfg_base, irq, dma) | |
553 | * | |
554 | * Initialize the NSC '108 chip | |
555 | * | |
556 | */ | |
557 | static int nsc_ircc_init_108(nsc_chip_t *chip, chipio_t *info) | |
558 | { | |
559 | int cfg_base = info->cfg_base; | |
560 | __u8 temp=0; | |
561 | ||
562 | outb(2, cfg_base); /* Mode Control Register (MCTL) */ | |
563 | outb(0x00, cfg_base+1); /* Disable device */ | |
564 | ||
565 | /* Base Address and Interrupt Control Register (BAIC) */ | |
566 | outb(CFG_108_BAIC, cfg_base); | |
567 | switch (info->fir_base) { | |
568 | case 0x3e8: outb(0x14, cfg_base+1); break; | |
569 | case 0x2e8: outb(0x15, cfg_base+1); break; | |
570 | case 0x3f8: outb(0x16, cfg_base+1); break; | |
571 | case 0x2f8: outb(0x17, cfg_base+1); break; | |
a97a6f10 | 572 | default: IRDA_ERROR("%s(), invalid base_address", __func__); |
1da177e4 LT |
573 | } |
574 | ||
575 | /* Control Signal Routing Register (CSRT) */ | |
576 | switch (info->irq) { | |
577 | case 3: temp = 0x01; break; | |
578 | case 4: temp = 0x02; break; | |
579 | case 5: temp = 0x03; break; | |
580 | case 7: temp = 0x04; break; | |
581 | case 9: temp = 0x05; break; | |
582 | case 11: temp = 0x06; break; | |
583 | case 15: temp = 0x07; break; | |
a97a6f10 | 584 | default: IRDA_ERROR("%s(), invalid irq", __func__); |
1da177e4 LT |
585 | } |
586 | outb(CFG_108_CSRT, cfg_base); | |
587 | ||
588 | switch (info->dma) { | |
589 | case 0: outb(0x08+temp, cfg_base+1); break; | |
590 | case 1: outb(0x10+temp, cfg_base+1); break; | |
591 | case 3: outb(0x18+temp, cfg_base+1); break; | |
a97a6f10 | 592 | default: IRDA_ERROR("%s(), invalid dma", __func__); |
1da177e4 LT |
593 | } |
594 | ||
595 | outb(CFG_108_MCTL, cfg_base); /* Mode Control Register (MCTL) */ | |
596 | outb(0x03, cfg_base+1); /* Enable device */ | |
597 | ||
598 | return 0; | |
599 | } | |
600 | ||
601 | /* | |
602 | * Function nsc_ircc_probe_108 (chip, info) | |
603 | * | |
604 | * | |
605 | * | |
606 | */ | |
607 | static int nsc_ircc_probe_108(nsc_chip_t *chip, chipio_t *info) | |
608 | { | |
609 | int cfg_base = info->cfg_base; | |
610 | int reg; | |
611 | ||
612 | /* Read address and interrupt control register (BAIC) */ | |
613 | outb(CFG_108_BAIC, cfg_base); | |
614 | reg = inb(cfg_base+1); | |
615 | ||
616 | switch (reg & 0x03) { | |
617 | case 0: | |
618 | info->fir_base = 0x3e8; | |
619 | break; | |
620 | case 1: | |
621 | info->fir_base = 0x2e8; | |
622 | break; | |
623 | case 2: | |
624 | info->fir_base = 0x3f8; | |
625 | break; | |
626 | case 3: | |
627 | info->fir_base = 0x2f8; | |
628 | break; | |
629 | } | |
630 | info->sir_base = info->fir_base; | |
a97a6f10 | 631 | IRDA_DEBUG(2, "%s(), probing fir_base=0x%03x\n", __func__, |
1da177e4 LT |
632 | info->fir_base); |
633 | ||
634 | /* Read control signals routing register (CSRT) */ | |
635 | outb(CFG_108_CSRT, cfg_base); | |
636 | reg = inb(cfg_base+1); | |
637 | ||
638 | switch (reg & 0x07) { | |
639 | case 0: | |
640 | info->irq = -1; | |
641 | break; | |
642 | case 1: | |
643 | info->irq = 3; | |
644 | break; | |
645 | case 2: | |
646 | info->irq = 4; | |
647 | break; | |
648 | case 3: | |
649 | info->irq = 5; | |
650 | break; | |
651 | case 4: | |
652 | info->irq = 7; | |
653 | break; | |
654 | case 5: | |
655 | info->irq = 9; | |
656 | break; | |
657 | case 6: | |
658 | info->irq = 11; | |
659 | break; | |
660 | case 7: | |
661 | info->irq = 15; | |
662 | break; | |
663 | } | |
a97a6f10 | 664 | IRDA_DEBUG(2, "%s(), probing irq=%d\n", __func__, info->irq); |
1da177e4 LT |
665 | |
666 | /* Currently we only read Rx DMA but it will also be used for Tx */ | |
667 | switch ((reg >> 3) & 0x03) { | |
668 | case 0: | |
669 | info->dma = -1; | |
670 | break; | |
671 | case 1: | |
672 | info->dma = 0; | |
673 | break; | |
674 | case 2: | |
675 | info->dma = 1; | |
676 | break; | |
677 | case 3: | |
678 | info->dma = 3; | |
679 | break; | |
680 | } | |
a97a6f10 | 681 | IRDA_DEBUG(2, "%s(), probing dma=%d\n", __func__, info->dma); |
1da177e4 LT |
682 | |
683 | /* Read mode control register (MCTL) */ | |
684 | outb(CFG_108_MCTL, cfg_base); | |
685 | reg = inb(cfg_base+1); | |
686 | ||
687 | info->enabled = reg & 0x01; | |
688 | info->suspended = !((reg >> 1) & 0x01); | |
689 | ||
690 | return 0; | |
691 | } | |
692 | ||
693 | /* | |
694 | * Function nsc_ircc_init_338 (chip, info) | |
695 | * | |
696 | * Initialize the NSC '338 chip. Remember that the 87338 needs two | |
697 | * consecutive writes to the data registers while CPU interrupts are | |
698 | * disabled. The 97338 does not require this, but shouldn't be any | |
699 | * harm if we do it anyway. | |
700 | */ | |
701 | static int nsc_ircc_init_338(nsc_chip_t *chip, chipio_t *info) | |
702 | { | |
703 | /* No init yet */ | |
704 | ||
705 | return 0; | |
706 | } | |
707 | ||
708 | /* | |
709 | * Function nsc_ircc_probe_338 (chip, info) | |
710 | * | |
711 | * | |
712 | * | |
713 | */ | |
714 | static int nsc_ircc_probe_338(nsc_chip_t *chip, chipio_t *info) | |
715 | { | |
716 | int cfg_base = info->cfg_base; | |
717 | int reg, com = 0; | |
718 | int pnp; | |
719 | ||
25985edc | 720 | /* Read function enable register (FER) */ |
1da177e4 LT |
721 | outb(CFG_338_FER, cfg_base); |
722 | reg = inb(cfg_base+1); | |
723 | ||
724 | info->enabled = (reg >> 2) & 0x01; | |
725 | ||
726 | /* Check if we are in Legacy or PnP mode */ | |
727 | outb(CFG_338_PNP0, cfg_base); | |
728 | reg = inb(cfg_base+1); | |
729 | ||
730 | pnp = (reg >> 3) & 0x01; | |
731 | if (pnp) { | |
732 | IRDA_DEBUG(2, "(), Chip is in PnP mode\n"); | |
733 | outb(0x46, cfg_base); | |
734 | reg = (inb(cfg_base+1) & 0xfe) << 2; | |
735 | ||
736 | outb(0x47, cfg_base); | |
737 | reg |= ((inb(cfg_base+1) & 0xfc) << 8); | |
738 | ||
739 | info->fir_base = reg; | |
740 | } else { | |
741 | /* Read function address register (FAR) */ | |
742 | outb(CFG_338_FAR, cfg_base); | |
743 | reg = inb(cfg_base+1); | |
744 | ||
745 | switch ((reg >> 4) & 0x03) { | |
746 | case 0: | |
747 | info->fir_base = 0x3f8; | |
748 | break; | |
749 | case 1: | |
750 | info->fir_base = 0x2f8; | |
751 | break; | |
752 | case 2: | |
753 | com = 3; | |
754 | break; | |
755 | case 3: | |
756 | com = 4; | |
757 | break; | |
758 | } | |
759 | ||
760 | if (com) { | |
761 | switch ((reg >> 6) & 0x03) { | |
762 | case 0: | |
763 | if (com == 3) | |
764 | info->fir_base = 0x3e8; | |
765 | else | |
766 | info->fir_base = 0x2e8; | |
767 | break; | |
768 | case 1: | |
769 | if (com == 3) | |
770 | info->fir_base = 0x338; | |
771 | else | |
772 | info->fir_base = 0x238; | |
773 | break; | |
774 | case 2: | |
775 | if (com == 3) | |
776 | info->fir_base = 0x2e8; | |
777 | else | |
778 | info->fir_base = 0x2e0; | |
779 | break; | |
780 | case 3: | |
781 | if (com == 3) | |
782 | info->fir_base = 0x220; | |
783 | else | |
784 | info->fir_base = 0x228; | |
785 | break; | |
786 | } | |
787 | } | |
788 | } | |
789 | info->sir_base = info->fir_base; | |
790 | ||
791 | /* Read PnP register 1 (PNP1) */ | |
792 | outb(CFG_338_PNP1, cfg_base); | |
793 | reg = inb(cfg_base+1); | |
794 | ||
795 | info->irq = reg >> 4; | |
796 | ||
797 | /* Read PnP register 3 (PNP3) */ | |
798 | outb(CFG_338_PNP3, cfg_base); | |
799 | reg = inb(cfg_base+1); | |
800 | ||
801 | info->dma = (reg & 0x07) - 1; | |
802 | ||
803 | /* Read power and test register (PTR) */ | |
804 | outb(CFG_338_PTR, cfg_base); | |
805 | reg = inb(cfg_base+1); | |
806 | ||
807 | info->suspended = reg & 0x01; | |
808 | ||
809 | return 0; | |
810 | } | |
811 | ||
812 | ||
813 | /* | |
814 | * Function nsc_ircc_init_39x (chip, info) | |
815 | * | |
816 | * Now that we know it's a '39x (see probe below), we need to | |
817 | * configure it so we can use it. | |
818 | * | |
819 | * The NSC '338 chip is a Super I/O chip with a "bank" architecture, | |
820 | * the configuration of the different functionality (serial, parallel, | |
821 | * floppy...) are each in a different bank (Logical Device Number). | |
822 | * The base address, irq and dma configuration registers are common | |
823 | * to all functionalities (index 0x30 to 0x7F). | |
824 | * There is only one configuration register specific to the | |
825 | * serial port, CFG_39X_SPC. | |
826 | * JeanII | |
827 | * | |
828 | * Note : this code was written by Jan Frey <janfrey@web.de> | |
829 | */ | |
830 | static int nsc_ircc_init_39x(nsc_chip_t *chip, chipio_t *info) | |
831 | { | |
832 | int cfg_base = info->cfg_base; | |
833 | int enabled; | |
834 | ||
7f927fcc | 835 | /* User is sure about his config... accept it. */ |
1da177e4 LT |
836 | IRDA_DEBUG(2, "%s(): nsc_ircc_init_39x (user settings): " |
837 | "io=0x%04x, irq=%d, dma=%d\n", | |
a97a6f10 | 838 | __func__, info->fir_base, info->irq, info->dma); |
1da177e4 LT |
839 | |
840 | /* Access bank for SP2 */ | |
841 | outb(CFG_39X_LDN, cfg_base); | |
842 | outb(0x02, cfg_base+1); | |
843 | ||
844 | /* Configure SP2 */ | |
845 | ||
846 | /* We want to enable the device if not enabled */ | |
847 | outb(CFG_39X_ACT, cfg_base); | |
848 | enabled = inb(cfg_base+1) & 0x01; | |
849 | ||
850 | if (!enabled) { | |
851 | /* Enable the device */ | |
852 | outb(CFG_39X_SIOCF1, cfg_base); | |
853 | outb(0x01, cfg_base+1); | |
854 | /* May want to update info->enabled. Jean II */ | |
855 | } | |
856 | ||
857 | /* Enable UART bank switching (bit 7) ; Sets the chip to normal | |
858 | * power mode (wake up from sleep mode) (bit 1) */ | |
859 | outb(CFG_39X_SPC, cfg_base); | |
860 | outb(0x82, cfg_base+1); | |
861 | ||
862 | return 0; | |
863 | } | |
864 | ||
865 | /* | |
866 | * Function nsc_ircc_probe_39x (chip, info) | |
867 | * | |
868 | * Test if we really have a '39x chip at the given address | |
869 | * | |
870 | * Note : this code was written by Jan Frey <janfrey@web.de> | |
871 | */ | |
872 | static int nsc_ircc_probe_39x(nsc_chip_t *chip, chipio_t *info) | |
873 | { | |
874 | int cfg_base = info->cfg_base; | |
875 | int reg1, reg2, irq, irqt, dma1, dma2; | |
876 | int enabled, susp; | |
877 | ||
878 | IRDA_DEBUG(2, "%s(), nsc_ircc_probe_39x, base=%d\n", | |
a97a6f10 | 879 | __func__, cfg_base); |
1da177e4 LT |
880 | |
881 | /* This function should be executed with irq off to avoid | |
882 | * another driver messing with the Super I/O bank - Jean II */ | |
883 | ||
884 | /* Access bank for SP2 */ | |
885 | outb(CFG_39X_LDN, cfg_base); | |
886 | outb(0x02, cfg_base+1); | |
887 | ||
888 | /* Read infos about SP2 ; store in info struct */ | |
889 | outb(CFG_39X_BASEH, cfg_base); | |
890 | reg1 = inb(cfg_base+1); | |
891 | outb(CFG_39X_BASEL, cfg_base); | |
892 | reg2 = inb(cfg_base+1); | |
893 | info->fir_base = (reg1 << 8) | reg2; | |
894 | ||
895 | outb(CFG_39X_IRQNUM, cfg_base); | |
896 | irq = inb(cfg_base+1); | |
897 | outb(CFG_39X_IRQSEL, cfg_base); | |
898 | irqt = inb(cfg_base+1); | |
899 | info->irq = irq; | |
900 | ||
901 | outb(CFG_39X_DMA0, cfg_base); | |
902 | dma1 = inb(cfg_base+1); | |
903 | outb(CFG_39X_DMA1, cfg_base); | |
904 | dma2 = inb(cfg_base+1); | |
905 | info->dma = dma1 -1; | |
906 | ||
907 | outb(CFG_39X_ACT, cfg_base); | |
908 | info->enabled = enabled = inb(cfg_base+1) & 0x01; | |
909 | ||
910 | outb(CFG_39X_SPC, cfg_base); | |
911 | susp = 1 - ((inb(cfg_base+1) & 0x02) >> 1); | |
912 | ||
a97a6f10 | 913 | IRDA_DEBUG(2, "%s(): io=0x%02x%02x, irq=%d (type %d), rxdma=%d, txdma=%d, enabled=%d (suspended=%d)\n", __func__, reg1,reg2,irq,irqt,dma1,dma2,enabled,susp); |
1da177e4 LT |
914 | |
915 | /* Configure SP2 */ | |
916 | ||
917 | /* We want to enable the device if not enabled */ | |
918 | outb(CFG_39X_ACT, cfg_base); | |
919 | enabled = inb(cfg_base+1) & 0x01; | |
920 | ||
921 | if (!enabled) { | |
922 | /* Enable the device */ | |
923 | outb(CFG_39X_SIOCF1, cfg_base); | |
924 | outb(0x01, cfg_base+1); | |
925 | /* May want to update info->enabled. Jean II */ | |
926 | } | |
927 | ||
928 | /* Enable UART bank switching (bit 7) ; Sets the chip to normal | |
929 | * power mode (wake up from sleep mode) (bit 1) */ | |
930 | outb(CFG_39X_SPC, cfg_base); | |
931 | outb(0x82, cfg_base+1); | |
932 | ||
933 | return 0; | |
934 | } | |
935 | ||
c17f888f | 936 | #ifdef CONFIG_PNP |
ec4f32d5 JT |
937 | /* PNP probing */ |
938 | static int nsc_ircc_pnp_probe(struct pnp_dev *dev, const struct pnp_device_id *id) | |
939 | { | |
940 | memset(&pnp_info, 0, sizeof(chipio_t)); | |
941 | pnp_info.irq = -1; | |
942 | pnp_info.dma = -1; | |
943 | pnp_succeeded = 1; | |
944 | ||
1fa98174 MG |
945 | if (id->driver_data & NSC_FORCE_DONGLE_TYPE9) |
946 | dongle_id = 0x9; | |
947 | ||
948 | /* There doesn't seem to be any way of getting the cfg_base. | |
ec4f32d5 JT |
949 | * On my box, cfg_base is in the PnP descriptor of the |
950 | * motherboard. Oh well... Jean II */ | |
951 | ||
952 | if (pnp_port_valid(dev, 0) && | |
953 | !(pnp_port_flags(dev, 0) & IORESOURCE_DISABLED)) | |
954 | pnp_info.fir_base = pnp_port_start(dev, 0); | |
955 | ||
956 | if (pnp_irq_valid(dev, 0) && | |
957 | !(pnp_irq_flags(dev, 0) & IORESOURCE_DISABLED)) | |
958 | pnp_info.irq = pnp_irq(dev, 0); | |
959 | ||
960 | if (pnp_dma_valid(dev, 0) && | |
961 | !(pnp_dma_flags(dev, 0) & IORESOURCE_DISABLED)) | |
962 | pnp_info.dma = pnp_dma(dev, 0); | |
963 | ||
964 | IRDA_DEBUG(0, "%s() : From PnP, found firbase 0x%03X ; irq %d ; dma %d.\n", | |
a97a6f10 | 965 | __func__, pnp_info.fir_base, pnp_info.irq, pnp_info.dma); |
ec4f32d5 JT |
966 | |
967 | if((pnp_info.fir_base == 0) || | |
968 | (pnp_info.irq == -1) || (pnp_info.dma == -1)) { | |
969 | /* Returning an error will disable the device. Yuck ! */ | |
970 | //return -EINVAL; | |
971 | pnp_succeeded = 0; | |
972 | } | |
973 | ||
974 | return 0; | |
975 | } | |
c17f888f | 976 | #endif |
ec4f32d5 | 977 | |
1da177e4 LT |
978 | /* |
979 | * Function nsc_ircc_setup (info) | |
980 | * | |
981 | * Returns non-negative on success. | |
982 | * | |
983 | */ | |
984 | static int nsc_ircc_setup(chipio_t *info) | |
985 | { | |
986 | int version; | |
987 | int iobase = info->fir_base; | |
988 | ||
989 | /* Read the Module ID */ | |
990 | switch_bank(iobase, BANK3); | |
991 | version = inb(iobase+MID); | |
992 | ||
993 | IRDA_DEBUG(2, "%s() Driver %s Found chip version %02x\n", | |
a97a6f10 | 994 | __func__, driver_name, version); |
1da177e4 LT |
995 | |
996 | /* Should be 0x2? */ | |
997 | if (0x20 != (version & 0xf0)) { | |
998 | IRDA_ERROR("%s, Wrong chip version %02x\n", | |
999 | driver_name, version); | |
1000 | return -1; | |
1001 | } | |
1002 | ||
1003 | /* Switch to advanced mode */ | |
1004 | switch_bank(iobase, BANK2); | |
1005 | outb(ECR1_EXT_SL, iobase+ECR1); | |
1006 | switch_bank(iobase, BANK0); | |
1007 | ||
1008 | /* Set FIFO threshold to TX17, RX16, reset and enable FIFO's */ | |
1009 | switch_bank(iobase, BANK0); | |
1010 | outb(FCR_RXTH|FCR_TXTH|FCR_TXSR|FCR_RXSR|FCR_FIFO_EN, iobase+FCR); | |
1011 | ||
1012 | outb(0x03, iobase+LCR); /* 8 bit word length */ | |
1013 | outb(MCR_SIR, iobase+MCR); /* Start at SIR-mode, also clears LSR*/ | |
1014 | ||
1015 | /* Set FIFO size to 32 */ | |
1016 | switch_bank(iobase, BANK2); | |
1017 | outb(EXCR2_RFSIZ|EXCR2_TFSIZ, iobase+EXCR2); | |
1018 | ||
1019 | /* IRCR2: FEND_MD is not set */ | |
1020 | switch_bank(iobase, BANK5); | |
1021 | outb(0x02, iobase+4); | |
1022 | ||
1023 | /* Make sure that some defaults are OK */ | |
1024 | switch_bank(iobase, BANK6); | |
1025 | outb(0x20, iobase+0); /* Set 32 bits FIR CRC */ | |
1026 | outb(0x0a, iobase+1); /* Set MIR pulse width */ | |
1027 | outb(0x0d, iobase+2); /* Set SIR pulse width to 1.6us */ | |
1028 | outb(0x2a, iobase+4); /* Set beginning frag, and preamble length */ | |
1029 | ||
1030 | /* Enable receive interrupts */ | |
1031 | switch_bank(iobase, BANK0); | |
1032 | outb(IER_RXHDL_IE, iobase+IER); | |
1033 | ||
1034 | return 0; | |
1035 | } | |
1036 | ||
1037 | /* | |
1038 | * Function nsc_ircc_read_dongle_id (void) | |
1039 | * | |
1040 | * Try to read dongle indentification. This procedure needs to be executed | |
1041 | * once after power-on/reset. It also needs to be used whenever you suspect | |
1042 | * that the user may have plugged/unplugged the IrDA Dongle. | |
1043 | */ | |
1044 | static int nsc_ircc_read_dongle_id (int iobase) | |
1045 | { | |
1046 | int dongle_id; | |
1047 | __u8 bank; | |
1048 | ||
1049 | bank = inb(iobase+BSR); | |
1050 | ||
1051 | /* Select Bank 7 */ | |
1052 | switch_bank(iobase, BANK7); | |
1053 | ||
1054 | /* IRCFG4: IRSL0_DS and IRSL21_DS are cleared */ | |
1055 | outb(0x00, iobase+7); | |
1056 | ||
1057 | /* ID0, 1, and 2 are pulled up/down very slowly */ | |
1058 | udelay(50); | |
1059 | ||
1060 | /* IRCFG1: read the ID bits */ | |
1061 | dongle_id = inb(iobase+4) & 0x0f; | |
1062 | ||
1063 | #ifdef BROKEN_DONGLE_ID | |
1064 | if (dongle_id == 0x0a) | |
1065 | dongle_id = 0x09; | |
1066 | #endif | |
1067 | /* Go back to bank 0 before returning */ | |
1068 | switch_bank(iobase, BANK0); | |
1069 | ||
1070 | outb(bank, iobase+BSR); | |
1071 | ||
1072 | return dongle_id; | |
1073 | } | |
1074 | ||
1075 | /* | |
1076 | * Function nsc_ircc_init_dongle_interface (iobase, dongle_id) | |
1077 | * | |
1078 | * This function initializes the dongle for the transceiver that is | |
1079 | * used. This procedure needs to be executed once after | |
1080 | * power-on/reset. It also needs to be used whenever you suspect that | |
1081 | * the dongle is changed. | |
1082 | */ | |
1083 | static void nsc_ircc_init_dongle_interface (int iobase, int dongle_id) | |
1084 | { | |
1085 | int bank; | |
1086 | ||
1087 | /* Save current bank */ | |
1088 | bank = inb(iobase+BSR); | |
1089 | ||
1090 | /* Select Bank 7 */ | |
1091 | switch_bank(iobase, BANK7); | |
1092 | ||
1093 | /* IRCFG4: set according to dongle_id */ | |
1094 | switch (dongle_id) { | |
1095 | case 0x00: /* same as */ | |
1096 | case 0x01: /* Differential serial interface */ | |
1097 | IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n", | |
a97a6f10 | 1098 | __func__, dongle_types[dongle_id]); |
1da177e4 LT |
1099 | break; |
1100 | case 0x02: /* same as */ | |
1101 | case 0x03: /* Reserved */ | |
1102 | IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n", | |
a97a6f10 | 1103 | __func__, dongle_types[dongle_id]); |
1da177e4 LT |
1104 | break; |
1105 | case 0x04: /* Sharp RY5HD01 */ | |
1106 | break; | |
1107 | case 0x05: /* Reserved, but this is what the Thinkpad reports */ | |
1108 | IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n", | |
a97a6f10 | 1109 | __func__, dongle_types[dongle_id]); |
1da177e4 LT |
1110 | break; |
1111 | case 0x06: /* Single-ended serial interface */ | |
1112 | IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n", | |
a97a6f10 | 1113 | __func__, dongle_types[dongle_id]); |
1da177e4 LT |
1114 | break; |
1115 | case 0x07: /* Consumer-IR only */ | |
1116 | IRDA_DEBUG(0, "%s(), %s is not for IrDA mode\n", | |
a97a6f10 | 1117 | __func__, dongle_types[dongle_id]); |
1da177e4 LT |
1118 | break; |
1119 | case 0x08: /* HP HSDL-2300, HP HSDL-3600/HSDL-3610 */ | |
1120 | IRDA_DEBUG(0, "%s(), %s\n", | |
a97a6f10 | 1121 | __func__, dongle_types[dongle_id]); |
1da177e4 LT |
1122 | break; |
1123 | case 0x09: /* IBM31T1100 or Temic TFDS6000/TFDS6500 */ | |
1124 | outb(0x28, iobase+7); /* Set irsl[0-2] as output */ | |
1125 | break; | |
1126 | case 0x0A: /* same as */ | |
1127 | case 0x0B: /* Reserved */ | |
1128 | IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n", | |
a97a6f10 | 1129 | __func__, dongle_types[dongle_id]); |
1da177e4 LT |
1130 | break; |
1131 | case 0x0C: /* same as */ | |
1132 | case 0x0D: /* HP HSDL-1100/HSDL-2100 */ | |
1133 | /* | |
1134 | * Set irsl0 as input, irsl[1-2] as output, and separate | |
1135 | * inputs are used for SIR and MIR/FIR | |
1136 | */ | |
1137 | outb(0x48, iobase+7); | |
1138 | break; | |
1139 | case 0x0E: /* Supports SIR Mode only */ | |
1140 | outb(0x28, iobase+7); /* Set irsl[0-2] as output */ | |
1141 | break; | |
1142 | case 0x0F: /* No dongle connected */ | |
1143 | IRDA_DEBUG(0, "%s(), %s\n", | |
a97a6f10 | 1144 | __func__, dongle_types[dongle_id]); |
1da177e4 LT |
1145 | |
1146 | switch_bank(iobase, BANK0); | |
1147 | outb(0x62, iobase+MCR); | |
1148 | break; | |
1149 | default: | |
1150 | IRDA_DEBUG(0, "%s(), invalid dongle_id %#x", | |
a97a6f10 | 1151 | __func__, dongle_id); |
1da177e4 LT |
1152 | } |
1153 | ||
1154 | /* IRCFG1: IRSL1 and 2 are set to IrDA mode */ | |
1155 | outb(0x00, iobase+4); | |
1156 | ||
1157 | /* Restore bank register */ | |
1158 | outb(bank, iobase+BSR); | |
1159 | ||
1160 | } /* set_up_dongle_interface */ | |
1161 | ||
1162 | /* | |
1163 | * Function nsc_ircc_change_dongle_speed (iobase, speed, dongle_id) | |
1164 | * | |
1165 | * Change speed of the attach dongle | |
1166 | * | |
1167 | */ | |
1168 | static void nsc_ircc_change_dongle_speed(int iobase, int speed, int dongle_id) | |
1169 | { | |
1170 | __u8 bank; | |
1171 | ||
1172 | /* Save current bank */ | |
1173 | bank = inb(iobase+BSR); | |
1174 | ||
1175 | /* Select Bank 7 */ | |
1176 | switch_bank(iobase, BANK7); | |
1177 | ||
1178 | /* IRCFG1: set according to dongle_id */ | |
1179 | switch (dongle_id) { | |
1180 | case 0x00: /* same as */ | |
1181 | case 0x01: /* Differential serial interface */ | |
1182 | IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n", | |
a97a6f10 | 1183 | __func__, dongle_types[dongle_id]); |
1da177e4 LT |
1184 | break; |
1185 | case 0x02: /* same as */ | |
1186 | case 0x03: /* Reserved */ | |
1187 | IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n", | |
a97a6f10 | 1188 | __func__, dongle_types[dongle_id]); |
1da177e4 LT |
1189 | break; |
1190 | case 0x04: /* Sharp RY5HD01 */ | |
1191 | break; | |
1192 | case 0x05: /* Reserved */ | |
1193 | IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n", | |
a97a6f10 | 1194 | __func__, dongle_types[dongle_id]); |
1da177e4 LT |
1195 | break; |
1196 | case 0x06: /* Single-ended serial interface */ | |
1197 | IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n", | |
a97a6f10 | 1198 | __func__, dongle_types[dongle_id]); |
1da177e4 LT |
1199 | break; |
1200 | case 0x07: /* Consumer-IR only */ | |
1201 | IRDA_DEBUG(0, "%s(), %s is not for IrDA mode\n", | |
a97a6f10 | 1202 | __func__, dongle_types[dongle_id]); |
1da177e4 LT |
1203 | break; |
1204 | case 0x08: /* HP HSDL-2300, HP HSDL-3600/HSDL-3610 */ | |
1205 | IRDA_DEBUG(0, "%s(), %s\n", | |
a97a6f10 | 1206 | __func__, dongle_types[dongle_id]); |
1da177e4 LT |
1207 | outb(0x00, iobase+4); |
1208 | if (speed > 115200) | |
1209 | outb(0x01, iobase+4); | |
1210 | break; | |
1211 | case 0x09: /* IBM31T1100 or Temic TFDS6000/TFDS6500 */ | |
1212 | outb(0x01, iobase+4); | |
1213 | ||
1214 | if (speed == 4000000) { | |
1215 | /* There was a cli() there, but we now are already | |
1216 | * under spin_lock_irqsave() - JeanII */ | |
1217 | outb(0x81, iobase+4); | |
1218 | outb(0x80, iobase+4); | |
1219 | } else | |
1220 | outb(0x00, iobase+4); | |
1221 | break; | |
1222 | case 0x0A: /* same as */ | |
1223 | case 0x0B: /* Reserved */ | |
1224 | IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n", | |
a97a6f10 | 1225 | __func__, dongle_types[dongle_id]); |
1da177e4 LT |
1226 | break; |
1227 | case 0x0C: /* same as */ | |
1228 | case 0x0D: /* HP HSDL-1100/HSDL-2100 */ | |
1229 | break; | |
1230 | case 0x0E: /* Supports SIR Mode only */ | |
1231 | break; | |
1232 | case 0x0F: /* No dongle connected */ | |
1233 | IRDA_DEBUG(0, "%s(), %s is not for IrDA mode\n", | |
a97a6f10 | 1234 | __func__, dongle_types[dongle_id]); |
1da177e4 LT |
1235 | |
1236 | switch_bank(iobase, BANK0); | |
1237 | outb(0x62, iobase+MCR); | |
1238 | break; | |
1239 | default: | |
a97a6f10 | 1240 | IRDA_DEBUG(0, "%s(), invalid data_rate\n", __func__); |
1da177e4 LT |
1241 | } |
1242 | /* Restore bank register */ | |
1243 | outb(bank, iobase+BSR); | |
1244 | } | |
1245 | ||
1246 | /* | |
1247 | * Function nsc_ircc_change_speed (self, baud) | |
1248 | * | |
1249 | * Change the speed of the device | |
1250 | * | |
1251 | * This function *must* be called with irq off and spin-lock. | |
1252 | */ | |
1253 | static __u8 nsc_ircc_change_speed(struct nsc_ircc_cb *self, __u32 speed) | |
1254 | { | |
1255 | struct net_device *dev = self->netdev; | |
1256 | __u8 mcr = MCR_SIR; | |
1257 | int iobase; | |
1258 | __u8 bank; | |
1259 | __u8 ier; /* Interrupt enable register */ | |
1260 | ||
a97a6f10 | 1261 | IRDA_DEBUG(2, "%s(), speed=%d\n", __func__, speed); |
1da177e4 LT |
1262 | |
1263 | IRDA_ASSERT(self != NULL, return 0;); | |
1264 | ||
1265 | iobase = self->io.fir_base; | |
1266 | ||
1267 | /* Update accounting for new speed */ | |
1268 | self->io.speed = speed; | |
1269 | ||
1270 | /* Save current bank */ | |
1271 | bank = inb(iobase+BSR); | |
1272 | ||
1273 | /* Disable interrupts */ | |
1274 | switch_bank(iobase, BANK0); | |
1275 | outb(0, iobase+IER); | |
1276 | ||
1277 | /* Select Bank 2 */ | |
1278 | switch_bank(iobase, BANK2); | |
1279 | ||
1280 | outb(0x00, iobase+BGDH); | |
1281 | switch (speed) { | |
1282 | case 9600: outb(0x0c, iobase+BGDL); break; | |
1283 | case 19200: outb(0x06, iobase+BGDL); break; | |
1284 | case 38400: outb(0x03, iobase+BGDL); break; | |
1285 | case 57600: outb(0x02, iobase+BGDL); break; | |
1286 | case 115200: outb(0x01, iobase+BGDL); break; | |
1287 | case 576000: | |
1288 | switch_bank(iobase, BANK5); | |
1289 | ||
1290 | /* IRCR2: MDRS is set */ | |
1291 | outb(inb(iobase+4) | 0x04, iobase+4); | |
1292 | ||
1293 | mcr = MCR_MIR; | |
a97a6f10 | 1294 | IRDA_DEBUG(0, "%s(), handling baud of 576000\n", __func__); |
1da177e4 LT |
1295 | break; |
1296 | case 1152000: | |
1297 | mcr = MCR_MIR; | |
a97a6f10 | 1298 | IRDA_DEBUG(0, "%s(), handling baud of 1152000\n", __func__); |
1da177e4 LT |
1299 | break; |
1300 | case 4000000: | |
1301 | mcr = MCR_FIR; | |
a97a6f10 | 1302 | IRDA_DEBUG(0, "%s(), handling baud of 4000000\n", __func__); |
1da177e4 LT |
1303 | break; |
1304 | default: | |
1305 | mcr = MCR_FIR; | |
1306 | IRDA_DEBUG(0, "%s(), unknown baud rate of %d\n", | |
a97a6f10 | 1307 | __func__, speed); |
1da177e4 LT |
1308 | break; |
1309 | } | |
1310 | ||
1311 | /* Set appropriate speed mode */ | |
1312 | switch_bank(iobase, BANK0); | |
1313 | outb(mcr | MCR_TX_DFR, iobase+MCR); | |
1314 | ||
1315 | /* Give some hits to the transceiver */ | |
1316 | nsc_ircc_change_dongle_speed(iobase, speed, self->io.dongle_id); | |
1317 | ||
1318 | /* Set FIFO threshold to TX17, RX16 */ | |
1319 | switch_bank(iobase, BANK0); | |
1320 | outb(0x00, iobase+FCR); | |
1321 | outb(FCR_FIFO_EN, iobase+FCR); | |
1322 | outb(FCR_RXTH| /* Set Rx FIFO threshold */ | |
1323 | FCR_TXTH| /* Set Tx FIFO threshold */ | |
1324 | FCR_TXSR| /* Reset Tx FIFO */ | |
1325 | FCR_RXSR| /* Reset Rx FIFO */ | |
1326 | FCR_FIFO_EN, /* Enable FIFOs */ | |
1327 | iobase+FCR); | |
1328 | ||
1329 | /* Set FIFO size to 32 */ | |
1330 | switch_bank(iobase, BANK2); | |
1331 | outb(EXCR2_RFSIZ|EXCR2_TFSIZ, iobase+EXCR2); | |
1332 | ||
1333 | /* Enable some interrupts so we can receive frames */ | |
1334 | switch_bank(iobase, BANK0); | |
1335 | if (speed > 115200) { | |
1336 | /* Install FIR xmit handler */ | |
c279b8c9 | 1337 | dev->netdev_ops = &nsc_ircc_fir_ops; |
1da177e4 LT |
1338 | ier = IER_SFIF_IE; |
1339 | nsc_ircc_dma_receive(self); | |
1340 | } else { | |
1341 | /* Install SIR xmit handler */ | |
c279b8c9 | 1342 | dev->netdev_ops = &nsc_ircc_sir_ops; |
1da177e4 LT |
1343 | ier = IER_RXHDL_IE; |
1344 | } | |
1345 | /* Set our current interrupt mask */ | |
1346 | outb(ier, iobase+IER); | |
1347 | ||
1348 | /* Restore BSR */ | |
1349 | outb(bank, iobase+BSR); | |
1350 | ||
1351 | /* Make sure interrupt handlers keep the proper interrupt mask */ | |
807540ba | 1352 | return ier; |
1da177e4 LT |
1353 | } |
1354 | ||
1355 | /* | |
1356 | * Function nsc_ircc_hard_xmit (skb, dev) | |
1357 | * | |
1358 | * Transmit the frame! | |
1359 | * | |
1360 | */ | |
6518bbb8 SH |
1361 | static netdev_tx_t nsc_ircc_hard_xmit_sir(struct sk_buff *skb, |
1362 | struct net_device *dev) | |
1da177e4 LT |
1363 | { |
1364 | struct nsc_ircc_cb *self; | |
1365 | unsigned long flags; | |
1366 | int iobase; | |
1367 | __s32 speed; | |
1368 | __u8 bank; | |
1369 | ||
4cf1653a | 1370 | self = netdev_priv(dev); |
1da177e4 | 1371 | |
ec634fe3 | 1372 | IRDA_ASSERT(self != NULL, return NETDEV_TX_OK;); |
1da177e4 LT |
1373 | |
1374 | iobase = self->io.fir_base; | |
1375 | ||
1376 | netif_stop_queue(dev); | |
1377 | ||
1378 | /* Make sure tests *& speed change are atomic */ | |
1379 | spin_lock_irqsave(&self->lock, flags); | |
1380 | ||
1381 | /* Check if we need to change the speed */ | |
1382 | speed = irda_get_next_speed(skb); | |
1383 | if ((speed != self->io.speed) && (speed != -1)) { | |
1384 | /* Check for empty frame. */ | |
1385 | if (!skb->len) { | |
1386 | /* If we just sent a frame, we get called before | |
1387 | * the last bytes get out (because of the SIR FIFO). | |
1388 | * If this is the case, let interrupt handler change | |
1389 | * the speed itself... Jean II */ | |
1390 | if (self->io.direction == IO_RECV) { | |
1391 | nsc_ircc_change_speed(self, speed); | |
1392 | /* TODO : For SIR->SIR, the next packet | |
1393 | * may get corrupted - Jean II */ | |
1394 | netif_wake_queue(dev); | |
1395 | } else { | |
1396 | self->new_speed = speed; | |
1397 | /* Queue will be restarted after speed change | |
1398 | * to make sure packets gets through the | |
1399 | * proper xmit handler - Jean II */ | |
1400 | } | |
1401 | dev->trans_start = jiffies; | |
1402 | spin_unlock_irqrestore(&self->lock, flags); | |
1403 | dev_kfree_skb(skb); | |
6ed10654 | 1404 | return NETDEV_TX_OK; |
1da177e4 LT |
1405 | } else |
1406 | self->new_speed = speed; | |
1407 | } | |
1408 | ||
1409 | /* Save current bank */ | |
1410 | bank = inb(iobase+BSR); | |
1411 | ||
1412 | self->tx_buff.data = self->tx_buff.head; | |
1413 | ||
1414 | self->tx_buff.len = async_wrap_skb(skb, self->tx_buff.data, | |
1415 | self->tx_buff.truesize); | |
1416 | ||
af049081 | 1417 | dev->stats.tx_bytes += self->tx_buff.len; |
1da177e4 LT |
1418 | |
1419 | /* Add interrupt on tx low level (will fire immediately) */ | |
1420 | switch_bank(iobase, BANK0); | |
1421 | outb(IER_TXLDL_IE, iobase+IER); | |
1422 | ||
1423 | /* Restore bank register */ | |
1424 | outb(bank, iobase+BSR); | |
1425 | ||
1426 | dev->trans_start = jiffies; | |
1427 | spin_unlock_irqrestore(&self->lock, flags); | |
1428 | ||
1429 | dev_kfree_skb(skb); | |
1430 | ||
6ed10654 | 1431 | return NETDEV_TX_OK; |
1da177e4 LT |
1432 | } |
1433 | ||
6518bbb8 SH |
1434 | static netdev_tx_t nsc_ircc_hard_xmit_fir(struct sk_buff *skb, |
1435 | struct net_device *dev) | |
1da177e4 LT |
1436 | { |
1437 | struct nsc_ircc_cb *self; | |
1438 | unsigned long flags; | |
1439 | int iobase; | |
1440 | __s32 speed; | |
1441 | __u8 bank; | |
1442 | int mtt, diff; | |
1443 | ||
4cf1653a | 1444 | self = netdev_priv(dev); |
1da177e4 LT |
1445 | iobase = self->io.fir_base; |
1446 | ||
1447 | netif_stop_queue(dev); | |
1448 | ||
1449 | /* Make sure tests *& speed change are atomic */ | |
1450 | spin_lock_irqsave(&self->lock, flags); | |
1451 | ||
1452 | /* Check if we need to change the speed */ | |
1453 | speed = irda_get_next_speed(skb); | |
1454 | if ((speed != self->io.speed) && (speed != -1)) { | |
1455 | /* Check for empty frame. */ | |
1456 | if (!skb->len) { | |
1457 | /* If we are currently transmitting, defer to | |
1458 | * interrupt handler. - Jean II */ | |
1459 | if(self->tx_fifo.len == 0) { | |
1460 | nsc_ircc_change_speed(self, speed); | |
1461 | netif_wake_queue(dev); | |
1462 | } else { | |
1463 | self->new_speed = speed; | |
1464 | /* Keep queue stopped : | |
1465 | * the speed change operation may change the | |
1466 | * xmit handler, and we want to make sure | |
1467 | * the next packet get through the proper | |
1468 | * Tx path, so block the Tx queue until | |
1469 | * the speed change has been done. | |
1470 | * Jean II */ | |
1471 | } | |
1472 | dev->trans_start = jiffies; | |
1473 | spin_unlock_irqrestore(&self->lock, flags); | |
1474 | dev_kfree_skb(skb); | |
6ed10654 | 1475 | return NETDEV_TX_OK; |
1da177e4 LT |
1476 | } else { |
1477 | /* Change speed after current frame */ | |
1478 | self->new_speed = speed; | |
1479 | } | |
1480 | } | |
1481 | ||
1482 | /* Save current bank */ | |
1483 | bank = inb(iobase+BSR); | |
1484 | ||
1485 | /* Register and copy this frame to DMA memory */ | |
1486 | self->tx_fifo.queue[self->tx_fifo.free].start = self->tx_fifo.tail; | |
1487 | self->tx_fifo.queue[self->tx_fifo.free].len = skb->len; | |
1488 | self->tx_fifo.tail += skb->len; | |
1489 | ||
af049081 | 1490 | dev->stats.tx_bytes += skb->len; |
1da177e4 | 1491 | |
d626f62b ACM |
1492 | skb_copy_from_linear_data(skb, self->tx_fifo.queue[self->tx_fifo.free].start, |
1493 | skb->len); | |
1da177e4 LT |
1494 | self->tx_fifo.len++; |
1495 | self->tx_fifo.free++; | |
1496 | ||
1497 | /* Start transmit only if there is currently no transmit going on */ | |
1498 | if (self->tx_fifo.len == 1) { | |
1499 | /* Check if we must wait the min turn time or not */ | |
1500 | mtt = irda_get_mtt(skb); | |
1501 | if (mtt) { | |
1502 | /* Check how much time we have used already */ | |
1503 | do_gettimeofday(&self->now); | |
1504 | diff = self->now.tv_usec - self->stamp.tv_usec; | |
1505 | if (diff < 0) | |
1506 | diff += 1000000; | |
1507 | ||
1508 | /* Check if the mtt is larger than the time we have | |
1509 | * already used by all the protocol processing | |
1510 | */ | |
1511 | if (mtt > diff) { | |
1512 | mtt -= diff; | |
1513 | ||
1514 | /* | |
1515 | * Use timer if delay larger than 125 us, and | |
1516 | * use udelay for smaller values which should | |
1517 | * be acceptable | |
1518 | */ | |
1519 | if (mtt > 125) { | |
1520 | /* Adjust for timer resolution */ | |
1521 | mtt = mtt / 125; | |
1522 | ||
1523 | /* Setup timer */ | |
1524 | switch_bank(iobase, BANK4); | |
1525 | outb(mtt & 0xff, iobase+TMRL); | |
1526 | outb((mtt >> 8) & 0x0f, iobase+TMRH); | |
1527 | ||
1528 | /* Start timer */ | |
1529 | outb(IRCR1_TMR_EN, iobase+IRCR1); | |
1530 | self->io.direction = IO_XMIT; | |
1531 | ||
1532 | /* Enable timer interrupt */ | |
1533 | switch_bank(iobase, BANK0); | |
1534 | outb(IER_TMR_IE, iobase+IER); | |
1535 | ||
1536 | /* Timer will take care of the rest */ | |
1537 | goto out; | |
1538 | } else | |
1539 | udelay(mtt); | |
1540 | } | |
1541 | } | |
1542 | /* Enable DMA interrupt */ | |
1543 | switch_bank(iobase, BANK0); | |
1544 | outb(IER_DMA_IE, iobase+IER); | |
1545 | ||
1546 | /* Transmit frame */ | |
1547 | nsc_ircc_dma_xmit(self, iobase); | |
1548 | } | |
1549 | out: | |
1550 | /* Not busy transmitting anymore if window is not full, | |
1551 | * and if we don't need to change speed */ | |
1552 | if ((self->tx_fifo.free < MAX_TX_WINDOW) && (self->new_speed == 0)) | |
1553 | netif_wake_queue(self->netdev); | |
1554 | ||
1555 | /* Restore bank register */ | |
1556 | outb(bank, iobase+BSR); | |
1557 | ||
1558 | dev->trans_start = jiffies; | |
1559 | spin_unlock_irqrestore(&self->lock, flags); | |
1560 | dev_kfree_skb(skb); | |
1561 | ||
6ed10654 | 1562 | return NETDEV_TX_OK; |
1da177e4 LT |
1563 | } |
1564 | ||
1565 | /* | |
1566 | * Function nsc_ircc_dma_xmit (self, iobase) | |
1567 | * | |
1568 | * Transmit data using DMA | |
1569 | * | |
1570 | */ | |
1571 | static void nsc_ircc_dma_xmit(struct nsc_ircc_cb *self, int iobase) | |
1572 | { | |
1573 | int bsr; | |
1574 | ||
1575 | /* Save current bank */ | |
1576 | bsr = inb(iobase+BSR); | |
1577 | ||
1578 | /* Disable DMA */ | |
1579 | switch_bank(iobase, BANK0); | |
1580 | outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR); | |
1581 | ||
1582 | self->io.direction = IO_XMIT; | |
1583 | ||
1584 | /* Choose transmit DMA channel */ | |
1585 | switch_bank(iobase, BANK2); | |
1586 | outb(ECR1_DMASWP|ECR1_DMANF|ECR1_EXT_SL, iobase+ECR1); | |
1587 | ||
1588 | irda_setup_dma(self->io.dma, | |
1589 | ((u8 *)self->tx_fifo.queue[self->tx_fifo.ptr].start - | |
1590 | self->tx_buff.head) + self->tx_buff_dma, | |
1591 | self->tx_fifo.queue[self->tx_fifo.ptr].len, | |
1592 | DMA_TX_MODE); | |
1593 | ||
1594 | /* Enable DMA and SIR interaction pulse */ | |
1595 | switch_bank(iobase, BANK0); | |
1596 | outb(inb(iobase+MCR)|MCR_TX_DFR|MCR_DMA_EN|MCR_IR_PLS, iobase+MCR); | |
1597 | ||
1598 | /* Restore bank register */ | |
1599 | outb(bsr, iobase+BSR); | |
1600 | } | |
1601 | ||
1602 | /* | |
1603 | * Function nsc_ircc_pio_xmit (self, iobase) | |
1604 | * | |
1605 | * Transmit data using PIO. Returns the number of bytes that actually | |
1606 | * got transferred | |
1607 | * | |
1608 | */ | |
1609 | static int nsc_ircc_pio_write(int iobase, __u8 *buf, int len, int fifo_size) | |
1610 | { | |
1611 | int actual = 0; | |
1612 | __u8 bank; | |
1613 | ||
a97a6f10 | 1614 | IRDA_DEBUG(4, "%s()\n", __func__); |
1da177e4 LT |
1615 | |
1616 | /* Save current bank */ | |
1617 | bank = inb(iobase+BSR); | |
1618 | ||
1619 | switch_bank(iobase, BANK0); | |
1620 | if (!(inb_p(iobase+LSR) & LSR_TXEMP)) { | |
1621 | IRDA_DEBUG(4, "%s(), warning, FIFO not empty yet!\n", | |
a97a6f10 | 1622 | __func__); |
1da177e4 LT |
1623 | |
1624 | /* FIFO may still be filled to the Tx interrupt threshold */ | |
1625 | fifo_size -= 17; | |
1626 | } | |
1627 | ||
1628 | /* Fill FIFO with current frame */ | |
1629 | while ((fifo_size-- > 0) && (actual < len)) { | |
1630 | /* Transmit next byte */ | |
1631 | outb(buf[actual++], iobase+TXD); | |
1632 | } | |
1633 | ||
1634 | IRDA_DEBUG(4, "%s(), fifo_size %d ; %d sent of %d\n", | |
a97a6f10 | 1635 | __func__, fifo_size, actual, len); |
1da177e4 LT |
1636 | |
1637 | /* Restore bank */ | |
1638 | outb(bank, iobase+BSR); | |
1639 | ||
1640 | return actual; | |
1641 | } | |
1642 | ||
1643 | /* | |
1644 | * Function nsc_ircc_dma_xmit_complete (self) | |
1645 | * | |
1646 | * The transfer of a frame in finished. This function will only be called | |
1647 | * by the interrupt handler | |
1648 | * | |
1649 | */ | |
1650 | static int nsc_ircc_dma_xmit_complete(struct nsc_ircc_cb *self) | |
1651 | { | |
1652 | int iobase; | |
1653 | __u8 bank; | |
1654 | int ret = TRUE; | |
1655 | ||
a97a6f10 | 1656 | IRDA_DEBUG(2, "%s()\n", __func__); |
1da177e4 LT |
1657 | |
1658 | iobase = self->io.fir_base; | |
1659 | ||
1660 | /* Save current bank */ | |
1661 | bank = inb(iobase+BSR); | |
1662 | ||
1663 | /* Disable DMA */ | |
1664 | switch_bank(iobase, BANK0); | |
1665 | outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR); | |
1666 | ||
1667 | /* Check for underrrun! */ | |
1668 | if (inb(iobase+ASCR) & ASCR_TXUR) { | |
af049081 SH |
1669 | self->netdev->stats.tx_errors++; |
1670 | self->netdev->stats.tx_fifo_errors++; | |
1da177e4 LT |
1671 | |
1672 | /* Clear bit, by writing 1 into it */ | |
1673 | outb(ASCR_TXUR, iobase+ASCR); | |
1674 | } else { | |
af049081 | 1675 | self->netdev->stats.tx_packets++; |
1da177e4 LT |
1676 | } |
1677 | ||
1678 | /* Finished with this frame, so prepare for next */ | |
1679 | self->tx_fifo.ptr++; | |
1680 | self->tx_fifo.len--; | |
1681 | ||
1682 | /* Any frames to be sent back-to-back? */ | |
1683 | if (self->tx_fifo.len) { | |
1684 | nsc_ircc_dma_xmit(self, iobase); | |
1685 | ||
1686 | /* Not finished yet! */ | |
1687 | ret = FALSE; | |
1688 | } else { | |
1689 | /* Reset Tx FIFO info */ | |
1690 | self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0; | |
1691 | self->tx_fifo.tail = self->tx_buff.head; | |
1692 | } | |
1693 | ||
1694 | /* Make sure we have room for more frames and | |
1695 | * that we don't need to change speed */ | |
1696 | if ((self->tx_fifo.free < MAX_TX_WINDOW) && (self->new_speed == 0)) { | |
1697 | /* Not busy transmitting anymore */ | |
1698 | /* Tell the network layer, that we can accept more frames */ | |
1699 | netif_wake_queue(self->netdev); | |
1700 | } | |
1701 | ||
1702 | /* Restore bank */ | |
1703 | outb(bank, iobase+BSR); | |
1704 | ||
1705 | return ret; | |
1706 | } | |
1707 | ||
1708 | /* | |
1709 | * Function nsc_ircc_dma_receive (self) | |
1710 | * | |
1711 | * Get ready for receiving a frame. The device will initiate a DMA | |
1712 | * if it starts to receive a frame. | |
1713 | * | |
1714 | */ | |
1715 | static int nsc_ircc_dma_receive(struct nsc_ircc_cb *self) | |
1716 | { | |
1717 | int iobase; | |
1718 | __u8 bsr; | |
1719 | ||
1720 | iobase = self->io.fir_base; | |
1721 | ||
1722 | /* Reset Tx FIFO info */ | |
1723 | self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0; | |
1724 | self->tx_fifo.tail = self->tx_buff.head; | |
1725 | ||
1726 | /* Save current bank */ | |
1727 | bsr = inb(iobase+BSR); | |
1728 | ||
1729 | /* Disable DMA */ | |
1730 | switch_bank(iobase, BANK0); | |
1731 | outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR); | |
1732 | ||
1733 | /* Choose DMA Rx, DMA Fairness, and Advanced mode */ | |
1734 | switch_bank(iobase, BANK2); | |
1735 | outb(ECR1_DMANF|ECR1_EXT_SL, iobase+ECR1); | |
1736 | ||
1737 | self->io.direction = IO_RECV; | |
1738 | self->rx_buff.data = self->rx_buff.head; | |
1739 | ||
1740 | /* Reset Rx FIFO. This will also flush the ST_FIFO */ | |
1741 | switch_bank(iobase, BANK0); | |
1742 | outb(FCR_RXSR|FCR_FIFO_EN, iobase+FCR); | |
1743 | ||
1744 | self->st_fifo.len = self->st_fifo.pending_bytes = 0; | |
1745 | self->st_fifo.tail = self->st_fifo.head = 0; | |
1746 | ||
1747 | irda_setup_dma(self->io.dma, self->rx_buff_dma, self->rx_buff.truesize, | |
1748 | DMA_RX_MODE); | |
1749 | ||
1750 | /* Enable DMA */ | |
1751 | switch_bank(iobase, BANK0); | |
1752 | outb(inb(iobase+MCR)|MCR_DMA_EN, iobase+MCR); | |
1753 | ||
1754 | /* Restore bank register */ | |
1755 | outb(bsr, iobase+BSR); | |
1756 | ||
1757 | return 0; | |
1758 | } | |
1759 | ||
1760 | /* | |
1761 | * Function nsc_ircc_dma_receive_complete (self) | |
1762 | * | |
1763 | * Finished with receiving frames | |
1764 | * | |
1765 | * | |
1766 | */ | |
1767 | static int nsc_ircc_dma_receive_complete(struct nsc_ircc_cb *self, int iobase) | |
1768 | { | |
1769 | struct st_fifo *st_fifo; | |
1770 | struct sk_buff *skb; | |
1771 | __u8 status; | |
1772 | __u8 bank; | |
1773 | int len; | |
1774 | ||
1775 | st_fifo = &self->st_fifo; | |
1776 | ||
1777 | /* Save current bank */ | |
1778 | bank = inb(iobase+BSR); | |
1779 | ||
1780 | /* Read all entries in status FIFO */ | |
1781 | switch_bank(iobase, BANK5); | |
1782 | while ((status = inb(iobase+FRM_ST)) & FRM_ST_VLD) { | |
1783 | /* We must empty the status FIFO no matter what */ | |
1784 | len = inb(iobase+RFLFL) | ((inb(iobase+RFLFH) & 0x1f) << 8); | |
1785 | ||
1786 | if (st_fifo->tail >= MAX_RX_WINDOW) { | |
a97a6f10 | 1787 | IRDA_DEBUG(0, "%s(), window is full!\n", __func__); |
1da177e4 LT |
1788 | continue; |
1789 | } | |
1790 | ||
1791 | st_fifo->entries[st_fifo->tail].status = status; | |
1792 | st_fifo->entries[st_fifo->tail].len = len; | |
1793 | st_fifo->pending_bytes += len; | |
1794 | st_fifo->tail++; | |
1795 | st_fifo->len++; | |
1796 | } | |
1797 | /* Try to process all entries in status FIFO */ | |
1798 | while (st_fifo->len > 0) { | |
1799 | /* Get first entry */ | |
1800 | status = st_fifo->entries[st_fifo->head].status; | |
1801 | len = st_fifo->entries[st_fifo->head].len; | |
1802 | st_fifo->pending_bytes -= len; | |
1803 | st_fifo->head++; | |
1804 | st_fifo->len--; | |
1805 | ||
1806 | /* Check for errors */ | |
1807 | if (status & FRM_ST_ERR_MSK) { | |
1808 | if (status & FRM_ST_LOST_FR) { | |
1809 | /* Add number of lost frames to stats */ | |
af049081 | 1810 | self->netdev->stats.rx_errors += len; |
1da177e4 LT |
1811 | } else { |
1812 | /* Skip frame */ | |
af049081 | 1813 | self->netdev->stats.rx_errors++; |
1da177e4 LT |
1814 | |
1815 | self->rx_buff.data += len; | |
1816 | ||
1817 | if (status & FRM_ST_MAX_LEN) | |
af049081 | 1818 | self->netdev->stats.rx_length_errors++; |
1da177e4 LT |
1819 | |
1820 | if (status & FRM_ST_PHY_ERR) | |
af049081 | 1821 | self->netdev->stats.rx_frame_errors++; |
1da177e4 LT |
1822 | |
1823 | if (status & FRM_ST_BAD_CRC) | |
af049081 | 1824 | self->netdev->stats.rx_crc_errors++; |
1da177e4 LT |
1825 | } |
1826 | /* The errors below can be reported in both cases */ | |
1827 | if (status & FRM_ST_OVR1) | |
af049081 | 1828 | self->netdev->stats.rx_fifo_errors++; |
1da177e4 LT |
1829 | |
1830 | if (status & FRM_ST_OVR2) | |
af049081 | 1831 | self->netdev->stats.rx_fifo_errors++; |
1da177e4 LT |
1832 | } else { |
1833 | /* | |
1834 | * First we must make sure that the frame we | |
1835 | * want to deliver is all in main memory. If we | |
1836 | * cannot tell, then we check if the Rx FIFO is | |
1837 | * empty. If not then we will have to take a nap | |
1838 | * and try again later. | |
1839 | */ | |
1840 | if (st_fifo->pending_bytes < self->io.fifo_size) { | |
1841 | switch_bank(iobase, BANK0); | |
1842 | if (inb(iobase+LSR) & LSR_RXDA) { | |
1843 | /* Put this entry back in fifo */ | |
1844 | st_fifo->head--; | |
1845 | st_fifo->len++; | |
1846 | st_fifo->pending_bytes += len; | |
1847 | st_fifo->entries[st_fifo->head].status = status; | |
1848 | st_fifo->entries[st_fifo->head].len = len; | |
1849 | /* | |
1850 | * DMA not finished yet, so try again | |
1851 | * later, set timer value, resolution | |
1852 | * 125 us | |
1853 | */ | |
1854 | switch_bank(iobase, BANK4); | |
1855 | outb(0x02, iobase+TMRL); /* x 125 us */ | |
1856 | outb(0x00, iobase+TMRH); | |
1857 | ||
1858 | /* Start timer */ | |
1859 | outb(IRCR1_TMR_EN, iobase+IRCR1); | |
1860 | ||
1861 | /* Restore bank register */ | |
1862 | outb(bank, iobase+BSR); | |
1863 | ||
1864 | return FALSE; /* I'll be back! */ | |
1865 | } | |
1866 | } | |
1867 | ||
1868 | /* | |
1869 | * Remember the time we received this frame, so we can | |
1870 | * reduce the min turn time a bit since we will know | |
1871 | * how much time we have used for protocol processing | |
1872 | */ | |
1873 | do_gettimeofday(&self->stamp); | |
1874 | ||
1875 | skb = dev_alloc_skb(len+1); | |
1876 | if (skb == NULL) { | |
1877 | IRDA_WARNING("%s(), memory squeeze, " | |
1878 | "dropping frame.\n", | |
a97a6f10 | 1879 | __func__); |
af049081 | 1880 | self->netdev->stats.rx_dropped++; |
1da177e4 LT |
1881 | |
1882 | /* Restore bank register */ | |
1883 | outb(bank, iobase+BSR); | |
1884 | ||
1885 | return FALSE; | |
1886 | } | |
1887 | ||
1888 | /* Make sure IP header gets aligned */ | |
1889 | skb_reserve(skb, 1); | |
1890 | ||
1891 | /* Copy frame without CRC */ | |
1892 | if (self->io.speed < 4000000) { | |
1893 | skb_put(skb, len-2); | |
27d7ff46 ACM |
1894 | skb_copy_to_linear_data(skb, |
1895 | self->rx_buff.data, | |
1896 | len - 2); | |
1da177e4 LT |
1897 | } else { |
1898 | skb_put(skb, len-4); | |
27d7ff46 ACM |
1899 | skb_copy_to_linear_data(skb, |
1900 | self->rx_buff.data, | |
1901 | len - 4); | |
1da177e4 LT |
1902 | } |
1903 | ||
1904 | /* Move to next frame */ | |
1905 | self->rx_buff.data += len; | |
af049081 SH |
1906 | self->netdev->stats.rx_bytes += len; |
1907 | self->netdev->stats.rx_packets++; | |
1da177e4 LT |
1908 | |
1909 | skb->dev = self->netdev; | |
459a98ed | 1910 | skb_reset_mac_header(skb); |
1da177e4 LT |
1911 | skb->protocol = htons(ETH_P_IRDA); |
1912 | netif_rx(skb); | |
1da177e4 LT |
1913 | } |
1914 | } | |
1915 | /* Restore bank register */ | |
1916 | outb(bank, iobase+BSR); | |
1917 | ||
1918 | return TRUE; | |
1919 | } | |
1920 | ||
1921 | /* | |
1922 | * Function nsc_ircc_pio_receive (self) | |
1923 | * | |
1924 | * Receive all data in receiver FIFO | |
1925 | * | |
1926 | */ | |
1927 | static void nsc_ircc_pio_receive(struct nsc_ircc_cb *self) | |
1928 | { | |
1929 | __u8 byte; | |
1930 | int iobase; | |
1931 | ||
1932 | iobase = self->io.fir_base; | |
1933 | ||
1934 | /* Receive all characters in Rx FIFO */ | |
1935 | do { | |
1936 | byte = inb(iobase+RXD); | |
af049081 SH |
1937 | async_unwrap_char(self->netdev, &self->netdev->stats, |
1938 | &self->rx_buff, byte); | |
1da177e4 LT |
1939 | } while (inb(iobase+LSR) & LSR_RXDA); /* Data available */ |
1940 | } | |
1941 | ||
1942 | /* | |
1943 | * Function nsc_ircc_sir_interrupt (self, eir) | |
1944 | * | |
1945 | * Handle SIR interrupt | |
1946 | * | |
1947 | */ | |
1948 | static void nsc_ircc_sir_interrupt(struct nsc_ircc_cb *self, int eir) | |
1949 | { | |
1950 | int actual; | |
1951 | ||
1952 | /* Check if transmit FIFO is low on data */ | |
1953 | if (eir & EIR_TXLDL_EV) { | |
1954 | /* Write data left in transmit buffer */ | |
1955 | actual = nsc_ircc_pio_write(self->io.fir_base, | |
1956 | self->tx_buff.data, | |
1957 | self->tx_buff.len, | |
1958 | self->io.fifo_size); | |
1959 | self->tx_buff.data += actual; | |
1960 | self->tx_buff.len -= actual; | |
1961 | ||
1962 | self->io.direction = IO_XMIT; | |
1963 | ||
1964 | /* Check if finished */ | |
1965 | if (self->tx_buff.len > 0) | |
1966 | self->ier = IER_TXLDL_IE; | |
1967 | else { | |
1968 | ||
af049081 | 1969 | self->netdev->stats.tx_packets++; |
1da177e4 LT |
1970 | netif_wake_queue(self->netdev); |
1971 | self->ier = IER_TXEMP_IE; | |
1972 | } | |
1973 | ||
1974 | } | |
1975 | /* Check if transmission has completed */ | |
1976 | if (eir & EIR_TXEMP_EV) { | |
1977 | /* Turn around and get ready to receive some data */ | |
1978 | self->io.direction = IO_RECV; | |
1979 | self->ier = IER_RXHDL_IE; | |
1980 | /* Check if we need to change the speed? | |
1981 | * Need to be after self->io.direction to avoid race with | |
1982 | * nsc_ircc_hard_xmit_sir() - Jean II */ | |
1983 | if (self->new_speed) { | |
a97a6f10 | 1984 | IRDA_DEBUG(2, "%s(), Changing speed!\n", __func__); |
1da177e4 LT |
1985 | self->ier = nsc_ircc_change_speed(self, |
1986 | self->new_speed); | |
1987 | self->new_speed = 0; | |
1988 | netif_wake_queue(self->netdev); | |
1989 | ||
1990 | /* Check if we are going to FIR */ | |
1991 | if (self->io.speed > 115200) { | |
1992 | /* No need to do anymore SIR stuff */ | |
1993 | return; | |
1994 | } | |
1995 | } | |
1996 | } | |
1997 | ||
1998 | /* Rx FIFO threshold or timeout */ | |
1999 | if (eir & EIR_RXHDL_EV) { | |
2000 | nsc_ircc_pio_receive(self); | |
2001 | ||
2002 | /* Keep receiving */ | |
2003 | self->ier = IER_RXHDL_IE; | |
2004 | } | |
2005 | } | |
2006 | ||
2007 | /* | |
2008 | * Function nsc_ircc_fir_interrupt (self, eir) | |
2009 | * | |
2010 | * Handle MIR/FIR interrupt | |
2011 | * | |
2012 | */ | |
2013 | static void nsc_ircc_fir_interrupt(struct nsc_ircc_cb *self, int iobase, | |
2014 | int eir) | |
2015 | { | |
2016 | __u8 bank; | |
2017 | ||
2018 | bank = inb(iobase+BSR); | |
2019 | ||
2020 | /* Status FIFO event*/ | |
2021 | if (eir & EIR_SFIF_EV) { | |
2022 | /* Check if DMA has finished */ | |
2023 | if (nsc_ircc_dma_receive_complete(self, iobase)) { | |
2024 | /* Wait for next status FIFO interrupt */ | |
2025 | self->ier = IER_SFIF_IE; | |
2026 | } else { | |
2027 | self->ier = IER_SFIF_IE | IER_TMR_IE; | |
2028 | } | |
2029 | } else if (eir & EIR_TMR_EV) { /* Timer finished */ | |
2030 | /* Disable timer */ | |
2031 | switch_bank(iobase, BANK4); | |
2032 | outb(0, iobase+IRCR1); | |
2033 | ||
2034 | /* Clear timer event */ | |
2035 | switch_bank(iobase, BANK0); | |
2036 | outb(ASCR_CTE, iobase+ASCR); | |
2037 | ||
2038 | /* Check if this is a Tx timer interrupt */ | |
2039 | if (self->io.direction == IO_XMIT) { | |
2040 | nsc_ircc_dma_xmit(self, iobase); | |
2041 | ||
2042 | /* Interrupt on DMA */ | |
2043 | self->ier = IER_DMA_IE; | |
2044 | } else { | |
2045 | /* Check (again) if DMA has finished */ | |
2046 | if (nsc_ircc_dma_receive_complete(self, iobase)) { | |
2047 | self->ier = IER_SFIF_IE; | |
2048 | } else { | |
2049 | self->ier = IER_SFIF_IE | IER_TMR_IE; | |
2050 | } | |
2051 | } | |
2052 | } else if (eir & EIR_DMA_EV) { | |
2053 | /* Finished with all transmissions? */ | |
2054 | if (nsc_ircc_dma_xmit_complete(self)) { | |
2055 | if(self->new_speed != 0) { | |
2056 | /* As we stop the Tx queue, the speed change | |
2057 | * need to be done when the Tx fifo is | |
2058 | * empty. Ask for a Tx done interrupt */ | |
2059 | self->ier = IER_TXEMP_IE; | |
2060 | } else { | |
2061 | /* Check if there are more frames to be | |
2062 | * transmitted */ | |
2063 | if (irda_device_txqueue_empty(self->netdev)) { | |
2064 | /* Prepare for receive */ | |
2065 | nsc_ircc_dma_receive(self); | |
2066 | self->ier = IER_SFIF_IE; | |
2067 | } else | |
2068 | IRDA_WARNING("%s(), potential " | |
2069 | "Tx queue lockup !\n", | |
a97a6f10 | 2070 | __func__); |
1da177e4 LT |
2071 | } |
2072 | } else { | |
2073 | /* Not finished yet, so interrupt on DMA again */ | |
2074 | self->ier = IER_DMA_IE; | |
2075 | } | |
2076 | } else if (eir & EIR_TXEMP_EV) { | |
2077 | /* The Tx FIFO has totally drained out, so now we can change | |
2078 | * the speed... - Jean II */ | |
2079 | self->ier = nsc_ircc_change_speed(self, self->new_speed); | |
2080 | self->new_speed = 0; | |
2081 | netif_wake_queue(self->netdev); | |
2082 | /* Note : nsc_ircc_change_speed() restarted Rx fifo */ | |
2083 | } | |
2084 | ||
2085 | outb(bank, iobase+BSR); | |
2086 | } | |
2087 | ||
2088 | /* | |
2089 | * Function nsc_ircc_interrupt (irq, dev_id, regs) | |
2090 | * | |
2091 | * An interrupt from the chip has arrived. Time to do some work | |
2092 | * | |
2093 | */ | |
7d12e780 | 2094 | static irqreturn_t nsc_ircc_interrupt(int irq, void *dev_id) |
1da177e4 | 2095 | { |
c31f28e7 | 2096 | struct net_device *dev = dev_id; |
1da177e4 LT |
2097 | struct nsc_ircc_cb *self; |
2098 | __u8 bsr, eir; | |
2099 | int iobase; | |
2100 | ||
4cf1653a | 2101 | self = netdev_priv(dev); |
1da177e4 LT |
2102 | |
2103 | spin_lock(&self->lock); | |
2104 | ||
2105 | iobase = self->io.fir_base; | |
2106 | ||
2107 | bsr = inb(iobase+BSR); /* Save current bank */ | |
2108 | ||
2109 | switch_bank(iobase, BANK0); | |
2110 | self->ier = inb(iobase+IER); | |
2111 | eir = inb(iobase+EIR) & self->ier; /* Mask out the interesting ones */ | |
2112 | ||
2113 | outb(0, iobase+IER); /* Disable interrupts */ | |
2114 | ||
2115 | if (eir) { | |
2116 | /* Dispatch interrupt handler for the current speed */ | |
2117 | if (self->io.speed > 115200) | |
2118 | nsc_ircc_fir_interrupt(self, iobase, eir); | |
2119 | else | |
2120 | nsc_ircc_sir_interrupt(self, eir); | |
2121 | } | |
2122 | ||
2123 | outb(self->ier, iobase+IER); /* Restore interrupts */ | |
2124 | outb(bsr, iobase+BSR); /* Restore bank register */ | |
2125 | ||
2126 | spin_unlock(&self->lock); | |
2127 | return IRQ_RETVAL(eir); | |
2128 | } | |
2129 | ||
2130 | /* | |
2131 | * Function nsc_ircc_is_receiving (self) | |
2132 | * | |
2133 | * Return TRUE is we are currently receiving a frame | |
2134 | * | |
2135 | */ | |
2136 | static int nsc_ircc_is_receiving(struct nsc_ircc_cb *self) | |
2137 | { | |
2138 | unsigned long flags; | |
2139 | int status = FALSE; | |
2140 | int iobase; | |
2141 | __u8 bank; | |
2142 | ||
2143 | IRDA_ASSERT(self != NULL, return FALSE;); | |
2144 | ||
2145 | spin_lock_irqsave(&self->lock, flags); | |
2146 | ||
2147 | if (self->io.speed > 115200) { | |
2148 | iobase = self->io.fir_base; | |
2149 | ||
2150 | /* Check if rx FIFO is not empty */ | |
2151 | bank = inb(iobase+BSR); | |
2152 | switch_bank(iobase, BANK2); | |
2153 | if ((inb(iobase+RXFLV) & 0x3f) != 0) { | |
2154 | /* We are receiving something */ | |
2155 | status = TRUE; | |
2156 | } | |
2157 | outb(bank, iobase+BSR); | |
2158 | } else | |
2159 | status = (self->rx_buff.state != OUTSIDE_FRAME); | |
2160 | ||
2161 | spin_unlock_irqrestore(&self->lock, flags); | |
2162 | ||
2163 | return status; | |
2164 | } | |
2165 | ||
2166 | /* | |
2167 | * Function nsc_ircc_net_open (dev) | |
2168 | * | |
2169 | * Start the device | |
2170 | * | |
2171 | */ | |
2172 | static int nsc_ircc_net_open(struct net_device *dev) | |
2173 | { | |
2174 | struct nsc_ircc_cb *self; | |
2175 | int iobase; | |
2176 | char hwname[32]; | |
2177 | __u8 bank; | |
2178 | ||
a97a6f10 | 2179 | IRDA_DEBUG(4, "%s()\n", __func__); |
1da177e4 LT |
2180 | |
2181 | IRDA_ASSERT(dev != NULL, return -1;); | |
4cf1653a | 2182 | self = netdev_priv(dev); |
1da177e4 LT |
2183 | |
2184 | IRDA_ASSERT(self != NULL, return 0;); | |
2185 | ||
2186 | iobase = self->io.fir_base; | |
2187 | ||
2188 | if (request_irq(self->io.irq, nsc_ircc_interrupt, 0, dev->name, dev)) { | |
2189 | IRDA_WARNING("%s, unable to allocate irq=%d\n", | |
2190 | driver_name, self->io.irq); | |
2191 | return -EAGAIN; | |
2192 | } | |
2193 | /* | |
2194 | * Always allocate the DMA channel after the IRQ, and clean up on | |
2195 | * failure. | |
2196 | */ | |
2197 | if (request_dma(self->io.dma, dev->name)) { | |
2198 | IRDA_WARNING("%s, unable to allocate dma=%d\n", | |
2199 | driver_name, self->io.dma); | |
2200 | free_irq(self->io.irq, dev); | |
2201 | return -EAGAIN; | |
2202 | } | |
2203 | ||
2204 | /* Save current bank */ | |
2205 | bank = inb(iobase+BSR); | |
2206 | ||
2207 | /* turn on interrupts */ | |
2208 | switch_bank(iobase, BANK0); | |
2209 | outb(IER_LS_IE | IER_RXHDL_IE, iobase+IER); | |
2210 | ||
2211 | /* Restore bank register */ | |
2212 | outb(bank, iobase+BSR); | |
2213 | ||
2214 | /* Ready to play! */ | |
2215 | netif_start_queue(dev); | |
2216 | ||
2217 | /* Give self a hardware name */ | |
2218 | sprintf(hwname, "NSC-FIR @ 0x%03x", self->io.fir_base); | |
2219 | ||
2220 | /* | |
2221 | * Open new IrLAP layer instance, now that everything should be | |
2222 | * initialized properly | |
2223 | */ | |
2224 | self->irlap = irlap_open(dev, &self->qos, hwname); | |
2225 | ||
2226 | return 0; | |
2227 | } | |
2228 | ||
2229 | /* | |
2230 | * Function nsc_ircc_net_close (dev) | |
2231 | * | |
2232 | * Stop the device | |
2233 | * | |
2234 | */ | |
2235 | static int nsc_ircc_net_close(struct net_device *dev) | |
2236 | { | |
2237 | struct nsc_ircc_cb *self; | |
2238 | int iobase; | |
2239 | __u8 bank; | |
2240 | ||
a97a6f10 | 2241 | IRDA_DEBUG(4, "%s()\n", __func__); |
1da177e4 LT |
2242 | |
2243 | IRDA_ASSERT(dev != NULL, return -1;); | |
2244 | ||
4cf1653a | 2245 | self = netdev_priv(dev); |
1da177e4 LT |
2246 | IRDA_ASSERT(self != NULL, return 0;); |
2247 | ||
2248 | /* Stop device */ | |
2249 | netif_stop_queue(dev); | |
2250 | ||
2251 | /* Stop and remove instance of IrLAP */ | |
2252 | if (self->irlap) | |
2253 | irlap_close(self->irlap); | |
2254 | self->irlap = NULL; | |
2255 | ||
2256 | iobase = self->io.fir_base; | |
2257 | ||
2258 | disable_dma(self->io.dma); | |
2259 | ||
2260 | /* Save current bank */ | |
2261 | bank = inb(iobase+BSR); | |
2262 | ||
2263 | /* Disable interrupts */ | |
2264 | switch_bank(iobase, BANK0); | |
2265 | outb(0, iobase+IER); | |
2266 | ||
2267 | free_irq(self->io.irq, dev); | |
2268 | free_dma(self->io.dma); | |
2269 | ||
2270 | /* Restore bank register */ | |
2271 | outb(bank, iobase+BSR); | |
2272 | ||
2273 | return 0; | |
2274 | } | |
2275 | ||
2276 | /* | |
2277 | * Function nsc_ircc_net_ioctl (dev, rq, cmd) | |
2278 | * | |
2279 | * Process IOCTL commands for this device | |
2280 | * | |
2281 | */ | |
2282 | static int nsc_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) | |
2283 | { | |
2284 | struct if_irda_req *irq = (struct if_irda_req *) rq; | |
2285 | struct nsc_ircc_cb *self; | |
2286 | unsigned long flags; | |
2287 | int ret = 0; | |
2288 | ||
2289 | IRDA_ASSERT(dev != NULL, return -1;); | |
2290 | ||
4cf1653a | 2291 | self = netdev_priv(dev); |
1da177e4 LT |
2292 | |
2293 | IRDA_ASSERT(self != NULL, return -1;); | |
2294 | ||
a97a6f10 | 2295 | IRDA_DEBUG(2, "%s(), %s, (cmd=0x%X)\n", __func__, dev->name, cmd); |
1da177e4 LT |
2296 | |
2297 | switch (cmd) { | |
2298 | case SIOCSBANDWIDTH: /* Set bandwidth */ | |
2299 | if (!capable(CAP_NET_ADMIN)) { | |
2300 | ret = -EPERM; | |
2301 | break; | |
2302 | } | |
2303 | spin_lock_irqsave(&self->lock, flags); | |
2304 | nsc_ircc_change_speed(self, irq->ifr_baudrate); | |
2305 | spin_unlock_irqrestore(&self->lock, flags); | |
2306 | break; | |
2307 | case SIOCSMEDIABUSY: /* Set media busy */ | |
2308 | if (!capable(CAP_NET_ADMIN)) { | |
2309 | ret = -EPERM; | |
2310 | break; | |
2311 | } | |
2312 | irda_device_set_media_busy(self->netdev, TRUE); | |
2313 | break; | |
2314 | case SIOCGRECEIVING: /* Check if we are receiving right now */ | |
2315 | /* This is already protected */ | |
2316 | irq->ifr_receiving = nsc_ircc_is_receiving(self); | |
2317 | break; | |
2318 | default: | |
2319 | ret = -EOPNOTSUPP; | |
2320 | } | |
2321 | return ret; | |
2322 | } | |
2323 | ||
3b99b93b | 2324 | static int nsc_ircc_suspend(struct platform_device *dev, pm_message_t state) |
1da177e4 | 2325 | { |
3b99b93b DT |
2326 | struct nsc_ircc_cb *self = platform_get_drvdata(dev); |
2327 | int bank; | |
2328 | unsigned long flags; | |
2329 | int iobase = self->io.fir_base; | |
1da177e4 LT |
2330 | |
2331 | if (self->io.suspended) | |
3b99b93b | 2332 | return 0; |
1da177e4 | 2333 | |
3b99b93b | 2334 | IRDA_DEBUG(1, "%s, Suspending\n", driver_name); |
1da177e4 | 2335 | |
3b99b93b DT |
2336 | rtnl_lock(); |
2337 | if (netif_running(self->netdev)) { | |
2338 | netif_device_detach(self->netdev); | |
2339 | spin_lock_irqsave(&self->lock, flags); | |
2340 | /* Save current bank */ | |
2341 | bank = inb(iobase+BSR); | |
2342 | ||
2343 | /* Disable interrupts */ | |
2344 | switch_bank(iobase, BANK0); | |
2345 | outb(0, iobase+IER); | |
2346 | ||
2347 | /* Restore bank register */ | |
2348 | outb(bank, iobase+BSR); | |
2349 | ||
2350 | spin_unlock_irqrestore(&self->lock, flags); | |
2351 | free_irq(self->io.irq, self->netdev); | |
2352 | disable_dma(self->io.dma); | |
2353 | } | |
1da177e4 | 2354 | self->io.suspended = 1; |
3b99b93b DT |
2355 | rtnl_unlock(); |
2356 | ||
2357 | return 0; | |
1da177e4 LT |
2358 | } |
2359 | ||
3b99b93b | 2360 | static int nsc_ircc_resume(struct platform_device *dev) |
1da177e4 | 2361 | { |
3b99b93b DT |
2362 | struct nsc_ircc_cb *self = platform_get_drvdata(dev); |
2363 | unsigned long flags; | |
2364 | ||
1da177e4 | 2365 | if (!self->io.suspended) |
3b99b93b | 2366 | return 0; |
1da177e4 | 2367 | |
3b99b93b DT |
2368 | IRDA_DEBUG(1, "%s, Waking up\n", driver_name); |
2369 | ||
2370 | rtnl_lock(); | |
1da177e4 | 2371 | nsc_ircc_setup(&self->io); |
3b99b93b | 2372 | nsc_ircc_init_dongle_interface(self->io.fir_base, self->io.dongle_id); |
1da177e4 | 2373 | |
3b99b93b DT |
2374 | if (netif_running(self->netdev)) { |
2375 | if (request_irq(self->io.irq, nsc_ircc_interrupt, 0, | |
2376 | self->netdev->name, self->netdev)) { | |
2377 | IRDA_WARNING("%s, unable to allocate irq=%d\n", | |
2378 | driver_name, self->io.irq); | |
2379 | ||
2380 | /* | |
2381 | * Don't fail resume process, just kill this | |
2382 | * network interface | |
2383 | */ | |
2384 | unregister_netdevice(self->netdev); | |
2385 | } else { | |
2386 | spin_lock_irqsave(&self->lock, flags); | |
2387 | nsc_ircc_change_speed(self, self->io.speed); | |
2388 | spin_unlock_irqrestore(&self->lock, flags); | |
2389 | netif_device_attach(self->netdev); | |
2390 | } | |
2391 | ||
2392 | } else { | |
2393 | spin_lock_irqsave(&self->lock, flags); | |
2394 | nsc_ircc_change_speed(self, 9600); | |
2395 | spin_unlock_irqrestore(&self->lock, flags); | |
2396 | } | |
1da177e4 | 2397 | self->io.suspended = 0; |
3b99b93b | 2398 | rtnl_unlock(); |
1da177e4 | 2399 | |
3b99b93b | 2400 | return 0; |
1da177e4 LT |
2401 | } |
2402 | ||
2403 | MODULE_AUTHOR("Dag Brattli <dagb@cs.uit.no>"); | |
2404 | MODULE_DESCRIPTION("NSC IrDA Device Driver"); | |
2405 | MODULE_LICENSE("GPL"); | |
2406 | ||
2407 | ||
2408 | module_param(qos_mtt_bits, int, 0); | |
2409 | MODULE_PARM_DESC(qos_mtt_bits, "Minimum Turn Time"); | |
2410 | module_param_array(io, int, NULL, 0); | |
2411 | MODULE_PARM_DESC(io, "Base I/O addresses"); | |
2412 | module_param_array(irq, int, NULL, 0); | |
2413 | MODULE_PARM_DESC(irq, "IRQ lines"); | |
2414 | module_param_array(dma, int, NULL, 0); | |
2415 | MODULE_PARM_DESC(dma, "DMA channels"); | |
2416 | module_param(dongle_id, int, 0); | |
2417 | MODULE_PARM_DESC(dongle_id, "Type-id of used dongle"); | |
2418 | ||
2419 | module_init(nsc_ircc_init); | |
2420 | module_exit(nsc_ircc_cleanup); | |
2421 |