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1da177e4 LT |
1 | /********************************************************************* |
2 | * | |
3 | * Filename: ali-ircc.h | |
4 | * Version: 0.5 | |
5 | * Description: Driver for the ALI M1535D and M1543C FIR Controller | |
6 | * Status: Experimental. | |
7 | * Author: Benjamin Kong <benjamin_kong@ali.com.tw> | |
8 | * Created at: 2000/10/16 03:46PM | |
9 | * Modified at: 2001/1/3 02:55PM | |
10 | * Modified by: Benjamin Kong <benjamin_kong@ali.com.tw> | |
11 | * Modified at: 2003/11/6 and support for ALi south-bridge chipsets M1563 | |
12 | * Modified by: Clear Zhang <clear_zhang@ali.com.tw> | |
13 | * | |
14 | * Copyright (c) 2000 Benjamin Kong <benjamin_kong@ali.com.tw> | |
15 | * All Rights Reserved | |
16 | * | |
17 | * This program is free software; you can redistribute it and/or | |
18 | * modify it under the terms of the GNU General Public License as | |
19 | * published by the Free Software Foundation; either version 2 of | |
20 | * the License, or (at your option) any later version. | |
21 | * | |
22 | ********************************************************************/ | |
23 | ||
24 | #include <linux/module.h> | |
5a0e3ad6 | 25 | #include <linux/gfp.h> |
1da177e4 LT |
26 | |
27 | #include <linux/kernel.h> | |
28 | #include <linux/types.h> | |
29 | #include <linux/skbuff.h> | |
30 | #include <linux/netdevice.h> | |
31 | #include <linux/ioport.h> | |
32 | #include <linux/delay.h> | |
1da177e4 | 33 | #include <linux/init.h> |
a6b7a407 | 34 | #include <linux/interrupt.h> |
1da177e4 LT |
35 | #include <linux/rtnetlink.h> |
36 | #include <linux/serial_reg.h> | |
37 | #include <linux/dma-mapping.h> | |
898b1d16 | 38 | #include <linux/platform_device.h> |
1da177e4 LT |
39 | |
40 | #include <asm/io.h> | |
41 | #include <asm/dma.h> | |
42 | #include <asm/byteorder.h> | |
43 | ||
1da177e4 LT |
44 | #include <net/irda/wrapper.h> |
45 | #include <net/irda/irda.h> | |
46 | #include <net/irda/irda_device.h> | |
47 | ||
48 | #include "ali-ircc.h" | |
49 | ||
50 | #define CHIP_IO_EXTENT 8 | |
51 | #define BROKEN_DONGLE_ID | |
52 | ||
898b1d16 SO |
53 | #define ALI_IRCC_DRIVER_NAME "ali-ircc" |
54 | ||
55 | /* Power Management */ | |
56 | static int ali_ircc_suspend(struct platform_device *dev, pm_message_t state); | |
57 | static int ali_ircc_resume(struct platform_device *dev); | |
58 | ||
59 | static struct platform_driver ali_ircc_driver = { | |
60 | .suspend = ali_ircc_suspend, | |
61 | .resume = ali_ircc_resume, | |
62 | .driver = { | |
63 | .name = ALI_IRCC_DRIVER_NAME, | |
72abb461 | 64 | .owner = THIS_MODULE, |
898b1d16 SO |
65 | }, |
66 | }; | |
1da177e4 LT |
67 | |
68 | /* Module parameters */ | |
69 | static int qos_mtt_bits = 0x07; /* 1 ms or more */ | |
70 | ||
71 | /* Use BIOS settions by default, but user may supply module parameters */ | |
72 | static unsigned int io[] = { ~0, ~0, ~0, ~0 }; | |
73 | static unsigned int irq[] = { 0, 0, 0, 0 }; | |
74 | static unsigned int dma[] = { 0, 0, 0, 0 }; | |
75 | ||
76 | static int ali_ircc_probe_53(ali_chip_t *chip, chipio_t *info); | |
77 | static int ali_ircc_init_43(ali_chip_t *chip, chipio_t *info); | |
78 | static int ali_ircc_init_53(ali_chip_t *chip, chipio_t *info); | |
79 | ||
25985edc | 80 | /* These are the currently known ALi south-bridge chipsets, the only one difference |
1da177e4 LT |
81 | * is that M1543C doesn't support HP HDSL-3600 |
82 | */ | |
83 | static ali_chip_t chips[] = | |
84 | { | |
85 | { "M1543", { 0x3f0, 0x370 }, 0x51, 0x23, 0x20, 0x43, ali_ircc_probe_53, ali_ircc_init_43 }, | |
86 | { "M1535", { 0x3f0, 0x370 }, 0x51, 0x23, 0x20, 0x53, ali_ircc_probe_53, ali_ircc_init_53 }, | |
87 | { "M1563", { 0x3f0, 0x370 }, 0x51, 0x23, 0x20, 0x63, ali_ircc_probe_53, ali_ircc_init_53 }, | |
88 | { NULL } | |
89 | }; | |
90 | ||
91 | /* Max 4 instances for now */ | |
92 | static struct ali_ircc_cb *dev_self[] = { NULL, NULL, NULL, NULL }; | |
93 | ||
94 | /* Dongle Types */ | |
95 | static char *dongle_types[] = { | |
96 | "TFDS6000", | |
97 | "HP HSDL-3600", | |
98 | "HP HSDL-1100", | |
99 | "No dongle connected", | |
100 | }; | |
101 | ||
102 | /* Some prototypes */ | |
103 | static int ali_ircc_open(int i, chipio_t *info); | |
104 | ||
105 | static int ali_ircc_close(struct ali_ircc_cb *self); | |
106 | ||
107 | static int ali_ircc_setup(chipio_t *info); | |
108 | static int ali_ircc_is_receiving(struct ali_ircc_cb *self); | |
109 | static int ali_ircc_net_open(struct net_device *dev); | |
110 | static int ali_ircc_net_close(struct net_device *dev); | |
111 | static int ali_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd); | |
1da177e4 | 112 | static void ali_ircc_change_speed(struct ali_ircc_cb *self, __u32 baud); |
1da177e4 LT |
113 | |
114 | /* SIR function */ | |
6518bbb8 SH |
115 | static netdev_tx_t ali_ircc_sir_hard_xmit(struct sk_buff *skb, |
116 | struct net_device *dev); | |
1da177e4 LT |
117 | static irqreturn_t ali_ircc_sir_interrupt(struct ali_ircc_cb *self); |
118 | static void ali_ircc_sir_receive(struct ali_ircc_cb *self); | |
119 | static void ali_ircc_sir_write_wakeup(struct ali_ircc_cb *self); | |
120 | static int ali_ircc_sir_write(int iobase, int fifo_size, __u8 *buf, int len); | |
121 | static void ali_ircc_sir_change_speed(struct ali_ircc_cb *priv, __u32 speed); | |
122 | ||
123 | /* FIR function */ | |
6518bbb8 SH |
124 | static netdev_tx_t ali_ircc_fir_hard_xmit(struct sk_buff *skb, |
125 | struct net_device *dev); | |
1da177e4 LT |
126 | static void ali_ircc_fir_change_speed(struct ali_ircc_cb *priv, __u32 speed); |
127 | static irqreturn_t ali_ircc_fir_interrupt(struct ali_ircc_cb *self); | |
128 | static int ali_ircc_dma_receive(struct ali_ircc_cb *self); | |
129 | static int ali_ircc_dma_receive_complete(struct ali_ircc_cb *self); | |
130 | static int ali_ircc_dma_xmit_complete(struct ali_ircc_cb *self); | |
131 | static void ali_ircc_dma_xmit(struct ali_ircc_cb *self); | |
132 | ||
133 | /* My Function */ | |
134 | static int ali_ircc_read_dongle_id (int i, chipio_t *info); | |
135 | static void ali_ircc_change_dongle_speed(struct ali_ircc_cb *priv, int speed); | |
136 | ||
137 | /* ALi chip function */ | |
138 | static void SIR2FIR(int iobase); | |
139 | static void FIR2SIR(int iobase); | |
140 | static void SetCOMInterrupts(struct ali_ircc_cb *self , unsigned char enable); | |
141 | ||
142 | /* | |
143 | * Function ali_ircc_init () | |
144 | * | |
145 | * Initialize chip. Find out whay kinds of chips we are dealing with | |
0b1974de | 146 | * and their configuration registers address |
1da177e4 LT |
147 | */ |
148 | static int __init ali_ircc_init(void) | |
149 | { | |
150 | ali_chip_t *chip; | |
151 | chipio_t info; | |
9c6c6795 | 152 | int ret; |
1da177e4 LT |
153 | int cfg, cfg_base; |
154 | int reg, revision; | |
155 | int i = 0; | |
156 | ||
a97a6f10 | 157 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__); |
898b1d16 SO |
158 | |
159 | ret = platform_driver_register(&ali_ircc_driver); | |
160 | if (ret) { | |
161 | IRDA_ERROR("%s, Can't register driver!\n", | |
162 | ALI_IRCC_DRIVER_NAME); | |
163 | return ret; | |
164 | } | |
165 | ||
9c6c6795 | 166 | ret = -ENODEV; |
1da177e4 LT |
167 | |
168 | /* Probe for all the ALi chipsets we know about */ | |
169 | for (chip= chips; chip->name; chip++, i++) | |
170 | { | |
a97a6f10 | 171 | IRDA_DEBUG(2, "%s(), Probing for %s ...\n", __func__, chip->name); |
1da177e4 LT |
172 | |
173 | /* Try all config registers for this chip */ | |
174 | for (cfg=0; cfg<2; cfg++) | |
175 | { | |
176 | cfg_base = chip->cfg[cfg]; | |
177 | if (!cfg_base) | |
178 | continue; | |
179 | ||
180 | memset(&info, 0, sizeof(chipio_t)); | |
181 | info.cfg_base = cfg_base; | |
182 | info.fir_base = io[i]; | |
183 | info.dma = dma[i]; | |
184 | info.irq = irq[i]; | |
185 | ||
186 | ||
187 | /* Enter Configuration */ | |
188 | outb(chip->entr1, cfg_base); | |
189 | outb(chip->entr2, cfg_base); | |
190 | ||
191 | /* Select Logical Device 5 Registers (UART2) */ | |
192 | outb(0x07, cfg_base); | |
193 | outb(0x05, cfg_base+1); | |
194 | ||
195 | /* Read Chip Identification Register */ | |
196 | outb(chip->cid_index, cfg_base); | |
197 | reg = inb(cfg_base+1); | |
198 | ||
199 | if (reg == chip->cid_value) | |
200 | { | |
a97a6f10 | 201 | IRDA_DEBUG(2, "%s(), Chip found at 0x%03x\n", __func__, cfg_base); |
1da177e4 LT |
202 | |
203 | outb(0x1F, cfg_base); | |
204 | revision = inb(cfg_base+1); | |
a97a6f10 | 205 | IRDA_DEBUG(2, "%s(), Found %s chip, revision=%d\n", __func__, |
1da177e4 LT |
206 | chip->name, revision); |
207 | ||
208 | /* | |
209 | * If the user supplies the base address, then | |
210 | * we init the chip, if not we probe the values | |
211 | * set by the BIOS | |
212 | */ | |
213 | if (io[i] < 2000) | |
214 | { | |
215 | chip->init(chip, &info); | |
216 | } | |
217 | else | |
218 | { | |
219 | chip->probe(chip, &info); | |
220 | } | |
221 | ||
222 | if (ali_ircc_open(i, &info) == 0) | |
223 | ret = 0; | |
224 | i++; | |
225 | } | |
226 | else | |
227 | { | |
a97a6f10 | 228 | IRDA_DEBUG(2, "%s(), No %s chip at 0x%03x\n", __func__, chip->name, cfg_base); |
1da177e4 LT |
229 | } |
230 | /* Exit configuration */ | |
231 | outb(0xbb, cfg_base); | |
232 | } | |
233 | } | |
234 | ||
a97a6f10 | 235 | IRDA_DEBUG(2, "%s(), ----------------- End -----------------\n", __func__); |
898b1d16 SO |
236 | |
237 | if (ret) | |
238 | platform_driver_unregister(&ali_ircc_driver); | |
239 | ||
1da177e4 LT |
240 | return ret; |
241 | } | |
242 | ||
243 | /* | |
244 | * Function ali_ircc_cleanup () | |
245 | * | |
246 | * Close all configured chips | |
247 | * | |
248 | */ | |
249 | static void __exit ali_ircc_cleanup(void) | |
250 | { | |
251 | int i; | |
252 | ||
a97a6f10 | 253 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__); |
1da177e4 | 254 | |
9c3bd683 | 255 | for (i=0; i < ARRAY_SIZE(dev_self); i++) { |
1da177e4 LT |
256 | if (dev_self[i]) |
257 | ali_ircc_close(dev_self[i]); | |
258 | } | |
259 | ||
898b1d16 SO |
260 | platform_driver_unregister(&ali_ircc_driver); |
261 | ||
a97a6f10 | 262 | IRDA_DEBUG(2, "%s(), ----------------- End -----------------\n", __func__); |
1da177e4 LT |
263 | } |
264 | ||
2d44a222 SH |
265 | static const struct net_device_ops ali_ircc_sir_ops = { |
266 | .ndo_open = ali_ircc_net_open, | |
267 | .ndo_stop = ali_ircc_net_close, | |
268 | .ndo_start_xmit = ali_ircc_sir_hard_xmit, | |
269 | .ndo_do_ioctl = ali_ircc_net_ioctl, | |
270 | }; | |
271 | ||
272 | static const struct net_device_ops ali_ircc_fir_ops = { | |
273 | .ndo_open = ali_ircc_net_open, | |
274 | .ndo_stop = ali_ircc_net_close, | |
275 | .ndo_start_xmit = ali_ircc_fir_hard_xmit, | |
276 | .ndo_do_ioctl = ali_ircc_net_ioctl, | |
277 | }; | |
278 | ||
1da177e4 LT |
279 | /* |
280 | * Function ali_ircc_open (int i, chipio_t *inf) | |
281 | * | |
282 | * Open driver instance | |
283 | * | |
284 | */ | |
285 | static int ali_ircc_open(int i, chipio_t *info) | |
286 | { | |
287 | struct net_device *dev; | |
288 | struct ali_ircc_cb *self; | |
1da177e4 LT |
289 | int dongle_id; |
290 | int err; | |
291 | ||
a97a6f10 | 292 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__); |
9c3bd683 BH |
293 | |
294 | if (i >= ARRAY_SIZE(dev_self)) { | |
295 | IRDA_ERROR("%s(), maximum number of supported chips reached!\n", | |
a97a6f10 | 296 | __func__); |
9c3bd683 BH |
297 | return -ENOMEM; |
298 | } | |
1da177e4 LT |
299 | |
300 | /* Set FIR FIFO and DMA Threshold */ | |
301 | if ((ali_ircc_setup(info)) == -1) | |
302 | return -1; | |
303 | ||
304 | dev = alloc_irdadev(sizeof(*self)); | |
305 | if (dev == NULL) { | |
306 | IRDA_ERROR("%s(), can't allocate memory for control block!\n", | |
a97a6f10 | 307 | __func__); |
1da177e4 LT |
308 | return -ENOMEM; |
309 | } | |
310 | ||
4cf1653a | 311 | self = netdev_priv(dev); |
1da177e4 LT |
312 | self->netdev = dev; |
313 | spin_lock_init(&self->lock); | |
314 | ||
315 | /* Need to store self somewhere */ | |
316 | dev_self[i] = self; | |
317 | self->index = i; | |
318 | ||
319 | /* Initialize IO */ | |
320 | self->io.cfg_base = info->cfg_base; /* In ali_ircc_probe_53 assign */ | |
321 | self->io.fir_base = info->fir_base; /* info->sir_base = info->fir_base */ | |
322 | self->io.sir_base = info->sir_base; /* ALi SIR and FIR use the same address */ | |
323 | self->io.irq = info->irq; | |
324 | self->io.fir_ext = CHIP_IO_EXTENT; | |
325 | self->io.dma = info->dma; | |
326 | self->io.fifo_size = 16; /* SIR: 16, FIR: 32 Benjamin 2000/11/1 */ | |
327 | ||
328 | /* Reserve the ioports that we need */ | |
898b1d16 SO |
329 | if (!request_region(self->io.fir_base, self->io.fir_ext, |
330 | ALI_IRCC_DRIVER_NAME)) { | |
a97a6f10 | 331 | IRDA_WARNING("%s(), can't get iobase of 0x%03x\n", __func__, |
1da177e4 LT |
332 | self->io.fir_base); |
333 | err = -ENODEV; | |
334 | goto err_out1; | |
335 | } | |
336 | ||
337 | /* Initialize QoS for this device */ | |
338 | irda_init_max_qos_capabilies(&self->qos); | |
339 | ||
340 | /* The only value we must override it the baudrate */ | |
341 | self->qos.baud_rate.bits = IR_9600|IR_19200|IR_38400|IR_57600| | |
342 | IR_115200|IR_576000|IR_1152000|(IR_4000000 << 8); // benjamin 2000/11/8 05:27PM | |
343 | ||
344 | self->qos.min_turn_time.bits = qos_mtt_bits; | |
345 | ||
346 | irda_qos_bits_to_value(&self->qos); | |
347 | ||
348 | /* Max DMA buffer size needed = (data_size + 6) * (window_size) + 6; */ | |
349 | self->rx_buff.truesize = 14384; | |
350 | self->tx_buff.truesize = 14384; | |
351 | ||
352 | /* Allocate memory if needed */ | |
353 | self->rx_buff.head = | |
354 | dma_alloc_coherent(NULL, self->rx_buff.truesize, | |
355 | &self->rx_buff_dma, GFP_KERNEL); | |
356 | if (self->rx_buff.head == NULL) { | |
357 | err = -ENOMEM; | |
358 | goto err_out2; | |
359 | } | |
360 | memset(self->rx_buff.head, 0, self->rx_buff.truesize); | |
361 | ||
362 | self->tx_buff.head = | |
363 | dma_alloc_coherent(NULL, self->tx_buff.truesize, | |
364 | &self->tx_buff_dma, GFP_KERNEL); | |
365 | if (self->tx_buff.head == NULL) { | |
366 | err = -ENOMEM; | |
367 | goto err_out3; | |
368 | } | |
369 | memset(self->tx_buff.head, 0, self->tx_buff.truesize); | |
370 | ||
371 | self->rx_buff.in_frame = FALSE; | |
372 | self->rx_buff.state = OUTSIDE_FRAME; | |
373 | self->tx_buff.data = self->tx_buff.head; | |
374 | self->rx_buff.data = self->rx_buff.head; | |
375 | ||
376 | /* Reset Tx queue info */ | |
377 | self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0; | |
378 | self->tx_fifo.tail = self->tx_buff.head; | |
379 | ||
1da177e4 | 380 | /* Override the network functions we need to use */ |
2d44a222 | 381 | dev->netdev_ops = &ali_ircc_sir_ops; |
1da177e4 LT |
382 | |
383 | err = register_netdev(dev); | |
384 | if (err) { | |
a97a6f10 | 385 | IRDA_ERROR("%s(), register_netdev() failed!\n", __func__); |
1da177e4 LT |
386 | goto err_out4; |
387 | } | |
388 | IRDA_MESSAGE("IrDA: Registered device %s\n", dev->name); | |
389 | ||
390 | /* Check dongle id */ | |
391 | dongle_id = ali_ircc_read_dongle_id(i, info); | |
a97a6f10 | 392 | IRDA_MESSAGE("%s(), %s, Found dongle: %s\n", __func__, |
898b1d16 | 393 | ALI_IRCC_DRIVER_NAME, dongle_types[dongle_id]); |
1da177e4 LT |
394 | |
395 | self->io.dongle_id = dongle_id; | |
1da177e4 | 396 | |
a97a6f10 | 397 | IRDA_DEBUG(2, "%s(), ----------------- End -----------------\n", __func__); |
1da177e4 LT |
398 | |
399 | return 0; | |
400 | ||
401 | err_out4: | |
402 | dma_free_coherent(NULL, self->tx_buff.truesize, | |
403 | self->tx_buff.head, self->tx_buff_dma); | |
404 | err_out3: | |
405 | dma_free_coherent(NULL, self->rx_buff.truesize, | |
406 | self->rx_buff.head, self->rx_buff_dma); | |
407 | err_out2: | |
408 | release_region(self->io.fir_base, self->io.fir_ext); | |
409 | err_out1: | |
410 | dev_self[i] = NULL; | |
411 | free_netdev(dev); | |
412 | return err; | |
413 | } | |
414 | ||
415 | ||
416 | /* | |
417 | * Function ali_ircc_close (self) | |
418 | * | |
419 | * Close driver instance | |
420 | * | |
421 | */ | |
422 | static int __exit ali_ircc_close(struct ali_ircc_cb *self) | |
423 | { | |
424 | int iobase; | |
425 | ||
a97a6f10 | 426 | IRDA_DEBUG(4, "%s(), ---------------- Start ----------------\n", __func__); |
1da177e4 LT |
427 | |
428 | IRDA_ASSERT(self != NULL, return -1;); | |
429 | ||
430 | iobase = self->io.fir_base; | |
431 | ||
432 | /* Remove netdevice */ | |
433 | unregister_netdev(self->netdev); | |
434 | ||
435 | /* Release the PORT that this driver is using */ | |
a97a6f10 | 436 | IRDA_DEBUG(4, "%s(), Releasing Region %03x\n", __func__, self->io.fir_base); |
1da177e4 LT |
437 | release_region(self->io.fir_base, self->io.fir_ext); |
438 | ||
439 | if (self->tx_buff.head) | |
440 | dma_free_coherent(NULL, self->tx_buff.truesize, | |
441 | self->tx_buff.head, self->tx_buff_dma); | |
442 | ||
443 | if (self->rx_buff.head) | |
444 | dma_free_coherent(NULL, self->rx_buff.truesize, | |
445 | self->rx_buff.head, self->rx_buff_dma); | |
446 | ||
447 | dev_self[self->index] = NULL; | |
448 | free_netdev(self->netdev); | |
449 | ||
a97a6f10 | 450 | IRDA_DEBUG(2, "%s(), ----------------- End -----------------\n", __func__); |
1da177e4 LT |
451 | |
452 | return 0; | |
453 | } | |
454 | ||
455 | /* | |
456 | * Function ali_ircc_init_43 (chip, info) | |
457 | * | |
458 | * Initialize the ALi M1543 chip. | |
459 | */ | |
460 | static int ali_ircc_init_43(ali_chip_t *chip, chipio_t *info) | |
461 | { | |
462 | /* All controller information like I/O address, DMA channel, IRQ | |
463 | * are set by BIOS | |
464 | */ | |
465 | ||
466 | return 0; | |
467 | } | |
468 | ||
469 | /* | |
470 | * Function ali_ircc_init_53 (chip, info) | |
471 | * | |
472 | * Initialize the ALi M1535 chip. | |
473 | */ | |
474 | static int ali_ircc_init_53(ali_chip_t *chip, chipio_t *info) | |
475 | { | |
476 | /* All controller information like I/O address, DMA channel, IRQ | |
477 | * are set by BIOS | |
478 | */ | |
479 | ||
480 | return 0; | |
481 | } | |
482 | ||
483 | /* | |
484 | * Function ali_ircc_probe_53 (chip, info) | |
485 | * | |
486 | * Probes for the ALi M1535D or M1535 | |
487 | */ | |
488 | static int ali_ircc_probe_53(ali_chip_t *chip, chipio_t *info) | |
489 | { | |
490 | int cfg_base = info->cfg_base; | |
491 | int hi, low, reg; | |
492 | ||
a97a6f10 | 493 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__); |
1da177e4 LT |
494 | |
495 | /* Enter Configuration */ | |
496 | outb(chip->entr1, cfg_base); | |
497 | outb(chip->entr2, cfg_base); | |
498 | ||
499 | /* Select Logical Device 5 Registers (UART2) */ | |
500 | outb(0x07, cfg_base); | |
501 | outb(0x05, cfg_base+1); | |
502 | ||
503 | /* Read address control register */ | |
504 | outb(0x60, cfg_base); | |
505 | hi = inb(cfg_base+1); | |
506 | outb(0x61, cfg_base); | |
507 | low = inb(cfg_base+1); | |
508 | info->fir_base = (hi<<8) + low; | |
509 | ||
510 | info->sir_base = info->fir_base; | |
511 | ||
a97a6f10 | 512 | IRDA_DEBUG(2, "%s(), probing fir_base=0x%03x\n", __func__, info->fir_base); |
1da177e4 LT |
513 | |
514 | /* Read IRQ control register */ | |
515 | outb(0x70, cfg_base); | |
516 | reg = inb(cfg_base+1); | |
517 | info->irq = reg & 0x0f; | |
a97a6f10 | 518 | IRDA_DEBUG(2, "%s(), probing irq=%d\n", __func__, info->irq); |
1da177e4 LT |
519 | |
520 | /* Read DMA channel */ | |
521 | outb(0x74, cfg_base); | |
522 | reg = inb(cfg_base+1); | |
523 | info->dma = reg & 0x07; | |
524 | ||
525 | if(info->dma == 0x04) | |
a97a6f10 | 526 | IRDA_WARNING("%s(), No DMA channel assigned !\n", __func__); |
1da177e4 | 527 | else |
a97a6f10 | 528 | IRDA_DEBUG(2, "%s(), probing dma=%d\n", __func__, info->dma); |
1da177e4 LT |
529 | |
530 | /* Read Enabled Status */ | |
531 | outb(0x30, cfg_base); | |
532 | reg = inb(cfg_base+1); | |
533 | info->enabled = (reg & 0x80) && (reg & 0x01); | |
a97a6f10 | 534 | IRDA_DEBUG(2, "%s(), probing enabled=%d\n", __func__, info->enabled); |
1da177e4 LT |
535 | |
536 | /* Read Power Status */ | |
537 | outb(0x22, cfg_base); | |
538 | reg = inb(cfg_base+1); | |
539 | info->suspended = (reg & 0x20); | |
a97a6f10 | 540 | IRDA_DEBUG(2, "%s(), probing suspended=%d\n", __func__, info->suspended); |
1da177e4 LT |
541 | |
542 | /* Exit configuration */ | |
543 | outb(0xbb, cfg_base); | |
544 | ||
a97a6f10 | 545 | IRDA_DEBUG(2, "%s(), ----------------- End -----------------\n", __func__); |
1da177e4 LT |
546 | |
547 | return 0; | |
548 | } | |
549 | ||
550 | /* | |
551 | * Function ali_ircc_setup (info) | |
552 | * | |
553 | * Set FIR FIFO and DMA Threshold | |
554 | * Returns non-negative on success. | |
555 | * | |
556 | */ | |
557 | static int ali_ircc_setup(chipio_t *info) | |
558 | { | |
559 | unsigned char tmp; | |
560 | int version; | |
561 | int iobase = info->fir_base; | |
562 | ||
a97a6f10 | 563 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__); |
1da177e4 LT |
564 | |
565 | /* Locking comments : | |
566 | * Most operations here need to be protected. We are called before | |
567 | * the device instance is created in ali_ircc_open(), therefore | |
568 | * nobody can bother us - Jean II */ | |
569 | ||
570 | /* Switch to FIR space */ | |
571 | SIR2FIR(iobase); | |
572 | ||
573 | /* Master Reset */ | |
574 | outb(0x40, iobase+FIR_MCR); // benjamin 2000/11/30 11:45AM | |
575 | ||
576 | /* Read FIR ID Version Register */ | |
577 | switch_bank(iobase, BANK3); | |
578 | version = inb(iobase+FIR_ID_VR); | |
579 | ||
580 | /* Should be 0x00 in the M1535/M1535D */ | |
581 | if(version != 0x00) | |
582 | { | |
898b1d16 SO |
583 | IRDA_ERROR("%s, Wrong chip version %02x\n", |
584 | ALI_IRCC_DRIVER_NAME, version); | |
1da177e4 LT |
585 | return -1; |
586 | } | |
587 | ||
1da177e4 LT |
588 | /* Set FIR FIFO Threshold Register */ |
589 | switch_bank(iobase, BANK1); | |
590 | outb(RX_FIFO_Threshold, iobase+FIR_FIFO_TR); | |
591 | ||
592 | /* Set FIR DMA Threshold Register */ | |
593 | outb(RX_DMA_Threshold, iobase+FIR_DMA_TR); | |
594 | ||
595 | /* CRC enable */ | |
596 | switch_bank(iobase, BANK2); | |
597 | outb(inb(iobase+FIR_IRDA_CR) | IRDA_CR_CRC, iobase+FIR_IRDA_CR); | |
598 | ||
599 | /* NDIS driver set TX Length here BANK2 Alias 3, Alias4*/ | |
600 | ||
601 | /* Switch to Bank 0 */ | |
602 | switch_bank(iobase, BANK0); | |
603 | ||
604 | tmp = inb(iobase+FIR_LCR_B); | |
605 | tmp &=~0x20; // disable SIP | |
606 | tmp |= 0x80; // these two steps make RX mode | |
607 | tmp &= 0xbf; | |
608 | outb(tmp, iobase+FIR_LCR_B); | |
609 | ||
610 | /* Disable Interrupt */ | |
611 | outb(0x00, iobase+FIR_IER); | |
612 | ||
613 | ||
614 | /* Switch to SIR space */ | |
615 | FIR2SIR(iobase); | |
616 | ||
898b1d16 SO |
617 | IRDA_MESSAGE("%s, driver loaded (Benjamin Kong)\n", |
618 | ALI_IRCC_DRIVER_NAME); | |
1da177e4 LT |
619 | |
620 | /* Enable receive interrupts */ | |
621 | // outb(UART_IER_RDI, iobase+UART_IER); //benjamin 2000/11/23 01:25PM | |
622 | // Turn on the interrupts in ali_ircc_net_open | |
623 | ||
a97a6f10 | 624 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__); |
1da177e4 LT |
625 | |
626 | return 0; | |
627 | } | |
628 | ||
629 | /* | |
630 | * Function ali_ircc_read_dongle_id (int index, info) | |
631 | * | |
632 | * Try to read dongle indentification. This procedure needs to be executed | |
633 | * once after power-on/reset. It also needs to be used whenever you suspect | |
634 | * that the user may have plugged/unplugged the IrDA Dongle. | |
635 | */ | |
636 | static int ali_ircc_read_dongle_id (int i, chipio_t *info) | |
637 | { | |
638 | int dongle_id, reg; | |
639 | int cfg_base = info->cfg_base; | |
640 | ||
a97a6f10 | 641 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__); |
1da177e4 LT |
642 | |
643 | /* Enter Configuration */ | |
644 | outb(chips[i].entr1, cfg_base); | |
645 | outb(chips[i].entr2, cfg_base); | |
646 | ||
647 | /* Select Logical Device 5 Registers (UART2) */ | |
648 | outb(0x07, cfg_base); | |
649 | outb(0x05, cfg_base+1); | |
650 | ||
651 | /* Read Dongle ID */ | |
652 | outb(0xf0, cfg_base); | |
653 | reg = inb(cfg_base+1); | |
654 | dongle_id = ((reg>>6)&0x02) | ((reg>>5)&0x01); | |
a97a6f10 | 655 | IRDA_DEBUG(2, "%s(), probing dongle_id=%d, dongle_types=%s\n", __func__, |
1da177e4 LT |
656 | dongle_id, dongle_types[dongle_id]); |
657 | ||
658 | /* Exit configuration */ | |
659 | outb(0xbb, cfg_base); | |
660 | ||
a97a6f10 | 661 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__); |
1da177e4 LT |
662 | |
663 | return dongle_id; | |
664 | } | |
665 | ||
666 | /* | |
667 | * Function ali_ircc_interrupt (irq, dev_id, regs) | |
668 | * | |
669 | * An interrupt from the chip has arrived. Time to do some work | |
670 | * | |
671 | */ | |
7d12e780 | 672 | static irqreturn_t ali_ircc_interrupt(int irq, void *dev_id) |
1da177e4 | 673 | { |
c31f28e7 | 674 | struct net_device *dev = dev_id; |
1da177e4 LT |
675 | struct ali_ircc_cb *self; |
676 | int ret; | |
677 | ||
a97a6f10 | 678 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__); |
1da177e4 | 679 | |
4cf1653a | 680 | self = netdev_priv(dev); |
1da177e4 LT |
681 | |
682 | spin_lock(&self->lock); | |
683 | ||
684 | /* Dispatch interrupt handler for the current speed */ | |
685 | if (self->io.speed > 115200) | |
686 | ret = ali_ircc_fir_interrupt(self); | |
687 | else | |
688 | ret = ali_ircc_sir_interrupt(self); | |
689 | ||
690 | spin_unlock(&self->lock); | |
691 | ||
a97a6f10 | 692 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__); |
1da177e4 LT |
693 | return ret; |
694 | } | |
695 | /* | |
696 | * Function ali_ircc_fir_interrupt(irq, struct ali_ircc_cb *self) | |
697 | * | |
698 | * Handle MIR/FIR interrupt | |
699 | * | |
700 | */ | |
701 | static irqreturn_t ali_ircc_fir_interrupt(struct ali_ircc_cb *self) | |
702 | { | |
703 | __u8 eir, OldMessageCount; | |
704 | int iobase, tmp; | |
705 | ||
a97a6f10 | 706 | IRDA_DEBUG(1, "%s(), ---------------- Start ----------------\n", __func__); |
1da177e4 LT |
707 | |
708 | iobase = self->io.fir_base; | |
709 | ||
710 | switch_bank(iobase, BANK0); | |
711 | self->InterruptID = inb(iobase+FIR_IIR); | |
712 | self->BusStatus = inb(iobase+FIR_BSR); | |
713 | ||
714 | OldMessageCount = (self->LineStatus + 1) & 0x07; | |
715 | self->LineStatus = inb(iobase+FIR_LSR); | |
716 | //self->ier = inb(iobase+FIR_IER); 2000/12/1 04:32PM | |
717 | eir = self->InterruptID & self->ier; /* Mask out the interesting ones */ | |
718 | ||
a97a6f10 HH |
719 | IRDA_DEBUG(1, "%s(), self->InterruptID = %x\n", __func__,self->InterruptID); |
720 | IRDA_DEBUG(1, "%s(), self->LineStatus = %x\n", __func__,self->LineStatus); | |
721 | IRDA_DEBUG(1, "%s(), self->ier = %x\n", __func__,self->ier); | |
722 | IRDA_DEBUG(1, "%s(), eir = %x\n", __func__,eir); | |
1da177e4 LT |
723 | |
724 | /* Disable interrupts */ | |
725 | SetCOMInterrupts(self, FALSE); | |
726 | ||
727 | /* Tx or Rx Interrupt */ | |
728 | ||
729 | if (eir & IIR_EOM) | |
730 | { | |
731 | if (self->io.direction == IO_XMIT) /* TX */ | |
732 | { | |
a97a6f10 | 733 | IRDA_DEBUG(1, "%s(), ******* IIR_EOM (Tx) *******\n", __func__); |
1da177e4 LT |
734 | |
735 | if(ali_ircc_dma_xmit_complete(self)) | |
736 | { | |
737 | if (irda_device_txqueue_empty(self->netdev)) | |
738 | { | |
739 | /* Prepare for receive */ | |
740 | ali_ircc_dma_receive(self); | |
741 | self->ier = IER_EOM; | |
742 | } | |
743 | } | |
744 | else | |
745 | { | |
746 | self->ier = IER_EOM; | |
747 | } | |
748 | ||
749 | } | |
750 | else /* RX */ | |
751 | { | |
a97a6f10 | 752 | IRDA_DEBUG(1, "%s(), ******* IIR_EOM (Rx) *******\n", __func__); |
1da177e4 LT |
753 | |
754 | if(OldMessageCount > ((self->LineStatus+1) & 0x07)) | |
755 | { | |
756 | self->rcvFramesOverflow = TRUE; | |
19299b34 | 757 | IRDA_DEBUG(1, "%s(), ******* self->rcvFramesOverflow = TRUE ********\n", __func__); |
1da177e4 LT |
758 | } |
759 | ||
760 | if (ali_ircc_dma_receive_complete(self)) | |
761 | { | |
19299b34 | 762 | IRDA_DEBUG(1, "%s(), ******* receive complete ********\n", __func__); |
1da177e4 LT |
763 | |
764 | self->ier = IER_EOM; | |
765 | } | |
766 | else | |
767 | { | |
19299b34 | 768 | IRDA_DEBUG(1, "%s(), ******* Not receive complete ********\n", __func__); |
1da177e4 LT |
769 | |
770 | self->ier = IER_EOM | IER_TIMER; | |
771 | } | |
772 | ||
773 | } | |
774 | } | |
775 | /* Timer Interrupt */ | |
776 | else if (eir & IIR_TIMER) | |
777 | { | |
778 | if(OldMessageCount > ((self->LineStatus+1) & 0x07)) | |
779 | { | |
780 | self->rcvFramesOverflow = TRUE; | |
19299b34 | 781 | IRDA_DEBUG(1, "%s(), ******* self->rcvFramesOverflow = TRUE *******\n", __func__); |
1da177e4 LT |
782 | } |
783 | /* Disable Timer */ | |
784 | switch_bank(iobase, BANK1); | |
785 | tmp = inb(iobase+FIR_CR); | |
786 | outb( tmp& ~CR_TIMER_EN, iobase+FIR_CR); | |
787 | ||
788 | /* Check if this is a Tx timer interrupt */ | |
789 | if (self->io.direction == IO_XMIT) | |
790 | { | |
791 | ali_ircc_dma_xmit(self); | |
792 | ||
793 | /* Interrupt on EOM */ | |
794 | self->ier = IER_EOM; | |
795 | ||
796 | } | |
797 | else /* Rx */ | |
798 | { | |
799 | if(ali_ircc_dma_receive_complete(self)) | |
800 | { | |
801 | self->ier = IER_EOM; | |
802 | } | |
803 | else | |
804 | { | |
805 | self->ier = IER_EOM | IER_TIMER; | |
806 | } | |
807 | } | |
808 | } | |
809 | ||
810 | /* Restore Interrupt */ | |
811 | SetCOMInterrupts(self, TRUE); | |
812 | ||
a97a6f10 | 813 | IRDA_DEBUG(1, "%s(), ----------------- End ---------------\n", __func__); |
1da177e4 LT |
814 | return IRQ_RETVAL(eir); |
815 | } | |
816 | ||
817 | /* | |
818 | * Function ali_ircc_sir_interrupt (irq, self, eir) | |
819 | * | |
820 | * Handle SIR interrupt | |
821 | * | |
822 | */ | |
823 | static irqreturn_t ali_ircc_sir_interrupt(struct ali_ircc_cb *self) | |
824 | { | |
825 | int iobase; | |
826 | int iir, lsr; | |
827 | ||
a97a6f10 | 828 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__); |
1da177e4 LT |
829 | |
830 | iobase = self->io.sir_base; | |
831 | ||
832 | iir = inb(iobase+UART_IIR) & UART_IIR_ID; | |
833 | if (iir) { | |
834 | /* Clear interrupt */ | |
835 | lsr = inb(iobase+UART_LSR); | |
836 | ||
a97a6f10 | 837 | IRDA_DEBUG(4, "%s(), iir=%02x, lsr=%02x, iobase=%#x\n", __func__, |
1da177e4 LT |
838 | iir, lsr, iobase); |
839 | ||
840 | switch (iir) | |
841 | { | |
842 | case UART_IIR_RLSI: | |
a97a6f10 | 843 | IRDA_DEBUG(2, "%s(), RLSI\n", __func__); |
1da177e4 LT |
844 | break; |
845 | case UART_IIR_RDI: | |
846 | /* Receive interrupt */ | |
847 | ali_ircc_sir_receive(self); | |
848 | break; | |
849 | case UART_IIR_THRI: | |
850 | if (lsr & UART_LSR_THRE) | |
851 | { | |
852 | /* Transmitter ready for data */ | |
853 | ali_ircc_sir_write_wakeup(self); | |
854 | } | |
855 | break; | |
856 | default: | |
a97a6f10 | 857 | IRDA_DEBUG(0, "%s(), unhandled IIR=%#x\n", __func__, iir); |
1da177e4 LT |
858 | break; |
859 | } | |
860 | ||
861 | } | |
862 | ||
863 | ||
a97a6f10 | 864 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__); |
1da177e4 LT |
865 | |
866 | return IRQ_RETVAL(iir); | |
867 | } | |
868 | ||
869 | ||
870 | /* | |
871 | * Function ali_ircc_sir_receive (self) | |
872 | * | |
873 | * Receive one frame from the infrared port | |
874 | * | |
875 | */ | |
876 | static void ali_ircc_sir_receive(struct ali_ircc_cb *self) | |
877 | { | |
878 | int boguscount = 0; | |
879 | int iobase; | |
880 | ||
a97a6f10 | 881 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__); |
1da177e4 LT |
882 | IRDA_ASSERT(self != NULL, return;); |
883 | ||
884 | iobase = self->io.sir_base; | |
885 | ||
886 | /* | |
887 | * Receive all characters in Rx FIFO, unwrap and unstuff them. | |
888 | * async_unwrap_char will deliver all found frames | |
889 | */ | |
890 | do { | |
af049081 | 891 | async_unwrap_char(self->netdev, &self->netdev->stats, &self->rx_buff, |
1da177e4 LT |
892 | inb(iobase+UART_RX)); |
893 | ||
894 | /* Make sure we don't stay here too long */ | |
895 | if (boguscount++ > 32) { | |
a97a6f10 | 896 | IRDA_DEBUG(2,"%s(), breaking!\n", __func__); |
1da177e4 LT |
897 | break; |
898 | } | |
899 | } while (inb(iobase+UART_LSR) & UART_LSR_DR); | |
900 | ||
a97a6f10 | 901 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__ ); |
1da177e4 LT |
902 | } |
903 | ||
904 | /* | |
905 | * Function ali_ircc_sir_write_wakeup (tty) | |
906 | * | |
907 | * Called by the driver when there's room for more data. If we have | |
908 | * more packets to send, we send them here. | |
909 | * | |
910 | */ | |
911 | static void ali_ircc_sir_write_wakeup(struct ali_ircc_cb *self) | |
912 | { | |
913 | int actual = 0; | |
914 | int iobase; | |
915 | ||
916 | IRDA_ASSERT(self != NULL, return;); | |
917 | ||
a97a6f10 | 918 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__ ); |
1da177e4 LT |
919 | |
920 | iobase = self->io.sir_base; | |
921 | ||
922 | /* Finished with frame? */ | |
923 | if (self->tx_buff.len > 0) | |
924 | { | |
925 | /* Write data left in transmit buffer */ | |
926 | actual = ali_ircc_sir_write(iobase, self->io.fifo_size, | |
927 | self->tx_buff.data, self->tx_buff.len); | |
928 | self->tx_buff.data += actual; | |
929 | self->tx_buff.len -= actual; | |
930 | } | |
931 | else | |
932 | { | |
933 | if (self->new_speed) | |
934 | { | |
935 | /* We must wait until all data are gone */ | |
936 | while(!(inb(iobase+UART_LSR) & UART_LSR_TEMT)) | |
a97a6f10 | 937 | IRDA_DEBUG(1, "%s(), UART_LSR_THRE\n", __func__ ); |
1da177e4 | 938 | |
a97a6f10 | 939 | IRDA_DEBUG(1, "%s(), Changing speed! self->new_speed = %d\n", __func__ , self->new_speed); |
1da177e4 LT |
940 | ali_ircc_change_speed(self, self->new_speed); |
941 | self->new_speed = 0; | |
942 | ||
943 | // benjamin 2000/11/10 06:32PM | |
944 | if (self->io.speed > 115200) | |
945 | { | |
19299b34 | 946 | IRDA_DEBUG(2, "%s(), ali_ircc_change_speed from UART_LSR_TEMT\n", __func__ ); |
1da177e4 LT |
947 | |
948 | self->ier = IER_EOM; | |
949 | // SetCOMInterrupts(self, TRUE); | |
950 | return; | |
951 | } | |
952 | } | |
953 | else | |
954 | { | |
955 | netif_wake_queue(self->netdev); | |
956 | } | |
957 | ||
af049081 | 958 | self->netdev->stats.tx_packets++; |
1da177e4 LT |
959 | |
960 | /* Turn on receive interrupts */ | |
961 | outb(UART_IER_RDI, iobase+UART_IER); | |
962 | } | |
963 | ||
a97a6f10 | 964 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__ ); |
1da177e4 LT |
965 | } |
966 | ||
967 | static void ali_ircc_change_speed(struct ali_ircc_cb *self, __u32 baud) | |
968 | { | |
969 | struct net_device *dev = self->netdev; | |
970 | int iobase; | |
971 | ||
a97a6f10 | 972 | IRDA_DEBUG(1, "%s(), ---------------- Start ----------------\n", __func__ ); |
1da177e4 | 973 | |
19299b34 | 974 | IRDA_DEBUG(2, "%s(), setting speed = %d\n", __func__ , baud); |
1da177e4 LT |
975 | |
976 | /* This function *must* be called with irq off and spin-lock. | |
977 | * - Jean II */ | |
978 | ||
979 | iobase = self->io.fir_base; | |
980 | ||
981 | SetCOMInterrupts(self, FALSE); // 2000/11/24 11:43AM | |
982 | ||
983 | /* Go to MIR, FIR Speed */ | |
984 | if (baud > 115200) | |
985 | { | |
986 | ||
987 | ||
988 | ali_ircc_fir_change_speed(self, baud); | |
989 | ||
990 | /* Install FIR xmit handler*/ | |
2d44a222 | 991 | dev->netdev_ops = &ali_ircc_fir_ops; |
1da177e4 LT |
992 | |
993 | /* Enable Interuupt */ | |
994 | self->ier = IER_EOM; // benjamin 2000/11/20 07:24PM | |
995 | ||
996 | /* Be ready for incomming frames */ | |
997 | ali_ircc_dma_receive(self); // benajmin 2000/11/8 07:46PM not complete | |
998 | } | |
999 | /* Go to SIR Speed */ | |
1000 | else | |
1001 | { | |
1002 | ali_ircc_sir_change_speed(self, baud); | |
1003 | ||
1004 | /* Install SIR xmit handler*/ | |
2d44a222 | 1005 | dev->netdev_ops = &ali_ircc_sir_ops; |
1da177e4 LT |
1006 | } |
1007 | ||
1008 | ||
1009 | SetCOMInterrupts(self, TRUE); // 2000/11/24 11:43AM | |
1010 | ||
1011 | netif_wake_queue(self->netdev); | |
1012 | ||
a97a6f10 | 1013 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__ ); |
1da177e4 LT |
1014 | } |
1015 | ||
1016 | static void ali_ircc_fir_change_speed(struct ali_ircc_cb *priv, __u32 baud) | |
1017 | { | |
1018 | ||
1019 | int iobase; | |
c2fd03a0 | 1020 | struct ali_ircc_cb *self = priv; |
1da177e4 LT |
1021 | struct net_device *dev; |
1022 | ||
a97a6f10 | 1023 | IRDA_DEBUG(1, "%s(), ---------------- Start ----------------\n", __func__ ); |
1da177e4 LT |
1024 | |
1025 | IRDA_ASSERT(self != NULL, return;); | |
1026 | ||
1027 | dev = self->netdev; | |
1028 | iobase = self->io.fir_base; | |
1029 | ||
a97a6f10 | 1030 | IRDA_DEBUG(1, "%s(), self->io.speed = %d, change to speed = %d\n", __func__ ,self->io.speed,baud); |
1da177e4 LT |
1031 | |
1032 | /* Come from SIR speed */ | |
1033 | if(self->io.speed <=115200) | |
1034 | { | |
1035 | SIR2FIR(iobase); | |
1036 | } | |
1037 | ||
1038 | /* Update accounting for new speed */ | |
1039 | self->io.speed = baud; | |
1040 | ||
1041 | // Set Dongle Speed mode | |
1042 | ali_ircc_change_dongle_speed(self, baud); | |
1043 | ||
a97a6f10 | 1044 | IRDA_DEBUG(1, "%s(), ----------------- End ------------------\n", __func__ ); |
1da177e4 LT |
1045 | } |
1046 | ||
1047 | /* | |
1048 | * Function ali_sir_change_speed (self, speed) | |
1049 | * | |
1050 | * Set speed of IrDA port to specified baudrate | |
1051 | * | |
1052 | */ | |
1053 | static void ali_ircc_sir_change_speed(struct ali_ircc_cb *priv, __u32 speed) | |
1054 | { | |
c2fd03a0 | 1055 | struct ali_ircc_cb *self = priv; |
1da177e4 LT |
1056 | unsigned long flags; |
1057 | int iobase; | |
1058 | int fcr; /* FIFO control reg */ | |
1059 | int lcr; /* Line control reg */ | |
1060 | int divisor; | |
1061 | ||
a97a6f10 | 1062 | IRDA_DEBUG(1, "%s(), ---------------- Start ----------------\n", __func__ ); |
1da177e4 | 1063 | |
a97a6f10 | 1064 | IRDA_DEBUG(1, "%s(), Setting speed to: %d\n", __func__ , speed); |
1da177e4 LT |
1065 | |
1066 | IRDA_ASSERT(self != NULL, return;); | |
1067 | ||
1068 | iobase = self->io.sir_base; | |
1069 | ||
1070 | /* Come from MIR or FIR speed */ | |
1071 | if(self->io.speed >115200) | |
1072 | { | |
1073 | // Set Dongle Speed mode first | |
1074 | ali_ircc_change_dongle_speed(self, speed); | |
1075 | ||
1076 | FIR2SIR(iobase); | |
1077 | } | |
1078 | ||
1079 | // Clear Line and Auxiluary status registers 2000/11/24 11:47AM | |
1080 | ||
1081 | inb(iobase+UART_LSR); | |
1082 | inb(iobase+UART_SCR); | |
1083 | ||
1084 | /* Update accounting for new speed */ | |
1085 | self->io.speed = speed; | |
1086 | ||
1087 | spin_lock_irqsave(&self->lock, flags); | |
1088 | ||
1089 | divisor = 115200/speed; | |
1090 | ||
1091 | fcr = UART_FCR_ENABLE_FIFO; | |
1092 | ||
1093 | /* | |
1094 | * Use trigger level 1 to avoid 3 ms. timeout delay at 9600 bps, and | |
1095 | * almost 1,7 ms at 19200 bps. At speeds above that we can just forget | |
1096 | * about this timeout since it will always be fast enough. | |
1097 | */ | |
1098 | if (self->io.speed < 38400) | |
1099 | fcr |= UART_FCR_TRIGGER_1; | |
1100 | else | |
1101 | fcr |= UART_FCR_TRIGGER_14; | |
1102 | ||
1103 | /* IrDA ports use 8N1 */ | |
1104 | lcr = UART_LCR_WLEN8; | |
1105 | ||
1106 | outb(UART_LCR_DLAB | lcr, iobase+UART_LCR); /* Set DLAB */ | |
1107 | outb(divisor & 0xff, iobase+UART_DLL); /* Set speed */ | |
1108 | outb(divisor >> 8, iobase+UART_DLM); | |
1109 | outb(lcr, iobase+UART_LCR); /* Set 8N1 */ | |
1110 | outb(fcr, iobase+UART_FCR); /* Enable FIFO's */ | |
1111 | ||
25985edc | 1112 | /* without this, the connection will be broken after come back from FIR speed, |
1da177e4 LT |
1113 | but with this, the SIR connection is harder to established */ |
1114 | outb((UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2), iobase+UART_MCR); | |
1115 | ||
1116 | spin_unlock_irqrestore(&self->lock, flags); | |
1117 | ||
a97a6f10 | 1118 | IRDA_DEBUG(1, "%s(), ----------------- End ------------------\n", __func__ ); |
1da177e4 LT |
1119 | } |
1120 | ||
1121 | static void ali_ircc_change_dongle_speed(struct ali_ircc_cb *priv, int speed) | |
1122 | { | |
1123 | ||
c2fd03a0 | 1124 | struct ali_ircc_cb *self = priv; |
1da177e4 LT |
1125 | int iobase,dongle_id; |
1126 | int tmp = 0; | |
1127 | ||
a97a6f10 | 1128 | IRDA_DEBUG(1, "%s(), ---------------- Start ----------------\n", __func__ ); |
1da177e4 LT |
1129 | |
1130 | iobase = self->io.fir_base; /* or iobase = self->io.sir_base; */ | |
1131 | dongle_id = self->io.dongle_id; | |
1132 | ||
1133 | /* We are already locked, no need to do it again */ | |
1134 | ||
a97a6f10 | 1135 | IRDA_DEBUG(1, "%s(), Set Speed for %s , Speed = %d\n", __func__ , dongle_types[dongle_id], speed); |
1da177e4 LT |
1136 | |
1137 | switch_bank(iobase, BANK2); | |
1138 | tmp = inb(iobase+FIR_IRDA_CR); | |
1139 | ||
1140 | /* IBM type dongle */ | |
1141 | if(dongle_id == 0) | |
1142 | { | |
1143 | if(speed == 4000000) | |
1144 | { | |
1145 | // __ __ | |
1146 | // SD/MODE __| |__ __ | |
1147 | // __ __ | |
1148 | // IRTX __ __| |__ | |
1149 | // T1 T2 T3 T4 T5 | |
1150 | ||
1151 | tmp &= ~IRDA_CR_HDLC; // HDLC=0 | |
1152 | tmp |= IRDA_CR_CRC; // CRC=1 | |
1153 | ||
1154 | switch_bank(iobase, BANK2); | |
1155 | outb(tmp, iobase+FIR_IRDA_CR); | |
1156 | ||
1157 | // T1 -> SD/MODE:0 IRTX:0 | |
1158 | tmp &= ~0x09; | |
1159 | tmp |= 0x02; | |
1160 | outb(tmp, iobase+FIR_IRDA_CR); | |
1161 | udelay(2); | |
1162 | ||
1163 | // T2 -> SD/MODE:1 IRTX:0 | |
1164 | tmp &= ~0x01; | |
1165 | tmp |= 0x0a; | |
1166 | outb(tmp, iobase+FIR_IRDA_CR); | |
1167 | udelay(2); | |
1168 | ||
1169 | // T3 -> SD/MODE:1 IRTX:1 | |
1170 | tmp |= 0x0b; | |
1171 | outb(tmp, iobase+FIR_IRDA_CR); | |
1172 | udelay(2); | |
1173 | ||
1174 | // T4 -> SD/MODE:0 IRTX:1 | |
1175 | tmp &= ~0x08; | |
1176 | tmp |= 0x03; | |
1177 | outb(tmp, iobase+FIR_IRDA_CR); | |
1178 | udelay(2); | |
1179 | ||
1180 | // T5 -> SD/MODE:0 IRTX:0 | |
1181 | tmp &= ~0x09; | |
1182 | tmp |= 0x02; | |
1183 | outb(tmp, iobase+FIR_IRDA_CR); | |
1184 | udelay(2); | |
1185 | ||
1186 | // reset -> Normal TX output Signal | |
1187 | outb(tmp & ~0x02, iobase+FIR_IRDA_CR); | |
1188 | } | |
1189 | else /* speed <=1152000 */ | |
1190 | { | |
1191 | // __ | |
1192 | // SD/MODE __| |__ | |
1193 | // | |
1194 | // IRTX ________ | |
1195 | // T1 T2 T3 | |
1196 | ||
1197 | /* MIR 115200, 57600 */ | |
1198 | if (speed==1152000) | |
1199 | { | |
1200 | tmp |= 0xA0; //HDLC=1, 1.152Mbps=1 | |
1201 | } | |
1202 | else | |
1203 | { | |
1204 | tmp &=~0x80; //HDLC 0.576Mbps | |
1205 | tmp |= 0x20; //HDLC=1, | |
1206 | } | |
1207 | ||
1208 | tmp |= IRDA_CR_CRC; // CRC=1 | |
1209 | ||
1210 | switch_bank(iobase, BANK2); | |
1211 | outb(tmp, iobase+FIR_IRDA_CR); | |
1212 | ||
1213 | /* MIR 115200, 57600 */ | |
1214 | ||
1215 | //switch_bank(iobase, BANK2); | |
1216 | // T1 -> SD/MODE:0 IRTX:0 | |
1217 | tmp &= ~0x09; | |
1218 | tmp |= 0x02; | |
1219 | outb(tmp, iobase+FIR_IRDA_CR); | |
1220 | udelay(2); | |
1221 | ||
1222 | // T2 -> SD/MODE:1 IRTX:0 | |
1223 | tmp &= ~0x01; | |
1224 | tmp |= 0x0a; | |
1225 | outb(tmp, iobase+FIR_IRDA_CR); | |
1226 | ||
1227 | // T3 -> SD/MODE:0 IRTX:0 | |
1228 | tmp &= ~0x09; | |
1229 | tmp |= 0x02; | |
1230 | outb(tmp, iobase+FIR_IRDA_CR); | |
1231 | udelay(2); | |
1232 | ||
1233 | // reset -> Normal TX output Signal | |
1234 | outb(tmp & ~0x02, iobase+FIR_IRDA_CR); | |
1235 | } | |
1236 | } | |
1237 | else if (dongle_id == 1) /* HP HDSL-3600 */ | |
1238 | { | |
1239 | switch(speed) | |
1240 | { | |
1241 | case 4000000: | |
1242 | tmp &= ~IRDA_CR_HDLC; // HDLC=0 | |
1243 | break; | |
1244 | ||
1245 | case 1152000: | |
1246 | tmp |= 0xA0; // HDLC=1, 1.152Mbps=1 | |
1247 | break; | |
1248 | ||
1249 | case 576000: | |
1250 | tmp &=~0x80; // HDLC 0.576Mbps | |
1251 | tmp |= 0x20; // HDLC=1, | |
1252 | break; | |
1253 | } | |
1254 | ||
1255 | tmp |= IRDA_CR_CRC; // CRC=1 | |
1256 | ||
1257 | switch_bank(iobase, BANK2); | |
1258 | outb(tmp, iobase+FIR_IRDA_CR); | |
1259 | } | |
1260 | else /* HP HDSL-1100 */ | |
1261 | { | |
1262 | if(speed <= 115200) /* SIR */ | |
1263 | { | |
1264 | ||
1265 | tmp &= ~IRDA_CR_FIR_SIN; // HP sin select = 0 | |
1266 | ||
1267 | switch_bank(iobase, BANK2); | |
1268 | outb(tmp, iobase+FIR_IRDA_CR); | |
1269 | } | |
1270 | else /* MIR FIR */ | |
1271 | { | |
1272 | ||
1273 | switch(speed) | |
1274 | { | |
1275 | case 4000000: | |
1276 | tmp &= ~IRDA_CR_HDLC; // HDLC=0 | |
1277 | break; | |
1278 | ||
1279 | case 1152000: | |
1280 | tmp |= 0xA0; // HDLC=1, 1.152Mbps=1 | |
1281 | break; | |
1282 | ||
1283 | case 576000: | |
1284 | tmp &=~0x80; // HDLC 0.576Mbps | |
1285 | tmp |= 0x20; // HDLC=1, | |
1286 | break; | |
1287 | } | |
1288 | ||
1289 | tmp |= IRDA_CR_CRC; // CRC=1 | |
1290 | tmp |= IRDA_CR_FIR_SIN; // HP sin select = 1 | |
1291 | ||
1292 | switch_bank(iobase, BANK2); | |
1293 | outb(tmp, iobase+FIR_IRDA_CR); | |
1294 | } | |
1295 | } | |
1296 | ||
1297 | switch_bank(iobase, BANK0); | |
1298 | ||
a97a6f10 | 1299 | IRDA_DEBUG(1, "%s(), ----------------- End ------------------\n", __func__ ); |
1da177e4 LT |
1300 | } |
1301 | ||
1302 | /* | |
1303 | * Function ali_ircc_sir_write (driver) | |
1304 | * | |
1305 | * Fill Tx FIFO with transmit data | |
1306 | * | |
1307 | */ | |
1308 | static int ali_ircc_sir_write(int iobase, int fifo_size, __u8 *buf, int len) | |
1309 | { | |
1310 | int actual = 0; | |
1311 | ||
a97a6f10 | 1312 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__ ); |
1da177e4 LT |
1313 | |
1314 | /* Tx FIFO should be empty! */ | |
1315 | if (!(inb(iobase+UART_LSR) & UART_LSR_THRE)) { | |
a97a6f10 | 1316 | IRDA_DEBUG(0, "%s(), failed, fifo not empty!\n", __func__ ); |
1da177e4 LT |
1317 | return 0; |
1318 | } | |
1319 | ||
1320 | /* Fill FIFO with current frame */ | |
1321 | while ((fifo_size-- > 0) && (actual < len)) { | |
1322 | /* Transmit next byte */ | |
1323 | outb(buf[actual], iobase+UART_TX); | |
1324 | ||
1325 | actual++; | |
1326 | } | |
1327 | ||
a97a6f10 | 1328 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__ ); |
1da177e4 LT |
1329 | return actual; |
1330 | } | |
1331 | ||
1332 | /* | |
1333 | * Function ali_ircc_net_open (dev) | |
1334 | * | |
1335 | * Start the device | |
1336 | * | |
1337 | */ | |
1338 | static int ali_ircc_net_open(struct net_device *dev) | |
1339 | { | |
1340 | struct ali_ircc_cb *self; | |
1341 | int iobase; | |
1342 | char hwname[32]; | |
1343 | ||
a97a6f10 | 1344 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__ ); |
1da177e4 LT |
1345 | |
1346 | IRDA_ASSERT(dev != NULL, return -1;); | |
1347 | ||
4cf1653a | 1348 | self = netdev_priv(dev); |
1da177e4 LT |
1349 | |
1350 | IRDA_ASSERT(self != NULL, return 0;); | |
1351 | ||
1352 | iobase = self->io.fir_base; | |
1353 | ||
1354 | /* Request IRQ and install Interrupt Handler */ | |
1355 | if (request_irq(self->io.irq, ali_ircc_interrupt, 0, dev->name, dev)) | |
1356 | { | |
898b1d16 SO |
1357 | IRDA_WARNING("%s, unable to allocate irq=%d\n", |
1358 | ALI_IRCC_DRIVER_NAME, | |
1da177e4 LT |
1359 | self->io.irq); |
1360 | return -EAGAIN; | |
1361 | } | |
1362 | ||
1363 | /* | |
1364 | * Always allocate the DMA channel after the IRQ, and clean up on | |
1365 | * failure. | |
1366 | */ | |
1367 | if (request_dma(self->io.dma, dev->name)) { | |
898b1d16 SO |
1368 | IRDA_WARNING("%s, unable to allocate dma=%d\n", |
1369 | ALI_IRCC_DRIVER_NAME, | |
1da177e4 | 1370 | self->io.dma); |
a997cbb3 | 1371 | free_irq(self->io.irq, dev); |
1da177e4 LT |
1372 | return -EAGAIN; |
1373 | } | |
1374 | ||
1375 | /* Turn on interrups */ | |
1376 | outb(UART_IER_RDI , iobase+UART_IER); | |
1377 | ||
1378 | /* Ready to play! */ | |
1379 | netif_start_queue(dev); //benjamin by irport | |
1380 | ||
1381 | /* Give self a hardware name */ | |
1382 | sprintf(hwname, "ALI-FIR @ 0x%03x", self->io.fir_base); | |
1383 | ||
1384 | /* | |
1385 | * Open new IrLAP layer instance, now that everything should be | |
1386 | * initialized properly | |
1387 | */ | |
1388 | self->irlap = irlap_open(dev, &self->qos, hwname); | |
1389 | ||
a97a6f10 | 1390 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__ ); |
1da177e4 LT |
1391 | |
1392 | return 0; | |
1393 | } | |
1394 | ||
1395 | /* | |
1396 | * Function ali_ircc_net_close (dev) | |
1397 | * | |
1398 | * Stop the device | |
1399 | * | |
1400 | */ | |
1401 | static int ali_ircc_net_close(struct net_device *dev) | |
1402 | { | |
1403 | ||
1404 | struct ali_ircc_cb *self; | |
1405 | //int iobase; | |
1406 | ||
a97a6f10 | 1407 | IRDA_DEBUG(4, "%s(), ---------------- Start ----------------\n", __func__ ); |
1da177e4 LT |
1408 | |
1409 | IRDA_ASSERT(dev != NULL, return -1;); | |
1410 | ||
4cf1653a | 1411 | self = netdev_priv(dev); |
1da177e4 LT |
1412 | IRDA_ASSERT(self != NULL, return 0;); |
1413 | ||
1414 | /* Stop device */ | |
1415 | netif_stop_queue(dev); | |
1416 | ||
1417 | /* Stop and remove instance of IrLAP */ | |
1418 | if (self->irlap) | |
1419 | irlap_close(self->irlap); | |
1420 | self->irlap = NULL; | |
1421 | ||
1422 | disable_dma(self->io.dma); | |
1423 | ||
1424 | /* Disable interrupts */ | |
1425 | SetCOMInterrupts(self, FALSE); | |
1426 | ||
1427 | free_irq(self->io.irq, dev); | |
1428 | free_dma(self->io.dma); | |
1429 | ||
a97a6f10 | 1430 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__ ); |
1da177e4 LT |
1431 | |
1432 | return 0; | |
1433 | } | |
1434 | ||
1435 | /* | |
1436 | * Function ali_ircc_fir_hard_xmit (skb, dev) | |
1437 | * | |
1438 | * Transmit the frame | |
1439 | * | |
1440 | */ | |
6518bbb8 SH |
1441 | static netdev_tx_t ali_ircc_fir_hard_xmit(struct sk_buff *skb, |
1442 | struct net_device *dev) | |
1da177e4 LT |
1443 | { |
1444 | struct ali_ircc_cb *self; | |
1445 | unsigned long flags; | |
1446 | int iobase; | |
1447 | __u32 speed; | |
1448 | int mtt, diff; | |
1449 | ||
a97a6f10 | 1450 | IRDA_DEBUG(1, "%s(), ---------------- Start -----------------\n", __func__ ); |
1da177e4 | 1451 | |
4cf1653a | 1452 | self = netdev_priv(dev); |
1da177e4 LT |
1453 | iobase = self->io.fir_base; |
1454 | ||
1455 | netif_stop_queue(dev); | |
1456 | ||
1457 | /* Make sure tests *& speed change are atomic */ | |
1458 | spin_lock_irqsave(&self->lock, flags); | |
1459 | ||
1460 | /* Note : you should make sure that speed changes are not going | |
1461 | * to corrupt any outgoing frame. Look at nsc-ircc for the gory | |
1462 | * details - Jean II */ | |
1463 | ||
1464 | /* Check if we need to change the speed */ | |
1465 | speed = irda_get_next_speed(skb); | |
1466 | if ((speed != self->io.speed) && (speed != -1)) { | |
1467 | /* Check for empty frame */ | |
1468 | if (!skb->len) { | |
1469 | ali_ircc_change_speed(self, speed); | |
1470 | dev->trans_start = jiffies; | |
1471 | spin_unlock_irqrestore(&self->lock, flags); | |
1472 | dev_kfree_skb(skb); | |
6ed10654 | 1473 | return NETDEV_TX_OK; |
1da177e4 LT |
1474 | } else |
1475 | self->new_speed = speed; | |
1476 | } | |
1477 | ||
1478 | /* Register and copy this frame to DMA memory */ | |
1479 | self->tx_fifo.queue[self->tx_fifo.free].start = self->tx_fifo.tail; | |
1480 | self->tx_fifo.queue[self->tx_fifo.free].len = skb->len; | |
1481 | self->tx_fifo.tail += skb->len; | |
1482 | ||
af049081 | 1483 | dev->stats.tx_bytes += skb->len; |
1da177e4 | 1484 | |
d626f62b ACM |
1485 | skb_copy_from_linear_data(skb, self->tx_fifo.queue[self->tx_fifo.free].start, |
1486 | skb->len); | |
1da177e4 LT |
1487 | self->tx_fifo.len++; |
1488 | self->tx_fifo.free++; | |
1489 | ||
1490 | /* Start transmit only if there is currently no transmit going on */ | |
1491 | if (self->tx_fifo.len == 1) | |
1492 | { | |
1493 | /* Check if we must wait the min turn time or not */ | |
1494 | mtt = irda_get_mtt(skb); | |
1495 | ||
1496 | if (mtt) | |
1497 | { | |
1498 | /* Check how much time we have used already */ | |
1499 | do_gettimeofday(&self->now); | |
1500 | ||
1501 | diff = self->now.tv_usec - self->stamp.tv_usec; | |
1502 | /* self->stamp is set from ali_ircc_dma_receive_complete() */ | |
1503 | ||
19299b34 | 1504 | IRDA_DEBUG(1, "%s(), ******* diff = %d *******\n", __func__ , diff); |
1da177e4 LT |
1505 | |
1506 | if (diff < 0) | |
1507 | diff += 1000000; | |
1508 | ||
1509 | /* Check if the mtt is larger than the time we have | |
1510 | * already used by all the protocol processing | |
1511 | */ | |
1512 | if (mtt > diff) | |
1513 | { | |
1514 | mtt -= diff; | |
1515 | ||
1516 | /* | |
1517 | * Use timer if delay larger than 1000 us, and | |
1518 | * use udelay for smaller values which should | |
1519 | * be acceptable | |
1520 | */ | |
1521 | if (mtt > 500) | |
1522 | { | |
1523 | /* Adjust for timer resolution */ | |
1524 | mtt = (mtt+250) / 500; /* 4 discard, 5 get advanced, Let's round off */ | |
1525 | ||
a97a6f10 | 1526 | IRDA_DEBUG(1, "%s(), ************** mtt = %d ***********\n", __func__ , mtt); |
1da177e4 LT |
1527 | |
1528 | /* Setup timer */ | |
1529 | if (mtt == 1) /* 500 us */ | |
1530 | { | |
1531 | switch_bank(iobase, BANK1); | |
1532 | outb(TIMER_IIR_500, iobase+FIR_TIMER_IIR); | |
1533 | } | |
1534 | else if (mtt == 2) /* 1 ms */ | |
1535 | { | |
1536 | switch_bank(iobase, BANK1); | |
1537 | outb(TIMER_IIR_1ms, iobase+FIR_TIMER_IIR); | |
1538 | } | |
1539 | else /* > 2ms -> 4ms */ | |
1540 | { | |
1541 | switch_bank(iobase, BANK1); | |
1542 | outb(TIMER_IIR_2ms, iobase+FIR_TIMER_IIR); | |
1543 | } | |
1544 | ||
1545 | ||
1546 | /* Start timer */ | |
1547 | outb(inb(iobase+FIR_CR) | CR_TIMER_EN, iobase+FIR_CR); | |
1548 | self->io.direction = IO_XMIT; | |
1549 | ||
1550 | /* Enable timer interrupt */ | |
1551 | self->ier = IER_TIMER; | |
1552 | SetCOMInterrupts(self, TRUE); | |
1553 | ||
1554 | /* Timer will take care of the rest */ | |
1555 | goto out; | |
1556 | } | |
1557 | else | |
1558 | udelay(mtt); | |
1559 | } // if (if (mtt > diff) | |
1560 | }// if (mtt) | |
1561 | ||
1562 | /* Enable EOM interrupt */ | |
1563 | self->ier = IER_EOM; | |
1564 | SetCOMInterrupts(self, TRUE); | |
1565 | ||
1566 | /* Transmit frame */ | |
1567 | ali_ircc_dma_xmit(self); | |
1568 | } // if (self->tx_fifo.len == 1) | |
1569 | ||
1570 | out: | |
1571 | ||
1572 | /* Not busy transmitting anymore if window is not full */ | |
1573 | if (self->tx_fifo.free < MAX_TX_WINDOW) | |
1574 | netif_wake_queue(self->netdev); | |
1575 | ||
1576 | /* Restore bank register */ | |
1577 | switch_bank(iobase, BANK0); | |
1578 | ||
1579 | dev->trans_start = jiffies; | |
1580 | spin_unlock_irqrestore(&self->lock, flags); | |
1581 | dev_kfree_skb(skb); | |
1582 | ||
a97a6f10 | 1583 | IRDA_DEBUG(1, "%s(), ----------------- End ------------------\n", __func__ ); |
6ed10654 | 1584 | return NETDEV_TX_OK; |
1da177e4 LT |
1585 | } |
1586 | ||
1587 | ||
1588 | static void ali_ircc_dma_xmit(struct ali_ircc_cb *self) | |
1589 | { | |
1590 | int iobase, tmp; | |
1591 | unsigned char FIFO_OPTI, Hi, Lo; | |
1592 | ||
1593 | ||
a97a6f10 | 1594 | IRDA_DEBUG(1, "%s(), ---------------- Start -----------------\n", __func__ ); |
1da177e4 LT |
1595 | |
1596 | iobase = self->io.fir_base; | |
1597 | ||
1598 | /* FIFO threshold , this method comes from NDIS5 code */ | |
1599 | ||
1600 | if(self->tx_fifo.queue[self->tx_fifo.ptr].len < TX_FIFO_Threshold) | |
1601 | FIFO_OPTI = self->tx_fifo.queue[self->tx_fifo.ptr].len-1; | |
1602 | else | |
1603 | FIFO_OPTI = TX_FIFO_Threshold; | |
1604 | ||
1605 | /* Disable DMA */ | |
1606 | switch_bank(iobase, BANK1); | |
1607 | outb(inb(iobase+FIR_CR) & ~CR_DMA_EN, iobase+FIR_CR); | |
1608 | ||
1609 | self->io.direction = IO_XMIT; | |
1610 | ||
1611 | irda_setup_dma(self->io.dma, | |
1612 | ((u8 *)self->tx_fifo.queue[self->tx_fifo.ptr].start - | |
1613 | self->tx_buff.head) + self->tx_buff_dma, | |
1614 | self->tx_fifo.queue[self->tx_fifo.ptr].len, | |
1615 | DMA_TX_MODE); | |
1616 | ||
1617 | /* Reset Tx FIFO */ | |
1618 | switch_bank(iobase, BANK0); | |
1619 | outb(LCR_A_FIFO_RESET, iobase+FIR_LCR_A); | |
1620 | ||
1621 | /* Set Tx FIFO threshold */ | |
1622 | if (self->fifo_opti_buf!=FIFO_OPTI) | |
1623 | { | |
1624 | switch_bank(iobase, BANK1); | |
1625 | outb(FIFO_OPTI, iobase+FIR_FIFO_TR) ; | |
1626 | self->fifo_opti_buf=FIFO_OPTI; | |
1627 | } | |
1628 | ||
1629 | /* Set Tx DMA threshold */ | |
1630 | switch_bank(iobase, BANK1); | |
1631 | outb(TX_DMA_Threshold, iobase+FIR_DMA_TR); | |
1632 | ||
1633 | /* Set max Tx frame size */ | |
1634 | Hi = (self->tx_fifo.queue[self->tx_fifo.ptr].len >> 8) & 0x0f; | |
1635 | Lo = self->tx_fifo.queue[self->tx_fifo.ptr].len & 0xff; | |
1636 | switch_bank(iobase, BANK2); | |
1637 | outb(Hi, iobase+FIR_TX_DSR_HI); | |
1638 | outb(Lo, iobase+FIR_TX_DSR_LO); | |
1639 | ||
1640 | /* Disable SIP , Disable Brick Wall (we don't support in TX mode), Change to TX mode */ | |
1641 | switch_bank(iobase, BANK0); | |
1642 | tmp = inb(iobase+FIR_LCR_B); | |
1643 | tmp &= ~0x20; // Disable SIP | |
1644 | outb(((unsigned char)(tmp & 0x3f) | LCR_B_TX_MODE) & ~LCR_B_BW, iobase+FIR_LCR_B); | |
19299b34 | 1645 | IRDA_DEBUG(1, "%s(), *** Change to TX mode: FIR_LCR_B = 0x%x ***\n", __func__ , inb(iobase+FIR_LCR_B)); |
1da177e4 LT |
1646 | |
1647 | outb(0, iobase+FIR_LSR); | |
1648 | ||
1649 | /* Enable DMA and Burst Mode */ | |
1650 | switch_bank(iobase, BANK1); | |
1651 | outb(inb(iobase+FIR_CR) | CR_DMA_EN | CR_DMA_BURST, iobase+FIR_CR); | |
1652 | ||
1653 | switch_bank(iobase, BANK0); | |
1654 | ||
a97a6f10 | 1655 | IRDA_DEBUG(1, "%s(), ----------------- End ------------------\n", __func__ ); |
1da177e4 LT |
1656 | } |
1657 | ||
1658 | static int ali_ircc_dma_xmit_complete(struct ali_ircc_cb *self) | |
1659 | { | |
1660 | int iobase; | |
1661 | int ret = TRUE; | |
1662 | ||
a97a6f10 | 1663 | IRDA_DEBUG(1, "%s(), ---------------- Start -----------------\n", __func__ ); |
1da177e4 LT |
1664 | |
1665 | iobase = self->io.fir_base; | |
1666 | ||
1667 | /* Disable DMA */ | |
1668 | switch_bank(iobase, BANK1); | |
1669 | outb(inb(iobase+FIR_CR) & ~CR_DMA_EN, iobase+FIR_CR); | |
1670 | ||
1671 | /* Check for underrun! */ | |
1672 | switch_bank(iobase, BANK0); | |
1673 | if((inb(iobase+FIR_LSR) & LSR_FRAME_ABORT) == LSR_FRAME_ABORT) | |
1674 | ||
1675 | { | |
a97a6f10 | 1676 | IRDA_ERROR("%s(), ********* LSR_FRAME_ABORT *********\n", __func__); |
af049081 SH |
1677 | self->netdev->stats.tx_errors++; |
1678 | self->netdev->stats.tx_fifo_errors++; | |
1da177e4 LT |
1679 | } |
1680 | else | |
1681 | { | |
af049081 | 1682 | self->netdev->stats.tx_packets++; |
1da177e4 LT |
1683 | } |
1684 | ||
1685 | /* Check if we need to change the speed */ | |
1686 | if (self->new_speed) | |
1687 | { | |
1688 | ali_ircc_change_speed(self, self->new_speed); | |
1689 | self->new_speed = 0; | |
1690 | } | |
1691 | ||
1692 | /* Finished with this frame, so prepare for next */ | |
1693 | self->tx_fifo.ptr++; | |
1694 | self->tx_fifo.len--; | |
1695 | ||
1696 | /* Any frames to be sent back-to-back? */ | |
1697 | if (self->tx_fifo.len) | |
1698 | { | |
1699 | ali_ircc_dma_xmit(self); | |
1700 | ||
1701 | /* Not finished yet! */ | |
1702 | ret = FALSE; | |
1703 | } | |
1704 | else | |
1705 | { /* Reset Tx FIFO info */ | |
1706 | self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0; | |
1707 | self->tx_fifo.tail = self->tx_buff.head; | |
1708 | } | |
1709 | ||
1710 | /* Make sure we have room for more frames */ | |
1711 | if (self->tx_fifo.free < MAX_TX_WINDOW) { | |
1712 | /* Not busy transmitting anymore */ | |
1713 | /* Tell the network layer, that we can accept more frames */ | |
1714 | netif_wake_queue(self->netdev); | |
1715 | } | |
1716 | ||
1717 | switch_bank(iobase, BANK0); | |
1718 | ||
a97a6f10 | 1719 | IRDA_DEBUG(1, "%s(), ----------------- End ------------------\n", __func__ ); |
1da177e4 LT |
1720 | return ret; |
1721 | } | |
1722 | ||
1723 | /* | |
1724 | * Function ali_ircc_dma_receive (self) | |
1725 | * | |
1726 | * Get ready for receiving a frame. The device will initiate a DMA | |
1727 | * if it starts to receive a frame. | |
1728 | * | |
1729 | */ | |
1730 | static int ali_ircc_dma_receive(struct ali_ircc_cb *self) | |
1731 | { | |
1732 | int iobase, tmp; | |
1733 | ||
a97a6f10 | 1734 | IRDA_DEBUG(1, "%s(), ---------------- Start -----------------\n", __func__ ); |
1da177e4 LT |
1735 | |
1736 | iobase = self->io.fir_base; | |
1737 | ||
1738 | /* Reset Tx FIFO info */ | |
1739 | self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0; | |
1740 | self->tx_fifo.tail = self->tx_buff.head; | |
1741 | ||
1742 | /* Disable DMA */ | |
1743 | switch_bank(iobase, BANK1); | |
1744 | outb(inb(iobase+FIR_CR) & ~CR_DMA_EN, iobase+FIR_CR); | |
1745 | ||
1746 | /* Reset Message Count */ | |
1747 | switch_bank(iobase, BANK0); | |
1748 | outb(0x07, iobase+FIR_LSR); | |
1749 | ||
1750 | self->rcvFramesOverflow = FALSE; | |
1751 | ||
1752 | self->LineStatus = inb(iobase+FIR_LSR) ; | |
1753 | ||
1754 | /* Reset Rx FIFO info */ | |
1755 | self->io.direction = IO_RECV; | |
1756 | self->rx_buff.data = self->rx_buff.head; | |
1757 | ||
1758 | /* Reset Rx FIFO */ | |
1759 | // switch_bank(iobase, BANK0); | |
1760 | outb(LCR_A_FIFO_RESET, iobase+FIR_LCR_A); | |
1761 | ||
1762 | self->st_fifo.len = self->st_fifo.pending_bytes = 0; | |
1763 | self->st_fifo.tail = self->st_fifo.head = 0; | |
1764 | ||
1765 | irda_setup_dma(self->io.dma, self->rx_buff_dma, self->rx_buff.truesize, | |
1766 | DMA_RX_MODE); | |
1767 | ||
1768 | /* Set Receive Mode,Brick Wall */ | |
1769 | //switch_bank(iobase, BANK0); | |
1770 | tmp = inb(iobase+FIR_LCR_B); | |
1771 | outb((unsigned char)(tmp &0x3f) | LCR_B_RX_MODE | LCR_B_BW , iobase + FIR_LCR_B); // 2000/12/1 05:16PM | |
19299b34 | 1772 | IRDA_DEBUG(1, "%s(), *** Change To RX mode: FIR_LCR_B = 0x%x ***\n", __func__ , inb(iobase+FIR_LCR_B)); |
1da177e4 LT |
1773 | |
1774 | /* Set Rx Threshold */ | |
1775 | switch_bank(iobase, BANK1); | |
1776 | outb(RX_FIFO_Threshold, iobase+FIR_FIFO_TR); | |
1777 | outb(RX_DMA_Threshold, iobase+FIR_DMA_TR); | |
1778 | ||
1779 | /* Enable DMA and Burst Mode */ | |
1780 | // switch_bank(iobase, BANK1); | |
1781 | outb(CR_DMA_EN | CR_DMA_BURST, iobase+FIR_CR); | |
1782 | ||
1783 | switch_bank(iobase, BANK0); | |
a97a6f10 | 1784 | IRDA_DEBUG(1, "%s(), ----------------- End ------------------\n", __func__ ); |
1da177e4 LT |
1785 | return 0; |
1786 | } | |
1787 | ||
1788 | static int ali_ircc_dma_receive_complete(struct ali_ircc_cb *self) | |
1789 | { | |
1790 | struct st_fifo *st_fifo; | |
1791 | struct sk_buff *skb; | |
1792 | __u8 status, MessageCount; | |
1793 | int len, i, iobase, val; | |
1794 | ||
a97a6f10 | 1795 | IRDA_DEBUG(1, "%s(), ---------------- Start -----------------\n", __func__ ); |
1da177e4 LT |
1796 | |
1797 | st_fifo = &self->st_fifo; | |
1798 | iobase = self->io.fir_base; | |
1799 | ||
1800 | switch_bank(iobase, BANK0); | |
1801 | MessageCount = inb(iobase+ FIR_LSR)&0x07; | |
1802 | ||
1803 | if (MessageCount > 0) | |
70f23fd6 | 1804 | IRDA_DEBUG(0, "%s(), Message count = %d,\n", __func__ , MessageCount); |
1da177e4 LT |
1805 | |
1806 | for (i=0; i<=MessageCount; i++) | |
1807 | { | |
1808 | /* Bank 0 */ | |
1809 | switch_bank(iobase, BANK0); | |
1810 | status = inb(iobase+FIR_LSR); | |
1811 | ||
1812 | switch_bank(iobase, BANK2); | |
1813 | len = inb(iobase+FIR_RX_DSR_HI) & 0x0f; | |
1814 | len = len << 8; | |
1815 | len |= inb(iobase+FIR_RX_DSR_LO); | |
1816 | ||
a97a6f10 HH |
1817 | IRDA_DEBUG(1, "%s(), RX Length = 0x%.2x,\n", __func__ , len); |
1818 | IRDA_DEBUG(1, "%s(), RX Status = 0x%.2x,\n", __func__ , status); | |
1da177e4 LT |
1819 | |
1820 | if (st_fifo->tail >= MAX_RX_WINDOW) { | |
a97a6f10 | 1821 | IRDA_DEBUG(0, "%s(), window is full!\n", __func__ ); |
1da177e4 LT |
1822 | continue; |
1823 | } | |
1824 | ||
1825 | st_fifo->entries[st_fifo->tail].status = status; | |
1826 | st_fifo->entries[st_fifo->tail].len = len; | |
1827 | st_fifo->pending_bytes += len; | |
1828 | st_fifo->tail++; | |
1829 | st_fifo->len++; | |
1830 | } | |
1831 | ||
1832 | for (i=0; i<=MessageCount; i++) | |
1833 | { | |
1834 | /* Get first entry */ | |
1835 | status = st_fifo->entries[st_fifo->head].status; | |
1836 | len = st_fifo->entries[st_fifo->head].len; | |
1837 | st_fifo->pending_bytes -= len; | |
1838 | st_fifo->head++; | |
1839 | st_fifo->len--; | |
1840 | ||
1841 | /* Check for errors */ | |
1842 | if ((status & 0xd8) || self->rcvFramesOverflow || (len==0)) | |
1843 | { | |
19299b34 | 1844 | IRDA_DEBUG(0,"%s(), ************* RX Errors ************\n", __func__ ); |
1da177e4 LT |
1845 | |
1846 | /* Skip frame */ | |
af049081 | 1847 | self->netdev->stats.rx_errors++; |
1da177e4 LT |
1848 | |
1849 | self->rx_buff.data += len; | |
1850 | ||
1851 | if (status & LSR_FIFO_UR) | |
1852 | { | |
af049081 | 1853 | self->netdev->stats.rx_frame_errors++; |
19299b34 | 1854 | IRDA_DEBUG(0,"%s(), ************* FIFO Errors ************\n", __func__ ); |
1da177e4 LT |
1855 | } |
1856 | if (status & LSR_FRAME_ERROR) | |
1857 | { | |
af049081 | 1858 | self->netdev->stats.rx_frame_errors++; |
19299b34 | 1859 | IRDA_DEBUG(0,"%s(), ************* FRAME Errors ************\n", __func__ ); |
1da177e4 LT |
1860 | } |
1861 | ||
1862 | if (status & LSR_CRC_ERROR) | |
1863 | { | |
af049081 | 1864 | self->netdev->stats.rx_crc_errors++; |
19299b34 | 1865 | IRDA_DEBUG(0,"%s(), ************* CRC Errors ************\n", __func__ ); |
1da177e4 LT |
1866 | } |
1867 | ||
1868 | if(self->rcvFramesOverflow) | |
1869 | { | |
af049081 | 1870 | self->netdev->stats.rx_frame_errors++; |
19299b34 | 1871 | IRDA_DEBUG(0,"%s(), ************* Overran DMA buffer ************\n", __func__ ); |
1da177e4 LT |
1872 | } |
1873 | if(len == 0) | |
1874 | { | |
af049081 | 1875 | self->netdev->stats.rx_frame_errors++; |
19299b34 | 1876 | IRDA_DEBUG(0,"%s(), ********** Receive Frame Size = 0 *********\n", __func__ ); |
1da177e4 LT |
1877 | } |
1878 | } | |
1879 | else | |
1880 | { | |
1881 | ||
1882 | if (st_fifo->pending_bytes < 32) | |
1883 | { | |
1884 | switch_bank(iobase, BANK0); | |
1885 | val = inb(iobase+FIR_BSR); | |
1886 | if ((val& BSR_FIFO_NOT_EMPTY)== 0x80) | |
1887 | { | |
19299b34 | 1888 | IRDA_DEBUG(0, "%s(), ************* BSR_FIFO_NOT_EMPTY ************\n", __func__ ); |
1da177e4 LT |
1889 | |
1890 | /* Put this entry back in fifo */ | |
1891 | st_fifo->head--; | |
1892 | st_fifo->len++; | |
1893 | st_fifo->pending_bytes += len; | |
1894 | st_fifo->entries[st_fifo->head].status = status; | |
1895 | st_fifo->entries[st_fifo->head].len = len; | |
1896 | ||
1897 | /* | |
1898 | * DMA not finished yet, so try again | |
1899 | * later, set timer value, resolution | |
1900 | * 500 us | |
1901 | */ | |
1902 | ||
1903 | switch_bank(iobase, BANK1); | |
1904 | outb(TIMER_IIR_500, iobase+FIR_TIMER_IIR); // 2001/1/2 05:07PM | |
1905 | ||
1906 | /* Enable Timer */ | |
1907 | outb(inb(iobase+FIR_CR) | CR_TIMER_EN, iobase+FIR_CR); | |
1908 | ||
1909 | return FALSE; /* I'll be back! */ | |
1910 | } | |
1911 | } | |
1912 | ||
1913 | /* | |
1914 | * Remember the time we received this frame, so we can | |
1915 | * reduce the min turn time a bit since we will know | |
1916 | * how much time we have used for protocol processing | |
1917 | */ | |
1918 | do_gettimeofday(&self->stamp); | |
1919 | ||
1920 | skb = dev_alloc_skb(len+1); | |
1921 | if (skb == NULL) | |
1922 | { | |
1923 | IRDA_WARNING("%s(), memory squeeze, " | |
1924 | "dropping frame.\n", | |
a97a6f10 | 1925 | __func__); |
af049081 | 1926 | self->netdev->stats.rx_dropped++; |
1da177e4 LT |
1927 | |
1928 | return FALSE; | |
1929 | } | |
1930 | ||
1931 | /* Make sure IP header gets aligned */ | |
1932 | skb_reserve(skb, 1); | |
1933 | ||
1934 | /* Copy frame without CRC, CRC is removed by hardware*/ | |
1935 | skb_put(skb, len); | |
27d7ff46 | 1936 | skb_copy_to_linear_data(skb, self->rx_buff.data, len); |
1da177e4 LT |
1937 | |
1938 | /* Move to next frame */ | |
1939 | self->rx_buff.data += len; | |
af049081 SH |
1940 | self->netdev->stats.rx_bytes += len; |
1941 | self->netdev->stats.rx_packets++; | |
1da177e4 LT |
1942 | |
1943 | skb->dev = self->netdev; | |
459a98ed | 1944 | skb_reset_mac_header(skb); |
1da177e4 LT |
1945 | skb->protocol = htons(ETH_P_IRDA); |
1946 | netif_rx(skb); | |
1da177e4 LT |
1947 | } |
1948 | } | |
1949 | ||
1950 | switch_bank(iobase, BANK0); | |
1951 | ||
a97a6f10 | 1952 | IRDA_DEBUG(1, "%s(), ----------------- End ------------------\n", __func__ ); |
1da177e4 LT |
1953 | return TRUE; |
1954 | } | |
1955 | ||
1956 | ||
1957 | ||
1958 | /* | |
1959 | * Function ali_ircc_sir_hard_xmit (skb, dev) | |
1960 | * | |
1961 | * Transmit the frame! | |
1962 | * | |
1963 | */ | |
6518bbb8 SH |
1964 | static netdev_tx_t ali_ircc_sir_hard_xmit(struct sk_buff *skb, |
1965 | struct net_device *dev) | |
1da177e4 LT |
1966 | { |
1967 | struct ali_ircc_cb *self; | |
1968 | unsigned long flags; | |
1969 | int iobase; | |
1970 | __u32 speed; | |
1971 | ||
a97a6f10 | 1972 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__ ); |
1da177e4 | 1973 | |
ec634fe3 | 1974 | IRDA_ASSERT(dev != NULL, return NETDEV_TX_OK;); |
1da177e4 | 1975 | |
4cf1653a | 1976 | self = netdev_priv(dev); |
ec634fe3 | 1977 | IRDA_ASSERT(self != NULL, return NETDEV_TX_OK;); |
1da177e4 LT |
1978 | |
1979 | iobase = self->io.sir_base; | |
1980 | ||
1981 | netif_stop_queue(dev); | |
1982 | ||
1983 | /* Make sure tests *& speed change are atomic */ | |
1984 | spin_lock_irqsave(&self->lock, flags); | |
1985 | ||
1986 | /* Note : you should make sure that speed changes are not going | |
1987 | * to corrupt any outgoing frame. Look at nsc-ircc for the gory | |
1988 | * details - Jean II */ | |
1989 | ||
1990 | /* Check if we need to change the speed */ | |
1991 | speed = irda_get_next_speed(skb); | |
1992 | if ((speed != self->io.speed) && (speed != -1)) { | |
1993 | /* Check for empty frame */ | |
1994 | if (!skb->len) { | |
1995 | ali_ircc_change_speed(self, speed); | |
1996 | dev->trans_start = jiffies; | |
1997 | spin_unlock_irqrestore(&self->lock, flags); | |
1998 | dev_kfree_skb(skb); | |
6ed10654 | 1999 | return NETDEV_TX_OK; |
1da177e4 LT |
2000 | } else |
2001 | self->new_speed = speed; | |
2002 | } | |
2003 | ||
2004 | /* Init tx buffer */ | |
2005 | self->tx_buff.data = self->tx_buff.head; | |
2006 | ||
2007 | /* Copy skb to tx_buff while wrapping, stuffing and making CRC */ | |
2008 | self->tx_buff.len = async_wrap_skb(skb, self->tx_buff.data, | |
2009 | self->tx_buff.truesize); | |
2010 | ||
af049081 | 2011 | self->netdev->stats.tx_bytes += self->tx_buff.len; |
1da177e4 LT |
2012 | |
2013 | /* Turn on transmit finished interrupt. Will fire immediately! */ | |
2014 | outb(UART_IER_THRI, iobase+UART_IER); | |
2015 | ||
2016 | dev->trans_start = jiffies; | |
2017 | spin_unlock_irqrestore(&self->lock, flags); | |
2018 | ||
2019 | dev_kfree_skb(skb); | |
2020 | ||
a97a6f10 | 2021 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__ ); |
1da177e4 | 2022 | |
6ed10654 | 2023 | return NETDEV_TX_OK; |
1da177e4 LT |
2024 | } |
2025 | ||
2026 | ||
2027 | /* | |
2028 | * Function ali_ircc_net_ioctl (dev, rq, cmd) | |
2029 | * | |
2030 | * Process IOCTL commands for this device | |
2031 | * | |
2032 | */ | |
2033 | static int ali_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) | |
2034 | { | |
2035 | struct if_irda_req *irq = (struct if_irda_req *) rq; | |
2036 | struct ali_ircc_cb *self; | |
2037 | unsigned long flags; | |
2038 | int ret = 0; | |
2039 | ||
a97a6f10 | 2040 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__ ); |
1da177e4 LT |
2041 | |
2042 | IRDA_ASSERT(dev != NULL, return -1;); | |
2043 | ||
4cf1653a | 2044 | self = netdev_priv(dev); |
1da177e4 LT |
2045 | |
2046 | IRDA_ASSERT(self != NULL, return -1;); | |
2047 | ||
a97a6f10 | 2048 | IRDA_DEBUG(2, "%s(), %s, (cmd=0x%X)\n", __func__ , dev->name, cmd); |
1da177e4 LT |
2049 | |
2050 | switch (cmd) { | |
2051 | case SIOCSBANDWIDTH: /* Set bandwidth */ | |
a97a6f10 | 2052 | IRDA_DEBUG(1, "%s(), SIOCSBANDWIDTH\n", __func__ ); |
1da177e4 LT |
2053 | /* |
2054 | * This function will also be used by IrLAP to change the | |
2055 | * speed, so we still must allow for speed change within | |
2056 | * interrupt context. | |
2057 | */ | |
2058 | if (!in_interrupt() && !capable(CAP_NET_ADMIN)) | |
2059 | return -EPERM; | |
2060 | ||
2061 | spin_lock_irqsave(&self->lock, flags); | |
2062 | ali_ircc_change_speed(self, irq->ifr_baudrate); | |
2063 | spin_unlock_irqrestore(&self->lock, flags); | |
2064 | break; | |
2065 | case SIOCSMEDIABUSY: /* Set media busy */ | |
a97a6f10 | 2066 | IRDA_DEBUG(1, "%s(), SIOCSMEDIABUSY\n", __func__ ); |
1da177e4 LT |
2067 | if (!capable(CAP_NET_ADMIN)) |
2068 | return -EPERM; | |
2069 | irda_device_set_media_busy(self->netdev, TRUE); | |
2070 | break; | |
2071 | case SIOCGRECEIVING: /* Check if we are receiving right now */ | |
a97a6f10 | 2072 | IRDA_DEBUG(2, "%s(), SIOCGRECEIVING\n", __func__ ); |
1da177e4 LT |
2073 | /* This is protected */ |
2074 | irq->ifr_receiving = ali_ircc_is_receiving(self); | |
2075 | break; | |
2076 | default: | |
2077 | ret = -EOPNOTSUPP; | |
2078 | } | |
2079 | ||
a97a6f10 | 2080 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__ ); |
1da177e4 LT |
2081 | |
2082 | return ret; | |
2083 | } | |
2084 | ||
2085 | /* | |
2086 | * Function ali_ircc_is_receiving (self) | |
2087 | * | |
2088 | * Return TRUE is we are currently receiving a frame | |
2089 | * | |
2090 | */ | |
2091 | static int ali_ircc_is_receiving(struct ali_ircc_cb *self) | |
2092 | { | |
2093 | unsigned long flags; | |
2094 | int status = FALSE; | |
2095 | int iobase; | |
2096 | ||
a97a6f10 | 2097 | IRDA_DEBUG(2, "%s(), ---------------- Start -----------------\n", __func__ ); |
1da177e4 LT |
2098 | |
2099 | IRDA_ASSERT(self != NULL, return FALSE;); | |
2100 | ||
2101 | spin_lock_irqsave(&self->lock, flags); | |
2102 | ||
2103 | if (self->io.speed > 115200) | |
2104 | { | |
2105 | iobase = self->io.fir_base; | |
2106 | ||
2107 | switch_bank(iobase, BANK1); | |
2108 | if((inb(iobase+FIR_FIFO_FR) & 0x3f) != 0) | |
2109 | { | |
2110 | /* We are receiving something */ | |
a97a6f10 | 2111 | IRDA_DEBUG(1, "%s(), We are receiving something\n", __func__ ); |
1da177e4 LT |
2112 | status = TRUE; |
2113 | } | |
2114 | switch_bank(iobase, BANK0); | |
2115 | } | |
2116 | else | |
2117 | { | |
2118 | status = (self->rx_buff.state != OUTSIDE_FRAME); | |
2119 | } | |
2120 | ||
2121 | spin_unlock_irqrestore(&self->lock, flags); | |
2122 | ||
a97a6f10 | 2123 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__ ); |
1da177e4 LT |
2124 | |
2125 | return status; | |
2126 | } | |
2127 | ||
898b1d16 | 2128 | static int ali_ircc_suspend(struct platform_device *dev, pm_message_t state) |
1da177e4 | 2129 | { |
898b1d16 | 2130 | struct ali_ircc_cb *self = platform_get_drvdata(dev); |
1da177e4 | 2131 | |
898b1d16 | 2132 | IRDA_MESSAGE("%s, Suspending\n", ALI_IRCC_DRIVER_NAME); |
1da177e4 LT |
2133 | |
2134 | if (self->io.suspended) | |
898b1d16 | 2135 | return 0; |
1da177e4 LT |
2136 | |
2137 | ali_ircc_net_close(self->netdev); | |
2138 | ||
2139 | self->io.suspended = 1; | |
2140 | ||
898b1d16 | 2141 | return 0; |
1da177e4 LT |
2142 | } |
2143 | ||
898b1d16 | 2144 | static int ali_ircc_resume(struct platform_device *dev) |
1da177e4 | 2145 | { |
898b1d16 | 2146 | struct ali_ircc_cb *self = platform_get_drvdata(dev); |
1da177e4 LT |
2147 | |
2148 | if (!self->io.suspended) | |
898b1d16 | 2149 | return 0; |
1da177e4 LT |
2150 | |
2151 | ali_ircc_net_open(self->netdev); | |
2152 | ||
898b1d16 | 2153 | IRDA_MESSAGE("%s, Waking up\n", ALI_IRCC_DRIVER_NAME); |
1da177e4 LT |
2154 | |
2155 | self->io.suspended = 0; | |
1da177e4 | 2156 | |
1da177e4 LT |
2157 | return 0; |
2158 | } | |
2159 | ||
1da177e4 LT |
2160 | /* ALi Chip Function */ |
2161 | ||
2162 | static void SetCOMInterrupts(struct ali_ircc_cb *self , unsigned char enable) | |
2163 | { | |
2164 | ||
2165 | unsigned char newMask; | |
2166 | ||
2167 | int iobase = self->io.fir_base; /* or sir_base */ | |
2168 | ||
a97a6f10 | 2169 | IRDA_DEBUG(2, "%s(), -------- Start -------- ( Enable = %d )\n", __func__ , enable); |
1da177e4 LT |
2170 | |
2171 | /* Enable the interrupt which we wish to */ | |
2172 | if (enable){ | |
2173 | if (self->io.direction == IO_XMIT) | |
2174 | { | |
2175 | if (self->io.speed > 115200) /* FIR, MIR */ | |
2176 | { | |
2177 | newMask = self->ier; | |
2178 | } | |
2179 | else /* SIR */ | |
2180 | { | |
2181 | newMask = UART_IER_THRI | UART_IER_RDI; | |
2182 | } | |
2183 | } | |
2184 | else { | |
2185 | if (self->io.speed > 115200) /* FIR, MIR */ | |
2186 | { | |
2187 | newMask = self->ier; | |
2188 | } | |
2189 | else /* SIR */ | |
2190 | { | |
2191 | newMask = UART_IER_RDI; | |
2192 | } | |
2193 | } | |
2194 | } | |
2195 | else /* Disable all the interrupts */ | |
2196 | { | |
2197 | newMask = 0x00; | |
2198 | ||
2199 | } | |
2200 | ||
2201 | //SIR and FIR has different registers | |
2202 | if (self->io.speed > 115200) | |
2203 | { | |
2204 | switch_bank(iobase, BANK0); | |
2205 | outb(newMask, iobase+FIR_IER); | |
2206 | } | |
2207 | else | |
2208 | outb(newMask, iobase+UART_IER); | |
2209 | ||
a97a6f10 | 2210 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__ ); |
1da177e4 LT |
2211 | } |
2212 | ||
2213 | static void SIR2FIR(int iobase) | |
2214 | { | |
2215 | //unsigned char tmp; | |
2216 | ||
a97a6f10 | 2217 | IRDA_DEBUG(1, "%s(), ---------------- Start ----------------\n", __func__ ); |
1da177e4 LT |
2218 | |
2219 | /* Already protected (change_speed() or setup()), no need to lock. | |
2220 | * Jean II */ | |
2221 | ||
2222 | outb(0x28, iobase+UART_MCR); | |
2223 | outb(0x68, iobase+UART_MCR); | |
2224 | outb(0x88, iobase+UART_MCR); | |
2225 | ||
2226 | outb(0x60, iobase+FIR_MCR); /* Master Reset */ | |
2227 | outb(0x20, iobase+FIR_MCR); /* Master Interrupt Enable */ | |
2228 | ||
2229 | //tmp = inb(iobase+FIR_LCR_B); /* SIP enable */ | |
2230 | //tmp |= 0x20; | |
2231 | //outb(tmp, iobase+FIR_LCR_B); | |
2232 | ||
a97a6f10 | 2233 | IRDA_DEBUG(1, "%s(), ----------------- End ------------------\n", __func__ ); |
1da177e4 LT |
2234 | } |
2235 | ||
2236 | static void FIR2SIR(int iobase) | |
2237 | { | |
2238 | unsigned char val; | |
2239 | ||
a97a6f10 | 2240 | IRDA_DEBUG(1, "%s(), ---------------- Start ----------------\n", __func__ ); |
1da177e4 LT |
2241 | |
2242 | /* Already protected (change_speed() or setup()), no need to lock. | |
2243 | * Jean II */ | |
2244 | ||
2245 | outb(0x20, iobase+FIR_MCR); /* IRQ to low */ | |
2246 | outb(0x00, iobase+UART_IER); | |
2247 | ||
2248 | outb(0xA0, iobase+FIR_MCR); /* Don't set master reset */ | |
2249 | outb(0x00, iobase+UART_FCR); | |
2250 | outb(0x07, iobase+UART_FCR); | |
2251 | ||
2252 | val = inb(iobase+UART_RX); | |
2253 | val = inb(iobase+UART_LSR); | |
2254 | val = inb(iobase+UART_MSR); | |
2255 | ||
a97a6f10 | 2256 | IRDA_DEBUG(1, "%s(), ----------------- End ------------------\n", __func__ ); |
1da177e4 LT |
2257 | } |
2258 | ||
2259 | MODULE_AUTHOR("Benjamin Kong <benjamin_kong@ali.com.tw>"); | |
2260 | MODULE_DESCRIPTION("ALi FIR Controller Driver"); | |
2261 | MODULE_LICENSE("GPL"); | |
72abb461 | 2262 | MODULE_ALIAS("platform:" ALI_IRCC_DRIVER_NAME); |
1da177e4 LT |
2263 | |
2264 | ||
2265 | module_param_array(io, int, NULL, 0); | |
2266 | MODULE_PARM_DESC(io, "Base I/O addresses"); | |
2267 | module_param_array(irq, int, NULL, 0); | |
2268 | MODULE_PARM_DESC(irq, "IRQ lines"); | |
2269 | module_param_array(dma, int, NULL, 0); | |
2270 | MODULE_PARM_DESC(dma, "DMA channels"); | |
2271 | ||
2272 | module_init(ali_ircc_init); | |
2273 | module_exit(ali_ircc_cleanup); |