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2b9feef2 AE |
1 | // SPDX-License-Identifier: GPL-2.0 |
2 | ||
3 | /* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved. | |
a266ad6b | 4 | * Copyright (C) 2018-2021 Linaro Ltd. |
2b9feef2 AE |
5 | */ |
6 | ||
7 | #include <linux/types.h> | |
8 | #include <linux/kernel.h> | |
9 | #include <linux/bits.h> | |
10 | #include <linux/bitops.h> | |
11 | #include <linux/bitfield.h> | |
12 | #include <linux/io.h> | |
13 | #include <linux/build_bug.h> | |
14 | #include <linux/device.h> | |
15 | #include <linux/dma-mapping.h> | |
16 | ||
17 | #include "ipa.h" | |
18 | #include "ipa_version.h" | |
19 | #include "ipa_endpoint.h" | |
20 | #include "ipa_table.h" | |
21 | #include "ipa_reg.h" | |
22 | #include "ipa_mem.h" | |
23 | #include "ipa_cmd.h" | |
24 | #include "gsi.h" | |
25 | #include "gsi_trans.h" | |
26 | ||
27 | /** | |
28 | * DOC: IPA Filter and Route Tables | |
29 | * | |
4ea29143 AE |
30 | * The IPA has tables defined in its local (IPA-resident) memory that define |
31 | * filter and routing rules. An entry in either of these tables is a little | |
32 | * endian 64-bit "slot" that holds the address of a rule definition. (The | |
33 | * size of these slots is 64 bits regardless of the host DMA address size.) | |
34 | * | |
35 | * Separate tables (both filter and route) used for IPv4 and IPv6. There | |
36 | * are normally another set of "hashed" filter and route tables, which are | |
37 | * used with a hash of message metadata. Hashed operation is not supported | |
38 | * by all IPA hardware (IPA v4.2 doesn't support hashed tables). | |
39 | * | |
40 | * Rules can be in local memory or in DRAM (system memory). The offset of | |
41 | * an object (such as a route or filter table) in IPA-resident memory must | |
42 | * 128-byte aligned. An object in system memory (such as a route or filter | |
43 | * rule) must be at an 8-byte aligned address. We currently only place | |
44 | * route or filter rules in system memory. | |
45 | * | |
2b9feef2 AE |
46 | * A rule consists of a contiguous block of 32-bit values terminated with |
47 | * 32 zero bits. A special "zero entry" rule consisting of 64 zero bits | |
48 | * represents "no filtering" or "no routing," and is the reset value for | |
4ea29143 | 49 | * filter or route table rules. |
2b9feef2 AE |
50 | * |
51 | * Each filter rule is associated with an AP or modem TX endpoint, though | |
4ea29143 | 52 | * not all TX endpoints support filtering. The first 64-bit slot in a |
2b9feef2 AE |
53 | * filter table is a bitmap indicating which endpoints have entries in |
54 | * the table. The low-order bit (bit 0) in this bitmap represents a | |
55 | * special global filter, which applies to all traffic. This is not | |
56 | * used in the current code. Bit 1, if set, indicates that there is an | |
4ea29143 AE |
57 | * entry (i.e. slot containing a system address referring to a rule) for |
58 | * endpoint 0 in the table. Bit 3, if set, indicates there is an entry | |
59 | * for endpoint 2, and so on. Space is set aside in IPA local memory to | |
60 | * hold as many filter table entries as might be required, but typically | |
61 | * they are not all used. | |
2b9feef2 AE |
62 | * |
63 | * The AP initializes all entries in a filter table to refer to a "zero" | |
64 | * entry. Once initialized the modem and AP update the entries for | |
65 | * endpoints they "own" directly. Currently the AP does not use the | |
66 | * IPA filtering functionality. | |
67 | * | |
68 | * IPA Filter Table | |
69 | * ---------------------- | |
70 | * endpoint bitmap | 0x0000000000000048 | Bits 3 and 6 set (endpoints 2 and 5) | |
71 | * |--------------------| | |
72 | * 1st endpoint | 0x000123456789abc0 | DMA address for modem endpoint 2 rule | |
73 | * |--------------------| | |
74 | * 2nd endpoint | 0x000123456789abf0 | DMA address for AP endpoint 5 rule | |
75 | * |--------------------| | |
76 | * (unused) | | (Unused space in filter table) | |
77 | * |--------------------| | |
78 | * . . . | |
79 | * |--------------------| | |
80 | * (unused) | | (Unused space in filter table) | |
81 | * ---------------------- | |
82 | * | |
83 | * The set of available route rules is divided about equally between the AP | |
84 | * and modem. The AP initializes all entries in a route table to refer to | |
85 | * a "zero entry". Once initialized, the modem and AP are responsible for | |
86 | * updating their own entries. All entries in a route table are usable, | |
87 | * though the AP currently does not use the IPA routing functionality. | |
88 | * | |
89 | * IPA Route Table | |
90 | * ---------------------- | |
91 | * 1st modem route | 0x0001234500001100 | DMA address for first route rule | |
92 | * |--------------------| | |
93 | * 2nd modem route | 0x0001234500001140 | DMA address for second route rule | |
94 | * |--------------------| | |
95 | * . . . | |
96 | * |--------------------| | |
97 | * Last modem route| 0x0001234500002280 | DMA address for Nth route rule | |
98 | * |--------------------| | |
99 | * 1st AP route | 0x0001234500001100 | DMA address for route rule (N+1) | |
100 | * |--------------------| | |
101 | * 2nd AP route | 0x0001234500001140 | DMA address for next route rule | |
102 | * |--------------------| | |
103 | * . . . | |
104 | * |--------------------| | |
105 | * Last AP route | 0x0001234500002280 | DMA address for last route rule | |
106 | * ---------------------- | |
107 | */ | |
108 | ||
2b9feef2 AE |
109 | /* Assignment of route table entries to the modem and AP */ |
110 | #define IPA_ROUTE_MODEM_MIN 0 | |
111 | #define IPA_ROUTE_MODEM_COUNT 8 | |
112 | ||
113 | #define IPA_ROUTE_AP_MIN IPA_ROUTE_MODEM_COUNT | |
114 | #define IPA_ROUTE_AP_COUNT \ | |
115 | (IPA_ROUTE_COUNT_MAX - IPA_ROUTE_MODEM_COUNT) | |
116 | ||
117 | /* Filter or route rules consist of a set of 32-bit values followed by a | |
118 | * 32-bit all-zero rule list terminator. The "zero rule" is simply an | |
119 | * all-zero rule followed by the list terminator. | |
120 | */ | |
121 | #define IPA_ZERO_RULE_SIZE (2 * sizeof(__le32)) | |
122 | ||
2b9feef2 AE |
123 | /* Check things that can be validated at build time. */ |
124 | static void ipa_table_validate_build(void) | |
125 | { | |
d2fd2311 AE |
126 | /* Filter and route tables contain DMA addresses that refer |
127 | * to filter or route rules. But the size of a table entry | |
128 | * is 64 bits regardless of what the size of an AP DMA address | |
129 | * is. A fixed constant defines the size of an entry, and | |
130 | * code in ipa_table_init() uses a pointer to __le64 to | |
131 | * initialize tables. | |
2b9feef2 | 132 | */ |
4ea29143 | 133 | BUILD_BUG_ON(sizeof(dma_addr_t) > sizeof(__le64)); |
2b9feef2 AE |
134 | |
135 | /* A "zero rule" is used to represent no filtering or no routing. | |
136 | * It is a 64-bit block of zeroed memory. Code in ipa_table_init() | |
137 | * assumes that it can be written using a pointer to __le64. | |
138 | */ | |
139 | BUILD_BUG_ON(IPA_ZERO_RULE_SIZE != sizeof(__le64)); | |
140 | ||
141 | /* Impose a practical limit on the number of routes */ | |
142 | BUILD_BUG_ON(IPA_ROUTE_COUNT_MAX > 32); | |
143 | /* The modem must be allotted at least one route table entry */ | |
144 | BUILD_BUG_ON(!IPA_ROUTE_MODEM_COUNT); | |
145 | /* But it can't have more than what is available */ | |
146 | BUILD_BUG_ON(IPA_ROUTE_MODEM_COUNT > IPA_ROUTE_COUNT_MAX); | |
147 | ||
148 | } | |
149 | ||
150 | static bool | |
e9f5b276 | 151 | ipa_table_valid_one(struct ipa *ipa, enum ipa_mem_id mem_id, bool route) |
2b9feef2 | 152 | { |
5e3bc1e5 | 153 | const struct ipa_mem *mem = ipa_mem_find(ipa, mem_id); |
2b9feef2 | 154 | struct device *dev = &ipa->pdev->dev; |
2b9feef2 AE |
155 | u32 size; |
156 | ||
e9f5b276 | 157 | if (route) |
4ea29143 | 158 | size = IPA_ROUTE_COUNT_MAX * sizeof(__le64); |
e9f5b276 | 159 | else |
4ea29143 | 160 | size = (1 + IPA_FILTER_COUNT_MAX) * sizeof(__le64); |
2b9feef2 | 161 | |
f2c1dac0 | 162 | if (!ipa_cmd_table_valid(ipa, mem, route)) |
2b9feef2 AE |
163 | return false; |
164 | ||
165 | /* mem->size >= size is sufficient, but we'll demand more */ | |
166 | if (mem->size == size) | |
167 | return true; | |
168 | ||
169 | /* Hashed table regions can be zero size if hashing is not supported */ | |
546948bf | 170 | if (ipa_table_hash_support(ipa) && !mem->size) |
2b9feef2 AE |
171 | return true; |
172 | ||
e9f5b276 AE |
173 | dev_err(dev, "%s table region %u size 0x%02x, expected 0x%02x\n", |
174 | route ? "route" : "filter", mem_id, mem->size, size); | |
2b9feef2 AE |
175 | |
176 | return false; | |
177 | } | |
178 | ||
179 | /* Verify the filter and route table memory regions are the expected size */ | |
180 | bool ipa_table_valid(struct ipa *ipa) | |
181 | { | |
e9f5b276 AE |
182 | bool valid; |
183 | ||
546948bf AE |
184 | valid = ipa_table_valid_one(ipa, IPA_MEM_V4_FILTER, false); |
185 | valid = valid && ipa_table_valid_one(ipa, IPA_MEM_V6_FILTER, false); | |
186 | valid = valid && ipa_table_valid_one(ipa, IPA_MEM_V4_ROUTE, true); | |
187 | valid = valid && ipa_table_valid_one(ipa, IPA_MEM_V6_ROUTE, true); | |
188 | ||
189 | if (!ipa_table_hash_support(ipa)) | |
190 | return valid; | |
191 | ||
192 | valid = valid && ipa_table_valid_one(ipa, IPA_MEM_V4_FILTER_HASHED, | |
193 | false); | |
194 | valid = valid && ipa_table_valid_one(ipa, IPA_MEM_V6_FILTER_HASHED, | |
195 | false); | |
196 | valid = valid && ipa_table_valid_one(ipa, IPA_MEM_V4_ROUTE_HASHED, | |
197 | true); | |
198 | valid = valid && ipa_table_valid_one(ipa, IPA_MEM_V6_ROUTE_HASHED, | |
199 | true); | |
2b9feef2 AE |
200 | |
201 | return valid; | |
202 | } | |
203 | ||
204 | bool ipa_filter_map_valid(struct ipa *ipa, u32 filter_map) | |
205 | { | |
206 | struct device *dev = &ipa->pdev->dev; | |
207 | u32 count; | |
208 | ||
209 | if (!filter_map) { | |
210 | dev_err(dev, "at least one filtering endpoint is required\n"); | |
211 | ||
212 | return false; | |
213 | } | |
214 | ||
215 | count = hweight32(filter_map); | |
216 | if (count > IPA_FILTER_COUNT_MAX) { | |
217 | dev_err(dev, "too many filtering endpoints (%u, max %u)\n", | |
218 | count, IPA_FILTER_COUNT_MAX); | |
219 | ||
220 | return false; | |
221 | } | |
222 | ||
223 | return true; | |
224 | } | |
225 | ||
2b9feef2 AE |
226 | /* Zero entry count means no table, so just return a 0 address */ |
227 | static dma_addr_t ipa_table_addr(struct ipa *ipa, bool filter_mask, u16 count) | |
228 | { | |
229 | u32 skip; | |
230 | ||
231 | if (!count) | |
232 | return 0; | |
233 | ||
5bc55884 | 234 | WARN_ON(count > max_t(u32, IPA_FILTER_COUNT_MAX, IPA_ROUTE_COUNT_MAX)); |
2b9feef2 AE |
235 | |
236 | /* Skip over the zero rule and possibly the filter mask */ | |
237 | skip = filter_mask ? 1 : 2; | |
238 | ||
239 | return ipa->table_addr + skip * sizeof(*ipa->table_virt); | |
240 | } | |
241 | ||
242 | static void ipa_table_reset_add(struct gsi_trans *trans, bool filter, | |
25116645 | 243 | u16 first, u16 count, enum ipa_mem_id mem_id) |
2b9feef2 AE |
244 | { |
245 | struct ipa *ipa = container_of(trans->gsi, struct ipa, gsi); | |
5e3bc1e5 | 246 | const struct ipa_mem *mem = ipa_mem_find(ipa, mem_id); |
2b9feef2 AE |
247 | dma_addr_t addr; |
248 | u32 offset; | |
249 | u16 size; | |
250 | ||
25116645 | 251 | /* Nothing to do if the table memory region is empty */ |
2b9feef2 AE |
252 | if (!mem->size) |
253 | return; | |
254 | ||
255 | if (filter) | |
256 | first++; /* skip over bitmap */ | |
257 | ||
4ea29143 AE |
258 | offset = mem->offset + first * sizeof(__le64); |
259 | size = count * sizeof(__le64); | |
2b9feef2 AE |
260 | addr = ipa_table_addr(ipa, false, count); |
261 | ||
262 | ipa_cmd_dma_shared_mem_add(trans, offset, size, addr, true); | |
263 | } | |
264 | ||
265 | /* Reset entries in a single filter table belonging to either the AP or | |
266 | * modem to refer to the zero entry. The memory region supplied will be | |
267 | * for the IPv4 and IPv6 non-hashed and hashed filter tables. | |
268 | */ | |
269 | static int | |
07c525a6 | 270 | ipa_filter_reset_table(struct ipa *ipa, enum ipa_mem_id mem_id, bool modem) |
2b9feef2 AE |
271 | { |
272 | u32 ep_mask = ipa->filter_map; | |
273 | u32 count = hweight32(ep_mask); | |
274 | struct gsi_trans *trans; | |
275 | enum gsi_ee_id ee_id; | |
276 | ||
2b9feef2 AE |
277 | trans = ipa_cmd_trans_alloc(ipa, count); |
278 | if (!trans) { | |
279 | dev_err(&ipa->pdev->dev, | |
280 | "no transaction for %s filter reset\n", | |
281 | modem ? "modem" : "AP"); | |
282 | return -EBUSY; | |
283 | } | |
284 | ||
285 | ee_id = modem ? GSI_EE_MODEM : GSI_EE_AP; | |
286 | while (ep_mask) { | |
287 | u32 endpoint_id = __ffs(ep_mask); | |
288 | struct ipa_endpoint *endpoint; | |
289 | ||
290 | ep_mask ^= BIT(endpoint_id); | |
291 | ||
292 | endpoint = &ipa->endpoint[endpoint_id]; | |
293 | if (endpoint->ee_id != ee_id) | |
294 | continue; | |
295 | ||
25116645 | 296 | ipa_table_reset_add(trans, true, endpoint_id, 1, mem_id); |
2b9feef2 AE |
297 | } |
298 | ||
299 | gsi_trans_commit_wait(trans); | |
300 | ||
301 | return 0; | |
302 | } | |
303 | ||
304 | /* Theoretically, each filter table could have more filter slots to | |
305 | * update than the maximum number of commands in a transaction. So | |
306 | * we do each table separately. | |
307 | */ | |
308 | static int ipa_filter_reset(struct ipa *ipa, bool modem) | |
309 | { | |
310 | int ret; | |
311 | ||
07c525a6 | 312 | ret = ipa_filter_reset_table(ipa, IPA_MEM_V4_FILTER, modem); |
2b9feef2 AE |
313 | if (ret) |
314 | return ret; | |
315 | ||
07c525a6 | 316 | ret = ipa_filter_reset_table(ipa, IPA_MEM_V4_FILTER_HASHED, modem); |
2b9feef2 AE |
317 | if (ret) |
318 | return ret; | |
319 | ||
07c525a6 | 320 | ret = ipa_filter_reset_table(ipa, IPA_MEM_V6_FILTER, modem); |
2b9feef2 AE |
321 | if (ret) |
322 | return ret; | |
07c525a6 | 323 | ret = ipa_filter_reset_table(ipa, IPA_MEM_V6_FILTER_HASHED, modem); |
2b9feef2 AE |
324 | |
325 | return ret; | |
326 | } | |
327 | ||
328 | /* The AP routes and modem routes are each contiguous within the | |
329 | * table. We can update each table with a single command, and we | |
330 | * won't exceed the per-transaction command limit. | |
331 | * */ | |
332 | static int ipa_route_reset(struct ipa *ipa, bool modem) | |
333 | { | |
334 | struct gsi_trans *trans; | |
335 | u16 first; | |
336 | u16 count; | |
337 | ||
338 | trans = ipa_cmd_trans_alloc(ipa, 4); | |
339 | if (!trans) { | |
340 | dev_err(&ipa->pdev->dev, | |
341 | "no transaction for %s route reset\n", | |
342 | modem ? "modem" : "AP"); | |
343 | return -EBUSY; | |
344 | } | |
345 | ||
346 | if (modem) { | |
347 | first = IPA_ROUTE_MODEM_MIN; | |
348 | count = IPA_ROUTE_MODEM_COUNT; | |
349 | } else { | |
350 | first = IPA_ROUTE_AP_MIN; | |
351 | count = IPA_ROUTE_AP_COUNT; | |
352 | } | |
353 | ||
25116645 | 354 | ipa_table_reset_add(trans, false, first, count, IPA_MEM_V4_ROUTE); |
2b9feef2 | 355 | ipa_table_reset_add(trans, false, first, count, |
25116645 | 356 | IPA_MEM_V4_ROUTE_HASHED); |
2b9feef2 | 357 | |
25116645 | 358 | ipa_table_reset_add(trans, false, first, count, IPA_MEM_V6_ROUTE); |
2b9feef2 | 359 | ipa_table_reset_add(trans, false, first, count, |
25116645 | 360 | IPA_MEM_V6_ROUTE_HASHED); |
2b9feef2 AE |
361 | |
362 | gsi_trans_commit_wait(trans); | |
363 | ||
364 | return 0; | |
365 | } | |
366 | ||
367 | void ipa_table_reset(struct ipa *ipa, bool modem) | |
368 | { | |
369 | struct device *dev = &ipa->pdev->dev; | |
370 | const char *ee_name; | |
371 | int ret; | |
372 | ||
373 | ee_name = modem ? "modem" : "AP"; | |
374 | ||
375 | /* Report errors, but reset filter and route tables */ | |
376 | ret = ipa_filter_reset(ipa, modem); | |
377 | if (ret) | |
378 | dev_err(dev, "error %d resetting filter table for %s\n", | |
379 | ret, ee_name); | |
380 | ||
381 | ret = ipa_route_reset(ipa, modem); | |
382 | if (ret) | |
383 | dev_err(dev, "error %d resetting route table for %s\n", | |
384 | ret, ee_name); | |
385 | } | |
386 | ||
387 | int ipa_table_hash_flush(struct ipa *ipa) | |
388 | { | |
389 | u32 offset = ipa_reg_filt_rout_hash_flush_offset(ipa->version); | |
390 | struct gsi_trans *trans; | |
391 | u32 val; | |
392 | ||
a266ad6b | 393 | if (!ipa_table_hash_support(ipa)) |
2b9feef2 AE |
394 | return 0; |
395 | ||
396 | trans = ipa_cmd_trans_alloc(ipa, 1); | |
397 | if (!trans) { | |
398 | dev_err(&ipa->pdev->dev, "no transaction for hash flush\n"); | |
399 | return -EBUSY; | |
400 | } | |
401 | ||
4d715380 AE |
402 | val = IPV4_FILTER_HASH_FMASK | IPV6_FILTER_HASH_FMASK; |
403 | val |= IPV6_ROUTER_HASH_FMASK | IPV4_ROUTER_HASH_FMASK; | |
2b9feef2 AE |
404 | |
405 | ipa_cmd_register_write_add(trans, offset, val, val, false); | |
406 | ||
407 | gsi_trans_commit_wait(trans); | |
408 | ||
409 | return 0; | |
410 | } | |
411 | ||
412 | static void ipa_table_init_add(struct gsi_trans *trans, bool filter, | |
413 | enum ipa_cmd_opcode opcode, | |
25116645 AE |
414 | enum ipa_mem_id mem_id, |
415 | enum ipa_mem_id hash_mem_id) | |
2b9feef2 AE |
416 | { |
417 | struct ipa *ipa = container_of(trans->gsi, struct ipa, gsi); | |
5e3bc1e5 AE |
418 | const struct ipa_mem *hash_mem = ipa_mem_find(ipa, hash_mem_id); |
419 | const struct ipa_mem *mem = ipa_mem_find(ipa, mem_id); | |
2b9feef2 AE |
420 | dma_addr_t hash_addr; |
421 | dma_addr_t addr; | |
dc901505 | 422 | u32 zero_offset; |
2b9feef2 | 423 | u16 hash_count; |
dc901505 | 424 | u32 zero_size; |
2b9feef2 AE |
425 | u16 hash_size; |
426 | u16 count; | |
427 | u16 size; | |
428 | ||
dc901505 | 429 | /* Compute the number of table entries to initialize */ |
2b9feef2 | 430 | if (filter) { |
dc901505 AE |
431 | /* The number of filtering endpoints determines number of |
432 | * entries in the filter table; we also add one more "slot" | |
433 | * to hold the bitmap itself. The size of the hashed filter | |
434 | * table is either the same as the non-hashed one, or zero. | |
435 | */ | |
b5c10223 | 436 | count = 1 + hweight32(ipa->filter_map); |
2b9feef2 AE |
437 | hash_count = hash_mem->size ? count : 0; |
438 | } else { | |
dc901505 AE |
439 | /* The size of a route table region determines the number |
440 | * of entries it has. | |
441 | */ | |
4ea29143 AE |
442 | count = mem->size / sizeof(__le64); |
443 | hash_count = hash_mem->size / sizeof(__le64); | |
2b9feef2 | 444 | } |
4ea29143 AE |
445 | size = count * sizeof(__le64); |
446 | hash_size = hash_count * sizeof(__le64); | |
2b9feef2 AE |
447 | |
448 | addr = ipa_table_addr(ipa, filter, count); | |
449 | hash_addr = ipa_table_addr(ipa, filter, hash_count); | |
450 | ||
451 | ipa_cmd_table_init_add(trans, opcode, size, mem->offset, addr, | |
452 | hash_size, hash_mem->offset, hash_addr); | |
dc901505 AE |
453 | if (!filter) |
454 | return; | |
455 | ||
456 | /* Zero the unused space in the filter table */ | |
457 | zero_offset = mem->offset + size; | |
458 | zero_size = mem->size - size; | |
459 | ipa_cmd_dma_shared_mem_add(trans, zero_offset, zero_size, | |
460 | ipa->zero_addr, true); | |
461 | if (!hash_size) | |
462 | return; | |
463 | ||
464 | /* Zero the unused space in the hashed filter table */ | |
465 | zero_offset = hash_mem->offset + hash_size; | |
466 | zero_size = hash_mem->size - hash_size; | |
467 | ipa_cmd_dma_shared_mem_add(trans, zero_offset, zero_size, | |
468 | ipa->zero_addr, true); | |
2b9feef2 AE |
469 | } |
470 | ||
471 | int ipa_table_setup(struct ipa *ipa) | |
472 | { | |
473 | struct gsi_trans *trans; | |
474 | ||
dc901505 AE |
475 | /* We will need at most 8 TREs: |
476 | * - IPv4: | |
477 | * - One for route table initialization (non-hashed and hashed) | |
478 | * - One for filter table initialization (non-hashed and hashed) | |
479 | * - One to zero unused entries in the non-hashed filter table | |
480 | * - One to zero unused entries in the hashed filter table | |
481 | * - IPv6: | |
482 | * - One for route table initialization (non-hashed and hashed) | |
483 | * - One for filter table initialization (non-hashed and hashed) | |
484 | * - One to zero unused entries in the non-hashed filter table | |
485 | * - One to zero unused entries in the hashed filter table | |
486 | * All platforms support at least 8 TREs in a transaction. | |
487 | */ | |
488 | trans = ipa_cmd_trans_alloc(ipa, 8); | |
2b9feef2 AE |
489 | if (!trans) { |
490 | dev_err(&ipa->pdev->dev, "no transaction for table setup\n"); | |
491 | return -EBUSY; | |
492 | } | |
493 | ||
494 | ipa_table_init_add(trans, false, IPA_CMD_IP_V4_ROUTING_INIT, | |
25116645 | 495 | IPA_MEM_V4_ROUTE, IPA_MEM_V4_ROUTE_HASHED); |
2b9feef2 AE |
496 | |
497 | ipa_table_init_add(trans, false, IPA_CMD_IP_V6_ROUTING_INIT, | |
25116645 | 498 | IPA_MEM_V6_ROUTE, IPA_MEM_V6_ROUTE_HASHED); |
2b9feef2 AE |
499 | |
500 | ipa_table_init_add(trans, true, IPA_CMD_IP_V4_FILTER_INIT, | |
25116645 | 501 | IPA_MEM_V4_FILTER, IPA_MEM_V4_FILTER_HASHED); |
2b9feef2 AE |
502 | |
503 | ipa_table_init_add(trans, true, IPA_CMD_IP_V6_FILTER_INIT, | |
25116645 | 504 | IPA_MEM_V6_FILTER, IPA_MEM_V6_FILTER_HASHED); |
2b9feef2 AE |
505 | |
506 | gsi_trans_commit_wait(trans); | |
507 | ||
508 | return 0; | |
509 | } | |
510 | ||
2b9feef2 AE |
511 | /** |
512 | * ipa_filter_tuple_zero() - Zero an endpoint's hashed filter tuple | |
e3eea08e | 513 | * @endpoint: Endpoint whose filter hash tuple should be zeroed |
2b9feef2 AE |
514 | * |
515 | * Endpoint must be for the AP (not modem) and support filtering. Updates | |
516 | * the filter hash values without changing route ones. | |
517 | */ | |
518 | static void ipa_filter_tuple_zero(struct ipa_endpoint *endpoint) | |
519 | { | |
520 | u32 endpoint_id = endpoint->endpoint_id; | |
521 | u32 offset; | |
522 | u32 val; | |
523 | ||
524 | offset = IPA_REG_ENDP_FILTER_ROUTER_HSH_CFG_N_OFFSET(endpoint_id); | |
525 | ||
526 | val = ioread32(endpoint->ipa->reg_virt + offset); | |
527 | ||
528 | /* Zero all filter-related fields, preserving the rest */ | |
c047dc1d | 529 | u32p_replace_bits(&val, 0, IPA_REG_ENDP_FILTER_HASH_MSK_ALL); |
2b9feef2 AE |
530 | |
531 | iowrite32(val, endpoint->ipa->reg_virt + offset); | |
532 | } | |
533 | ||
74858b63 | 534 | /* Configure a hashed filter table; there is no ipa_filter_deconfig() */ |
2b9feef2 AE |
535 | static void ipa_filter_config(struct ipa *ipa, bool modem) |
536 | { | |
537 | enum gsi_ee_id ee_id = modem ? GSI_EE_MODEM : GSI_EE_AP; | |
538 | u32 ep_mask = ipa->filter_map; | |
539 | ||
a266ad6b | 540 | if (!ipa_table_hash_support(ipa)) |
2b9feef2 AE |
541 | return; |
542 | ||
543 | while (ep_mask) { | |
544 | u32 endpoint_id = __ffs(ep_mask); | |
545 | struct ipa_endpoint *endpoint; | |
546 | ||
547 | ep_mask ^= BIT(endpoint_id); | |
548 | ||
549 | endpoint = &ipa->endpoint[endpoint_id]; | |
550 | if (endpoint->ee_id == ee_id) | |
551 | ipa_filter_tuple_zero(endpoint); | |
552 | } | |
553 | } | |
554 | ||
2b9feef2 AE |
555 | static bool ipa_route_id_modem(u32 route_id) |
556 | { | |
557 | return route_id >= IPA_ROUTE_MODEM_MIN && | |
558 | route_id <= IPA_ROUTE_MODEM_MIN + IPA_ROUTE_MODEM_COUNT - 1; | |
559 | } | |
560 | ||
561 | /** | |
562 | * ipa_route_tuple_zero() - Zero a hashed route table entry tuple | |
e3eea08e | 563 | * @ipa: IPA pointer |
2b9feef2 AE |
564 | * @route_id: Route table entry whose hash tuple should be zeroed |
565 | * | |
566 | * Updates the route hash values without changing filter ones. | |
567 | */ | |
568 | static void ipa_route_tuple_zero(struct ipa *ipa, u32 route_id) | |
569 | { | |
570 | u32 offset = IPA_REG_ENDP_FILTER_ROUTER_HSH_CFG_N_OFFSET(route_id); | |
571 | u32 val; | |
572 | ||
573 | val = ioread32(ipa->reg_virt + offset); | |
574 | ||
575 | /* Zero all route-related fields, preserving the rest */ | |
c047dc1d | 576 | u32p_replace_bits(&val, 0, IPA_REG_ENDP_ROUTER_HASH_MSK_ALL); |
2b9feef2 AE |
577 | |
578 | iowrite32(val, ipa->reg_virt + offset); | |
579 | } | |
580 | ||
74858b63 | 581 | /* Configure a hashed route table; there is no ipa_route_deconfig() */ |
2b9feef2 AE |
582 | static void ipa_route_config(struct ipa *ipa, bool modem) |
583 | { | |
584 | u32 route_id; | |
585 | ||
a266ad6b | 586 | if (!ipa_table_hash_support(ipa)) |
2b9feef2 AE |
587 | return; |
588 | ||
589 | for (route_id = 0; route_id < IPA_ROUTE_COUNT_MAX; route_id++) | |
590 | if (ipa_route_id_modem(route_id) == modem) | |
591 | ipa_route_tuple_zero(ipa, route_id); | |
592 | } | |
593 | ||
74858b63 | 594 | /* Configure a filter and route tables; there is no ipa_table_deconfig() */ |
2b9feef2 AE |
595 | void ipa_table_config(struct ipa *ipa) |
596 | { | |
597 | ipa_filter_config(ipa, false); | |
598 | ipa_filter_config(ipa, true); | |
599 | ipa_route_config(ipa, false); | |
600 | ipa_route_config(ipa, true); | |
601 | } | |
602 | ||
2b9feef2 AE |
603 | /* |
604 | * Initialize a coherent DMA allocation containing initialized filter and | |
605 | * route table data. This is used when initializing or resetting the IPA | |
606 | * filter or route table. | |
607 | * | |
608 | * The first entry in a filter table contains a bitmap indicating which | |
609 | * endpoints contain entries in the table. In addition to that first entry, | |
610 | * there are at most IPA_FILTER_COUNT_MAX entries that follow. Filter table | |
611 | * entries are 64 bits wide, and (other than the bitmap) contain the DMA | |
612 | * address of a filter rule. A "zero rule" indicates no filtering, and | |
613 | * consists of 64 bits of zeroes. When a filter table is initialized (or | |
614 | * reset) its entries are made to refer to the zero rule. | |
615 | * | |
616 | * Each entry in a route table is the DMA address of a routing rule. For | |
617 | * routing there is also a 64-bit "zero rule" that means no routing, and | |
618 | * when a route table is initialized or reset, its entries are made to refer | |
619 | * to the zero rule. The zero rule is shared for route and filter tables. | |
620 | * | |
621 | * Note that the IPA hardware requires a filter or route rule address to be | |
622 | * aligned on a 128 byte boundary. The coherent DMA buffer we allocate here | |
623 | * has a minimum alignment, and we place the zero rule at the base of that | |
624 | * allocated space. In ipa_table_init() we verify the minimum DMA allocation | |
625 | * meets our requirement. | |
626 | * | |
627 | * +-------------------+ | |
628 | * --> | zero rule | | |
629 | * / |-------------------| | |
630 | * | | filter mask | | |
631 | * |\ |-------------------| | |
632 | * | ---- zero rule address | \ | |
633 | * |\ |-------------------| | | |
634 | * | ---- zero rule address | | IPA_FILTER_COUNT_MAX | |
635 | * | |-------------------| > or IPA_ROUTE_COUNT_MAX, | |
636 | * | ... | whichever is greater | |
637 | * \ |-------------------| | | |
638 | * ---- zero rule address | / | |
639 | * +-------------------+ | |
640 | */ | |
641 | int ipa_table_init(struct ipa *ipa) | |
642 | { | |
643 | u32 count = max_t(u32, IPA_FILTER_COUNT_MAX, IPA_ROUTE_COUNT_MAX); | |
644 | struct device *dev = &ipa->pdev->dev; | |
645 | dma_addr_t addr; | |
646 | __le64 le_addr; | |
647 | __le64 *virt; | |
648 | size_t size; | |
649 | ||
650 | ipa_table_validate_build(); | |
651 | ||
19aaf72c AE |
652 | /* The IPA hardware requires route and filter table rules to be |
653 | * aligned on a 128-byte boundary. We put the "zero rule" at the | |
654 | * base of the table area allocated here. The DMA address returned | |
655 | * by dma_alloc_coherent() is guaranteed to be a power-of-2 number | |
656 | * of pages, which satisfies the rule alignment requirement. | |
657 | */ | |
4ea29143 | 658 | size = IPA_ZERO_RULE_SIZE + (1 + count) * sizeof(__le64); |
2b9feef2 AE |
659 | virt = dma_alloc_coherent(dev, size, &addr, GFP_KERNEL); |
660 | if (!virt) | |
661 | return -ENOMEM; | |
662 | ||
663 | ipa->table_virt = virt; | |
664 | ipa->table_addr = addr; | |
665 | ||
666 | /* First slot is the zero rule */ | |
667 | *virt++ = 0; | |
668 | ||
669 | /* Next is the filter table bitmap. The "soft" bitmap value | |
670 | * must be converted to the hardware representation by shifting | |
671 | * it left one position. (Bit 0 repesents global filtering, | |
672 | * which is possible but not used.) | |
673 | */ | |
674 | *virt++ = cpu_to_le64((u64)ipa->filter_map << 1); | |
675 | ||
676 | /* All the rest contain the DMA address of the zero rule */ | |
677 | le_addr = cpu_to_le64(addr); | |
678 | while (count--) | |
679 | *virt++ = le_addr; | |
680 | ||
681 | return 0; | |
682 | } | |
683 | ||
684 | void ipa_table_exit(struct ipa *ipa) | |
685 | { | |
686 | u32 count = max_t(u32, 1 + IPA_FILTER_COUNT_MAX, IPA_ROUTE_COUNT_MAX); | |
687 | struct device *dev = &ipa->pdev->dev; | |
688 | size_t size; | |
689 | ||
4ea29143 | 690 | size = IPA_ZERO_RULE_SIZE + (1 + count) * sizeof(__le64); |
2b9feef2 AE |
691 | |
692 | dma_free_coherent(dev, size, ipa->table_virt, ipa->table_addr); | |
693 | ipa->table_addr = 0; | |
694 | ipa->table_virt = NULL; | |
695 | } |