[linux-block.git] / drivers / net / ipa / gsi.h

/* SPDX-License-Identifier: GPL-2.0 */

/* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
 * Copyright (C) 2018-2021 Linaro Ltd.
 */
#ifndef _GSI_H_
#define _GSI_H_

#include <linux/types.h>
#include <linux/spinlock.h>
#include <linux/mutex.h>
#include <linux/completion.h>
#include <linux/platform_device.h>
#include <linux/netdevice.h>

#include "ipa_version.h"

/* Maximum number of channels and event rings supported by the driver */
#define GSI_CHANNEL_COUNT_MAX	23
#define GSI_EVT_RING_COUNT_MAX	24

/* Maximum TLV FIFO size for a channel; 64 here is arbitrary (and high) */
#define GSI_TLV_MAX		64

struct device;
struct scatterlist;
struct platform_device;

struct gsi;
struct gsi_trans;
struct gsi_channel_data;
struct ipa_gsi_endpoint_data;

/* Execution environment IDs */
enum gsi_ee_id {
	GSI_EE_AP				= 0x0,
	GSI_EE_MODEM				= 0x1,
	GSI_EE_UC				= 0x2,
	GSI_EE_TZ				= 0x3,
};

struct gsi_ring {
	void *virt;			/* ring array base address */
	dma_addr_t addr;		/* primarily low 32 bits used */
	u32 count;			/* number of elements in ring */

	/* The ring index value indicates the next "open" entry in the ring.
	 *
	 * A channel ring consists of TRE entries filled by the AP and passed
	 * to the hardware for processing.  For a channel ring, the ring index
	 * identifies the next unused entry to be filled by the AP.
	 *
	 * An event ring consists of event structures filled by the hardware
	 * and passed to the AP.  For event rings, the ring index identifies
	 * the next ring entry that is not known to have been filled by the
	 * hardware.
	 */
	u32 index;
};

/* Transactions use several resources that can be allocated dynamically
 * but taken from a fixed-size pool.  The number of elements required for
 * the pool is limited by the total number of TREs that can be outstanding.
 *
 * If sufficient TREs are available to reserve for a transaction,
 * allocation from these pools is guaranteed to succeed.  Furthermore,
 * these resources are implicitly freed whenever the TREs in the
 * transaction they're associated with are released.
 *
 * The result of a pool allocation of multiple elements is always
 * contiguous.
 */
struct gsi_trans_pool {
	void *base;			/* base address of element pool */
	u32 count;			/* # elements in the pool */
	u32 free;			/* next free element in pool (modulo) */
	u32 size;			/* size (bytes) of an element */
	u32 max_alloc;			/* max allocation request */
	dma_addr_t addr;		/* DMA address if DMA pool (or 0) */
};

struct gsi_trans_info {
	atomic_t tre_avail;		/* TREs available for allocation */
	struct gsi_trans_pool pool;	/* transaction pool */
	struct gsi_trans_pool sg_pool;	/* scatterlist pool */
	struct gsi_trans_pool cmd_pool;	/* command payload DMA pool */
	struct gsi_trans_pool info_pool;/* command information pool */
	struct gsi_trans **map;		/* TRE -> transaction map */

	spinlock_t spinlock;		/* protects updates to the lists */
	struct list_head alloc;		/* allocated, not committed */
	struct list_head pending;	/* committed, awaiting completion */
	struct list_head complete;	/* completed, awaiting poll */
	struct list_head polled;	/* returned by gsi_channel_poll_one() */
};

/* Hardware values signifying the state of a channel */
enum gsi_channel_state {
	GSI_CHANNEL_STATE_NOT_ALLOCATED		= 0x0,
	GSI_CHANNEL_STATE_ALLOCATED		= 0x1,
	GSI_CHANNEL_STATE_STARTED		= 0x2,
	GSI_CHANNEL_STATE_STOPPED		= 0x3,
	GSI_CHANNEL_STATE_STOP_IN_PROC		= 0x4,
	GSI_CHANNEL_STATE_FLOW_CONTROLLED	= 0x5,	/* IPA v4.2+ */
	GSI_CHANNEL_STATE_ERROR			= 0xf,
};

/* We only care about channels between IPA and AP */
struct gsi_channel {
	struct gsi *gsi;
	bool toward_ipa;
	bool command;			/* AP command TX channel or not */

	u8 tlv_count;			/* # entries in TLV FIFO */
	u16 tre_count;
	u16 event_count;

	struct gsi_ring tre_ring;
	u32 evt_ring_id;

	u64 byte_count;			/* total # bytes transferred */
	u64 trans_count;		/* total # transactions */
	/* The following counts are used only for TX endpoints */
	u64 queued_byte_count;		/* last reported queued byte count */
	u64 queued_trans_count;		/* ...and queued trans count */
	u64 compl_byte_count;		/* last reported completed byte count */
	u64 compl_trans_count;		/* ...and completed trans count */

	struct gsi_trans_info trans_info;

	struct napi_struct napi;
};

/* Hardware values signifying the state of an event ring */
enum gsi_evt_ring_state {
	GSI_EVT_RING_STATE_NOT_ALLOCATED	= 0x0,
	GSI_EVT_RING_STATE_ALLOCATED		= 0x1,
	GSI_EVT_RING_STATE_ERROR		= 0xf,
};

struct gsi_evt_ring {
	struct gsi_channel *channel;
	struct gsi_ring ring;
};

struct gsi {
	struct device *dev;		/* Same as IPA device */
	enum ipa_version version;
	void __iomem *virt_raw;		/* I/O mapped address range */
	void __iomem *virt;		/* Adjusted for most registers */
	u32 irq;
	u32 channel_count;
	u32 evt_ring_count;
	u32 event_bitmap;		/* allocated event rings */
	u32 modem_channel_bitmap;	/* modem channels to allocate */
	u32 type_enabled_bitmap;	/* GSI IRQ types enabled */
	u32 ieob_enabled_bitmap;	/* IEOB IRQ enabled (event rings) */
	int result;			/* Negative errno (generic commands) */
	struct completion completion;	/* Signals GSI command completion */
	struct mutex mutex;		/* protects commands, programming */
	struct gsi_channel channel[GSI_CHANNEL_COUNT_MAX];
	struct gsi_evt_ring evt_ring[GSI_EVT_RING_COUNT_MAX];
	struct net_device dummy_dev;	/* needed for NAPI */
};

/**
 * gsi_setup() - Set up the GSI subsystem
 * @gsi:	Address of GSI structure embedded in an IPA structure
 *
 * Return:	0 if successful, or a negative error code
 *
 * Performs initialization that must wait until the GSI hardware is
 * ready (including firmware loaded).
 */
int gsi_setup(struct gsi *gsi);

/**
 * gsi_teardown() - Tear down GSI subsystem
 * @gsi:	GSI address previously passed to a successful gsi_setup() call
 */
void gsi_teardown(struct gsi *gsi);

/**
 * gsi_channel_tre_max() - Channel maximum number of in-flight TREs
 * @gsi:	GSI pointer
 * @channel_id:	Channel whose limit is to be returned
 *
 * Return:	 The maximum number of TREs oustanding on the channel
 */
u32 gsi_channel_tre_max(struct gsi *gsi, u32 channel_id);

/**
 * gsi_channel_trans_tre_max() - Maximum TREs in a single transaction
 * @gsi:	GSI pointer
 * @channel_id:	Channel whose limit is to be returned
 *
 * Return:	 The maximum TRE count per transaction on the channel
 */
u32 gsi_channel_trans_tre_max(struct gsi *gsi, u32 channel_id);

/**
 * gsi_channel_start() - Start an allocated GSI channel
 * @gsi:	GSI pointer
 * @channel_id:	Channel to start
 *
 * Return:	0 if successful, or a negative error code
 */
int gsi_channel_start(struct gsi *gsi, u32 channel_id);

/**
 * gsi_channel_stop() - Stop a started GSI channel
 * @gsi:	GSI pointer returned by gsi_setup()
 * @channel_id:	Channel to stop
 *
 * Return:	0 if successful, or a negative error code
 */
int gsi_channel_stop(struct gsi *gsi, u32 channel_id);

/**
 * gsi_modem_channel_flow_control() - Set channel flow control state (IPA v4.2+)
 * @gsi:	GSI pointer returned by gsi_setup()
 * @channel_id:	Modem TX channel to control
 * @enable:	Whether to enable flow control (i.e., prevent flow)
 */
void gsi_modem_channel_flow_control(struct gsi *gsi, u32 channel_id,
				    bool enable);

/**
 * gsi_channel_reset() - Reset an allocated GSI channel
 * @gsi:	GSI pointer
 * @channel_id:	Channel to be reset
 * @doorbell:	Whether to (possibly) enable the doorbell engine
 *
 * Reset a channel and reconfigure it.  The @doorbell flag indicates
 * that the doorbell engine should be enabled if needed.
 *
 * GSI hardware relinquishes ownership of all pending receive buffer
 * transactions and they will complete with their cancelled flag set.
 */
void gsi_channel_reset(struct gsi *gsi, u32 channel_id, bool doorbell);

/**
 * gsi_suspend() - Prepare the GSI subsystem for suspend
 * @gsi:	GSI pointer
 */
void gsi_suspend(struct gsi *gsi);

/**
 * gsi_resume() - Resume the GSI subsystem following suspend
 * @gsi:	GSI pointer
 */
void gsi_resume(struct gsi *gsi);

/**
 * gsi_channel_suspend() - Suspend a GSI channel
 * @gsi:	GSI pointer
 * @channel_id:	Channel to suspend
 *
 * For IPA v4.0+, suspend is implemented by stopping the channel.
 */
int gsi_channel_suspend(struct gsi *gsi, u32 channel_id);

/**
 * gsi_channel_resume() - Resume a suspended GSI channel
 * @gsi:	GSI pointer
 * @channel_id:	Channel to resume
 *
 * For IPA v4.0+, the stopped channel is started again.
 */
int gsi_channel_resume(struct gsi *gsi, u32 channel_id);

/**
 * gsi_init() - Initialize the GSI subsystem
 * @gsi:	Address of GSI structure embedded in an IPA structure
 * @pdev:	IPA platform device
 * @version:	IPA hardware version (implies GSI version)
 * @count:	Number of entries in the configuration data array
 * @data:	Endpoint and channel configuration data
 *
 * Return:	0 if successful, or a negative error code
 *
 * Early stage initialization of the GSI subsystem, performing tasks
 * that can be done before the GSI hardware is ready to use.
 */
int gsi_init(struct gsi *gsi, struct platform_device *pdev,
	     enum ipa_version version, u32 count,
	     const struct ipa_gsi_endpoint_data *data);

/**
 * gsi_exit() - Exit the GSI subsystem
 * @gsi:	GSI address previously passed to a successful gsi_init() call
 */
void gsi_exit(struct gsi *gsi);

#endif /* _GSI_H_ */
Commit	Line	Data
ca48b27b AE	1	/* SPDX-License-Identifier: GPL-2.0 */
	2
	3	/* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
571b1e7e	4	* Copyright (C) 2018-2021 Linaro Ltd.
ca48b27b AE	5	*/
	6	#ifndef _GSI_H_
	7	#define _GSI_H_
	8
	9	#include <linux/types.h>
	10	#include <linux/spinlock.h>
	11	#include <linux/mutex.h>
	12	#include <linux/completion.h>
	13	#include <linux/platform_device.h>
	14	#include <linux/netdevice.h>
	15
14dbf977 AE	16	#include "ipa_version.h"
14dbf977 AE	17
ca48b27b	18	/* Maximum number of channels and event rings supported by the driver */
810a2e1f	19	#define GSI_CHANNEL_COUNT_MAX 23
bae70a80	20	#define GSI_EVT_RING_COUNT_MAX 24
ca48b27b AE	21
	22	/* Maximum TLV FIFO size for a channel; 64 here is arbitrary (and high) */
	23	#define GSI_TLV_MAX 64
	24
	25	struct device;
	26	struct scatterlist;
	27	struct platform_device;
	28
	29	struct gsi;
	30	struct gsi_trans;
	31	struct gsi_channel_data;
	32	struct ipa_gsi_endpoint_data;
	33
	34	/* Execution environment IDs */
	35	enum gsi_ee_id {
8701cb00 AE	36	GSI_EE_AP = 0x0,
	37	GSI_EE_MODEM = 0x1,
	38	GSI_EE_UC = 0x2,
	39	GSI_EE_TZ = 0x3,
ca48b27b AE	40	};
	41
	42	struct gsi_ring {
	43	void virt; / ring array base address */
	44	dma_addr_t addr; /* primarily low 32 bits used */
	45	u32 count; /* number of elements in ring */
	46
	47	/* The ring index value indicates the next "open" entry in the ring.
	48	*
	49	* A channel ring consists of TRE entries filled by the AP and passed
	50	* to the hardware for processing. For a channel ring, the ring index
	51	* identifies the next unused entry to be filled by the AP.
	52	*
	53	* An event ring consists of event structures filled by the hardware
	54	* and passed to the AP. For event rings, the ring index identifies
	55	* the next ring entry that is not known to have been filled by the
	56	* hardware.
	57	*/
	58	u32 index;
	59	};
	60
	61	/* Transactions use several resources that can be allocated dynamically
	62	* but taken from a fixed-size pool. The number of elements required for
	63	* the pool is limited by the total number of TREs that can be outstanding.
	64	*
	65	* If sufficient TREs are available to reserve for a transaction,
	66	* allocation from these pools is guaranteed to succeed. Furthermore,
	67	* these resources are implicitly freed whenever the TREs in the
	68	* transaction they're associated with are released.
	69	*
	70	* The result of a pool allocation of multiple elements is always
	71	* contiguous.
	72	*/
	73	struct gsi_trans_pool {
	74	void base; / base address of element pool */
	75	u32 count; /* # elements in the pool */
	76	u32 free; /* next free element in pool (modulo) */
	77	u32 size; /* size (bytes) of an element */
	78	u32 max_alloc; /* max allocation request */
	79	dma_addr_t addr; /* DMA address if DMA pool (or 0) */
	80	};
	81
	82	struct gsi_trans_info {
	83	atomic_t tre_avail; /* TREs available for allocation */
	84	struct gsi_trans_pool pool; /* transaction pool */
	85	struct gsi_trans_pool sg_pool; /* scatterlist pool */
	86	struct gsi_trans_pool cmd_pool; /* command payload DMA pool */
	87	struct gsi_trans_pool info_pool;/* command information pool */
	88	struct gsi_trans *map; / TRE -> transaction map */
	89
	90	spinlock_t spinlock; /* protects updates to the lists */
	91	struct list_head alloc; /* allocated, not committed */
	92	struct list_head pending; /* committed, awaiting completion */
	93	struct list_head complete; /* completed, awaiting poll */
	94	struct list_head polled; /* returned by gsi_channel_poll_one() */
	95	};
	96
	97	/* Hardware values signifying the state of a channel */
	98	enum gsi_channel_state {
8701cb00 AE	99	GSI_CHANNEL_STATE_NOT_ALLOCATED = 0x0,
	100	GSI_CHANNEL_STATE_ALLOCATED = 0x1,
	101	GSI_CHANNEL_STATE_STARTED = 0x2,
	102	GSI_CHANNEL_STATE_STOPPED = 0x3,
	103	GSI_CHANNEL_STATE_STOP_IN_PROC = 0x4,
4c9d631a	104	GSI_CHANNEL_STATE_FLOW_CONTROLLED = 0x5, /* IPA v4.2+ */
8701cb00	105	GSI_CHANNEL_STATE_ERROR = 0xf,
ca48b27b AE	106	};
	107
	108	/* We only care about channels between IPA and AP */
	109	struct gsi_channel {
	110	struct gsi *gsi;
	111	bool toward_ipa;
	112	bool command; /* AP command TX channel or not */
ca48b27b AE	113
	114	u8 tlv_count; /* # entries in TLV FIFO */
	115	u16 tre_count;
	116	u16 event_count;
	117
ca48b27b AE	118	struct gsi_ring tre_ring;
	119	u32 evt_ring_id;
	120
	121	u64 byte_count; /* total # bytes transferred */
	122	u64 trans_count; /* total # transactions */
	123	/* The following counts are used only for TX endpoints */
	124	u64 queued_byte_count; /* last reported queued byte count */
	125	u64 queued_trans_count; /* ...and queued trans count */
	126	u64 compl_byte_count; /* last reported completed byte count */
	127	u64 compl_trans_count; /* ...and completed trans count */
	128
	129	struct gsi_trans_info trans_info;
	130
	131	struct napi_struct napi;
	132	};
	133
	134	/* Hardware values signifying the state of an event ring */
	135	enum gsi_evt_ring_state {
	136	GSI_EVT_RING_STATE_NOT_ALLOCATED = 0x0,
	137	GSI_EVT_RING_STATE_ALLOCATED = 0x1,
	138	GSI_EVT_RING_STATE_ERROR = 0xf,
	139	};
	140
	141	struct gsi_evt_ring {
	142	struct gsi_channel *channel;
ca48b27b AE	143	struct gsi_ring ring;
	144	};
	145
	146	struct gsi {
	147	struct device dev; / Same as IPA device */
14dbf977	148	enum ipa_version version;
571b1e7e AE	149	void __iomem virt_raw; / I/O mapped address range */
571b1e7e AE	150	void __iomem virt; / Adjusted for most registers */
ca48b27b	151	u32 irq;
ca48b27b AE	152	u32 channel_count;
ca48b27b AE	153	u32 evt_ring_count;
a054539d AE	154	u32 event_bitmap; /* allocated event rings */
a054539d AE	155	u32 modem_channel_bitmap; /* modem channels to allocate */
3ca97ffd	156	u32 type_enabled_bitmap; /* GSI IRQ types enabled */
a054539d	157	u32 ieob_enabled_bitmap; /* IEOB IRQ enabled (event rings) */
11361456	158	int result; /* Negative errno (generic commands) */
faa88ece	159	struct completion completion; /* Signals GSI command completion */
ca48b27b	160	struct mutex mutex; /* protects commands, programming */
faa88ece AE	161	struct gsi_channel channel[GSI_CHANNEL_COUNT_MAX];
	162	struct gsi_evt_ring evt_ring[GSI_EVT_RING_COUNT_MAX];
	163	struct net_device dummy_dev; /* needed for NAPI */
ca48b27b AE	164	};
	165
	166	/**
	167	* gsi_setup() - Set up the GSI subsystem
	168	* @gsi: Address of GSI structure embedded in an IPA structure
ca48b27b	169	*
e3eea08e	170	* Return: 0 if successful, or a negative error code
ca48b27b AE	171	*
	172	* Performs initialization that must wait until the GSI hardware is
	173	* ready (including firmware loaded).
	174	*/
d387c761	175	int gsi_setup(struct gsi *gsi);
ca48b27b AE	176
	177	/**
	178	* gsi_teardown() - Tear down GSI subsystem
	179	* @gsi: GSI address previously passed to a successful gsi_setup() call
	180	*/
	181	void gsi_teardown(struct gsi *gsi);
	182
	183	/**
	184	* gsi_channel_tre_max() - Channel maximum number of in-flight TREs
	185	* @gsi: GSI pointer
	186	* @channel_id: Channel whose limit is to be returned
	187	*
e3eea08e	188	* Return: The maximum number of TREs oustanding on the channel
ca48b27b AE	189	*/
	190	u32 gsi_channel_tre_max(struct gsi *gsi, u32 channel_id);
	191
	192	/**
	193	* gsi_channel_trans_tre_max() - Maximum TREs in a single transaction
	194	* @gsi: GSI pointer
	195	* @channel_id: Channel whose limit is to be returned
	196	*
e3eea08e	197	* Return: The maximum TRE count per transaction on the channel
ca48b27b AE	198	*/
	199	u32 gsi_channel_trans_tre_max(struct gsi *gsi, u32 channel_id);
	200
	201	/**
	202	* gsi_channel_start() - Start an allocated GSI channel
	203	* @gsi: GSI pointer
	204	* @channel_id: Channel to start
	205	*
e3eea08e	206	* Return: 0 if successful, or a negative error code
ca48b27b AE	207	*/
	208	int gsi_channel_start(struct gsi *gsi, u32 channel_id);
	209
	210	/**
	211	* gsi_channel_stop() - Stop a started GSI channel
	212	* @gsi: GSI pointer returned by gsi_setup()
	213	* @channel_id: Channel to stop
	214	*
e3eea08e	215	* Return: 0 if successful, or a negative error code
ca48b27b AE	216	*/
	217	int gsi_channel_stop(struct gsi *gsi, u32 channel_id);
	218
4c9d631a AE	219	/**
	220	* gsi_modem_channel_flow_control() - Set channel flow control state (IPA v4.2+)
	221	* @gsi: GSI pointer returned by gsi_setup()
	222	* @channel_id: Modem TX channel to control
	223	* @enable: Whether to enable flow control (i.e., prevent flow)
	224	*/
	225	void gsi_modem_channel_flow_control(struct gsi *gsi, u32 channel_id,
	226	bool enable);
	227
ca48b27b AE	228	/**
	229	* gsi_channel_reset() - Reset an allocated GSI channel
	230	* @gsi: GSI pointer
	231	* @channel_id: Channel to be reset
ce54993d	232	* @doorbell: Whether to (possibly) enable the doorbell engine
ca48b27b	233	*
ce54993d AE	234	* Reset a channel and reconfigure it. The @doorbell flag indicates
ce54993d AE	235	* that the doorbell engine should be enabled if needed.
ca48b27b AE	236	*
	237	* GSI hardware relinquishes ownership of all pending receive buffer
	238	* transactions and they will complete with their cancelled flag set.
	239	*/
ce54993d	240	void gsi_channel_reset(struct gsi *gsi, u32 channel_id, bool doorbell);
ca48b27b	241
45a42a3c AE	242	/**
	243	* gsi_suspend() - Prepare the GSI subsystem for suspend
	244	* @gsi: GSI pointer
	245	*/
	246	void gsi_suspend(struct gsi *gsi);
	247
	248	/**
	249	* gsi_resume() - Resume the GSI subsystem following suspend
	250	* @gsi: GSI pointer
	251	*/
	252	void gsi_resume(struct gsi *gsi);
	253
decfef0f AE	254	/**
	255	* gsi_channel_suspend() - Suspend a GSI channel
	256	* @gsi: GSI pointer
	257	* @channel_id: Channel to suspend
	258	*
	259	* For IPA v4.0+, suspend is implemented by stopping the channel.
	260	*/
	261	int gsi_channel_suspend(struct gsi *gsi, u32 channel_id);
	262
	263	/**
	264	* gsi_channel_resume() - Resume a suspended GSI channel
	265	* @gsi: GSI pointer
	266	* @channel_id: Channel to resume
	267	*
	268	* For IPA v4.0+, the stopped channel is started again.
	269	*/
	270	int gsi_channel_resume(struct gsi *gsi, u32 channel_id);
ca48b27b AE	271
	272	/**
	273	* gsi_init() - Initialize the GSI subsystem
	274	* @gsi: Address of GSI structure embedded in an IPA structure
	275	* @pdev: IPA platform device
1d0c09de AE	276	* @version: IPA hardware version (implies GSI version)
	277	* @count: Number of entries in the configuration data array
	278	* @data: Endpoint and channel configuration data
ca48b27b	279	*
e3eea08e	280	* Return: 0 if successful, or a negative error code
ca48b27b AE	281	*
	282	* Early stage initialization of the GSI subsystem, performing tasks
	283	* that can be done before the GSI hardware is ready to use.
	284	*/
1d0c09de AE	285	int gsi_init(struct gsi gsi, struct platform_device pdev,
	286	enum ipa_version version, u32 count,
	287	const struct ipa_gsi_endpoint_data *data);
ca48b27b AE	288
	289	/**
	290	* gsi_exit() - Exit the GSI subsystem
	291	* @gsi: GSI address previously passed to a successful gsi_init() call
	292	*/
	293	void gsi_exit(struct gsi *gsi);
	294
	295	#endif /* _GSI_H_ */