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7b8e19b6 | 1 | /* |
2 | * AT86RF230/RF231 driver | |
3 | * | |
4 | * Copyright (C) 2009-2012 Siemens AG | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 | |
8 | * as published by the Free Software Foundation. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, | |
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
14 | * | |
7b8e19b6 | 15 | * Written by: |
16 | * Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> | |
17 | * Alexander Smirnov <alex.bluesman.smirnov@gmail.com> | |
01ebd60b | 18 | * Alexander Aring <aar@pengutronix.de> |
7b8e19b6 | 19 | */ |
20 | #include <linux/kernel.h> | |
21 | #include <linux/module.h> | |
eb3b435e | 22 | #include <linux/hrtimer.h> |
dce481e6 | 23 | #include <linux/jiffies.h> |
7b8e19b6 | 24 | #include <linux/interrupt.h> |
4af619ae | 25 | #include <linux/irq.h> |
7b8e19b6 | 26 | #include <linux/gpio.h> |
27 | #include <linux/delay.h> | |
7b8e19b6 | 28 | #include <linux/spi/spi.h> |
29 | #include <linux/spi/at86rf230.h> | |
f76014f7 | 30 | #include <linux/regmap.h> |
7b8e19b6 | 31 | #include <linux/skbuff.h> |
fa2d3e94 | 32 | #include <linux/of_gpio.h> |
4ca24aca | 33 | #include <linux/ieee802154.h> |
7b8e19b6 | 34 | |
35 | #include <net/mac802154.h> | |
5ad60d36 | 36 | #include <net/cfg802154.h> |
7b8e19b6 | 37 | |
7490b008 AA |
38 | #include "at86rf230.h" |
39 | ||
a53d1f7c AA |
40 | struct at86rf230_local; |
41 | /* at86rf2xx chip depend data. | |
42 | * All timings are in us. | |
43 | */ | |
44 | struct at86rf2xx_chip_data { | |
7a4ef918 | 45 | u16 t_sleep_cycle; |
984e0c68 | 46 | u16 t_channel_switch; |
09e536cd | 47 | u16 t_reset_to_off; |
2e0571c0 AA |
48 | u16 t_off_to_aack; |
49 | u16 t_off_to_tx_on; | |
e6f7ed9d AA |
50 | u16 t_off_to_sleep; |
51 | u16 t_sleep_to_off; | |
1d15d6b5 AA |
52 | u16 t_frame; |
53 | u16 t_p_ack; | |
a53d1f7c AA |
54 | int rssi_base_val; |
55 | ||
e37d2ec8 | 56 | int (*set_channel)(struct at86rf230_local *, u8, u8); |
6f4da3f8 | 57 | int (*set_txpower)(struct at86rf230_local *, s32); |
a53d1f7c AA |
58 | }; |
59 | ||
ba6d2239 AA |
60 | #define AT86RF2XX_MAX_BUF (127 + 3) |
61 | /* tx retries to access the TX_ON state | |
62 | * if it's above then force change will be started. | |
63 | * | |
64 | * We assume the max_frame_retries (7) value of 802.15.4 here. | |
65 | */ | |
66 | #define AT86RF2XX_MAX_TX_RETRIES 7 | |
dce481e6 AA |
67 | /* We use the recommended 5 minutes timeout to recalibrate */ |
68 | #define AT86RF2XX_CAL_LOOP_TIMEOUT (5 * 60 * HZ) | |
7b8e19b6 | 69 | |
1d15d6b5 AA |
70 | struct at86rf230_state_change { |
71 | struct at86rf230_local *lp; | |
cca990c8 | 72 | int irq; |
7b8e19b6 | 73 | |
eb3b435e | 74 | struct hrtimer timer; |
1d15d6b5 AA |
75 | struct spi_message msg; |
76 | struct spi_transfer trx; | |
77 | u8 buf[AT86RF2XX_MAX_BUF]; | |
78 | ||
79 | void (*complete)(void *context); | |
80 | u8 from_state; | |
81 | u8 to_state; | |
97fed795 AA |
82 | |
83 | bool irq_enable; | |
1d15d6b5 AA |
84 | }; |
85 | ||
86 | struct at86rf230_local { | |
87 | struct spi_device *spi; | |
7b8e19b6 | 88 | |
5a504397 | 89 | struct ieee802154_hw *hw; |
1d15d6b5 | 90 | struct at86rf2xx_chip_data *data; |
f76014f7 | 91 | struct regmap *regmap; |
d2c8bf51 | 92 | int slp_tr; |
cbe62346 | 93 | bool sleep; |
7b8e19b6 | 94 | |
2e0571c0 AA |
95 | struct completion state_complete; |
96 | struct at86rf230_state_change state; | |
97 | ||
1d15d6b5 | 98 | struct at86rf230_state_change irq; |
6ca00197 | 99 | |
dce481e6 | 100 | unsigned long cal_timeout; |
1d15d6b5 | 101 | bool is_tx; |
85009203 | 102 | bool is_tx_from_off; |
ba6d2239 | 103 | u8 tx_retry; |
1d15d6b5 AA |
104 | struct sk_buff *tx_skb; |
105 | struct at86rf230_state_change tx; | |
7b8e19b6 | 106 | }; |
107 | ||
f76014f7 AA |
108 | #define AT86RF2XX_NUMREGS 0x3F |
109 | ||
97fed795 | 110 | static void |
1d15d6b5 AA |
111 | at86rf230_async_state_change(struct at86rf230_local *lp, |
112 | struct at86rf230_state_change *ctx, | |
97fed795 AA |
113 | const u8 state, void (*complete)(void *context), |
114 | const bool irq_enable); | |
1d15d6b5 | 115 | |
cbe62346 AA |
116 | static inline void |
117 | at86rf230_sleep(struct at86rf230_local *lp) | |
118 | { | |
119 | if (gpio_is_valid(lp->slp_tr)) { | |
120 | gpio_set_value(lp->slp_tr, 1); | |
121 | usleep_range(lp->data->t_off_to_sleep, | |
122 | lp->data->t_off_to_sleep + 10); | |
123 | lp->sleep = true; | |
124 | } | |
125 | } | |
126 | ||
127 | static inline void | |
128 | at86rf230_awake(struct at86rf230_local *lp) | |
129 | { | |
130 | if (gpio_is_valid(lp->slp_tr)) { | |
131 | gpio_set_value(lp->slp_tr, 0); | |
132 | usleep_range(lp->data->t_sleep_to_off, | |
133 | lp->data->t_sleep_to_off + 100); | |
134 | lp->sleep = false; | |
135 | } | |
136 | } | |
137 | ||
f76014f7 AA |
138 | static inline int |
139 | __at86rf230_write(struct at86rf230_local *lp, | |
140 | unsigned int addr, unsigned int data) | |
141 | { | |
cbe62346 AA |
142 | bool sleep = lp->sleep; |
143 | int ret; | |
144 | ||
145 | /* awake for register setting if sleep */ | |
146 | if (sleep) | |
147 | at86rf230_awake(lp); | |
148 | ||
149 | ret = regmap_write(lp->regmap, addr, data); | |
150 | ||
151 | /* sleep again if was sleeping */ | |
152 | if (sleep) | |
153 | at86rf230_sleep(lp); | |
154 | ||
155 | return ret; | |
f76014f7 AA |
156 | } |
157 | ||
158 | static inline int | |
159 | __at86rf230_read(struct at86rf230_local *lp, | |
160 | unsigned int addr, unsigned int *data) | |
161 | { | |
cbe62346 AA |
162 | bool sleep = lp->sleep; |
163 | int ret; | |
164 | ||
165 | /* awake for register setting if sleep */ | |
166 | if (sleep) | |
167 | at86rf230_awake(lp); | |
168 | ||
169 | ret = regmap_read(lp->regmap, addr, data); | |
170 | ||
171 | /* sleep again if was sleeping */ | |
172 | if (sleep) | |
173 | at86rf230_sleep(lp); | |
174 | ||
175 | return ret; | |
f76014f7 AA |
176 | } |
177 | ||
178 | static inline int | |
179 | at86rf230_read_subreg(struct at86rf230_local *lp, | |
180 | unsigned int addr, unsigned int mask, | |
181 | unsigned int shift, unsigned int *data) | |
182 | { | |
183 | int rc; | |
184 | ||
185 | rc = __at86rf230_read(lp, addr, data); | |
d907c4f0 | 186 | if (!rc) |
f76014f7 AA |
187 | *data = (*data & mask) >> shift; |
188 | ||
189 | return rc; | |
190 | } | |
191 | ||
192 | static inline int | |
193 | at86rf230_write_subreg(struct at86rf230_local *lp, | |
194 | unsigned int addr, unsigned int mask, | |
195 | unsigned int shift, unsigned int data) | |
196 | { | |
cbe62346 AA |
197 | bool sleep = lp->sleep; |
198 | int ret; | |
199 | ||
200 | /* awake for register setting if sleep */ | |
201 | if (sleep) | |
202 | at86rf230_awake(lp); | |
203 | ||
204 | ret = regmap_update_bits(lp->regmap, addr, mask, data << shift); | |
205 | ||
206 | /* sleep again if was sleeping */ | |
207 | if (sleep) | |
208 | at86rf230_sleep(lp); | |
209 | ||
210 | return ret; | |
f76014f7 AA |
211 | } |
212 | ||
d2c8bf51 AA |
213 | static inline void |
214 | at86rf230_slp_tr_rising_edge(struct at86rf230_local *lp) | |
215 | { | |
216 | gpio_set_value(lp->slp_tr, 1); | |
217 | udelay(1); | |
218 | gpio_set_value(lp->slp_tr, 0); | |
219 | } | |
220 | ||
f76014f7 AA |
221 | static bool |
222 | at86rf230_reg_writeable(struct device *dev, unsigned int reg) | |
223 | { | |
224 | switch (reg) { | |
225 | case RG_TRX_STATE: | |
226 | case RG_TRX_CTRL_0: | |
227 | case RG_TRX_CTRL_1: | |
228 | case RG_PHY_TX_PWR: | |
229 | case RG_PHY_ED_LEVEL: | |
230 | case RG_PHY_CC_CCA: | |
231 | case RG_CCA_THRES: | |
232 | case RG_RX_CTRL: | |
233 | case RG_SFD_VALUE: | |
234 | case RG_TRX_CTRL_2: | |
235 | case RG_ANT_DIV: | |
236 | case RG_IRQ_MASK: | |
237 | case RG_VREG_CTRL: | |
238 | case RG_BATMON: | |
239 | case RG_XOSC_CTRL: | |
240 | case RG_RX_SYN: | |
241 | case RG_XAH_CTRL_1: | |
242 | case RG_FTN_CTRL: | |
243 | case RG_PLL_CF: | |
244 | case RG_PLL_DCU: | |
245 | case RG_SHORT_ADDR_0: | |
246 | case RG_SHORT_ADDR_1: | |
247 | case RG_PAN_ID_0: | |
248 | case RG_PAN_ID_1: | |
249 | case RG_IEEE_ADDR_0: | |
250 | case RG_IEEE_ADDR_1: | |
251 | case RG_IEEE_ADDR_2: | |
252 | case RG_IEEE_ADDR_3: | |
253 | case RG_IEEE_ADDR_4: | |
254 | case RG_IEEE_ADDR_5: | |
255 | case RG_IEEE_ADDR_6: | |
256 | case RG_IEEE_ADDR_7: | |
257 | case RG_XAH_CTRL_0: | |
258 | case RG_CSMA_SEED_0: | |
259 | case RG_CSMA_SEED_1: | |
260 | case RG_CSMA_BE: | |
261 | return true; | |
262 | default: | |
263 | return false; | |
264 | } | |
265 | } | |
266 | ||
267 | static bool | |
268 | at86rf230_reg_readable(struct device *dev, unsigned int reg) | |
269 | { | |
270 | bool rc; | |
271 | ||
272 | /* all writeable are also readable */ | |
273 | rc = at86rf230_reg_writeable(dev, reg); | |
274 | if (rc) | |
275 | return rc; | |
276 | ||
277 | /* readonly regs */ | |
278 | switch (reg) { | |
279 | case RG_TRX_STATUS: | |
280 | case RG_PHY_RSSI: | |
281 | case RG_IRQ_STATUS: | |
282 | case RG_PART_NUM: | |
283 | case RG_VERSION_NUM: | |
284 | case RG_MAN_ID_1: | |
285 | case RG_MAN_ID_0: | |
286 | return true; | |
287 | default: | |
288 | return false; | |
289 | } | |
290 | } | |
291 | ||
292 | static bool | |
293 | at86rf230_reg_volatile(struct device *dev, unsigned int reg) | |
294 | { | |
295 | /* can be changed during runtime */ | |
296 | switch (reg) { | |
297 | case RG_TRX_STATUS: | |
298 | case RG_TRX_STATE: | |
299 | case RG_PHY_RSSI: | |
300 | case RG_PHY_ED_LEVEL: | |
301 | case RG_IRQ_STATUS: | |
302 | case RG_VREG_CTRL: | |
51b3b2cf AA |
303 | case RG_PLL_CF: |
304 | case RG_PLL_DCU: | |
f76014f7 AA |
305 | return true; |
306 | default: | |
307 | return false; | |
308 | } | |
309 | } | |
310 | ||
311 | static bool | |
312 | at86rf230_reg_precious(struct device *dev, unsigned int reg) | |
313 | { | |
314 | /* don't clear irq line on read */ | |
315 | switch (reg) { | |
316 | case RG_IRQ_STATUS: | |
317 | return true; | |
318 | default: | |
319 | return false; | |
320 | } | |
321 | } | |
322 | ||
889ee2c7 | 323 | static const struct regmap_config at86rf230_regmap_spi_config = { |
f76014f7 AA |
324 | .reg_bits = 8, |
325 | .val_bits = 8, | |
326 | .write_flag_mask = CMD_REG | CMD_WRITE, | |
327 | .read_flag_mask = CMD_REG, | |
328 | .cache_type = REGCACHE_RBTREE, | |
329 | .max_register = AT86RF2XX_NUMREGS, | |
330 | .writeable_reg = at86rf230_reg_writeable, | |
331 | .readable_reg = at86rf230_reg_readable, | |
332 | .volatile_reg = at86rf230_reg_volatile, | |
333 | .precious_reg = at86rf230_reg_precious, | |
334 | }; | |
335 | ||
1d15d6b5 AA |
336 | static void |
337 | at86rf230_async_error_recover(void *context) | |
338 | { | |
339 | struct at86rf230_state_change *ctx = context; | |
340 | struct at86rf230_local *lp = ctx->lp; | |
341 | ||
a7a484bf | 342 | lp->is_tx = 0; |
97fed795 | 343 | at86rf230_async_state_change(lp, ctx, STATE_RX_AACK_ON, NULL, false); |
955aee8b | 344 | ieee802154_wake_queue(lp->hw); |
1d15d6b5 AA |
345 | } |
346 | ||
fc50c6e3 | 347 | static inline void |
1d15d6b5 AA |
348 | at86rf230_async_error(struct at86rf230_local *lp, |
349 | struct at86rf230_state_change *ctx, int rc) | |
350 | { | |
351 | dev_err(&lp->spi->dev, "spi_async error %d\n", rc); | |
352 | ||
353 | at86rf230_async_state_change(lp, ctx, STATE_FORCE_TRX_OFF, | |
97fed795 | 354 | at86rf230_async_error_recover, false); |
1d15d6b5 AA |
355 | } |
356 | ||
357 | /* Generic function to get some register value in async mode */ | |
97fed795 | 358 | static void |
1d15d6b5 AA |
359 | at86rf230_async_read_reg(struct at86rf230_local *lp, const u8 reg, |
360 | struct at86rf230_state_change *ctx, | |
97fed795 AA |
361 | void (*complete)(void *context), |
362 | const bool irq_enable) | |
7b8e19b6 | 363 | { |
97fed795 AA |
364 | int rc; |
365 | ||
1d15d6b5 AA |
366 | u8 *tx_buf = ctx->buf; |
367 | ||
368 | tx_buf[0] = (reg & CMD_REG_MASK) | CMD_REG; | |
1d15d6b5 | 369 | ctx->msg.complete = complete; |
97fed795 AA |
370 | ctx->irq_enable = irq_enable; |
371 | rc = spi_async(lp->spi, &ctx->msg); | |
372 | if (rc) { | |
373 | if (irq_enable) | |
cca990c8 | 374 | enable_irq(ctx->irq); |
97fed795 AA |
375 | |
376 | at86rf230_async_error(lp, ctx, rc); | |
377 | } | |
1d15d6b5 AA |
378 | } |
379 | ||
dce481e6 AA |
380 | static inline u8 at86rf230_state_to_force(u8 state) |
381 | { | |
382 | if (state == STATE_TX_ON) | |
383 | return STATE_FORCE_TX_ON; | |
384 | else | |
385 | return STATE_FORCE_TRX_OFF; | |
386 | } | |
387 | ||
1d15d6b5 AA |
388 | static void |
389 | at86rf230_async_state_assert(void *context) | |
390 | { | |
391 | struct at86rf230_state_change *ctx = context; | |
392 | struct at86rf230_local *lp = ctx->lp; | |
393 | const u8 *buf = ctx->buf; | |
4748e86e | 394 | const u8 trx_state = buf[1] & TRX_STATE_MASK; |
1d15d6b5 AA |
395 | |
396 | /* Assert state change */ | |
397 | if (trx_state != ctx->to_state) { | |
398 | /* Special handling if transceiver state is in | |
399 | * STATE_BUSY_RX_AACK and a SHR was detected. | |
400 | */ | |
401 | if (trx_state == STATE_BUSY_RX_AACK) { | |
402 | /* Undocumented race condition. If we send a state | |
403 | * change to STATE_RX_AACK_ON the transceiver could | |
404 | * change his state automatically to STATE_BUSY_RX_AACK | |
405 | * if a SHR was detected. This is not an error, but we | |
406 | * can't assert this. | |
407 | */ | |
408 | if (ctx->to_state == STATE_RX_AACK_ON) | |
409 | goto done; | |
410 | ||
411 | /* If we change to STATE_TX_ON without forcing and | |
412 | * transceiver state is STATE_BUSY_RX_AACK, we wait | |
413 | * 'tFrame + tPAck' receiving time. In this time the | |
414 | * PDU should be received. If the transceiver is still | |
415 | * in STATE_BUSY_RX_AACK, we run a force state change | |
416 | * to STATE_TX_ON. This is a timeout handling, if the | |
417 | * transceiver stucks in STATE_BUSY_RX_AACK. | |
ba6d2239 AA |
418 | * |
419 | * Additional we do several retries to try to get into | |
420 | * TX_ON state without forcing. If the retries are | |
421 | * higher or equal than AT86RF2XX_MAX_TX_RETRIES we | |
422 | * will do a force change. | |
1d15d6b5 | 423 | */ |
dce481e6 AA |
424 | if (ctx->to_state == STATE_TX_ON || |
425 | ctx->to_state == STATE_TRX_OFF) { | |
426 | u8 state = ctx->to_state; | |
ba6d2239 AA |
427 | |
428 | if (lp->tx_retry >= AT86RF2XX_MAX_TX_RETRIES) | |
dce481e6 | 429 | state = at86rf230_state_to_force(state); |
ba6d2239 AA |
430 | lp->tx_retry++; |
431 | ||
432 | at86rf230_async_state_change(lp, ctx, state, | |
97fed795 AA |
433 | ctx->complete, |
434 | ctx->irq_enable); | |
1d15d6b5 AA |
435 | return; |
436 | } | |
437 | } | |
438 | ||
1d15d6b5 AA |
439 | dev_warn(&lp->spi->dev, "unexcept state change from 0x%02x to 0x%02x. Actual state: 0x%02x\n", |
440 | ctx->from_state, ctx->to_state, trx_state); | |
441 | } | |
442 | ||
443 | done: | |
444 | if (ctx->complete) | |
445 | ctx->complete(context); | |
446 | } | |
447 | ||
eb3b435e AA |
448 | static enum hrtimer_restart at86rf230_async_state_timer(struct hrtimer *timer) |
449 | { | |
450 | struct at86rf230_state_change *ctx = | |
451 | container_of(timer, struct at86rf230_state_change, timer); | |
452 | struct at86rf230_local *lp = ctx->lp; | |
453 | ||
454 | at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx, | |
455 | at86rf230_async_state_assert, | |
456 | ctx->irq_enable); | |
457 | ||
458 | return HRTIMER_NORESTART; | |
459 | } | |
460 | ||
1d15d6b5 AA |
461 | /* Do state change timing delay. */ |
462 | static void | |
463 | at86rf230_async_state_delay(void *context) | |
464 | { | |
465 | struct at86rf230_state_change *ctx = context; | |
466 | struct at86rf230_local *lp = ctx->lp; | |
467 | struct at86rf2xx_chip_data *c = lp->data; | |
468 | bool force = false; | |
eb3b435e | 469 | ktime_t tim; |
1d15d6b5 AA |
470 | |
471 | /* The force state changes are will show as normal states in the | |
472 | * state status subregister. We change the to_state to the | |
473 | * corresponding one and remember if it was a force change, this | |
474 | * differs if we do a state change from STATE_BUSY_RX_AACK. | |
475 | */ | |
476 | switch (ctx->to_state) { | |
477 | case STATE_FORCE_TX_ON: | |
478 | ctx->to_state = STATE_TX_ON; | |
479 | force = true; | |
480 | break; | |
481 | case STATE_FORCE_TRX_OFF: | |
482 | ctx->to_state = STATE_TRX_OFF; | |
483 | force = true; | |
484 | break; | |
485 | default: | |
486 | break; | |
487 | } | |
488 | ||
489 | switch (ctx->from_state) { | |
2e0571c0 AA |
490 | case STATE_TRX_OFF: |
491 | switch (ctx->to_state) { | |
492 | case STATE_RX_AACK_ON: | |
eb3b435e | 493 | tim = ktime_set(0, c->t_off_to_aack * NSEC_PER_USEC); |
2ad33244 AA |
494 | /* state change from TRX_OFF to RX_AACK_ON to do a |
495 | * calibration, we need to reset the timeout for the | |
496 | * next one. | |
497 | */ | |
498 | lp->cal_timeout = jiffies + AT86RF2XX_CAL_LOOP_TIMEOUT; | |
2e0571c0 | 499 | goto change; |
3b951ca7 | 500 | case STATE_TX_ARET_ON: |
2e0571c0 | 501 | case STATE_TX_ON: |
eb3b435e | 502 | tim = ktime_set(0, c->t_off_to_tx_on * NSEC_PER_USEC); |
3b951ca7 AA |
503 | /* state change from TRX_OFF to TX_ON or ARET_ON to do |
504 | * a calibration, we need to reset the timeout for the | |
dce481e6 AA |
505 | * next one. |
506 | */ | |
507 | lp->cal_timeout = jiffies + AT86RF2XX_CAL_LOOP_TIMEOUT; | |
2e0571c0 AA |
508 | goto change; |
509 | default: | |
510 | break; | |
511 | } | |
512 | break; | |
1d15d6b5 AA |
513 | case STATE_BUSY_RX_AACK: |
514 | switch (ctx->to_state) { | |
dce481e6 | 515 | case STATE_TRX_OFF: |
1d15d6b5 AA |
516 | case STATE_TX_ON: |
517 | /* Wait for worst case receiving time if we | |
518 | * didn't make a force change from BUSY_RX_AACK | |
dce481e6 | 519 | * to TX_ON or TRX_OFF. |
1d15d6b5 AA |
520 | */ |
521 | if (!force) { | |
eb3b435e AA |
522 | tim = ktime_set(0, (c->t_frame + c->t_p_ack) * |
523 | NSEC_PER_USEC); | |
1d15d6b5 AA |
524 | goto change; |
525 | } | |
526 | break; | |
527 | default: | |
528 | break; | |
529 | } | |
530 | break; | |
09e536cd AA |
531 | /* Default value, means RESET state */ |
532 | case STATE_P_ON: | |
533 | switch (ctx->to_state) { | |
534 | case STATE_TRX_OFF: | |
eb3b435e | 535 | tim = ktime_set(0, c->t_reset_to_off * NSEC_PER_USEC); |
09e536cd AA |
536 | goto change; |
537 | default: | |
538 | break; | |
539 | } | |
540 | break; | |
1d15d6b5 AA |
541 | default: |
542 | break; | |
543 | } | |
544 | ||
545 | /* Default delay is 1us in the most cases */ | |
8b44f0dd AA |
546 | udelay(1); |
547 | at86rf230_async_state_timer(&ctx->timer); | |
548 | return; | |
1d15d6b5 AA |
549 | |
550 | change: | |
eb3b435e | 551 | hrtimer_start(&ctx->timer, tim, HRTIMER_MODE_REL); |
1d15d6b5 AA |
552 | } |
553 | ||
554 | static void | |
555 | at86rf230_async_state_change_start(void *context) | |
556 | { | |
557 | struct at86rf230_state_change *ctx = context; | |
558 | struct at86rf230_local *lp = ctx->lp; | |
559 | u8 *buf = ctx->buf; | |
4748e86e | 560 | const u8 trx_state = buf[1] & TRX_STATE_MASK; |
1d15d6b5 AA |
561 | int rc; |
562 | ||
563 | /* Check for "possible" STATE_TRANSITION_IN_PROGRESS */ | |
564 | if (trx_state == STATE_TRANSITION_IN_PROGRESS) { | |
565 | udelay(1); | |
97fed795 AA |
566 | at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx, |
567 | at86rf230_async_state_change_start, | |
568 | ctx->irq_enable); | |
1d15d6b5 AA |
569 | return; |
570 | } | |
571 | ||
572 | /* Check if we already are in the state which we change in */ | |
573 | if (trx_state == ctx->to_state) { | |
574 | if (ctx->complete) | |
575 | ctx->complete(context); | |
576 | return; | |
577 | } | |
578 | ||
579 | /* Set current state to the context of state change */ | |
580 | ctx->from_state = trx_state; | |
581 | ||
582 | /* Going into the next step for a state change which do a timing | |
583 | * relevant delay. | |
584 | */ | |
585 | buf[0] = (RG_TRX_STATE & CMD_REG_MASK) | CMD_REG | CMD_WRITE; | |
586 | buf[1] = ctx->to_state; | |
1d15d6b5 AA |
587 | ctx->msg.complete = at86rf230_async_state_delay; |
588 | rc = spi_async(lp->spi, &ctx->msg); | |
97fed795 AA |
589 | if (rc) { |
590 | if (ctx->irq_enable) | |
cca990c8 | 591 | enable_irq(ctx->irq); |
97fed795 | 592 | |
4fef7d3b | 593 | at86rf230_async_error(lp, ctx, rc); |
97fed795 | 594 | } |
7b8e19b6 | 595 | } |
596 | ||
97fed795 | 597 | static void |
1d15d6b5 AA |
598 | at86rf230_async_state_change(struct at86rf230_local *lp, |
599 | struct at86rf230_state_change *ctx, | |
97fed795 AA |
600 | const u8 state, void (*complete)(void *context), |
601 | const bool irq_enable) | |
7b8e19b6 | 602 | { |
1d15d6b5 AA |
603 | /* Initialization for the state change context */ |
604 | ctx->to_state = state; | |
605 | ctx->complete = complete; | |
97fed795 AA |
606 | ctx->irq_enable = irq_enable; |
607 | at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx, | |
608 | at86rf230_async_state_change_start, | |
609 | irq_enable); | |
1d15d6b5 | 610 | } |
7b8e19b6 | 611 | |
2e0571c0 AA |
612 | static void |
613 | at86rf230_sync_state_change_complete(void *context) | |
614 | { | |
615 | struct at86rf230_state_change *ctx = context; | |
616 | struct at86rf230_local *lp = ctx->lp; | |
617 | ||
618 | complete(&lp->state_complete); | |
619 | } | |
620 | ||
621 | /* This function do a sync framework above the async state change. | |
622 | * Some callbacks of the IEEE 802.15.4 driver interface need to be | |
623 | * handled synchronously. | |
624 | */ | |
625 | static int | |
626 | at86rf230_sync_state_change(struct at86rf230_local *lp, unsigned int state) | |
627 | { | |
3e544ef9 | 628 | unsigned long rc; |
2e0571c0 | 629 | |
97fed795 AA |
630 | at86rf230_async_state_change(lp, &lp->state, state, |
631 | at86rf230_sync_state_change_complete, | |
632 | false); | |
2e0571c0 AA |
633 | |
634 | rc = wait_for_completion_timeout(&lp->state_complete, | |
635 | msecs_to_jiffies(100)); | |
d06c2199 AA |
636 | if (!rc) { |
637 | at86rf230_async_error(lp, &lp->state, -ETIMEDOUT); | |
2e0571c0 | 638 | return -ETIMEDOUT; |
d06c2199 | 639 | } |
2e0571c0 AA |
640 | |
641 | return 0; | |
642 | } | |
643 | ||
1d15d6b5 AA |
644 | static void |
645 | at86rf230_tx_complete(void *context) | |
646 | { | |
647 | struct at86rf230_state_change *ctx = context; | |
648 | struct at86rf230_local *lp = ctx->lp; | |
649 | ||
cca990c8 | 650 | enable_irq(ctx->irq); |
955aee8b | 651 | |
fc0719e6 | 652 | ieee802154_xmit_complete(lp->hw, lp->tx_skb, false); |
1d15d6b5 AA |
653 | } |
654 | ||
655 | static void | |
656 | at86rf230_tx_on(void *context) | |
657 | { | |
658 | struct at86rf230_state_change *ctx = context; | |
659 | struct at86rf230_local *lp = ctx->lp; | |
1d15d6b5 | 660 | |
31fa7434 | 661 | at86rf230_async_state_change(lp, ctx, STATE_RX_AACK_ON, |
97fed795 | 662 | at86rf230_tx_complete, true); |
1d15d6b5 AA |
663 | } |
664 | ||
1d15d6b5 AA |
665 | static void |
666 | at86rf230_tx_trac_check(void *context) | |
667 | { | |
668 | struct at86rf230_state_change *ctx = context; | |
669 | struct at86rf230_local *lp = ctx->lp; | |
670 | const u8 *buf = ctx->buf; | |
671 | const u8 trac = (buf[1] & 0xe0) >> 5; | |
1d15d6b5 AA |
672 | |
673 | /* If trac status is different than zero we need to do a state change | |
2f8cdd95 AA |
674 | * to STATE_FORCE_TRX_OFF then STATE_RX_AACK_ON to recover the |
675 | * transceiver. | |
1d15d6b5 | 676 | */ |
c8c7e3db | 677 | if (trac) |
97fed795 | 678 | at86rf230_async_state_change(lp, ctx, STATE_FORCE_TRX_OFF, |
2f8cdd95 | 679 | at86rf230_tx_on, true); |
c8c7e3db AA |
680 | else |
681 | at86rf230_tx_on(context); | |
1d15d6b5 AA |
682 | } |
683 | ||
1d15d6b5 AA |
684 | static void |
685 | at86rf230_tx_trac_status(void *context) | |
686 | { | |
687 | struct at86rf230_state_change *ctx = context; | |
688 | struct at86rf230_local *lp = ctx->lp; | |
1d15d6b5 | 689 | |
97fed795 AA |
690 | at86rf230_async_read_reg(lp, RG_TRX_STATE, ctx, |
691 | at86rf230_tx_trac_check, true); | |
1d15d6b5 AA |
692 | } |
693 | ||
694 | static void | |
74de4c80 | 695 | at86rf230_rx_read_frame_complete(void *context) |
1d15d6b5 | 696 | { |
74de4c80 AA |
697 | struct at86rf230_state_change *ctx = context; |
698 | struct at86rf230_local *lp = ctx->lp; | |
1d15d6b5 | 699 | u8 rx_local_buf[AT86RF2XX_MAX_BUF]; |
31fa7434 | 700 | const u8 *buf = ctx->buf; |
74de4c80 AA |
701 | struct sk_buff *skb; |
702 | u8 len, lqi; | |
1d15d6b5 | 703 | |
74de4c80 AA |
704 | len = buf[1]; |
705 | if (!ieee802154_is_valid_psdu_len(len)) { | |
706 | dev_vdbg(&lp->spi->dev, "corrupted frame received\n"); | |
707 | len = IEEE802154_MTU; | |
708 | } | |
709 | lqi = buf[2 + len]; | |
710 | ||
711 | memcpy(rx_local_buf, buf + 2, len); | |
263be332 | 712 | ctx->trx.len = 2; |
cca990c8 | 713 | enable_irq(ctx->irq); |
1d15d6b5 | 714 | |
61a22814 | 715 | skb = dev_alloc_skb(IEEE802154_MTU); |
1d15d6b5 AA |
716 | if (!skb) { |
717 | dev_vdbg(&lp->spi->dev, "failed to allocate sk_buff\n"); | |
718 | return; | |
719 | } | |
720 | ||
721 | memcpy(skb_put(skb, len), rx_local_buf, len); | |
b89c3341 | 722 | ieee802154_rx_irqsafe(lp->hw, skb, lqi); |
1d15d6b5 | 723 | } |
7b8e19b6 | 724 | |
97fed795 | 725 | static void |
cca990c8 | 726 | at86rf230_rx_read_frame(void *context) |
1d15d6b5 | 727 | { |
cca990c8 AA |
728 | struct at86rf230_state_change *ctx = context; |
729 | struct at86rf230_local *lp = ctx->lp; | |
31fa7434 | 730 | u8 *buf = ctx->buf; |
97fed795 AA |
731 | int rc; |
732 | ||
7b8e19b6 | 733 | buf[0] = CMD_FB; |
31fa7434 AA |
734 | ctx->trx.len = AT86RF2XX_MAX_BUF; |
735 | ctx->msg.complete = at86rf230_rx_read_frame_complete; | |
736 | rc = spi_async(lp->spi, &ctx->msg); | |
97fed795 | 737 | if (rc) { |
263be332 | 738 | ctx->trx.len = 2; |
cca990c8 | 739 | enable_irq(ctx->irq); |
31fa7434 | 740 | at86rf230_async_error(lp, ctx, rc); |
97fed795 | 741 | } |
1d15d6b5 AA |
742 | } |
743 | ||
744 | static void | |
745 | at86rf230_rx_trac_check(void *context) | |
746 | { | |
1d15d6b5 AA |
747 | /* Possible check on trac status here. This could be useful to make |
748 | * some stats why receive is failed. Not used at the moment, but it's | |
749 | * maybe timing relevant. Datasheet doesn't say anything about this. | |
750 | * The programming guide say do it so. | |
751 | */ | |
752 | ||
cca990c8 | 753 | at86rf230_rx_read_frame(context); |
1d15d6b5 AA |
754 | } |
755 | ||
97fed795 | 756 | static void |
1d15d6b5 AA |
757 | at86rf230_irq_trx_end(struct at86rf230_local *lp) |
758 | { | |
1d15d6b5 AA |
759 | if (lp->is_tx) { |
760 | lp->is_tx = 0; | |
fc0719e6 AA |
761 | at86rf230_async_state_change(lp, &lp->irq, |
762 | STATE_FORCE_TX_ON, | |
763 | at86rf230_tx_trac_status, | |
764 | true); | |
1d15d6b5 | 765 | } else { |
97fed795 AA |
766 | at86rf230_async_read_reg(lp, RG_TRX_STATE, &lp->irq, |
767 | at86rf230_rx_trac_check, true); | |
1d15d6b5 AA |
768 | } |
769 | } | |
770 | ||
771 | static void | |
772 | at86rf230_irq_status(void *context) | |
773 | { | |
774 | struct at86rf230_state_change *ctx = context; | |
775 | struct at86rf230_local *lp = ctx->lp; | |
31fa7434 | 776 | const u8 *buf = ctx->buf; |
1d15d6b5 | 777 | const u8 irq = buf[1]; |
1d15d6b5 AA |
778 | |
779 | if (irq & IRQ_TRX_END) { | |
97fed795 | 780 | at86rf230_irq_trx_end(lp); |
1d15d6b5 | 781 | } else { |
cca990c8 | 782 | enable_irq(ctx->irq); |
1d15d6b5 AA |
783 | dev_err(&lp->spi->dev, "not supported irq %02x received\n", |
784 | irq); | |
785 | } | |
786 | } | |
787 | ||
788 | static irqreturn_t at86rf230_isr(int irq, void *data) | |
789 | { | |
790 | struct at86rf230_local *lp = data; | |
791 | struct at86rf230_state_change *ctx = &lp->irq; | |
792 | u8 *buf = ctx->buf; | |
793 | int rc; | |
794 | ||
90566363 | 795 | disable_irq_nosync(irq); |
1d15d6b5 AA |
796 | |
797 | buf[0] = (RG_IRQ_STATUS & CMD_REG_MASK) | CMD_REG; | |
1d15d6b5 AA |
798 | ctx->msg.complete = at86rf230_irq_status; |
799 | rc = spi_async(lp->spi, &ctx->msg); | |
800 | if (rc) { | |
e9310211 | 801 | enable_irq(irq); |
1d15d6b5 AA |
802 | at86rf230_async_error(lp, ctx, rc); |
803 | return IRQ_NONE; | |
804 | } | |
805 | ||
806 | return IRQ_HANDLED; | |
807 | } | |
808 | ||
809 | static void | |
810 | at86rf230_write_frame_complete(void *context) | |
811 | { | |
812 | struct at86rf230_state_change *ctx = context; | |
813 | struct at86rf230_local *lp = ctx->lp; | |
814 | u8 *buf = ctx->buf; | |
815 | int rc; | |
816 | ||
1d15d6b5 | 817 | ctx->trx.len = 2; |
d2c8bf51 AA |
818 | |
819 | if (gpio_is_valid(lp->slp_tr)) { | |
820 | at86rf230_slp_tr_rising_edge(lp); | |
821 | } else { | |
822 | buf[0] = (RG_TRX_STATE & CMD_REG_MASK) | CMD_REG | CMD_WRITE; | |
823 | buf[1] = STATE_BUSY_TX; | |
824 | ctx->msg.complete = NULL; | |
825 | rc = spi_async(lp->spi, &ctx->msg); | |
826 | if (rc) | |
827 | at86rf230_async_error(lp, ctx, rc); | |
828 | } | |
1d15d6b5 AA |
829 | } |
830 | ||
831 | static void | |
832 | at86rf230_write_frame(void *context) | |
833 | { | |
834 | struct at86rf230_state_change *ctx = context; | |
835 | struct at86rf230_local *lp = ctx->lp; | |
836 | struct sk_buff *skb = lp->tx_skb; | |
31fa7434 | 837 | u8 *buf = ctx->buf; |
1d15d6b5 AA |
838 | int rc; |
839 | ||
1d15d6b5 | 840 | lp->is_tx = 1; |
1d15d6b5 AA |
841 | |
842 | buf[0] = CMD_FB | CMD_WRITE; | |
843 | buf[1] = skb->len + 2; | |
844 | memcpy(buf + 2, skb->data, skb->len); | |
31fa7434 AA |
845 | ctx->trx.len = skb->len + 2; |
846 | ctx->msg.complete = at86rf230_write_frame_complete; | |
847 | rc = spi_async(lp->spi, &ctx->msg); | |
263be332 AA |
848 | if (rc) { |
849 | ctx->trx.len = 2; | |
1d15d6b5 | 850 | at86rf230_async_error(lp, ctx, rc); |
263be332 | 851 | } |
1d15d6b5 AA |
852 | } |
853 | ||
854 | static void | |
855 | at86rf230_xmit_tx_on(void *context) | |
856 | { | |
857 | struct at86rf230_state_change *ctx = context; | |
858 | struct at86rf230_local *lp = ctx->lp; | |
7b8e19b6 | 859 | |
97fed795 AA |
860 | at86rf230_async_state_change(lp, ctx, STATE_TX_ARET_ON, |
861 | at86rf230_write_frame, false); | |
1d15d6b5 AA |
862 | } |
863 | ||
dce481e6 AA |
864 | static void |
865 | at86rf230_xmit_start(void *context) | |
1d15d6b5 | 866 | { |
dce481e6 AA |
867 | struct at86rf230_state_change *ctx = context; |
868 | struct at86rf230_local *lp = ctx->lp; | |
7b8e19b6 | 869 | |
fc0719e6 AA |
870 | /* check if we change from off state */ |
871 | if (lp->is_tx_from_off) { | |
872 | lp->is_tx_from_off = false; | |
873 | at86rf230_async_state_change(lp, ctx, STATE_TX_ARET_ON, | |
874 | at86rf230_write_frame, | |
875 | false); | |
85009203 | 876 | } else { |
dce481e6 | 877 | at86rf230_async_state_change(lp, ctx, STATE_TX_ON, |
fc0719e6 AA |
878 | at86rf230_xmit_tx_on, |
879 | false); | |
85009203 | 880 | } |
dce481e6 AA |
881 | } |
882 | ||
883 | static int | |
884 | at86rf230_xmit(struct ieee802154_hw *hw, struct sk_buff *skb) | |
885 | { | |
886 | struct at86rf230_local *lp = hw->priv; | |
887 | struct at86rf230_state_change *ctx = &lp->tx; | |
7b8e19b6 | 888 | |
dce481e6 | 889 | lp->tx_skb = skb; |
ba6d2239 | 890 | lp->tx_retry = 0; |
dce481e6 AA |
891 | |
892 | /* After 5 minutes in PLL and the same frequency we run again the | |
893 | * calibration loops which is recommended by at86rf2xx datasheets. | |
894 | * | |
895 | * The calibration is initiate by a state change from TRX_OFF | |
896 | * to TX_ON, the lp->cal_timeout should be reinit by state_delay | |
897 | * function then to start in the next 5 minutes. | |
898 | */ | |
85009203 AA |
899 | if (time_is_before_jiffies(lp->cal_timeout)) { |
900 | lp->is_tx_from_off = true; | |
dce481e6 AA |
901 | at86rf230_async_state_change(lp, ctx, STATE_TRX_OFF, |
902 | at86rf230_xmit_start, false); | |
85009203 | 903 | } else { |
dce481e6 | 904 | at86rf230_xmit_start(ctx); |
85009203 | 905 | } |
97fed795 | 906 | |
1d15d6b5 | 907 | return 0; |
7b8e19b6 | 908 | } |
909 | ||
910 | static int | |
5a504397 | 911 | at86rf230_ed(struct ieee802154_hw *hw, u8 *level) |
7b8e19b6 | 912 | { |
7b8e19b6 | 913 | BUG_ON(!level); |
914 | *level = 0xbe; | |
915 | return 0; | |
916 | } | |
917 | ||
7b8e19b6 | 918 | static int |
5a504397 | 919 | at86rf230_start(struct ieee802154_hw *hw) |
7b8e19b6 | 920 | { |
e6f7ed9d AA |
921 | struct at86rf230_local *lp = hw->priv; |
922 | ||
cbe62346 | 923 | at86rf230_awake(lp); |
e6f7ed9d AA |
924 | enable_irq(lp->spi->irq); |
925 | ||
30811fa6 | 926 | return at86rf230_sync_state_change(lp, STATE_RX_AACK_ON); |
7b8e19b6 | 927 | } |
928 | ||
929 | static void | |
5a504397 | 930 | at86rf230_stop(struct ieee802154_hw *hw) |
7b8e19b6 | 931 | { |
e6f7ed9d | 932 | struct at86rf230_local *lp = hw->priv; |
74ed9d98 | 933 | u8 csma_seed[2]; |
e6f7ed9d | 934 | |
30811fa6 | 935 | at86rf230_sync_state_change(lp, STATE_FORCE_TRX_OFF); |
e6f7ed9d AA |
936 | |
937 | disable_irq(lp->spi->irq); | |
74ed9d98 AA |
938 | |
939 | /* It's recommended to set random new csma_seeds before sleep state. | |
940 | * Makes only sense in the stop callback, not doing this inside of | |
941 | * at86rf230_sleep, this is also used when we don't transmit afterwards | |
942 | * when calling start callback again. | |
943 | */ | |
944 | get_random_bytes(csma_seed, ARRAY_SIZE(csma_seed)); | |
945 | at86rf230_write_subreg(lp, SR_CSMA_SEED_0, csma_seed[0]); | |
946 | at86rf230_write_subreg(lp, SR_CSMA_SEED_1, csma_seed[1]); | |
947 | ||
cbe62346 | 948 | at86rf230_sleep(lp); |
7b8e19b6 | 949 | } |
950 | ||
8fad346f | 951 | static int |
e37d2ec8 | 952 | at86rf23x_set_channel(struct at86rf230_local *lp, u8 page, u8 channel) |
8fad346f PB |
953 | { |
954 | return at86rf230_write_subreg(lp, SR_CHANNEL, channel); | |
955 | } | |
956 | ||
2d9fe7ab AA |
957 | #define AT86RF2XX_MAX_ED_LEVELS 0xF |
958 | static const s32 at86rf23x_ed_levels[AT86RF2XX_MAX_ED_LEVELS + 1] = { | |
959 | -9100, -8900, -8700, -8500, -8300, -8100, -7900, -7700, -7500, -7300, | |
960 | -7100, -6900, -6700, -6500, -6300, -6100, | |
961 | }; | |
962 | ||
963 | static const s32 at86rf212_ed_levels_100[AT86RF2XX_MAX_ED_LEVELS + 1] = { | |
964 | -10000, -9800, -9600, -9400, -9200, -9000, -8800, -8600, -8400, -8200, | |
179655fc | 965 | -8000, -7800, -7600, -7400, -7200, -7000, |
2d9fe7ab AA |
966 | }; |
967 | ||
968 | static const s32 at86rf212_ed_levels_98[AT86RF2XX_MAX_ED_LEVELS + 1] = { | |
969 | -9800, -9600, -9400, -9200, -9000, -8800, -8600, -8400, -8200, -8000, | |
179655fc | 970 | -7800, -7600, -7400, -7200, -7000, -6800, |
2d9fe7ab AA |
971 | }; |
972 | ||
973 | static inline int | |
974 | at86rf212_update_cca_ed_level(struct at86rf230_local *lp, int rssi_base_val) | |
975 | { | |
976 | unsigned int cca_ed_thres; | |
977 | int rc; | |
978 | ||
979 | rc = at86rf230_read_subreg(lp, SR_CCA_ED_THRES, &cca_ed_thres); | |
980 | if (rc < 0) | |
981 | return rc; | |
982 | ||
983 | switch (rssi_base_val) { | |
984 | case -98: | |
985 | lp->hw->phy->supported.cca_ed_levels = at86rf212_ed_levels_98; | |
986 | lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf212_ed_levels_98); | |
987 | lp->hw->phy->cca_ed_level = at86rf212_ed_levels_98[cca_ed_thres]; | |
988 | break; | |
989 | case -100: | |
990 | lp->hw->phy->supported.cca_ed_levels = at86rf212_ed_levels_100; | |
991 | lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf212_ed_levels_100); | |
992 | lp->hw->phy->cca_ed_level = at86rf212_ed_levels_100[cca_ed_thres]; | |
993 | break; | |
994 | default: | |
995 | WARN_ON(1); | |
996 | } | |
997 | ||
998 | return 0; | |
999 | } | |
1000 | ||
8fad346f | 1001 | static int |
e37d2ec8 | 1002 | at86rf212_set_channel(struct at86rf230_local *lp, u8 page, u8 channel) |
8fad346f PB |
1003 | { |
1004 | int rc; | |
1005 | ||
1006 | if (channel == 0) | |
1007 | rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 0); | |
1008 | else | |
1009 | rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 1); | |
1010 | if (rc < 0) | |
1011 | return rc; | |
1012 | ||
6ca00197 | 1013 | if (page == 0) { |
643e53c2 | 1014 | rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 0); |
a53d1f7c | 1015 | lp->data->rssi_base_val = -100; |
6ca00197 | 1016 | } else { |
643e53c2 | 1017 | rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 1); |
a53d1f7c | 1018 | lp->data->rssi_base_val = -98; |
6ca00197 | 1019 | } |
643e53c2 PB |
1020 | if (rc < 0) |
1021 | return rc; | |
1022 | ||
2d9fe7ab AA |
1023 | rc = at86rf212_update_cca_ed_level(lp, lp->data->rssi_base_val); |
1024 | if (rc < 0) | |
1025 | return rc; | |
1026 | ||
24ccb9f4 AA |
1027 | /* This sets the symbol_duration according frequency on the 212. |
1028 | * TODO move this handling while set channel and page in cfg802154. | |
1029 | * We can do that, this timings are according 802.15.4 standard. | |
1030 | * If we do that in cfg802154, this is a more generic calculation. | |
1031 | * | |
1032 | * This should also protected from ifs_timer. Means cancel timer and | |
1033 | * init with a new value. For now, this is okay. | |
1034 | */ | |
1035 | if (channel == 0) { | |
1036 | if (page == 0) { | |
1037 | /* SUB:0 and BPSK:0 -> BPSK-20 */ | |
1038 | lp->hw->phy->symbol_duration = 50; | |
1039 | } else { | |
1040 | /* SUB:1 and BPSK:0 -> BPSK-40 */ | |
1041 | lp->hw->phy->symbol_duration = 25; | |
1042 | } | |
1043 | } else { | |
1044 | if (page == 0) | |
2d6dde29 | 1045 | /* SUB:0 and BPSK:1 -> OQPSK-100/200/400 */ |
24ccb9f4 AA |
1046 | lp->hw->phy->symbol_duration = 40; |
1047 | else | |
2d6dde29 | 1048 | /* SUB:1 and BPSK:1 -> OQPSK-250/500/1000 */ |
24ccb9f4 AA |
1049 | lp->hw->phy->symbol_duration = 16; |
1050 | } | |
1051 | ||
1052 | lp->hw->phy->lifs_period = IEEE802154_LIFS_PERIOD * | |
1053 | lp->hw->phy->symbol_duration; | |
1054 | lp->hw->phy->sifs_period = IEEE802154_SIFS_PERIOD * | |
1055 | lp->hw->phy->symbol_duration; | |
1056 | ||
8fad346f PB |
1057 | return at86rf230_write_subreg(lp, SR_CHANNEL, channel); |
1058 | } | |
1059 | ||
7b8e19b6 | 1060 | static int |
e37d2ec8 | 1061 | at86rf230_channel(struct ieee802154_hw *hw, u8 page, u8 channel) |
7b8e19b6 | 1062 | { |
5a504397 | 1063 | struct at86rf230_local *lp = hw->priv; |
7b8e19b6 | 1064 | int rc; |
1065 | ||
a53d1f7c | 1066 | rc = lp->data->set_channel(lp, page, channel); |
984e0c68 AA |
1067 | /* Wait for PLL */ |
1068 | usleep_range(lp->data->t_channel_switch, | |
1069 | lp->data->t_channel_switch + 10); | |
dce481e6 AA |
1070 | |
1071 | lp->cal_timeout = jiffies + AT86RF2XX_CAL_LOOP_TIMEOUT; | |
820bd66f | 1072 | return rc; |
7b8e19b6 | 1073 | } |
1074 | ||
1486774d | 1075 | static int |
5a504397 | 1076 | at86rf230_set_hw_addr_filt(struct ieee802154_hw *hw, |
1486774d | 1077 | struct ieee802154_hw_addr_filt *filt, |
1078 | unsigned long changed) | |
1079 | { | |
5a504397 | 1080 | struct at86rf230_local *lp = hw->priv; |
1486774d | 1081 | |
57205c14 | 1082 | if (changed & IEEE802154_AFILT_SADDR_CHANGED) { |
b70ab2e8 PB |
1083 | u16 addr = le16_to_cpu(filt->short_addr); |
1084 | ||
1486774d | 1085 | dev_vdbg(&lp->spi->dev, |
e80fb5ee | 1086 | "at86rf230_set_hw_addr_filt called for saddr\n"); |
b70ab2e8 PB |
1087 | __at86rf230_write(lp, RG_SHORT_ADDR_0, addr); |
1088 | __at86rf230_write(lp, RG_SHORT_ADDR_1, addr >> 8); | |
1486774d | 1089 | } |
1090 | ||
57205c14 | 1091 | if (changed & IEEE802154_AFILT_PANID_CHANGED) { |
b70ab2e8 PB |
1092 | u16 pan = le16_to_cpu(filt->pan_id); |
1093 | ||
1486774d | 1094 | dev_vdbg(&lp->spi->dev, |
e80fb5ee | 1095 | "at86rf230_set_hw_addr_filt called for pan id\n"); |
b70ab2e8 PB |
1096 | __at86rf230_write(lp, RG_PAN_ID_0, pan); |
1097 | __at86rf230_write(lp, RG_PAN_ID_1, pan >> 8); | |
1486774d | 1098 | } |
1099 | ||
57205c14 | 1100 | if (changed & IEEE802154_AFILT_IEEEADDR_CHANGED) { |
b70ab2e8 PB |
1101 | u8 i, addr[8]; |
1102 | ||
1103 | memcpy(addr, &filt->ieee_addr, 8); | |
1486774d | 1104 | dev_vdbg(&lp->spi->dev, |
e80fb5ee | 1105 | "at86rf230_set_hw_addr_filt called for IEEE addr\n"); |
b70ab2e8 PB |
1106 | for (i = 0; i < 8; i++) |
1107 | __at86rf230_write(lp, RG_IEEE_ADDR_0 + i, addr[i]); | |
1486774d | 1108 | } |
1109 | ||
57205c14 | 1110 | if (changed & IEEE802154_AFILT_PANC_CHANGED) { |
1486774d | 1111 | dev_vdbg(&lp->spi->dev, |
e80fb5ee | 1112 | "at86rf230_set_hw_addr_filt called for panc change\n"); |
1486774d | 1113 | if (filt->pan_coord) |
1114 | at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 1); | |
1115 | else | |
1116 | at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 0); | |
1117 | } | |
1118 | ||
1119 | return 0; | |
1120 | } | |
1121 | ||
6f4da3f8 AA |
1122 | #define AT86RF23X_MAX_TX_POWERS 0xF |
1123 | static const s32 at86rf233_powers[AT86RF23X_MAX_TX_POWERS + 1] = { | |
1124 | 400, 370, 340, 300, 250, 200, 100, 0, -100, -200, -300, -400, -600, | |
1125 | -800, -1200, -1700, | |
1126 | }; | |
1127 | ||
1128 | static const s32 at86rf231_powers[AT86RF23X_MAX_TX_POWERS + 1] = { | |
1129 | 300, 280, 230, 180, 130, 70, 0, -100, -200, -300, -400, -500, -700, | |
1130 | -900, -1200, -1700, | |
1131 | }; | |
1132 | ||
1133 | #define AT86RF212_MAX_TX_POWERS 0x1F | |
1134 | static const s32 at86rf212_powers[AT86RF212_MAX_TX_POWERS + 1] = { | |
1135 | 500, 400, 300, 200, 100, 0, -100, -200, -300, -400, -500, -600, -700, | |
1136 | -800, -900, -1000, -1100, -1200, -1300, -1400, -1500, -1600, -1700, | |
1137 | -1800, -1900, -2000, -2100, -2200, -2300, -2400, -2500, -2600, | |
1138 | }; | |
1139 | ||
9b2777d6 | 1140 | static int |
6f4da3f8 | 1141 | at86rf23x_set_txpower(struct at86rf230_local *lp, s32 mbm) |
9b2777d6 | 1142 | { |
6f4da3f8 | 1143 | u32 i; |
9b2777d6 | 1144 | |
6f4da3f8 AA |
1145 | for (i = 0; i < lp->hw->phy->supported.tx_powers_size; i++) { |
1146 | if (lp->hw->phy->supported.tx_powers[i] == mbm) | |
1147 | return at86rf230_write_subreg(lp, SR_TX_PWR_23X, i); | |
1148 | } | |
1149 | ||
1150 | return -EINVAL; | |
1151 | } | |
1152 | ||
1153 | static int | |
1154 | at86rf212_set_txpower(struct at86rf230_local *lp, s32 mbm) | |
1155 | { | |
1156 | u32 i; | |
1157 | ||
1158 | for (i = 0; i < lp->hw->phy->supported.tx_powers_size; i++) { | |
1159 | if (lp->hw->phy->supported.tx_powers[i] == mbm) | |
1160 | return at86rf230_write_subreg(lp, SR_TX_PWR_212, i); | |
1161 | } | |
9b2777d6 | 1162 | |
6f4da3f8 AA |
1163 | return -EINVAL; |
1164 | } | |
1165 | ||
1166 | static int | |
1167 | at86rf230_set_txpower(struct ieee802154_hw *hw, s32 mbm) | |
1168 | { | |
1169 | struct at86rf230_local *lp = hw->priv; | |
9b2777d6 | 1170 | |
6f4da3f8 | 1171 | return lp->data->set_txpower(lp, mbm); |
9b2777d6 PB |
1172 | } |
1173 | ||
84dda3c6 | 1174 | static int |
5a504397 | 1175 | at86rf230_set_lbt(struct ieee802154_hw *hw, bool on) |
84dda3c6 | 1176 | { |
5a504397 | 1177 | struct at86rf230_local *lp = hw->priv; |
84dda3c6 PB |
1178 | |
1179 | return at86rf230_write_subreg(lp, SR_CSMA_LBT_MODE, on); | |
1180 | } | |
1181 | ||
ba08fea5 | 1182 | static int |
7fe9a388 AA |
1183 | at86rf230_set_cca_mode(struct ieee802154_hw *hw, |
1184 | const struct wpan_phy_cca *cca) | |
ba08fea5 | 1185 | { |
5a504397 | 1186 | struct at86rf230_local *lp = hw->priv; |
7fe9a388 | 1187 | u8 val; |
ba08fea5 | 1188 | |
7fe9a388 AA |
1189 | /* mapping 802.15.4 to driver spec */ |
1190 | switch (cca->mode) { | |
1191 | case NL802154_CCA_ENERGY: | |
1192 | val = 1; | |
1193 | break; | |
1194 | case NL802154_CCA_CARRIER: | |
1195 | val = 2; | |
1196 | break; | |
1197 | case NL802154_CCA_ENERGY_CARRIER: | |
1198 | switch (cca->opt) { | |
1199 | case NL802154_CCA_OPT_ENERGY_CARRIER_AND: | |
1200 | val = 3; | |
1201 | break; | |
1202 | case NL802154_CCA_OPT_ENERGY_CARRIER_OR: | |
1203 | val = 0; | |
1204 | break; | |
1205 | default: | |
1206 | return -EINVAL; | |
1207 | } | |
1208 | break; | |
1209 | default: | |
1210 | return -EINVAL; | |
1211 | } | |
1212 | ||
1213 | return at86rf230_write_subreg(lp, SR_CCA_MODE, val); | |
ba08fea5 PB |
1214 | } |
1215 | ||
a7d7eda9 | 1216 | |
6ca00197 | 1217 | static int |
32b23550 | 1218 | at86rf230_set_cca_ed_level(struct ieee802154_hw *hw, s32 mbm) |
6ca00197 | 1219 | { |
5a504397 | 1220 | struct at86rf230_local *lp = hw->priv; |
2d9fe7ab | 1221 | u32 i; |
6ca00197 | 1222 | |
2d9fe7ab AA |
1223 | for (i = 0; i < hw->phy->supported.cca_ed_levels_size; i++) { |
1224 | if (hw->phy->supported.cca_ed_levels[i] == mbm) | |
1225 | return at86rf230_write_subreg(lp, SR_CCA_ED_THRES, i); | |
1226 | } | |
6ca00197 | 1227 | |
2d9fe7ab | 1228 | return -EINVAL; |
6ca00197 PB |
1229 | } |
1230 | ||
f2fdd67c | 1231 | static int |
5a504397 | 1232 | at86rf230_set_csma_params(struct ieee802154_hw *hw, u8 min_be, u8 max_be, |
f2fdd67c PB |
1233 | u8 retries) |
1234 | { | |
5a504397 | 1235 | struct at86rf230_local *lp = hw->priv; |
f2fdd67c PB |
1236 | int rc; |
1237 | ||
f2fdd67c PB |
1238 | rc = at86rf230_write_subreg(lp, SR_MIN_BE, min_be); |
1239 | if (rc) | |
1240 | return rc; | |
1241 | ||
1242 | rc = at86rf230_write_subreg(lp, SR_MAX_BE, max_be); | |
1243 | if (rc) | |
1244 | return rc; | |
1245 | ||
39d7f320 | 1246 | return at86rf230_write_subreg(lp, SR_MAX_CSMA_RETRIES, retries); |
f2fdd67c PB |
1247 | } |
1248 | ||
1249 | static int | |
5a504397 | 1250 | at86rf230_set_frame_retries(struct ieee802154_hw *hw, s8 retries) |
f2fdd67c | 1251 | { |
5a504397 | 1252 | struct at86rf230_local *lp = hw->priv; |
f2fdd67c | 1253 | |
fc0719e6 | 1254 | return at86rf230_write_subreg(lp, SR_MAX_FRAME_RETRIES, retries); |
f2fdd67c PB |
1255 | } |
1256 | ||
92f45f54 AA |
1257 | static int |
1258 | at86rf230_set_promiscuous_mode(struct ieee802154_hw *hw, const bool on) | |
1259 | { | |
1260 | struct at86rf230_local *lp = hw->priv; | |
1261 | int rc; | |
1262 | ||
1263 | if (on) { | |
1264 | rc = at86rf230_write_subreg(lp, SR_AACK_DIS_ACK, 1); | |
1265 | if (rc < 0) | |
1266 | return rc; | |
1267 | ||
1268 | rc = at86rf230_write_subreg(lp, SR_AACK_PROM_MODE, 1); | |
1269 | if (rc < 0) | |
1270 | return rc; | |
1271 | } else { | |
1272 | rc = at86rf230_write_subreg(lp, SR_AACK_PROM_MODE, 0); | |
1273 | if (rc < 0) | |
1274 | return rc; | |
1275 | ||
1276 | rc = at86rf230_write_subreg(lp, SR_AACK_DIS_ACK, 0); | |
1277 | if (rc < 0) | |
1278 | return rc; | |
1279 | } | |
1280 | ||
1281 | return 0; | |
1282 | } | |
1283 | ||
16301861 | 1284 | static const struct ieee802154_ops at86rf230_ops = { |
7b8e19b6 | 1285 | .owner = THIS_MODULE, |
955aee8b | 1286 | .xmit_async = at86rf230_xmit, |
7b8e19b6 | 1287 | .ed = at86rf230_ed, |
1288 | .set_channel = at86rf230_channel, | |
1289 | .start = at86rf230_start, | |
1290 | .stop = at86rf230_stop, | |
1486774d | 1291 | .set_hw_addr_filt = at86rf230_set_hw_addr_filt, |
640985ec AA |
1292 | .set_txpower = at86rf230_set_txpower, |
1293 | .set_lbt = at86rf230_set_lbt, | |
1294 | .set_cca_mode = at86rf230_set_cca_mode, | |
1295 | .set_cca_ed_level = at86rf230_set_cca_ed_level, | |
1296 | .set_csma_params = at86rf230_set_csma_params, | |
1297 | .set_frame_retries = at86rf230_set_frame_retries, | |
92f45f54 | 1298 | .set_promiscuous_mode = at86rf230_set_promiscuous_mode, |
8fad346f PB |
1299 | }; |
1300 | ||
a53d1f7c | 1301 | static struct at86rf2xx_chip_data at86rf233_data = { |
7a4ef918 | 1302 | .t_sleep_cycle = 330, |
984e0c68 | 1303 | .t_channel_switch = 11, |
09e536cd | 1304 | .t_reset_to_off = 26, |
2e0571c0 AA |
1305 | .t_off_to_aack = 80, |
1306 | .t_off_to_tx_on = 80, | |
e6f7ed9d AA |
1307 | .t_off_to_sleep = 35, |
1308 | .t_sleep_to_off = 210, | |
1d15d6b5 AA |
1309 | .t_frame = 4096, |
1310 | .t_p_ack = 545, | |
a53d1f7c AA |
1311 | .rssi_base_val = -91, |
1312 | .set_channel = at86rf23x_set_channel, | |
6f4da3f8 | 1313 | .set_txpower = at86rf23x_set_txpower, |
a53d1f7c AA |
1314 | }; |
1315 | ||
1316 | static struct at86rf2xx_chip_data at86rf231_data = { | |
7a4ef918 | 1317 | .t_sleep_cycle = 330, |
984e0c68 | 1318 | .t_channel_switch = 24, |
09e536cd | 1319 | .t_reset_to_off = 37, |
2e0571c0 AA |
1320 | .t_off_to_aack = 110, |
1321 | .t_off_to_tx_on = 110, | |
e6f7ed9d AA |
1322 | .t_off_to_sleep = 35, |
1323 | .t_sleep_to_off = 380, | |
1d15d6b5 AA |
1324 | .t_frame = 4096, |
1325 | .t_p_ack = 545, | |
a53d1f7c AA |
1326 | .rssi_base_val = -91, |
1327 | .set_channel = at86rf23x_set_channel, | |
6f4da3f8 | 1328 | .set_txpower = at86rf23x_set_txpower, |
a53d1f7c AA |
1329 | }; |
1330 | ||
1331 | static struct at86rf2xx_chip_data at86rf212_data = { | |
7a4ef918 | 1332 | .t_sleep_cycle = 330, |
984e0c68 | 1333 | .t_channel_switch = 11, |
09e536cd | 1334 | .t_reset_to_off = 26, |
2e0571c0 AA |
1335 | .t_off_to_aack = 200, |
1336 | .t_off_to_tx_on = 200, | |
e6f7ed9d AA |
1337 | .t_off_to_sleep = 35, |
1338 | .t_sleep_to_off = 380, | |
1d15d6b5 AA |
1339 | .t_frame = 4096, |
1340 | .t_p_ack = 545, | |
a53d1f7c AA |
1341 | .rssi_base_val = -100, |
1342 | .set_channel = at86rf212_set_channel, | |
6f4da3f8 | 1343 | .set_txpower = at86rf212_set_txpower, |
a53d1f7c AA |
1344 | }; |
1345 | ||
ccdaeb2b | 1346 | static int at86rf230_hw_init(struct at86rf230_local *lp, u8 xtal_trim) |
7b8e19b6 | 1347 | { |
1db0558e | 1348 | int rc, irq_type, irq_pol = IRQ_ACTIVE_HIGH; |
f76014f7 | 1349 | unsigned int dvdd; |
f2fdd67c | 1350 | u8 csma_seed[2]; |
7b8e19b6 | 1351 | |
09e536cd | 1352 | rc = at86rf230_sync_state_change(lp, STATE_FORCE_TRX_OFF); |
7dcbd22a PB |
1353 | if (rc) |
1354 | return rc; | |
7b8e19b6 | 1355 | |
4af619ae | 1356 | irq_type = irq_get_trigger_type(lp->spi->irq); |
c91799c5 AA |
1357 | if (irq_type == IRQ_TYPE_EDGE_RISING || |
1358 | irq_type == IRQ_TYPE_EDGE_FALLING) | |
1359 | dev_warn(&lp->spi->dev, | |
1360 | "Using edge triggered irq's are not recommended!\n"); | |
702d211c AA |
1361 | if (irq_type == IRQ_TYPE_EDGE_FALLING || |
1362 | irq_type == IRQ_TYPE_LEVEL_LOW) | |
43b5abe0 | 1363 | irq_pol = IRQ_ACTIVE_LOW; |
43b5abe0 | 1364 | |
18c65049 | 1365 | rc = at86rf230_write_subreg(lp, SR_IRQ_POLARITY, irq_pol); |
43b5abe0 SH |
1366 | if (rc) |
1367 | return rc; | |
1368 | ||
6bd2b132 AA |
1369 | rc = at86rf230_write_subreg(lp, SR_RX_SAFE_MODE, 1); |
1370 | if (rc) | |
1371 | return rc; | |
1372 | ||
057dad6f | 1373 | rc = at86rf230_write_subreg(lp, SR_IRQ_MASK, IRQ_TRX_END); |
7b8e19b6 | 1374 | if (rc) |
1375 | return rc; | |
1376 | ||
be64f076 AA |
1377 | /* reset values differs in at86rf231 and at86rf233 */ |
1378 | rc = at86rf230_write_subreg(lp, SR_IRQ_MASK_MODE, 0); | |
1379 | if (rc) | |
1380 | return rc; | |
1381 | ||
f2fdd67c PB |
1382 | get_random_bytes(csma_seed, ARRAY_SIZE(csma_seed)); |
1383 | rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_0, csma_seed[0]); | |
1384 | if (rc) | |
1385 | return rc; | |
1386 | rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_1, csma_seed[1]); | |
1387 | if (rc) | |
1388 | return rc; | |
1389 | ||
7b8e19b6 | 1390 | /* CLKM changes are applied immediately */ |
1391 | rc = at86rf230_write_subreg(lp, SR_CLKM_SHA_SEL, 0x00); | |
1392 | if (rc) | |
1393 | return rc; | |
1394 | ||
1395 | /* Turn CLKM Off */ | |
1396 | rc = at86rf230_write_subreg(lp, SR_CLKM_CTRL, 0x00); | |
1397 | if (rc) | |
1398 | return rc; | |
1399 | /* Wait the next SLEEP cycle */ | |
7a4ef918 AA |
1400 | usleep_range(lp->data->t_sleep_cycle, |
1401 | lp->data->t_sleep_cycle + 100); | |
7b8e19b6 | 1402 | |
ccdaeb2b AA |
1403 | /* xtal_trim value is calculated by: |
1404 | * CL = 0.5 * (CX + CTRIM + CPAR) | |
1405 | * | |
1406 | * whereas: | |
1407 | * CL = capacitor of used crystal | |
1408 | * CX = connected capacitors at xtal pins | |
1409 | * CPAR = in all at86rf2xx datasheets this is a constant value 3 pF, | |
1410 | * but this is different on each board setup. You need to fine | |
1411 | * tuning this value via CTRIM. | |
1412 | * CTRIM = variable capacitor setting. Resolution is 0.3 pF range is | |
1413 | * 0 pF upto 4.5 pF. | |
1414 | * | |
1415 | * Examples: | |
1416 | * atben transceiver: | |
1417 | * | |
1418 | * CL = 8 pF | |
1419 | * CX = 12 pF | |
1420 | * CPAR = 3 pF (We assume the magic constant from datasheet) | |
1421 | * CTRIM = 0.9 pF | |
1422 | * | |
1423 | * (12+0.9+3)/2 = 7.95 which is nearly at 8 pF | |
1424 | * | |
1425 | * xtal_trim = 0x3 | |
1426 | * | |
1427 | * openlabs transceiver: | |
1428 | * | |
1429 | * CL = 16 pF | |
1430 | * CX = 22 pF | |
1431 | * CPAR = 3 pF (We assume the magic constant from datasheet) | |
1432 | * CTRIM = 4.5 pF | |
1433 | * | |
1434 | * (22+4.5+3)/2 = 14.75 which is the nearest value to 16 pF | |
1435 | * | |
1436 | * xtal_trim = 0xf | |
1437 | */ | |
1438 | rc = at86rf230_write_subreg(lp, SR_XTAL_TRIM, xtal_trim); | |
1439 | if (rc) | |
1440 | return rc; | |
1441 | ||
1cc9fc53 | 1442 | rc = at86rf230_read_subreg(lp, SR_DVDD_OK, &dvdd); |
7b8e19b6 | 1443 | if (rc) |
1444 | return rc; | |
1cc9fc53 | 1445 | if (!dvdd) { |
7b8e19b6 | 1446 | dev_err(&lp->spi->dev, "DVDD error\n"); |
1447 | return -EINVAL; | |
1448 | } | |
1449 | ||
05e3f2f3 AA |
1450 | /* Force setting slotted operation bit to 0. Sometimes the atben |
1451 | * sets this bit and I don't know why. We set this always force | |
1452 | * to zero while probing. | |
1453 | */ | |
6cc6399c | 1454 | return at86rf230_write_subreg(lp, SR_SLOTTED_OPERATION, 0); |
7b8e19b6 | 1455 | } |
1456 | ||
aaa1c4d2 | 1457 | static int |
ccdaeb2b AA |
1458 | at86rf230_get_pdata(struct spi_device *spi, int *rstn, int *slp_tr, |
1459 | u8 *xtal_trim) | |
fa2d3e94 | 1460 | { |
aaa1c4d2 | 1461 | struct at86rf230_platform_data *pdata = spi->dev.platform_data; |
ccdaeb2b | 1462 | int ret; |
fa2d3e94 | 1463 | |
aaa1c4d2 AA |
1464 | if (!IS_ENABLED(CONFIG_OF) || !spi->dev.of_node) { |
1465 | if (!pdata) | |
1466 | return -ENOENT; | |
fa2d3e94 | 1467 | |
aaa1c4d2 AA |
1468 | *rstn = pdata->rstn; |
1469 | *slp_tr = pdata->slp_tr; | |
ccdaeb2b | 1470 | *xtal_trim = pdata->xtal_trim; |
aaa1c4d2 AA |
1471 | return 0; |
1472 | } | |
fa2d3e94 | 1473 | |
aaa1c4d2 AA |
1474 | *rstn = of_get_named_gpio(spi->dev.of_node, "reset-gpio", 0); |
1475 | *slp_tr = of_get_named_gpio(spi->dev.of_node, "sleep-gpio", 0); | |
ccdaeb2b AA |
1476 | ret = of_property_read_u8(spi->dev.of_node, "xtal-trim", xtal_trim); |
1477 | if (ret < 0 && ret != -EINVAL) | |
1478 | return ret; | |
fa2d3e94 | 1479 | |
aaa1c4d2 | 1480 | return 0; |
fa2d3e94 AA |
1481 | } |
1482 | ||
c8ee0f56 AA |
1483 | static int |
1484 | at86rf230_detect_device(struct at86rf230_local *lp) | |
1485 | { | |
1486 | unsigned int part, version, val; | |
1487 | u16 man_id = 0; | |
1488 | const char *chip; | |
1489 | int rc; | |
1490 | ||
1491 | rc = __at86rf230_read(lp, RG_MAN_ID_0, &val); | |
1492 | if (rc) | |
1493 | return rc; | |
1494 | man_id |= val; | |
1495 | ||
1496 | rc = __at86rf230_read(lp, RG_MAN_ID_1, &val); | |
1497 | if (rc) | |
1498 | return rc; | |
1499 | man_id |= (val << 8); | |
1500 | ||
1501 | rc = __at86rf230_read(lp, RG_PART_NUM, &part); | |
1502 | if (rc) | |
1503 | return rc; | |
1504 | ||
7598968d | 1505 | rc = __at86rf230_read(lp, RG_VERSION_NUM, &version); |
c8ee0f56 AA |
1506 | if (rc) |
1507 | return rc; | |
1508 | ||
1509 | if (man_id != 0x001f) { | |
1510 | dev_err(&lp->spi->dev, "Non-Atmel dev found (MAN_ID %02x %02x)\n", | |
1511 | man_id >> 8, man_id & 0xFF); | |
1512 | return -EINVAL; | |
1513 | } | |
1514 | ||
f265be3d | 1515 | lp->hw->flags = IEEE802154_HW_TX_OMIT_CKSUM | |
edea8f7c AA |
1516 | IEEE802154_HW_CSMA_PARAMS | |
1517 | IEEE802154_HW_FRAME_RETRIES | IEEE802154_HW_AFILT | | |
1518 | IEEE802154_HW_PROMISCUOUS; | |
1519 | ||
1520 | lp->hw->phy->flags = WPAN_PHY_FLAG_TXPOWER | | |
1521 | WPAN_PHY_FLAG_CCA_ED_LEVEL | | |
1522 | WPAN_PHY_FLAG_CCA_MODE; | |
c8ee0f56 | 1523 | |
8377d22c AA |
1524 | lp->hw->phy->supported.cca_modes = BIT(NL802154_CCA_ENERGY) | |
1525 | BIT(NL802154_CCA_CARRIER) | BIT(NL802154_CCA_ENERGY_CARRIER); | |
1526 | lp->hw->phy->supported.cca_opts = BIT(NL802154_CCA_OPT_ENERGY_CARRIER_AND) | | |
1527 | BIT(NL802154_CCA_OPT_ENERGY_CARRIER_OR); | |
1528 | ||
2d9fe7ab AA |
1529 | lp->hw->phy->supported.cca_ed_levels = at86rf23x_ed_levels; |
1530 | lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf23x_ed_levels); | |
1531 | ||
b48a7c18 AA |
1532 | lp->hw->phy->cca.mode = NL802154_CCA_ENERGY; |
1533 | ||
c8ee0f56 AA |
1534 | switch (part) { |
1535 | case 2: | |
1536 | chip = "at86rf230"; | |
1537 | rc = -ENOTSUPP; | |
cc643496 | 1538 | goto not_supp; |
c8ee0f56 AA |
1539 | case 3: |
1540 | chip = "at86rf231"; | |
a53d1f7c | 1541 | lp->data = &at86rf231_data; |
72f655e4 | 1542 | lp->hw->phy->supported.channels[0] = 0x7FFF800; |
fe58d016 | 1543 | lp->hw->phy->current_channel = 11; |
24ccb9f4 | 1544 | lp->hw->phy->symbol_duration = 16; |
6f4da3f8 AA |
1545 | lp->hw->phy->supported.tx_powers = at86rf231_powers; |
1546 | lp->hw->phy->supported.tx_powers_size = ARRAY_SIZE(at86rf231_powers); | |
c8ee0f56 AA |
1547 | break; |
1548 | case 7: | |
1549 | chip = "at86rf212"; | |
4ecc8a55 AY |
1550 | lp->data = &at86rf212_data; |
1551 | lp->hw->flags |= IEEE802154_HW_LBT; | |
72f655e4 AA |
1552 | lp->hw->phy->supported.channels[0] = 0x00007FF; |
1553 | lp->hw->phy->supported.channels[2] = 0x00007FF; | |
4ecc8a55 AY |
1554 | lp->hw->phy->current_channel = 5; |
1555 | lp->hw->phy->symbol_duration = 25; | |
8377d22c | 1556 | lp->hw->phy->supported.lbt = NL802154_SUPPORTED_BOOL_BOTH; |
6f4da3f8 AA |
1557 | lp->hw->phy->supported.tx_powers = at86rf212_powers; |
1558 | lp->hw->phy->supported.tx_powers_size = ARRAY_SIZE(at86rf212_powers); | |
2d9fe7ab AA |
1559 | lp->hw->phy->supported.cca_ed_levels = at86rf212_ed_levels_100; |
1560 | lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf212_ed_levels_100); | |
c8ee0f56 AA |
1561 | break; |
1562 | case 11: | |
1563 | chip = "at86rf233"; | |
a53d1f7c | 1564 | lp->data = &at86rf233_data; |
72f655e4 | 1565 | lp->hw->phy->supported.channels[0] = 0x7FFF800; |
fe58d016 | 1566 | lp->hw->phy->current_channel = 13; |
24ccb9f4 | 1567 | lp->hw->phy->symbol_duration = 16; |
6f4da3f8 AA |
1568 | lp->hw->phy->supported.tx_powers = at86rf233_powers; |
1569 | lp->hw->phy->supported.tx_powers_size = ARRAY_SIZE(at86rf233_powers); | |
c8ee0f56 AA |
1570 | break; |
1571 | default: | |
2b8b7e29 | 1572 | chip = "unknown"; |
c8ee0f56 | 1573 | rc = -ENOTSUPP; |
cc643496 | 1574 | goto not_supp; |
c8ee0f56 AA |
1575 | } |
1576 | ||
cc643496 | 1577 | lp->hw->phy->cca_ed_level = lp->hw->phy->supported.cca_ed_levels[7]; |
392f4e67 | 1578 | lp->hw->phy->transmit_power = lp->hw->phy->supported.tx_powers[0]; |
cc643496 AA |
1579 | |
1580 | not_supp: | |
c8ee0f56 AA |
1581 | dev_info(&lp->spi->dev, "Detected %s chip version %d\n", chip, version); |
1582 | ||
1583 | return rc; | |
1584 | } | |
1585 | ||
1d15d6b5 AA |
1586 | static void |
1587 | at86rf230_setup_spi_messages(struct at86rf230_local *lp) | |
1588 | { | |
2e0571c0 | 1589 | lp->state.lp = lp; |
cca990c8 | 1590 | lp->state.irq = lp->spi->irq; |
2e0571c0 AA |
1591 | spi_message_init(&lp->state.msg); |
1592 | lp->state.msg.context = &lp->state; | |
263be332 | 1593 | lp->state.trx.len = 2; |
2e0571c0 AA |
1594 | lp->state.trx.tx_buf = lp->state.buf; |
1595 | lp->state.trx.rx_buf = lp->state.buf; | |
1596 | spi_message_add_tail(&lp->state.trx, &lp->state.msg); | |
eb3b435e AA |
1597 | hrtimer_init(&lp->state.timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); |
1598 | lp->state.timer.function = at86rf230_async_state_timer; | |
2e0571c0 | 1599 | |
1d15d6b5 | 1600 | lp->irq.lp = lp; |
cca990c8 | 1601 | lp->irq.irq = lp->spi->irq; |
1d15d6b5 AA |
1602 | spi_message_init(&lp->irq.msg); |
1603 | lp->irq.msg.context = &lp->irq; | |
263be332 | 1604 | lp->irq.trx.len = 2; |
1d15d6b5 AA |
1605 | lp->irq.trx.tx_buf = lp->irq.buf; |
1606 | lp->irq.trx.rx_buf = lp->irq.buf; | |
1607 | spi_message_add_tail(&lp->irq.trx, &lp->irq.msg); | |
eb3b435e AA |
1608 | hrtimer_init(&lp->irq.timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); |
1609 | lp->irq.timer.function = at86rf230_async_state_timer; | |
1d15d6b5 AA |
1610 | |
1611 | lp->tx.lp = lp; | |
cca990c8 | 1612 | lp->tx.irq = lp->spi->irq; |
1d15d6b5 AA |
1613 | spi_message_init(&lp->tx.msg); |
1614 | lp->tx.msg.context = &lp->tx; | |
263be332 | 1615 | lp->tx.trx.len = 2; |
1d15d6b5 AA |
1616 | lp->tx.trx.tx_buf = lp->tx.buf; |
1617 | lp->tx.trx.rx_buf = lp->tx.buf; | |
1618 | spi_message_add_tail(&lp->tx.trx, &lp->tx.msg); | |
eb3b435e AA |
1619 | hrtimer_init(&lp->tx.timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); |
1620 | lp->tx.timer.function = at86rf230_async_state_timer; | |
1d15d6b5 AA |
1621 | } |
1622 | ||
bb1f4606 | 1623 | static int at86rf230_probe(struct spi_device *spi) |
7b8e19b6 | 1624 | { |
5a504397 | 1625 | struct ieee802154_hw *hw; |
7b8e19b6 | 1626 | struct at86rf230_local *lp; |
f76014f7 | 1627 | unsigned int status; |
aaa1c4d2 | 1628 | int rc, irq_type, rstn, slp_tr; |
e3721749 | 1629 | u8 xtal_trim = 0; |
7b8e19b6 | 1630 | |
1631 | if (!spi->irq) { | |
1632 | dev_err(&spi->dev, "no IRQ specified\n"); | |
1633 | return -EINVAL; | |
1634 | } | |
1635 | ||
ccdaeb2b | 1636 | rc = at86rf230_get_pdata(spi, &rstn, &slp_tr, &xtal_trim); |
aaa1c4d2 AA |
1637 | if (rc < 0) { |
1638 | dev_err(&spi->dev, "failed to parse platform_data: %d\n", rc); | |
1639 | return rc; | |
43b5abe0 SH |
1640 | } |
1641 | ||
aaa1c4d2 AA |
1642 | if (gpio_is_valid(rstn)) { |
1643 | rc = devm_gpio_request_one(&spi->dev, rstn, | |
0679e29b | 1644 | GPIOF_OUT_INIT_HIGH, "rstn"); |
3fa27571 AA |
1645 | if (rc) |
1646 | return rc; | |
1647 | } | |
7b8e19b6 | 1648 | |
aaa1c4d2 AA |
1649 | if (gpio_is_valid(slp_tr)) { |
1650 | rc = devm_gpio_request_one(&spi->dev, slp_tr, | |
0679e29b | 1651 | GPIOF_OUT_INIT_LOW, "slp_tr"); |
7b8e19b6 | 1652 | if (rc) |
0679e29b | 1653 | return rc; |
7b8e19b6 | 1654 | } |
1655 | ||
1656 | /* Reset */ | |
aaa1c4d2 | 1657 | if (gpio_is_valid(rstn)) { |
3fa27571 | 1658 | udelay(1); |
aaa1c4d2 | 1659 | gpio_set_value(rstn, 0); |
3fa27571 | 1660 | udelay(1); |
aaa1c4d2 | 1661 | gpio_set_value(rstn, 1); |
3fa27571 AA |
1662 | usleep_range(120, 240); |
1663 | } | |
7b8e19b6 | 1664 | |
5a504397 AA |
1665 | hw = ieee802154_alloc_hw(sizeof(*lp), &at86rf230_ops); |
1666 | if (!hw) | |
640985ec AA |
1667 | return -ENOMEM; |
1668 | ||
5a504397 AA |
1669 | lp = hw->priv; |
1670 | lp->hw = hw; | |
640985ec | 1671 | lp->spi = spi; |
d2c8bf51 | 1672 | lp->slp_tr = slp_tr; |
5a504397 | 1673 | hw->parent = &spi->dev; |
f6f4e86a | 1674 | ieee802154_random_extended_addr(&hw->phy->perm_extended_addr); |
8fad346f | 1675 | |
f76014f7 AA |
1676 | lp->regmap = devm_regmap_init_spi(spi, &at86rf230_regmap_spi_config); |
1677 | if (IS_ERR(lp->regmap)) { | |
1678 | rc = PTR_ERR(lp->regmap); | |
1679 | dev_err(&spi->dev, "Failed to allocate register map: %d\n", | |
1680 | rc); | |
1681 | goto free_dev; | |
1682 | } | |
1683 | ||
1d15d6b5 AA |
1684 | at86rf230_setup_spi_messages(lp); |
1685 | ||
c8ee0f56 AA |
1686 | rc = at86rf230_detect_device(lp); |
1687 | if (rc < 0) | |
1688 | goto free_dev; | |
1689 | ||
2e0571c0 | 1690 | init_completion(&lp->state_complete); |
8fad346f PB |
1691 | |
1692 | spi_set_drvdata(spi, lp); | |
1693 | ||
ccdaeb2b | 1694 | rc = at86rf230_hw_init(lp, xtal_trim); |
7b8e19b6 | 1695 | if (rc) |
1d15d6b5 | 1696 | goto free_dev; |
7b8e19b6 | 1697 | |
19626946 AA |
1698 | /* Read irq status register to reset irq line */ |
1699 | rc = at86rf230_read_subreg(lp, RG_IRQ_STATUS, 0xff, 0, &status); | |
7b8e19b6 | 1700 | if (rc) |
1d15d6b5 | 1701 | goto free_dev; |
7b8e19b6 | 1702 | |
1d15d6b5 AA |
1703 | irq_type = irq_get_trigger_type(spi->irq); |
1704 | if (!irq_type) | |
9ff19e6f | 1705 | irq_type = IRQF_TRIGGER_HIGH; |
1d15d6b5 AA |
1706 | |
1707 | rc = devm_request_irq(&spi->dev, spi->irq, at86rf230_isr, | |
1708 | IRQF_SHARED | irq_type, dev_name(&spi->dev), lp); | |
057dad6f | 1709 | if (rc) |
1d15d6b5 | 1710 | goto free_dev; |
057dad6f | 1711 | |
e6f7ed9d AA |
1712 | /* disable_irq by default and wait for starting hardware */ |
1713 | disable_irq(spi->irq); | |
1714 | ||
1715 | /* going into sleep by default */ | |
cbe62346 | 1716 | at86rf230_sleep(lp); |
e6f7ed9d | 1717 | |
5a504397 | 1718 | rc = ieee802154_register_hw(lp->hw); |
7b8e19b6 | 1719 | if (rc) |
1d15d6b5 | 1720 | goto free_dev; |
7b8e19b6 | 1721 | |
1722 | return rc; | |
1723 | ||
640985ec | 1724 | free_dev: |
5a504397 | 1725 | ieee802154_free_hw(lp->hw); |
8fad346f | 1726 | |
7b8e19b6 | 1727 | return rc; |
1728 | } | |
1729 | ||
bb1f4606 | 1730 | static int at86rf230_remove(struct spi_device *spi) |
7b8e19b6 | 1731 | { |
1732 | struct at86rf230_local *lp = spi_get_drvdata(spi); | |
1733 | ||
17e84a92 AA |
1734 | /* mask all at86rf230 irq's */ |
1735 | at86rf230_write_subreg(lp, SR_IRQ_MASK, 0); | |
5a504397 AA |
1736 | ieee802154_unregister_hw(lp->hw); |
1737 | ieee802154_free_hw(lp->hw); | |
7b8e19b6 | 1738 | dev_dbg(&spi->dev, "unregistered at86rf230\n"); |
0679e29b | 1739 | |
7b8e19b6 | 1740 | return 0; |
1741 | } | |
1742 | ||
1086b4f6 | 1743 | static const struct of_device_id at86rf230_of_match[] = { |
fa2d3e94 AA |
1744 | { .compatible = "atmel,at86rf230", }, |
1745 | { .compatible = "atmel,at86rf231", }, | |
1746 | { .compatible = "atmel,at86rf233", }, | |
1747 | { .compatible = "atmel,at86rf212", }, | |
1748 | { }, | |
1749 | }; | |
835cb7d2 | 1750 | MODULE_DEVICE_TABLE(of, at86rf230_of_match); |
fa2d3e94 | 1751 | |
90b15520 AA |
1752 | static const struct spi_device_id at86rf230_device_id[] = { |
1753 | { .name = "at86rf230", }, | |
1754 | { .name = "at86rf231", }, | |
1755 | { .name = "at86rf233", }, | |
1756 | { .name = "at86rf212", }, | |
1757 | { }, | |
1758 | }; | |
1759 | MODULE_DEVICE_TABLE(spi, at86rf230_device_id); | |
1760 | ||
7b8e19b6 | 1761 | static struct spi_driver at86rf230_driver = { |
90b15520 | 1762 | .id_table = at86rf230_device_id, |
7b8e19b6 | 1763 | .driver = { |
fa2d3e94 | 1764 | .of_match_table = of_match_ptr(at86rf230_of_match), |
7b8e19b6 | 1765 | .name = "at86rf230", |
1766 | .owner = THIS_MODULE, | |
1767 | }, | |
1768 | .probe = at86rf230_probe, | |
bb1f4606 | 1769 | .remove = at86rf230_remove, |
7b8e19b6 | 1770 | }; |
1771 | ||
395a5738 | 1772 | module_spi_driver(at86rf230_driver); |
7b8e19b6 | 1773 | |
1774 | MODULE_DESCRIPTION("AT86RF230 Transceiver Driver"); | |
1775 | MODULE_LICENSE("GPL v2"); |