Commit | Line | Data |
---|---|---|
5d031e9e DP |
1 | /* |
2 | * Driver for the MPC5200 Fast Ethernet Controller | |
3 | * | |
4 | * Originally written by Dale Farnsworth <dfarnsworth@mvista.com> and | |
5 | * now maintained by Sylvain Munaut <tnt@246tNt.com> | |
6 | * | |
7 | * Copyright (C) 2007 Domen Puncer, Telargo, Inc. | |
8 | * Copyright (C) 2007 Sylvain Munaut <tnt@246tNt.com> | |
9 | * Copyright (C) 2003-2004 MontaVista, Software, Inc. | |
10 | * | |
11 | * This file is licensed under the terms of the GNU General Public License | |
12 | * version 2. This program is licensed "as is" without any warranty of any | |
13 | * kind, whether express or implied. | |
14 | * | |
15 | */ | |
16 | ||
17 | #include <linux/module.h> | |
18 | ||
19 | #include <linux/kernel.h> | |
20 | #include <linux/types.h> | |
21 | #include <linux/spinlock.h> | |
5a0e3ad6 | 22 | #include <linux/slab.h> |
5d031e9e DP |
23 | #include <linux/errno.h> |
24 | #include <linux/init.h> | |
a6b7a407 | 25 | #include <linux/interrupt.h> |
5d031e9e DP |
26 | #include <linux/crc32.h> |
27 | #include <linux/hardirq.h> | |
28 | #include <linux/delay.h> | |
29 | #include <linux/of_device.h> | |
ca816d98 | 30 | #include <linux/of_mdio.h> |
5d031e9e DP |
31 | #include <linux/of_platform.h> |
32 | ||
33 | #include <linux/netdevice.h> | |
34 | #include <linux/etherdevice.h> | |
35 | #include <linux/ethtool.h> | |
36 | #include <linux/skbuff.h> | |
37 | ||
38 | #include <asm/io.h> | |
39 | #include <asm/delay.h> | |
40 | #include <asm/mpc52xx.h> | |
41 | ||
42 | #include <sysdev/bestcomm/bestcomm.h> | |
43 | #include <sysdev/bestcomm/fec.h> | |
44 | ||
45 | #include "fec_mpc52xx.h" | |
46 | ||
47 | #define DRIVER_NAME "mpc52xx-fec" | |
48 | ||
80791be1 GL |
49 | /* Private driver data structure */ |
50 | struct mpc52xx_fec_priv { | |
ca816d98 | 51 | struct net_device *ndev; |
80791be1 GL |
52 | int duplex; |
53 | int speed; | |
54 | int r_irq; | |
55 | int t_irq; | |
56 | struct mpc52xx_fec __iomem *fec; | |
57 | struct bcom_task *rx_dmatsk; | |
58 | struct bcom_task *tx_dmatsk; | |
59 | spinlock_t lock; | |
60 | int msg_enable; | |
61 | ||
62 | /* MDIO link details */ | |
ca816d98 GL |
63 | unsigned int mdio_speed; |
64 | struct device_node *phy_node; | |
80791be1 GL |
65 | struct phy_device *phydev; |
66 | enum phy_state link; | |
ca816d98 | 67 | int seven_wire_mode; |
80791be1 GL |
68 | }; |
69 | ||
70 | ||
5d031e9e DP |
71 | static irqreturn_t mpc52xx_fec_interrupt(int, void *); |
72 | static irqreturn_t mpc52xx_fec_rx_interrupt(int, void *); | |
73 | static irqreturn_t mpc52xx_fec_tx_interrupt(int, void *); | |
74 | static void mpc52xx_fec_stop(struct net_device *dev); | |
75 | static void mpc52xx_fec_start(struct net_device *dev); | |
76 | static void mpc52xx_fec_reset(struct net_device *dev); | |
77 | ||
78 | static u8 mpc52xx_fec_mac_addr[6]; | |
79 | module_param_array_named(mac, mpc52xx_fec_mac_addr, byte, NULL, 0); | |
80 | MODULE_PARM_DESC(mac, "six hex digits, ie. 0x1,0x2,0xc0,0x01,0xba,0xbe"); | |
81 | ||
82 | #define MPC52xx_MESSAGES_DEFAULT ( NETIF_MSG_DRV | NETIF_MSG_PROBE | \ | |
8b983510 | 83 | NETIF_MSG_LINK | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP) |
5d031e9e DP |
84 | static int debug = -1; /* the above default */ |
85 | module_param(debug, int, 0); | |
86 | MODULE_PARM_DESC(debug, "debugging messages level"); | |
87 | ||
88 | static void mpc52xx_fec_tx_timeout(struct net_device *dev) | |
89 | { | |
1e4e0767 AL |
90 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); |
91 | unsigned long flags; | |
92 | ||
5d031e9e DP |
93 | dev_warn(&dev->dev, "transmit timed out\n"); |
94 | ||
1e4e0767 | 95 | spin_lock_irqsave(&priv->lock, flags); |
5d031e9e | 96 | mpc52xx_fec_reset(dev); |
5d031e9e | 97 | dev->stats.tx_errors++; |
1e4e0767 | 98 | spin_unlock_irqrestore(&priv->lock, flags); |
5d031e9e DP |
99 | |
100 | netif_wake_queue(dev); | |
101 | } | |
102 | ||
103 | static void mpc52xx_fec_set_paddr(struct net_device *dev, u8 *mac) | |
104 | { | |
105 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
106 | struct mpc52xx_fec __iomem *fec = priv->fec; | |
107 | ||
108 | out_be32(&fec->paddr1, *(u32 *)(&mac[0])); | |
109 | out_be32(&fec->paddr2, (*(u16 *)(&mac[4]) << 16) | FEC_PADDR2_TYPE); | |
110 | } | |
111 | ||
112 | static void mpc52xx_fec_get_paddr(struct net_device *dev, u8 *mac) | |
113 | { | |
114 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
115 | struct mpc52xx_fec __iomem *fec = priv->fec; | |
116 | ||
117 | *(u32 *)(&mac[0]) = in_be32(&fec->paddr1); | |
118 | *(u16 *)(&mac[4]) = in_be32(&fec->paddr2) >> 16; | |
119 | } | |
120 | ||
121 | static int mpc52xx_fec_set_mac_address(struct net_device *dev, void *addr) | |
122 | { | |
123 | struct sockaddr *sock = addr; | |
124 | ||
125 | memcpy(dev->dev_addr, sock->sa_data, dev->addr_len); | |
126 | ||
127 | mpc52xx_fec_set_paddr(dev, sock->sa_data); | |
128 | return 0; | |
129 | } | |
130 | ||
131 | static void mpc52xx_fec_free_rx_buffers(struct net_device *dev, struct bcom_task *s) | |
132 | { | |
133 | while (!bcom_queue_empty(s)) { | |
134 | struct bcom_fec_bd *bd; | |
135 | struct sk_buff *skb; | |
136 | ||
137 | skb = bcom_retrieve_buffer(s, NULL, (struct bcom_bd **)&bd); | |
461cadbc GL |
138 | dma_unmap_single(dev->dev.parent, bd->skb_pa, skb->len, |
139 | DMA_FROM_DEVICE); | |
5d031e9e DP |
140 | kfree_skb(skb); |
141 | } | |
142 | } | |
143 | ||
1e4e0767 AL |
144 | static void |
145 | mpc52xx_fec_rx_submit(struct net_device *dev, struct sk_buff *rskb) | |
146 | { | |
147 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
148 | struct bcom_fec_bd *bd; | |
149 | ||
150 | bd = (struct bcom_fec_bd *) bcom_prepare_next_buffer(priv->rx_dmatsk); | |
151 | bd->status = FEC_RX_BUFFER_SIZE; | |
152 | bd->skb_pa = dma_map_single(dev->dev.parent, rskb->data, | |
153 | FEC_RX_BUFFER_SIZE, DMA_FROM_DEVICE); | |
154 | bcom_submit_next_buffer(priv->rx_dmatsk, rskb); | |
155 | } | |
156 | ||
5d031e9e DP |
157 | static int mpc52xx_fec_alloc_rx_buffers(struct net_device *dev, struct bcom_task *rxtsk) |
158 | { | |
1e4e0767 | 159 | struct sk_buff *skb; |
5d031e9e | 160 | |
1e4e0767 | 161 | while (!bcom_queue_full(rxtsk)) { |
5d031e9e | 162 | skb = dev_alloc_skb(FEC_RX_BUFFER_SIZE); |
1e4e0767 | 163 | if (!skb) |
5d031e9e DP |
164 | return -EAGAIN; |
165 | ||
166 | /* zero out the initial receive buffers to aid debugging */ | |
167 | memset(skb->data, 0, FEC_RX_BUFFER_SIZE); | |
1e4e0767 | 168 | mpc52xx_fec_rx_submit(dev, skb); |
5d031e9e | 169 | } |
5d031e9e DP |
170 | return 0; |
171 | } | |
172 | ||
173 | /* based on generic_adjust_link from fs_enet-main.c */ | |
174 | static void mpc52xx_fec_adjust_link(struct net_device *dev) | |
175 | { | |
176 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
177 | struct phy_device *phydev = priv->phydev; | |
178 | int new_state = 0; | |
179 | ||
180 | if (phydev->link != PHY_DOWN) { | |
181 | if (phydev->duplex != priv->duplex) { | |
182 | struct mpc52xx_fec __iomem *fec = priv->fec; | |
183 | u32 rcntrl; | |
184 | u32 tcntrl; | |
185 | ||
186 | new_state = 1; | |
187 | priv->duplex = phydev->duplex; | |
188 | ||
189 | rcntrl = in_be32(&fec->r_cntrl); | |
190 | tcntrl = in_be32(&fec->x_cntrl); | |
191 | ||
192 | rcntrl &= ~FEC_RCNTRL_DRT; | |
193 | tcntrl &= ~FEC_TCNTRL_FDEN; | |
194 | if (phydev->duplex == DUPLEX_FULL) | |
195 | tcntrl |= FEC_TCNTRL_FDEN; /* FD enable */ | |
196 | else | |
197 | rcntrl |= FEC_RCNTRL_DRT; /* disable Rx on Tx (HD) */ | |
198 | ||
199 | out_be32(&fec->r_cntrl, rcntrl); | |
200 | out_be32(&fec->x_cntrl, tcntrl); | |
201 | } | |
202 | ||
203 | if (phydev->speed != priv->speed) { | |
204 | new_state = 1; | |
205 | priv->speed = phydev->speed; | |
206 | } | |
207 | ||
208 | if (priv->link == PHY_DOWN) { | |
209 | new_state = 1; | |
210 | priv->link = phydev->link; | |
5d031e9e DP |
211 | } |
212 | ||
213 | } else if (priv->link) { | |
214 | new_state = 1; | |
215 | priv->link = PHY_DOWN; | |
216 | priv->speed = 0; | |
217 | priv->duplex = -1; | |
5d031e9e DP |
218 | } |
219 | ||
220 | if (new_state && netif_msg_link(priv)) | |
221 | phy_print_status(phydev); | |
222 | } | |
223 | ||
5d031e9e DP |
224 | static int mpc52xx_fec_open(struct net_device *dev) |
225 | { | |
226 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
227 | int err = -EBUSY; | |
228 | ||
ca816d98 GL |
229 | if (priv->phy_node) { |
230 | priv->phydev = of_phy_connect(priv->ndev, priv->phy_node, | |
231 | mpc52xx_fec_adjust_link, 0, 0); | |
232 | if (!priv->phydev) { | |
233 | dev_err(&dev->dev, "of_phy_connect failed\n"); | |
234 | return -ENODEV; | |
235 | } | |
236 | phy_start(priv->phydev); | |
237 | } | |
238 | ||
a0607fd3 | 239 | if (request_irq(dev->irq, mpc52xx_fec_interrupt, IRQF_SHARED, |
5d031e9e DP |
240 | DRIVER_NAME "_ctrl", dev)) { |
241 | dev_err(&dev->dev, "ctrl interrupt request failed\n"); | |
ca816d98 | 242 | goto free_phy; |
5d031e9e | 243 | } |
a0607fd3 | 244 | if (request_irq(priv->r_irq, mpc52xx_fec_rx_interrupt, 0, |
5d031e9e DP |
245 | DRIVER_NAME "_rx", dev)) { |
246 | dev_err(&dev->dev, "rx interrupt request failed\n"); | |
247 | goto free_ctrl_irq; | |
248 | } | |
a0607fd3 | 249 | if (request_irq(priv->t_irq, mpc52xx_fec_tx_interrupt, 0, |
5d031e9e DP |
250 | DRIVER_NAME "_tx", dev)) { |
251 | dev_err(&dev->dev, "tx interrupt request failed\n"); | |
252 | goto free_2irqs; | |
253 | } | |
254 | ||
255 | bcom_fec_rx_reset(priv->rx_dmatsk); | |
256 | bcom_fec_tx_reset(priv->tx_dmatsk); | |
257 | ||
258 | err = mpc52xx_fec_alloc_rx_buffers(dev, priv->rx_dmatsk); | |
259 | if (err) { | |
260 | dev_err(&dev->dev, "mpc52xx_fec_alloc_rx_buffers failed\n"); | |
261 | goto free_irqs; | |
262 | } | |
263 | ||
5d031e9e DP |
264 | bcom_enable(priv->rx_dmatsk); |
265 | bcom_enable(priv->tx_dmatsk); | |
266 | ||
267 | mpc52xx_fec_start(dev); | |
268 | ||
269 | netif_start_queue(dev); | |
270 | ||
271 | return 0; | |
272 | ||
5d031e9e DP |
273 | free_irqs: |
274 | free_irq(priv->t_irq, dev); | |
275 | free_2irqs: | |
276 | free_irq(priv->r_irq, dev); | |
277 | free_ctrl_irq: | |
278 | free_irq(dev->irq, dev); | |
ca816d98 GL |
279 | free_phy: |
280 | if (priv->phydev) { | |
281 | phy_stop(priv->phydev); | |
282 | phy_disconnect(priv->phydev); | |
283 | priv->phydev = NULL; | |
284 | } | |
5d031e9e DP |
285 | |
286 | return err; | |
287 | } | |
288 | ||
289 | static int mpc52xx_fec_close(struct net_device *dev) | |
290 | { | |
291 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
292 | ||
293 | netif_stop_queue(dev); | |
294 | ||
295 | mpc52xx_fec_stop(dev); | |
296 | ||
297 | mpc52xx_fec_free_rx_buffers(dev, priv->rx_dmatsk); | |
298 | ||
299 | free_irq(dev->irq, dev); | |
300 | free_irq(priv->r_irq, dev); | |
301 | free_irq(priv->t_irq, dev); | |
302 | ||
ca816d98 GL |
303 | if (priv->phydev) { |
304 | /* power down phy */ | |
305 | phy_stop(priv->phydev); | |
306 | phy_disconnect(priv->phydev); | |
307 | priv->phydev = NULL; | |
308 | } | |
5d031e9e DP |
309 | |
310 | return 0; | |
311 | } | |
312 | ||
313 | /* This will only be invoked if your driver is _not_ in XOFF state. | |
314 | * What this means is that you need not check it, and that this | |
315 | * invariant will hold if you make sure that the netif_*_queue() | |
316 | * calls are done at the proper times. | |
317 | */ | |
d360009c | 318 | static int mpc52xx_fec_start_xmit(struct sk_buff *skb, struct net_device *dev) |
5d031e9e DP |
319 | { |
320 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
321 | struct bcom_fec_bd *bd; | |
4871953c | 322 | unsigned long flags; |
5d031e9e DP |
323 | |
324 | if (bcom_queue_full(priv->tx_dmatsk)) { | |
325 | if (net_ratelimit()) | |
326 | dev_err(&dev->dev, "transmit queue overrun\n"); | |
d360009c | 327 | return NETDEV_TX_BUSY; |
5d031e9e DP |
328 | } |
329 | ||
4871953c | 330 | spin_lock_irqsave(&priv->lock, flags); |
5d031e9e DP |
331 | |
332 | bd = (struct bcom_fec_bd *) | |
333 | bcom_prepare_next_buffer(priv->tx_dmatsk); | |
334 | ||
335 | bd->status = skb->len | BCOM_FEC_TX_BD_TFD | BCOM_FEC_TX_BD_TC; | |
461cadbc GL |
336 | bd->skb_pa = dma_map_single(dev->dev.parent, skb->data, skb->len, |
337 | DMA_TO_DEVICE); | |
5d031e9e DP |
338 | |
339 | bcom_submit_next_buffer(priv->tx_dmatsk, skb); | |
1e4e0767 | 340 | spin_unlock_irqrestore(&priv->lock, flags); |
5d031e9e DP |
341 | |
342 | if (bcom_queue_full(priv->tx_dmatsk)) { | |
343 | netif_stop_queue(dev); | |
344 | } | |
345 | ||
d360009c | 346 | return NETDEV_TX_OK; |
5d031e9e DP |
347 | } |
348 | ||
bd28bdb1 JS |
349 | #ifdef CONFIG_NET_POLL_CONTROLLER |
350 | static void mpc52xx_fec_poll_controller(struct net_device *dev) | |
351 | { | |
352 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
353 | ||
354 | disable_irq(priv->t_irq); | |
355 | mpc52xx_fec_tx_interrupt(priv->t_irq, dev); | |
356 | enable_irq(priv->t_irq); | |
357 | disable_irq(priv->r_irq); | |
358 | mpc52xx_fec_rx_interrupt(priv->r_irq, dev); | |
359 | enable_irq(priv->r_irq); | |
360 | } | |
361 | #endif | |
362 | ||
363 | ||
5d031e9e DP |
364 | /* This handles BestComm transmit task interrupts |
365 | */ | |
366 | static irqreturn_t mpc52xx_fec_tx_interrupt(int irq, void *dev_id) | |
367 | { | |
368 | struct net_device *dev = dev_id; | |
369 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
370 | ||
9d1e5e40 | 371 | spin_lock(&priv->lock); |
5d031e9e DP |
372 | while (bcom_buffer_done(priv->tx_dmatsk)) { |
373 | struct sk_buff *skb; | |
374 | struct bcom_fec_bd *bd; | |
375 | skb = bcom_retrieve_buffer(priv->tx_dmatsk, NULL, | |
376 | (struct bcom_bd **)&bd); | |
461cadbc GL |
377 | dma_unmap_single(dev->dev.parent, bd->skb_pa, skb->len, |
378 | DMA_TO_DEVICE); | |
5d031e9e DP |
379 | |
380 | dev_kfree_skb_irq(skb); | |
381 | } | |
9d1e5e40 | 382 | spin_unlock(&priv->lock); |
5d031e9e DP |
383 | |
384 | netif_wake_queue(dev); | |
385 | ||
5d031e9e DP |
386 | return IRQ_HANDLED; |
387 | } | |
388 | ||
389 | static irqreturn_t mpc52xx_fec_rx_interrupt(int irq, void *dev_id) | |
390 | { | |
391 | struct net_device *dev = dev_id; | |
392 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
1e4e0767 AL |
393 | struct sk_buff *rskb; /* received sk_buff */ |
394 | struct sk_buff *skb; /* new sk_buff to enqueue in its place */ | |
395 | struct bcom_fec_bd *bd; | |
396 | u32 status, physaddr; | |
397 | int length; | |
1e4e0767 | 398 | |
9d1e5e40 | 399 | spin_lock(&priv->lock); |
5d031e9e DP |
400 | |
401 | while (bcom_buffer_done(priv->rx_dmatsk)) { | |
5d031e9e DP |
402 | |
403 | rskb = bcom_retrieve_buffer(priv->rx_dmatsk, &status, | |
1e4e0767 AL |
404 | (struct bcom_bd **)&bd); |
405 | physaddr = bd->skb_pa; | |
5d031e9e DP |
406 | |
407 | /* Test for errors in received frame */ | |
408 | if (status & BCOM_FEC_RX_BD_ERRORS) { | |
409 | /* Drop packet and reuse the buffer */ | |
1e4e0767 | 410 | mpc52xx_fec_rx_submit(dev, rskb); |
5d031e9e | 411 | dev->stats.rx_dropped++; |
5d031e9e DP |
412 | continue; |
413 | } | |
414 | ||
415 | /* skbs are allocated on open, so now we allocate a new one, | |
416 | * and remove the old (with the packet) */ | |
417 | skb = dev_alloc_skb(FEC_RX_BUFFER_SIZE); | |
1e4e0767 | 418 | if (!skb) { |
5d031e9e | 419 | /* Can't get a new one : reuse the same & drop pkt */ |
1e4e0767 AL |
420 | dev_notice(&dev->dev, "Low memory - dropped packet.\n"); |
421 | mpc52xx_fec_rx_submit(dev, rskb); | |
5d031e9e | 422 | dev->stats.rx_dropped++; |
1e4e0767 | 423 | continue; |
5d031e9e DP |
424 | } |
425 | ||
1e4e0767 AL |
426 | /* Enqueue the new sk_buff back on the hardware */ |
427 | mpc52xx_fec_rx_submit(dev, skb); | |
5d031e9e | 428 | |
1e4e0767 AL |
429 | /* Process the received skb - Drop the spin lock while |
430 | * calling into the network stack */ | |
9d1e5e40 | 431 | spin_unlock(&priv->lock); |
5d031e9e | 432 | |
1e4e0767 AL |
433 | dma_unmap_single(dev->dev.parent, physaddr, rskb->len, |
434 | DMA_FROM_DEVICE); | |
435 | length = status & BCOM_FEC_RX_BD_LEN_MASK; | |
436 | skb_put(rskb, length - 4); /* length without CRC32 */ | |
1e4e0767 AL |
437 | rskb->protocol = eth_type_trans(rskb, dev); |
438 | netif_rx(rskb); | |
439 | ||
9d1e5e40 | 440 | spin_lock(&priv->lock); |
5d031e9e DP |
441 | } |
442 | ||
9d1e5e40 | 443 | spin_unlock(&priv->lock); |
1e4e0767 | 444 | |
5d031e9e DP |
445 | return IRQ_HANDLED; |
446 | } | |
447 | ||
448 | static irqreturn_t mpc52xx_fec_interrupt(int irq, void *dev_id) | |
449 | { | |
450 | struct net_device *dev = dev_id; | |
451 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
452 | struct mpc52xx_fec __iomem *fec = priv->fec; | |
453 | u32 ievent; | |
454 | ||
455 | ievent = in_be32(&fec->ievent); | |
456 | ||
457 | ievent &= ~FEC_IEVENT_MII; /* mii is handled separately */ | |
458 | if (!ievent) | |
459 | return IRQ_NONE; | |
460 | ||
461 | out_be32(&fec->ievent, ievent); /* clear pending events */ | |
462 | ||
8f3ba2dc SH |
463 | /* on fifo error, soft-reset fec */ |
464 | if (ievent & (FEC_IEVENT_RFIFO_ERROR | FEC_IEVENT_XFIFO_ERROR)) { | |
465 | ||
466 | if (net_ratelimit() && (ievent & FEC_IEVENT_RFIFO_ERROR)) | |
467 | dev_warn(&dev->dev, "FEC_IEVENT_RFIFO_ERROR\n"); | |
468 | if (net_ratelimit() && (ievent & FEC_IEVENT_XFIFO_ERROR)) | |
469 | dev_warn(&dev->dev, "FEC_IEVENT_XFIFO_ERROR\n"); | |
470 | ||
9d1e5e40 | 471 | spin_lock(&priv->lock); |
8f3ba2dc | 472 | mpc52xx_fec_reset(dev); |
9d1e5e40 | 473 | spin_unlock(&priv->lock); |
8f3ba2dc | 474 | |
5d031e9e DP |
475 | return IRQ_HANDLED; |
476 | } | |
477 | ||
8f3ba2dc SH |
478 | if (ievent & ~FEC_IEVENT_TFINT) |
479 | dev_dbg(&dev->dev, "ievent: %08x\n", ievent); | |
5d031e9e | 480 | |
5d031e9e DP |
481 | return IRQ_HANDLED; |
482 | } | |
483 | ||
484 | /* | |
485 | * Get the current statistics. | |
486 | * This may be called with the card open or closed. | |
487 | */ | |
488 | static struct net_device_stats *mpc52xx_fec_get_stats(struct net_device *dev) | |
489 | { | |
490 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
491 | struct net_device_stats *stats = &dev->stats; | |
492 | struct mpc52xx_fec __iomem *fec = priv->fec; | |
493 | ||
494 | stats->rx_bytes = in_be32(&fec->rmon_r_octets); | |
495 | stats->rx_packets = in_be32(&fec->rmon_r_packets); | |
496 | stats->rx_errors = in_be32(&fec->rmon_r_crc_align) + | |
497 | in_be32(&fec->rmon_r_undersize) + | |
498 | in_be32(&fec->rmon_r_oversize) + | |
499 | in_be32(&fec->rmon_r_frag) + | |
500 | in_be32(&fec->rmon_r_jab); | |
501 | ||
502 | stats->tx_bytes = in_be32(&fec->rmon_t_octets); | |
503 | stats->tx_packets = in_be32(&fec->rmon_t_packets); | |
504 | stats->tx_errors = in_be32(&fec->rmon_t_crc_align) + | |
505 | in_be32(&fec->rmon_t_undersize) + | |
506 | in_be32(&fec->rmon_t_oversize) + | |
507 | in_be32(&fec->rmon_t_frag) + | |
508 | in_be32(&fec->rmon_t_jab); | |
509 | ||
510 | stats->multicast = in_be32(&fec->rmon_r_mc_pkt); | |
511 | stats->collisions = in_be32(&fec->rmon_t_col); | |
512 | ||
513 | /* detailed rx_errors: */ | |
514 | stats->rx_length_errors = in_be32(&fec->rmon_r_undersize) | |
515 | + in_be32(&fec->rmon_r_oversize) | |
516 | + in_be32(&fec->rmon_r_frag) | |
517 | + in_be32(&fec->rmon_r_jab); | |
518 | stats->rx_over_errors = in_be32(&fec->r_macerr); | |
519 | stats->rx_crc_errors = in_be32(&fec->ieee_r_crc); | |
520 | stats->rx_frame_errors = in_be32(&fec->ieee_r_align); | |
521 | stats->rx_fifo_errors = in_be32(&fec->rmon_r_drop); | |
522 | stats->rx_missed_errors = in_be32(&fec->rmon_r_drop); | |
523 | ||
524 | /* detailed tx_errors: */ | |
525 | stats->tx_aborted_errors = 0; | |
526 | stats->tx_carrier_errors = in_be32(&fec->ieee_t_cserr); | |
527 | stats->tx_fifo_errors = in_be32(&fec->rmon_t_drop); | |
528 | stats->tx_heartbeat_errors = in_be32(&fec->ieee_t_sqe); | |
529 | stats->tx_window_errors = in_be32(&fec->ieee_t_lcol); | |
530 | ||
531 | return stats; | |
532 | } | |
533 | ||
534 | /* | |
535 | * Read MIB counters in order to reset them, | |
536 | * then zero all the stats fields in memory | |
537 | */ | |
538 | static void mpc52xx_fec_reset_stats(struct net_device *dev) | |
539 | { | |
540 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
541 | struct mpc52xx_fec __iomem *fec = priv->fec; | |
542 | ||
543 | out_be32(&fec->mib_control, FEC_MIB_DISABLE); | |
cc154ac6 AV |
544 | memset_io(&fec->rmon_t_drop, 0, |
545 | offsetof(struct mpc52xx_fec, reserved10) - | |
546 | offsetof(struct mpc52xx_fec, rmon_t_drop)); | |
5d031e9e DP |
547 | out_be32(&fec->mib_control, 0); |
548 | ||
549 | memset(&dev->stats, 0, sizeof(dev->stats)); | |
550 | } | |
551 | ||
552 | /* | |
553 | * Set or clear the multicast filter for this adaptor. | |
554 | */ | |
555 | static void mpc52xx_fec_set_multicast_list(struct net_device *dev) | |
556 | { | |
557 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
558 | struct mpc52xx_fec __iomem *fec = priv->fec; | |
559 | u32 rx_control; | |
560 | ||
561 | rx_control = in_be32(&fec->r_cntrl); | |
562 | ||
563 | if (dev->flags & IFF_PROMISC) { | |
564 | rx_control |= FEC_RCNTRL_PROM; | |
565 | out_be32(&fec->r_cntrl, rx_control); | |
566 | } else { | |
567 | rx_control &= ~FEC_RCNTRL_PROM; | |
568 | out_be32(&fec->r_cntrl, rx_control); | |
569 | ||
570 | if (dev->flags & IFF_ALLMULTI) { | |
571 | out_be32(&fec->gaddr1, 0xffffffff); | |
572 | out_be32(&fec->gaddr2, 0xffffffff); | |
573 | } else { | |
574 | u32 crc; | |
22bedad3 | 575 | struct netdev_hw_addr *ha; |
5d031e9e DP |
576 | u32 gaddr1 = 0x00000000; |
577 | u32 gaddr2 = 0x00000000; | |
578 | ||
22bedad3 JP |
579 | netdev_for_each_mc_addr(ha, dev) { |
580 | crc = ether_crc_le(6, ha->addr) >> 26; | |
5d031e9e DP |
581 | if (crc >= 32) |
582 | gaddr1 |= 1 << (crc-32); | |
583 | else | |
584 | gaddr2 |= 1 << crc; | |
5d031e9e DP |
585 | } |
586 | out_be32(&fec->gaddr1, gaddr1); | |
587 | out_be32(&fec->gaddr2, gaddr2); | |
588 | } | |
589 | } | |
590 | } | |
591 | ||
592 | /** | |
593 | * mpc52xx_fec_hw_init | |
594 | * @dev: network device | |
595 | * | |
596 | * Setup various hardware setting, only needed once on start | |
597 | */ | |
598 | static void mpc52xx_fec_hw_init(struct net_device *dev) | |
599 | { | |
600 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
601 | struct mpc52xx_fec __iomem *fec = priv->fec; | |
602 | int i; | |
603 | ||
604 | /* Whack a reset. We should wait for this. */ | |
605 | out_be32(&fec->ecntrl, FEC_ECNTRL_RESET); | |
606 | for (i = 0; i < FEC_RESET_DELAY; ++i) { | |
607 | if ((in_be32(&fec->ecntrl) & FEC_ECNTRL_RESET) == 0) | |
608 | break; | |
609 | udelay(1); | |
610 | } | |
611 | if (i == FEC_RESET_DELAY) | |
612 | dev_err(&dev->dev, "FEC Reset timeout!\n"); | |
613 | ||
614 | /* set pause to 0x20 frames */ | |
615 | out_be32(&fec->op_pause, FEC_OP_PAUSE_OPCODE | 0x20); | |
616 | ||
617 | /* high service request will be deasserted when there's < 7 bytes in fifo | |
618 | * low service request will be deasserted when there's < 4*7 bytes in fifo | |
619 | */ | |
620 | out_be32(&fec->rfifo_cntrl, FEC_FIFO_CNTRL_FRAME | FEC_FIFO_CNTRL_LTG_7); | |
621 | out_be32(&fec->tfifo_cntrl, FEC_FIFO_CNTRL_FRAME | FEC_FIFO_CNTRL_LTG_7); | |
622 | ||
623 | /* alarm when <= x bytes in FIFO */ | |
624 | out_be32(&fec->rfifo_alarm, 0x0000030c); | |
625 | out_be32(&fec->tfifo_alarm, 0x00000100); | |
626 | ||
627 | /* begin transmittion when 256 bytes are in FIFO (or EOF or FIFO full) */ | |
628 | out_be32(&fec->x_wmrk, FEC_FIFO_WMRK_256B); | |
629 | ||
630 | /* enable crc generation */ | |
631 | out_be32(&fec->xmit_fsm, FEC_XMIT_FSM_APPEND_CRC | FEC_XMIT_FSM_ENABLE_CRC); | |
632 | out_be32(&fec->iaddr1, 0x00000000); /* No individual filter */ | |
633 | out_be32(&fec->iaddr2, 0x00000000); /* No individual filter */ | |
634 | ||
635 | /* set phy speed. | |
636 | * this can't be done in phy driver, since it needs to be called | |
637 | * before fec stuff (even on resume) */ | |
ca816d98 | 638 | out_be32(&fec->mii_speed, priv->mdio_speed); |
5d031e9e DP |
639 | } |
640 | ||
641 | /** | |
642 | * mpc52xx_fec_start | |
643 | * @dev: network device | |
644 | * | |
645 | * This function is called to start or restart the FEC during a link | |
646 | * change. This happens on fifo errors or when switching between half | |
647 | * and full duplex. | |
648 | */ | |
649 | static void mpc52xx_fec_start(struct net_device *dev) | |
650 | { | |
651 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
652 | struct mpc52xx_fec __iomem *fec = priv->fec; | |
653 | u32 rcntrl; | |
654 | u32 tcntrl; | |
655 | u32 tmp; | |
656 | ||
657 | /* clear sticky error bits */ | |
658 | tmp = FEC_FIFO_STATUS_ERR | FEC_FIFO_STATUS_UF | FEC_FIFO_STATUS_OF; | |
659 | out_be32(&fec->rfifo_status, in_be32(&fec->rfifo_status) & tmp); | |
660 | out_be32(&fec->tfifo_status, in_be32(&fec->tfifo_status) & tmp); | |
661 | ||
662 | /* FIFOs will reset on mpc52xx_fec_enable */ | |
663 | out_be32(&fec->reset_cntrl, FEC_RESET_CNTRL_ENABLE_IS_RESET); | |
664 | ||
665 | /* Set station address. */ | |
666 | mpc52xx_fec_set_paddr(dev, dev->dev_addr); | |
667 | ||
668 | mpc52xx_fec_set_multicast_list(dev); | |
669 | ||
670 | /* set max frame len, enable flow control, select mii mode */ | |
671 | rcntrl = FEC_RX_BUFFER_SIZE << 16; /* max frame length */ | |
672 | rcntrl |= FEC_RCNTRL_FCE; | |
673 | ||
ca816d98 | 674 | if (!priv->seven_wire_mode) |
5d031e9e DP |
675 | rcntrl |= FEC_RCNTRL_MII_MODE; |
676 | ||
677 | if (priv->duplex == DUPLEX_FULL) | |
678 | tcntrl = FEC_TCNTRL_FDEN; /* FD enable */ | |
679 | else { | |
680 | rcntrl |= FEC_RCNTRL_DRT; /* disable Rx on Tx (HD) */ | |
681 | tcntrl = 0; | |
682 | } | |
683 | out_be32(&fec->r_cntrl, rcntrl); | |
684 | out_be32(&fec->x_cntrl, tcntrl); | |
685 | ||
686 | /* Clear any outstanding interrupt. */ | |
687 | out_be32(&fec->ievent, 0xffffffff); | |
688 | ||
689 | /* Enable interrupts we wish to service. */ | |
690 | out_be32(&fec->imask, FEC_IMASK_ENABLE); | |
691 | ||
692 | /* And last, enable the transmit and receive processing. */ | |
693 | out_be32(&fec->ecntrl, FEC_ECNTRL_ETHER_EN); | |
694 | out_be32(&fec->r_des_active, 0x01000000); | |
695 | } | |
696 | ||
697 | /** | |
698 | * mpc52xx_fec_stop | |
699 | * @dev: network device | |
700 | * | |
701 | * stop all activity on fec and empty dma buffers | |
702 | */ | |
703 | static void mpc52xx_fec_stop(struct net_device *dev) | |
704 | { | |
705 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
706 | struct mpc52xx_fec __iomem *fec = priv->fec; | |
707 | unsigned long timeout; | |
708 | ||
709 | /* disable all interrupts */ | |
710 | out_be32(&fec->imask, 0); | |
711 | ||
712 | /* Disable the rx task. */ | |
713 | bcom_disable(priv->rx_dmatsk); | |
714 | ||
715 | /* Wait for tx queue to drain, but only if we're in process context */ | |
716 | if (!in_interrupt()) { | |
717 | timeout = jiffies + msecs_to_jiffies(2000); | |
718 | while (time_before(jiffies, timeout) && | |
719 | !bcom_queue_empty(priv->tx_dmatsk)) | |
720 | msleep(100); | |
721 | ||
722 | if (time_after_eq(jiffies, timeout)) | |
723 | dev_err(&dev->dev, "queues didn't drain\n"); | |
724 | #if 1 | |
725 | if (time_after_eq(jiffies, timeout)) { | |
726 | dev_err(&dev->dev, " tx: index: %i, outdex: %i\n", | |
727 | priv->tx_dmatsk->index, | |
728 | priv->tx_dmatsk->outdex); | |
729 | dev_err(&dev->dev, " rx: index: %i, outdex: %i\n", | |
730 | priv->rx_dmatsk->index, | |
731 | priv->rx_dmatsk->outdex); | |
732 | } | |
733 | #endif | |
734 | } | |
735 | ||
736 | bcom_disable(priv->tx_dmatsk); | |
737 | ||
738 | /* Stop FEC */ | |
739 | out_be32(&fec->ecntrl, in_be32(&fec->ecntrl) & ~FEC_ECNTRL_ETHER_EN); | |
5d031e9e DP |
740 | } |
741 | ||
742 | /* reset fec and bestcomm tasks */ | |
743 | static void mpc52xx_fec_reset(struct net_device *dev) | |
744 | { | |
745 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
746 | struct mpc52xx_fec __iomem *fec = priv->fec; | |
747 | ||
748 | mpc52xx_fec_stop(dev); | |
749 | ||
750 | out_be32(&fec->rfifo_status, in_be32(&fec->rfifo_status)); | |
751 | out_be32(&fec->reset_cntrl, FEC_RESET_CNTRL_RESET_FIFO); | |
752 | ||
753 | mpc52xx_fec_free_rx_buffers(dev, priv->rx_dmatsk); | |
754 | ||
755 | mpc52xx_fec_hw_init(dev); | |
756 | ||
5d031e9e DP |
757 | bcom_fec_rx_reset(priv->rx_dmatsk); |
758 | bcom_fec_tx_reset(priv->tx_dmatsk); | |
759 | ||
760 | mpc52xx_fec_alloc_rx_buffers(dev, priv->rx_dmatsk); | |
761 | ||
762 | bcom_enable(priv->rx_dmatsk); | |
763 | bcom_enable(priv->tx_dmatsk); | |
764 | ||
765 | mpc52xx_fec_start(dev); | |
1e4e0767 AL |
766 | |
767 | netif_wake_queue(dev); | |
5d031e9e DP |
768 | } |
769 | ||
770 | ||
771 | /* ethtool interface */ | |
5d031e9e DP |
772 | |
773 | static int mpc52xx_fec_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) | |
774 | { | |
775 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
9404c82b GL |
776 | |
777 | if (!priv->phydev) | |
778 | return -ENODEV; | |
779 | ||
5d031e9e DP |
780 | return phy_ethtool_gset(priv->phydev, cmd); |
781 | } | |
782 | ||
783 | static int mpc52xx_fec_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) | |
784 | { | |
785 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
9404c82b GL |
786 | |
787 | if (!priv->phydev) | |
788 | return -ENODEV; | |
789 | ||
5d031e9e DP |
790 | return phy_ethtool_sset(priv->phydev, cmd); |
791 | } | |
792 | ||
793 | static u32 mpc52xx_fec_get_msglevel(struct net_device *dev) | |
794 | { | |
795 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
796 | return priv->msg_enable; | |
797 | } | |
798 | ||
799 | static void mpc52xx_fec_set_msglevel(struct net_device *dev, u32 level) | |
800 | { | |
801 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
802 | priv->msg_enable = level; | |
803 | } | |
804 | ||
805 | static const struct ethtool_ops mpc52xx_fec_ethtool_ops = { | |
5d031e9e DP |
806 | .get_settings = mpc52xx_fec_get_settings, |
807 | .set_settings = mpc52xx_fec_set_settings, | |
808 | .get_link = ethtool_op_get_link, | |
809 | .get_msglevel = mpc52xx_fec_get_msglevel, | |
810 | .set_msglevel = mpc52xx_fec_set_msglevel, | |
811 | }; | |
812 | ||
813 | ||
814 | static int mpc52xx_fec_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) | |
815 | { | |
816 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
817 | ||
9404c82b GL |
818 | if (!priv->phydev) |
819 | return -ENOTSUPP; | |
820 | ||
28b04113 | 821 | return phy_mii_ioctl(priv->phydev, rq, cmd); |
5d031e9e DP |
822 | } |
823 | ||
d360009c HS |
824 | static const struct net_device_ops mpc52xx_fec_netdev_ops = { |
825 | .ndo_open = mpc52xx_fec_open, | |
826 | .ndo_stop = mpc52xx_fec_close, | |
827 | .ndo_start_xmit = mpc52xx_fec_start_xmit, | |
828 | .ndo_set_multicast_list = mpc52xx_fec_set_multicast_list, | |
829 | .ndo_set_mac_address = mpc52xx_fec_set_mac_address, | |
830 | .ndo_validate_addr = eth_validate_addr, | |
831 | .ndo_do_ioctl = mpc52xx_fec_ioctl, | |
832 | .ndo_change_mtu = eth_change_mtu, | |
833 | .ndo_tx_timeout = mpc52xx_fec_tx_timeout, | |
834 | .ndo_get_stats = mpc52xx_fec_get_stats, | |
835 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
836 | .ndo_poll_controller = mpc52xx_fec_poll_controller, | |
837 | #endif | |
838 | }; | |
839 | ||
5d031e9e DP |
840 | /* ======================================================================== */ |
841 | /* OF Driver */ | |
842 | /* ======================================================================== */ | |
843 | ||
74888760 | 844 | static int __devinit mpc52xx_fec_probe(struct platform_device *op) |
5d031e9e DP |
845 | { |
846 | int rv; | |
847 | struct net_device *ndev; | |
848 | struct mpc52xx_fec_priv *priv = NULL; | |
849 | struct resource mem; | |
80791be1 GL |
850 | const u32 *prop; |
851 | int prop_size; | |
5d031e9e DP |
852 | |
853 | phys_addr_t rx_fifo; | |
854 | phys_addr_t tx_fifo; | |
855 | ||
856 | /* Get the ether ndev & it's private zone */ | |
857 | ndev = alloc_etherdev(sizeof(struct mpc52xx_fec_priv)); | |
858 | if (!ndev) | |
859 | return -ENOMEM; | |
860 | ||
861 | priv = netdev_priv(ndev); | |
ca816d98 | 862 | priv->ndev = ndev; |
5d031e9e DP |
863 | |
864 | /* Reserve FEC control zone */ | |
61c7a080 | 865 | rv = of_address_to_resource(op->dev.of_node, 0, &mem); |
5d031e9e DP |
866 | if (rv) { |
867 | printk(KERN_ERR DRIVER_NAME ": " | |
868 | "Error while parsing device node resource\n" ); | |
fabc51a6 | 869 | goto err_netdev; |
5d031e9e | 870 | } |
48d58459 | 871 | if ((mem.end - mem.start + 1) < sizeof(struct mpc52xx_fec)) { |
5d031e9e | 872 | printk(KERN_ERR DRIVER_NAME |
48d58459 | 873 | " - invalid resource size (%lx < %x), check mpc52xx_devices.c\n", |
5d031e9e | 874 | (unsigned long)(mem.end - mem.start + 1), sizeof(struct mpc52xx_fec)); |
fabc51a6 KV |
875 | rv = -EINVAL; |
876 | goto err_netdev; | |
5d031e9e DP |
877 | } |
878 | ||
fabc51a6 KV |
879 | if (!request_mem_region(mem.start, sizeof(struct mpc52xx_fec), |
880 | DRIVER_NAME)) { | |
881 | rv = -EBUSY; | |
882 | goto err_netdev; | |
883 | } | |
5d031e9e DP |
884 | |
885 | /* Init ether ndev with what we have */ | |
d360009c | 886 | ndev->netdev_ops = &mpc52xx_fec_netdev_ops; |
5d031e9e | 887 | ndev->ethtool_ops = &mpc52xx_fec_ethtool_ops; |
5d031e9e DP |
888 | ndev->watchdog_timeo = FEC_WATCHDOG_TIMEOUT; |
889 | ndev->base_addr = mem.start; | |
ca816d98 | 890 | SET_NETDEV_DEV(ndev, &op->dev); |
5d031e9e DP |
891 | |
892 | spin_lock_init(&priv->lock); | |
893 | ||
894 | /* ioremap the zones */ | |
895 | priv->fec = ioremap(mem.start, sizeof(struct mpc52xx_fec)); | |
896 | ||
897 | if (!priv->fec) { | |
898 | rv = -ENOMEM; | |
fabc51a6 | 899 | goto err_mem_region; |
5d031e9e DP |
900 | } |
901 | ||
902 | /* Bestcomm init */ | |
903 | rx_fifo = ndev->base_addr + offsetof(struct mpc52xx_fec, rfifo_data); | |
904 | tx_fifo = ndev->base_addr + offsetof(struct mpc52xx_fec, tfifo_data); | |
905 | ||
906 | priv->rx_dmatsk = bcom_fec_rx_init(FEC_RX_NUM_BD, rx_fifo, FEC_RX_BUFFER_SIZE); | |
907 | priv->tx_dmatsk = bcom_fec_tx_init(FEC_TX_NUM_BD, tx_fifo); | |
908 | ||
909 | if (!priv->rx_dmatsk || !priv->tx_dmatsk) { | |
910 | printk(KERN_ERR DRIVER_NAME ": Can not init SDMA tasks\n" ); | |
911 | rv = -ENOMEM; | |
fabc51a6 | 912 | goto err_rx_tx_dmatsk; |
5d031e9e DP |
913 | } |
914 | ||
915 | /* Get the IRQ we need one by one */ | |
916 | /* Control */ | |
61c7a080 | 917 | ndev->irq = irq_of_parse_and_map(op->dev.of_node, 0); |
5d031e9e DP |
918 | |
919 | /* RX */ | |
920 | priv->r_irq = bcom_get_task_irq(priv->rx_dmatsk); | |
921 | ||
922 | /* TX */ | |
923 | priv->t_irq = bcom_get_task_irq(priv->tx_dmatsk); | |
924 | ||
925 | /* MAC address init */ | |
926 | if (!is_zero_ether_addr(mpc52xx_fec_mac_addr)) | |
927 | memcpy(ndev->dev_addr, mpc52xx_fec_mac_addr, 6); | |
928 | else | |
929 | mpc52xx_fec_get_paddr(ndev, ndev->dev_addr); | |
930 | ||
931 | priv->msg_enable = netif_msg_init(debug, MPC52xx_MESSAGES_DEFAULT); | |
5d031e9e | 932 | |
80791be1 GL |
933 | /* |
934 | * Link mode configuration | |
935 | */ | |
5d031e9e | 936 | |
80791be1 | 937 | /* Start with safe defaults for link connection */ |
80791be1 GL |
938 | priv->speed = 100; |
939 | priv->duplex = DUPLEX_HALF; | |
61c7a080 | 940 | priv->mdio_speed = ((mpc5xxx_get_bus_frequency(op->dev.of_node) >> 20) / 5) << 1; |
80791be1 GL |
941 | |
942 | /* The current speed preconfigures the speed of the MII link */ | |
61c7a080 | 943 | prop = of_get_property(op->dev.of_node, "current-speed", &prop_size); |
80791be1 GL |
944 | if (prop && (prop_size >= sizeof(u32) * 2)) { |
945 | priv->speed = prop[0]; | |
946 | priv->duplex = prop[1] ? DUPLEX_FULL : DUPLEX_HALF; | |
947 | } | |
5d031e9e | 948 | |
ca816d98 | 949 | /* If there is a phy handle, then get the PHY node */ |
61c7a080 | 950 | priv->phy_node = of_parse_phandle(op->dev.of_node, "phy-handle", 0); |
ca816d98 GL |
951 | |
952 | /* the 7-wire property means don't use MII mode */ | |
61c7a080 | 953 | if (of_find_property(op->dev.of_node, "fsl,7-wire-mode", NULL)) { |
ca816d98 GL |
954 | priv->seven_wire_mode = 1; |
955 | dev_info(&ndev->dev, "using 7-wire PHY mode\n"); | |
5d031e9e DP |
956 | } |
957 | ||
958 | /* Hardware init */ | |
959 | mpc52xx_fec_hw_init(ndev); | |
5d031e9e DP |
960 | mpc52xx_fec_reset_stats(ndev); |
961 | ||
5d031e9e DP |
962 | rv = register_netdev(ndev); |
963 | if (rv < 0) | |
fabc51a6 | 964 | goto err_node; |
5d031e9e DP |
965 | |
966 | /* We're done ! */ | |
967 | dev_set_drvdata(&op->dev, ndev); | |
968 | ||
969 | return 0; | |
970 | ||
fabc51a6 KV |
971 | err_node: |
972 | of_node_put(priv->phy_node); | |
5d031e9e | 973 | irq_dispose_mapping(ndev->irq); |
fabc51a6 | 974 | err_rx_tx_dmatsk: |
5d031e9e DP |
975 | if (priv->rx_dmatsk) |
976 | bcom_fec_rx_release(priv->rx_dmatsk); | |
977 | if (priv->tx_dmatsk) | |
978 | bcom_fec_tx_release(priv->tx_dmatsk); | |
fabc51a6 KV |
979 | iounmap(priv->fec); |
980 | err_mem_region: | |
5d031e9e | 981 | release_mem_region(mem.start, sizeof(struct mpc52xx_fec)); |
fabc51a6 | 982 | err_netdev: |
5d031e9e DP |
983 | free_netdev(ndev); |
984 | ||
985 | return rv; | |
986 | } | |
987 | ||
988 | static int | |
2dc11581 | 989 | mpc52xx_fec_remove(struct platform_device *op) |
5d031e9e DP |
990 | { |
991 | struct net_device *ndev; | |
992 | struct mpc52xx_fec_priv *priv; | |
993 | ||
994 | ndev = dev_get_drvdata(&op->dev); | |
995 | priv = netdev_priv(ndev); | |
996 | ||
997 | unregister_netdev(ndev); | |
998 | ||
ca816d98 GL |
999 | if (priv->phy_node) |
1000 | of_node_put(priv->phy_node); | |
1001 | priv->phy_node = NULL; | |
1002 | ||
5d031e9e DP |
1003 | irq_dispose_mapping(ndev->irq); |
1004 | ||
1005 | bcom_fec_rx_release(priv->rx_dmatsk); | |
1006 | bcom_fec_tx_release(priv->tx_dmatsk); | |
1007 | ||
1008 | iounmap(priv->fec); | |
1009 | ||
1010 | release_mem_region(ndev->base_addr, sizeof(struct mpc52xx_fec)); | |
1011 | ||
1012 | free_netdev(ndev); | |
1013 | ||
1014 | dev_set_drvdata(&op->dev, NULL); | |
1015 | return 0; | |
1016 | } | |
1017 | ||
1018 | #ifdef CONFIG_PM | |
2dc11581 | 1019 | static int mpc52xx_fec_of_suspend(struct platform_device *op, pm_message_t state) |
5d031e9e DP |
1020 | { |
1021 | struct net_device *dev = dev_get_drvdata(&op->dev); | |
1022 | ||
1023 | if (netif_running(dev)) | |
1024 | mpc52xx_fec_close(dev); | |
1025 | ||
1026 | return 0; | |
1027 | } | |
1028 | ||
2dc11581 | 1029 | static int mpc52xx_fec_of_resume(struct platform_device *op) |
5d031e9e DP |
1030 | { |
1031 | struct net_device *dev = dev_get_drvdata(&op->dev); | |
1032 | ||
1033 | mpc52xx_fec_hw_init(dev); | |
1034 | mpc52xx_fec_reset_stats(dev); | |
1035 | ||
1036 | if (netif_running(dev)) | |
1037 | mpc52xx_fec_open(dev); | |
1038 | ||
1039 | return 0; | |
1040 | } | |
1041 | #endif | |
1042 | ||
1043 | static struct of_device_id mpc52xx_fec_match[] = { | |
3b5ebf8e GL |
1044 | { .compatible = "fsl,mpc5200b-fec", }, |
1045 | { .compatible = "fsl,mpc5200-fec", }, | |
1046 | { .compatible = "mpc5200-fec", }, | |
5d031e9e DP |
1047 | { } |
1048 | }; | |
1049 | ||
1050 | MODULE_DEVICE_TABLE(of, mpc52xx_fec_match); | |
1051 | ||
74888760 | 1052 | static struct platform_driver mpc52xx_fec_driver = { |
4018294b GL |
1053 | .driver = { |
1054 | .name = DRIVER_NAME, | |
1055 | .owner = THIS_MODULE, | |
1056 | .of_match_table = mpc52xx_fec_match, | |
1057 | }, | |
5d031e9e DP |
1058 | .probe = mpc52xx_fec_probe, |
1059 | .remove = mpc52xx_fec_remove, | |
1060 | #ifdef CONFIG_PM | |
1061 | .suspend = mpc52xx_fec_of_suspend, | |
1062 | .resume = mpc52xx_fec_of_resume, | |
1063 | #endif | |
1064 | }; | |
1065 | ||
1066 | ||
1067 | /* ======================================================================== */ | |
1068 | /* Module */ | |
1069 | /* ======================================================================== */ | |
1070 | ||
1071 | static int __init | |
1072 | mpc52xx_fec_init(void) | |
1073 | { | |
1074 | #ifdef CONFIG_FEC_MPC52xx_MDIO | |
1075 | int ret; | |
74888760 | 1076 | ret = platform_driver_register(&mpc52xx_fec_mdio_driver); |
5d031e9e DP |
1077 | if (ret) { |
1078 | printk(KERN_ERR DRIVER_NAME ": failed to register mdio driver\n"); | |
1079 | return ret; | |
1080 | } | |
1081 | #endif | |
74888760 | 1082 | return platform_driver_register(&mpc52xx_fec_driver); |
5d031e9e DP |
1083 | } |
1084 | ||
1085 | static void __exit | |
1086 | mpc52xx_fec_exit(void) | |
1087 | { | |
74888760 | 1088 | platform_driver_unregister(&mpc52xx_fec_driver); |
5d031e9e | 1089 | #ifdef CONFIG_FEC_MPC52xx_MDIO |
74888760 | 1090 | platform_driver_unregister(&mpc52xx_fec_mdio_driver); |
5d031e9e DP |
1091 | #endif |
1092 | } | |
1093 | ||
1094 | ||
1095 | module_init(mpc52xx_fec_init); | |
1096 | module_exit(mpc52xx_fec_exit); | |
1097 | ||
1098 | MODULE_LICENSE("GPL"); | |
1099 | MODULE_AUTHOR("Dale Farnsworth"); | |
1100 | MODULE_DESCRIPTION("Ethernet driver for the Freescale MPC52xx FEC"); |