Replace <asm/uaccess.h> with <linux/uaccess.h> globally
[linux-block.git] / drivers / net / ethernet / xircom / xirc2ps_cs.c
CommitLineData
1da177e4
LT
1/* [xirc2ps_cs.c wk 03.11.99] (1.40 1999/11/18 00:06:03)
2 * Xircom CreditCard Ethernet Adapter IIps driver
3 * Xircom Realport 10/100 (RE-100) driver
4 *
5 * This driver supports various Xircom CreditCard Ethernet adapters
6 * including the CE2, CE IIps, RE-10, CEM28, CEM33, CE33, CEM56,
7 * CE3-100, CE3B, RE-100, REM10BT, and REM56G-100.
8 *
9 * 2000-09-24 <psheer@icon.co.za> The Xircom CE3B-100 may not
10 * autodetect the media properly. In this case use the
11 * if_port=1 (for 10BaseT) or if_port=4 (for 100BaseT) options
12 * to force the media type.
13 *
14 * Written originally by Werner Koch based on David Hinds' skeleton of the
15 * PCMCIA driver.
16 *
17 * Copyright (c) 1997,1998 Werner Koch (dd9jn)
18 *
19 * This driver is free software; you can redistribute it and/or modify
20 * it under the terms of the GNU General Public License as published by
21 * the Free Software Foundation; either version 2 of the License, or
22 * (at your option) any later version.
23 *
24 * It is distributed in the hope that it will be useful,
25 * but WITHOUT ANY WARRANTY; without even the implied warranty of
26 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
27 * GNU General Public License for more details.
28 *
29 * You should have received a copy of the GNU General Public License
0ab75ae8 30 * along with this program; if not, see <http://www.gnu.org/licenses/>.
1da177e4
LT
31 *
32 *
33 * ALTERNATIVELY, this driver may be distributed under the terms of
34 * the following license, in which case the provisions of this license
35 * are required INSTEAD OF the GNU General Public License. (This clause
36 * is necessary due to a potential bad interaction between the GPL and
37 * the restrictions contained in a BSD-style copyright.)
38 *
39 * Redistribution and use in source and binary forms, with or without
40 * modification, are permitted provided that the following conditions
41 * are met:
42 * 1. Redistributions of source code must retain the above copyright
43 * notice, and the entire permission notice in its entirety,
44 * including the disclaimer of warranties.
45 * 2. Redistributions in binary form must reproduce the above copyright
46 * notice, this list of conditions and the following disclaimer in the
47 * documentation and/or other materials provided with the distribution.
48 * 3. The name of the author may not be used to endorse or promote
49 * products derived from this software without specific prior
50 * written permission.
51 *
52 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
53 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
54 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
55 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
56 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
57 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
58 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
59 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
60 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
61 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
62 * OF THE POSSIBILITY OF SUCH DAMAGE.
63 */
64
636b8116
JP
65#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
66
1da177e4
LT
67#include <linux/module.h>
68#include <linux/kernel.h>
69#include <linux/init.h>
70#include <linux/ptrace.h>
71#include <linux/slab.h>
72#include <linux/string.h>
73#include <linux/timer.h>
74#include <linux/interrupt.h>
75#include <linux/in.h>
76#include <linux/delay.h>
77#include <linux/ethtool.h>
78#include <linux/netdevice.h>
79#include <linux/etherdevice.h>
80#include <linux/skbuff.h>
81#include <linux/if_arp.h>
82#include <linux/ioport.h>
83#include <linux/bitops.h>
0fa0ee05 84#include <linux/mii.h>
1da177e4 85
1da177e4
LT
86#include <pcmcia/cistpl.h>
87#include <pcmcia/cisreg.h>
88#include <pcmcia/ciscode.h>
89
90#include <asm/io.h>
7c0f6ba6 91#include <linux/uaccess.h>
1da177e4
LT
92
93#ifndef MANFID_COMPAQ
94 #define MANFID_COMPAQ 0x0138
95 #define MANFID_COMPAQ2 0x0183 /* is this correct? */
96#endif
97
98#include <pcmcia/ds.h>
99
100/* Time in jiffies before concluding Tx hung */
101#define TX_TIMEOUT ((400*HZ)/1000)
102
103/****************
104 * Some constants used to access the hardware
105 */
106
107/* Register offsets and value constans */
108#define XIRCREG_CR 0 /* Command register (wr) */
109enum xirc_cr {
110 TransmitPacket = 0x01,
111 SoftReset = 0x02,
112 EnableIntr = 0x04,
113 ForceIntr = 0x08,
114 ClearTxFIFO = 0x10,
115 ClearRxOvrun = 0x20,
116 RestartTx = 0x40
117};
118#define XIRCREG_ESR 0 /* Ethernet status register (rd) */
119enum xirc_esr {
120 FullPktRcvd = 0x01, /* full packet in receive buffer */
121 PktRejected = 0x04, /* a packet has been rejected */
122 TxPktPend = 0x08, /* TX Packet Pending */
123 IncorPolarity = 0x10,
124 MediaSelect = 0x20 /* set if TP, clear if AUI */
125};
126#define XIRCREG_PR 1 /* Page Register select */
127#define XIRCREG_EDP 4 /* Ethernet Data Port Register */
128#define XIRCREG_ISR 6 /* Ethernet Interrupt Status Register */
129enum xirc_isr {
130 TxBufOvr = 0x01, /* TX Buffer Overflow */
131 PktTxed = 0x02, /* Packet Transmitted */
132 MACIntr = 0x04, /* MAC Interrupt occurred */
133 TxResGrant = 0x08, /* Tx Reservation Granted */
134 RxFullPkt = 0x20, /* Rx Full Packet */
135 RxPktRej = 0x40, /* Rx Packet Rejected */
136 ForcedIntr= 0x80 /* Forced Interrupt */
137};
138#define XIRCREG1_IMR0 12 /* Ethernet Interrupt Mask Register (on page 1)*/
139#define XIRCREG1_IMR1 13
140#define XIRCREG0_TSO 8 /* Transmit Space Open Register (on page 0)*/
141#define XIRCREG0_TRS 10 /* Transmit reservation Size Register (page 0)*/
142#define XIRCREG0_DO 12 /* Data Offset Register (page 0) (wr) */
143#define XIRCREG0_RSR 12 /* Receive Status Register (page 0) (rd) */
144enum xirc_rsr {
145 PhyPkt = 0x01, /* set:physical packet, clear: multicast packet */
146 BrdcstPkt = 0x02, /* set if it is a broadcast packet */
147 PktTooLong = 0x04, /* set if packet length > 1518 */
148 AlignErr = 0x10, /* incorrect CRC and last octet not complete */
149 CRCErr = 0x20, /* incorrect CRC and last octet is complete */
150 PktRxOk = 0x80 /* received ok */
151};
152#define XIRCREG0_PTR 13 /* packets transmitted register (rd) */
153#define XIRCREG0_RBC 14 /* receive byte count regsister (rd) */
154#define XIRCREG1_ECR 14 /* ethernet configurationn register */
155enum xirc_ecr {
156 FullDuplex = 0x04, /* enable full duplex mode */
157 LongTPMode = 0x08, /* adjust for longer lengths of TP cable */
158 DisablePolCor = 0x10,/* disable auto polarity correction */
159 DisableLinkPulse = 0x20, /* disable link pulse generation */
160 DisableAutoTx = 0x40, /* disable auto-transmit */
161};
162#define XIRCREG2_RBS 8 /* receive buffer start register */
163#define XIRCREG2_LED 10 /* LED Configuration register */
164/* values for the leds: Bits 2-0 for led 1
165 * 0 disabled Bits 5-3 for led 2
166 * 1 collision
167 * 2 noncollision
168 * 3 link_detected
169 * 4 incor_polarity
170 * 5 jabber
171 * 6 auto_assertion
172 * 7 rx_tx_activity
173 */
174#define XIRCREG2_MSR 12 /* Mohawk specific register */
175
176#define XIRCREG4_GPR0 8 /* General Purpose Register 0 */
177#define XIRCREG4_GPR1 9 /* General Purpose Register 1 */
178#define XIRCREG2_GPR2 13 /* General Purpose Register 2 (page2!)*/
179#define XIRCREG4_BOV 10 /* Bonding Version Register */
180#define XIRCREG4_LMA 12 /* Local Memory Address Register */
181#define XIRCREG4_LMD 14 /* Local Memory Data Port */
182/* MAC register can only by accessed with 8 bit operations */
183#define XIRCREG40_CMD0 8 /* Command Register (wr) */
184enum xirc_cmd { /* Commands */
185 Transmit = 0x01,
186 EnableRecv = 0x04,
187 DisableRecv = 0x08,
188 Abort = 0x10,
189 Online = 0x20,
190 IntrAck = 0x40,
191 Offline = 0x80
192};
193#define XIRCREG5_RHSA0 10 /* Rx Host Start Address */
194#define XIRCREG40_RXST0 9 /* Receive Status Register */
195#define XIRCREG40_TXST0 11 /* Transmit Status Register 0 */
196#define XIRCREG40_TXST1 12 /* Transmit Status Register 10 */
197#define XIRCREG40_RMASK0 13 /* Receive Mask Register */
198#define XIRCREG40_TMASK0 14 /* Transmit Mask Register 0 */
199#define XIRCREG40_TMASK1 15 /* Transmit Mask Register 0 */
200#define XIRCREG42_SWC0 8 /* Software Configuration 0 */
201#define XIRCREG42_SWC1 9 /* Software Configuration 1 */
202#define XIRCREG42_BOC 10 /* Back-Off Configuration */
203#define XIRCREG44_TDR0 8 /* Time Domain Reflectometry 0 */
204#define XIRCREG44_TDR1 9 /* Time Domain Reflectometry 1 */
205#define XIRCREG44_RXBC_LO 10 /* Rx Byte Count 0 (rd) */
206#define XIRCREG44_RXBC_HI 11 /* Rx Byte Count 1 (rd) */
207#define XIRCREG45_REV 15 /* Revision Register (rd) */
208#define XIRCREG50_IA 8 /* Individual Address (8-13) */
209
f71e1309 210static const char *if_names[] = { "Auto", "10BaseT", "10Base2", "AUI", "100BaseT" };
1da177e4 211
1da177e4
LT
212/* card types */
213#define XIR_UNKNOWN 0 /* unknown: not supported */
214#define XIR_CE 1 /* (prodid 1) different hardware: not supported */
215#define XIR_CE2 2 /* (prodid 2) */
216#define XIR_CE3 3 /* (prodid 3) */
217#define XIR_CEM 4 /* (prodid 1) different hardware: not supported */
218#define XIR_CEM2 5 /* (prodid 2) */
219#define XIR_CEM3 6 /* (prodid 3) */
220#define XIR_CEM33 7 /* (prodid 4) */
221#define XIR_CEM56M 8 /* (prodid 5) */
222#define XIR_CEM56 9 /* (prodid 6) */
223#define XIR_CM28 10 /* (prodid 3) modem only: not supported here */
224#define XIR_CM33 11 /* (prodid 4) modem only: not supported here */
225#define XIR_CM56 12 /* (prodid 5) modem only: not supported here */
226#define XIR_CG 13 /* (prodid 1) GSM modem only: not supported */
227#define XIR_CBE 14 /* (prodid 1) cardbus ethernet: not supported */
228/*====================================================================*/
229
230/* Module parameters */
231
232MODULE_DESCRIPTION("Xircom PCMCIA ethernet driver");
233MODULE_LICENSE("Dual MPL/GPL");
234
235#define INT_MODULE_PARM(n, v) static int n = v; module_param(n, int, 0)
236
237INT_MODULE_PARM(if_port, 0);
238INT_MODULE_PARM(full_duplex, 0);
239INT_MODULE_PARM(do_sound, 1);
240INT_MODULE_PARM(lockup_hack, 0); /* anti lockup hack */
241
242/*====================================================================*/
243
244/* We do not process more than these number of bytes during one
245 * interrupt. (Of course we receive complete packets, so this is not
246 * an exact value).
247 * Something between 2000..22000; first value gives best interrupt latency,
248 * the second enables the usage of the complete on-chip buffer. We use the
249 * high value as the initial value.
250 */
251static unsigned maxrx_bytes = 22000;
252
253/* MII management prototypes */
906da809
OJ
254static void mii_idle(unsigned int ioaddr);
255static void mii_putbit(unsigned int ioaddr, unsigned data);
256static int mii_getbit(unsigned int ioaddr);
257static void mii_wbits(unsigned int ioaddr, unsigned data, int len);
258static unsigned mii_rd(unsigned int ioaddr, u_char phyaddr, u_char phyreg);
259static void mii_wr(unsigned int ioaddr, u_char phyaddr, u_char phyreg,
1da177e4
LT
260 unsigned data, int len);
261
fba395ee 262static int has_ce2_string(struct pcmcia_device * link);
15b99ac1 263static int xirc2ps_config(struct pcmcia_device * link);
fba395ee 264static void xirc2ps_release(struct pcmcia_device * link);
cc3b4866 265static void xirc2ps_detach(struct pcmcia_device *p_dev);
1da177e4 266
7d12e780 267static irqreturn_t xirc2ps_interrupt(int irq, void *dev_id);
1da177e4 268
f8653464 269struct local_info {
c4028958 270 struct net_device *dev;
fd238232 271 struct pcmcia_device *p_dev;
6394d7c9 272
1da177e4
LT
273 int card_type;
274 int probe_port;
275 int silicon; /* silicon revision. 0=old CE2, 1=Scipper, 4=Mohawk */
276 int mohawk; /* a CE3 type card */
277 int dingo; /* a CEM56 type card */
278 int new_mii; /* has full 10baseT/100baseT MII */
279 int modem; /* is a multi function card (i.e with a modem) */
280 void __iomem *dingo_ccr; /* only used for CEM56 cards */
281 unsigned last_ptr_value; /* last packets transmitted value */
282 const char *manf_str;
9a469abe 283 struct work_struct tx_timeout_task;
f8653464 284};
1da177e4
LT
285
286/****************
287 * Some more prototypes
288 */
dbf02fae
SH
289static netdev_tx_t do_start_xmit(struct sk_buff *skb,
290 struct net_device *dev);
ed4cb133 291static void xirc_tx_timeout(struct net_device *dev);
c4028958 292static void xirc2ps_tx_timeout_task(struct work_struct *work);
1da177e4
LT
293static void set_addresses(struct net_device *dev);
294static void set_multicast_list(struct net_device *dev);
dddfbd82 295static int set_card_type(struct pcmcia_device *link);
1da177e4
LT
296static int do_config(struct net_device *dev, struct ifmap *map);
297static int do_open(struct net_device *dev);
298static int do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
7282d491 299static const struct ethtool_ops netdev_ethtool_ops;
1da177e4
LT
300static void hardreset(struct net_device *dev);
301static void do_reset(struct net_device *dev, int full);
302static int init_mii(struct net_device *dev);
303static void do_powerdown(struct net_device *dev);
304static int do_stop(struct net_device *dev);
305
306/*=============== Helper functions =========================*/
1da177e4
LT
307#define SelectPage(pgnr) outb((pgnr), ioaddr + XIRCREG_PR)
308#define GetByte(reg) ((unsigned)inb(ioaddr + (reg)))
309#define GetWord(reg) ((unsigned)inw(ioaddr + (reg)))
310#define PutByte(reg,value) outb((value), ioaddr+(reg))
311#define PutWord(reg,value) outw((value), ioaddr+(reg))
312
313/*====== Functions used for debugging =================================*/
dd0fab5b 314#if 0 /* reading regs may change system status */
1da177e4
LT
315static void
316PrintRegisters(struct net_device *dev)
317{
906da809 318 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
319
320 if (pc_debug > 1) {
321 int i, page;
322
636b8116 323 printk(KERN_DEBUG pr_fmt("Register common: "));
1da177e4 324 for (i = 0; i < 8; i++)
636b8116
JP
325 pr_cont(" %2.2x", GetByte(i));
326 pr_cont("\n");
1da177e4 327 for (page = 0; page <= 8; page++) {
636b8116 328 printk(KERN_DEBUG pr_fmt("Register page %2x: "), page);
1da177e4
LT
329 SelectPage(page);
330 for (i = 8; i < 16; i++)
636b8116
JP
331 pr_cont(" %2.2x", GetByte(i));
332 pr_cont("\n");
1da177e4
LT
333 }
334 for (page=0x40 ; page <= 0x5f; page++) {
8e95a202
JP
335 if (page == 0x43 || (page >= 0x46 && page <= 0x4f) ||
336 (page >= 0x51 && page <=0x5e))
337 continue;
636b8116 338 printk(KERN_DEBUG pr_fmt("Register page %2x: "), page);
1da177e4
LT
339 SelectPage(page);
340 for (i = 8; i < 16; i++)
636b8116
JP
341 pr_cont(" %2.2x", GetByte(i));
342 pr_cont("\n");
1da177e4
LT
343 }
344 }
345}
dd0fab5b 346#endif /* 0 */
1da177e4
LT
347
348/*============== MII Management functions ===============*/
349
350/****************
351 * Turn around for read
352 */
353static void
906da809 354mii_idle(unsigned int ioaddr)
1da177e4
LT
355{
356 PutByte(XIRCREG2_GPR2, 0x04|0); /* drive MDCK low */
357 udelay(1);
358 PutByte(XIRCREG2_GPR2, 0x04|1); /* and drive MDCK high */
359 udelay(1);
360}
361
362/****************
363 * Write a bit to MDI/O
364 */
365static void
906da809 366mii_putbit(unsigned int ioaddr, unsigned data)
1da177e4
LT
367{
368 #if 1
369 if (data) {
370 PutByte(XIRCREG2_GPR2, 0x0c|2|0); /* set MDIO */
371 udelay(1);
372 PutByte(XIRCREG2_GPR2, 0x0c|2|1); /* and drive MDCK high */
373 udelay(1);
374 } else {
375 PutByte(XIRCREG2_GPR2, 0x0c|0|0); /* clear MDIO */
376 udelay(1);
377 PutByte(XIRCREG2_GPR2, 0x0c|0|1); /* and drive MDCK high */
378 udelay(1);
379 }
380 #else
381 if (data) {
382 PutWord(XIRCREG2_GPR2-1, 0x0e0e);
383 udelay(1);
384 PutWord(XIRCREG2_GPR2-1, 0x0f0f);
385 udelay(1);
386 } else {
387 PutWord(XIRCREG2_GPR2-1, 0x0c0c);
388 udelay(1);
389 PutWord(XIRCREG2_GPR2-1, 0x0d0d);
390 udelay(1);
391 }
392 #endif
393}
394
395/****************
396 * Get a bit from MDI/O
397 */
398static int
906da809 399mii_getbit(unsigned int ioaddr)
1da177e4
LT
400{
401 unsigned d;
402
403 PutByte(XIRCREG2_GPR2, 4|0); /* drive MDCK low */
404 udelay(1);
405 d = GetByte(XIRCREG2_GPR2); /* read MDIO */
406 PutByte(XIRCREG2_GPR2, 4|1); /* drive MDCK high again */
407 udelay(1);
408 return d & 0x20; /* read MDIO */
409}
410
411static void
906da809 412mii_wbits(unsigned int ioaddr, unsigned data, int len)
1da177e4
LT
413{
414 unsigned m = 1 << (len-1);
415 for (; m; m >>= 1)
416 mii_putbit(ioaddr, data & m);
417}
418
419static unsigned
906da809 420mii_rd(unsigned int ioaddr, u_char phyaddr, u_char phyreg)
1da177e4
LT
421{
422 int i;
423 unsigned data=0, m;
424
425 SelectPage(2);
426 for (i=0; i < 32; i++) /* 32 bit preamble */
427 mii_putbit(ioaddr, 1);
428 mii_wbits(ioaddr, 0x06, 4); /* Start and opcode for read */
429 mii_wbits(ioaddr, phyaddr, 5); /* PHY address to be accessed */
430 mii_wbits(ioaddr, phyreg, 5); /* PHY register to read */
431 mii_idle(ioaddr); /* turn around */
432 mii_getbit(ioaddr);
433
434 for (m = 1<<15; m; m >>= 1)
435 if (mii_getbit(ioaddr))
436 data |= m;
437 mii_idle(ioaddr);
438 return data;
439}
440
441static void
906da809
OJ
442mii_wr(unsigned int ioaddr, u_char phyaddr, u_char phyreg, unsigned data,
443 int len)
1da177e4
LT
444{
445 int i;
446
447 SelectPage(2);
448 for (i=0; i < 32; i++) /* 32 bit preamble */
449 mii_putbit(ioaddr, 1);
450 mii_wbits(ioaddr, 0x05, 4); /* Start and opcode for write */
451 mii_wbits(ioaddr, phyaddr, 5); /* PHY address to be accessed */
452 mii_wbits(ioaddr, phyreg, 5); /* PHY Register to write */
453 mii_putbit(ioaddr, 1); /* turn around */
454 mii_putbit(ioaddr, 0);
455 mii_wbits(ioaddr, data, len); /* And write the data */
456 mii_idle(ioaddr);
457}
458
459/*============= Main bulk of functions =========================*/
460
0cd6e828
SH
461static const struct net_device_ops netdev_ops = {
462 .ndo_open = do_open,
463 .ndo_stop = do_stop,
464 .ndo_start_xmit = do_start_xmit,
465 .ndo_tx_timeout = xirc_tx_timeout,
466 .ndo_set_config = do_config,
467 .ndo_do_ioctl = do_ioctl,
afc4b13d 468 .ndo_set_rx_mode = set_multicast_list,
0cd6e828
SH
469 .ndo_set_mac_address = eth_mac_addr,
470 .ndo_validate_addr = eth_validate_addr,
471};
472
f8cfa618 473static int
15b99ac1 474xirc2ps_probe(struct pcmcia_device *link)
1da177e4 475{
1da177e4 476 struct net_device *dev;
f8653464 477 struct local_info *local;
1da177e4 478
dd0fab5b 479 dev_dbg(&link->dev, "attach()\n");
1da177e4
LT
480
481 /* Allocate the device structure */
f8653464 482 dev = alloc_etherdev(sizeof(struct local_info));
1da177e4 483 if (!dev)
f8cfa618 484 return -ENOMEM;
1da177e4 485 local = netdev_priv(dev);
c4028958 486 local->dev = dev;
fba395ee 487 local->p_dev = link;
1da177e4
LT
488 link->priv = dev;
489
490 /* General socket configuration */
7feabb64 491 link->config_index = 1;
1da177e4
LT
492
493 /* Fill in card specific entries */
0cd6e828
SH
494 dev->netdev_ops = &netdev_ops;
495 dev->ethtool_ops = &netdev_ethtool_ops;
1da177e4 496 dev->watchdog_timeo = TX_TIMEOUT;
c4028958 497 INIT_WORK(&local->tx_timeout_task, xirc2ps_tx_timeout_task);
1da177e4 498
15b99ac1 499 return xirc2ps_config(link);
1da177e4
LT
500} /* xirc2ps_attach */
501
1da177e4 502static void
fba395ee 503xirc2ps_detach(struct pcmcia_device *link)
1da177e4
LT
504{
505 struct net_device *dev = link->priv;
1da177e4 506
dd0fab5b 507 dev_dbg(&link->dev, "detach\n");
1da177e4 508
c7c2fa07 509 unregister_netdev(dev);
1da177e4 510
e2d40963 511 xirc2ps_release(link);
1da177e4 512
1da177e4
LT
513 free_netdev(dev);
514} /* xirc2ps_detach */
515
516/****************
517 * Detect the type of the card. s is the buffer with the data of tuple 0x20
518 * Returns: 0 := not supported
519 * mediaid=11 and prodid=47
520 * Media-Id bits:
521 * Ethernet 0x01
522 * Tokenring 0x02
523 * Arcnet 0x04
524 * Wireless 0x08
525 * Modem 0x10
526 * GSM only 0x20
527 * Prod-Id bits:
528 * Pocket 0x10
529 * External 0x20
530 * Creditcard 0x40
531 * Cardbus 0x80
532 *
533 */
534static int
dddfbd82 535set_card_type(struct pcmcia_device *link)
1da177e4
LT
536{
537 struct net_device *dev = link->priv;
f8653464 538 struct local_info *local = netdev_priv(dev);
dddfbd82
DB
539 u8 *buf;
540 unsigned int cisrev, mediaid, prodid;
541 size_t len;
542
543 len = pcmcia_get_tuple(link, CISTPL_MANFID, &buf);
544 if (len < 5) {
545 dev_err(&link->dev, "invalid CIS -- sorry\n");
546 return 0;
547 }
1da177e4 548
dddfbd82
DB
549 cisrev = buf[2];
550 mediaid = buf[3];
551 prodid = buf[4];
1da177e4 552
dd0fab5b 553 dev_dbg(&link->dev, "cisrev=%02x mediaid=%02x prodid=%02x\n",
1da177e4
LT
554 cisrev, mediaid, prodid);
555
556 local->mohawk = 0;
557 local->dingo = 0;
558 local->modem = 0;
559 local->card_type = XIR_UNKNOWN;
560 if (!(prodid & 0x40)) {
636b8116 561 pr_notice("Oops: Not a creditcard\n");
1da177e4
LT
562 return 0;
563 }
564 if (!(mediaid & 0x01)) {
636b8116 565 pr_notice("Not an Ethernet card\n");
1da177e4
LT
566 return 0;
567 }
568 if (mediaid & 0x10) {
569 local->modem = 1;
570 switch(prodid & 15) {
571 case 1: local->card_type = XIR_CEM ; break;
572 case 2: local->card_type = XIR_CEM2 ; break;
573 case 3: local->card_type = XIR_CEM3 ; break;
574 case 4: local->card_type = XIR_CEM33 ; break;
575 case 5: local->card_type = XIR_CEM56M;
576 local->mohawk = 1;
577 break;
578 case 6:
579 case 7: /* 7 is the RealPort 10/56 */
580 local->card_type = XIR_CEM56 ;
581 local->mohawk = 1;
582 local->dingo = 1;
583 break;
584 }
585 } else {
586 switch(prodid & 15) {
587 case 1: local->card_type = has_ce2_string(link)? XIR_CE2 : XIR_CE ;
588 break;
589 case 2: local->card_type = XIR_CE2; break;
590 case 3: local->card_type = XIR_CE3;
591 local->mohawk = 1;
592 break;
593 }
594 }
595 if (local->card_type == XIR_CE || local->card_type == XIR_CEM) {
636b8116 596 pr_notice("Sorry, this is an old CE card\n");
1da177e4
LT
597 return 0;
598 }
599 if (local->card_type == XIR_UNKNOWN)
636b8116 600 pr_notice("unknown card (mediaid=%02x prodid=%02x)\n", mediaid, prodid);
1da177e4
LT
601
602 return 1;
603}
604
605/****************
606 * There are some CE2 cards out which claim to be a CE card.
607 * This function looks for a "CE2" in the 3rd version field.
608 * Returns: true if this is a CE2
609 */
610static int
a9606fd3 611has_ce2_string(struct pcmcia_device * p_dev)
1da177e4 612{
a9606fd3
DB
613 if (p_dev->prod_id[2] && strstr(p_dev->prod_id[2], "CE2"))
614 return 1;
615 return 0;
1da177e4
LT
616}
617
b54bf94b 618static int
00990e7c 619xirc2ps_config_modem(struct pcmcia_device *p_dev, void *priv_data)
b54bf94b
DB
620{
621 unsigned int ioaddr;
622
00990e7c
DB
623 if ((p_dev->resource[0]->start & 0xf) == 8)
624 return -ENODEV;
625
626 p_dev->resource[0]->end = 16;
627 p_dev->resource[1]->end = 8;
628 p_dev->resource[0]->flags &= ~IO_DATA_PATH_WIDTH;
629 p_dev->resource[0]->flags |= IO_DATA_PATH_WIDTH_16;
630 p_dev->resource[1]->flags &= ~IO_DATA_PATH_WIDTH;
631 p_dev->resource[1]->flags |= IO_DATA_PATH_WIDTH_8;
632 p_dev->io_lines = 10;
633
634 p_dev->resource[1]->start = p_dev->resource[0]->start;
635 for (ioaddr = 0x300; ioaddr < 0x400; ioaddr += 0x10) {
636 p_dev->resource[0]->start = ioaddr;
637 if (!pcmcia_request_io(p_dev))
638 return 0;
b54bf94b
DB
639 }
640 return -ENODEV;
641}
642
643static int
00990e7c 644xirc2ps_config_check(struct pcmcia_device *p_dev, void *priv_data)
b54bf94b
DB
645{
646 int *pass = priv_data;
00990e7c 647 resource_size_t tmp = p_dev->resource[1]->start;
b54bf94b 648
00990e7c
DB
649 tmp += (*pass ? (p_dev->config_index & 0x20 ? -24 : 8)
650 : (p_dev->config_index & 0x20 ? 8 : -24));
651
652 if ((p_dev->resource[0]->start & 0xf) == 8)
653 return -ENODEV;
654
655 p_dev->resource[0]->end = 18;
656 p_dev->resource[1]->end = 8;
657 p_dev->resource[0]->flags &= ~IO_DATA_PATH_WIDTH;
658 p_dev->resource[0]->flags |= IO_DATA_PATH_WIDTH_16;
659 p_dev->resource[1]->flags &= ~IO_DATA_PATH_WIDTH;
660 p_dev->resource[1]->flags |= IO_DATA_PATH_WIDTH_8;
661 p_dev->io_lines = 10;
b54bf94b 662
00990e7c
DB
663 p_dev->resource[1]->start = p_dev->resource[0]->start;
664 p_dev->resource[0]->start = tmp;
665 return pcmcia_request_io(p_dev);
b54bf94b
DB
666}
667
dddfbd82
DB
668
669static int pcmcia_get_mac_ce(struct pcmcia_device *p_dev,
670 tuple_t *tuple,
671 void *priv)
672{
673 struct net_device *dev = priv;
674 int i;
675
676 if (tuple->TupleDataLen != 13)
677 return -EINVAL;
678 if ((tuple->TupleData[0] != 2) || (tuple->TupleData[1] != 1) ||
679 (tuple->TupleData[2] != 6))
680 return -EINVAL;
681 /* another try (James Lehmer's CE2 version 4.1)*/
682 for (i = 2; i < 6; i++)
683 dev->dev_addr[i] = tuple->TupleData[i+2];
684 return 0;
685};
686
687
15b99ac1 688static int
fba395ee 689xirc2ps_config(struct pcmcia_device * link)
1da177e4 690{
1da177e4 691 struct net_device *dev = link->priv;
f8653464 692 struct local_info *local = netdev_priv(dev);
b54bf94b 693 unsigned int ioaddr;
dddfbd82
DB
694 int err;
695 u8 *buf;
696 size_t len;
1da177e4
LT
697
698 local->dingo_ccr = NULL;
699
dd0fab5b 700 dev_dbg(&link->dev, "config\n");
1da177e4
LT
701
702 /* Is this a valid card */
7d2e8d00 703 if (link->has_manf_id == 0) {
636b8116 704 pr_notice("manfid not found in CIS\n");
1da177e4
LT
705 goto failure;
706 }
707
7d2e8d00 708 switch (link->manf_id) {
1da177e4
LT
709 case MANFID_XIRCOM:
710 local->manf_str = "Xircom";
711 break;
712 case MANFID_ACCTON:
713 local->manf_str = "Accton";
714 break;
715 case MANFID_COMPAQ:
716 case MANFID_COMPAQ2:
717 local->manf_str = "Compaq";
718 break;
719 case MANFID_INTEL:
720 local->manf_str = "Intel";
721 break;
722 case MANFID_TOSHIBA:
723 local->manf_str = "Toshiba";
724 break;
725 default:
636b8116
JP
726 pr_notice("Unknown Card Manufacturer ID: 0x%04x\n",
727 (unsigned)link->manf_id);
1da177e4
LT
728 goto failure;
729 }
dd0fab5b 730 dev_dbg(&link->dev, "found %s card\n", local->manf_str);
1da177e4 731
dddfbd82 732 if (!set_card_type(link)) {
636b8116 733 pr_notice("this card is not supported\n");
1da177e4
LT
734 goto failure;
735 }
736
1da177e4 737 /* get the ethernet address from the CIS */
dddfbd82
DB
738 err = pcmcia_get_mac_from_cis(link, dev);
739
740 /* not found: try to get the node-id from tuple 0x89 */
741 if (err) {
742 len = pcmcia_get_tuple(link, 0x89, &buf);
743 /* data layout looks like tuple 0x22 */
744 if (buf && len == 8) {
745 if (*buf == CISTPL_FUNCE_LAN_NODE_ID) {
746 int i;
747 for (i = 2; i < 6; i++)
748 dev->dev_addr[i] = buf[i+2];
749 } else
750 err = -1;
1da177e4 751 }
dddfbd82 752 kfree(buf);
1da177e4 753 }
dddfbd82
DB
754
755 if (err)
756 err = pcmcia_loop_tuple(link, CISTPL_FUNCE, pcmcia_get_mac_ce, dev);
757
1da177e4 758 if (err) {
636b8116 759 pr_notice("node-id not found in CIS\n");
1da177e4
LT
760 goto failure;
761 }
1da177e4 762
1da177e4
LT
763 if (local->modem) {
764 int pass;
00990e7c 765 link->config_flags |= CONF_AUTO_SET_IO;
1da177e4 766
1da177e4
LT
767 if (local->dingo) {
768 /* Take the Modem IO port from the CIS and scan for a free
769 * Ethernet port */
b54bf94b
DB
770 if (!pcmcia_loop_config(link, xirc2ps_config_modem, NULL))
771 goto port_found;
1da177e4 772 } else {
1da177e4
LT
773 /* We do 2 passes here: The first one uses the regular mapping and
774 * the second tries again, thereby considering that the 32 ports are
775 * mirrored every 32 bytes. Actually we use a mirrored port for
776 * the Mako if (on the first pass) the COR bit 5 is set.
777 */
b54bf94b 778 for (pass=0; pass < 2; pass++)
440eed43
DB
779 if (!pcmcia_loop_config(link, xirc2ps_config_check,
780 &pass))
1da177e4 781 goto port_found;
1da177e4
LT
782 /* if special option:
783 * try to configure as Ethernet only.
784 * .... */
785 }
636b8116 786 pr_notice("no ports available\n");
1da177e4 787 } else {
00990e7c 788 link->io_lines = 10;
90abdc3b 789 link->resource[0]->end = 16;
00990e7c 790 link->resource[0]->flags |= IO_DATA_PATH_WIDTH_16;
1da177e4 791 for (ioaddr = 0x300; ioaddr < 0x400; ioaddr += 0x10) {
90abdc3b
DB
792 link->resource[0]->start = ioaddr;
793 if (!(err = pcmcia_request_io(link)))
1da177e4
LT
794 goto port_found;
795 }
90abdc3b
DB
796 link->resource[0]->start = 0; /* let CS decide */
797 if ((err = pcmcia_request_io(link)))
1da177e4 798 goto config_error;
1da177e4
LT
799 }
800 port_found:
801 if (err)
802 goto config_error;
803
804 /****************
805 * Now allocate an interrupt line. Note that this does not
806 * actually assign a handler to the interrupt.
807 */
eb14120f 808 if ((err=pcmcia_request_irq(link, xirc2ps_interrupt)))
1da177e4 809 goto config_error;
1da177e4 810
1ac71e5a
DB
811 link->config_flags |= CONF_ENABLE_IRQ;
812 if (do_sound)
813 link->config_flags |= CONF_ENABLE_SPKR;
814
815 if ((err = pcmcia_enable_device(link)))
1da177e4 816 goto config_error;
1da177e4
LT
817
818 if (local->dingo) {
1da177e4
LT
819 /* Reset the modem's BAR to the correct value
820 * This is necessary because in the RequestConfiguration call,
821 * the base address of the ethernet port (BasePort1) is written
822 * to the BAR registers of the modem.
823 */
9a017a91
DB
824 err = pcmcia_write_config_byte(link, CISREG_IOBASE_0, (u8)
825 link->resource[1]->start & 0xff);
1d5cc192 826 if (err)
1da177e4 827 goto config_error;
1d5cc192
DB
828
829 err = pcmcia_write_config_byte(link, CISREG_IOBASE_1,
9a017a91 830 (link->resource[1]->start >> 8) & 0xff);
1d5cc192 831 if (err)
1da177e4 832 goto config_error;
1da177e4
LT
833
834 /* There is no config entry for the Ethernet part which
835 * is at 0x0800. So we allocate a window into the attribute
836 * memory and write direct to the CIS registers
837 */
cdb13808
DB
838 link->resource[2]->flags = WIN_DATA_WIDTH_8 | WIN_MEMORY_TYPE_AM |
839 WIN_ENABLE;
840 link->resource[2]->start = link->resource[2]->end = 0;
841 if ((err = pcmcia_request_window(link, link->resource[2], 0)))
1da177e4 842 goto config_error;
dd0fab5b 843
cdb13808
DB
844 local->dingo_ccr = ioremap(link->resource[2]->start, 0x1000) + 0x0800;
845 if ((err = pcmcia_map_mem_page(link, link->resource[2], 0)))
1da177e4 846 goto config_error;
1da177e4
LT
847
848 /* Setup the CCRs; there are no infos in the CIS about the Ethernet
849 * part.
850 */
851 writeb(0x47, local->dingo_ccr + CISREG_COR);
9a017a91 852 ioaddr = link->resource[0]->start;
1da177e4
LT
853 writeb(ioaddr & 0xff , local->dingo_ccr + CISREG_IOBASE_0);
854 writeb((ioaddr >> 8)&0xff , local->dingo_ccr + CISREG_IOBASE_1);
855
856 #if 0
857 {
858 u_char tmp;
636b8116 859 pr_info("ECOR:");
1da177e4
LT
860 for (i=0; i < 7; i++) {
861 tmp = readb(local->dingo_ccr + i*2);
636b8116 862 pr_cont(" %02x", tmp);
1da177e4 863 }
636b8116
JP
864 pr_cont("\n");
865 pr_info("DCOR:");
1da177e4
LT
866 for (i=0; i < 4; i++) {
867 tmp = readb(local->dingo_ccr + 0x20 + i*2);
636b8116 868 pr_cont(" %02x", tmp);
1da177e4 869 }
636b8116
JP
870 pr_cont("\n");
871 pr_info("SCOR:");
1da177e4
LT
872 for (i=0; i < 10; i++) {
873 tmp = readb(local->dingo_ccr + 0x40 + i*2);
636b8116 874 pr_cont(" %02x", tmp);
1da177e4 875 }
636b8116 876 pr_cont("\n");
1da177e4
LT
877 }
878 #endif
879
880 writeb(0x01, local->dingo_ccr + 0x20);
881 writeb(0x0c, local->dingo_ccr + 0x22);
882 writeb(0x00, local->dingo_ccr + 0x24);
883 writeb(0x00, local->dingo_ccr + 0x26);
884 writeb(0x00, local->dingo_ccr + 0x28);
885 }
886
887 /* The if_port symbol can be set when the module is loaded */
888 local->probe_port=0;
889 if (!if_port) {
890 local->probe_port = dev->if_port = 1;
891 } else if ((if_port >= 1 && if_port <= 2) ||
892 (local->mohawk && if_port==4))
893 dev->if_port = if_port;
894 else
636b8116 895 pr_notice("invalid if_port requested\n");
1da177e4
LT
896
897 /* we can now register the device with the net subsystem */
eb14120f 898 dev->irq = link->irq;
9a017a91 899 dev->base_addr = link->resource[0]->start;
1da177e4
LT
900
901 if (local->dingo)
902 do_reset(dev, 1); /* a kludge to make the cem56 work */
903
dd2e5a15 904 SET_NETDEV_DEV(dev, &link->dev);
1da177e4
LT
905
906 if ((err=register_netdev(dev))) {
636b8116 907 pr_notice("register_netdev() failed\n");
1da177e4
LT
908 goto config_error;
909 }
910
1da177e4 911 /* give some infos about the hardware */
636b8116
JP
912 netdev_info(dev, "%s: port %#3lx, irq %d, hwaddr %pM\n",
913 local->manf_str, (u_long)dev->base_addr, (int)dev->irq,
914 dev->dev_addr);
1da177e4 915
15b99ac1 916 return 0;
1da177e4
LT
917
918 config_error:
1da177e4 919 xirc2ps_release(link);
15b99ac1 920 return -ENODEV;
1da177e4 921
1da177e4 922 failure:
15b99ac1 923 return -ENODEV;
1da177e4
LT
924} /* xirc2ps_config */
925
1da177e4 926static void
fba395ee 927xirc2ps_release(struct pcmcia_device *link)
1da177e4 928{
dd0fab5b 929 dev_dbg(&link->dev, "release\n");
1da177e4 930
cdb13808 931 if (link->resource[2]->end) {
5f2a71fc 932 struct net_device *dev = link->priv;
f8653464 933 struct local_info *local = netdev_priv(dev);
5f2a71fc
DB
934 if (local->dingo)
935 iounmap(local->dingo_ccr - 0x0800);
936 }
fba395ee 937 pcmcia_disable_device(link);
1da177e4
LT
938} /* xirc2ps_release */
939
940/*====================================================================*/
941
98e4c28b 942
fba395ee 943static int xirc2ps_suspend(struct pcmcia_device *link)
98e4c28b 944{
98e4c28b
DB
945 struct net_device *dev = link->priv;
946
e2d40963
DB
947 if (link->open) {
948 netif_device_detach(dev);
949 do_powerdown(dev);
98e4c28b
DB
950 }
951
952 return 0;
953}
954
fba395ee 955static int xirc2ps_resume(struct pcmcia_device *link)
98e4c28b 956{
98e4c28b
DB
957 struct net_device *dev = link->priv;
958
e2d40963 959 if (link->open) {
8661bb5b
DB
960 do_reset(dev,1);
961 netif_device_attach(dev);
98e4c28b
DB
962 }
963
964 return 0;
965}
966
1da177e4
LT
967
968/*====================================================================*/
969
970/****************
971 * This is the Interrupt service route.
972 */
973static irqreturn_t
7d12e780 974xirc2ps_interrupt(int irq, void *dev_id)
1da177e4
LT
975{
976 struct net_device *dev = (struct net_device *)dev_id;
f8653464 977 struct local_info *lp = netdev_priv(dev);
906da809 978 unsigned int ioaddr;
1da177e4
LT
979 u_char saved_page;
980 unsigned bytes_rcvd;
981 unsigned int_status, eth_status, rx_status, tx_status;
982 unsigned rsr, pktlen;
983 ulong start_ticks = jiffies; /* fixme: jiffies rollover every 497 days
984 * is this something to worry about?
985 * -- on a laptop?
986 */
987
988 if (!netif_device_present(dev))
989 return IRQ_HANDLED;
990
991 ioaddr = dev->base_addr;
992 if (lp->mohawk) { /* must disable the interrupt */
993 PutByte(XIRCREG_CR, 0);
994 }
995
dd0fab5b 996 pr_debug("%s: interrupt %d at %#x.\n", dev->name, irq, ioaddr);
1da177e4
LT
997
998 saved_page = GetByte(XIRCREG_PR);
999 /* Read the ISR to see whats the cause for the interrupt.
1000 * This also clears the interrupt flags on CE2 cards
1001 */
1002 int_status = GetByte(XIRCREG_ISR);
1003 bytes_rcvd = 0;
1004 loop_entry:
1005 if (int_status == 0xff) { /* card may be ejected */
dd0fab5b 1006 pr_debug("%s: interrupt %d for dead card\n", dev->name, irq);
1da177e4
LT
1007 goto leave;
1008 }
1009 eth_status = GetByte(XIRCREG_ESR);
1010
1011 SelectPage(0x40);
1012 rx_status = GetByte(XIRCREG40_RXST0);
1013 PutByte(XIRCREG40_RXST0, (~rx_status & 0xff));
1014 tx_status = GetByte(XIRCREG40_TXST0);
1015 tx_status |= GetByte(XIRCREG40_TXST1) << 8;
1016 PutByte(XIRCREG40_TXST0, 0);
1017 PutByte(XIRCREG40_TXST1, 0);
1018
dd0fab5b 1019 pr_debug("%s: ISR=%#2.2x ESR=%#2.2x RSR=%#2.2x TSR=%#4.4x\n",
1da177e4
LT
1020 dev->name, int_status, eth_status, rx_status, tx_status);
1021
1022 /***** receive section ******/
1023 SelectPage(0);
1024 while (eth_status & FullPktRcvd) {
1025 rsr = GetByte(XIRCREG0_RSR);
1026 if (bytes_rcvd > maxrx_bytes && (rsr & PktRxOk)) {
1027 /* too many bytes received during this int, drop the rest of the
1028 * packets */
6394d7c9 1029 dev->stats.rx_dropped++;
dd0fab5b 1030 pr_debug("%s: RX drop, too much done\n", dev->name);
1da177e4
LT
1031 } else if (rsr & PktRxOk) {
1032 struct sk_buff *skb;
1033
1034 pktlen = GetWord(XIRCREG0_RBC);
1035 bytes_rcvd += pktlen;
1036
dd0fab5b 1037 pr_debug("rsr=%#02x packet_length=%u\n", rsr, pktlen);
1da177e4 1038
dae2e9f4
PD
1039 /* 1 extra so we can use insw */
1040 skb = netdev_alloc_skb(dev, pktlen + 3);
1da177e4 1041 if (!skb) {
6394d7c9 1042 dev->stats.rx_dropped++;
1da177e4
LT
1043 } else { /* okay get the packet */
1044 skb_reserve(skb, 2);
1045 if (lp->silicon == 0 ) { /* work around a hardware bug */
1046 unsigned rhsa; /* receive start address */
1047
1048 SelectPage(5);
1049 rhsa = GetWord(XIRCREG5_RHSA0);
1050 SelectPage(0);
1051 rhsa += 3; /* skip control infos */
1052 if (rhsa >= 0x8000)
1053 rhsa = 0;
1054 if (rhsa + pktlen > 0x8000) {
1055 unsigned i;
1056 u_char *buf = skb_put(skb, pktlen);
1057 for (i=0; i < pktlen ; i++, rhsa++) {
1058 buf[i] = GetByte(XIRCREG_EDP);
1059 if (rhsa == 0x8000) {
1060 rhsa = 0;
1061 i--;
1062 }
1063 }
1064 } else {
1065 insw(ioaddr+XIRCREG_EDP,
1066 skb_put(skb, pktlen), (pktlen+1)>>1);
1067 }
1068 }
1069 #if 0
1070 else if (lp->mohawk) {
1071 /* To use this 32 bit access we should use
1072 * a manual optimized loop
1073 * Also the words are swapped, we can get more
1074 * performance by using 32 bit access and swapping
1075 * the words in a register. Will need this for cardbus
1076 *
1077 * Note: don't forget to change the ALLOC_SKB to .. +3
1078 */
1079 unsigned i;
1080 u_long *p = skb_put(skb, pktlen);
1081 register u_long a;
906da809 1082 unsigned int edpreg = ioaddr+XIRCREG_EDP-2;
1da177e4
LT
1083 for (i=0; i < len ; i += 4, p++) {
1084 a = inl(edpreg);
1085 __asm__("rorl $16,%0\n\t"
1086 :"=q" (a)
1087 : "0" (a));
1088 *p = a;
1089 }
1090 }
1091 #endif
1092 else {
1093 insw(ioaddr+XIRCREG_EDP, skb_put(skb, pktlen),
1094 (pktlen+1)>>1);
1095 }
1096 skb->protocol = eth_type_trans(skb, dev);
1da177e4 1097 netif_rx(skb);
6394d7c9
SH
1098 dev->stats.rx_packets++;
1099 dev->stats.rx_bytes += pktlen;
1da177e4 1100 if (!(rsr & PhyPkt))
6394d7c9 1101 dev->stats.multicast++;
1da177e4
LT
1102 }
1103 } else { /* bad packet */
dd0fab5b 1104 pr_debug("rsr=%#02x\n", rsr);
1da177e4
LT
1105 }
1106 if (rsr & PktTooLong) {
6394d7c9 1107 dev->stats.rx_frame_errors++;
dd0fab5b 1108 pr_debug("%s: Packet too long\n", dev->name);
1da177e4
LT
1109 }
1110 if (rsr & CRCErr) {
6394d7c9 1111 dev->stats.rx_crc_errors++;
dd0fab5b 1112 pr_debug("%s: CRC error\n", dev->name);
1da177e4
LT
1113 }
1114 if (rsr & AlignErr) {
6394d7c9 1115 dev->stats.rx_fifo_errors++; /* okay ? */
dd0fab5b 1116 pr_debug("%s: Alignment error\n", dev->name);
1da177e4
LT
1117 }
1118
1119 /* clear the received/dropped/error packet */
1120 PutWord(XIRCREG0_DO, 0x8000); /* issue cmd: skip_rx_packet */
1121
1122 /* get the new ethernet status */
1123 eth_status = GetByte(XIRCREG_ESR);
1124 }
1125 if (rx_status & 0x10) { /* Receive overrun */
6394d7c9 1126 dev->stats.rx_over_errors++;
1da177e4 1127 PutByte(XIRCREG_CR, ClearRxOvrun);
dd0fab5b 1128 pr_debug("receive overrun cleared\n");
1da177e4
LT
1129 }
1130
1131 /***** transmit section ******/
1132 if (int_status & PktTxed) {
1133 unsigned n, nn;
1134
1135 n = lp->last_ptr_value;
1136 nn = GetByte(XIRCREG0_PTR);
1137 lp->last_ptr_value = nn;
1138 if (nn < n) /* rollover */
6394d7c9 1139 dev->stats.tx_packets += 256 - n;
1da177e4 1140 else if (n == nn) { /* happens sometimes - don't know why */
dd0fab5b 1141 pr_debug("PTR not changed?\n");
1da177e4 1142 } else
6394d7c9 1143 dev->stats.tx_packets += lp->last_ptr_value - n;
1da177e4
LT
1144 netif_wake_queue(dev);
1145 }
ac5fd4f4
CIK
1146 if (tx_status & 0x0002) { /* Excessive collisions */
1147 pr_debug("tx restarted due to excessive collisions\n");
1da177e4
LT
1148 PutByte(XIRCREG_CR, RestartTx); /* restart transmitter process */
1149 }
1150 if (tx_status & 0x0040)
6394d7c9 1151 dev->stats.tx_aborted_errors++;
1da177e4
LT
1152
1153 /* recalculate our work chunk so that we limit the duration of this
1154 * ISR to about 1/10 of a second.
1155 * Calculate only if we received a reasonable amount of bytes.
1156 */
1157 if (bytes_rcvd > 1000) {
1158 u_long duration = jiffies - start_ticks;
1159
1160 if (duration >= HZ/10) { /* if more than about 1/10 second */
1161 maxrx_bytes = (bytes_rcvd * (HZ/10)) / duration;
1162 if (maxrx_bytes < 2000)
1163 maxrx_bytes = 2000;
1164 else if (maxrx_bytes > 22000)
1165 maxrx_bytes = 22000;
dd0fab5b 1166 pr_debug("set maxrx=%u (rcvd=%u ticks=%lu)\n",
1da177e4
LT
1167 maxrx_bytes, bytes_rcvd, duration);
1168 } else if (!duration && maxrx_bytes < 22000) {
1169 /* now much faster */
1170 maxrx_bytes += 2000;
1171 if (maxrx_bytes > 22000)
1172 maxrx_bytes = 22000;
dd0fab5b 1173 pr_debug("set maxrx=%u\n", maxrx_bytes);
1da177e4
LT
1174 }
1175 }
1176
1177 leave:
1178 if (lockup_hack) {
1179 if (int_status != 0xff && (int_status = GetByte(XIRCREG_ISR)) != 0)
1180 goto loop_entry;
1181 }
1182 SelectPage(saved_page);
1183 PutByte(XIRCREG_CR, EnableIntr); /* re-enable interrupts */
1184 /* Instead of dropping packets during a receive, we could
1185 * force an interrupt with this command:
1186 * PutByte(XIRCREG_CR, EnableIntr|ForceIntr);
1187 */
1188 return IRQ_HANDLED;
1189} /* xirc2ps_interrupt */
1190
1191/*====================================================================*/
1192
1193static void
c4028958 1194xirc2ps_tx_timeout_task(struct work_struct *work)
1da177e4 1195{
f8653464
HS
1196 struct local_info *local =
1197 container_of(work, struct local_info, tx_timeout_task);
c4028958 1198 struct net_device *dev = local->dev;
1da177e4
LT
1199 /* reset the card */
1200 do_reset(dev,1);
860e9538 1201 netif_trans_update(dev); /* prevent tx timeout */
1da177e4
LT
1202 netif_wake_queue(dev);
1203}
1204
9a469abe 1205static void
ed4cb133 1206xirc_tx_timeout(struct net_device *dev)
9a469abe 1207{
f8653464 1208 struct local_info *lp = netdev_priv(dev);
6394d7c9 1209 dev->stats.tx_errors++;
636b8116 1210 netdev_notice(dev, "transmit timed out\n");
9a469abe
JA
1211 schedule_work(&lp->tx_timeout_task);
1212}
1213
dbf02fae 1214static netdev_tx_t
1da177e4
LT
1215do_start_xmit(struct sk_buff *skb, struct net_device *dev)
1216{
f8653464 1217 struct local_info *lp = netdev_priv(dev);
906da809 1218 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
1219 int okay;
1220 unsigned freespace;
da4f5ccf 1221 unsigned pktlen = skb->len;
1da177e4 1222
dd0fab5b 1223 pr_debug("do_start_xmit(skb=%p, dev=%p) len=%u\n",
1da177e4
LT
1224 skb, dev, pktlen);
1225
1226
1227 /* adjust the packet length to min. required
1228 * and hope that the buffer is large enough
1229 * to provide some random data.
1230 * fixme: For Mohawk we can change this by sending
1231 * a larger packetlen than we actually have; the chip will
1232 * pad this in his buffer with random bytes
1233 */
1234 if (pktlen < ETH_ZLEN)
1235 {
5b057c6b 1236 if (skb_padto(skb, ETH_ZLEN))
6ed10654 1237 return NETDEV_TX_OK;
1da177e4
LT
1238 pktlen = ETH_ZLEN;
1239 }
1240
1241 netif_stop_queue(dev);
1242 SelectPage(0);
1243 PutWord(XIRCREG0_TRS, (u_short)pktlen+2);
1244 freespace = GetWord(XIRCREG0_TSO);
1245 okay = freespace & 0x8000;
1246 freespace &= 0x7fff;
1247 /* TRS doesn't work - (indeed it is eliminated with sil-rev 1) */
1248 okay = pktlen +2 < freespace;
dd0fab5b 1249 pr_debug("%s: avail. tx space=%u%s\n",
1da177e4
LT
1250 dev->name, freespace, okay ? " (okay)":" (not enough)");
1251 if (!okay) { /* not enough space */
5b548140 1252 return NETDEV_TX_BUSY; /* upper layer may decide to requeue this packet */
1da177e4
LT
1253 }
1254 /* send the packet */
1255 PutWord(XIRCREG_EDP, (u_short)pktlen);
1256 outsw(ioaddr+XIRCREG_EDP, skb->data, pktlen>>1);
1257 if (pktlen & 1)
1258 PutByte(XIRCREG_EDP, skb->data[pktlen-1]);
1259
1260 if (lp->mohawk)
1261 PutByte(XIRCREG_CR, TransmitPacket|EnableIntr);
1262
1263 dev_kfree_skb (skb);
6394d7c9 1264 dev->stats.tx_bytes += pktlen;
1da177e4 1265 netif_start_queue(dev);
6ed10654 1266 return NETDEV_TX_OK;
1da177e4
LT
1267}
1268
91fea585
JP
1269struct set_address_info {
1270 int reg_nr;
1271 int page_nr;
1272 int mohawk;
1273 unsigned int ioaddr;
1274};
1275
1276static void set_address(struct set_address_info *sa_info, char *addr)
1277{
1278 unsigned int ioaddr = sa_info->ioaddr;
1279 int i;
1280
1281 for (i = 0; i < 6; i++) {
1282 if (sa_info->reg_nr > 15) {
1283 sa_info->reg_nr = 8;
1284 sa_info->page_nr++;
1285 SelectPage(sa_info->page_nr);
1286 }
1287 if (sa_info->mohawk)
1288 PutByte(sa_info->reg_nr++, addr[5 - i]);
1289 else
1290 PutByte(sa_info->reg_nr++, addr[i]);
1291 }
1292}
1293
1da177e4
LT
1294/****************
1295 * Set all addresses: This first one is the individual address,
1296 * the next 9 addresses are taken from the multicast list and
1297 * the rest is filled with the individual address.
1298 */
91fea585 1299static void set_addresses(struct net_device *dev)
1da177e4 1300{
91fea585 1301 unsigned int ioaddr = dev->base_addr;
f8653464 1302 struct local_info *lp = netdev_priv(dev);
22bedad3 1303 struct netdev_hw_addr *ha;
91fea585
JP
1304 struct set_address_info sa_info;
1305 int i;
1da177e4 1306
91fea585
JP
1307 /*
1308 * Setup the info structure so that by first set_address call it will do
1309 * SelectPage with the right page number. Hence these ones here.
1310 */
1311 sa_info.reg_nr = 15 + 1;
1312 sa_info.page_nr = 0x50 - 1;
1313 sa_info.mohawk = lp->mohawk;
1314 sa_info.ioaddr = ioaddr;
1315
1316 set_address(&sa_info, dev->dev_addr);
1317 i = 0;
22bedad3 1318 netdev_for_each_mc_addr(ha, dev) {
91fea585
JP
1319 if (i++ == 9)
1320 break;
22bedad3 1321 set_address(&sa_info, ha->addr);
91fea585
JP
1322 }
1323 while (i++ < 9)
1324 set_address(&sa_info, dev->dev_addr);
1325 SelectPage(0);
1da177e4
LT
1326}
1327
1328/****************
1329 * Set or clear the multicast filter for this adaptor.
1330 * We can filter up to 9 addresses, if more are requested we set
1331 * multicast promiscuous mode.
1332 */
1333
1334static void
1335set_multicast_list(struct net_device *dev)
1336{
906da809 1337 unsigned int ioaddr = dev->base_addr;
43fc63dc 1338 unsigned value;
1da177e4
LT
1339
1340 SelectPage(0x42);
43fc63dc
K
1341 value = GetByte(XIRCREG42_SWC1) & 0xC0;
1342
1da177e4 1343 if (dev->flags & IFF_PROMISC) { /* snoop */
43fc63dc 1344 PutByte(XIRCREG42_SWC1, value | 0x06); /* set MPE and PME */
4cd24eaf 1345 } else if (netdev_mc_count(dev) > 9 || (dev->flags & IFF_ALLMULTI)) {
43fc63dc 1346 PutByte(XIRCREG42_SWC1, value | 0x02); /* set MPE */
4cd24eaf 1347 } else if (!netdev_mc_empty(dev)) {
1da177e4 1348 /* the chip can filter 9 addresses perfectly */
43fc63dc 1349 PutByte(XIRCREG42_SWC1, value | 0x01);
1da177e4
LT
1350 SelectPage(0x40);
1351 PutByte(XIRCREG40_CMD0, Offline);
1352 set_addresses(dev);
1353 SelectPage(0x40);
1354 PutByte(XIRCREG40_CMD0, EnableRecv | Online);
1355 } else { /* standard usage */
43fc63dc 1356 PutByte(XIRCREG42_SWC1, value | 0x00);
1da177e4
LT
1357 }
1358 SelectPage(0);
1359}
1360
1361static int
1362do_config(struct net_device *dev, struct ifmap *map)
1363{
f8653464 1364 struct local_info *local = netdev_priv(dev);
1da177e4 1365
dd0fab5b 1366 pr_debug("do_config(%p)\n", dev);
1da177e4
LT
1367 if (map->port != 255 && map->port != dev->if_port) {
1368 if (map->port > 4)
1369 return -EINVAL;
1370 if (!map->port) {
1371 local->probe_port = 1;
1372 dev->if_port = 1;
1373 } else {
1374 local->probe_port = 0;
1375 dev->if_port = map->port;
1376 }
636b8116 1377 netdev_info(dev, "switching to %s port\n", if_names[dev->if_port]);
1da177e4
LT
1378 do_reset(dev,1); /* not the fine way :-) */
1379 }
1380 return 0;
1381}
1382
1383/****************
1384 * Open the driver
1385 */
1386static int
1387do_open(struct net_device *dev)
1388{
f8653464 1389 struct local_info *lp = netdev_priv(dev);
fba395ee 1390 struct pcmcia_device *link = lp->p_dev;
1da177e4 1391
dd0fab5b 1392 dev_dbg(&link->dev, "do_open(%p)\n", dev);
1da177e4
LT
1393
1394 /* Check that the PCMCIA card is still here. */
1395 /* Physical device present signature. */
9940ec36 1396 if (!pcmcia_dev_present(link))
1da177e4
LT
1397 return -ENODEV;
1398
1399 /* okay */
1400 link->open++;
1401
1402 netif_start_queue(dev);
1403 do_reset(dev,1);
1404
1405 return 0;
1406}
1407
1408static void netdev_get_drvinfo(struct net_device *dev,
1409 struct ethtool_drvinfo *info)
1410{
68aad78c 1411 strlcpy(info->driver, "xirc2ps_cs", sizeof(info->driver));
7826d43f
JP
1412 snprintf(info->bus_info, sizeof(info->bus_info), "PCMCIA 0x%lx",
1413 dev->base_addr);
1da177e4
LT
1414}
1415
7282d491 1416static const struct ethtool_ops netdev_ethtool_ops = {
1da177e4
LT
1417 .get_drvinfo = netdev_get_drvinfo,
1418};
1419
1420static int
1421do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1422{
f8653464 1423 struct local_info *local = netdev_priv(dev);
906da809 1424 unsigned int ioaddr = dev->base_addr;
0fa0ee05 1425 struct mii_ioctl_data *data = if_mii(rq);
1da177e4 1426
dd0fab5b 1427 pr_debug("%s: ioctl(%-.6s, %#04x) %04x %04x %04x %04x\n",
1da177e4 1428 dev->name, rq->ifr_ifrn.ifrn_name, cmd,
0fa0ee05 1429 data->phy_id, data->reg_num, data->val_in, data->val_out);
1da177e4
LT
1430
1431 if (!local->mohawk)
1432 return -EOPNOTSUPP;
1433
1434 switch(cmd) {
1435 case SIOCGMIIPHY: /* Get the address of the PHY in use. */
0fa0ee05 1436 data->phy_id = 0; /* we have only this address */
93b1fae4 1437 /* fall through */
1da177e4 1438 case SIOCGMIIREG: /* Read the specified MII register. */
0fa0ee05
BH
1439 data->val_out = mii_rd(ioaddr, data->phy_id & 0x1f,
1440 data->reg_num & 0x1f);
1da177e4
LT
1441 break;
1442 case SIOCSMIIREG: /* Write the specified MII register */
0fa0ee05
BH
1443 mii_wr(ioaddr, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in,
1444 16);
1da177e4
LT
1445 break;
1446 default:
1447 return -EOPNOTSUPP;
1448 }
1449 return 0;
1450}
1451
1452static void
1453hardreset(struct net_device *dev)
1454{
f8653464 1455 struct local_info *local = netdev_priv(dev);
906da809 1456 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
1457
1458 SelectPage(4);
1459 udelay(1);
1460 PutByte(XIRCREG4_GPR1, 0); /* clear bit 0: power down */
1461 msleep(40); /* wait 40 msec */
1462 if (local->mohawk)
1463 PutByte(XIRCREG4_GPR1, 1); /* set bit 0: power up */
1464 else
1465 PutByte(XIRCREG4_GPR1, 1 | 4); /* set bit 0: power up, bit 2: AIC */
1466 msleep(20); /* wait 20 msec */
1467}
1468
1469static void
1470do_reset(struct net_device *dev, int full)
1471{
f8653464 1472 struct local_info *local = netdev_priv(dev);
906da809 1473 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
1474 unsigned value;
1475
dd0fab5b 1476 pr_debug("%s: do_reset(%p,%d)\n", dev? dev->name:"eth?", dev, full);
1da177e4
LT
1477
1478 hardreset(dev);
1479 PutByte(XIRCREG_CR, SoftReset); /* set */
1480 msleep(20); /* wait 20 msec */
1481 PutByte(XIRCREG_CR, 0); /* clear */
1482 msleep(40); /* wait 40 msec */
1483 if (local->mohawk) {
1484 SelectPage(4);
1485 /* set pin GP1 and GP2 to output (0x0c)
1486 * set GP1 to low to power up the ML6692 (0x00)
1487 * set GP2 to high to power up the 10Mhz chip (0x02)
1488 */
1489 PutByte(XIRCREG4_GPR0, 0x0e);
1490 }
1491
1492 /* give the circuits some time to power up */
1493 msleep(500); /* about 500ms */
1494
1495 local->last_ptr_value = 0;
1496 local->silicon = local->mohawk ? (GetByte(XIRCREG4_BOV) & 0x70) >> 4
1497 : (GetByte(XIRCREG4_BOV) & 0x30) >> 4;
1498
1499 if (local->probe_port) {
1500 if (!local->mohawk) {
1501 SelectPage(4);
1502 PutByte(XIRCREG4_GPR0, 4);
1503 local->probe_port = 0;
1504 }
1505 } else if (dev->if_port == 2) { /* enable 10Base2 */
1506 SelectPage(0x42);
1507 PutByte(XIRCREG42_SWC1, 0xC0);
1508 } else { /* enable 10BaseT */
1509 SelectPage(0x42);
1510 PutByte(XIRCREG42_SWC1, 0x80);
1511 }
1512 msleep(40); /* wait 40 msec to let it complete */
1513
dd0fab5b
DB
1514 #if 0
1515 {
1da177e4
LT
1516 SelectPage(0);
1517 value = GetByte(XIRCREG_ESR); /* read the ESR */
636b8116 1518 pr_debug("%s: ESR is: %#02x\n", dev->name, value);
1da177e4
LT
1519 }
1520 #endif
1521
1522 /* setup the ECR */
1523 SelectPage(1);
1524 PutByte(XIRCREG1_IMR0, 0xff); /* allow all ints */
1525 PutByte(XIRCREG1_IMR1, 1 ); /* and Set TxUnderrunDetect */
1526 value = GetByte(XIRCREG1_ECR);
1527 #if 0
1528 if (local->mohawk)
1529 value |= DisableLinkPulse;
1530 PutByte(XIRCREG1_ECR, value);
1531 #endif
dd0fab5b 1532 pr_debug("%s: ECR is: %#02x\n", dev->name, value);
1da177e4
LT
1533
1534 SelectPage(0x42);
1535 PutByte(XIRCREG42_SWC0, 0x20); /* disable source insertion */
1536
1537 if (local->silicon != 1) {
1538 /* set the local memory dividing line.
1539 * The comments in the sample code say that this is only
1540 * settable with the scipper version 2 which is revision 0.
1541 * Always for CE3 cards
1542 */
1543 SelectPage(2);
1544 PutWord(XIRCREG2_RBS, 0x2000);
1545 }
1546
1547 if (full)
1548 set_addresses(dev);
1549
1550 /* Hardware workaround:
1551 * The receive byte pointer after reset is off by 1 so we need
1552 * to move the offset pointer back to 0.
1553 */
1554 SelectPage(0);
1555 PutWord(XIRCREG0_DO, 0x2000); /* change offset command, off=0 */
1556
1557 /* setup MAC IMRs and clear status registers */
1558 SelectPage(0x40); /* Bit 7 ... bit 0 */
1559 PutByte(XIRCREG40_RMASK0, 0xff); /* ROK, RAB, rsv, RO, CRC, AE, PTL, MP */
1560 PutByte(XIRCREG40_TMASK0, 0xff); /* TOK, TAB, SQE, LL, TU, JAB, EXC, CRS */
1561 PutByte(XIRCREG40_TMASK1, 0xb0); /* rsv, rsv, PTD, EXT, rsv,rsv,rsv, rsv*/
1562 PutByte(XIRCREG40_RXST0, 0x00); /* ROK, RAB, REN, RO, CRC, AE, PTL, MP */
1563 PutByte(XIRCREG40_TXST0, 0x00); /* TOK, TAB, SQE, LL, TU, JAB, EXC, CRS */
1564 PutByte(XIRCREG40_TXST1, 0x00); /* TEN, rsv, PTD, EXT, retry_counter:4 */
1565
1566 if (full && local->mohawk && init_mii(dev)) {
1567 if (dev->if_port == 4 || local->dingo || local->new_mii) {
636b8116 1568 netdev_info(dev, "MII selected\n");
1da177e4
LT
1569 SelectPage(2);
1570 PutByte(XIRCREG2_MSR, GetByte(XIRCREG2_MSR) | 0x08);
1571 msleep(20);
1572 } else {
636b8116 1573 netdev_info(dev, "MII detected; using 10mbs\n");
1da177e4
LT
1574 SelectPage(0x42);
1575 if (dev->if_port == 2) /* enable 10Base2 */
1576 PutByte(XIRCREG42_SWC1, 0xC0);
1577 else /* enable 10BaseT */
1578 PutByte(XIRCREG42_SWC1, 0x80);
1579 msleep(40); /* wait 40 msec to let it complete */
1580 }
1581 if (full_duplex)
1582 PutByte(XIRCREG1_ECR, GetByte(XIRCREG1_ECR | FullDuplex));
1583 } else { /* No MII */
1584 SelectPage(0);
1585 value = GetByte(XIRCREG_ESR); /* read the ESR */
1586 dev->if_port = (value & MediaSelect) ? 1 : 2;
1587 }
1588
1589 /* configure the LEDs */
1590 SelectPage(2);
1591 if (dev->if_port == 1 || dev->if_port == 4) /* TP: Link and Activity */
1592 PutByte(XIRCREG2_LED, 0x3b);
1593 else /* Coax: Not-Collision and Activity */
1594 PutByte(XIRCREG2_LED, 0x3a);
1595
1596 if (local->dingo)
1597 PutByte(0x0b, 0x04); /* 100 Mbit LED */
1598
1599 /* enable receiver and put the mac online */
1600 if (full) {
43fc63dc 1601 set_multicast_list(dev);
1da177e4
LT
1602 SelectPage(0x40);
1603 PutByte(XIRCREG40_CMD0, EnableRecv | Online);
1604 }
1605
1606 /* setup Ethernet IMR and enable interrupts */
1607 SelectPage(1);
1608 PutByte(XIRCREG1_IMR0, 0xff);
1609 udelay(1);
1610 SelectPage(0);
1611 PutByte(XIRCREG_CR, EnableIntr);
1612 if (local->modem && !local->dingo) { /* do some magic */
1613 if (!(GetByte(0x10) & 0x01))
1614 PutByte(0x10, 0x11); /* unmask master-int bit */
1615 }
1616
1617 if (full)
636b8116
JP
1618 netdev_info(dev, "media %s, silicon revision %d\n",
1619 if_names[dev->if_port], local->silicon);
1da177e4
LT
1620 /* We should switch back to page 0 to avoid a bug in revision 0
1621 * where regs with offset below 8 can't be read after an access
1622 * to the MAC registers */
1623 SelectPage(0);
1624}
1625
1626/****************
1627 * Initialize the Media-Independent-Interface
1628 * Returns: True if we have a good MII
1629 */
1630static int
1631init_mii(struct net_device *dev)
1632{
f8653464 1633 struct local_info *local = netdev_priv(dev);
906da809 1634 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
1635 unsigned control, status, linkpartner;
1636 int i;
1637
1638 if (if_port == 4 || if_port == 1) { /* force 100BaseT or 10BaseT */
1639 dev->if_port = if_port;
1640 local->probe_port = 0;
1641 return 1;
1642 }
1643
1644 status = mii_rd(ioaddr, 0, 1);
1645 if ((status & 0xff00) != 0x7800)
1646 return 0; /* No MII */
1647
1648 local->new_mii = (mii_rd(ioaddr, 0, 2) != 0xffff);
1649
1650 if (local->probe_port)
1651 control = 0x1000; /* auto neg */
1652 else if (dev->if_port == 4)
1653 control = 0x2000; /* no auto neg, 100mbs mode */
1654 else
1655 control = 0x0000; /* no auto neg, 10mbs mode */
1656 mii_wr(ioaddr, 0, 0, control, 16);
1657 udelay(100);
1658 control = mii_rd(ioaddr, 0, 0);
1659
1660 if (control & 0x0400) {
636b8116 1661 netdev_notice(dev, "can't take PHY out of isolation mode\n");
1da177e4
LT
1662 local->probe_port = 0;
1663 return 0;
1664 }
1665
1666 if (local->probe_port) {
1667 /* according to the DP83840A specs the auto negotiation process
1668 * may take up to 3.5 sec, so we use this also for our ML6692
1669 * Fixme: Better to use a timer here!
1670 */
1671 for (i=0; i < 35; i++) {
1672 msleep(100); /* wait 100 msec */
1673 status = mii_rd(ioaddr, 0, 1);
1674 if ((status & 0x0020) && (status & 0x0004))
1675 break;
1676 }
1677
1678 if (!(status & 0x0020)) {
636b8116 1679 netdev_info(dev, "autonegotiation failed; using 10mbs\n");
1da177e4
LT
1680 if (!local->new_mii) {
1681 control = 0x0000;
1682 mii_wr(ioaddr, 0, 0, control, 16);
1683 udelay(100);
1684 SelectPage(0);
1685 dev->if_port = (GetByte(XIRCREG_ESR) & MediaSelect) ? 1 : 2;
1686 }
1687 } else {
1688 linkpartner = mii_rd(ioaddr, 0, 5);
636b8116 1689 netdev_info(dev, "MII link partner: %04x\n", linkpartner);
1da177e4
LT
1690 if (linkpartner & 0x0080) {
1691 dev->if_port = 4;
1692 } else
1693 dev->if_port = 1;
1694 }
1695 }
1696
1697 return 1;
1698}
1699
1700static void
1701do_powerdown(struct net_device *dev)
1702{
1703
906da809 1704 unsigned int ioaddr = dev->base_addr;
1da177e4 1705
dd0fab5b 1706 pr_debug("do_powerdown(%p)\n", dev);
1da177e4
LT
1707
1708 SelectPage(4);
1709 PutByte(XIRCREG4_GPR1, 0); /* clear bit 0: power down */
1710 SelectPage(0);
1711}
1712
1713static int
1714do_stop(struct net_device *dev)
1715{
906da809 1716 unsigned int ioaddr = dev->base_addr;
f8653464 1717 struct local_info *lp = netdev_priv(dev);
fba395ee 1718 struct pcmcia_device *link = lp->p_dev;
1da177e4 1719
dd0fab5b 1720 dev_dbg(&link->dev, "do_stop(%p)\n", dev);
1da177e4
LT
1721
1722 if (!link)
1723 return -ENODEV;
1724
1725 netif_stop_queue(dev);
1726
1727 SelectPage(0);
1728 PutByte(XIRCREG_CR, 0); /* disable interrupts */
1729 SelectPage(0x01);
1730 PutByte(XIRCREG1_IMR0, 0x00); /* forbid all ints */
1731 SelectPage(4);
1732 PutByte(XIRCREG4_GPR1, 0); /* clear bit 0: power down */
1733 SelectPage(0);
1734
1735 link->open--;
1736 return 0;
1737}
1738
25f8f54f 1739static const struct pcmcia_device_id xirc2ps_ids[] = {
ff07bb19
DB
1740 PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0089, 0x110a),
1741 PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0138, 0x110a),
1742 PCMCIA_PFC_DEVICE_PROD_ID13(0, "Xircom", "CEM28", 0x2e3ee845, 0x0ea978ea),
1743 PCMCIA_PFC_DEVICE_PROD_ID13(0, "Xircom", "CEM33", 0x2e3ee845, 0x80609023),
1744 PCMCIA_PFC_DEVICE_PROD_ID13(0, "Xircom", "CEM56", 0x2e3ee845, 0xa650c32a),
1745 PCMCIA_PFC_DEVICE_PROD_ID13(0, "Xircom", "REM10", 0x2e3ee845, 0x76df1d29),
1746 PCMCIA_PFC_DEVICE_PROD_ID13(0, "Xircom", "XEM5600", 0x2e3ee845, 0xf1403719),
d277ad0e 1747 PCMCIA_PFC_DEVICE_PROD_ID12(0, "Xircom", "CreditCard Ethernet+Modem II", 0x2e3ee845, 0xeca401bf),
ff07bb19
DB
1748 PCMCIA_DEVICE_MANF_CARD(0x01bf, 0x010a),
1749 PCMCIA_DEVICE_PROD_ID13("Toshiba Information Systems", "TPCENET", 0x1b3b94fe, 0xf381c1a2),
1750 PCMCIA_DEVICE_PROD_ID13("Xircom", "CE3-10/100", 0x2e3ee845, 0x0ec0ac37),
1751 PCMCIA_DEVICE_PROD_ID13("Xircom", "PS-CE2-10", 0x2e3ee845, 0x947d9073),
1752 PCMCIA_DEVICE_PROD_ID13("Xircom", "R2E-100BTX", 0x2e3ee845, 0x2464a6e3),
1753 PCMCIA_DEVICE_PROD_ID13("Xircom", "RE-10", 0x2e3ee845, 0x3e08d609),
1754 PCMCIA_DEVICE_PROD_ID13("Xircom", "XE2000", 0x2e3ee845, 0xf7188e46),
1755 PCMCIA_DEVICE_PROD_ID12("Compaq", "Ethernet LAN Card", 0x54f7c49c, 0x9fd2f0a2),
1756 PCMCIA_DEVICE_PROD_ID12("Compaq", "Netelligent 10/100 PC Card", 0x54f7c49c, 0xefe96769),
1757 PCMCIA_DEVICE_PROD_ID12("Intel", "EtherExpress(TM) PRO/100 PC Card Mobile Adapter16", 0x816cc815, 0x174397db),
1758 PCMCIA_DEVICE_PROD_ID12("Toshiba", "10/100 Ethernet PC Card", 0x44a09d9c, 0xb44deecf),
1759 /* also matches CFE-10 cards! */
1760 /* PCMCIA_DEVICE_MANF_CARD(0x0105, 0x010a), */
1761 PCMCIA_DEVICE_NULL,
1762};
1763MODULE_DEVICE_TABLE(pcmcia, xirc2ps_ids);
1764
1765
1da177e4
LT
1766static struct pcmcia_driver xirc2ps_cs_driver = {
1767 .owner = THIS_MODULE,
2e9b981a 1768 .name = "xirc2ps_cs",
15b99ac1 1769 .probe = xirc2ps_probe,
cc3b4866 1770 .remove = xirc2ps_detach,
ff07bb19 1771 .id_table = xirc2ps_ids,
98e4c28b
DB
1772 .suspend = xirc2ps_suspend,
1773 .resume = xirc2ps_resume,
1da177e4 1774};
fdd3f29e 1775module_pcmcia_driver(xirc2ps_cs_driver);
1da177e4
LT
1776
1777#ifndef MODULE
1778static int __init setup_xirc2ps_cs(char *str)
1779{
1780 /* if_port, full_duplex, do_sound, lockup_hack
1781 */
1782 int ints[10] = { -1 };
1783
1784 str = get_options(str, 9, ints);
1785
1786#define MAYBE_SET(X,Y) if (ints[0] >= Y && ints[Y] != -1) { X = ints[Y]; }
1787 MAYBE_SET(if_port, 3);
1788 MAYBE_SET(full_duplex, 4);
1789 MAYBE_SET(do_sound, 5);
1790 MAYBE_SET(lockup_hack, 6);
1791#undef MAYBE_SET
1792
9b41046c 1793 return 1;
1da177e4
LT
1794}
1795
1796__setup("xirc2ps_cs=", setup_xirc2ps_cs);
1797#endif