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6f8d3f33 | 1 | /* |
90cff9e2 | 2 | * Keystone GBE and XGBE subsystem code |
6f8d3f33 WK |
3 | * |
4 | * Copyright (C) 2014 Texas Instruments Incorporated | |
5 | * Authors: Sandeep Nair <sandeep_n@ti.com> | |
6 | * Sandeep Paulraj <s-paulraj@ti.com> | |
7 | * Cyril Chemparathy <cyril@ti.com> | |
8 | * Santosh Shilimkar <santosh.shilimkar@ti.com> | |
9 | * Wingman Kwok <w-kwok2@ti.com> | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or | |
12 | * modify it under the terms of the GNU General Public License as | |
13 | * published by the Free Software Foundation version 2. | |
14 | * | |
15 | * This program is distributed "as is" WITHOUT ANY WARRANTY of any | |
16 | * kind, whether express or implied; without even the implied warranty | |
17 | * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | * GNU General Public License for more details. | |
19 | */ | |
20 | ||
21 | #include <linux/io.h> | |
58c11b5f | 22 | #include <linux/module.h> |
6f8d3f33 WK |
23 | #include <linux/of_mdio.h> |
24 | #include <linux/of_address.h> | |
25 | #include <linux/if_vlan.h> | |
6246168b WK |
26 | #include <linux/ptp_classify.h> |
27 | #include <linux/net_tstamp.h> | |
6f8d3f33 WK |
28 | #include <linux/ethtool.h> |
29 | ||
30 | #include "cpsw_ale.h" | |
31 | #include "netcp.h" | |
6246168b | 32 | #include "cpts.h" |
6f8d3f33 WK |
33 | |
34 | #define NETCP_DRIVER_NAME "TI KeyStone Ethernet Driver" | |
35 | #define NETCP_DRIVER_VERSION "v1.0" | |
36 | ||
37 | #define GBE_IDENT(reg) ((reg >> 16) & 0xffff) | |
38 | #define GBE_MAJOR_VERSION(reg) (reg >> 8 & 0x7) | |
39 | #define GBE_MINOR_VERSION(reg) (reg & 0xff) | |
40 | #define GBE_RTL_VERSION(reg) ((reg >> 11) & 0x1f) | |
41 | ||
42 | /* 1G Ethernet SS defines */ | |
43 | #define GBE_MODULE_NAME "netcp-gbe" | |
44 | #define GBE_SS_VERSION_14 0x4ed21104 | |
45 | ||
21e0e0dd KM |
46 | #define GBE_SS_REG_INDEX 0 |
47 | #define GBE_SGMII34_REG_INDEX 1 | |
48 | #define GBE_SM_REG_INDEX 2 | |
49 | /* offset relative to base of GBE_SS_REG_INDEX */ | |
6f8d3f33 | 50 | #define GBE13_SGMII_MODULE_OFFSET 0x100 |
21e0e0dd KM |
51 | /* offset relative to base of GBE_SM_REG_INDEX */ |
52 | #define GBE13_HOST_PORT_OFFSET 0x34 | |
53 | #define GBE13_SLAVE_PORT_OFFSET 0x60 | |
54 | #define GBE13_EMAC_OFFSET 0x100 | |
55 | #define GBE13_SLAVE_PORT2_OFFSET 0x200 | |
56 | #define GBE13_HW_STATS_OFFSET 0x300 | |
6246168b | 57 | #define GBE13_CPTS_OFFSET 0x500 |
21e0e0dd | 58 | #define GBE13_ALE_OFFSET 0x600 |
6f8d3f33 | 59 | #define GBE13_HOST_PORT_NUM 0 |
6f8d3f33 WK |
60 | #define GBE13_NUM_ALE_ENTRIES 1024 |
61 | ||
9a391c7b WK |
62 | /* 1G Ethernet NU SS defines */ |
63 | #define GBENU_MODULE_NAME "netcp-gbenu" | |
64 | #define GBE_SS_ID_NU 0x4ee6 | |
65 | #define GBE_SS_ID_2U 0x4ee8 | |
66 | ||
67 | #define IS_SS_ID_MU(d) \ | |
68 | ((GBE_IDENT((d)->ss_version) == GBE_SS_ID_NU) || \ | |
69 | (GBE_IDENT((d)->ss_version) == GBE_SS_ID_2U)) | |
70 | ||
71 | #define IS_SS_ID_NU(d) \ | |
72 | (GBE_IDENT((d)->ss_version) == GBE_SS_ID_NU) | |
73 | ||
74 | #define GBENU_SS_REG_INDEX 0 | |
75 | #define GBENU_SM_REG_INDEX 1 | |
76 | #define GBENU_SGMII_MODULE_OFFSET 0x100 | |
77 | #define GBENU_HOST_PORT_OFFSET 0x1000 | |
78 | #define GBENU_SLAVE_PORT_OFFSET 0x2000 | |
79 | #define GBENU_EMAC_OFFSET 0x2330 | |
80 | #define GBENU_HW_STATS_OFFSET 0x1a000 | |
6246168b | 81 | #define GBENU_CPTS_OFFSET 0x1d000 |
9a391c7b WK |
82 | #define GBENU_ALE_OFFSET 0x1e000 |
83 | #define GBENU_HOST_PORT_NUM 0 | |
84 | #define GBENU_NUM_ALE_ENTRIES 1024 | |
8c85151d | 85 | #define GBENU_SGMII_MODULE_SIZE 0x100 |
9a391c7b | 86 | |
90cff9e2 WK |
87 | /* 10G Ethernet SS defines */ |
88 | #define XGBE_MODULE_NAME "netcp-xgbe" | |
89 | #define XGBE_SS_VERSION_10 0x4ee42100 | |
90 | ||
21e0e0dd KM |
91 | #define XGBE_SS_REG_INDEX 0 |
92 | #define XGBE_SM_REG_INDEX 1 | |
93 | #define XGBE_SERDES_REG_INDEX 2 | |
94 | ||
95 | /* offset relative to base of XGBE_SS_REG_INDEX */ | |
90cff9e2 | 96 | #define XGBE10_SGMII_MODULE_OFFSET 0x100 |
4c0ef231 | 97 | #define IS_SS_ID_XGBE(d) ((d)->ss_version == XGBE_SS_VERSION_10) |
21e0e0dd KM |
98 | /* offset relative to base of XGBE_SM_REG_INDEX */ |
99 | #define XGBE10_HOST_PORT_OFFSET 0x34 | |
100 | #define XGBE10_SLAVE_PORT_OFFSET 0x64 | |
101 | #define XGBE10_EMAC_OFFSET 0x400 | |
6246168b | 102 | #define XGBE10_CPTS_OFFSET 0x600 |
21e0e0dd KM |
103 | #define XGBE10_ALE_OFFSET 0x700 |
104 | #define XGBE10_HW_STATS_OFFSET 0x800 | |
90cff9e2 | 105 | #define XGBE10_HOST_PORT_NUM 0 |
90cff9e2 WK |
106 | #define XGBE10_NUM_ALE_ENTRIES 1024 |
107 | ||
6f8d3f33 WK |
108 | #define GBE_TIMER_INTERVAL (HZ / 2) |
109 | ||
110 | /* Soft reset register values */ | |
111 | #define SOFT_RESET_MASK BIT(0) | |
112 | #define SOFT_RESET BIT(0) | |
113 | #define DEVICE_EMACSL_RESET_POLL_COUNT 100 | |
114 | #define GMACSL_RET_WARN_RESET_INCOMPLETE -2 | |
115 | ||
116 | #define MACSL_RX_ENABLE_CSF BIT(23) | |
117 | #define MACSL_ENABLE_EXT_CTL BIT(18) | |
90cff9e2 WK |
118 | #define MACSL_XGMII_ENABLE BIT(13) |
119 | #define MACSL_XGIG_MODE BIT(8) | |
6f8d3f33 WK |
120 | #define MACSL_GIG_MODE BIT(7) |
121 | #define MACSL_GMII_ENABLE BIT(5) | |
122 | #define MACSL_FULLDUPLEX BIT(0) | |
123 | ||
124 | #define GBE_CTL_P0_ENABLE BIT(2) | |
9a391c7b | 125 | #define GBE13_REG_VAL_STAT_ENABLE_ALL 0xff |
90cff9e2 | 126 | #define XGBE_REG_VAL_STAT_ENABLE_ALL 0xf |
6f8d3f33 WK |
127 | #define GBE_STATS_CD_SEL BIT(28) |
128 | ||
129 | #define GBE_PORT_MASK(x) (BIT(x) - 1) | |
130 | #define GBE_MASK_NO_PORTS 0 | |
131 | ||
132 | #define GBE_DEF_1G_MAC_CONTROL \ | |
133 | (MACSL_GIG_MODE | MACSL_GMII_ENABLE | \ | |
134 | MACSL_ENABLE_EXT_CTL | MACSL_RX_ENABLE_CSF) | |
135 | ||
90cff9e2 WK |
136 | #define GBE_DEF_10G_MAC_CONTROL \ |
137 | (MACSL_XGIG_MODE | MACSL_XGMII_ENABLE | \ | |
138 | MACSL_ENABLE_EXT_CTL | MACSL_RX_ENABLE_CSF) | |
139 | ||
6f8d3f33 WK |
140 | #define GBE_STATSA_MODULE 0 |
141 | #define GBE_STATSB_MODULE 1 | |
142 | #define GBE_STATSC_MODULE 2 | |
143 | #define GBE_STATSD_MODULE 3 | |
144 | ||
9a391c7b WK |
145 | #define GBENU_STATS0_MODULE 0 |
146 | #define GBENU_STATS1_MODULE 1 | |
147 | #define GBENU_STATS2_MODULE 2 | |
148 | #define GBENU_STATS3_MODULE 3 | |
149 | #define GBENU_STATS4_MODULE 4 | |
150 | #define GBENU_STATS5_MODULE 5 | |
151 | #define GBENU_STATS6_MODULE 6 | |
152 | #define GBENU_STATS7_MODULE 7 | |
153 | #define GBENU_STATS8_MODULE 8 | |
154 | ||
90cff9e2 WK |
155 | #define XGBE_STATS0_MODULE 0 |
156 | #define XGBE_STATS1_MODULE 1 | |
157 | #define XGBE_STATS2_MODULE 2 | |
158 | ||
6f8d3f33 | 159 | /* s: 0-based slave_port */ |
8c85151d WK |
160 | #define SGMII_BASE(d, s) \ |
161 | (((s) < 2) ? (d)->sgmii_port_regs : (d)->sgmii_port34_regs) | |
6f8d3f33 WK |
162 | |
163 | #define GBE_TX_QUEUE 648 | |
164 | #define GBE_TXHOOK_ORDER 0 | |
6246168b | 165 | #define GBE_RXHOOK_ORDER 0 |
6f8d3f33 | 166 | #define GBE_DEFAULT_ALE_AGEOUT 30 |
90cff9e2 | 167 | #define SLAVE_LINK_IS_XGMII(s) ((s)->link_interface >= XGMII_LINK_MAC_PHY) |
6f8d3f33 WK |
168 | #define NETCP_LINK_STATE_INVALID -1 |
169 | ||
170 | #define GBE_SET_REG_OFS(p, rb, rn) p->rb##_ofs.rn = \ | |
171 | offsetof(struct gbe##_##rb, rn) | |
9a391c7b WK |
172 | #define GBENU_SET_REG_OFS(p, rb, rn) p->rb##_ofs.rn = \ |
173 | offsetof(struct gbenu##_##rb, rn) | |
90cff9e2 WK |
174 | #define XGBE_SET_REG_OFS(p, rb, rn) p->rb##_ofs.rn = \ |
175 | offsetof(struct xgbe##_##rb, rn) | |
6f8d3f33 WK |
176 | #define GBE_REG_ADDR(p, rb, rn) (p->rb + p->rb##_ofs.rn) |
177 | ||
9a391c7b WK |
178 | #define HOST_TX_PRI_MAP_DEFAULT 0x00000000 |
179 | ||
6246168b WK |
180 | #if IS_ENABLED(CONFIG_TI_CPTS) |
181 | /* Px_TS_CTL register fields */ | |
182 | #define TS_RX_ANX_F_EN BIT(0) | |
183 | #define TS_RX_VLAN_LT1_EN BIT(1) | |
184 | #define TS_RX_VLAN_LT2_EN BIT(2) | |
185 | #define TS_RX_ANX_D_EN BIT(3) | |
186 | #define TS_TX_ANX_F_EN BIT(4) | |
187 | #define TS_TX_VLAN_LT1_EN BIT(5) | |
188 | #define TS_TX_VLAN_LT2_EN BIT(6) | |
189 | #define TS_TX_ANX_D_EN BIT(7) | |
190 | #define TS_LT2_EN BIT(8) | |
191 | #define TS_RX_ANX_E_EN BIT(9) | |
192 | #define TS_TX_ANX_E_EN BIT(10) | |
193 | #define TS_MSG_TYPE_EN_SHIFT 16 | |
194 | #define TS_MSG_TYPE_EN_MASK 0xffff | |
195 | ||
196 | /* Px_TS_SEQ_LTYPE register fields */ | |
197 | #define TS_SEQ_ID_OFS_SHIFT 16 | |
198 | #define TS_SEQ_ID_OFS_MASK 0x3f | |
199 | ||
200 | /* Px_TS_CTL_LTYPE2 register fields */ | |
201 | #define TS_107 BIT(16) | |
202 | #define TS_129 BIT(17) | |
203 | #define TS_130 BIT(18) | |
204 | #define TS_131 BIT(19) | |
205 | #define TS_132 BIT(20) | |
206 | #define TS_319 BIT(21) | |
207 | #define TS_320 BIT(22) | |
208 | #define TS_TTL_NONZERO BIT(23) | |
209 | #define TS_UNI_EN BIT(24) | |
210 | #define TS_UNI_EN_SHIFT 24 | |
211 | ||
212 | #define TS_TX_ANX_ALL_EN \ | |
213 | (TS_TX_ANX_D_EN | TS_TX_ANX_E_EN | TS_TX_ANX_F_EN) | |
214 | ||
215 | #define TS_RX_ANX_ALL_EN \ | |
216 | (TS_RX_ANX_D_EN | TS_RX_ANX_E_EN | TS_RX_ANX_F_EN) | |
217 | ||
218 | #define TS_CTL_DST_PORT TS_319 | |
219 | #define TS_CTL_DST_PORT_SHIFT 21 | |
220 | ||
221 | #define TS_CTL_MADDR_ALL \ | |
222 | (TS_107 | TS_129 | TS_130 | TS_131 | TS_132) | |
223 | ||
224 | #define TS_CTL_MADDR_SHIFT 16 | |
225 | ||
226 | /* The PTP event messages - Sync, Delay_Req, Pdelay_Req, and Pdelay_Resp. */ | |
227 | #define EVENT_MSG_BITS (BIT(0) | BIT(1) | BIT(2) | BIT(3)) | |
228 | #endif /* CONFIG_TI_CPTS */ | |
229 | ||
90cff9e2 WK |
230 | struct xgbe_ss_regs { |
231 | u32 id_ver; | |
232 | u32 synce_count; | |
233 | u32 synce_mux; | |
234 | u32 control; | |
235 | }; | |
236 | ||
237 | struct xgbe_switch_regs { | |
238 | u32 id_ver; | |
239 | u32 control; | |
240 | u32 emcontrol; | |
241 | u32 stat_port_en; | |
242 | u32 ptype; | |
243 | u32 soft_idle; | |
244 | u32 thru_rate; | |
245 | u32 gap_thresh; | |
246 | u32 tx_start_wds; | |
247 | u32 flow_control; | |
248 | u32 cppi_thresh; | |
249 | }; | |
250 | ||
251 | struct xgbe_port_regs { | |
252 | u32 blk_cnt; | |
253 | u32 port_vlan; | |
254 | u32 tx_pri_map; | |
255 | u32 sa_lo; | |
256 | u32 sa_hi; | |
257 | u32 ts_ctl; | |
258 | u32 ts_seq_ltype; | |
259 | u32 ts_vlan; | |
260 | u32 ts_ctl_ltype2; | |
261 | u32 ts_ctl2; | |
262 | u32 control; | |
263 | }; | |
264 | ||
265 | struct xgbe_host_port_regs { | |
266 | u32 blk_cnt; | |
267 | u32 port_vlan; | |
268 | u32 tx_pri_map; | |
269 | u32 src_id; | |
270 | u32 rx_pri_map; | |
271 | u32 rx_maxlen; | |
272 | }; | |
273 | ||
274 | struct xgbe_emac_regs { | |
275 | u32 id_ver; | |
276 | u32 mac_control; | |
277 | u32 mac_status; | |
278 | u32 soft_reset; | |
279 | u32 rx_maxlen; | |
280 | u32 __reserved_0; | |
281 | u32 rx_pause; | |
282 | u32 tx_pause; | |
283 | u32 em_control; | |
284 | u32 __reserved_1; | |
285 | u32 tx_gap; | |
286 | u32 rsvd[4]; | |
287 | }; | |
288 | ||
289 | struct xgbe_host_hw_stats { | |
290 | u32 rx_good_frames; | |
291 | u32 rx_broadcast_frames; | |
292 | u32 rx_multicast_frames; | |
293 | u32 __rsvd_0[3]; | |
294 | u32 rx_oversized_frames; | |
295 | u32 __rsvd_1; | |
296 | u32 rx_undersized_frames; | |
297 | u32 __rsvd_2; | |
298 | u32 overrun_type4; | |
299 | u32 overrun_type5; | |
300 | u32 rx_bytes; | |
301 | u32 tx_good_frames; | |
302 | u32 tx_broadcast_frames; | |
303 | u32 tx_multicast_frames; | |
304 | u32 __rsvd_3[9]; | |
305 | u32 tx_bytes; | |
306 | u32 tx_64byte_frames; | |
307 | u32 tx_65_to_127byte_frames; | |
308 | u32 tx_128_to_255byte_frames; | |
309 | u32 tx_256_to_511byte_frames; | |
310 | u32 tx_512_to_1023byte_frames; | |
311 | u32 tx_1024byte_frames; | |
312 | u32 net_bytes; | |
313 | u32 rx_sof_overruns; | |
314 | u32 rx_mof_overruns; | |
315 | u32 rx_dma_overruns; | |
316 | }; | |
317 | ||
318 | struct xgbe_hw_stats { | |
319 | u32 rx_good_frames; | |
320 | u32 rx_broadcast_frames; | |
321 | u32 rx_multicast_frames; | |
322 | u32 rx_pause_frames; | |
323 | u32 rx_crc_errors; | |
324 | u32 rx_align_code_errors; | |
325 | u32 rx_oversized_frames; | |
326 | u32 rx_jabber_frames; | |
327 | u32 rx_undersized_frames; | |
328 | u32 rx_fragments; | |
329 | u32 overrun_type4; | |
330 | u32 overrun_type5; | |
331 | u32 rx_bytes; | |
332 | u32 tx_good_frames; | |
333 | u32 tx_broadcast_frames; | |
334 | u32 tx_multicast_frames; | |
335 | u32 tx_pause_frames; | |
336 | u32 tx_deferred_frames; | |
337 | u32 tx_collision_frames; | |
338 | u32 tx_single_coll_frames; | |
339 | u32 tx_mult_coll_frames; | |
340 | u32 tx_excessive_collisions; | |
341 | u32 tx_late_collisions; | |
342 | u32 tx_underrun; | |
343 | u32 tx_carrier_sense_errors; | |
344 | u32 tx_bytes; | |
345 | u32 tx_64byte_frames; | |
346 | u32 tx_65_to_127byte_frames; | |
347 | u32 tx_128_to_255byte_frames; | |
348 | u32 tx_256_to_511byte_frames; | |
349 | u32 tx_512_to_1023byte_frames; | |
350 | u32 tx_1024byte_frames; | |
351 | u32 net_bytes; | |
352 | u32 rx_sof_overruns; | |
353 | u32 rx_mof_overruns; | |
354 | u32 rx_dma_overruns; | |
355 | }; | |
356 | ||
9a391c7b WK |
357 | struct gbenu_ss_regs { |
358 | u32 id_ver; | |
359 | u32 synce_count; /* NU */ | |
360 | u32 synce_mux; /* NU */ | |
361 | u32 control; /* 2U */ | |
362 | u32 __rsvd_0[2]; /* 2U */ | |
363 | u32 rgmii_status; /* 2U */ | |
364 | u32 ss_status; /* 2U */ | |
365 | }; | |
366 | ||
367 | struct gbenu_switch_regs { | |
368 | u32 id_ver; | |
369 | u32 control; | |
370 | u32 __rsvd_0[2]; | |
371 | u32 emcontrol; | |
372 | u32 stat_port_en; | |
373 | u32 ptype; /* NU */ | |
374 | u32 soft_idle; | |
375 | u32 thru_rate; /* NU */ | |
376 | u32 gap_thresh; /* NU */ | |
377 | u32 tx_start_wds; /* NU */ | |
378 | u32 eee_prescale; /* 2U */ | |
379 | u32 tx_g_oflow_thresh_set; /* NU */ | |
380 | u32 tx_g_oflow_thresh_clr; /* NU */ | |
381 | u32 tx_g_buf_thresh_set_l; /* NU */ | |
382 | u32 tx_g_buf_thresh_set_h; /* NU */ | |
383 | u32 tx_g_buf_thresh_clr_l; /* NU */ | |
384 | u32 tx_g_buf_thresh_clr_h; /* NU */ | |
385 | }; | |
386 | ||
387 | struct gbenu_port_regs { | |
388 | u32 __rsvd_0; | |
389 | u32 control; | |
390 | u32 max_blks; /* 2U */ | |
391 | u32 mem_align1; | |
392 | u32 blk_cnt; | |
393 | u32 port_vlan; | |
394 | u32 tx_pri_map; /* NU */ | |
395 | u32 pri_ctl; /* 2U */ | |
396 | u32 rx_pri_map; | |
397 | u32 rx_maxlen; | |
398 | u32 tx_blks_pri; /* NU */ | |
399 | u32 __rsvd_1; | |
400 | u32 idle2lpi; /* 2U */ | |
401 | u32 lpi2idle; /* 2U */ | |
402 | u32 eee_status; /* 2U */ | |
403 | u32 __rsvd_2; | |
404 | u32 __rsvd_3[176]; /* NU: more to add */ | |
405 | u32 __rsvd_4[2]; | |
406 | u32 sa_lo; | |
407 | u32 sa_hi; | |
408 | u32 ts_ctl; | |
409 | u32 ts_seq_ltype; | |
410 | u32 ts_vlan; | |
411 | u32 ts_ctl_ltype2; | |
412 | u32 ts_ctl2; | |
413 | }; | |
414 | ||
415 | struct gbenu_host_port_regs { | |
416 | u32 __rsvd_0; | |
417 | u32 control; | |
418 | u32 flow_id_offset; /* 2U */ | |
419 | u32 __rsvd_1; | |
420 | u32 blk_cnt; | |
421 | u32 port_vlan; | |
422 | u32 tx_pri_map; /* NU */ | |
423 | u32 pri_ctl; | |
424 | u32 rx_pri_map; | |
425 | u32 rx_maxlen; | |
426 | u32 tx_blks_pri; /* NU */ | |
427 | u32 __rsvd_2; | |
428 | u32 idle2lpi; /* 2U */ | |
429 | u32 lpi2wake; /* 2U */ | |
430 | u32 eee_status; /* 2U */ | |
431 | u32 __rsvd_3; | |
432 | u32 __rsvd_4[184]; /* NU */ | |
433 | u32 host_blks_pri; /* NU */ | |
434 | }; | |
435 | ||
436 | struct gbenu_emac_regs { | |
437 | u32 mac_control; | |
438 | u32 mac_status; | |
439 | u32 soft_reset; | |
440 | u32 boff_test; | |
441 | u32 rx_pause; | |
442 | u32 __rsvd_0[11]; /* NU */ | |
443 | u32 tx_pause; | |
444 | u32 __rsvd_1[11]; /* NU */ | |
445 | u32 em_control; | |
446 | u32 tx_gap; | |
447 | }; | |
448 | ||
449 | /* Some hw stat regs are applicable to slave port only. | |
450 | * This is handled by gbenu_et_stats struct. Also some | |
451 | * are for SS version NU and some are for 2U. | |
452 | */ | |
453 | struct gbenu_hw_stats { | |
454 | u32 rx_good_frames; | |
455 | u32 rx_broadcast_frames; | |
456 | u32 rx_multicast_frames; | |
457 | u32 rx_pause_frames; /* slave */ | |
458 | u32 rx_crc_errors; | |
459 | u32 rx_align_code_errors; /* slave */ | |
460 | u32 rx_oversized_frames; | |
461 | u32 rx_jabber_frames; /* slave */ | |
462 | u32 rx_undersized_frames; | |
463 | u32 rx_fragments; /* slave */ | |
464 | u32 ale_drop; | |
465 | u32 ale_overrun_drop; | |
466 | u32 rx_bytes; | |
467 | u32 tx_good_frames; | |
468 | u32 tx_broadcast_frames; | |
469 | u32 tx_multicast_frames; | |
470 | u32 tx_pause_frames; /* slave */ | |
471 | u32 tx_deferred_frames; /* slave */ | |
472 | u32 tx_collision_frames; /* slave */ | |
473 | u32 tx_single_coll_frames; /* slave */ | |
474 | u32 tx_mult_coll_frames; /* slave */ | |
475 | u32 tx_excessive_collisions; /* slave */ | |
476 | u32 tx_late_collisions; /* slave */ | |
477 | u32 rx_ipg_error; /* slave 10G only */ | |
478 | u32 tx_carrier_sense_errors; /* slave */ | |
479 | u32 tx_bytes; | |
480 | u32 tx_64B_frames; | |
481 | u32 tx_65_to_127B_frames; | |
482 | u32 tx_128_to_255B_frames; | |
483 | u32 tx_256_to_511B_frames; | |
484 | u32 tx_512_to_1023B_frames; | |
485 | u32 tx_1024B_frames; | |
486 | u32 net_bytes; | |
487 | u32 rx_bottom_fifo_drop; | |
488 | u32 rx_port_mask_drop; | |
489 | u32 rx_top_fifo_drop; | |
490 | u32 ale_rate_limit_drop; | |
491 | u32 ale_vid_ingress_drop; | |
492 | u32 ale_da_eq_sa_drop; | |
493 | u32 __rsvd_0[3]; | |
494 | u32 ale_unknown_ucast; | |
495 | u32 ale_unknown_ucast_bytes; | |
496 | u32 ale_unknown_mcast; | |
497 | u32 ale_unknown_mcast_bytes; | |
498 | u32 ale_unknown_bcast; | |
499 | u32 ale_unknown_bcast_bytes; | |
500 | u32 ale_pol_match; | |
501 | u32 ale_pol_match_red; /* NU */ | |
502 | u32 ale_pol_match_yellow; /* NU */ | |
503 | u32 __rsvd_1[44]; | |
504 | u32 tx_mem_protect_err; | |
505 | /* following NU only */ | |
506 | u32 tx_pri0; | |
507 | u32 tx_pri1; | |
508 | u32 tx_pri2; | |
509 | u32 tx_pri3; | |
510 | u32 tx_pri4; | |
511 | u32 tx_pri5; | |
512 | u32 tx_pri6; | |
513 | u32 tx_pri7; | |
514 | u32 tx_pri0_bcnt; | |
515 | u32 tx_pri1_bcnt; | |
516 | u32 tx_pri2_bcnt; | |
517 | u32 tx_pri3_bcnt; | |
518 | u32 tx_pri4_bcnt; | |
519 | u32 tx_pri5_bcnt; | |
520 | u32 tx_pri6_bcnt; | |
521 | u32 tx_pri7_bcnt; | |
522 | u32 tx_pri0_drop; | |
523 | u32 tx_pri1_drop; | |
524 | u32 tx_pri2_drop; | |
525 | u32 tx_pri3_drop; | |
526 | u32 tx_pri4_drop; | |
527 | u32 tx_pri5_drop; | |
528 | u32 tx_pri6_drop; | |
529 | u32 tx_pri7_drop; | |
530 | u32 tx_pri0_drop_bcnt; | |
531 | u32 tx_pri1_drop_bcnt; | |
532 | u32 tx_pri2_drop_bcnt; | |
533 | u32 tx_pri3_drop_bcnt; | |
534 | u32 tx_pri4_drop_bcnt; | |
535 | u32 tx_pri5_drop_bcnt; | |
536 | u32 tx_pri6_drop_bcnt; | |
537 | u32 tx_pri7_drop_bcnt; | |
538 | }; | |
539 | ||
9a391c7b WK |
540 | #define GBENU_HW_STATS_REG_MAP_SZ 0x200 |
541 | ||
6f8d3f33 WK |
542 | struct gbe_ss_regs { |
543 | u32 id_ver; | |
544 | u32 synce_count; | |
545 | u32 synce_mux; | |
546 | }; | |
547 | ||
548 | struct gbe_ss_regs_ofs { | |
549 | u16 id_ver; | |
550 | u16 control; | |
551 | }; | |
552 | ||
553 | struct gbe_switch_regs { | |
554 | u32 id_ver; | |
555 | u32 control; | |
556 | u32 soft_reset; | |
557 | u32 stat_port_en; | |
558 | u32 ptype; | |
559 | u32 soft_idle; | |
560 | u32 thru_rate; | |
561 | u32 gap_thresh; | |
562 | u32 tx_start_wds; | |
563 | u32 flow_control; | |
564 | }; | |
565 | ||
566 | struct gbe_switch_regs_ofs { | |
567 | u16 id_ver; | |
568 | u16 control; | |
569 | u16 soft_reset; | |
570 | u16 emcontrol; | |
571 | u16 stat_port_en; | |
572 | u16 ptype; | |
573 | u16 flow_control; | |
574 | }; | |
575 | ||
576 | struct gbe_port_regs { | |
577 | u32 max_blks; | |
578 | u32 blk_cnt; | |
579 | u32 port_vlan; | |
580 | u32 tx_pri_map; | |
581 | u32 sa_lo; | |
582 | u32 sa_hi; | |
583 | u32 ts_ctl; | |
584 | u32 ts_seq_ltype; | |
585 | u32 ts_vlan; | |
586 | u32 ts_ctl_ltype2; | |
587 | u32 ts_ctl2; | |
588 | }; | |
589 | ||
590 | struct gbe_port_regs_ofs { | |
591 | u16 port_vlan; | |
592 | u16 tx_pri_map; | |
593 | u16 sa_lo; | |
594 | u16 sa_hi; | |
595 | u16 ts_ctl; | |
596 | u16 ts_seq_ltype; | |
597 | u16 ts_vlan; | |
598 | u16 ts_ctl_ltype2; | |
599 | u16 ts_ctl2; | |
9a391c7b | 600 | u16 rx_maxlen; /* 2U, NU */ |
6f8d3f33 WK |
601 | }; |
602 | ||
603 | struct gbe_host_port_regs { | |
604 | u32 src_id; | |
605 | u32 port_vlan; | |
606 | u32 rx_pri_map; | |
607 | u32 rx_maxlen; | |
608 | }; | |
609 | ||
610 | struct gbe_host_port_regs_ofs { | |
611 | u16 port_vlan; | |
612 | u16 tx_pri_map; | |
613 | u16 rx_maxlen; | |
614 | }; | |
615 | ||
616 | struct gbe_emac_regs { | |
617 | u32 id_ver; | |
618 | u32 mac_control; | |
619 | u32 mac_status; | |
620 | u32 soft_reset; | |
621 | u32 rx_maxlen; | |
622 | u32 __reserved_0; | |
623 | u32 rx_pause; | |
624 | u32 tx_pause; | |
625 | u32 __reserved_1; | |
626 | u32 rx_pri_map; | |
627 | u32 rsvd[6]; | |
628 | }; | |
629 | ||
630 | struct gbe_emac_regs_ofs { | |
631 | u16 mac_control; | |
632 | u16 soft_reset; | |
633 | u16 rx_maxlen; | |
634 | }; | |
635 | ||
636 | struct gbe_hw_stats { | |
637 | u32 rx_good_frames; | |
638 | u32 rx_broadcast_frames; | |
639 | u32 rx_multicast_frames; | |
640 | u32 rx_pause_frames; | |
641 | u32 rx_crc_errors; | |
642 | u32 rx_align_code_errors; | |
643 | u32 rx_oversized_frames; | |
644 | u32 rx_jabber_frames; | |
645 | u32 rx_undersized_frames; | |
646 | u32 rx_fragments; | |
647 | u32 __pad_0[2]; | |
648 | u32 rx_bytes; | |
649 | u32 tx_good_frames; | |
650 | u32 tx_broadcast_frames; | |
651 | u32 tx_multicast_frames; | |
652 | u32 tx_pause_frames; | |
653 | u32 tx_deferred_frames; | |
654 | u32 tx_collision_frames; | |
655 | u32 tx_single_coll_frames; | |
656 | u32 tx_mult_coll_frames; | |
657 | u32 tx_excessive_collisions; | |
658 | u32 tx_late_collisions; | |
659 | u32 tx_underrun; | |
660 | u32 tx_carrier_sense_errors; | |
661 | u32 tx_bytes; | |
662 | u32 tx_64byte_frames; | |
663 | u32 tx_65_to_127byte_frames; | |
664 | u32 tx_128_to_255byte_frames; | |
665 | u32 tx_256_to_511byte_frames; | |
666 | u32 tx_512_to_1023byte_frames; | |
667 | u32 tx_1024byte_frames; | |
668 | u32 net_bytes; | |
669 | u32 rx_sof_overruns; | |
670 | u32 rx_mof_overruns; | |
671 | u32 rx_dma_overruns; | |
672 | }; | |
673 | ||
9a391c7b | 674 | #define GBE_MAX_HW_STAT_MODS 9 |
6f8d3f33 WK |
675 | #define GBE_HW_STATS_REG_MAP_SZ 0x100 |
676 | ||
6246168b WK |
677 | struct ts_ctl { |
678 | int uni; | |
679 | u8 dst_port_map; | |
680 | u8 maddr_map; | |
681 | u8 ts_mcast_type; | |
682 | }; | |
683 | ||
6f8d3f33 WK |
684 | struct gbe_slave { |
685 | void __iomem *port_regs; | |
686 | void __iomem *emac_regs; | |
687 | struct gbe_port_regs_ofs port_regs_ofs; | |
688 | struct gbe_emac_regs_ofs emac_regs_ofs; | |
689 | int slave_num; /* 0 based logical number */ | |
690 | int port_num; /* actual port number */ | |
691 | atomic_t link_state; | |
692 | bool open; | |
693 | struct phy_device *phy; | |
694 | u32 link_interface; | |
695 | u32 mac_control; | |
696 | u8 phy_port_t; | |
697 | struct device_node *phy_node; | |
6246168b | 698 | struct ts_ctl ts_ctl; |
6f8d3f33 WK |
699 | struct list_head slave_list; |
700 | }; | |
701 | ||
702 | struct gbe_priv { | |
703 | struct device *dev; | |
704 | struct netcp_device *netcp_device; | |
705 | struct timer_list timer; | |
706 | u32 num_slaves; | |
707 | u32 ale_entries; | |
708 | u32 ale_ports; | |
709 | bool enable_ale; | |
9a391c7b WK |
710 | u8 max_num_slaves; |
711 | u8 max_num_ports; /* max_num_slaves + 1 */ | |
489e8a2f | 712 | u8 num_stats_mods; |
6f8d3f33 WK |
713 | struct netcp_tx_pipe tx_pipe; |
714 | ||
715 | int host_port; | |
716 | u32 rx_packet_max; | |
717 | u32 ss_version; | |
9a391c7b | 718 | u32 stats_en_mask; |
6f8d3f33 WK |
719 | |
720 | void __iomem *ss_regs; | |
721 | void __iomem *switch_regs; | |
722 | void __iomem *host_port_regs; | |
723 | void __iomem *ale_reg; | |
6246168b | 724 | void __iomem *cpts_reg; |
6f8d3f33 WK |
725 | void __iomem *sgmii_port_regs; |
726 | void __iomem *sgmii_port34_regs; | |
727 | void __iomem *xgbe_serdes_regs; | |
728 | void __iomem *hw_stats_regs[GBE_MAX_HW_STAT_MODS]; | |
729 | ||
730 | struct gbe_ss_regs_ofs ss_regs_ofs; | |
731 | struct gbe_switch_regs_ofs switch_regs_ofs; | |
732 | struct gbe_host_port_regs_ofs host_port_regs_ofs; | |
733 | ||
734 | struct cpsw_ale *ale; | |
735 | unsigned int tx_queue_id; | |
736 | const char *dma_chan_name; | |
737 | ||
738 | struct list_head gbe_intf_head; | |
739 | struct list_head secondary_slaves; | |
740 | struct net_device *dummy_ndev; | |
741 | ||
742 | u64 *hw_stats; | |
489e8a2f | 743 | u32 *hw_stats_prev; |
6f8d3f33 WK |
744 | const struct netcp_ethtool_stat *et_stats; |
745 | int num_et_stats; | |
746 | /* Lock for updating the hwstats */ | |
747 | spinlock_t hw_stats_lock; | |
6246168b WK |
748 | |
749 | int cpts_registered; | |
750 | struct cpts *cpts; | |
6f8d3f33 WK |
751 | }; |
752 | ||
753 | struct gbe_intf { | |
754 | struct net_device *ndev; | |
755 | struct device *dev; | |
756 | struct gbe_priv *gbe_dev; | |
757 | struct netcp_tx_pipe tx_pipe; | |
758 | struct gbe_slave *slave; | |
759 | struct list_head gbe_intf_list; | |
760 | unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)]; | |
761 | }; | |
762 | ||
763 | static struct netcp_module gbe_module; | |
90cff9e2 | 764 | static struct netcp_module xgbe_module; |
6f8d3f33 WK |
765 | |
766 | /* Statistic management */ | |
767 | struct netcp_ethtool_stat { | |
768 | char desc[ETH_GSTRING_LEN]; | |
769 | int type; | |
770 | u32 size; | |
771 | int offset; | |
772 | }; | |
773 | ||
da866ba0 KM |
774 | #define GBE_STATSA_INFO(field) \ |
775 | { \ | |
776 | "GBE_A:"#field, GBE_STATSA_MODULE, \ | |
777 | FIELD_SIZEOF(struct gbe_hw_stats, field), \ | |
778 | offsetof(struct gbe_hw_stats, field) \ | |
779 | } | |
780 | ||
781 | #define GBE_STATSB_INFO(field) \ | |
782 | { \ | |
783 | "GBE_B:"#field, GBE_STATSB_MODULE, \ | |
784 | FIELD_SIZEOF(struct gbe_hw_stats, field), \ | |
785 | offsetof(struct gbe_hw_stats, field) \ | |
786 | } | |
787 | ||
788 | #define GBE_STATSC_INFO(field) \ | |
789 | { \ | |
790 | "GBE_C:"#field, GBE_STATSC_MODULE, \ | |
791 | FIELD_SIZEOF(struct gbe_hw_stats, field), \ | |
792 | offsetof(struct gbe_hw_stats, field) \ | |
793 | } | |
794 | ||
795 | #define GBE_STATSD_INFO(field) \ | |
796 | { \ | |
797 | "GBE_D:"#field, GBE_STATSD_MODULE, \ | |
798 | FIELD_SIZEOF(struct gbe_hw_stats, field), \ | |
799 | offsetof(struct gbe_hw_stats, field) \ | |
800 | } | |
6f8d3f33 WK |
801 | |
802 | static const struct netcp_ethtool_stat gbe13_et_stats[] = { | |
803 | /* GBE module A */ | |
da866ba0 KM |
804 | GBE_STATSA_INFO(rx_good_frames), |
805 | GBE_STATSA_INFO(rx_broadcast_frames), | |
806 | GBE_STATSA_INFO(rx_multicast_frames), | |
807 | GBE_STATSA_INFO(rx_pause_frames), | |
808 | GBE_STATSA_INFO(rx_crc_errors), | |
809 | GBE_STATSA_INFO(rx_align_code_errors), | |
810 | GBE_STATSA_INFO(rx_oversized_frames), | |
811 | GBE_STATSA_INFO(rx_jabber_frames), | |
812 | GBE_STATSA_INFO(rx_undersized_frames), | |
813 | GBE_STATSA_INFO(rx_fragments), | |
814 | GBE_STATSA_INFO(rx_bytes), | |
815 | GBE_STATSA_INFO(tx_good_frames), | |
816 | GBE_STATSA_INFO(tx_broadcast_frames), | |
817 | GBE_STATSA_INFO(tx_multicast_frames), | |
818 | GBE_STATSA_INFO(tx_pause_frames), | |
819 | GBE_STATSA_INFO(tx_deferred_frames), | |
820 | GBE_STATSA_INFO(tx_collision_frames), | |
821 | GBE_STATSA_INFO(tx_single_coll_frames), | |
822 | GBE_STATSA_INFO(tx_mult_coll_frames), | |
823 | GBE_STATSA_INFO(tx_excessive_collisions), | |
824 | GBE_STATSA_INFO(tx_late_collisions), | |
825 | GBE_STATSA_INFO(tx_underrun), | |
826 | GBE_STATSA_INFO(tx_carrier_sense_errors), | |
827 | GBE_STATSA_INFO(tx_bytes), | |
828 | GBE_STATSA_INFO(tx_64byte_frames), | |
829 | GBE_STATSA_INFO(tx_65_to_127byte_frames), | |
830 | GBE_STATSA_INFO(tx_128_to_255byte_frames), | |
831 | GBE_STATSA_INFO(tx_256_to_511byte_frames), | |
832 | GBE_STATSA_INFO(tx_512_to_1023byte_frames), | |
833 | GBE_STATSA_INFO(tx_1024byte_frames), | |
834 | GBE_STATSA_INFO(net_bytes), | |
835 | GBE_STATSA_INFO(rx_sof_overruns), | |
836 | GBE_STATSA_INFO(rx_mof_overruns), | |
837 | GBE_STATSA_INFO(rx_dma_overruns), | |
6f8d3f33 | 838 | /* GBE module B */ |
da866ba0 KM |
839 | GBE_STATSB_INFO(rx_good_frames), |
840 | GBE_STATSB_INFO(rx_broadcast_frames), | |
841 | GBE_STATSB_INFO(rx_multicast_frames), | |
842 | GBE_STATSB_INFO(rx_pause_frames), | |
843 | GBE_STATSB_INFO(rx_crc_errors), | |
844 | GBE_STATSB_INFO(rx_align_code_errors), | |
845 | GBE_STATSB_INFO(rx_oversized_frames), | |
846 | GBE_STATSB_INFO(rx_jabber_frames), | |
847 | GBE_STATSB_INFO(rx_undersized_frames), | |
848 | GBE_STATSB_INFO(rx_fragments), | |
849 | GBE_STATSB_INFO(rx_bytes), | |
850 | GBE_STATSB_INFO(tx_good_frames), | |
851 | GBE_STATSB_INFO(tx_broadcast_frames), | |
852 | GBE_STATSB_INFO(tx_multicast_frames), | |
853 | GBE_STATSB_INFO(tx_pause_frames), | |
854 | GBE_STATSB_INFO(tx_deferred_frames), | |
855 | GBE_STATSB_INFO(tx_collision_frames), | |
856 | GBE_STATSB_INFO(tx_single_coll_frames), | |
857 | GBE_STATSB_INFO(tx_mult_coll_frames), | |
858 | GBE_STATSB_INFO(tx_excessive_collisions), | |
859 | GBE_STATSB_INFO(tx_late_collisions), | |
860 | GBE_STATSB_INFO(tx_underrun), | |
861 | GBE_STATSB_INFO(tx_carrier_sense_errors), | |
862 | GBE_STATSB_INFO(tx_bytes), | |
863 | GBE_STATSB_INFO(tx_64byte_frames), | |
864 | GBE_STATSB_INFO(tx_65_to_127byte_frames), | |
865 | GBE_STATSB_INFO(tx_128_to_255byte_frames), | |
866 | GBE_STATSB_INFO(tx_256_to_511byte_frames), | |
867 | GBE_STATSB_INFO(tx_512_to_1023byte_frames), | |
868 | GBE_STATSB_INFO(tx_1024byte_frames), | |
869 | GBE_STATSB_INFO(net_bytes), | |
870 | GBE_STATSB_INFO(rx_sof_overruns), | |
871 | GBE_STATSB_INFO(rx_mof_overruns), | |
872 | GBE_STATSB_INFO(rx_dma_overruns), | |
6f8d3f33 | 873 | /* GBE module C */ |
da866ba0 KM |
874 | GBE_STATSC_INFO(rx_good_frames), |
875 | GBE_STATSC_INFO(rx_broadcast_frames), | |
876 | GBE_STATSC_INFO(rx_multicast_frames), | |
877 | GBE_STATSC_INFO(rx_pause_frames), | |
878 | GBE_STATSC_INFO(rx_crc_errors), | |
879 | GBE_STATSC_INFO(rx_align_code_errors), | |
880 | GBE_STATSC_INFO(rx_oversized_frames), | |
881 | GBE_STATSC_INFO(rx_jabber_frames), | |
882 | GBE_STATSC_INFO(rx_undersized_frames), | |
883 | GBE_STATSC_INFO(rx_fragments), | |
884 | GBE_STATSC_INFO(rx_bytes), | |
885 | GBE_STATSC_INFO(tx_good_frames), | |
886 | GBE_STATSC_INFO(tx_broadcast_frames), | |
887 | GBE_STATSC_INFO(tx_multicast_frames), | |
888 | GBE_STATSC_INFO(tx_pause_frames), | |
889 | GBE_STATSC_INFO(tx_deferred_frames), | |
890 | GBE_STATSC_INFO(tx_collision_frames), | |
891 | GBE_STATSC_INFO(tx_single_coll_frames), | |
892 | GBE_STATSC_INFO(tx_mult_coll_frames), | |
893 | GBE_STATSC_INFO(tx_excessive_collisions), | |
894 | GBE_STATSC_INFO(tx_late_collisions), | |
895 | GBE_STATSC_INFO(tx_underrun), | |
896 | GBE_STATSC_INFO(tx_carrier_sense_errors), | |
897 | GBE_STATSC_INFO(tx_bytes), | |
898 | GBE_STATSC_INFO(tx_64byte_frames), | |
899 | GBE_STATSC_INFO(tx_65_to_127byte_frames), | |
900 | GBE_STATSC_INFO(tx_128_to_255byte_frames), | |
901 | GBE_STATSC_INFO(tx_256_to_511byte_frames), | |
902 | GBE_STATSC_INFO(tx_512_to_1023byte_frames), | |
903 | GBE_STATSC_INFO(tx_1024byte_frames), | |
904 | GBE_STATSC_INFO(net_bytes), | |
905 | GBE_STATSC_INFO(rx_sof_overruns), | |
906 | GBE_STATSC_INFO(rx_mof_overruns), | |
907 | GBE_STATSC_INFO(rx_dma_overruns), | |
6f8d3f33 | 908 | /* GBE module D */ |
da866ba0 KM |
909 | GBE_STATSD_INFO(rx_good_frames), |
910 | GBE_STATSD_INFO(rx_broadcast_frames), | |
911 | GBE_STATSD_INFO(rx_multicast_frames), | |
912 | GBE_STATSD_INFO(rx_pause_frames), | |
913 | GBE_STATSD_INFO(rx_crc_errors), | |
914 | GBE_STATSD_INFO(rx_align_code_errors), | |
915 | GBE_STATSD_INFO(rx_oversized_frames), | |
916 | GBE_STATSD_INFO(rx_jabber_frames), | |
917 | GBE_STATSD_INFO(rx_undersized_frames), | |
918 | GBE_STATSD_INFO(rx_fragments), | |
919 | GBE_STATSD_INFO(rx_bytes), | |
920 | GBE_STATSD_INFO(tx_good_frames), | |
921 | GBE_STATSD_INFO(tx_broadcast_frames), | |
922 | GBE_STATSD_INFO(tx_multicast_frames), | |
923 | GBE_STATSD_INFO(tx_pause_frames), | |
924 | GBE_STATSD_INFO(tx_deferred_frames), | |
925 | GBE_STATSD_INFO(tx_collision_frames), | |
926 | GBE_STATSD_INFO(tx_single_coll_frames), | |
927 | GBE_STATSD_INFO(tx_mult_coll_frames), | |
928 | GBE_STATSD_INFO(tx_excessive_collisions), | |
929 | GBE_STATSD_INFO(tx_late_collisions), | |
930 | GBE_STATSD_INFO(tx_underrun), | |
931 | GBE_STATSD_INFO(tx_carrier_sense_errors), | |
932 | GBE_STATSD_INFO(tx_bytes), | |
933 | GBE_STATSD_INFO(tx_64byte_frames), | |
934 | GBE_STATSD_INFO(tx_65_to_127byte_frames), | |
935 | GBE_STATSD_INFO(tx_128_to_255byte_frames), | |
936 | GBE_STATSD_INFO(tx_256_to_511byte_frames), | |
937 | GBE_STATSD_INFO(tx_512_to_1023byte_frames), | |
938 | GBE_STATSD_INFO(tx_1024byte_frames), | |
939 | GBE_STATSD_INFO(net_bytes), | |
940 | GBE_STATSD_INFO(rx_sof_overruns), | |
941 | GBE_STATSD_INFO(rx_mof_overruns), | |
942 | GBE_STATSD_INFO(rx_dma_overruns), | |
6f8d3f33 WK |
943 | }; |
944 | ||
9a391c7b | 945 | /* This is the size of entries in GBENU_STATS_HOST */ |
5be4001e | 946 | #define GBENU_ET_STATS_HOST_SIZE 52 |
9a391c7b WK |
947 | |
948 | #define GBENU_STATS_HOST(field) \ | |
949 | { \ | |
950 | "GBE_HOST:"#field, GBENU_STATS0_MODULE, \ | |
951 | FIELD_SIZEOF(struct gbenu_hw_stats, field), \ | |
952 | offsetof(struct gbenu_hw_stats, field) \ | |
953 | } | |
954 | ||
5be4001e WK |
955 | /* This is the size of entries in GBENU_STATS_PORT */ |
956 | #define GBENU_ET_STATS_PORT_SIZE 65 | |
9a391c7b WK |
957 | |
958 | #define GBENU_STATS_P1(field) \ | |
959 | { \ | |
960 | "GBE_P1:"#field, GBENU_STATS1_MODULE, \ | |
961 | FIELD_SIZEOF(struct gbenu_hw_stats, field), \ | |
962 | offsetof(struct gbenu_hw_stats, field) \ | |
963 | } | |
964 | ||
965 | #define GBENU_STATS_P2(field) \ | |
966 | { \ | |
967 | "GBE_P2:"#field, GBENU_STATS2_MODULE, \ | |
968 | FIELD_SIZEOF(struct gbenu_hw_stats, field), \ | |
969 | offsetof(struct gbenu_hw_stats, field) \ | |
970 | } | |
971 | ||
972 | #define GBENU_STATS_P3(field) \ | |
973 | { \ | |
974 | "GBE_P3:"#field, GBENU_STATS3_MODULE, \ | |
975 | FIELD_SIZEOF(struct gbenu_hw_stats, field), \ | |
976 | offsetof(struct gbenu_hw_stats, field) \ | |
977 | } | |
978 | ||
979 | #define GBENU_STATS_P4(field) \ | |
980 | { \ | |
981 | "GBE_P4:"#field, GBENU_STATS4_MODULE, \ | |
982 | FIELD_SIZEOF(struct gbenu_hw_stats, field), \ | |
983 | offsetof(struct gbenu_hw_stats, field) \ | |
984 | } | |
985 | ||
986 | #define GBENU_STATS_P5(field) \ | |
987 | { \ | |
988 | "GBE_P5:"#field, GBENU_STATS5_MODULE, \ | |
989 | FIELD_SIZEOF(struct gbenu_hw_stats, field), \ | |
990 | offsetof(struct gbenu_hw_stats, field) \ | |
991 | } | |
992 | ||
993 | #define GBENU_STATS_P6(field) \ | |
994 | { \ | |
995 | "GBE_P6:"#field, GBENU_STATS6_MODULE, \ | |
996 | FIELD_SIZEOF(struct gbenu_hw_stats, field), \ | |
997 | offsetof(struct gbenu_hw_stats, field) \ | |
998 | } | |
999 | ||
1000 | #define GBENU_STATS_P7(field) \ | |
1001 | { \ | |
1002 | "GBE_P7:"#field, GBENU_STATS7_MODULE, \ | |
1003 | FIELD_SIZEOF(struct gbenu_hw_stats, field), \ | |
1004 | offsetof(struct gbenu_hw_stats, field) \ | |
1005 | } | |
1006 | ||
1007 | #define GBENU_STATS_P8(field) \ | |
1008 | { \ | |
1009 | "GBE_P8:"#field, GBENU_STATS8_MODULE, \ | |
1010 | FIELD_SIZEOF(struct gbenu_hw_stats, field), \ | |
1011 | offsetof(struct gbenu_hw_stats, field) \ | |
1012 | } | |
1013 | ||
1014 | static const struct netcp_ethtool_stat gbenu_et_stats[] = { | |
1015 | /* GBENU Host Module */ | |
1016 | GBENU_STATS_HOST(rx_good_frames), | |
1017 | GBENU_STATS_HOST(rx_broadcast_frames), | |
1018 | GBENU_STATS_HOST(rx_multicast_frames), | |
1019 | GBENU_STATS_HOST(rx_crc_errors), | |
1020 | GBENU_STATS_HOST(rx_oversized_frames), | |
1021 | GBENU_STATS_HOST(rx_undersized_frames), | |
1022 | GBENU_STATS_HOST(ale_drop), | |
1023 | GBENU_STATS_HOST(ale_overrun_drop), | |
1024 | GBENU_STATS_HOST(rx_bytes), | |
1025 | GBENU_STATS_HOST(tx_good_frames), | |
1026 | GBENU_STATS_HOST(tx_broadcast_frames), | |
1027 | GBENU_STATS_HOST(tx_multicast_frames), | |
1028 | GBENU_STATS_HOST(tx_bytes), | |
1029 | GBENU_STATS_HOST(tx_64B_frames), | |
1030 | GBENU_STATS_HOST(tx_65_to_127B_frames), | |
1031 | GBENU_STATS_HOST(tx_128_to_255B_frames), | |
1032 | GBENU_STATS_HOST(tx_256_to_511B_frames), | |
1033 | GBENU_STATS_HOST(tx_512_to_1023B_frames), | |
1034 | GBENU_STATS_HOST(tx_1024B_frames), | |
1035 | GBENU_STATS_HOST(net_bytes), | |
1036 | GBENU_STATS_HOST(rx_bottom_fifo_drop), | |
1037 | GBENU_STATS_HOST(rx_port_mask_drop), | |
1038 | GBENU_STATS_HOST(rx_top_fifo_drop), | |
1039 | GBENU_STATS_HOST(ale_rate_limit_drop), | |
1040 | GBENU_STATS_HOST(ale_vid_ingress_drop), | |
1041 | GBENU_STATS_HOST(ale_da_eq_sa_drop), | |
1042 | GBENU_STATS_HOST(ale_unknown_ucast), | |
1043 | GBENU_STATS_HOST(ale_unknown_ucast_bytes), | |
1044 | GBENU_STATS_HOST(ale_unknown_mcast), | |
1045 | GBENU_STATS_HOST(ale_unknown_mcast_bytes), | |
1046 | GBENU_STATS_HOST(ale_unknown_bcast), | |
1047 | GBENU_STATS_HOST(ale_unknown_bcast_bytes), | |
5be4001e WK |
1048 | GBENU_STATS_HOST(ale_pol_match), |
1049 | GBENU_STATS_HOST(ale_pol_match_red), | |
1050 | GBENU_STATS_HOST(ale_pol_match_yellow), | |
9a391c7b | 1051 | GBENU_STATS_HOST(tx_mem_protect_err), |
5be4001e WK |
1052 | GBENU_STATS_HOST(tx_pri0_drop), |
1053 | GBENU_STATS_HOST(tx_pri1_drop), | |
1054 | GBENU_STATS_HOST(tx_pri2_drop), | |
1055 | GBENU_STATS_HOST(tx_pri3_drop), | |
1056 | GBENU_STATS_HOST(tx_pri4_drop), | |
1057 | GBENU_STATS_HOST(tx_pri5_drop), | |
1058 | GBENU_STATS_HOST(tx_pri6_drop), | |
1059 | GBENU_STATS_HOST(tx_pri7_drop), | |
1060 | GBENU_STATS_HOST(tx_pri0_drop_bcnt), | |
1061 | GBENU_STATS_HOST(tx_pri1_drop_bcnt), | |
1062 | GBENU_STATS_HOST(tx_pri2_drop_bcnt), | |
1063 | GBENU_STATS_HOST(tx_pri3_drop_bcnt), | |
1064 | GBENU_STATS_HOST(tx_pri4_drop_bcnt), | |
1065 | GBENU_STATS_HOST(tx_pri5_drop_bcnt), | |
1066 | GBENU_STATS_HOST(tx_pri6_drop_bcnt), | |
1067 | GBENU_STATS_HOST(tx_pri7_drop_bcnt), | |
9a391c7b WK |
1068 | /* GBENU Module 1 */ |
1069 | GBENU_STATS_P1(rx_good_frames), | |
1070 | GBENU_STATS_P1(rx_broadcast_frames), | |
1071 | GBENU_STATS_P1(rx_multicast_frames), | |
1072 | GBENU_STATS_P1(rx_pause_frames), | |
1073 | GBENU_STATS_P1(rx_crc_errors), | |
1074 | GBENU_STATS_P1(rx_align_code_errors), | |
1075 | GBENU_STATS_P1(rx_oversized_frames), | |
1076 | GBENU_STATS_P1(rx_jabber_frames), | |
1077 | GBENU_STATS_P1(rx_undersized_frames), | |
1078 | GBENU_STATS_P1(rx_fragments), | |
1079 | GBENU_STATS_P1(ale_drop), | |
1080 | GBENU_STATS_P1(ale_overrun_drop), | |
1081 | GBENU_STATS_P1(rx_bytes), | |
1082 | GBENU_STATS_P1(tx_good_frames), | |
1083 | GBENU_STATS_P1(tx_broadcast_frames), | |
1084 | GBENU_STATS_P1(tx_multicast_frames), | |
1085 | GBENU_STATS_P1(tx_pause_frames), | |
1086 | GBENU_STATS_P1(tx_deferred_frames), | |
1087 | GBENU_STATS_P1(tx_collision_frames), | |
1088 | GBENU_STATS_P1(tx_single_coll_frames), | |
1089 | GBENU_STATS_P1(tx_mult_coll_frames), | |
1090 | GBENU_STATS_P1(tx_excessive_collisions), | |
1091 | GBENU_STATS_P1(tx_late_collisions), | |
1092 | GBENU_STATS_P1(rx_ipg_error), | |
1093 | GBENU_STATS_P1(tx_carrier_sense_errors), | |
1094 | GBENU_STATS_P1(tx_bytes), | |
1095 | GBENU_STATS_P1(tx_64B_frames), | |
1096 | GBENU_STATS_P1(tx_65_to_127B_frames), | |
1097 | GBENU_STATS_P1(tx_128_to_255B_frames), | |
1098 | GBENU_STATS_P1(tx_256_to_511B_frames), | |
1099 | GBENU_STATS_P1(tx_512_to_1023B_frames), | |
1100 | GBENU_STATS_P1(tx_1024B_frames), | |
1101 | GBENU_STATS_P1(net_bytes), | |
1102 | GBENU_STATS_P1(rx_bottom_fifo_drop), | |
1103 | GBENU_STATS_P1(rx_port_mask_drop), | |
1104 | GBENU_STATS_P1(rx_top_fifo_drop), | |
1105 | GBENU_STATS_P1(ale_rate_limit_drop), | |
1106 | GBENU_STATS_P1(ale_vid_ingress_drop), | |
1107 | GBENU_STATS_P1(ale_da_eq_sa_drop), | |
1108 | GBENU_STATS_P1(ale_unknown_ucast), | |
1109 | GBENU_STATS_P1(ale_unknown_ucast_bytes), | |
1110 | GBENU_STATS_P1(ale_unknown_mcast), | |
1111 | GBENU_STATS_P1(ale_unknown_mcast_bytes), | |
1112 | GBENU_STATS_P1(ale_unknown_bcast), | |
1113 | GBENU_STATS_P1(ale_unknown_bcast_bytes), | |
5be4001e WK |
1114 | GBENU_STATS_P1(ale_pol_match), |
1115 | GBENU_STATS_P1(ale_pol_match_red), | |
1116 | GBENU_STATS_P1(ale_pol_match_yellow), | |
9a391c7b | 1117 | GBENU_STATS_P1(tx_mem_protect_err), |
5be4001e WK |
1118 | GBENU_STATS_P1(tx_pri0_drop), |
1119 | GBENU_STATS_P1(tx_pri1_drop), | |
1120 | GBENU_STATS_P1(tx_pri2_drop), | |
1121 | GBENU_STATS_P1(tx_pri3_drop), | |
1122 | GBENU_STATS_P1(tx_pri4_drop), | |
1123 | GBENU_STATS_P1(tx_pri5_drop), | |
1124 | GBENU_STATS_P1(tx_pri6_drop), | |
1125 | GBENU_STATS_P1(tx_pri7_drop), | |
1126 | GBENU_STATS_P1(tx_pri0_drop_bcnt), | |
1127 | GBENU_STATS_P1(tx_pri1_drop_bcnt), | |
1128 | GBENU_STATS_P1(tx_pri2_drop_bcnt), | |
1129 | GBENU_STATS_P1(tx_pri3_drop_bcnt), | |
1130 | GBENU_STATS_P1(tx_pri4_drop_bcnt), | |
1131 | GBENU_STATS_P1(tx_pri5_drop_bcnt), | |
1132 | GBENU_STATS_P1(tx_pri6_drop_bcnt), | |
1133 | GBENU_STATS_P1(tx_pri7_drop_bcnt), | |
9a391c7b WK |
1134 | /* GBENU Module 2 */ |
1135 | GBENU_STATS_P2(rx_good_frames), | |
1136 | GBENU_STATS_P2(rx_broadcast_frames), | |
1137 | GBENU_STATS_P2(rx_multicast_frames), | |
1138 | GBENU_STATS_P2(rx_pause_frames), | |
1139 | GBENU_STATS_P2(rx_crc_errors), | |
1140 | GBENU_STATS_P2(rx_align_code_errors), | |
1141 | GBENU_STATS_P2(rx_oversized_frames), | |
1142 | GBENU_STATS_P2(rx_jabber_frames), | |
1143 | GBENU_STATS_P2(rx_undersized_frames), | |
1144 | GBENU_STATS_P2(rx_fragments), | |
1145 | GBENU_STATS_P2(ale_drop), | |
1146 | GBENU_STATS_P2(ale_overrun_drop), | |
1147 | GBENU_STATS_P2(rx_bytes), | |
1148 | GBENU_STATS_P2(tx_good_frames), | |
1149 | GBENU_STATS_P2(tx_broadcast_frames), | |
1150 | GBENU_STATS_P2(tx_multicast_frames), | |
1151 | GBENU_STATS_P2(tx_pause_frames), | |
1152 | GBENU_STATS_P2(tx_deferred_frames), | |
1153 | GBENU_STATS_P2(tx_collision_frames), | |
1154 | GBENU_STATS_P2(tx_single_coll_frames), | |
1155 | GBENU_STATS_P2(tx_mult_coll_frames), | |
1156 | GBENU_STATS_P2(tx_excessive_collisions), | |
1157 | GBENU_STATS_P2(tx_late_collisions), | |
1158 | GBENU_STATS_P2(rx_ipg_error), | |
1159 | GBENU_STATS_P2(tx_carrier_sense_errors), | |
1160 | GBENU_STATS_P2(tx_bytes), | |
1161 | GBENU_STATS_P2(tx_64B_frames), | |
1162 | GBENU_STATS_P2(tx_65_to_127B_frames), | |
1163 | GBENU_STATS_P2(tx_128_to_255B_frames), | |
1164 | GBENU_STATS_P2(tx_256_to_511B_frames), | |
1165 | GBENU_STATS_P2(tx_512_to_1023B_frames), | |
1166 | GBENU_STATS_P2(tx_1024B_frames), | |
1167 | GBENU_STATS_P2(net_bytes), | |
1168 | GBENU_STATS_P2(rx_bottom_fifo_drop), | |
1169 | GBENU_STATS_P2(rx_port_mask_drop), | |
1170 | GBENU_STATS_P2(rx_top_fifo_drop), | |
1171 | GBENU_STATS_P2(ale_rate_limit_drop), | |
1172 | GBENU_STATS_P2(ale_vid_ingress_drop), | |
1173 | GBENU_STATS_P2(ale_da_eq_sa_drop), | |
1174 | GBENU_STATS_P2(ale_unknown_ucast), | |
1175 | GBENU_STATS_P2(ale_unknown_ucast_bytes), | |
1176 | GBENU_STATS_P2(ale_unknown_mcast), | |
1177 | GBENU_STATS_P2(ale_unknown_mcast_bytes), | |
1178 | GBENU_STATS_P2(ale_unknown_bcast), | |
1179 | GBENU_STATS_P2(ale_unknown_bcast_bytes), | |
5be4001e WK |
1180 | GBENU_STATS_P2(ale_pol_match), |
1181 | GBENU_STATS_P2(ale_pol_match_red), | |
1182 | GBENU_STATS_P2(ale_pol_match_yellow), | |
9a391c7b | 1183 | GBENU_STATS_P2(tx_mem_protect_err), |
5be4001e WK |
1184 | GBENU_STATS_P2(tx_pri0_drop), |
1185 | GBENU_STATS_P2(tx_pri1_drop), | |
1186 | GBENU_STATS_P2(tx_pri2_drop), | |
1187 | GBENU_STATS_P2(tx_pri3_drop), | |
1188 | GBENU_STATS_P2(tx_pri4_drop), | |
1189 | GBENU_STATS_P2(tx_pri5_drop), | |
1190 | GBENU_STATS_P2(tx_pri6_drop), | |
1191 | GBENU_STATS_P2(tx_pri7_drop), | |
1192 | GBENU_STATS_P2(tx_pri0_drop_bcnt), | |
1193 | GBENU_STATS_P2(tx_pri1_drop_bcnt), | |
1194 | GBENU_STATS_P2(tx_pri2_drop_bcnt), | |
1195 | GBENU_STATS_P2(tx_pri3_drop_bcnt), | |
1196 | GBENU_STATS_P2(tx_pri4_drop_bcnt), | |
1197 | GBENU_STATS_P2(tx_pri5_drop_bcnt), | |
1198 | GBENU_STATS_P2(tx_pri6_drop_bcnt), | |
1199 | GBENU_STATS_P2(tx_pri7_drop_bcnt), | |
9a391c7b WK |
1200 | /* GBENU Module 3 */ |
1201 | GBENU_STATS_P3(rx_good_frames), | |
1202 | GBENU_STATS_P3(rx_broadcast_frames), | |
1203 | GBENU_STATS_P3(rx_multicast_frames), | |
1204 | GBENU_STATS_P3(rx_pause_frames), | |
1205 | GBENU_STATS_P3(rx_crc_errors), | |
1206 | GBENU_STATS_P3(rx_align_code_errors), | |
1207 | GBENU_STATS_P3(rx_oversized_frames), | |
1208 | GBENU_STATS_P3(rx_jabber_frames), | |
1209 | GBENU_STATS_P3(rx_undersized_frames), | |
1210 | GBENU_STATS_P3(rx_fragments), | |
1211 | GBENU_STATS_P3(ale_drop), | |
1212 | GBENU_STATS_P3(ale_overrun_drop), | |
1213 | GBENU_STATS_P3(rx_bytes), | |
1214 | GBENU_STATS_P3(tx_good_frames), | |
1215 | GBENU_STATS_P3(tx_broadcast_frames), | |
1216 | GBENU_STATS_P3(tx_multicast_frames), | |
1217 | GBENU_STATS_P3(tx_pause_frames), | |
1218 | GBENU_STATS_P3(tx_deferred_frames), | |
1219 | GBENU_STATS_P3(tx_collision_frames), | |
1220 | GBENU_STATS_P3(tx_single_coll_frames), | |
1221 | GBENU_STATS_P3(tx_mult_coll_frames), | |
1222 | GBENU_STATS_P3(tx_excessive_collisions), | |
1223 | GBENU_STATS_P3(tx_late_collisions), | |
1224 | GBENU_STATS_P3(rx_ipg_error), | |
1225 | GBENU_STATS_P3(tx_carrier_sense_errors), | |
1226 | GBENU_STATS_P3(tx_bytes), | |
1227 | GBENU_STATS_P3(tx_64B_frames), | |
1228 | GBENU_STATS_P3(tx_65_to_127B_frames), | |
1229 | GBENU_STATS_P3(tx_128_to_255B_frames), | |
1230 | GBENU_STATS_P3(tx_256_to_511B_frames), | |
1231 | GBENU_STATS_P3(tx_512_to_1023B_frames), | |
1232 | GBENU_STATS_P3(tx_1024B_frames), | |
1233 | GBENU_STATS_P3(net_bytes), | |
1234 | GBENU_STATS_P3(rx_bottom_fifo_drop), | |
1235 | GBENU_STATS_P3(rx_port_mask_drop), | |
1236 | GBENU_STATS_P3(rx_top_fifo_drop), | |
1237 | GBENU_STATS_P3(ale_rate_limit_drop), | |
1238 | GBENU_STATS_P3(ale_vid_ingress_drop), | |
1239 | GBENU_STATS_P3(ale_da_eq_sa_drop), | |
1240 | GBENU_STATS_P3(ale_unknown_ucast), | |
1241 | GBENU_STATS_P3(ale_unknown_ucast_bytes), | |
1242 | GBENU_STATS_P3(ale_unknown_mcast), | |
1243 | GBENU_STATS_P3(ale_unknown_mcast_bytes), | |
1244 | GBENU_STATS_P3(ale_unknown_bcast), | |
1245 | GBENU_STATS_P3(ale_unknown_bcast_bytes), | |
5be4001e WK |
1246 | GBENU_STATS_P3(ale_pol_match), |
1247 | GBENU_STATS_P3(ale_pol_match_red), | |
1248 | GBENU_STATS_P3(ale_pol_match_yellow), | |
9a391c7b | 1249 | GBENU_STATS_P3(tx_mem_protect_err), |
5be4001e WK |
1250 | GBENU_STATS_P3(tx_pri0_drop), |
1251 | GBENU_STATS_P3(tx_pri1_drop), | |
1252 | GBENU_STATS_P3(tx_pri2_drop), | |
1253 | GBENU_STATS_P3(tx_pri3_drop), | |
1254 | GBENU_STATS_P3(tx_pri4_drop), | |
1255 | GBENU_STATS_P3(tx_pri5_drop), | |
1256 | GBENU_STATS_P3(tx_pri6_drop), | |
1257 | GBENU_STATS_P3(tx_pri7_drop), | |
1258 | GBENU_STATS_P3(tx_pri0_drop_bcnt), | |
1259 | GBENU_STATS_P3(tx_pri1_drop_bcnt), | |
1260 | GBENU_STATS_P3(tx_pri2_drop_bcnt), | |
1261 | GBENU_STATS_P3(tx_pri3_drop_bcnt), | |
1262 | GBENU_STATS_P3(tx_pri4_drop_bcnt), | |
1263 | GBENU_STATS_P3(tx_pri5_drop_bcnt), | |
1264 | GBENU_STATS_P3(tx_pri6_drop_bcnt), | |
1265 | GBENU_STATS_P3(tx_pri7_drop_bcnt), | |
9a391c7b WK |
1266 | /* GBENU Module 4 */ |
1267 | GBENU_STATS_P4(rx_good_frames), | |
1268 | GBENU_STATS_P4(rx_broadcast_frames), | |
1269 | GBENU_STATS_P4(rx_multicast_frames), | |
1270 | GBENU_STATS_P4(rx_pause_frames), | |
1271 | GBENU_STATS_P4(rx_crc_errors), | |
1272 | GBENU_STATS_P4(rx_align_code_errors), | |
1273 | GBENU_STATS_P4(rx_oversized_frames), | |
1274 | GBENU_STATS_P4(rx_jabber_frames), | |
1275 | GBENU_STATS_P4(rx_undersized_frames), | |
1276 | GBENU_STATS_P4(rx_fragments), | |
1277 | GBENU_STATS_P4(ale_drop), | |
1278 | GBENU_STATS_P4(ale_overrun_drop), | |
1279 | GBENU_STATS_P4(rx_bytes), | |
1280 | GBENU_STATS_P4(tx_good_frames), | |
1281 | GBENU_STATS_P4(tx_broadcast_frames), | |
1282 | GBENU_STATS_P4(tx_multicast_frames), | |
1283 | GBENU_STATS_P4(tx_pause_frames), | |
1284 | GBENU_STATS_P4(tx_deferred_frames), | |
1285 | GBENU_STATS_P4(tx_collision_frames), | |
1286 | GBENU_STATS_P4(tx_single_coll_frames), | |
1287 | GBENU_STATS_P4(tx_mult_coll_frames), | |
1288 | GBENU_STATS_P4(tx_excessive_collisions), | |
1289 | GBENU_STATS_P4(tx_late_collisions), | |
1290 | GBENU_STATS_P4(rx_ipg_error), | |
1291 | GBENU_STATS_P4(tx_carrier_sense_errors), | |
1292 | GBENU_STATS_P4(tx_bytes), | |
1293 | GBENU_STATS_P4(tx_64B_frames), | |
1294 | GBENU_STATS_P4(tx_65_to_127B_frames), | |
1295 | GBENU_STATS_P4(tx_128_to_255B_frames), | |
1296 | GBENU_STATS_P4(tx_256_to_511B_frames), | |
1297 | GBENU_STATS_P4(tx_512_to_1023B_frames), | |
1298 | GBENU_STATS_P4(tx_1024B_frames), | |
1299 | GBENU_STATS_P4(net_bytes), | |
1300 | GBENU_STATS_P4(rx_bottom_fifo_drop), | |
1301 | GBENU_STATS_P4(rx_port_mask_drop), | |
1302 | GBENU_STATS_P4(rx_top_fifo_drop), | |
1303 | GBENU_STATS_P4(ale_rate_limit_drop), | |
1304 | GBENU_STATS_P4(ale_vid_ingress_drop), | |
1305 | GBENU_STATS_P4(ale_da_eq_sa_drop), | |
1306 | GBENU_STATS_P4(ale_unknown_ucast), | |
1307 | GBENU_STATS_P4(ale_unknown_ucast_bytes), | |
1308 | GBENU_STATS_P4(ale_unknown_mcast), | |
1309 | GBENU_STATS_P4(ale_unknown_mcast_bytes), | |
1310 | GBENU_STATS_P4(ale_unknown_bcast), | |
1311 | GBENU_STATS_P4(ale_unknown_bcast_bytes), | |
5be4001e WK |
1312 | GBENU_STATS_P4(ale_pol_match), |
1313 | GBENU_STATS_P4(ale_pol_match_red), | |
1314 | GBENU_STATS_P4(ale_pol_match_yellow), | |
9a391c7b | 1315 | GBENU_STATS_P4(tx_mem_protect_err), |
5be4001e WK |
1316 | GBENU_STATS_P4(tx_pri0_drop), |
1317 | GBENU_STATS_P4(tx_pri1_drop), | |
1318 | GBENU_STATS_P4(tx_pri2_drop), | |
1319 | GBENU_STATS_P4(tx_pri3_drop), | |
1320 | GBENU_STATS_P4(tx_pri4_drop), | |
1321 | GBENU_STATS_P4(tx_pri5_drop), | |
1322 | GBENU_STATS_P4(tx_pri6_drop), | |
1323 | GBENU_STATS_P4(tx_pri7_drop), | |
1324 | GBENU_STATS_P4(tx_pri0_drop_bcnt), | |
1325 | GBENU_STATS_P4(tx_pri1_drop_bcnt), | |
1326 | GBENU_STATS_P4(tx_pri2_drop_bcnt), | |
1327 | GBENU_STATS_P4(tx_pri3_drop_bcnt), | |
1328 | GBENU_STATS_P4(tx_pri4_drop_bcnt), | |
1329 | GBENU_STATS_P4(tx_pri5_drop_bcnt), | |
1330 | GBENU_STATS_P4(tx_pri6_drop_bcnt), | |
1331 | GBENU_STATS_P4(tx_pri7_drop_bcnt), | |
9a391c7b WK |
1332 | /* GBENU Module 5 */ |
1333 | GBENU_STATS_P5(rx_good_frames), | |
1334 | GBENU_STATS_P5(rx_broadcast_frames), | |
1335 | GBENU_STATS_P5(rx_multicast_frames), | |
1336 | GBENU_STATS_P5(rx_pause_frames), | |
1337 | GBENU_STATS_P5(rx_crc_errors), | |
1338 | GBENU_STATS_P5(rx_align_code_errors), | |
1339 | GBENU_STATS_P5(rx_oversized_frames), | |
1340 | GBENU_STATS_P5(rx_jabber_frames), | |
1341 | GBENU_STATS_P5(rx_undersized_frames), | |
1342 | GBENU_STATS_P5(rx_fragments), | |
1343 | GBENU_STATS_P5(ale_drop), | |
1344 | GBENU_STATS_P5(ale_overrun_drop), | |
1345 | GBENU_STATS_P5(rx_bytes), | |
1346 | GBENU_STATS_P5(tx_good_frames), | |
1347 | GBENU_STATS_P5(tx_broadcast_frames), | |
1348 | GBENU_STATS_P5(tx_multicast_frames), | |
1349 | GBENU_STATS_P5(tx_pause_frames), | |
1350 | GBENU_STATS_P5(tx_deferred_frames), | |
1351 | GBENU_STATS_P5(tx_collision_frames), | |
1352 | GBENU_STATS_P5(tx_single_coll_frames), | |
1353 | GBENU_STATS_P5(tx_mult_coll_frames), | |
1354 | GBENU_STATS_P5(tx_excessive_collisions), | |
1355 | GBENU_STATS_P5(tx_late_collisions), | |
1356 | GBENU_STATS_P5(rx_ipg_error), | |
1357 | GBENU_STATS_P5(tx_carrier_sense_errors), | |
1358 | GBENU_STATS_P5(tx_bytes), | |
1359 | GBENU_STATS_P5(tx_64B_frames), | |
1360 | GBENU_STATS_P5(tx_65_to_127B_frames), | |
1361 | GBENU_STATS_P5(tx_128_to_255B_frames), | |
1362 | GBENU_STATS_P5(tx_256_to_511B_frames), | |
1363 | GBENU_STATS_P5(tx_512_to_1023B_frames), | |
1364 | GBENU_STATS_P5(tx_1024B_frames), | |
1365 | GBENU_STATS_P5(net_bytes), | |
1366 | GBENU_STATS_P5(rx_bottom_fifo_drop), | |
1367 | GBENU_STATS_P5(rx_port_mask_drop), | |
1368 | GBENU_STATS_P5(rx_top_fifo_drop), | |
1369 | GBENU_STATS_P5(ale_rate_limit_drop), | |
1370 | GBENU_STATS_P5(ale_vid_ingress_drop), | |
1371 | GBENU_STATS_P5(ale_da_eq_sa_drop), | |
1372 | GBENU_STATS_P5(ale_unknown_ucast), | |
1373 | GBENU_STATS_P5(ale_unknown_ucast_bytes), | |
1374 | GBENU_STATS_P5(ale_unknown_mcast), | |
1375 | GBENU_STATS_P5(ale_unknown_mcast_bytes), | |
1376 | GBENU_STATS_P5(ale_unknown_bcast), | |
1377 | GBENU_STATS_P5(ale_unknown_bcast_bytes), | |
5be4001e WK |
1378 | GBENU_STATS_P5(ale_pol_match), |
1379 | GBENU_STATS_P5(ale_pol_match_red), | |
1380 | GBENU_STATS_P5(ale_pol_match_yellow), | |
9a391c7b | 1381 | GBENU_STATS_P5(tx_mem_protect_err), |
5be4001e WK |
1382 | GBENU_STATS_P5(tx_pri0_drop), |
1383 | GBENU_STATS_P5(tx_pri1_drop), | |
1384 | GBENU_STATS_P5(tx_pri2_drop), | |
1385 | GBENU_STATS_P5(tx_pri3_drop), | |
1386 | GBENU_STATS_P5(tx_pri4_drop), | |
1387 | GBENU_STATS_P5(tx_pri5_drop), | |
1388 | GBENU_STATS_P5(tx_pri6_drop), | |
1389 | GBENU_STATS_P5(tx_pri7_drop), | |
1390 | GBENU_STATS_P5(tx_pri0_drop_bcnt), | |
1391 | GBENU_STATS_P5(tx_pri1_drop_bcnt), | |
1392 | GBENU_STATS_P5(tx_pri2_drop_bcnt), | |
1393 | GBENU_STATS_P5(tx_pri3_drop_bcnt), | |
1394 | GBENU_STATS_P5(tx_pri4_drop_bcnt), | |
1395 | GBENU_STATS_P5(tx_pri5_drop_bcnt), | |
1396 | GBENU_STATS_P5(tx_pri6_drop_bcnt), | |
1397 | GBENU_STATS_P5(tx_pri7_drop_bcnt), | |
9a391c7b WK |
1398 | /* GBENU Module 6 */ |
1399 | GBENU_STATS_P6(rx_good_frames), | |
1400 | GBENU_STATS_P6(rx_broadcast_frames), | |
1401 | GBENU_STATS_P6(rx_multicast_frames), | |
1402 | GBENU_STATS_P6(rx_pause_frames), | |
1403 | GBENU_STATS_P6(rx_crc_errors), | |
1404 | GBENU_STATS_P6(rx_align_code_errors), | |
1405 | GBENU_STATS_P6(rx_oversized_frames), | |
1406 | GBENU_STATS_P6(rx_jabber_frames), | |
1407 | GBENU_STATS_P6(rx_undersized_frames), | |
1408 | GBENU_STATS_P6(rx_fragments), | |
1409 | GBENU_STATS_P6(ale_drop), | |
1410 | GBENU_STATS_P6(ale_overrun_drop), | |
1411 | GBENU_STATS_P6(rx_bytes), | |
1412 | GBENU_STATS_P6(tx_good_frames), | |
1413 | GBENU_STATS_P6(tx_broadcast_frames), | |
1414 | GBENU_STATS_P6(tx_multicast_frames), | |
1415 | GBENU_STATS_P6(tx_pause_frames), | |
1416 | GBENU_STATS_P6(tx_deferred_frames), | |
1417 | GBENU_STATS_P6(tx_collision_frames), | |
1418 | GBENU_STATS_P6(tx_single_coll_frames), | |
1419 | GBENU_STATS_P6(tx_mult_coll_frames), | |
1420 | GBENU_STATS_P6(tx_excessive_collisions), | |
1421 | GBENU_STATS_P6(tx_late_collisions), | |
1422 | GBENU_STATS_P6(rx_ipg_error), | |
1423 | GBENU_STATS_P6(tx_carrier_sense_errors), | |
1424 | GBENU_STATS_P6(tx_bytes), | |
1425 | GBENU_STATS_P6(tx_64B_frames), | |
1426 | GBENU_STATS_P6(tx_65_to_127B_frames), | |
1427 | GBENU_STATS_P6(tx_128_to_255B_frames), | |
1428 | GBENU_STATS_P6(tx_256_to_511B_frames), | |
1429 | GBENU_STATS_P6(tx_512_to_1023B_frames), | |
1430 | GBENU_STATS_P6(tx_1024B_frames), | |
1431 | GBENU_STATS_P6(net_bytes), | |
1432 | GBENU_STATS_P6(rx_bottom_fifo_drop), | |
1433 | GBENU_STATS_P6(rx_port_mask_drop), | |
1434 | GBENU_STATS_P6(rx_top_fifo_drop), | |
1435 | GBENU_STATS_P6(ale_rate_limit_drop), | |
1436 | GBENU_STATS_P6(ale_vid_ingress_drop), | |
1437 | GBENU_STATS_P6(ale_da_eq_sa_drop), | |
1438 | GBENU_STATS_P6(ale_unknown_ucast), | |
1439 | GBENU_STATS_P6(ale_unknown_ucast_bytes), | |
1440 | GBENU_STATS_P6(ale_unknown_mcast), | |
1441 | GBENU_STATS_P6(ale_unknown_mcast_bytes), | |
1442 | GBENU_STATS_P6(ale_unknown_bcast), | |
1443 | GBENU_STATS_P6(ale_unknown_bcast_bytes), | |
5be4001e WK |
1444 | GBENU_STATS_P6(ale_pol_match), |
1445 | GBENU_STATS_P6(ale_pol_match_red), | |
1446 | GBENU_STATS_P6(ale_pol_match_yellow), | |
9a391c7b | 1447 | GBENU_STATS_P6(tx_mem_protect_err), |
5be4001e WK |
1448 | GBENU_STATS_P6(tx_pri0_drop), |
1449 | GBENU_STATS_P6(tx_pri1_drop), | |
1450 | GBENU_STATS_P6(tx_pri2_drop), | |
1451 | GBENU_STATS_P6(tx_pri3_drop), | |
1452 | GBENU_STATS_P6(tx_pri4_drop), | |
1453 | GBENU_STATS_P6(tx_pri5_drop), | |
1454 | GBENU_STATS_P6(tx_pri6_drop), | |
1455 | GBENU_STATS_P6(tx_pri7_drop), | |
1456 | GBENU_STATS_P6(tx_pri0_drop_bcnt), | |
1457 | GBENU_STATS_P6(tx_pri1_drop_bcnt), | |
1458 | GBENU_STATS_P6(tx_pri2_drop_bcnt), | |
1459 | GBENU_STATS_P6(tx_pri3_drop_bcnt), | |
1460 | GBENU_STATS_P6(tx_pri4_drop_bcnt), | |
1461 | GBENU_STATS_P6(tx_pri5_drop_bcnt), | |
1462 | GBENU_STATS_P6(tx_pri6_drop_bcnt), | |
1463 | GBENU_STATS_P6(tx_pri7_drop_bcnt), | |
9a391c7b WK |
1464 | /* GBENU Module 7 */ |
1465 | GBENU_STATS_P7(rx_good_frames), | |
1466 | GBENU_STATS_P7(rx_broadcast_frames), | |
1467 | GBENU_STATS_P7(rx_multicast_frames), | |
1468 | GBENU_STATS_P7(rx_pause_frames), | |
1469 | GBENU_STATS_P7(rx_crc_errors), | |
1470 | GBENU_STATS_P7(rx_align_code_errors), | |
1471 | GBENU_STATS_P7(rx_oversized_frames), | |
1472 | GBENU_STATS_P7(rx_jabber_frames), | |
1473 | GBENU_STATS_P7(rx_undersized_frames), | |
1474 | GBENU_STATS_P7(rx_fragments), | |
1475 | GBENU_STATS_P7(ale_drop), | |
1476 | GBENU_STATS_P7(ale_overrun_drop), | |
1477 | GBENU_STATS_P7(rx_bytes), | |
1478 | GBENU_STATS_P7(tx_good_frames), | |
1479 | GBENU_STATS_P7(tx_broadcast_frames), | |
1480 | GBENU_STATS_P7(tx_multicast_frames), | |
1481 | GBENU_STATS_P7(tx_pause_frames), | |
1482 | GBENU_STATS_P7(tx_deferred_frames), | |
1483 | GBENU_STATS_P7(tx_collision_frames), | |
1484 | GBENU_STATS_P7(tx_single_coll_frames), | |
1485 | GBENU_STATS_P7(tx_mult_coll_frames), | |
1486 | GBENU_STATS_P7(tx_excessive_collisions), | |
1487 | GBENU_STATS_P7(tx_late_collisions), | |
1488 | GBENU_STATS_P7(rx_ipg_error), | |
1489 | GBENU_STATS_P7(tx_carrier_sense_errors), | |
1490 | GBENU_STATS_P7(tx_bytes), | |
1491 | GBENU_STATS_P7(tx_64B_frames), | |
1492 | GBENU_STATS_P7(tx_65_to_127B_frames), | |
1493 | GBENU_STATS_P7(tx_128_to_255B_frames), | |
1494 | GBENU_STATS_P7(tx_256_to_511B_frames), | |
1495 | GBENU_STATS_P7(tx_512_to_1023B_frames), | |
1496 | GBENU_STATS_P7(tx_1024B_frames), | |
1497 | GBENU_STATS_P7(net_bytes), | |
1498 | GBENU_STATS_P7(rx_bottom_fifo_drop), | |
1499 | GBENU_STATS_P7(rx_port_mask_drop), | |
1500 | GBENU_STATS_P7(rx_top_fifo_drop), | |
1501 | GBENU_STATS_P7(ale_rate_limit_drop), | |
1502 | GBENU_STATS_P7(ale_vid_ingress_drop), | |
1503 | GBENU_STATS_P7(ale_da_eq_sa_drop), | |
1504 | GBENU_STATS_P7(ale_unknown_ucast), | |
1505 | GBENU_STATS_P7(ale_unknown_ucast_bytes), | |
1506 | GBENU_STATS_P7(ale_unknown_mcast), | |
1507 | GBENU_STATS_P7(ale_unknown_mcast_bytes), | |
1508 | GBENU_STATS_P7(ale_unknown_bcast), | |
1509 | GBENU_STATS_P7(ale_unknown_bcast_bytes), | |
5be4001e WK |
1510 | GBENU_STATS_P7(ale_pol_match), |
1511 | GBENU_STATS_P7(ale_pol_match_red), | |
1512 | GBENU_STATS_P7(ale_pol_match_yellow), | |
9a391c7b | 1513 | GBENU_STATS_P7(tx_mem_protect_err), |
5be4001e WK |
1514 | GBENU_STATS_P7(tx_pri0_drop), |
1515 | GBENU_STATS_P7(tx_pri1_drop), | |
1516 | GBENU_STATS_P7(tx_pri2_drop), | |
1517 | GBENU_STATS_P7(tx_pri3_drop), | |
1518 | GBENU_STATS_P7(tx_pri4_drop), | |
1519 | GBENU_STATS_P7(tx_pri5_drop), | |
1520 | GBENU_STATS_P7(tx_pri6_drop), | |
1521 | GBENU_STATS_P7(tx_pri7_drop), | |
1522 | GBENU_STATS_P7(tx_pri0_drop_bcnt), | |
1523 | GBENU_STATS_P7(tx_pri1_drop_bcnt), | |
1524 | GBENU_STATS_P7(tx_pri2_drop_bcnt), | |
1525 | GBENU_STATS_P7(tx_pri3_drop_bcnt), | |
1526 | GBENU_STATS_P7(tx_pri4_drop_bcnt), | |
1527 | GBENU_STATS_P7(tx_pri5_drop_bcnt), | |
1528 | GBENU_STATS_P7(tx_pri6_drop_bcnt), | |
1529 | GBENU_STATS_P7(tx_pri7_drop_bcnt), | |
9a391c7b WK |
1530 | /* GBENU Module 8 */ |
1531 | GBENU_STATS_P8(rx_good_frames), | |
1532 | GBENU_STATS_P8(rx_broadcast_frames), | |
1533 | GBENU_STATS_P8(rx_multicast_frames), | |
1534 | GBENU_STATS_P8(rx_pause_frames), | |
1535 | GBENU_STATS_P8(rx_crc_errors), | |
1536 | GBENU_STATS_P8(rx_align_code_errors), | |
1537 | GBENU_STATS_P8(rx_oversized_frames), | |
1538 | GBENU_STATS_P8(rx_jabber_frames), | |
1539 | GBENU_STATS_P8(rx_undersized_frames), | |
1540 | GBENU_STATS_P8(rx_fragments), | |
1541 | GBENU_STATS_P8(ale_drop), | |
1542 | GBENU_STATS_P8(ale_overrun_drop), | |
1543 | GBENU_STATS_P8(rx_bytes), | |
1544 | GBENU_STATS_P8(tx_good_frames), | |
1545 | GBENU_STATS_P8(tx_broadcast_frames), | |
1546 | GBENU_STATS_P8(tx_multicast_frames), | |
1547 | GBENU_STATS_P8(tx_pause_frames), | |
1548 | GBENU_STATS_P8(tx_deferred_frames), | |
1549 | GBENU_STATS_P8(tx_collision_frames), | |
1550 | GBENU_STATS_P8(tx_single_coll_frames), | |
1551 | GBENU_STATS_P8(tx_mult_coll_frames), | |
1552 | GBENU_STATS_P8(tx_excessive_collisions), | |
1553 | GBENU_STATS_P8(tx_late_collisions), | |
1554 | GBENU_STATS_P8(rx_ipg_error), | |
1555 | GBENU_STATS_P8(tx_carrier_sense_errors), | |
1556 | GBENU_STATS_P8(tx_bytes), | |
1557 | GBENU_STATS_P8(tx_64B_frames), | |
1558 | GBENU_STATS_P8(tx_65_to_127B_frames), | |
1559 | GBENU_STATS_P8(tx_128_to_255B_frames), | |
1560 | GBENU_STATS_P8(tx_256_to_511B_frames), | |
1561 | GBENU_STATS_P8(tx_512_to_1023B_frames), | |
1562 | GBENU_STATS_P8(tx_1024B_frames), | |
1563 | GBENU_STATS_P8(net_bytes), | |
1564 | GBENU_STATS_P8(rx_bottom_fifo_drop), | |
1565 | GBENU_STATS_P8(rx_port_mask_drop), | |
1566 | GBENU_STATS_P8(rx_top_fifo_drop), | |
1567 | GBENU_STATS_P8(ale_rate_limit_drop), | |
1568 | GBENU_STATS_P8(ale_vid_ingress_drop), | |
1569 | GBENU_STATS_P8(ale_da_eq_sa_drop), | |
1570 | GBENU_STATS_P8(ale_unknown_ucast), | |
1571 | GBENU_STATS_P8(ale_unknown_ucast_bytes), | |
1572 | GBENU_STATS_P8(ale_unknown_mcast), | |
1573 | GBENU_STATS_P8(ale_unknown_mcast_bytes), | |
1574 | GBENU_STATS_P8(ale_unknown_bcast), | |
1575 | GBENU_STATS_P8(ale_unknown_bcast_bytes), | |
5be4001e WK |
1576 | GBENU_STATS_P8(ale_pol_match), |
1577 | GBENU_STATS_P8(ale_pol_match_red), | |
1578 | GBENU_STATS_P8(ale_pol_match_yellow), | |
9a391c7b | 1579 | GBENU_STATS_P8(tx_mem_protect_err), |
5be4001e WK |
1580 | GBENU_STATS_P8(tx_pri0_drop), |
1581 | GBENU_STATS_P8(tx_pri1_drop), | |
1582 | GBENU_STATS_P8(tx_pri2_drop), | |
1583 | GBENU_STATS_P8(tx_pri3_drop), | |
1584 | GBENU_STATS_P8(tx_pri4_drop), | |
1585 | GBENU_STATS_P8(tx_pri5_drop), | |
1586 | GBENU_STATS_P8(tx_pri6_drop), | |
1587 | GBENU_STATS_P8(tx_pri7_drop), | |
1588 | GBENU_STATS_P8(tx_pri0_drop_bcnt), | |
1589 | GBENU_STATS_P8(tx_pri1_drop_bcnt), | |
1590 | GBENU_STATS_P8(tx_pri2_drop_bcnt), | |
1591 | GBENU_STATS_P8(tx_pri3_drop_bcnt), | |
1592 | GBENU_STATS_P8(tx_pri4_drop_bcnt), | |
1593 | GBENU_STATS_P8(tx_pri5_drop_bcnt), | |
1594 | GBENU_STATS_P8(tx_pri6_drop_bcnt), | |
1595 | GBENU_STATS_P8(tx_pri7_drop_bcnt), | |
9a391c7b WK |
1596 | }; |
1597 | ||
da866ba0 KM |
1598 | #define XGBE_STATS0_INFO(field) \ |
1599 | { \ | |
1600 | "GBE_0:"#field, XGBE_STATS0_MODULE, \ | |
1601 | FIELD_SIZEOF(struct xgbe_hw_stats, field), \ | |
1602 | offsetof(struct xgbe_hw_stats, field) \ | |
1603 | } | |
1604 | ||
1605 | #define XGBE_STATS1_INFO(field) \ | |
1606 | { \ | |
1607 | "GBE_1:"#field, XGBE_STATS1_MODULE, \ | |
1608 | FIELD_SIZEOF(struct xgbe_hw_stats, field), \ | |
1609 | offsetof(struct xgbe_hw_stats, field) \ | |
1610 | } | |
1611 | ||
1612 | #define XGBE_STATS2_INFO(field) \ | |
1613 | { \ | |
1614 | "GBE_2:"#field, XGBE_STATS2_MODULE, \ | |
1615 | FIELD_SIZEOF(struct xgbe_hw_stats, field), \ | |
1616 | offsetof(struct xgbe_hw_stats, field) \ | |
1617 | } | |
90cff9e2 WK |
1618 | |
1619 | static const struct netcp_ethtool_stat xgbe10_et_stats[] = { | |
1620 | /* GBE module 0 */ | |
da866ba0 KM |
1621 | XGBE_STATS0_INFO(rx_good_frames), |
1622 | XGBE_STATS0_INFO(rx_broadcast_frames), | |
1623 | XGBE_STATS0_INFO(rx_multicast_frames), | |
1624 | XGBE_STATS0_INFO(rx_oversized_frames), | |
1625 | XGBE_STATS0_INFO(rx_undersized_frames), | |
1626 | XGBE_STATS0_INFO(overrun_type4), | |
1627 | XGBE_STATS0_INFO(overrun_type5), | |
1628 | XGBE_STATS0_INFO(rx_bytes), | |
1629 | XGBE_STATS0_INFO(tx_good_frames), | |
1630 | XGBE_STATS0_INFO(tx_broadcast_frames), | |
1631 | XGBE_STATS0_INFO(tx_multicast_frames), | |
1632 | XGBE_STATS0_INFO(tx_bytes), | |
1633 | XGBE_STATS0_INFO(tx_64byte_frames), | |
1634 | XGBE_STATS0_INFO(tx_65_to_127byte_frames), | |
1635 | XGBE_STATS0_INFO(tx_128_to_255byte_frames), | |
1636 | XGBE_STATS0_INFO(tx_256_to_511byte_frames), | |
1637 | XGBE_STATS0_INFO(tx_512_to_1023byte_frames), | |
1638 | XGBE_STATS0_INFO(tx_1024byte_frames), | |
1639 | XGBE_STATS0_INFO(net_bytes), | |
1640 | XGBE_STATS0_INFO(rx_sof_overruns), | |
1641 | XGBE_STATS0_INFO(rx_mof_overruns), | |
1642 | XGBE_STATS0_INFO(rx_dma_overruns), | |
90cff9e2 | 1643 | /* XGBE module 1 */ |
da866ba0 KM |
1644 | XGBE_STATS1_INFO(rx_good_frames), |
1645 | XGBE_STATS1_INFO(rx_broadcast_frames), | |
1646 | XGBE_STATS1_INFO(rx_multicast_frames), | |
1647 | XGBE_STATS1_INFO(rx_pause_frames), | |
1648 | XGBE_STATS1_INFO(rx_crc_errors), | |
1649 | XGBE_STATS1_INFO(rx_align_code_errors), | |
1650 | XGBE_STATS1_INFO(rx_oversized_frames), | |
1651 | XGBE_STATS1_INFO(rx_jabber_frames), | |
1652 | XGBE_STATS1_INFO(rx_undersized_frames), | |
1653 | XGBE_STATS1_INFO(rx_fragments), | |
1654 | XGBE_STATS1_INFO(overrun_type4), | |
1655 | XGBE_STATS1_INFO(overrun_type5), | |
1656 | XGBE_STATS1_INFO(rx_bytes), | |
1657 | XGBE_STATS1_INFO(tx_good_frames), | |
1658 | XGBE_STATS1_INFO(tx_broadcast_frames), | |
1659 | XGBE_STATS1_INFO(tx_multicast_frames), | |
1660 | XGBE_STATS1_INFO(tx_pause_frames), | |
1661 | XGBE_STATS1_INFO(tx_deferred_frames), | |
1662 | XGBE_STATS1_INFO(tx_collision_frames), | |
1663 | XGBE_STATS1_INFO(tx_single_coll_frames), | |
1664 | XGBE_STATS1_INFO(tx_mult_coll_frames), | |
1665 | XGBE_STATS1_INFO(tx_excessive_collisions), | |
1666 | XGBE_STATS1_INFO(tx_late_collisions), | |
1667 | XGBE_STATS1_INFO(tx_underrun), | |
1668 | XGBE_STATS1_INFO(tx_carrier_sense_errors), | |
1669 | XGBE_STATS1_INFO(tx_bytes), | |
1670 | XGBE_STATS1_INFO(tx_64byte_frames), | |
1671 | XGBE_STATS1_INFO(tx_65_to_127byte_frames), | |
1672 | XGBE_STATS1_INFO(tx_128_to_255byte_frames), | |
1673 | XGBE_STATS1_INFO(tx_256_to_511byte_frames), | |
1674 | XGBE_STATS1_INFO(tx_512_to_1023byte_frames), | |
1675 | XGBE_STATS1_INFO(tx_1024byte_frames), | |
1676 | XGBE_STATS1_INFO(net_bytes), | |
1677 | XGBE_STATS1_INFO(rx_sof_overruns), | |
1678 | XGBE_STATS1_INFO(rx_mof_overruns), | |
1679 | XGBE_STATS1_INFO(rx_dma_overruns), | |
90cff9e2 | 1680 | /* XGBE module 2 */ |
da866ba0 KM |
1681 | XGBE_STATS2_INFO(rx_good_frames), |
1682 | XGBE_STATS2_INFO(rx_broadcast_frames), | |
1683 | XGBE_STATS2_INFO(rx_multicast_frames), | |
1684 | XGBE_STATS2_INFO(rx_pause_frames), | |
1685 | XGBE_STATS2_INFO(rx_crc_errors), | |
1686 | XGBE_STATS2_INFO(rx_align_code_errors), | |
1687 | XGBE_STATS2_INFO(rx_oversized_frames), | |
1688 | XGBE_STATS2_INFO(rx_jabber_frames), | |
1689 | XGBE_STATS2_INFO(rx_undersized_frames), | |
1690 | XGBE_STATS2_INFO(rx_fragments), | |
1691 | XGBE_STATS2_INFO(overrun_type4), | |
1692 | XGBE_STATS2_INFO(overrun_type5), | |
1693 | XGBE_STATS2_INFO(rx_bytes), | |
1694 | XGBE_STATS2_INFO(tx_good_frames), | |
1695 | XGBE_STATS2_INFO(tx_broadcast_frames), | |
1696 | XGBE_STATS2_INFO(tx_multicast_frames), | |
1697 | XGBE_STATS2_INFO(tx_pause_frames), | |
1698 | XGBE_STATS2_INFO(tx_deferred_frames), | |
1699 | XGBE_STATS2_INFO(tx_collision_frames), | |
1700 | XGBE_STATS2_INFO(tx_single_coll_frames), | |
1701 | XGBE_STATS2_INFO(tx_mult_coll_frames), | |
1702 | XGBE_STATS2_INFO(tx_excessive_collisions), | |
1703 | XGBE_STATS2_INFO(tx_late_collisions), | |
1704 | XGBE_STATS2_INFO(tx_underrun), | |
1705 | XGBE_STATS2_INFO(tx_carrier_sense_errors), | |
1706 | XGBE_STATS2_INFO(tx_bytes), | |
1707 | XGBE_STATS2_INFO(tx_64byte_frames), | |
1708 | XGBE_STATS2_INFO(tx_65_to_127byte_frames), | |
1709 | XGBE_STATS2_INFO(tx_128_to_255byte_frames), | |
1710 | XGBE_STATS2_INFO(tx_256_to_511byte_frames), | |
1711 | XGBE_STATS2_INFO(tx_512_to_1023byte_frames), | |
1712 | XGBE_STATS2_INFO(tx_1024byte_frames), | |
1713 | XGBE_STATS2_INFO(net_bytes), | |
1714 | XGBE_STATS2_INFO(rx_sof_overruns), | |
1715 | XGBE_STATS2_INFO(rx_mof_overruns), | |
1716 | XGBE_STATS2_INFO(rx_dma_overruns), | |
90cff9e2 WK |
1717 | }; |
1718 | ||
6f8d3f33 WK |
1719 | #define for_each_intf(i, priv) \ |
1720 | list_for_each_entry((i), &(priv)->gbe_intf_head, gbe_intf_list) | |
1721 | ||
1722 | #define for_each_sec_slave(slave, priv) \ | |
1723 | list_for_each_entry((slave), &(priv)->secondary_slaves, slave_list) | |
1724 | ||
1725 | #define first_sec_slave(priv) \ | |
1726 | list_first_entry(&priv->secondary_slaves, \ | |
1727 | struct gbe_slave, slave_list) | |
1728 | ||
1729 | static void keystone_get_drvinfo(struct net_device *ndev, | |
1730 | struct ethtool_drvinfo *info) | |
1731 | { | |
1732 | strncpy(info->driver, NETCP_DRIVER_NAME, sizeof(info->driver)); | |
1733 | strncpy(info->version, NETCP_DRIVER_VERSION, sizeof(info->version)); | |
1734 | } | |
1735 | ||
1736 | static u32 keystone_get_msglevel(struct net_device *ndev) | |
1737 | { | |
1738 | struct netcp_intf *netcp = netdev_priv(ndev); | |
1739 | ||
1740 | return netcp->msg_enable; | |
1741 | } | |
1742 | ||
1743 | static void keystone_set_msglevel(struct net_device *ndev, u32 value) | |
1744 | { | |
1745 | struct netcp_intf *netcp = netdev_priv(ndev); | |
1746 | ||
1747 | netcp->msg_enable = value; | |
1748 | } | |
1749 | ||
e9838ef2 WK |
1750 | static struct gbe_intf *keystone_get_intf_data(struct netcp_intf *netcp) |
1751 | { | |
1752 | struct gbe_intf *gbe_intf; | |
1753 | ||
1754 | gbe_intf = netcp_module_get_intf_data(&gbe_module, netcp); | |
1755 | if (!gbe_intf) | |
1756 | gbe_intf = netcp_module_get_intf_data(&xgbe_module, netcp); | |
1757 | ||
1758 | return gbe_intf; | |
1759 | } | |
1760 | ||
6f8d3f33 WK |
1761 | static void keystone_get_stat_strings(struct net_device *ndev, |
1762 | uint32_t stringset, uint8_t *data) | |
1763 | { | |
1764 | struct netcp_intf *netcp = netdev_priv(ndev); | |
1765 | struct gbe_intf *gbe_intf; | |
1766 | struct gbe_priv *gbe_dev; | |
1767 | int i; | |
1768 | ||
e9838ef2 | 1769 | gbe_intf = keystone_get_intf_data(netcp); |
6f8d3f33 WK |
1770 | if (!gbe_intf) |
1771 | return; | |
1772 | gbe_dev = gbe_intf->gbe_dev; | |
1773 | ||
1774 | switch (stringset) { | |
1775 | case ETH_SS_STATS: | |
1776 | for (i = 0; i < gbe_dev->num_et_stats; i++) { | |
1777 | memcpy(data, gbe_dev->et_stats[i].desc, | |
1778 | ETH_GSTRING_LEN); | |
1779 | data += ETH_GSTRING_LEN; | |
1780 | } | |
1781 | break; | |
1782 | case ETH_SS_TEST: | |
1783 | break; | |
1784 | } | |
1785 | } | |
1786 | ||
1787 | static int keystone_get_sset_count(struct net_device *ndev, int stringset) | |
1788 | { | |
1789 | struct netcp_intf *netcp = netdev_priv(ndev); | |
1790 | struct gbe_intf *gbe_intf; | |
1791 | struct gbe_priv *gbe_dev; | |
1792 | ||
e9838ef2 | 1793 | gbe_intf = keystone_get_intf_data(netcp); |
6f8d3f33 WK |
1794 | if (!gbe_intf) |
1795 | return -EINVAL; | |
1796 | gbe_dev = gbe_intf->gbe_dev; | |
1797 | ||
1798 | switch (stringset) { | |
1799 | case ETH_SS_TEST: | |
1800 | return 0; | |
1801 | case ETH_SS_STATS: | |
1802 | return gbe_dev->num_et_stats; | |
1803 | default: | |
1804 | return -EINVAL; | |
1805 | } | |
1806 | } | |
1807 | ||
489e8a2f WK |
1808 | static void gbe_reset_mod_stats(struct gbe_priv *gbe_dev, int stats_mod) |
1809 | { | |
1810 | void __iomem *base = gbe_dev->hw_stats_regs[stats_mod]; | |
1811 | u32 __iomem *p_stats_entry; | |
1812 | int i; | |
1813 | ||
1814 | for (i = 0; i < gbe_dev->num_et_stats; i++) { | |
1815 | if (gbe_dev->et_stats[i].type == stats_mod) { | |
1816 | p_stats_entry = base + gbe_dev->et_stats[i].offset; | |
1817 | gbe_dev->hw_stats[i] = 0; | |
1818 | gbe_dev->hw_stats_prev[i] = readl(p_stats_entry); | |
1819 | } | |
1820 | } | |
1821 | } | |
1822 | ||
fbf64c19 WK |
1823 | static inline void gbe_update_hw_stats_entry(struct gbe_priv *gbe_dev, |
1824 | int et_stats_entry) | |
6f8d3f33 WK |
1825 | { |
1826 | void __iomem *base = NULL; | |
489e8a2f WK |
1827 | u32 __iomem *p_stats_entry; |
1828 | u32 curr, delta; | |
fbf64c19 WK |
1829 | |
1830 | /* The hw_stats_regs pointers are already | |
1831 | * properly set to point to the right base: | |
1832 | */ | |
1833 | base = gbe_dev->hw_stats_regs[gbe_dev->et_stats[et_stats_entry].type]; | |
489e8a2f WK |
1834 | p_stats_entry = base + gbe_dev->et_stats[et_stats_entry].offset; |
1835 | curr = readl(p_stats_entry); | |
1836 | delta = curr - gbe_dev->hw_stats_prev[et_stats_entry]; | |
1837 | gbe_dev->hw_stats_prev[et_stats_entry] = curr; | |
1838 | gbe_dev->hw_stats[et_stats_entry] += delta; | |
fbf64c19 WK |
1839 | } |
1840 | ||
1841 | static void gbe_update_stats(struct gbe_priv *gbe_dev, uint64_t *data) | |
1842 | { | |
6f8d3f33 WK |
1843 | int i; |
1844 | ||
1845 | for (i = 0; i < gbe_dev->num_et_stats; i++) { | |
fbf64c19 WK |
1846 | gbe_update_hw_stats_entry(gbe_dev, i); |
1847 | ||
6f8d3f33 WK |
1848 | if (data) |
1849 | data[i] = gbe_dev->hw_stats[i]; | |
6f8d3f33 WK |
1850 | } |
1851 | } | |
1852 | ||
fbf64c19 WK |
1853 | static inline void gbe_stats_mod_visible_ver14(struct gbe_priv *gbe_dev, |
1854 | int stats_mod) | |
1855 | { | |
1856 | u32 val; | |
1857 | ||
1858 | val = readl(GBE_REG_ADDR(gbe_dev, switch_regs, stat_port_en)); | |
1859 | ||
1860 | switch (stats_mod) { | |
1861 | case GBE_STATSA_MODULE: | |
1862 | case GBE_STATSB_MODULE: | |
1863 | val &= ~GBE_STATS_CD_SEL; | |
1864 | break; | |
1865 | case GBE_STATSC_MODULE: | |
1866 | case GBE_STATSD_MODULE: | |
1867 | val |= GBE_STATS_CD_SEL; | |
1868 | break; | |
1869 | default: | |
1870 | return; | |
1871 | } | |
1872 | ||
1873 | /* make the stat module visible */ | |
1874 | writel(val, GBE_REG_ADDR(gbe_dev, switch_regs, stat_port_en)); | |
1875 | } | |
1876 | ||
489e8a2f WK |
1877 | static void gbe_reset_mod_stats_ver14(struct gbe_priv *gbe_dev, int stats_mod) |
1878 | { | |
1879 | gbe_stats_mod_visible_ver14(gbe_dev, stats_mod); | |
1880 | gbe_reset_mod_stats(gbe_dev, stats_mod); | |
1881 | } | |
1882 | ||
6f8d3f33 WK |
1883 | static void gbe_update_stats_ver14(struct gbe_priv *gbe_dev, uint64_t *data) |
1884 | { | |
fbf64c19 WK |
1885 | u32 half_num_et_stats = (gbe_dev->num_et_stats / 2); |
1886 | int et_entry, j, pair; | |
6f8d3f33 WK |
1887 | |
1888 | for (pair = 0; pair < 2; pair++) { | |
fbf64c19 WK |
1889 | gbe_stats_mod_visible_ver14(gbe_dev, (pair ? |
1890 | GBE_STATSC_MODULE : | |
1891 | GBE_STATSA_MODULE)); | |
1892 | ||
1893 | for (j = 0; j < half_num_et_stats; j++) { | |
1894 | et_entry = pair * half_num_et_stats + j; | |
1895 | gbe_update_hw_stats_entry(gbe_dev, et_entry); | |
1896 | ||
6f8d3f33 | 1897 | if (data) |
fbf64c19 | 1898 | data[et_entry] = gbe_dev->hw_stats[et_entry]; |
6f8d3f33 WK |
1899 | } |
1900 | } | |
1901 | } | |
1902 | ||
1903 | static void keystone_get_ethtool_stats(struct net_device *ndev, | |
1904 | struct ethtool_stats *stats, | |
1905 | uint64_t *data) | |
1906 | { | |
1907 | struct netcp_intf *netcp = netdev_priv(ndev); | |
1908 | struct gbe_intf *gbe_intf; | |
1909 | struct gbe_priv *gbe_dev; | |
1910 | ||
e9838ef2 | 1911 | gbe_intf = keystone_get_intf_data(netcp); |
6f8d3f33 WK |
1912 | if (!gbe_intf) |
1913 | return; | |
1914 | ||
1915 | gbe_dev = gbe_intf->gbe_dev; | |
1916 | spin_lock_bh(&gbe_dev->hw_stats_lock); | |
90cff9e2 WK |
1917 | if (gbe_dev->ss_version == GBE_SS_VERSION_14) |
1918 | gbe_update_stats_ver14(gbe_dev, data); | |
1919 | else | |
1920 | gbe_update_stats(gbe_dev, data); | |
6f8d3f33 WK |
1921 | spin_unlock_bh(&gbe_dev->hw_stats_lock); |
1922 | } | |
1923 | ||
86e3a040 PR |
1924 | static int keystone_get_link_ksettings(struct net_device *ndev, |
1925 | struct ethtool_link_ksettings *cmd) | |
6f8d3f33 WK |
1926 | { |
1927 | struct netcp_intf *netcp = netdev_priv(ndev); | |
1928 | struct phy_device *phy = ndev->phydev; | |
1929 | struct gbe_intf *gbe_intf; | |
1930 | int ret; | |
1931 | ||
1932 | if (!phy) | |
1933 | return -EINVAL; | |
1934 | ||
e9838ef2 | 1935 | gbe_intf = keystone_get_intf_data(netcp); |
6f8d3f33 WK |
1936 | if (!gbe_intf) |
1937 | return -EINVAL; | |
1938 | ||
1939 | if (!gbe_intf->slave) | |
1940 | return -EINVAL; | |
1941 | ||
86e3a040 | 1942 | ret = phy_ethtool_ksettings_get(phy, cmd); |
6f8d3f33 | 1943 | if (!ret) |
86e3a040 | 1944 | cmd->base.port = gbe_intf->slave->phy_port_t; |
6f8d3f33 WK |
1945 | |
1946 | return ret; | |
1947 | } | |
1948 | ||
86e3a040 PR |
1949 | static int keystone_set_link_ksettings(struct net_device *ndev, |
1950 | const struct ethtool_link_ksettings *cmd) | |
6f8d3f33 WK |
1951 | { |
1952 | struct netcp_intf *netcp = netdev_priv(ndev); | |
1953 | struct phy_device *phy = ndev->phydev; | |
1954 | struct gbe_intf *gbe_intf; | |
86e3a040 PR |
1955 | u8 port = cmd->base.port; |
1956 | u32 advertising, supported; | |
1957 | u32 features; | |
1958 | ||
1959 | ethtool_convert_link_mode_to_legacy_u32(&advertising, | |
1960 | cmd->link_modes.advertising); | |
1961 | ethtool_convert_link_mode_to_legacy_u32(&supported, | |
1962 | cmd->link_modes.supported); | |
1963 | features = advertising & supported; | |
6f8d3f33 WK |
1964 | |
1965 | if (!phy) | |
1966 | return -EINVAL; | |
1967 | ||
e9838ef2 | 1968 | gbe_intf = keystone_get_intf_data(netcp); |
6f8d3f33 WK |
1969 | if (!gbe_intf) |
1970 | return -EINVAL; | |
1971 | ||
1972 | if (!gbe_intf->slave) | |
1973 | return -EINVAL; | |
1974 | ||
86e3a040 PR |
1975 | if (port != gbe_intf->slave->phy_port_t) { |
1976 | if ((port == PORT_TP) && !(features & ADVERTISED_TP)) | |
6f8d3f33 WK |
1977 | return -EINVAL; |
1978 | ||
86e3a040 | 1979 | if ((port == PORT_AUI) && !(features & ADVERTISED_AUI)) |
6f8d3f33 WK |
1980 | return -EINVAL; |
1981 | ||
86e3a040 | 1982 | if ((port == PORT_BNC) && !(features & ADVERTISED_BNC)) |
6f8d3f33 WK |
1983 | return -EINVAL; |
1984 | ||
86e3a040 | 1985 | if ((port == PORT_MII) && !(features & ADVERTISED_MII)) |
6f8d3f33 WK |
1986 | return -EINVAL; |
1987 | ||
86e3a040 | 1988 | if ((port == PORT_FIBRE) && !(features & ADVERTISED_FIBRE)) |
6f8d3f33 WK |
1989 | return -EINVAL; |
1990 | } | |
1991 | ||
86e3a040 PR |
1992 | gbe_intf->slave->phy_port_t = port; |
1993 | return phy_ethtool_ksettings_set(phy, cmd); | |
6f8d3f33 WK |
1994 | } |
1995 | ||
6246168b WK |
1996 | #if IS_ENABLED(CONFIG_TI_CPTS) |
1997 | static int keystone_get_ts_info(struct net_device *ndev, | |
1998 | struct ethtool_ts_info *info) | |
1999 | { | |
2000 | struct netcp_intf *netcp = netdev_priv(ndev); | |
2001 | struct gbe_intf *gbe_intf; | |
2002 | ||
2003 | gbe_intf = netcp_module_get_intf_data(&gbe_module, netcp); | |
2004 | if (!gbe_intf || !gbe_intf->gbe_dev->cpts) | |
2005 | return -EINVAL; | |
2006 | ||
2007 | info->so_timestamping = | |
2008 | SOF_TIMESTAMPING_TX_HARDWARE | | |
2009 | SOF_TIMESTAMPING_TX_SOFTWARE | | |
2010 | SOF_TIMESTAMPING_RX_HARDWARE | | |
2011 | SOF_TIMESTAMPING_RX_SOFTWARE | | |
2012 | SOF_TIMESTAMPING_SOFTWARE | | |
2013 | SOF_TIMESTAMPING_RAW_HARDWARE; | |
2014 | info->phc_index = gbe_intf->gbe_dev->cpts->phc_index; | |
2015 | info->tx_types = | |
2016 | (1 << HWTSTAMP_TX_OFF) | | |
2017 | (1 << HWTSTAMP_TX_ON); | |
2018 | info->rx_filters = | |
2019 | (1 << HWTSTAMP_FILTER_NONE) | | |
2020 | (1 << HWTSTAMP_FILTER_PTP_V1_L4_EVENT) | | |
2021 | (1 << HWTSTAMP_FILTER_PTP_V2_EVENT); | |
2022 | return 0; | |
2023 | } | |
2024 | #else | |
2025 | static int keystone_get_ts_info(struct net_device *ndev, | |
2026 | struct ethtool_ts_info *info) | |
2027 | { | |
2028 | info->so_timestamping = | |
2029 | SOF_TIMESTAMPING_TX_SOFTWARE | | |
2030 | SOF_TIMESTAMPING_RX_SOFTWARE | | |
2031 | SOF_TIMESTAMPING_SOFTWARE; | |
2032 | info->phc_index = -1; | |
2033 | info->tx_types = 0; | |
2034 | info->rx_filters = 0; | |
2035 | return 0; | |
2036 | } | |
2037 | #endif /* CONFIG_TI_CPTS */ | |
2038 | ||
6f8d3f33 WK |
2039 | static const struct ethtool_ops keystone_ethtool_ops = { |
2040 | .get_drvinfo = keystone_get_drvinfo, | |
2041 | .get_link = ethtool_op_get_link, | |
2042 | .get_msglevel = keystone_get_msglevel, | |
2043 | .set_msglevel = keystone_set_msglevel, | |
2044 | .get_strings = keystone_get_stat_strings, | |
2045 | .get_sset_count = keystone_get_sset_count, | |
2046 | .get_ethtool_stats = keystone_get_ethtool_stats, | |
86e3a040 PR |
2047 | .get_link_ksettings = keystone_get_link_ksettings, |
2048 | .set_link_ksettings = keystone_set_link_ksettings, | |
6246168b | 2049 | .get_ts_info = keystone_get_ts_info, |
6f8d3f33 WK |
2050 | }; |
2051 | ||
2052 | #define mac_hi(mac) (((mac)[0] << 0) | ((mac)[1] << 8) | \ | |
2053 | ((mac)[2] << 16) | ((mac)[3] << 24)) | |
2054 | #define mac_lo(mac) (((mac)[4] << 0) | ((mac)[5] << 8)) | |
2055 | ||
2056 | static void gbe_set_slave_mac(struct gbe_slave *slave, | |
2057 | struct gbe_intf *gbe_intf) | |
2058 | { | |
2059 | struct net_device *ndev = gbe_intf->ndev; | |
2060 | ||
2061 | writel(mac_hi(ndev->dev_addr), GBE_REG_ADDR(slave, port_regs, sa_hi)); | |
2062 | writel(mac_lo(ndev->dev_addr), GBE_REG_ADDR(slave, port_regs, sa_lo)); | |
2063 | } | |
2064 | ||
2065 | static int gbe_get_slave_port(struct gbe_priv *priv, u32 slave_num) | |
2066 | { | |
2067 | if (priv->host_port == 0) | |
2068 | return slave_num + 1; | |
2069 | ||
2070 | return slave_num; | |
2071 | } | |
2072 | ||
2073 | static void netcp_ethss_link_state_action(struct gbe_priv *gbe_dev, | |
2074 | struct net_device *ndev, | |
2075 | struct gbe_slave *slave, | |
2076 | int up) | |
2077 | { | |
2078 | struct phy_device *phy = slave->phy; | |
2079 | u32 mac_control = 0; | |
2080 | ||
2081 | if (up) { | |
2082 | mac_control = slave->mac_control; | |
90cff9e2 | 2083 | if (phy && (phy->speed == SPEED_1000)) { |
6f8d3f33 | 2084 | mac_control |= MACSL_GIG_MODE; |
90cff9e2 WK |
2085 | mac_control &= ~MACSL_XGIG_MODE; |
2086 | } else if (phy && (phy->speed == SPEED_10000)) { | |
2087 | mac_control |= MACSL_XGIG_MODE; | |
2088 | mac_control &= ~MACSL_GIG_MODE; | |
2089 | } | |
6f8d3f33 WK |
2090 | |
2091 | writel(mac_control, GBE_REG_ADDR(slave, emac_regs, | |
2092 | mac_control)); | |
2093 | ||
2094 | cpsw_ale_control_set(gbe_dev->ale, slave->port_num, | |
2095 | ALE_PORT_STATE, | |
2096 | ALE_PORT_STATE_FORWARD); | |
2097 | ||
8e046d68 KM |
2098 | if (ndev && slave->open && |
2099 | slave->link_interface != SGMII_LINK_MAC_PHY && | |
2100 | slave->link_interface != XGMII_LINK_MAC_PHY) | |
6f8d3f33 WK |
2101 | netif_carrier_on(ndev); |
2102 | } else { | |
2103 | writel(mac_control, GBE_REG_ADDR(slave, emac_regs, | |
2104 | mac_control)); | |
2105 | cpsw_ale_control_set(gbe_dev->ale, slave->port_num, | |
2106 | ALE_PORT_STATE, | |
2107 | ALE_PORT_STATE_DISABLE); | |
8e046d68 KM |
2108 | if (ndev && |
2109 | slave->link_interface != SGMII_LINK_MAC_PHY && | |
2110 | slave->link_interface != XGMII_LINK_MAC_PHY) | |
6f8d3f33 WK |
2111 | netif_carrier_off(ndev); |
2112 | } | |
2113 | ||
2114 | if (phy) | |
2115 | phy_print_status(phy); | |
2116 | } | |
2117 | ||
2118 | static bool gbe_phy_link_status(struct gbe_slave *slave) | |
2119 | { | |
2120 | return !slave->phy || slave->phy->link; | |
2121 | } | |
2122 | ||
2123 | static void netcp_ethss_update_link_state(struct gbe_priv *gbe_dev, | |
2124 | struct gbe_slave *slave, | |
2125 | struct net_device *ndev) | |
2126 | { | |
2127 | int sp = slave->slave_num; | |
2128 | int phy_link_state, sgmii_link_state = 1, link_state; | |
2129 | ||
2130 | if (!slave->open) | |
2131 | return; | |
2132 | ||
9a391c7b | 2133 | if (!SLAVE_LINK_IS_XGMII(slave)) { |
8c85151d WK |
2134 | sgmii_link_state = |
2135 | netcp_sgmii_get_port_link(SGMII_BASE(gbe_dev, sp), sp); | |
9a391c7b WK |
2136 | } |
2137 | ||
6f8d3f33 WK |
2138 | phy_link_state = gbe_phy_link_status(slave); |
2139 | link_state = phy_link_state & sgmii_link_state; | |
2140 | ||
2141 | if (atomic_xchg(&slave->link_state, link_state) != link_state) | |
2142 | netcp_ethss_link_state_action(gbe_dev, ndev, slave, | |
2143 | link_state); | |
2144 | } | |
2145 | ||
90cff9e2 WK |
2146 | static void xgbe_adjust_link(struct net_device *ndev) |
2147 | { | |
2148 | struct netcp_intf *netcp = netdev_priv(ndev); | |
2149 | struct gbe_intf *gbe_intf; | |
2150 | ||
2151 | gbe_intf = netcp_module_get_intf_data(&xgbe_module, netcp); | |
2152 | if (!gbe_intf) | |
2153 | return; | |
2154 | ||
2155 | netcp_ethss_update_link_state(gbe_intf->gbe_dev, gbe_intf->slave, | |
2156 | ndev); | |
2157 | } | |
2158 | ||
6f8d3f33 WK |
2159 | static void gbe_adjust_link(struct net_device *ndev) |
2160 | { | |
2161 | struct netcp_intf *netcp = netdev_priv(ndev); | |
2162 | struct gbe_intf *gbe_intf; | |
2163 | ||
2164 | gbe_intf = netcp_module_get_intf_data(&gbe_module, netcp); | |
2165 | if (!gbe_intf) | |
2166 | return; | |
2167 | ||
2168 | netcp_ethss_update_link_state(gbe_intf->gbe_dev, gbe_intf->slave, | |
2169 | ndev); | |
2170 | } | |
2171 | ||
2172 | static void gbe_adjust_link_sec_slaves(struct net_device *ndev) | |
2173 | { | |
2174 | struct gbe_priv *gbe_dev = netdev_priv(ndev); | |
2175 | struct gbe_slave *slave; | |
2176 | ||
2177 | for_each_sec_slave(slave, gbe_dev) | |
2178 | netcp_ethss_update_link_state(gbe_dev, slave, NULL); | |
2179 | } | |
2180 | ||
2181 | /* Reset EMAC | |
2182 | * Soft reset is set and polled until clear, or until a timeout occurs | |
2183 | */ | |
2184 | static int gbe_port_reset(struct gbe_slave *slave) | |
2185 | { | |
2186 | u32 i, v; | |
2187 | ||
2188 | /* Set the soft reset bit */ | |
2189 | writel(SOFT_RESET, GBE_REG_ADDR(slave, emac_regs, soft_reset)); | |
2190 | ||
2191 | /* Wait for the bit to clear */ | |
2192 | for (i = 0; i < DEVICE_EMACSL_RESET_POLL_COUNT; i++) { | |
2193 | v = readl(GBE_REG_ADDR(slave, emac_regs, soft_reset)); | |
2194 | if ((v & SOFT_RESET_MASK) != SOFT_RESET) | |
2195 | return 0; | |
2196 | } | |
2197 | ||
2198 | /* Timeout on the reset */ | |
2199 | return GMACSL_RET_WARN_RESET_INCOMPLETE; | |
2200 | } | |
2201 | ||
2202 | /* Configure EMAC */ | |
2203 | static void gbe_port_config(struct gbe_priv *gbe_dev, struct gbe_slave *slave, | |
2204 | int max_rx_len) | |
2205 | { | |
9a391c7b | 2206 | void __iomem *rx_maxlen_reg; |
90cff9e2 WK |
2207 | u32 xgmii_mode; |
2208 | ||
6f8d3f33 WK |
2209 | if (max_rx_len > NETCP_MAX_FRAME_SIZE) |
2210 | max_rx_len = NETCP_MAX_FRAME_SIZE; | |
2211 | ||
90cff9e2 WK |
2212 | /* Enable correct MII mode at SS level */ |
2213 | if ((gbe_dev->ss_version == XGBE_SS_VERSION_10) && | |
2214 | (slave->link_interface >= XGMII_LINK_MAC_PHY)) { | |
2215 | xgmii_mode = readl(GBE_REG_ADDR(gbe_dev, ss_regs, control)); | |
2216 | xgmii_mode |= (1 << slave->slave_num); | |
2217 | writel(xgmii_mode, GBE_REG_ADDR(gbe_dev, ss_regs, control)); | |
2218 | } | |
2219 | ||
9a391c7b WK |
2220 | if (IS_SS_ID_MU(gbe_dev)) |
2221 | rx_maxlen_reg = GBE_REG_ADDR(slave, port_regs, rx_maxlen); | |
2222 | else | |
2223 | rx_maxlen_reg = GBE_REG_ADDR(slave, emac_regs, rx_maxlen); | |
2224 | ||
2225 | writel(max_rx_len, rx_maxlen_reg); | |
6f8d3f33 WK |
2226 | writel(slave->mac_control, GBE_REG_ADDR(slave, emac_regs, mac_control)); |
2227 | } | |
2228 | ||
7025e88a WK |
2229 | static void gbe_sgmii_rtreset(struct gbe_priv *priv, |
2230 | struct gbe_slave *slave, bool set) | |
2231 | { | |
7025e88a WK |
2232 | if (SLAVE_LINK_IS_XGMII(slave)) |
2233 | return; | |
2234 | ||
8c85151d WK |
2235 | netcp_sgmii_rtreset(SGMII_BASE(priv, slave->slave_num), |
2236 | slave->slave_num, set); | |
7025e88a WK |
2237 | } |
2238 | ||
6f8d3f33 WK |
2239 | static void gbe_slave_stop(struct gbe_intf *intf) |
2240 | { | |
2241 | struct gbe_priv *gbe_dev = intf->gbe_dev; | |
2242 | struct gbe_slave *slave = intf->slave; | |
2243 | ||
7025e88a | 2244 | gbe_sgmii_rtreset(gbe_dev, slave, true); |
6f8d3f33 WK |
2245 | gbe_port_reset(slave); |
2246 | /* Disable forwarding */ | |
2247 | cpsw_ale_control_set(gbe_dev->ale, slave->port_num, | |
2248 | ALE_PORT_STATE, ALE_PORT_STATE_DISABLE); | |
2249 | cpsw_ale_del_mcast(gbe_dev->ale, intf->ndev->broadcast, | |
2250 | 1 << slave->port_num, 0, 0); | |
2251 | ||
2252 | if (!slave->phy) | |
2253 | return; | |
2254 | ||
2255 | phy_stop(slave->phy); | |
2256 | phy_disconnect(slave->phy); | |
2257 | slave->phy = NULL; | |
2258 | } | |
2259 | ||
2260 | static void gbe_sgmii_config(struct gbe_priv *priv, struct gbe_slave *slave) | |
2261 | { | |
8c85151d WK |
2262 | if (SLAVE_LINK_IS_XGMII(slave)) |
2263 | return; | |
6f8d3f33 | 2264 | |
8c85151d WK |
2265 | netcp_sgmii_reset(SGMII_BASE(priv, slave->slave_num), slave->slave_num); |
2266 | netcp_sgmii_config(SGMII_BASE(priv, slave->slave_num), slave->slave_num, | |
2267 | slave->link_interface); | |
6f8d3f33 WK |
2268 | } |
2269 | ||
2270 | static int gbe_slave_open(struct gbe_intf *gbe_intf) | |
2271 | { | |
2272 | struct gbe_priv *priv = gbe_intf->gbe_dev; | |
2273 | struct gbe_slave *slave = gbe_intf->slave; | |
2274 | phy_interface_t phy_mode; | |
2275 | bool has_phy = false; | |
2276 | ||
2277 | void (*hndlr)(struct net_device *) = gbe_adjust_link; | |
2278 | ||
2279 | gbe_sgmii_config(priv, slave); | |
2280 | gbe_port_reset(slave); | |
7025e88a | 2281 | gbe_sgmii_rtreset(priv, slave, false); |
6f8d3f33 WK |
2282 | gbe_port_config(priv, slave, priv->rx_packet_max); |
2283 | gbe_set_slave_mac(slave, gbe_intf); | |
2284 | /* enable forwarding */ | |
2285 | cpsw_ale_control_set(priv->ale, slave->port_num, | |
2286 | ALE_PORT_STATE, ALE_PORT_STATE_FORWARD); | |
2287 | cpsw_ale_add_mcast(priv->ale, gbe_intf->ndev->broadcast, | |
2288 | 1 << slave->port_num, 0, 0, ALE_MCAST_FWD_2); | |
2289 | ||
2290 | if (slave->link_interface == SGMII_LINK_MAC_PHY) { | |
2291 | has_phy = true; | |
2292 | phy_mode = PHY_INTERFACE_MODE_SGMII; | |
2293 | slave->phy_port_t = PORT_MII; | |
2294 | } else if (slave->link_interface == XGMII_LINK_MAC_PHY) { | |
2295 | has_phy = true; | |
2296 | phy_mode = PHY_INTERFACE_MODE_NA; | |
2297 | slave->phy_port_t = PORT_FIBRE; | |
2298 | } | |
2299 | ||
2300 | if (has_phy) { | |
90cff9e2 WK |
2301 | if (priv->ss_version == XGBE_SS_VERSION_10) |
2302 | hndlr = xgbe_adjust_link; | |
2303 | ||
6f8d3f33 WK |
2304 | slave->phy = of_phy_connect(gbe_intf->ndev, |
2305 | slave->phy_node, | |
2306 | hndlr, 0, | |
2307 | phy_mode); | |
2308 | if (!slave->phy) { | |
2309 | dev_err(priv->dev, "phy not found on slave %d\n", | |
2310 | slave->slave_num); | |
2311 | return -ENODEV; | |
2312 | } | |
2313 | dev_dbg(priv->dev, "phy found: id is: 0x%s\n", | |
84eff6d1 | 2314 | phydev_name(slave->phy)); |
6f8d3f33 WK |
2315 | phy_start(slave->phy); |
2316 | phy_read_status(slave->phy); | |
2317 | } | |
2318 | return 0; | |
2319 | } | |
2320 | ||
2321 | static void gbe_init_host_port(struct gbe_priv *priv) | |
2322 | { | |
2323 | int bypass_en = 1; | |
9a391c7b WK |
2324 | |
2325 | /* Host Tx Pri */ | |
4c0ef231 | 2326 | if (IS_SS_ID_NU(priv) || IS_SS_ID_XGBE(priv)) |
9a391c7b WK |
2327 | writel(HOST_TX_PRI_MAP_DEFAULT, |
2328 | GBE_REG_ADDR(priv, host_port_regs, tx_pri_map)); | |
2329 | ||
6f8d3f33 WK |
2330 | /* Max length register */ |
2331 | writel(NETCP_MAX_FRAME_SIZE, GBE_REG_ADDR(priv, host_port_regs, | |
2332 | rx_maxlen)); | |
2333 | ||
2334 | cpsw_ale_start(priv->ale); | |
2335 | ||
2336 | if (priv->enable_ale) | |
2337 | bypass_en = 0; | |
2338 | ||
2339 | cpsw_ale_control_set(priv->ale, 0, ALE_BYPASS, bypass_en); | |
2340 | ||
2341 | cpsw_ale_control_set(priv->ale, 0, ALE_NO_PORT_VLAN, 1); | |
2342 | ||
2343 | cpsw_ale_control_set(priv->ale, priv->host_port, | |
2344 | ALE_PORT_STATE, ALE_PORT_STATE_FORWARD); | |
2345 | ||
2346 | cpsw_ale_control_set(priv->ale, 0, | |
2347 | ALE_PORT_UNKNOWN_VLAN_MEMBER, | |
2348 | GBE_PORT_MASK(priv->ale_ports)); | |
2349 | ||
2350 | cpsw_ale_control_set(priv->ale, 0, | |
2351 | ALE_PORT_UNKNOWN_MCAST_FLOOD, | |
2352 | GBE_PORT_MASK(priv->ale_ports - 1)); | |
2353 | ||
2354 | cpsw_ale_control_set(priv->ale, 0, | |
2355 | ALE_PORT_UNKNOWN_REG_MCAST_FLOOD, | |
2356 | GBE_PORT_MASK(priv->ale_ports)); | |
2357 | ||
2358 | cpsw_ale_control_set(priv->ale, 0, | |
2359 | ALE_PORT_UNTAGGED_EGRESS, | |
2360 | GBE_PORT_MASK(priv->ale_ports)); | |
2361 | } | |
2362 | ||
2363 | static void gbe_add_mcast_addr(struct gbe_intf *gbe_intf, u8 *addr) | |
2364 | { | |
2365 | struct gbe_priv *gbe_dev = gbe_intf->gbe_dev; | |
2366 | u16 vlan_id; | |
2367 | ||
2368 | cpsw_ale_add_mcast(gbe_dev->ale, addr, | |
2369 | GBE_PORT_MASK(gbe_dev->ale_ports), 0, 0, | |
2370 | ALE_MCAST_FWD_2); | |
2371 | for_each_set_bit(vlan_id, gbe_intf->active_vlans, VLAN_N_VID) { | |
2372 | cpsw_ale_add_mcast(gbe_dev->ale, addr, | |
2373 | GBE_PORT_MASK(gbe_dev->ale_ports), | |
2374 | ALE_VLAN, vlan_id, ALE_MCAST_FWD_2); | |
2375 | } | |
2376 | } | |
2377 | ||
2378 | static void gbe_add_ucast_addr(struct gbe_intf *gbe_intf, u8 *addr) | |
2379 | { | |
2380 | struct gbe_priv *gbe_dev = gbe_intf->gbe_dev; | |
2381 | u16 vlan_id; | |
2382 | ||
2383 | cpsw_ale_add_ucast(gbe_dev->ale, addr, gbe_dev->host_port, 0, 0); | |
2384 | ||
2385 | for_each_set_bit(vlan_id, gbe_intf->active_vlans, VLAN_N_VID) | |
2386 | cpsw_ale_add_ucast(gbe_dev->ale, addr, gbe_dev->host_port, | |
2387 | ALE_VLAN, vlan_id); | |
2388 | } | |
2389 | ||
2390 | static void gbe_del_mcast_addr(struct gbe_intf *gbe_intf, u8 *addr) | |
2391 | { | |
2392 | struct gbe_priv *gbe_dev = gbe_intf->gbe_dev; | |
2393 | u16 vlan_id; | |
2394 | ||
2395 | cpsw_ale_del_mcast(gbe_dev->ale, addr, 0, 0, 0); | |
2396 | ||
2397 | for_each_set_bit(vlan_id, gbe_intf->active_vlans, VLAN_N_VID) { | |
2398 | cpsw_ale_del_mcast(gbe_dev->ale, addr, 0, ALE_VLAN, vlan_id); | |
2399 | } | |
2400 | } | |
2401 | ||
2402 | static void gbe_del_ucast_addr(struct gbe_intf *gbe_intf, u8 *addr) | |
2403 | { | |
2404 | struct gbe_priv *gbe_dev = gbe_intf->gbe_dev; | |
2405 | u16 vlan_id; | |
2406 | ||
2407 | cpsw_ale_del_ucast(gbe_dev->ale, addr, gbe_dev->host_port, 0, 0); | |
2408 | ||
2409 | for_each_set_bit(vlan_id, gbe_intf->active_vlans, VLAN_N_VID) { | |
2410 | cpsw_ale_del_ucast(gbe_dev->ale, addr, gbe_dev->host_port, | |
2411 | ALE_VLAN, vlan_id); | |
2412 | } | |
2413 | } | |
2414 | ||
2415 | static int gbe_add_addr(void *intf_priv, struct netcp_addr *naddr) | |
2416 | { | |
2417 | struct gbe_intf *gbe_intf = intf_priv; | |
2418 | struct gbe_priv *gbe_dev = gbe_intf->gbe_dev; | |
2419 | ||
2420 | dev_dbg(gbe_dev->dev, "ethss adding address %pM, type %d\n", | |
2421 | naddr->addr, naddr->type); | |
2422 | ||
2423 | switch (naddr->type) { | |
2424 | case ADDR_MCAST: | |
2425 | case ADDR_BCAST: | |
2426 | gbe_add_mcast_addr(gbe_intf, naddr->addr); | |
2427 | break; | |
2428 | case ADDR_UCAST: | |
2429 | case ADDR_DEV: | |
2430 | gbe_add_ucast_addr(gbe_intf, naddr->addr); | |
2431 | break; | |
2432 | case ADDR_ANY: | |
2433 | /* nothing to do for promiscuous */ | |
2434 | default: | |
2435 | break; | |
2436 | } | |
2437 | ||
2438 | return 0; | |
2439 | } | |
2440 | ||
2441 | static int gbe_del_addr(void *intf_priv, struct netcp_addr *naddr) | |
2442 | { | |
2443 | struct gbe_intf *gbe_intf = intf_priv; | |
2444 | struct gbe_priv *gbe_dev = gbe_intf->gbe_dev; | |
2445 | ||
2446 | dev_dbg(gbe_dev->dev, "ethss deleting address %pM, type %d\n", | |
2447 | naddr->addr, naddr->type); | |
2448 | ||
2449 | switch (naddr->type) { | |
2450 | case ADDR_MCAST: | |
2451 | case ADDR_BCAST: | |
2452 | gbe_del_mcast_addr(gbe_intf, naddr->addr); | |
2453 | break; | |
2454 | case ADDR_UCAST: | |
2455 | case ADDR_DEV: | |
2456 | gbe_del_ucast_addr(gbe_intf, naddr->addr); | |
2457 | break; | |
2458 | case ADDR_ANY: | |
2459 | /* nothing to do for promiscuous */ | |
2460 | default: | |
2461 | break; | |
2462 | } | |
2463 | ||
2464 | return 0; | |
2465 | } | |
2466 | ||
2467 | static int gbe_add_vid(void *intf_priv, int vid) | |
2468 | { | |
2469 | struct gbe_intf *gbe_intf = intf_priv; | |
2470 | struct gbe_priv *gbe_dev = gbe_intf->gbe_dev; | |
2471 | ||
2472 | set_bit(vid, gbe_intf->active_vlans); | |
2473 | ||
2474 | cpsw_ale_add_vlan(gbe_dev->ale, vid, | |
2475 | GBE_PORT_MASK(gbe_dev->ale_ports), | |
2476 | GBE_MASK_NO_PORTS, | |
2477 | GBE_PORT_MASK(gbe_dev->ale_ports), | |
2478 | GBE_PORT_MASK(gbe_dev->ale_ports - 1)); | |
2479 | ||
2480 | return 0; | |
2481 | } | |
2482 | ||
2483 | static int gbe_del_vid(void *intf_priv, int vid) | |
2484 | { | |
2485 | struct gbe_intf *gbe_intf = intf_priv; | |
2486 | struct gbe_priv *gbe_dev = gbe_intf->gbe_dev; | |
2487 | ||
2488 | cpsw_ale_del_vlan(gbe_dev->ale, vid, 0); | |
2489 | clear_bit(vid, gbe_intf->active_vlans); | |
2490 | return 0; | |
2491 | } | |
2492 | ||
6246168b WK |
2493 | #if IS_ENABLED(CONFIG_TI_CPTS) |
2494 | #define HAS_PHY_TXTSTAMP(p) ((p)->drv && (p)->drv->txtstamp) | |
2495 | #define HAS_PHY_RXTSTAMP(p) ((p)->drv && (p)->drv->rxtstamp) | |
2496 | ||
2497 | static void gbe_txtstamp(void *context, struct sk_buff *skb) | |
2498 | { | |
2499 | struct gbe_intf *gbe_intf = context; | |
2500 | struct gbe_priv *gbe_dev = gbe_intf->gbe_dev; | |
2501 | ||
2502 | cpts_tx_timestamp(gbe_dev->cpts, skb); | |
2503 | } | |
2504 | ||
2505 | static bool gbe_need_txtstamp(struct gbe_intf *gbe_intf, | |
2506 | const struct netcp_packet *p_info) | |
2507 | { | |
2508 | struct sk_buff *skb = p_info->skb; | |
2509 | unsigned int class = ptp_classify_raw(skb); | |
2510 | ||
2511 | if (class == PTP_CLASS_NONE) | |
2512 | return false; | |
2513 | ||
2514 | switch (class) { | |
2515 | case PTP_CLASS_V1_IPV4: | |
2516 | case PTP_CLASS_V1_IPV6: | |
2517 | case PTP_CLASS_V2_IPV4: | |
2518 | case PTP_CLASS_V2_IPV6: | |
2519 | case PTP_CLASS_V2_L2: | |
2520 | case (PTP_CLASS_V2_VLAN | PTP_CLASS_L2): | |
2521 | case (PTP_CLASS_V2_VLAN | PTP_CLASS_IPV4): | |
2522 | case (PTP_CLASS_V2_VLAN | PTP_CLASS_IPV6): | |
2523 | return true; | |
2524 | } | |
2525 | ||
2526 | return false; | |
2527 | } | |
2528 | ||
2529 | static int gbe_txtstamp_mark_pkt(struct gbe_intf *gbe_intf, | |
2530 | struct netcp_packet *p_info) | |
2531 | { | |
2532 | struct phy_device *phydev = p_info->skb->dev->phydev; | |
2533 | struct gbe_priv *gbe_dev = gbe_intf->gbe_dev; | |
2534 | ||
2535 | if (!(skb_shinfo(p_info->skb)->tx_flags & SKBTX_HW_TSTAMP) || | |
2536 | !cpts_is_tx_enabled(gbe_dev->cpts)) | |
2537 | return 0; | |
2538 | ||
2539 | /* If phy has the txtstamp api, assume it will do it. | |
2540 | * We mark it here because skb_tx_timestamp() is called | |
2541 | * after all the txhooks are called. | |
2542 | */ | |
2543 | if (phydev && HAS_PHY_TXTSTAMP(phydev)) { | |
2544 | skb_shinfo(p_info->skb)->tx_flags |= SKBTX_IN_PROGRESS; | |
2545 | return 0; | |
2546 | } | |
2547 | ||
2548 | if (gbe_need_txtstamp(gbe_intf, p_info)) { | |
2549 | p_info->txtstamp = gbe_txtstamp; | |
2550 | p_info->ts_context = (void *)gbe_intf; | |
2551 | skb_shinfo(p_info->skb)->tx_flags |= SKBTX_IN_PROGRESS; | |
2552 | } | |
2553 | ||
2554 | return 0; | |
2555 | } | |
2556 | ||
2557 | static int gbe_rxtstamp(struct gbe_intf *gbe_intf, struct netcp_packet *p_info) | |
2558 | { | |
2559 | struct phy_device *phydev = p_info->skb->dev->phydev; | |
2560 | struct gbe_priv *gbe_dev = gbe_intf->gbe_dev; | |
2561 | ||
2562 | if (p_info->rxtstamp_complete) | |
2563 | return 0; | |
2564 | ||
2565 | if (phydev && HAS_PHY_RXTSTAMP(phydev)) { | |
2566 | p_info->rxtstamp_complete = true; | |
2567 | return 0; | |
2568 | } | |
2569 | ||
2570 | cpts_rx_timestamp(gbe_dev->cpts, p_info->skb); | |
2571 | p_info->rxtstamp_complete = true; | |
2572 | ||
2573 | return 0; | |
2574 | } | |
2575 | ||
2576 | static int gbe_hwtstamp_get(struct gbe_intf *gbe_intf, struct ifreq *ifr) | |
2577 | { | |
2578 | struct gbe_priv *gbe_dev = gbe_intf->gbe_dev; | |
2579 | struct cpts *cpts = gbe_dev->cpts; | |
2580 | struct hwtstamp_config cfg; | |
2581 | ||
2582 | if (!cpts) | |
2583 | return -EOPNOTSUPP; | |
2584 | ||
2585 | cfg.flags = 0; | |
2586 | cfg.tx_type = cpts_is_tx_enabled(cpts) ? | |
2587 | HWTSTAMP_TX_ON : HWTSTAMP_TX_OFF; | |
2588 | cfg.rx_filter = (cpts_is_rx_enabled(cpts) ? | |
2589 | cpts->rx_enable : HWTSTAMP_FILTER_NONE); | |
2590 | ||
2591 | return copy_to_user(ifr->ifr_data, &cfg, sizeof(cfg)) ? -EFAULT : 0; | |
2592 | } | |
2593 | ||
2594 | static void gbe_hwtstamp(struct gbe_intf *gbe_intf) | |
2595 | { | |
2596 | struct gbe_priv *gbe_dev = gbe_intf->gbe_dev; | |
2597 | struct gbe_slave *slave = gbe_intf->slave; | |
2598 | u32 ts_en, seq_id, ctl; | |
2599 | ||
2600 | if (!cpts_is_rx_enabled(gbe_dev->cpts) && | |
2601 | !cpts_is_tx_enabled(gbe_dev->cpts)) { | |
2602 | writel(0, GBE_REG_ADDR(slave, port_regs, ts_ctl)); | |
2603 | return; | |
2604 | } | |
2605 | ||
2606 | seq_id = (30 << TS_SEQ_ID_OFS_SHIFT) | ETH_P_1588; | |
2607 | ts_en = EVENT_MSG_BITS << TS_MSG_TYPE_EN_SHIFT; | |
2608 | ctl = ETH_P_1588 | TS_TTL_NONZERO | | |
2609 | (slave->ts_ctl.dst_port_map << TS_CTL_DST_PORT_SHIFT) | | |
2610 | (slave->ts_ctl.uni ? TS_UNI_EN : | |
2611 | slave->ts_ctl.maddr_map << TS_CTL_MADDR_SHIFT); | |
2612 | ||
2613 | if (cpts_is_tx_enabled(gbe_dev->cpts)) | |
2614 | ts_en |= (TS_TX_ANX_ALL_EN | TS_TX_VLAN_LT1_EN); | |
2615 | ||
2616 | if (cpts_is_rx_enabled(gbe_dev->cpts)) | |
2617 | ts_en |= (TS_RX_ANX_ALL_EN | TS_RX_VLAN_LT1_EN); | |
2618 | ||
2619 | writel(ts_en, GBE_REG_ADDR(slave, port_regs, ts_ctl)); | |
2620 | writel(seq_id, GBE_REG_ADDR(slave, port_regs, ts_seq_ltype)); | |
2621 | writel(ctl, GBE_REG_ADDR(slave, port_regs, ts_ctl_ltype2)); | |
2622 | } | |
2623 | ||
2624 | static int gbe_hwtstamp_set(struct gbe_intf *gbe_intf, struct ifreq *ifr) | |
2625 | { | |
2626 | struct gbe_priv *gbe_dev = gbe_intf->gbe_dev; | |
2627 | struct cpts *cpts = gbe_dev->cpts; | |
2628 | struct hwtstamp_config cfg; | |
2629 | ||
2630 | if (!cpts) | |
2631 | return -EOPNOTSUPP; | |
2632 | ||
2633 | if (copy_from_user(&cfg, ifr->ifr_data, sizeof(cfg))) | |
2634 | return -EFAULT; | |
2635 | ||
2636 | /* reserved for future extensions */ | |
2637 | if (cfg.flags) | |
2638 | return -EINVAL; | |
2639 | ||
2640 | switch (cfg.tx_type) { | |
2641 | case HWTSTAMP_TX_OFF: | |
2642 | cpts_tx_enable(cpts, 0); | |
2643 | break; | |
2644 | case HWTSTAMP_TX_ON: | |
2645 | cpts_tx_enable(cpts, 1); | |
2646 | break; | |
2647 | default: | |
2648 | return -ERANGE; | |
2649 | } | |
2650 | ||
2651 | switch (cfg.rx_filter) { | |
2652 | case HWTSTAMP_FILTER_NONE: | |
2653 | cpts_rx_enable(cpts, 0); | |
2654 | break; | |
2655 | case HWTSTAMP_FILTER_ALL: | |
2656 | case HWTSTAMP_FILTER_PTP_V1_L4_EVENT: | |
2657 | case HWTSTAMP_FILTER_PTP_V1_L4_SYNC: | |
2658 | case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ: | |
2659 | cpts_rx_enable(cpts, HWTSTAMP_FILTER_PTP_V1_L4_EVENT); | |
2660 | cfg.rx_filter = HWTSTAMP_FILTER_PTP_V1_L4_EVENT; | |
2661 | break; | |
2662 | case HWTSTAMP_FILTER_PTP_V2_L4_EVENT: | |
2663 | case HWTSTAMP_FILTER_PTP_V2_L4_SYNC: | |
2664 | case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ: | |
2665 | case HWTSTAMP_FILTER_PTP_V2_L2_EVENT: | |
2666 | case HWTSTAMP_FILTER_PTP_V2_L2_SYNC: | |
2667 | case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ: | |
2668 | case HWTSTAMP_FILTER_PTP_V2_EVENT: | |
2669 | case HWTSTAMP_FILTER_PTP_V2_SYNC: | |
2670 | case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ: | |
2671 | cpts_rx_enable(cpts, HWTSTAMP_FILTER_PTP_V2_EVENT); | |
2672 | cfg.rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT; | |
2673 | break; | |
2674 | default: | |
2675 | return -ERANGE; | |
2676 | } | |
2677 | ||
2678 | gbe_hwtstamp(gbe_intf); | |
2679 | ||
2680 | return copy_to_user(ifr->ifr_data, &cfg, sizeof(cfg)) ? -EFAULT : 0; | |
2681 | } | |
2682 | ||
2683 | static void gbe_register_cpts(struct gbe_priv *gbe_dev) | |
2684 | { | |
2685 | if (!gbe_dev->cpts) | |
2686 | return; | |
2687 | ||
2688 | if (gbe_dev->cpts_registered > 0) | |
2689 | goto done; | |
2690 | ||
2691 | if (cpts_register(gbe_dev->cpts)) { | |
2692 | dev_err(gbe_dev->dev, "error registering cpts device\n"); | |
2693 | return; | |
2694 | } | |
2695 | ||
2696 | done: | |
2697 | ++gbe_dev->cpts_registered; | |
2698 | } | |
2699 | ||
2700 | static void gbe_unregister_cpts(struct gbe_priv *gbe_dev) | |
2701 | { | |
2702 | if (!gbe_dev->cpts || (gbe_dev->cpts_registered <= 0)) | |
2703 | return; | |
2704 | ||
2705 | if (--gbe_dev->cpts_registered) | |
2706 | return; | |
2707 | ||
2708 | cpts_unregister(gbe_dev->cpts); | |
2709 | } | |
2710 | #else | |
2711 | static inline int gbe_txtstamp_mark_pkt(struct gbe_intf *gbe_intf, | |
2712 | struct netcp_packet *p_info) | |
2713 | { | |
2714 | return 0; | |
2715 | } | |
2716 | ||
2717 | static inline int gbe_rxtstamp(struct gbe_intf *gbe_intf, | |
2718 | struct netcp_packet *p_info) | |
2719 | { | |
2720 | return 0; | |
2721 | } | |
2722 | ||
2723 | static inline int gbe_hwtstamp(struct gbe_intf *gbe_intf, | |
2724 | struct ifreq *ifr, int cmd) | |
2725 | { | |
2726 | return -EOPNOTSUPP; | |
2727 | } | |
2728 | ||
2729 | static inline void gbe_register_cpts(struct gbe_priv *gbe_dev) | |
2730 | { | |
2731 | } | |
2732 | ||
2733 | static inline void gbe_unregister_cpts(struct gbe_priv *gbe_dev) | |
2734 | { | |
2735 | } | |
2736 | ||
2737 | static inline int gbe_hwtstamp_get(struct gbe_intf *gbe_intf, struct ifreq *req) | |
2738 | { | |
2739 | return -EOPNOTSUPP; | |
2740 | } | |
2741 | ||
2742 | static inline int gbe_hwtstamp_set(struct gbe_intf *gbe_intf, struct ifreq *req) | |
2743 | { | |
2744 | return -EOPNOTSUPP; | |
2745 | } | |
2746 | #endif /* CONFIG_TI_CPTS */ | |
2747 | ||
6f8d3f33 WK |
2748 | static int gbe_ioctl(void *intf_priv, struct ifreq *req, int cmd) |
2749 | { | |
2750 | struct gbe_intf *gbe_intf = intf_priv; | |
2751 | struct phy_device *phy = gbe_intf->slave->phy; | |
6246168b WK |
2752 | |
2753 | if (!phy || !phy->drv->hwtstamp) { | |
2754 | switch (cmd) { | |
2755 | case SIOCGHWTSTAMP: | |
2756 | return gbe_hwtstamp_get(gbe_intf, req); | |
2757 | case SIOCSHWTSTAMP: | |
2758 | return gbe_hwtstamp_set(gbe_intf, req); | |
2759 | } | |
2760 | } | |
6f8d3f33 WK |
2761 | |
2762 | if (phy) | |
6246168b | 2763 | return phy_mii_ioctl(phy, req, cmd); |
6f8d3f33 | 2764 | |
6246168b | 2765 | return -EOPNOTSUPP; |
6f8d3f33 WK |
2766 | } |
2767 | ||
2768 | static void netcp_ethss_timer(unsigned long arg) | |
2769 | { | |
2770 | struct gbe_priv *gbe_dev = (struct gbe_priv *)arg; | |
2771 | struct gbe_intf *gbe_intf; | |
2772 | struct gbe_slave *slave; | |
2773 | ||
2774 | /* Check & update SGMII link state of interfaces */ | |
2775 | for_each_intf(gbe_intf, gbe_dev) { | |
2776 | if (!gbe_intf->slave->open) | |
2777 | continue; | |
2778 | netcp_ethss_update_link_state(gbe_dev, gbe_intf->slave, | |
2779 | gbe_intf->ndev); | |
2780 | } | |
2781 | ||
2782 | /* Check & update SGMII link state of secondary ports */ | |
2783 | for_each_sec_slave(slave, gbe_dev) { | |
2784 | netcp_ethss_update_link_state(gbe_dev, slave, NULL); | |
2785 | } | |
2786 | ||
c0f54edb WK |
2787 | /* A timer runs as a BH, no need to block them */ |
2788 | spin_lock(&gbe_dev->hw_stats_lock); | |
6f8d3f33 WK |
2789 | |
2790 | if (gbe_dev->ss_version == GBE_SS_VERSION_14) | |
2791 | gbe_update_stats_ver14(gbe_dev, NULL); | |
2792 | else | |
2793 | gbe_update_stats(gbe_dev, NULL); | |
2794 | ||
c0f54edb | 2795 | spin_unlock(&gbe_dev->hw_stats_lock); |
6f8d3f33 WK |
2796 | |
2797 | gbe_dev->timer.expires = jiffies + GBE_TIMER_INTERVAL; | |
2798 | add_timer(&gbe_dev->timer); | |
2799 | } | |
2800 | ||
6246168b | 2801 | static int gbe_txhook(int order, void *data, struct netcp_packet *p_info) |
6f8d3f33 WK |
2802 | { |
2803 | struct gbe_intf *gbe_intf = data; | |
2804 | ||
2805 | p_info->tx_pipe = &gbe_intf->tx_pipe; | |
6246168b WK |
2806 | |
2807 | return gbe_txtstamp_mark_pkt(gbe_intf, p_info); | |
2808 | } | |
2809 | ||
2810 | static int gbe_rxhook(int order, void *data, struct netcp_packet *p_info) | |
2811 | { | |
2812 | struct gbe_intf *gbe_intf = data; | |
2813 | ||
2814 | return gbe_rxtstamp(gbe_intf, p_info); | |
6f8d3f33 WK |
2815 | } |
2816 | ||
2817 | static int gbe_open(void *intf_priv, struct net_device *ndev) | |
2818 | { | |
2819 | struct gbe_intf *gbe_intf = intf_priv; | |
2820 | struct gbe_priv *gbe_dev = gbe_intf->gbe_dev; | |
2821 | struct netcp_intf *netcp = netdev_priv(ndev); | |
2822 | struct gbe_slave *slave = gbe_intf->slave; | |
2823 | int port_num = slave->port_num; | |
2824 | u32 reg; | |
2825 | int ret; | |
2826 | ||
2827 | reg = readl(GBE_REG_ADDR(gbe_dev, switch_regs, id_ver)); | |
2828 | dev_dbg(gbe_dev->dev, "initializing gbe version %d.%d (%d) GBE identification value 0x%x\n", | |
2829 | GBE_MAJOR_VERSION(reg), GBE_MINOR_VERSION(reg), | |
2830 | GBE_RTL_VERSION(reg), GBE_IDENT(reg)); | |
2831 | ||
9a391c7b WK |
2832 | /* For 10G and on NetCP 1.5, use directed to port */ |
2833 | if ((gbe_dev->ss_version == XGBE_SS_VERSION_10) || IS_SS_ID_MU(gbe_dev)) | |
e170f409 KM |
2834 | gbe_intf->tx_pipe.flags = SWITCH_TO_PORT_IN_TAGINFO; |
2835 | ||
6f8d3f33 | 2836 | if (gbe_dev->enable_ale) |
e170f409 | 2837 | gbe_intf->tx_pipe.switch_to_port = 0; |
6f8d3f33 | 2838 | else |
e170f409 | 2839 | gbe_intf->tx_pipe.switch_to_port = port_num; |
6f8d3f33 | 2840 | |
e170f409 KM |
2841 | dev_dbg(gbe_dev->dev, |
2842 | "opened TX channel %s: %p with to port %d, flags %d\n", | |
6f8d3f33 WK |
2843 | gbe_intf->tx_pipe.dma_chan_name, |
2844 | gbe_intf->tx_pipe.dma_channel, | |
e170f409 KM |
2845 | gbe_intf->tx_pipe.switch_to_port, |
2846 | gbe_intf->tx_pipe.flags); | |
6f8d3f33 WK |
2847 | |
2848 | gbe_slave_stop(gbe_intf); | |
2849 | ||
2850 | /* disable priority elevation and enable statistics on all ports */ | |
2851 | writel(0, GBE_REG_ADDR(gbe_dev, switch_regs, ptype)); | |
2852 | ||
2853 | /* Control register */ | |
2854 | writel(GBE_CTL_P0_ENABLE, GBE_REG_ADDR(gbe_dev, switch_regs, control)); | |
2855 | ||
2856 | /* All statistics enabled and STAT AB visible by default */ | |
9a391c7b WK |
2857 | writel(gbe_dev->stats_en_mask, GBE_REG_ADDR(gbe_dev, switch_regs, |
2858 | stat_port_en)); | |
6f8d3f33 WK |
2859 | |
2860 | ret = gbe_slave_open(gbe_intf); | |
2861 | if (ret) | |
2862 | goto fail; | |
2863 | ||
6246168b WK |
2864 | netcp_register_txhook(netcp, GBE_TXHOOK_ORDER, gbe_txhook, gbe_intf); |
2865 | netcp_register_rxhook(netcp, GBE_RXHOOK_ORDER, gbe_rxhook, gbe_intf); | |
6f8d3f33 WK |
2866 | |
2867 | slave->open = true; | |
2868 | netcp_ethss_update_link_state(gbe_dev, slave, ndev); | |
6246168b WK |
2869 | |
2870 | gbe_register_cpts(gbe_dev); | |
2871 | ||
6f8d3f33 WK |
2872 | return 0; |
2873 | ||
2874 | fail: | |
2875 | gbe_slave_stop(gbe_intf); | |
2876 | return ret; | |
2877 | } | |
2878 | ||
2879 | static int gbe_close(void *intf_priv, struct net_device *ndev) | |
2880 | { | |
2881 | struct gbe_intf *gbe_intf = intf_priv; | |
2882 | struct netcp_intf *netcp = netdev_priv(ndev); | |
6246168b WK |
2883 | struct gbe_priv *gbe_dev = gbe_intf->gbe_dev; |
2884 | ||
2885 | gbe_unregister_cpts(gbe_dev); | |
6f8d3f33 WK |
2886 | |
2887 | gbe_slave_stop(gbe_intf); | |
6246168b WK |
2888 | |
2889 | netcp_unregister_rxhook(netcp, GBE_RXHOOK_ORDER, gbe_rxhook, gbe_intf); | |
2890 | netcp_unregister_txhook(netcp, GBE_TXHOOK_ORDER, gbe_txhook, gbe_intf); | |
6f8d3f33 WK |
2891 | |
2892 | gbe_intf->slave->open = false; | |
2893 | atomic_set(&gbe_intf->slave->link_state, NETCP_LINK_STATE_INVALID); | |
2894 | return 0; | |
2895 | } | |
2896 | ||
6246168b WK |
2897 | #if IS_ENABLED(CONFIG_TI_CPTS) |
2898 | static void init_slave_ts_ctl(struct gbe_slave *slave) | |
2899 | { | |
2900 | slave->ts_ctl.uni = 1; | |
2901 | slave->ts_ctl.dst_port_map = | |
2902 | (TS_CTL_DST_PORT >> TS_CTL_DST_PORT_SHIFT) & 0x3; | |
2903 | slave->ts_ctl.maddr_map = | |
2904 | (TS_CTL_MADDR_ALL >> TS_CTL_MADDR_SHIFT) & 0x1f; | |
2905 | } | |
2906 | ||
2907 | #else | |
2908 | static void init_slave_ts_ctl(struct gbe_slave *slave) | |
2909 | { | |
2910 | } | |
2911 | #endif /* CONFIG_TI_CPTS */ | |
2912 | ||
6f8d3f33 WK |
2913 | static int init_slave(struct gbe_priv *gbe_dev, struct gbe_slave *slave, |
2914 | struct device_node *node) | |
2915 | { | |
2916 | int port_reg_num; | |
2917 | u32 port_reg_ofs, emac_reg_ofs; | |
9a391c7b | 2918 | u32 port_reg_blk_sz, emac_reg_blk_sz; |
6f8d3f33 WK |
2919 | |
2920 | if (of_property_read_u32(node, "slave-port", &slave->slave_num)) { | |
2921 | dev_err(gbe_dev->dev, "missing slave-port parameter\n"); | |
2922 | return -EINVAL; | |
2923 | } | |
2924 | ||
2925 | if (of_property_read_u32(node, "link-interface", | |
2926 | &slave->link_interface)) { | |
2927 | dev_warn(gbe_dev->dev, | |
2928 | "missing link-interface value defaulting to 1G mac-phy link\n"); | |
2929 | slave->link_interface = SGMII_LINK_MAC_PHY; | |
2930 | } | |
2931 | ||
2932 | slave->open = false; | |
2933 | slave->phy_node = of_parse_phandle(node, "phy-handle", 0); | |
2934 | slave->port_num = gbe_get_slave_port(gbe_dev, slave->slave_num); | |
2935 | ||
90cff9e2 WK |
2936 | if (slave->link_interface >= XGMII_LINK_MAC_PHY) |
2937 | slave->mac_control = GBE_DEF_10G_MAC_CONTROL; | |
2938 | else | |
2939 | slave->mac_control = GBE_DEF_1G_MAC_CONTROL; | |
6f8d3f33 WK |
2940 | |
2941 | /* Emac regs memmap are contiguous but port regs are not */ | |
2942 | port_reg_num = slave->slave_num; | |
2943 | if (gbe_dev->ss_version == GBE_SS_VERSION_14) { | |
2944 | if (slave->slave_num > 1) { | |
2945 | port_reg_ofs = GBE13_SLAVE_PORT2_OFFSET; | |
2946 | port_reg_num -= 2; | |
2947 | } else { | |
2948 | port_reg_ofs = GBE13_SLAVE_PORT_OFFSET; | |
2949 | } | |
9a391c7b WK |
2950 | emac_reg_ofs = GBE13_EMAC_OFFSET; |
2951 | port_reg_blk_sz = 0x30; | |
2952 | emac_reg_blk_sz = 0x40; | |
2953 | } else if (IS_SS_ID_MU(gbe_dev)) { | |
2954 | port_reg_ofs = GBENU_SLAVE_PORT_OFFSET; | |
2955 | emac_reg_ofs = GBENU_EMAC_OFFSET; | |
2956 | port_reg_blk_sz = 0x1000; | |
2957 | emac_reg_blk_sz = 0x1000; | |
90cff9e2 WK |
2958 | } else if (gbe_dev->ss_version == XGBE_SS_VERSION_10) { |
2959 | port_reg_ofs = XGBE10_SLAVE_PORT_OFFSET; | |
9a391c7b WK |
2960 | emac_reg_ofs = XGBE10_EMAC_OFFSET; |
2961 | port_reg_blk_sz = 0x30; | |
2962 | emac_reg_blk_sz = 0x40; | |
6f8d3f33 WK |
2963 | } else { |
2964 | dev_err(gbe_dev->dev, "unknown ethss(0x%x)\n", | |
2965 | gbe_dev->ss_version); | |
2966 | return -EINVAL; | |
2967 | } | |
2968 | ||
21e0e0dd | 2969 | slave->port_regs = gbe_dev->switch_regs + port_reg_ofs + |
9a391c7b | 2970 | (port_reg_blk_sz * port_reg_num); |
21e0e0dd | 2971 | slave->emac_regs = gbe_dev->switch_regs + emac_reg_ofs + |
9a391c7b | 2972 | (emac_reg_blk_sz * slave->slave_num); |
6f8d3f33 WK |
2973 | |
2974 | if (gbe_dev->ss_version == GBE_SS_VERSION_14) { | |
2975 | /* Initialize slave port register offsets */ | |
2976 | GBE_SET_REG_OFS(slave, port_regs, port_vlan); | |
2977 | GBE_SET_REG_OFS(slave, port_regs, tx_pri_map); | |
2978 | GBE_SET_REG_OFS(slave, port_regs, sa_lo); | |
2979 | GBE_SET_REG_OFS(slave, port_regs, sa_hi); | |
2980 | GBE_SET_REG_OFS(slave, port_regs, ts_ctl); | |
2981 | GBE_SET_REG_OFS(slave, port_regs, ts_seq_ltype); | |
2982 | GBE_SET_REG_OFS(slave, port_regs, ts_vlan); | |
2983 | GBE_SET_REG_OFS(slave, port_regs, ts_ctl_ltype2); | |
2984 | GBE_SET_REG_OFS(slave, port_regs, ts_ctl2); | |
2985 | ||
2986 | /* Initialize EMAC register offsets */ | |
2987 | GBE_SET_REG_OFS(slave, emac_regs, mac_control); | |
2988 | GBE_SET_REG_OFS(slave, emac_regs, soft_reset); | |
2989 | GBE_SET_REG_OFS(slave, emac_regs, rx_maxlen); | |
2990 | ||
9a391c7b WK |
2991 | } else if (IS_SS_ID_MU(gbe_dev)) { |
2992 | /* Initialize slave port register offsets */ | |
2993 | GBENU_SET_REG_OFS(slave, port_regs, port_vlan); | |
2994 | GBENU_SET_REG_OFS(slave, port_regs, tx_pri_map); | |
2995 | GBENU_SET_REG_OFS(slave, port_regs, sa_lo); | |
2996 | GBENU_SET_REG_OFS(slave, port_regs, sa_hi); | |
2997 | GBENU_SET_REG_OFS(slave, port_regs, ts_ctl); | |
2998 | GBENU_SET_REG_OFS(slave, port_regs, ts_seq_ltype); | |
2999 | GBENU_SET_REG_OFS(slave, port_regs, ts_vlan); | |
3000 | GBENU_SET_REG_OFS(slave, port_regs, ts_ctl_ltype2); | |
3001 | GBENU_SET_REG_OFS(slave, port_regs, ts_ctl2); | |
3002 | GBENU_SET_REG_OFS(slave, port_regs, rx_maxlen); | |
3003 | ||
3004 | /* Initialize EMAC register offsets */ | |
3005 | GBENU_SET_REG_OFS(slave, emac_regs, mac_control); | |
3006 | GBENU_SET_REG_OFS(slave, emac_regs, soft_reset); | |
3007 | ||
90cff9e2 WK |
3008 | } else if (gbe_dev->ss_version == XGBE_SS_VERSION_10) { |
3009 | /* Initialize slave port register offsets */ | |
3010 | XGBE_SET_REG_OFS(slave, port_regs, port_vlan); | |
3011 | XGBE_SET_REG_OFS(slave, port_regs, tx_pri_map); | |
3012 | XGBE_SET_REG_OFS(slave, port_regs, sa_lo); | |
3013 | XGBE_SET_REG_OFS(slave, port_regs, sa_hi); | |
3014 | XGBE_SET_REG_OFS(slave, port_regs, ts_ctl); | |
3015 | XGBE_SET_REG_OFS(slave, port_regs, ts_seq_ltype); | |
3016 | XGBE_SET_REG_OFS(slave, port_regs, ts_vlan); | |
3017 | XGBE_SET_REG_OFS(slave, port_regs, ts_ctl_ltype2); | |
3018 | XGBE_SET_REG_OFS(slave, port_regs, ts_ctl2); | |
3019 | ||
3020 | /* Initialize EMAC register offsets */ | |
3021 | XGBE_SET_REG_OFS(slave, emac_regs, mac_control); | |
3022 | XGBE_SET_REG_OFS(slave, emac_regs, soft_reset); | |
3023 | XGBE_SET_REG_OFS(slave, emac_regs, rx_maxlen); | |
6f8d3f33 WK |
3024 | } |
3025 | ||
3026 | atomic_set(&slave->link_state, NETCP_LINK_STATE_INVALID); | |
6246168b WK |
3027 | |
3028 | init_slave_ts_ctl(slave); | |
6f8d3f33 WK |
3029 | return 0; |
3030 | } | |
3031 | ||
3032 | static void init_secondary_ports(struct gbe_priv *gbe_dev, | |
3033 | struct device_node *node) | |
3034 | { | |
3035 | struct device *dev = gbe_dev->dev; | |
3036 | phy_interface_t phy_mode; | |
3037 | struct gbe_priv **priv; | |
3038 | struct device_node *port; | |
3039 | struct gbe_slave *slave; | |
3040 | bool mac_phy_link = false; | |
3041 | ||
3042 | for_each_child_of_node(node, port) { | |
3043 | slave = devm_kzalloc(dev, sizeof(*slave), GFP_KERNEL); | |
3044 | if (!slave) { | |
3045 | dev_err(dev, | |
3046 | "memomry alloc failed for secondary port(%s), skipping...\n", | |
3047 | port->name); | |
3048 | continue; | |
3049 | } | |
3050 | ||
3051 | if (init_slave(gbe_dev, slave, port)) { | |
3052 | dev_err(dev, | |
3053 | "Failed to initialize secondary port(%s), skipping...\n", | |
3054 | port->name); | |
3055 | devm_kfree(dev, slave); | |
3056 | continue; | |
3057 | } | |
3058 | ||
3059 | gbe_sgmii_config(gbe_dev, slave); | |
3060 | gbe_port_reset(slave); | |
3061 | gbe_port_config(gbe_dev, slave, gbe_dev->rx_packet_max); | |
3062 | list_add_tail(&slave->slave_list, &gbe_dev->secondary_slaves); | |
3063 | gbe_dev->num_slaves++; | |
90cff9e2 WK |
3064 | if ((slave->link_interface == SGMII_LINK_MAC_PHY) || |
3065 | (slave->link_interface == XGMII_LINK_MAC_PHY)) | |
6f8d3f33 WK |
3066 | mac_phy_link = true; |
3067 | ||
3068 | slave->open = true; | |
bd252796 JL |
3069 | if (gbe_dev->num_slaves >= gbe_dev->max_num_slaves) { |
3070 | of_node_put(port); | |
9a391c7b | 3071 | break; |
bd252796 | 3072 | } |
6f8d3f33 WK |
3073 | } |
3074 | ||
3075 | /* of_phy_connect() is needed only for MAC-PHY interface */ | |
3076 | if (!mac_phy_link) | |
3077 | return; | |
3078 | ||
3079 | /* Allocate dummy netdev device for attaching to phy device */ | |
3080 | gbe_dev->dummy_ndev = alloc_netdev(sizeof(gbe_dev), "dummy", | |
3081 | NET_NAME_UNKNOWN, ether_setup); | |
3082 | if (!gbe_dev->dummy_ndev) { | |
3083 | dev_err(dev, | |
3084 | "Failed to allocate dummy netdev for secondary ports, skipping phy_connect()...\n"); | |
3085 | return; | |
3086 | } | |
3087 | priv = netdev_priv(gbe_dev->dummy_ndev); | |
3088 | *priv = gbe_dev; | |
3089 | ||
3090 | if (slave->link_interface == SGMII_LINK_MAC_PHY) { | |
3091 | phy_mode = PHY_INTERFACE_MODE_SGMII; | |
3092 | slave->phy_port_t = PORT_MII; | |
3093 | } else { | |
3094 | phy_mode = PHY_INTERFACE_MODE_NA; | |
3095 | slave->phy_port_t = PORT_FIBRE; | |
3096 | } | |
3097 | ||
3098 | for_each_sec_slave(slave, gbe_dev) { | |
90cff9e2 WK |
3099 | if ((slave->link_interface != SGMII_LINK_MAC_PHY) && |
3100 | (slave->link_interface != XGMII_LINK_MAC_PHY)) | |
6f8d3f33 WK |
3101 | continue; |
3102 | slave->phy = | |
3103 | of_phy_connect(gbe_dev->dummy_ndev, | |
3104 | slave->phy_node, | |
3105 | gbe_adjust_link_sec_slaves, | |
3106 | 0, phy_mode); | |
3107 | if (!slave->phy) { | |
3108 | dev_err(dev, "phy not found for slave %d\n", | |
3109 | slave->slave_num); | |
3110 | slave->phy = NULL; | |
3111 | } else { | |
3112 | dev_dbg(dev, "phy found: id is: 0x%s\n", | |
84eff6d1 | 3113 | phydev_name(slave->phy)); |
6f8d3f33 WK |
3114 | phy_start(slave->phy); |
3115 | phy_read_status(slave->phy); | |
3116 | } | |
3117 | } | |
3118 | } | |
3119 | ||
3120 | static void free_secondary_ports(struct gbe_priv *gbe_dev) | |
3121 | { | |
3122 | struct gbe_slave *slave; | |
3123 | ||
c20afae7 | 3124 | while (!list_empty(&gbe_dev->secondary_slaves)) { |
6f8d3f33 | 3125 | slave = first_sec_slave(gbe_dev); |
c20afae7 | 3126 | |
6f8d3f33 WK |
3127 | if (slave->phy) |
3128 | phy_disconnect(slave->phy); | |
3129 | list_del(&slave->slave_list); | |
3130 | } | |
3131 | if (gbe_dev->dummy_ndev) | |
3132 | free_netdev(gbe_dev->dummy_ndev); | |
3133 | } | |
3134 | ||
90cff9e2 WK |
3135 | static int set_xgbe_ethss10_priv(struct gbe_priv *gbe_dev, |
3136 | struct device_node *node) | |
3137 | { | |
3138 | struct resource res; | |
3139 | void __iomem *regs; | |
3140 | int ret, i; | |
3141 | ||
9a391c7b | 3142 | ret = of_address_to_resource(node, XGBE_SS_REG_INDEX, &res); |
90cff9e2 | 3143 | if (ret) { |
21e0e0dd KM |
3144 | dev_err(gbe_dev->dev, |
3145 | "Can't xlate xgbe of node(%s) ss address at %d\n", | |
3146 | node->name, XGBE_SS_REG_INDEX); | |
90cff9e2 WK |
3147 | return ret; |
3148 | } | |
3149 | ||
3150 | regs = devm_ioremap_resource(gbe_dev->dev, &res); | |
3151 | if (IS_ERR(regs)) { | |
21e0e0dd | 3152 | dev_err(gbe_dev->dev, "Failed to map xgbe ss register base\n"); |
90cff9e2 WK |
3153 | return PTR_ERR(regs); |
3154 | } | |
3155 | gbe_dev->ss_regs = regs; | |
3156 | ||
21e0e0dd KM |
3157 | ret = of_address_to_resource(node, XGBE_SM_REG_INDEX, &res); |
3158 | if (ret) { | |
3159 | dev_err(gbe_dev->dev, | |
3160 | "Can't xlate xgbe of node(%s) sm address at %d\n", | |
3161 | node->name, XGBE_SM_REG_INDEX); | |
3162 | return ret; | |
3163 | } | |
3164 | ||
3165 | regs = devm_ioremap_resource(gbe_dev->dev, &res); | |
3166 | if (IS_ERR(regs)) { | |
3167 | dev_err(gbe_dev->dev, "Failed to map xgbe sm register base\n"); | |
3168 | return PTR_ERR(regs); | |
3169 | } | |
3170 | gbe_dev->switch_regs = regs; | |
3171 | ||
90cff9e2 WK |
3172 | ret = of_address_to_resource(node, XGBE_SERDES_REG_INDEX, &res); |
3173 | if (ret) { | |
21e0e0dd KM |
3174 | dev_err(gbe_dev->dev, |
3175 | "Can't xlate xgbe serdes of node(%s) address at %d\n", | |
3176 | node->name, XGBE_SERDES_REG_INDEX); | |
90cff9e2 WK |
3177 | return ret; |
3178 | } | |
3179 | ||
3180 | regs = devm_ioremap_resource(gbe_dev->dev, &res); | |
3181 | if (IS_ERR(regs)) { | |
3182 | dev_err(gbe_dev->dev, "Failed to map xgbe serdes register base\n"); | |
3183 | return PTR_ERR(regs); | |
3184 | } | |
3185 | gbe_dev->xgbe_serdes_regs = regs; | |
3186 | ||
489e8a2f | 3187 | gbe_dev->num_stats_mods = gbe_dev->max_num_ports; |
208c6b9a WK |
3188 | gbe_dev->et_stats = xgbe10_et_stats; |
3189 | gbe_dev->num_et_stats = ARRAY_SIZE(xgbe10_et_stats); | |
3190 | ||
90cff9e2 | 3191 | gbe_dev->hw_stats = devm_kzalloc(gbe_dev->dev, |
208c6b9a WK |
3192 | gbe_dev->num_et_stats * sizeof(u64), |
3193 | GFP_KERNEL); | |
90cff9e2 WK |
3194 | if (!gbe_dev->hw_stats) { |
3195 | dev_err(gbe_dev->dev, "hw_stats memory allocation failed\n"); | |
3196 | return -ENOMEM; | |
3197 | } | |
3198 | ||
489e8a2f WK |
3199 | gbe_dev->hw_stats_prev = |
3200 | devm_kzalloc(gbe_dev->dev, | |
3201 | gbe_dev->num_et_stats * sizeof(u32), | |
3202 | GFP_KERNEL); | |
3203 | if (!gbe_dev->hw_stats_prev) { | |
3204 | dev_err(gbe_dev->dev, | |
3205 | "hw_stats_prev memory allocation failed\n"); | |
3206 | return -ENOMEM; | |
3207 | } | |
3208 | ||
90cff9e2 WK |
3209 | gbe_dev->ss_version = XGBE_SS_VERSION_10; |
3210 | gbe_dev->sgmii_port_regs = gbe_dev->ss_regs + | |
3211 | XGBE10_SGMII_MODULE_OFFSET; | |
90cff9e2 WK |
3212 | gbe_dev->host_port_regs = gbe_dev->ss_regs + XGBE10_HOST_PORT_OFFSET; |
3213 | ||
9a391c7b | 3214 | for (i = 0; i < gbe_dev->max_num_ports; i++) |
21e0e0dd | 3215 | gbe_dev->hw_stats_regs[i] = gbe_dev->switch_regs + |
90cff9e2 WK |
3216 | XGBE10_HW_STATS_OFFSET + (GBE_HW_STATS_REG_MAP_SZ * i); |
3217 | ||
9a391c7b | 3218 | gbe_dev->ale_reg = gbe_dev->switch_regs + XGBE10_ALE_OFFSET; |
6246168b | 3219 | gbe_dev->cpts_reg = gbe_dev->switch_regs + XGBE10_CPTS_OFFSET; |
9a391c7b | 3220 | gbe_dev->ale_ports = gbe_dev->max_num_ports; |
90cff9e2 WK |
3221 | gbe_dev->host_port = XGBE10_HOST_PORT_NUM; |
3222 | gbe_dev->ale_entries = XGBE10_NUM_ALE_ENTRIES; | |
9a391c7b | 3223 | gbe_dev->stats_en_mask = (1 << (gbe_dev->max_num_ports)) - 1; |
90cff9e2 WK |
3224 | |
3225 | /* Subsystem registers */ | |
3226 | XGBE_SET_REG_OFS(gbe_dev, ss_regs, id_ver); | |
3227 | XGBE_SET_REG_OFS(gbe_dev, ss_regs, control); | |
3228 | ||
3229 | /* Switch module registers */ | |
3230 | XGBE_SET_REG_OFS(gbe_dev, switch_regs, id_ver); | |
3231 | XGBE_SET_REG_OFS(gbe_dev, switch_regs, control); | |
3232 | XGBE_SET_REG_OFS(gbe_dev, switch_regs, ptype); | |
3233 | XGBE_SET_REG_OFS(gbe_dev, switch_regs, stat_port_en); | |
3234 | XGBE_SET_REG_OFS(gbe_dev, switch_regs, flow_control); | |
3235 | ||
3236 | /* Host port registers */ | |
3237 | XGBE_SET_REG_OFS(gbe_dev, host_port_regs, port_vlan); | |
3238 | XGBE_SET_REG_OFS(gbe_dev, host_port_regs, tx_pri_map); | |
3239 | XGBE_SET_REG_OFS(gbe_dev, host_port_regs, rx_maxlen); | |
3240 | return 0; | |
3241 | } | |
3242 | ||
6f8d3f33 WK |
3243 | static int get_gbe_resource_version(struct gbe_priv *gbe_dev, |
3244 | struct device_node *node) | |
3245 | { | |
3246 | struct resource res; | |
3247 | void __iomem *regs; | |
3248 | int ret; | |
3249 | ||
21e0e0dd | 3250 | ret = of_address_to_resource(node, GBE_SS_REG_INDEX, &res); |
6f8d3f33 | 3251 | if (ret) { |
21e0e0dd KM |
3252 | dev_err(gbe_dev->dev, |
3253 | "Can't translate of node(%s) of gbe ss address at %d\n", | |
3254 | node->name, GBE_SS_REG_INDEX); | |
6f8d3f33 WK |
3255 | return ret; |
3256 | } | |
3257 | ||
3258 | regs = devm_ioremap_resource(gbe_dev->dev, &res); | |
3259 | if (IS_ERR(regs)) { | |
3260 | dev_err(gbe_dev->dev, "Failed to map gbe register base\n"); | |
3261 | return PTR_ERR(regs); | |
3262 | } | |
3263 | gbe_dev->ss_regs = regs; | |
3264 | gbe_dev->ss_version = readl(gbe_dev->ss_regs); | |
3265 | return 0; | |
3266 | } | |
3267 | ||
3268 | static int set_gbe_ethss14_priv(struct gbe_priv *gbe_dev, | |
3269 | struct device_node *node) | |
3270 | { | |
21e0e0dd | 3271 | struct resource res; |
6f8d3f33 | 3272 | void __iomem *regs; |
21e0e0dd KM |
3273 | int i, ret; |
3274 | ||
3275 | ret = of_address_to_resource(node, GBE_SGMII34_REG_INDEX, &res); | |
3276 | if (ret) { | |
3277 | dev_err(gbe_dev->dev, | |
3278 | "Can't translate of gbe node(%s) address at index %d\n", | |
3279 | node->name, GBE_SGMII34_REG_INDEX); | |
3280 | return ret; | |
3281 | } | |
3282 | ||
3283 | regs = devm_ioremap_resource(gbe_dev->dev, &res); | |
3284 | if (IS_ERR(regs)) { | |
3285 | dev_err(gbe_dev->dev, | |
3286 | "Failed to map gbe sgmii port34 register base\n"); | |
3287 | return PTR_ERR(regs); | |
3288 | } | |
3289 | gbe_dev->sgmii_port34_regs = regs; | |
3290 | ||
3291 | ret = of_address_to_resource(node, GBE_SM_REG_INDEX, &res); | |
3292 | if (ret) { | |
3293 | dev_err(gbe_dev->dev, | |
3294 | "Can't translate of gbe node(%s) address at index %d\n", | |
3295 | node->name, GBE_SM_REG_INDEX); | |
3296 | return ret; | |
3297 | } | |
3298 | ||
3299 | regs = devm_ioremap_resource(gbe_dev->dev, &res); | |
3300 | if (IS_ERR(regs)) { | |
3301 | dev_err(gbe_dev->dev, | |
3302 | "Failed to map gbe switch module register base\n"); | |
3303 | return PTR_ERR(regs); | |
3304 | } | |
3305 | gbe_dev->switch_regs = regs; | |
6f8d3f33 | 3306 | |
489e8a2f | 3307 | gbe_dev->num_stats_mods = gbe_dev->max_num_slaves; |
208c6b9a WK |
3308 | gbe_dev->et_stats = gbe13_et_stats; |
3309 | gbe_dev->num_et_stats = ARRAY_SIZE(gbe13_et_stats); | |
3310 | ||
6f8d3f33 | 3311 | gbe_dev->hw_stats = devm_kzalloc(gbe_dev->dev, |
208c6b9a WK |
3312 | gbe_dev->num_et_stats * sizeof(u64), |
3313 | GFP_KERNEL); | |
6f8d3f33 WK |
3314 | if (!gbe_dev->hw_stats) { |
3315 | dev_err(gbe_dev->dev, "hw_stats memory allocation failed\n"); | |
3316 | return -ENOMEM; | |
3317 | } | |
3318 | ||
489e8a2f WK |
3319 | gbe_dev->hw_stats_prev = |
3320 | devm_kzalloc(gbe_dev->dev, | |
3321 | gbe_dev->num_et_stats * sizeof(u32), | |
3322 | GFP_KERNEL); | |
3323 | if (!gbe_dev->hw_stats_prev) { | |
3324 | dev_err(gbe_dev->dev, | |
3325 | "hw_stats_prev memory allocation failed\n"); | |
3326 | return -ENOMEM; | |
3327 | } | |
3328 | ||
21e0e0dd KM |
3329 | gbe_dev->sgmii_port_regs = gbe_dev->ss_regs + GBE13_SGMII_MODULE_OFFSET; |
3330 | gbe_dev->host_port_regs = gbe_dev->switch_regs + GBE13_HOST_PORT_OFFSET; | |
6f8d3f33 | 3331 | |
a94bcd09 WK |
3332 | /* K2HK has only 2 hw stats modules visible at a time, so |
3333 | * module 0 & 2 points to one base and | |
3334 | * module 1 & 3 points to the other base | |
3335 | */ | |
9a391c7b | 3336 | for (i = 0; i < gbe_dev->max_num_slaves; i++) { |
21e0e0dd KM |
3337 | gbe_dev->hw_stats_regs[i] = |
3338 | gbe_dev->switch_regs + GBE13_HW_STATS_OFFSET + | |
a94bcd09 | 3339 | (GBE_HW_STATS_REG_MAP_SZ * (i & 0x1)); |
21e0e0dd | 3340 | } |
6f8d3f33 | 3341 | |
6246168b | 3342 | gbe_dev->cpts_reg = gbe_dev->switch_regs + GBE13_CPTS_OFFSET; |
21e0e0dd | 3343 | gbe_dev->ale_reg = gbe_dev->switch_regs + GBE13_ALE_OFFSET; |
9a391c7b | 3344 | gbe_dev->ale_ports = gbe_dev->max_num_ports; |
6f8d3f33 WK |
3345 | gbe_dev->host_port = GBE13_HOST_PORT_NUM; |
3346 | gbe_dev->ale_entries = GBE13_NUM_ALE_ENTRIES; | |
9a391c7b | 3347 | gbe_dev->stats_en_mask = GBE13_REG_VAL_STAT_ENABLE_ALL; |
6f8d3f33 WK |
3348 | |
3349 | /* Subsystem registers */ | |
3350 | GBE_SET_REG_OFS(gbe_dev, ss_regs, id_ver); | |
3351 | ||
3352 | /* Switch module registers */ | |
3353 | GBE_SET_REG_OFS(gbe_dev, switch_regs, id_ver); | |
3354 | GBE_SET_REG_OFS(gbe_dev, switch_regs, control); | |
3355 | GBE_SET_REG_OFS(gbe_dev, switch_regs, soft_reset); | |
3356 | GBE_SET_REG_OFS(gbe_dev, switch_regs, stat_port_en); | |
3357 | GBE_SET_REG_OFS(gbe_dev, switch_regs, ptype); | |
3358 | GBE_SET_REG_OFS(gbe_dev, switch_regs, flow_control); | |
3359 | ||
3360 | /* Host port registers */ | |
3361 | GBE_SET_REG_OFS(gbe_dev, host_port_regs, port_vlan); | |
3362 | GBE_SET_REG_OFS(gbe_dev, host_port_regs, rx_maxlen); | |
3363 | return 0; | |
3364 | } | |
3365 | ||
9a391c7b WK |
3366 | static int set_gbenu_ethss_priv(struct gbe_priv *gbe_dev, |
3367 | struct device_node *node) | |
3368 | { | |
3369 | struct resource res; | |
3370 | void __iomem *regs; | |
3371 | int i, ret; | |
3372 | ||
489e8a2f | 3373 | gbe_dev->num_stats_mods = gbe_dev->max_num_ports; |
208c6b9a WK |
3374 | gbe_dev->et_stats = gbenu_et_stats; |
3375 | ||
3376 | if (IS_SS_ID_NU(gbe_dev)) | |
3377 | gbe_dev->num_et_stats = GBENU_ET_STATS_HOST_SIZE + | |
3378 | (gbe_dev->max_num_slaves * GBENU_ET_STATS_PORT_SIZE); | |
3379 | else | |
3380 | gbe_dev->num_et_stats = GBENU_ET_STATS_HOST_SIZE + | |
3381 | GBENU_ET_STATS_PORT_SIZE; | |
3382 | ||
9a391c7b | 3383 | gbe_dev->hw_stats = devm_kzalloc(gbe_dev->dev, |
208c6b9a WK |
3384 | gbe_dev->num_et_stats * sizeof(u64), |
3385 | GFP_KERNEL); | |
9a391c7b WK |
3386 | if (!gbe_dev->hw_stats) { |
3387 | dev_err(gbe_dev->dev, "hw_stats memory allocation failed\n"); | |
3388 | return -ENOMEM; | |
3389 | } | |
3390 | ||
489e8a2f WK |
3391 | gbe_dev->hw_stats_prev = |
3392 | devm_kzalloc(gbe_dev->dev, | |
3393 | gbe_dev->num_et_stats * sizeof(u32), | |
3394 | GFP_KERNEL); | |
3395 | if (!gbe_dev->hw_stats_prev) { | |
3396 | dev_err(gbe_dev->dev, | |
3397 | "hw_stats_prev memory allocation failed\n"); | |
3398 | return -ENOMEM; | |
3399 | } | |
3400 | ||
9a391c7b WK |
3401 | ret = of_address_to_resource(node, GBENU_SM_REG_INDEX, &res); |
3402 | if (ret) { | |
3403 | dev_err(gbe_dev->dev, | |
3404 | "Can't translate of gbenu node(%s) addr at index %d\n", | |
3405 | node->name, GBENU_SM_REG_INDEX); | |
3406 | return ret; | |
3407 | } | |
3408 | ||
3409 | regs = devm_ioremap_resource(gbe_dev->dev, &res); | |
3410 | if (IS_ERR(regs)) { | |
3411 | dev_err(gbe_dev->dev, | |
3412 | "Failed to map gbenu switch module register base\n"); | |
3413 | return PTR_ERR(regs); | |
3414 | } | |
3415 | gbe_dev->switch_regs = regs; | |
3416 | ||
3417 | gbe_dev->sgmii_port_regs = gbe_dev->ss_regs + GBENU_SGMII_MODULE_OFFSET; | |
8c85151d WK |
3418 | |
3419 | /* Although sgmii modules are mem mapped to one contiguous | |
3420 | * region on GBENU devices, setting sgmii_port34_regs allows | |
3421 | * consistent code when accessing sgmii api | |
3422 | */ | |
3423 | gbe_dev->sgmii_port34_regs = gbe_dev->sgmii_port_regs + | |
3424 | (2 * GBENU_SGMII_MODULE_SIZE); | |
3425 | ||
9a391c7b WK |
3426 | gbe_dev->host_port_regs = gbe_dev->switch_regs + GBENU_HOST_PORT_OFFSET; |
3427 | ||
3428 | for (i = 0; i < (gbe_dev->max_num_ports); i++) | |
3429 | gbe_dev->hw_stats_regs[i] = gbe_dev->switch_regs + | |
3430 | GBENU_HW_STATS_OFFSET + (GBENU_HW_STATS_REG_MAP_SZ * i); | |
3431 | ||
6246168b | 3432 | gbe_dev->cpts_reg = gbe_dev->switch_regs + GBENU_CPTS_OFFSET; |
9a391c7b WK |
3433 | gbe_dev->ale_reg = gbe_dev->switch_regs + GBENU_ALE_OFFSET; |
3434 | gbe_dev->ale_ports = gbe_dev->max_num_ports; | |
3435 | gbe_dev->host_port = GBENU_HOST_PORT_NUM; | |
3436 | gbe_dev->ale_entries = GBE13_NUM_ALE_ENTRIES; | |
9a391c7b WK |
3437 | gbe_dev->stats_en_mask = (1 << (gbe_dev->max_num_ports)) - 1; |
3438 | ||
9a391c7b WK |
3439 | /* Subsystem registers */ |
3440 | GBENU_SET_REG_OFS(gbe_dev, ss_regs, id_ver); | |
3441 | ||
3442 | /* Switch module registers */ | |
3443 | GBENU_SET_REG_OFS(gbe_dev, switch_regs, id_ver); | |
3444 | GBENU_SET_REG_OFS(gbe_dev, switch_regs, control); | |
3445 | GBENU_SET_REG_OFS(gbe_dev, switch_regs, stat_port_en); | |
3446 | GBENU_SET_REG_OFS(gbe_dev, switch_regs, ptype); | |
3447 | ||
3448 | /* Host port registers */ | |
3449 | GBENU_SET_REG_OFS(gbe_dev, host_port_regs, port_vlan); | |
3450 | GBENU_SET_REG_OFS(gbe_dev, host_port_regs, rx_maxlen); | |
3451 | ||
3452 | /* For NU only. 2U does not need tx_pri_map. | |
3453 | * NU cppi port 0 tx pkt streaming interface has (n-1)*8 egress threads | |
3454 | * while 2U has only 1 such thread | |
3455 | */ | |
3456 | GBENU_SET_REG_OFS(gbe_dev, host_port_regs, tx_pri_map); | |
3457 | return 0; | |
3458 | } | |
3459 | ||
6f8d3f33 WK |
3460 | static int gbe_probe(struct netcp_device *netcp_device, struct device *dev, |
3461 | struct device_node *node, void **inst_priv) | |
3462 | { | |
3463 | struct device_node *interfaces, *interface; | |
3464 | struct device_node *secondary_ports; | |
3465 | struct cpsw_ale_params ale_params; | |
3466 | struct gbe_priv *gbe_dev; | |
3467 | u32 slave_num; | |
489e8a2f | 3468 | int i, ret = 0; |
6f8d3f33 WK |
3469 | |
3470 | if (!node) { | |
3471 | dev_err(dev, "device tree info unavailable\n"); | |
3472 | return -ENODEV; | |
3473 | } | |
3474 | ||
3475 | gbe_dev = devm_kzalloc(dev, sizeof(struct gbe_priv), GFP_KERNEL); | |
3476 | if (!gbe_dev) | |
3477 | return -ENOMEM; | |
3478 | ||
9a391c7b WK |
3479 | if (of_device_is_compatible(node, "ti,netcp-gbe-5") || |
3480 | of_device_is_compatible(node, "ti,netcp-gbe")) { | |
3481 | gbe_dev->max_num_slaves = 4; | |
3482 | } else if (of_device_is_compatible(node, "ti,netcp-gbe-9")) { | |
3483 | gbe_dev->max_num_slaves = 8; | |
3484 | } else if (of_device_is_compatible(node, "ti,netcp-gbe-2")) { | |
3485 | gbe_dev->max_num_slaves = 1; | |
3486 | } else if (of_device_is_compatible(node, "ti,netcp-xgbe")) { | |
3487 | gbe_dev->max_num_slaves = 2; | |
3488 | } else { | |
3489 | dev_err(dev, "device tree node for unknown device\n"); | |
3490 | return -EINVAL; | |
3491 | } | |
3492 | gbe_dev->max_num_ports = gbe_dev->max_num_slaves + 1; | |
3493 | ||
6f8d3f33 WK |
3494 | gbe_dev->dev = dev; |
3495 | gbe_dev->netcp_device = netcp_device; | |
3496 | gbe_dev->rx_packet_max = NETCP_MAX_FRAME_SIZE; | |
3497 | ||
3498 | /* init the hw stats lock */ | |
3499 | spin_lock_init(&gbe_dev->hw_stats_lock); | |
3500 | ||
3501 | if (of_find_property(node, "enable-ale", NULL)) { | |
3502 | gbe_dev->enable_ale = true; | |
3503 | dev_info(dev, "ALE enabled\n"); | |
3504 | } else { | |
3505 | gbe_dev->enable_ale = false; | |
3506 | dev_dbg(dev, "ALE bypass enabled*\n"); | |
3507 | } | |
3508 | ||
3509 | ret = of_property_read_u32(node, "tx-queue", | |
3510 | &gbe_dev->tx_queue_id); | |
3511 | if (ret < 0) { | |
3512 | dev_err(dev, "missing tx_queue parameter\n"); | |
3513 | gbe_dev->tx_queue_id = GBE_TX_QUEUE; | |
3514 | } | |
3515 | ||
3516 | ret = of_property_read_string(node, "tx-channel", | |
3517 | &gbe_dev->dma_chan_name); | |
3518 | if (ret < 0) { | |
3519 | dev_err(dev, "missing \"tx-channel\" parameter\n"); | |
31a184b7 | 3520 | return -EINVAL; |
6f8d3f33 WK |
3521 | } |
3522 | ||
3523 | if (!strcmp(node->name, "gbe")) { | |
3524 | ret = get_gbe_resource_version(gbe_dev, node); | |
3525 | if (ret) | |
31a184b7 | 3526 | return ret; |
6f8d3f33 | 3527 | |
9a391c7b WK |
3528 | dev_dbg(dev, "ss_version: 0x%08x\n", gbe_dev->ss_version); |
3529 | ||
3530 | if (gbe_dev->ss_version == GBE_SS_VERSION_14) | |
3531 | ret = set_gbe_ethss14_priv(gbe_dev, node); | |
3532 | else if (IS_SS_ID_MU(gbe_dev)) | |
3533 | ret = set_gbenu_ethss_priv(gbe_dev, node); | |
3534 | else | |
3535 | ret = -ENODEV; | |
3536 | ||
90cff9e2 WK |
3537 | } else if (!strcmp(node->name, "xgbe")) { |
3538 | ret = set_xgbe_ethss10_priv(gbe_dev, node); | |
3539 | if (ret) | |
31a184b7 | 3540 | return ret; |
90cff9e2 WK |
3541 | ret = netcp_xgbe_serdes_init(gbe_dev->xgbe_serdes_regs, |
3542 | gbe_dev->ss_regs); | |
6f8d3f33 WK |
3543 | } else { |
3544 | dev_err(dev, "unknown GBE node(%s)\n", node->name); | |
3545 | ret = -ENODEV; | |
6f8d3f33 WK |
3546 | } |
3547 | ||
31a184b7 KM |
3548 | if (ret) |
3549 | return ret; | |
3550 | ||
6f8d3f33 WK |
3551 | interfaces = of_get_child_by_name(node, "interfaces"); |
3552 | if (!interfaces) | |
3553 | dev_err(dev, "could not find interfaces\n"); | |
3554 | ||
3555 | ret = netcp_txpipe_init(&gbe_dev->tx_pipe, netcp_device, | |
3556 | gbe_dev->dma_chan_name, gbe_dev->tx_queue_id); | |
3557 | if (ret) | |
31a184b7 | 3558 | return ret; |
6f8d3f33 WK |
3559 | |
3560 | ret = netcp_txpipe_open(&gbe_dev->tx_pipe); | |
3561 | if (ret) | |
31a184b7 | 3562 | return ret; |
6f8d3f33 WK |
3563 | |
3564 | /* Create network interfaces */ | |
3565 | INIT_LIST_HEAD(&gbe_dev->gbe_intf_head); | |
3566 | for_each_child_of_node(interfaces, interface) { | |
3567 | ret = of_property_read_u32(interface, "slave-port", &slave_num); | |
3568 | if (ret) { | |
3569 | dev_err(dev, "missing slave-port parameter, skipping interface configuration for %s\n", | |
3570 | interface->name); | |
3571 | continue; | |
3572 | } | |
3573 | gbe_dev->num_slaves++; | |
bd252796 JL |
3574 | if (gbe_dev->num_slaves >= gbe_dev->max_num_slaves) { |
3575 | of_node_put(interface); | |
9a391c7b | 3576 | break; |
bd252796 | 3577 | } |
6f8d3f33 | 3578 | } |
31a184b7 | 3579 | of_node_put(interfaces); |
6f8d3f33 WK |
3580 | |
3581 | if (!gbe_dev->num_slaves) | |
3582 | dev_warn(dev, "No network interface configured\n"); | |
3583 | ||
3584 | /* Initialize Secondary slave ports */ | |
3585 | secondary_ports = of_get_child_by_name(node, "secondary-slave-ports"); | |
3586 | INIT_LIST_HEAD(&gbe_dev->secondary_slaves); | |
9a391c7b | 3587 | if (secondary_ports && (gbe_dev->num_slaves < gbe_dev->max_num_slaves)) |
6f8d3f33 WK |
3588 | init_secondary_ports(gbe_dev, secondary_ports); |
3589 | of_node_put(secondary_ports); | |
3590 | ||
3591 | if (!gbe_dev->num_slaves) { | |
31a184b7 KM |
3592 | dev_err(dev, |
3593 | "No network interface or secondary ports configured\n"); | |
6f8d3f33 | 3594 | ret = -ENODEV; |
31a184b7 | 3595 | goto free_sec_ports; |
6f8d3f33 WK |
3596 | } |
3597 | ||
3598 | memset(&ale_params, 0, sizeof(ale_params)); | |
3599 | ale_params.dev = gbe_dev->dev; | |
3600 | ale_params.ale_regs = gbe_dev->ale_reg; | |
3601 | ale_params.ale_ageout = GBE_DEFAULT_ALE_AGEOUT; | |
3602 | ale_params.ale_entries = gbe_dev->ale_entries; | |
3603 | ale_params.ale_ports = gbe_dev->ale_ports; | |
3604 | ||
3605 | gbe_dev->ale = cpsw_ale_create(&ale_params); | |
3606 | if (!gbe_dev->ale) { | |
3607 | dev_err(gbe_dev->dev, "error initializing ale engine\n"); | |
3608 | ret = -ENODEV; | |
31a184b7 | 3609 | goto free_sec_ports; |
6f8d3f33 WK |
3610 | } else { |
3611 | dev_dbg(gbe_dev->dev, "Created a gbe ale engine\n"); | |
3612 | } | |
3613 | ||
6246168b WK |
3614 | gbe_dev->cpts = cpts_create(gbe_dev->dev, gbe_dev->cpts_reg, node); |
3615 | if (IS_ENABLED(CONFIG_TI_CPTS) && IS_ERR(gbe_dev->cpts)) { | |
3616 | ret = PTR_ERR(gbe_dev->cpts); | |
3617 | goto free_sec_ports; | |
3618 | } | |
3619 | ||
6f8d3f33 WK |
3620 | /* initialize host port */ |
3621 | gbe_init_host_port(gbe_dev); | |
3622 | ||
489e8a2f WK |
3623 | spin_lock_bh(&gbe_dev->hw_stats_lock); |
3624 | for (i = 0; i < gbe_dev->num_stats_mods; i++) { | |
3625 | if (gbe_dev->ss_version == GBE_SS_VERSION_14) | |
3626 | gbe_reset_mod_stats_ver14(gbe_dev, i); | |
3627 | else | |
3628 | gbe_reset_mod_stats(gbe_dev, i); | |
3629 | } | |
3630 | spin_unlock_bh(&gbe_dev->hw_stats_lock); | |
3631 | ||
6f8d3f33 WK |
3632 | init_timer(&gbe_dev->timer); |
3633 | gbe_dev->timer.data = (unsigned long)gbe_dev; | |
3634 | gbe_dev->timer.function = netcp_ethss_timer; | |
3635 | gbe_dev->timer.expires = jiffies + GBE_TIMER_INTERVAL; | |
3636 | add_timer(&gbe_dev->timer); | |
3637 | *inst_priv = gbe_dev; | |
3638 | return 0; | |
3639 | ||
31a184b7 KM |
3640 | free_sec_ports: |
3641 | free_secondary_ports(gbe_dev); | |
6f8d3f33 WK |
3642 | return ret; |
3643 | } | |
3644 | ||
3645 | static int gbe_attach(void *inst_priv, struct net_device *ndev, | |
3646 | struct device_node *node, void **intf_priv) | |
3647 | { | |
3648 | struct gbe_priv *gbe_dev = inst_priv; | |
3649 | struct gbe_intf *gbe_intf; | |
3650 | int ret; | |
3651 | ||
3652 | if (!node) { | |
3653 | dev_err(gbe_dev->dev, "interface node not available\n"); | |
3654 | return -ENODEV; | |
3655 | } | |
3656 | ||
3657 | gbe_intf = devm_kzalloc(gbe_dev->dev, sizeof(*gbe_intf), GFP_KERNEL); | |
3658 | if (!gbe_intf) | |
3659 | return -ENOMEM; | |
3660 | ||
3661 | gbe_intf->ndev = ndev; | |
3662 | gbe_intf->dev = gbe_dev->dev; | |
3663 | gbe_intf->gbe_dev = gbe_dev; | |
3664 | ||
3665 | gbe_intf->slave = devm_kzalloc(gbe_dev->dev, | |
3666 | sizeof(*gbe_intf->slave), | |
3667 | GFP_KERNEL); | |
3668 | if (!gbe_intf->slave) { | |
3669 | ret = -ENOMEM; | |
3670 | goto fail; | |
3671 | } | |
3672 | ||
3673 | if (init_slave(gbe_dev, gbe_intf->slave, node)) { | |
3674 | ret = -ENODEV; | |
3675 | goto fail; | |
3676 | } | |
3677 | ||
3678 | gbe_intf->tx_pipe = gbe_dev->tx_pipe; | |
3679 | ndev->ethtool_ops = &keystone_ethtool_ops; | |
3680 | list_add_tail(&gbe_intf->gbe_intf_list, &gbe_dev->gbe_intf_head); | |
3681 | *intf_priv = gbe_intf; | |
3682 | return 0; | |
3683 | ||
3684 | fail: | |
3685 | if (gbe_intf->slave) | |
3686 | devm_kfree(gbe_dev->dev, gbe_intf->slave); | |
3687 | if (gbe_intf) | |
3688 | devm_kfree(gbe_dev->dev, gbe_intf); | |
3689 | return ret; | |
3690 | } | |
3691 | ||
3692 | static int gbe_release(void *intf_priv) | |
3693 | { | |
3694 | struct gbe_intf *gbe_intf = intf_priv; | |
3695 | ||
3696 | gbe_intf->ndev->ethtool_ops = NULL; | |
3697 | list_del(&gbe_intf->gbe_intf_list); | |
3698 | devm_kfree(gbe_intf->dev, gbe_intf->slave); | |
3699 | devm_kfree(gbe_intf->dev, gbe_intf); | |
3700 | return 0; | |
3701 | } | |
3702 | ||
3703 | static int gbe_remove(struct netcp_device *netcp_device, void *inst_priv) | |
3704 | { | |
3705 | struct gbe_priv *gbe_dev = inst_priv; | |
3706 | ||
3707 | del_timer_sync(&gbe_dev->timer); | |
6246168b | 3708 | cpts_release(gbe_dev->cpts); |
6f8d3f33 WK |
3709 | cpsw_ale_stop(gbe_dev->ale); |
3710 | cpsw_ale_destroy(gbe_dev->ale); | |
3711 | netcp_txpipe_close(&gbe_dev->tx_pipe); | |
3712 | free_secondary_ports(gbe_dev); | |
3713 | ||
3714 | if (!list_empty(&gbe_dev->gbe_intf_head)) | |
31a184b7 KM |
3715 | dev_alert(gbe_dev->dev, |
3716 | "unreleased ethss interfaces present\n"); | |
6f8d3f33 | 3717 | |
6f8d3f33 WK |
3718 | return 0; |
3719 | } | |
3720 | ||
3721 | static struct netcp_module gbe_module = { | |
3722 | .name = GBE_MODULE_NAME, | |
3723 | .owner = THIS_MODULE, | |
3724 | .primary = true, | |
3725 | .probe = gbe_probe, | |
3726 | .open = gbe_open, | |
3727 | .close = gbe_close, | |
3728 | .remove = gbe_remove, | |
3729 | .attach = gbe_attach, | |
3730 | .release = gbe_release, | |
3731 | .add_addr = gbe_add_addr, | |
3732 | .del_addr = gbe_del_addr, | |
3733 | .add_vid = gbe_add_vid, | |
3734 | .del_vid = gbe_del_vid, | |
3735 | .ioctl = gbe_ioctl, | |
3736 | }; | |
3737 | ||
90cff9e2 WK |
3738 | static struct netcp_module xgbe_module = { |
3739 | .name = XGBE_MODULE_NAME, | |
3740 | .owner = THIS_MODULE, | |
3741 | .primary = true, | |
3742 | .probe = gbe_probe, | |
3743 | .open = gbe_open, | |
3744 | .close = gbe_close, | |
3745 | .remove = gbe_remove, | |
3746 | .attach = gbe_attach, | |
3747 | .release = gbe_release, | |
3748 | .add_addr = gbe_add_addr, | |
3749 | .del_addr = gbe_del_addr, | |
3750 | .add_vid = gbe_add_vid, | |
3751 | .del_vid = gbe_del_vid, | |
3752 | .ioctl = gbe_ioctl, | |
3753 | }; | |
3754 | ||
6f8d3f33 WK |
3755 | static int __init keystone_gbe_init(void) |
3756 | { | |
3757 | int ret; | |
3758 | ||
3759 | ret = netcp_register_module(&gbe_module); | |
3760 | if (ret) | |
3761 | return ret; | |
3762 | ||
90cff9e2 WK |
3763 | ret = netcp_register_module(&xgbe_module); |
3764 | if (ret) | |
3765 | return ret; | |
3766 | ||
6f8d3f33 WK |
3767 | return 0; |
3768 | } | |
3769 | module_init(keystone_gbe_init); | |
3770 | ||
3771 | static void __exit keystone_gbe_exit(void) | |
3772 | { | |
3773 | netcp_unregister_module(&gbe_module); | |
90cff9e2 | 3774 | netcp_unregister_module(&xgbe_module); |
6f8d3f33 WK |
3775 | } |
3776 | module_exit(keystone_gbe_exit); | |
58c11b5f KM |
3777 | |
3778 | MODULE_LICENSE("GPL v2"); | |
3779 | MODULE_DESCRIPTION("TI NETCP ETHSS driver for Keystone SOCs"); | |
3780 | MODULE_AUTHOR("Sandeep Nair <sandeep_n@ti.com"); |