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[linux-2.6-block.git] / drivers / net / ethernet / sfc / rx.c
CommitLineData
8ceee660 1/****************************************************************************
f7a6d2c4 2 * Driver for Solarflare network controllers and boards
8ceee660 3 * Copyright 2005-2006 Fen Systems Ltd.
f7a6d2c4 4 * Copyright 2005-2013 Solarflare Communications Inc.
8ceee660
BH
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
9 */
10
11#include <linux/socket.h>
12#include <linux/in.h>
5a0e3ad6 13#include <linux/slab.h>
8ceee660 14#include <linux/ip.h>
c47b2d9d 15#include <linux/ipv6.h>
8ceee660
BH
16#include <linux/tcp.h>
17#include <linux/udp.h>
70c71606 18#include <linux/prefetch.h>
6eb07caf 19#include <linux/moduleparam.h>
2768935a 20#include <linux/iommu.h>
8ceee660
BH
21#include <net/ip.h>
22#include <net/checksum.h>
23#include "net_driver.h"
8ceee660 24#include "efx.h"
add72477 25#include "filter.h"
744093c9 26#include "nic.h"
3273c2e8 27#include "selftest.h"
8ceee660
BH
28#include "workarounds.h"
29
1648a23f
DP
30/* Preferred number of descriptors to fill at once */
31#define EFX_RX_PREFERRED_BATCH 8U
8ceee660 32
2768935a
DP
33/* Number of RX buffers to recycle pages for. When creating the RX page recycle
34 * ring, this number is divided by the number of buffers per page to calculate
35 * the number of pages to store in the RX page recycle ring.
36 */
37#define EFX_RECYCLE_RING_SIZE_IOMMU 4096
1648a23f 38#define EFX_RECYCLE_RING_SIZE_NOIOMMU (2 * EFX_RX_PREFERRED_BATCH)
62b330ba 39
8ceee660 40/* Size of buffer allocated for skb header area. */
d4ef5b6f 41#define EFX_SKB_HEADERS 128u
8ceee660 42
8ceee660
BH
43/* This is the percentage fill level below which new RX descriptors
44 * will be added to the RX descriptor ring.
45 */
64235187 46static unsigned int rx_refill_threshold;
8ceee660 47
85740cdf
BH
48/* Each packet can consume up to ceil(max_frame_len / buffer_size) buffers */
49#define EFX_RX_MAX_FRAGS DIV_ROUND_UP(EFX_MAX_FRAME_LEN(EFX_MAX_MTU), \
50 EFX_RX_USR_BUF_SIZE)
51
8ceee660
BH
52/*
53 * RX maximum head room required.
54 *
85740cdf
BH
55 * This must be at least 1 to prevent overflow, plus one packet-worth
56 * to allow pipelined receives.
8ceee660 57 */
85740cdf 58#define EFX_RXD_HEAD_ROOM (1 + EFX_RX_MAX_FRAGS)
8ceee660 59
b184f16b 60static inline u8 *efx_rx_buf_va(struct efx_rx_buffer *buf)
39c9cf07 61{
b184f16b 62 return page_address(buf->page) + buf->page_offset;
a526f140
SH
63}
64
43a3739d 65static inline u32 efx_rx_buf_hash(struct efx_nic *efx, const u8 *eh)
a526f140 66{
43a3739d
JC
67#if defined(CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS)
68 return __le32_to_cpup((const __le32 *)(eh + efx->rx_packet_hash_offset));
39c9cf07 69#else
43a3739d 70 const u8 *data = eh + efx->rx_packet_hash_offset;
0beaca2c
BH
71 return (u32)data[0] |
72 (u32)data[1] << 8 |
73 (u32)data[2] << 16 |
74 (u32)data[3] << 24;
39c9cf07
BH
75#endif
76}
77
85740cdf
BH
78static inline struct efx_rx_buffer *
79efx_rx_buf_next(struct efx_rx_queue *rx_queue, struct efx_rx_buffer *rx_buf)
80{
81 if (unlikely(rx_buf == efx_rx_buffer(rx_queue, rx_queue->ptr_mask)))
82 return efx_rx_buffer(rx_queue, 0);
83 else
84 return rx_buf + 1;
85}
86
2768935a
DP
87static inline void efx_sync_rx_buffer(struct efx_nic *efx,
88 struct efx_rx_buffer *rx_buf,
89 unsigned int len)
90{
91 dma_sync_single_for_cpu(&efx->pci_dev->dev, rx_buf->dma_addr, len,
92 DMA_FROM_DEVICE);
93}
94
1648a23f
DP
95void efx_rx_config_page_split(struct efx_nic *efx)
96{
2ec03014 97 efx->rx_page_buf_step = ALIGN(efx->rx_dma_len + efx->rx_ip_align,
950c54df 98 EFX_RX_BUF_ALIGNMENT);
1648a23f
DP
99 efx->rx_bufs_per_page = efx->rx_buffer_order ? 1 :
100 ((PAGE_SIZE - sizeof(struct efx_rx_page_state)) /
101 efx->rx_page_buf_step);
102 efx->rx_buffer_truesize = (PAGE_SIZE << efx->rx_buffer_order) /
103 efx->rx_bufs_per_page;
104 efx->rx_pages_per_batch = DIV_ROUND_UP(EFX_RX_PREFERRED_BATCH,
105 efx->rx_bufs_per_page);
106}
107
2768935a
DP
108/* Check the RX page recycle ring for a page that can be reused. */
109static struct page *efx_reuse_page(struct efx_rx_queue *rx_queue)
110{
111 struct efx_nic *efx = rx_queue->efx;
112 struct page *page;
113 struct efx_rx_page_state *state;
114 unsigned index;
115
116 index = rx_queue->page_remove & rx_queue->page_ptr_mask;
117 page = rx_queue->page_ring[index];
118 if (page == NULL)
119 return NULL;
120
121 rx_queue->page_ring[index] = NULL;
122 /* page_remove cannot exceed page_add. */
123 if (rx_queue->page_remove != rx_queue->page_add)
124 ++rx_queue->page_remove;
125
126 /* If page_count is 1 then we hold the only reference to this page. */
127 if (page_count(page) == 1) {
128 ++rx_queue->page_recycle_count;
129 return page;
130 } else {
131 state = page_address(page);
132 dma_unmap_page(&efx->pci_dev->dev, state->dma_addr,
133 PAGE_SIZE << efx->rx_buffer_order,
134 DMA_FROM_DEVICE);
135 put_page(page);
136 ++rx_queue->page_recycle_failed;
137 }
138
139 return NULL;
140}
141
8ceee660 142/**
97d48a10 143 * efx_init_rx_buffers - create EFX_RX_BATCH page-based RX buffers
8ceee660
BH
144 *
145 * @rx_queue: Efx RX queue
8ceee660 146 *
1648a23f
DP
147 * This allocates a batch of pages, maps them for DMA, and populates
148 * struct efx_rx_buffers for each one. Return a negative error code or
149 * 0 on success. If a single page can be used for multiple buffers,
150 * then the page will either be inserted fully, or not at all.
8ceee660 151 */
cce28794 152static int efx_init_rx_buffers(struct efx_rx_queue *rx_queue, bool atomic)
8ceee660
BH
153{
154 struct efx_nic *efx = rx_queue->efx;
f7d6f379
SH
155 struct efx_rx_buffer *rx_buf;
156 struct page *page;
b590ace0 157 unsigned int page_offset;
62b330ba 158 struct efx_rx_page_state *state;
f7d6f379
SH
159 dma_addr_t dma_addr;
160 unsigned index, count;
161
1648a23f
DP
162 count = 0;
163 do {
2768935a
DP
164 page = efx_reuse_page(rx_queue);
165 if (page == NULL) {
cce28794
JC
166 page = alloc_pages(__GFP_COLD | __GFP_COMP |
167 (atomic ? GFP_ATOMIC : GFP_KERNEL),
2768935a
DP
168 efx->rx_buffer_order);
169 if (unlikely(page == NULL))
170 return -ENOMEM;
171 dma_addr =
172 dma_map_page(&efx->pci_dev->dev, page, 0,
173 PAGE_SIZE << efx->rx_buffer_order,
174 DMA_FROM_DEVICE);
175 if (unlikely(dma_mapping_error(&efx->pci_dev->dev,
176 dma_addr))) {
177 __free_pages(page, efx->rx_buffer_order);
178 return -EIO;
179 }
180 state = page_address(page);
181 state->dma_addr = dma_addr;
182 } else {
183 state = page_address(page);
184 dma_addr = state->dma_addr;
8ceee660 185 }
62b330ba 186
62b330ba 187 dma_addr += sizeof(struct efx_rx_page_state);
b590ace0 188 page_offset = sizeof(struct efx_rx_page_state);
f7d6f379 189
1648a23f
DP
190 do {
191 index = rx_queue->added_count & rx_queue->ptr_mask;
192 rx_buf = efx_rx_buffer(rx_queue, index);
2ec03014 193 rx_buf->dma_addr = dma_addr + efx->rx_ip_align;
1648a23f 194 rx_buf->page = page;
2ec03014 195 rx_buf->page_offset = page_offset + efx->rx_ip_align;
1648a23f 196 rx_buf->len = efx->rx_dma_len;
179ea7f0 197 rx_buf->flags = 0;
1648a23f
DP
198 ++rx_queue->added_count;
199 get_page(page);
200 dma_addr += efx->rx_page_buf_step;
201 page_offset += efx->rx_page_buf_step;
202 } while (page_offset + efx->rx_page_buf_step <= PAGE_SIZE);
179ea7f0
BH
203
204 rx_buf->flags = EFX_RX_BUF_LAST_IN_PAGE;
1648a23f 205 } while (++count < efx->rx_pages_per_batch);
8ceee660 206
8ceee660
BH
207 return 0;
208}
209
2768935a
DP
210/* Unmap a DMA-mapped page. This function is only called for the final RX
211 * buffer in a page.
212 */
4d566063 213static void efx_unmap_rx_buffer(struct efx_nic *efx,
2768935a 214 struct efx_rx_buffer *rx_buf)
8ceee660 215{
2768935a
DP
216 struct page *page = rx_buf->page;
217
218 if (page) {
219 struct efx_rx_page_state *state = page_address(page);
220 dma_unmap_page(&efx->pci_dev->dev,
221 state->dma_addr,
222 PAGE_SIZE << efx->rx_buffer_order,
223 DMA_FROM_DEVICE);
8ceee660
BH
224 }
225}
226
9eb0a5d1
DP
227static void efx_free_rx_buffers(struct efx_rx_queue *rx_queue,
228 struct efx_rx_buffer *rx_buf,
229 unsigned int num_bufs)
8ceee660 230{
9eb0a5d1
DP
231 do {
232 if (rx_buf->page) {
233 put_page(rx_buf->page);
234 rx_buf->page = NULL;
235 }
236 rx_buf = efx_rx_buf_next(rx_queue, rx_buf);
237 } while (--num_bufs);
8ceee660
BH
238}
239
2768935a
DP
240/* Attempt to recycle the page if there is an RX recycle ring; the page can
241 * only be added if this is the final RX buffer, to prevent pages being used in
242 * the descriptor ring and appearing in the recycle ring simultaneously.
243 */
244static void efx_recycle_rx_page(struct efx_channel *channel,
245 struct efx_rx_buffer *rx_buf)
8ceee660 246{
2768935a
DP
247 struct page *page = rx_buf->page;
248 struct efx_rx_queue *rx_queue = efx_channel_get_rx_queue(channel);
249 struct efx_nic *efx = rx_queue->efx;
250 unsigned index;
8ceee660 251
2768935a 252 /* Only recycle the page after processing the final buffer. */
179ea7f0 253 if (!(rx_buf->flags & EFX_RX_BUF_LAST_IN_PAGE))
62b330ba 254 return;
24455800 255
2768935a
DP
256 index = rx_queue->page_add & rx_queue->page_ptr_mask;
257 if (rx_queue->page_ring[index] == NULL) {
258 unsigned read_index = rx_queue->page_remove &
259 rx_queue->page_ptr_mask;
24455800 260
2768935a
DP
261 /* The next slot in the recycle ring is available, but
262 * increment page_remove if the read pointer currently
263 * points here.
264 */
265 if (read_index == index)
266 ++rx_queue->page_remove;
267 rx_queue->page_ring[index] = page;
268 ++rx_queue->page_add;
269 return;
270 }
271 ++rx_queue->page_recycle_full;
272 efx_unmap_rx_buffer(efx, rx_buf);
273 put_page(rx_buf->page);
24455800
SH
274}
275
2768935a
DP
276static void efx_fini_rx_buffer(struct efx_rx_queue *rx_queue,
277 struct efx_rx_buffer *rx_buf)
278{
279 /* Release the page reference we hold for the buffer. */
280 if (rx_buf->page)
281 put_page(rx_buf->page);
282
283 /* If this is the last buffer in a page, unmap and free it. */
179ea7f0 284 if (rx_buf->flags & EFX_RX_BUF_LAST_IN_PAGE) {
2768935a 285 efx_unmap_rx_buffer(rx_queue->efx, rx_buf);
9eb0a5d1 286 efx_free_rx_buffers(rx_queue, rx_buf, 1);
2768935a
DP
287 }
288 rx_buf->page = NULL;
289}
290
291/* Recycle the pages that are used by buffers that have just been received. */
734d4e15
BH
292static void efx_recycle_rx_pages(struct efx_channel *channel,
293 struct efx_rx_buffer *rx_buf,
294 unsigned int n_frags)
24455800 295{
f7d12cdc 296 struct efx_rx_queue *rx_queue = efx_channel_get_rx_queue(channel);
24455800 297
85740cdf 298 do {
2768935a 299 efx_recycle_rx_page(channel, rx_buf);
85740cdf
BH
300 rx_buf = efx_rx_buf_next(rx_queue, rx_buf);
301 } while (--n_frags);
24455800
SH
302}
303
734d4e15
BH
304static void efx_discard_rx_packet(struct efx_channel *channel,
305 struct efx_rx_buffer *rx_buf,
306 unsigned int n_frags)
307{
308 struct efx_rx_queue *rx_queue = efx_channel_get_rx_queue(channel);
309
310 efx_recycle_rx_pages(channel, rx_buf, n_frags);
311
9eb0a5d1 312 efx_free_rx_buffers(rx_queue, rx_buf, n_frags);
734d4e15
BH
313}
314
8ceee660
BH
315/**
316 * efx_fast_push_rx_descriptors - push new RX descriptors quickly
317 * @rx_queue: RX descriptor queue
49ce9c2c 318 *
8ceee660 319 * This will aim to fill the RX descriptor queue up to
da9ca505 320 * @rx_queue->@max_fill. If there is insufficient atomic
90d683af
SH
321 * memory to do so, a slow fill will be scheduled.
322 *
323 * The caller must provide serialisation (none is used here). In practise,
324 * this means this function must run from the NAPI handler, or be called
325 * when NAPI is disabled.
8ceee660 326 */
cce28794 327void efx_fast_push_rx_descriptors(struct efx_rx_queue *rx_queue, bool atomic)
8ceee660 328{
1648a23f
DP
329 struct efx_nic *efx = rx_queue->efx;
330 unsigned int fill_level, batch_size;
f7d6f379 331 int space, rc = 0;
8ceee660 332
d8aec745
BH
333 if (!rx_queue->refill_enabled)
334 return;
335
90d683af 336 /* Calculate current fill level, and exit if we don't need to fill */
8ceee660 337 fill_level = (rx_queue->added_count - rx_queue->removed_count);
ecc910f5 338 EFX_BUG_ON_PARANOID(fill_level > rx_queue->efx->rxq_entries);
8ceee660 339 if (fill_level >= rx_queue->fast_fill_trigger)
24455800 340 goto out;
8ceee660
BH
341
342 /* Record minimum fill level */
b3475645 343 if (unlikely(fill_level < rx_queue->min_fill)) {
8ceee660
BH
344 if (fill_level)
345 rx_queue->min_fill = fill_level;
b3475645 346 }
8ceee660 347
1648a23f 348 batch_size = efx->rx_pages_per_batch * efx->rx_bufs_per_page;
da9ca505 349 space = rx_queue->max_fill - fill_level;
1648a23f 350 EFX_BUG_ON_PARANOID(space < batch_size);
8ceee660 351
62776d03
BH
352 netif_vdbg(rx_queue->efx, rx_status, rx_queue->efx->net_dev,
353 "RX queue %d fast-filling descriptor ring from"
97d48a10 354 " level %d to level %d\n",
ba1e8a35 355 efx_rx_queue_index(rx_queue), fill_level,
97d48a10
AR
356 rx_queue->max_fill);
357
8ceee660
BH
358
359 do {
cce28794 360 rc = efx_init_rx_buffers(rx_queue, atomic);
f7d6f379
SH
361 if (unlikely(rc)) {
362 /* Ensure that we don't leave the rx queue empty */
363 if (rx_queue->added_count == rx_queue->removed_count)
364 efx_schedule_slow_fill(rx_queue);
365 goto out;
8ceee660 366 }
1648a23f 367 } while ((space -= batch_size) >= batch_size);
8ceee660 368
62776d03
BH
369 netif_vdbg(rx_queue->efx, rx_status, rx_queue->efx->net_dev,
370 "RX queue %d fast-filled descriptor ring "
ba1e8a35 371 "to level %d\n", efx_rx_queue_index(rx_queue),
62776d03 372 rx_queue->added_count - rx_queue->removed_count);
8ceee660
BH
373
374 out:
24455800
SH
375 if (rx_queue->notified_count != rx_queue->added_count)
376 efx_nic_notify_rx_desc(rx_queue);
8ceee660
BH
377}
378
90d683af 379void efx_rx_slow_fill(unsigned long context)
8ceee660 380{
90d683af 381 struct efx_rx_queue *rx_queue = (struct efx_rx_queue *)context;
8ceee660 382
90d683af 383 /* Post an event to cause NAPI to run and refill the queue */
2ae75dac 384 efx_nic_generate_fill_event(rx_queue);
8ceee660 385 ++rx_queue->slow_fill_count;
8ceee660
BH
386}
387
4d566063
BH
388static void efx_rx_packet__check_len(struct efx_rx_queue *rx_queue,
389 struct efx_rx_buffer *rx_buf,
97d48a10 390 int len)
8ceee660
BH
391{
392 struct efx_nic *efx = rx_queue->efx;
393 unsigned max_len = rx_buf->len - efx->type->rx_buffer_padding;
394
395 if (likely(len <= max_len))
396 return;
397
398 /* The packet must be discarded, but this is only a fatal error
399 * if the caller indicated it was
400 */
db339569 401 rx_buf->flags |= EFX_RX_PKT_DISCARD;
8ceee660
BH
402
403 if ((len > rx_buf->len) && EFX_WORKAROUND_8071(efx)) {
62776d03
BH
404 if (net_ratelimit())
405 netif_err(efx, rx_err, efx->net_dev,
406 " RX queue %d seriously overlength "
407 "RX event (0x%x > 0x%x+0x%x). Leaking\n",
ba1e8a35 408 efx_rx_queue_index(rx_queue), len, max_len,
62776d03 409 efx->type->rx_buffer_padding);
8ceee660
BH
410 efx_schedule_reset(efx, RESET_TYPE_RX_RECOVERY);
411 } else {
62776d03
BH
412 if (net_ratelimit())
413 netif_err(efx, rx_err, efx->net_dev,
414 " RX queue %d overlength RX event "
415 "(0x%x > 0x%x)\n",
ba1e8a35 416 efx_rx_queue_index(rx_queue), len, max_len);
8ceee660
BH
417 }
418
ba1e8a35 419 efx_rx_queue_channel(rx_queue)->n_rx_overlength++;
8ceee660
BH
420}
421
61321d92
BH
422/* Pass a received packet up through GRO. GRO can handle pages
423 * regardless of checksum state and skbs with a good checksum.
8ceee660 424 */
85740cdf
BH
425static void
426efx_rx_packet_gro(struct efx_channel *channel, struct efx_rx_buffer *rx_buf,
427 unsigned int n_frags, u8 *eh)
8ceee660 428{
da3bc071 429 struct napi_struct *napi = &channel->napi_str;
18e1d2be 430 gro_result_t gro_result;
97d48a10 431 struct efx_nic *efx = channel->efx;
97d48a10 432 struct sk_buff *skb;
8ceee660 433
97d48a10 434 skb = napi_get_frags(napi);
85740cdf 435 if (unlikely(!skb)) {
9eb0a5d1
DP
436 struct efx_rx_queue *rx_queue;
437
438 rx_queue = efx_channel_get_rx_queue(channel);
439 efx_free_rx_buffers(rx_queue, rx_buf, n_frags);
97d48a10
AR
440 return;
441 }
76620aaf 442
97d48a10 443 if (efx->net_dev->features & NETIF_F_RXHASH)
c7cb38af
TH
444 skb_set_hash(skb, efx_rx_buf_hash(efx, eh),
445 PKT_HASH_TYPE_L3);
97d48a10
AR
446 skb->ip_summed = ((rx_buf->flags & EFX_RX_PKT_CSUMMED) ?
447 CHECKSUM_UNNECESSARY : CHECKSUM_NONE);
8ceee660 448
85740cdf
BH
449 for (;;) {
450 skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
451 rx_buf->page, rx_buf->page_offset,
452 rx_buf->len);
453 rx_buf->page = NULL;
454 skb->len += rx_buf->len;
455 if (skb_shinfo(skb)->nr_frags == n_frags)
456 break;
3eadb7b0 457
85740cdf
BH
458 rx_buf = efx_rx_buf_next(&channel->rx_queue, rx_buf);
459 }
460
461 skb->data_len = skb->len;
462 skb->truesize += n_frags * efx->rx_buffer_truesize;
463
464 skb_record_rx_queue(skb, channel->rx_queue.core_index);
8ceee660 465
85740cdf 466 gro_result = napi_gro_frags(napi);
97d48a10
AR
467 if (gro_result != GRO_DROP)
468 channel->irq_mod_score += 2;
469}
1241e951 470
85740cdf 471/* Allocate and construct an SKB around page fragments */
97d48a10
AR
472static struct sk_buff *efx_rx_mk_skb(struct efx_channel *channel,
473 struct efx_rx_buffer *rx_buf,
85740cdf 474 unsigned int n_frags,
97d48a10
AR
475 u8 *eh, int hdr_len)
476{
477 struct efx_nic *efx = channel->efx;
478 struct sk_buff *skb;
18e1d2be 479
97d48a10 480 /* Allocate an SKB to store the headers */
2ccd0b19
BH
481 skb = netdev_alloc_skb(efx->net_dev,
482 efx->rx_ip_align + efx->rx_prefix_size +
483 hdr_len);
e4d112e4
EC
484 if (unlikely(skb == NULL)) {
485 atomic_inc(&efx->n_rx_noskb_drops);
97d48a10 486 return NULL;
e4d112e4 487 }
97d48a10
AR
488
489 EFX_BUG_ON_PARANOID(rx_buf->len < hdr_len);
490
2ccd0b19
BH
491 memcpy(skb->data + efx->rx_ip_align, eh - efx->rx_prefix_size,
492 efx->rx_prefix_size + hdr_len);
493 skb_reserve(skb, efx->rx_ip_align + efx->rx_prefix_size);
494 __skb_put(skb, hdr_len);
97d48a10 495
85740cdf 496 /* Append the remaining page(s) onto the frag list */
97d48a10 497 if (rx_buf->len > hdr_len) {
85740cdf
BH
498 rx_buf->page_offset += hdr_len;
499 rx_buf->len -= hdr_len;
500
501 for (;;) {
502 skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
503 rx_buf->page, rx_buf->page_offset,
504 rx_buf->len);
505 rx_buf->page = NULL;
506 skb->len += rx_buf->len;
507 skb->data_len += rx_buf->len;
508 if (skb_shinfo(skb)->nr_frags == n_frags)
509 break;
510
511 rx_buf = efx_rx_buf_next(&channel->rx_queue, rx_buf);
512 }
97d48a10
AR
513 } else {
514 __free_pages(rx_buf->page, efx->rx_buffer_order);
85740cdf
BH
515 rx_buf->page = NULL;
516 n_frags = 0;
18e1d2be 517 }
97d48a10 518
85740cdf 519 skb->truesize += n_frags * efx->rx_buffer_truesize;
97d48a10
AR
520
521 /* Move past the ethernet header */
522 skb->protocol = eth_type_trans(skb, efx->net_dev);
523
36763266
AR
524 skb_mark_napi_id(skb, &channel->napi_str);
525
97d48a10 526 return skb;
8ceee660
BH
527}
528
8ceee660 529void efx_rx_packet(struct efx_rx_queue *rx_queue, unsigned int index,
85740cdf 530 unsigned int n_frags, unsigned int len, u16 flags)
8ceee660
BH
531{
532 struct efx_nic *efx = rx_queue->efx;
ba1e8a35 533 struct efx_channel *channel = efx_rx_queue_channel(rx_queue);
8ceee660 534 struct efx_rx_buffer *rx_buf;
8ceee660 535
8ccf3800
AR
536 rx_queue->rx_packets++;
537
8ceee660 538 rx_buf = efx_rx_buffer(rx_queue, index);
179ea7f0 539 rx_buf->flags |= flags;
8ceee660 540
85740cdf
BH
541 /* Validate the number of fragments and completed length */
542 if (n_frags == 1) {
3dced740
BH
543 if (!(flags & EFX_RX_PKT_PREFIX_LEN))
544 efx_rx_packet__check_len(rx_queue, rx_buf, len);
85740cdf 545 } else if (unlikely(n_frags > EFX_RX_MAX_FRAGS) ||
e8c68c0a
JC
546 unlikely(len <= (n_frags - 1) * efx->rx_dma_len) ||
547 unlikely(len > n_frags * efx->rx_dma_len) ||
85740cdf
BH
548 unlikely(!efx->rx_scatter)) {
549 /* If this isn't an explicit discard request, either
550 * the hardware or the driver is broken.
551 */
552 WARN_ON(!(len == 0 && rx_buf->flags & EFX_RX_PKT_DISCARD));
553 rx_buf->flags |= EFX_RX_PKT_DISCARD;
554 }
8ceee660 555
62776d03 556 netif_vdbg(efx, rx_status, efx->net_dev,
85740cdf 557 "RX queue %d received ids %x-%x len %d %s%s\n",
ba1e8a35 558 efx_rx_queue_index(rx_queue), index,
85740cdf 559 (index + n_frags - 1) & rx_queue->ptr_mask, len,
db339569
BH
560 (rx_buf->flags & EFX_RX_PKT_CSUMMED) ? " [SUMMED]" : "",
561 (rx_buf->flags & EFX_RX_PKT_DISCARD) ? " [DISCARD]" : "");
8ceee660 562
85740cdf
BH
563 /* Discard packet, if instructed to do so. Process the
564 * previous receive first.
565 */
db339569 566 if (unlikely(rx_buf->flags & EFX_RX_PKT_DISCARD)) {
85740cdf 567 efx_rx_flush_packet(channel);
734d4e15 568 efx_discard_rx_packet(channel, rx_buf, n_frags);
85740cdf 569 return;
8ceee660
BH
570 }
571
3dced740 572 if (n_frags == 1 && !(flags & EFX_RX_PKT_PREFIX_LEN))
85740cdf
BH
573 rx_buf->len = len;
574
2768935a
DP
575 /* Release and/or sync the DMA mapping - assumes all RX buffers
576 * consumed in-order per RX queue.
8ceee660 577 */
2768935a 578 efx_sync_rx_buffer(efx, rx_buf, rx_buf->len);
8ceee660
BH
579
580 /* Prefetch nice and early so data will (hopefully) be in cache by
581 * the time we look at it.
582 */
5036b7c7 583 prefetch(efx_rx_buf_va(rx_buf));
8ceee660 584
43a3739d
JC
585 rx_buf->page_offset += efx->rx_prefix_size;
586 rx_buf->len -= efx->rx_prefix_size;
85740cdf
BH
587
588 if (n_frags > 1) {
589 /* Release/sync DMA mapping for additional fragments.
590 * Fix length for last fragment.
591 */
592 unsigned int tail_frags = n_frags - 1;
593
594 for (;;) {
595 rx_buf = efx_rx_buf_next(rx_queue, rx_buf);
596 if (--tail_frags == 0)
597 break;
e8c68c0a 598 efx_sync_rx_buffer(efx, rx_buf, efx->rx_dma_len);
85740cdf 599 }
e8c68c0a 600 rx_buf->len = len - (n_frags - 1) * efx->rx_dma_len;
2768935a 601 efx_sync_rx_buffer(efx, rx_buf, rx_buf->len);
85740cdf 602 }
b74e3e8c 603
734d4e15 604 /* All fragments have been DMA-synced, so recycle pages. */
2768935a 605 rx_buf = efx_rx_buffer(rx_queue, index);
734d4e15 606 efx_recycle_rx_pages(channel, rx_buf, n_frags);
2768935a 607
8ceee660
BH
608 /* Pipeline receives so that we give time for packet headers to be
609 * prefetched into cache.
610 */
ff734ef4 611 efx_rx_flush_packet(channel);
85740cdf
BH
612 channel->rx_pkt_n_frags = n_frags;
613 channel->rx_pkt_index = index;
8ceee660
BH
614}
615
97d48a10 616static void efx_rx_deliver(struct efx_channel *channel, u8 *eh,
85740cdf
BH
617 struct efx_rx_buffer *rx_buf,
618 unsigned int n_frags)
1ddceb4c
BH
619{
620 struct sk_buff *skb;
97d48a10 621 u16 hdr_len = min_t(u16, rx_buf->len, EFX_SKB_HEADERS);
1ddceb4c 622
85740cdf 623 skb = efx_rx_mk_skb(channel, rx_buf, n_frags, eh, hdr_len);
97d48a10 624 if (unlikely(skb == NULL)) {
9eb0a5d1
DP
625 struct efx_rx_queue *rx_queue;
626
627 rx_queue = efx_channel_get_rx_queue(channel);
628 efx_free_rx_buffers(rx_queue, rx_buf, n_frags);
97d48a10
AR
629 return;
630 }
631 skb_record_rx_queue(skb, channel->rx_queue.core_index);
1ddceb4c
BH
632
633 /* Set the SKB flags */
634 skb_checksum_none_assert(skb);
c99dffc4
JC
635 if (likely(rx_buf->flags & EFX_RX_PKT_CSUMMED))
636 skb->ip_summed = CHECKSUM_UNNECESSARY;
1ddceb4c 637
bd9a265d
JC
638 efx_rx_skb_attach_timestamp(channel, skb);
639
c31e5f9f 640 if (channel->type->receive_skb)
4a74dc65 641 if (channel->type->receive_skb(channel, skb))
97d48a10 642 return;
4a74dc65
BH
643
644 /* Pass the packet up */
645 netif_receive_skb(skb);
1ddceb4c
BH
646}
647
8ceee660 648/* Handle a received packet. Second half: Touches packet payload. */
85740cdf 649void __efx_rx_packet(struct efx_channel *channel)
8ceee660
BH
650{
651 struct efx_nic *efx = channel->efx;
85740cdf
BH
652 struct efx_rx_buffer *rx_buf =
653 efx_rx_buffer(&channel->rx_queue, channel->rx_pkt_index);
b74e3e8c 654 u8 *eh = efx_rx_buf_va(rx_buf);
604f6049 655
3dced740
BH
656 /* Read length from the prefix if necessary. This already
657 * excludes the length of the prefix itself.
658 */
659 if (rx_buf->flags & EFX_RX_PKT_PREFIX_LEN)
660 rx_buf->len = le16_to_cpup((__le16 *)
661 (eh + efx->rx_packet_len_offset));
662
3273c2e8
BH
663 /* If we're in loopback test, then pass the packet directly to the
664 * loopback layer, and free the rx_buf here
665 */
666 if (unlikely(efx->loopback_selftest)) {
9eb0a5d1
DP
667 struct efx_rx_queue *rx_queue;
668
a526f140 669 efx_loopback_rx_packet(efx, eh, rx_buf->len);
9eb0a5d1
DP
670 rx_queue = efx_channel_get_rx_queue(channel);
671 efx_free_rx_buffers(rx_queue, rx_buf,
672 channel->rx_pkt_n_frags);
85740cdf 673 goto out;
3273c2e8
BH
674 }
675
abfe9039 676 if (unlikely(!(efx->net_dev->features & NETIF_F_RXCSUM)))
db339569 677 rx_buf->flags &= ~EFX_RX_PKT_CSUMMED;
ab3cf6d0 678
36763266
AR
679 if ((rx_buf->flags & EFX_RX_PKT_TCP) && !channel->type->receive_skb &&
680 !efx_channel_busy_polling(channel))
85740cdf 681 efx_rx_packet_gro(channel, rx_buf, channel->rx_pkt_n_frags, eh);
1ddceb4c 682 else
85740cdf
BH
683 efx_rx_deliver(channel, eh, rx_buf, channel->rx_pkt_n_frags);
684out:
685 channel->rx_pkt_n_frags = 0;
8ceee660
BH
686}
687
688int efx_probe_rx_queue(struct efx_rx_queue *rx_queue)
689{
690 struct efx_nic *efx = rx_queue->efx;
ecc910f5 691 unsigned int entries;
8ceee660
BH
692 int rc;
693
ecc910f5
SH
694 /* Create the smallest power-of-two aligned ring */
695 entries = max(roundup_pow_of_two(efx->rxq_entries), EFX_MIN_DMAQ_SIZE);
696 EFX_BUG_ON_PARANOID(entries > EFX_MAX_DMAQ_SIZE);
697 rx_queue->ptr_mask = entries - 1;
698
62776d03 699 netif_dbg(efx, probe, efx->net_dev,
ecc910f5
SH
700 "creating RX queue %d size %#x mask %#x\n",
701 efx_rx_queue_index(rx_queue), efx->rxq_entries,
702 rx_queue->ptr_mask);
8ceee660
BH
703
704 /* Allocate RX buffers */
c2e4e25a 705 rx_queue->buffer = kcalloc(entries, sizeof(*rx_queue->buffer),
ecc910f5 706 GFP_KERNEL);
8831da7b
BH
707 if (!rx_queue->buffer)
708 return -ENOMEM;
8ceee660 709
152b6a62 710 rc = efx_nic_probe_rx(rx_queue);
8831da7b
BH
711 if (rc) {
712 kfree(rx_queue->buffer);
713 rx_queue->buffer = NULL;
714 }
2768935a 715
8ceee660
BH
716 return rc;
717}
718
debd0034 719static void efx_init_rx_recycle_ring(struct efx_nic *efx,
720 struct efx_rx_queue *rx_queue)
2768935a
DP
721{
722 unsigned int bufs_in_recycle_ring, page_ring_size;
723
724 /* Set the RX recycle ring size */
725#ifdef CONFIG_PPC64
726 bufs_in_recycle_ring = EFX_RECYCLE_RING_SIZE_IOMMU;
727#else
636d73da 728 if (iommu_present(&pci_bus_type))
2768935a
DP
729 bufs_in_recycle_ring = EFX_RECYCLE_RING_SIZE_IOMMU;
730 else
731 bufs_in_recycle_ring = EFX_RECYCLE_RING_SIZE_NOIOMMU;
732#endif /* CONFIG_PPC64 */
733
734 page_ring_size = roundup_pow_of_two(bufs_in_recycle_ring /
735 efx->rx_bufs_per_page);
736 rx_queue->page_ring = kcalloc(page_ring_size,
737 sizeof(*rx_queue->page_ring), GFP_KERNEL);
738 rx_queue->page_ptr_mask = page_ring_size - 1;
739}
740
bc3c90a2 741void efx_init_rx_queue(struct efx_rx_queue *rx_queue)
8ceee660 742{
ecc910f5 743 struct efx_nic *efx = rx_queue->efx;
64235187 744 unsigned int max_fill, trigger, max_trigger;
8ceee660 745
62776d03 746 netif_dbg(rx_queue->efx, drv, rx_queue->efx->net_dev,
ba1e8a35 747 "initialising RX queue %d\n", efx_rx_queue_index(rx_queue));
8ceee660
BH
748
749 /* Initialise ptr fields */
750 rx_queue->added_count = 0;
751 rx_queue->notified_count = 0;
752 rx_queue->removed_count = 0;
753 rx_queue->min_fill = -1U;
2768935a
DP
754 efx_init_rx_recycle_ring(efx, rx_queue);
755
756 rx_queue->page_remove = 0;
757 rx_queue->page_add = rx_queue->page_ptr_mask + 1;
758 rx_queue->page_recycle_count = 0;
759 rx_queue->page_recycle_failed = 0;
760 rx_queue->page_recycle_full = 0;
8ceee660
BH
761
762 /* Initialise limit fields */
ecc910f5 763 max_fill = efx->rxq_entries - EFX_RXD_HEAD_ROOM;
1648a23f
DP
764 max_trigger =
765 max_fill - efx->rx_pages_per_batch * efx->rx_bufs_per_page;
64235187
DR
766 if (rx_refill_threshold != 0) {
767 trigger = max_fill * min(rx_refill_threshold, 100U) / 100U;
768 if (trigger > max_trigger)
769 trigger = max_trigger;
770 } else {
771 trigger = max_trigger;
772 }
8ceee660
BH
773
774 rx_queue->max_fill = max_fill;
775 rx_queue->fast_fill_trigger = trigger;
d8aec745 776 rx_queue->refill_enabled = true;
8ceee660
BH
777
778 /* Set up RX descriptor ring */
152b6a62 779 efx_nic_init_rx(rx_queue);
8ceee660
BH
780}
781
782void efx_fini_rx_queue(struct efx_rx_queue *rx_queue)
783{
784 int i;
2768935a 785 struct efx_nic *efx = rx_queue->efx;
8ceee660
BH
786 struct efx_rx_buffer *rx_buf;
787
62776d03 788 netif_dbg(rx_queue->efx, drv, rx_queue->efx->net_dev,
ba1e8a35 789 "shutting down RX queue %d\n", efx_rx_queue_index(rx_queue));
8ceee660 790
90d683af 791 del_timer_sync(&rx_queue->slow_fill);
8ceee660 792
2768935a 793 /* Release RX buffers from the current read ptr to the write ptr */
8ceee660 794 if (rx_queue->buffer) {
2768935a
DP
795 for (i = rx_queue->removed_count; i < rx_queue->added_count;
796 i++) {
797 unsigned index = i & rx_queue->ptr_mask;
798 rx_buf = efx_rx_buffer(rx_queue, index);
8ceee660
BH
799 efx_fini_rx_buffer(rx_queue, rx_buf);
800 }
801 }
2768935a
DP
802
803 /* Unmap and release the pages in the recycle ring. Remove the ring. */
804 for (i = 0; i <= rx_queue->page_ptr_mask; i++) {
805 struct page *page = rx_queue->page_ring[i];
806 struct efx_rx_page_state *state;
807
808 if (page == NULL)
809 continue;
810
811 state = page_address(page);
812 dma_unmap_page(&efx->pci_dev->dev, state->dma_addr,
813 PAGE_SIZE << efx->rx_buffer_order,
814 DMA_FROM_DEVICE);
815 put_page(page);
816 }
817 kfree(rx_queue->page_ring);
818 rx_queue->page_ring = NULL;
8ceee660
BH
819}
820
821void efx_remove_rx_queue(struct efx_rx_queue *rx_queue)
822{
62776d03 823 netif_dbg(rx_queue->efx, drv, rx_queue->efx->net_dev,
ba1e8a35 824 "destroying RX queue %d\n", efx_rx_queue_index(rx_queue));
8ceee660 825
152b6a62 826 efx_nic_remove_rx(rx_queue);
8ceee660
BH
827
828 kfree(rx_queue->buffer);
829 rx_queue->buffer = NULL;
8ceee660
BH
830}
831
8ceee660 832
8ceee660
BH
833module_param(rx_refill_threshold, uint, 0444);
834MODULE_PARM_DESC(rx_refill_threshold,
64235187 835 "RX descriptor ring refill threshold (%)");
8ceee660 836
add72477
BH
837#ifdef CONFIG_RFS_ACCEL
838
839int efx_filter_rfs(struct net_device *net_dev, const struct sk_buff *skb,
840 u16 rxq_index, u32 flow_id)
841{
842 struct efx_nic *efx = netdev_priv(net_dev);
843 struct efx_channel *channel;
844 struct efx_filter_spec spec;
68bb399e 845 struct flow_keys fk;
add72477
BH
846 int rc;
847
faf8dcc1
JC
848 if (flow_id == RPS_FLOW_ID_INVALID)
849 return -EINVAL;
850
68bb399e
EC
851 if (!skb_flow_dissect_flow_keys(skb, &fk, 0))
852 return -EPROTONOSUPPORT;
add72477 853
68bb399e
EC
854 if (fk.basic.n_proto != htons(ETH_P_IP) && fk.basic.n_proto != htons(ETH_P_IPV6))
855 return -EPROTONOSUPPORT;
856 if (fk.control.flags & FLOW_DIS_IS_FRAGMENT)
add72477 857 return -EPROTONOSUPPORT;
add72477
BH
858
859 efx_filter_init_rx(&spec, EFX_FILTER_PRI_HINT,
860 efx->rx_scatter ? EFX_FILTER_FLAG_RX_SCATTER : 0,
861 rxq_index);
c47b2d9d
BH
862 spec.match_flags =
863 EFX_FILTER_MATCH_ETHER_TYPE | EFX_FILTER_MATCH_IP_PROTO |
864 EFX_FILTER_MATCH_LOC_HOST | EFX_FILTER_MATCH_LOC_PORT |
865 EFX_FILTER_MATCH_REM_HOST | EFX_FILTER_MATCH_REM_PORT;
68bb399e
EC
866 spec.ether_type = fk.basic.n_proto;
867 spec.ip_proto = fk.basic.ip_proto;
868
869 if (fk.basic.n_proto == htons(ETH_P_IP)) {
870 spec.rem_host[0] = fk.addrs.v4addrs.src;
871 spec.loc_host[0] = fk.addrs.v4addrs.dst;
c47b2d9d 872 } else {
68bb399e
EC
873 memcpy(spec.rem_host, &fk.addrs.v6addrs.src, sizeof(struct in6_addr));
874 memcpy(spec.loc_host, &fk.addrs.v6addrs.dst, sizeof(struct in6_addr));
c47b2d9d
BH
875 }
876
68bb399e
EC
877 spec.rem_port = fk.ports.src;
878 spec.loc_port = fk.ports.dst;
add72477
BH
879
880 rc = efx->type->filter_rfs_insert(efx, &spec);
881 if (rc < 0)
882 return rc;
883
884 /* Remember this so we can check whether to expire the filter later */
faf8dcc1
JC
885 channel = efx_get_channel(efx, rxq_index);
886 channel->rps_flow_id[rc] = flow_id;
add72477
BH
887 ++channel->rfs_filters_added;
888
68bb399e 889 if (spec.ether_type == htons(ETH_P_IP))
c47b2d9d
BH
890 netif_info(efx, rx_status, efx->net_dev,
891 "steering %s %pI4:%u:%pI4:%u to queue %u [flow %u filter %d]\n",
892 (spec.ip_proto == IPPROTO_TCP) ? "TCP" : "UDP",
68bb399e
EC
893 spec.rem_host, ntohs(spec.rem_port), spec.loc_host,
894 ntohs(spec.loc_port), rxq_index, flow_id, rc);
c47b2d9d
BH
895 else
896 netif_info(efx, rx_status, efx->net_dev,
897 "steering %s [%pI6]:%u:[%pI6]:%u to queue %u [flow %u filter %d]\n",
898 (spec.ip_proto == IPPROTO_TCP) ? "TCP" : "UDP",
68bb399e
EC
899 spec.rem_host, ntohs(spec.rem_port), spec.loc_host,
900 ntohs(spec.loc_port), rxq_index, flow_id, rc);
add72477
BH
901
902 return rc;
903}
904
905bool __efx_filter_rfs_expire(struct efx_nic *efx, unsigned int quota)
906{
907 bool (*expire_one)(struct efx_nic *efx, u32 flow_id, unsigned int index);
faf8dcc1 908 unsigned int channel_idx, index, size;
add72477
BH
909 u32 flow_id;
910
911 if (!spin_trylock_bh(&efx->filter_lock))
912 return false;
913
914 expire_one = efx->type->filter_rfs_expire_one;
faf8dcc1 915 channel_idx = efx->rps_expire_channel;
add72477
BH
916 index = efx->rps_expire_index;
917 size = efx->type->max_rx_ip_filters;
918 while (quota--) {
faf8dcc1
JC
919 struct efx_channel *channel = efx_get_channel(efx, channel_idx);
920 flow_id = channel->rps_flow_id[index];
921
922 if (flow_id != RPS_FLOW_ID_INVALID &&
923 expire_one(efx, flow_id, index)) {
add72477 924 netif_info(efx, rx_status, efx->net_dev,
faf8dcc1
JC
925 "expired filter %d [queue %u flow %u]\n",
926 index, channel_idx, flow_id);
927 channel->rps_flow_id[index] = RPS_FLOW_ID_INVALID;
928 }
929 if (++index == size) {
930 if (++channel_idx == efx->n_channels)
931 channel_idx = 0;
add72477 932 index = 0;
faf8dcc1 933 }
add72477 934 }
faf8dcc1 935 efx->rps_expire_channel = channel_idx;
add72477
BH
936 efx->rps_expire_index = index;
937
938 spin_unlock_bh(&efx->filter_lock);
939 return true;
940}
941
942#endif /* CONFIG_RFS_ACCEL */
b883d0bd
BH
943
944/**
945 * efx_filter_is_mc_recipient - test whether spec is a multicast recipient
946 * @spec: Specification to test
947 *
948 * Return: %true if the specification is a non-drop RX filter that
949 * matches a local MAC address I/G bit value of 1 or matches a local
950 * IPv4 or IPv6 address value in the respective multicast address
951 * range. Otherwise %false.
952 */
953bool efx_filter_is_mc_recipient(const struct efx_filter_spec *spec)
954{
955 if (!(spec->flags & EFX_FILTER_FLAG_RX) ||
956 spec->dmaq_id == EFX_FILTER_RX_DMAQ_ID_DROP)
957 return false;
958
959 if (spec->match_flags &
960 (EFX_FILTER_MATCH_LOC_MAC | EFX_FILTER_MATCH_LOC_MAC_IG) &&
961 is_multicast_ether_addr(spec->loc_mac))
962 return true;
963
964 if ((spec->match_flags &
965 (EFX_FILTER_MATCH_ETHER_TYPE | EFX_FILTER_MATCH_LOC_HOST)) ==
966 (EFX_FILTER_MATCH_ETHER_TYPE | EFX_FILTER_MATCH_LOC_HOST)) {
967 if (spec->ether_type == htons(ETH_P_IP) &&
968 ipv4_is_multicast(spec->loc_host[0]))
969 return true;
970 if (spec->ether_type == htons(ETH_P_IPV6) &&
971 ((const u8 *)spec->loc_host)[0] == 0xff)
972 return true;
973 }
974
975 return false;
976}