Commit | Line | Data |
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d2912cb1 | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
8ceee660 | 2 | /**************************************************************************** |
f7a6d2c4 | 3 | * Driver for Solarflare network controllers and boards |
8ceee660 | 4 | * Copyright 2005-2006 Fen Systems Ltd. |
f7a6d2c4 | 5 | * Copyright 2006-2013 Solarflare Communications Inc. |
8ceee660 BH |
6 | */ |
7 | ||
8 | #ifndef EFX_EFX_H | |
9 | #define EFX_EFX_H | |
10 | ||
11 | #include "net_driver.h" | |
64eebcfd | 12 | #include "filter.h" |
8ceee660 | 13 | |
e340be92 SS |
14 | int efx_net_open(struct net_device *net_dev); |
15 | int efx_net_stop(struct net_device *net_dev); | |
16 | ||
8ceee660 | 17 | /* TX */ |
00aef986 | 18 | void efx_init_tx_queue_core_txq(struct efx_tx_queue *tx_queue); |
00aef986 JP |
19 | netdev_tx_t efx_hard_start_xmit(struct sk_buff *skb, |
20 | struct net_device *net_dev); | |
21 | netdev_tx_t efx_enqueue_skb(struct efx_tx_queue *tx_queue, struct sk_buff *skb); | |
22 | void efx_xmit_done(struct efx_tx_queue *tx_queue, unsigned int index); | |
3b4f06c7 | 23 | void efx_xmit_done_single(struct efx_tx_queue *tx_queue); |
2572ac53 | 24 | int efx_setup_tc(struct net_device *net_dev, enum tc_setup_type type, |
de4784ca | 25 | void *type_data); |
183233be | 26 | extern unsigned int efx_piobuf_size; |
b0fbdae1 | 27 | extern bool efx_separate_tx_channels; |
8ceee660 BH |
28 | |
29 | /* RX */ | |
00aef986 JP |
30 | void __efx_rx_packet(struct efx_channel *channel); |
31 | void efx_rx_packet(struct efx_rx_queue *rx_queue, unsigned int index, | |
32 | unsigned int n_frags, unsigned int len, u16 flags); | |
ff734ef4 BH |
33 | static inline void efx_rx_flush_packet(struct efx_channel *channel) |
34 | { | |
85740cdf BH |
35 | if (channel->rx_pkt_n_frags) |
36 | __efx_rx_packet(channel); | |
ff734ef4 | 37 | } |
ecc910f5 SH |
38 | |
39 | #define EFX_MAX_DMAQ_SIZE 4096UL | |
40 | #define EFX_DEFAULT_DMAQ_SIZE 1024UL | |
41 | #define EFX_MIN_DMAQ_SIZE 512UL | |
42 | ||
43 | #define EFX_MAX_EVQ_SIZE 16384UL | |
44 | #define EFX_MIN_EVQ_SIZE 512UL | |
8ceee660 | 45 | |
7e6d06f0 BH |
46 | /* Maximum number of TCP segments we support for soft-TSO */ |
47 | #define EFX_TSO_MAX_SEGS 100 | |
48 | ||
49 | /* The smallest [rt]xq_entries that the driver supports. RX minimum | |
50 | * is a bit arbitrary. For TX, we must have space for at least 2 | |
51 | * TSO skbs. | |
52 | */ | |
53 | #define EFX_RXQ_MIN_ENT 128U | |
54 | #define EFX_TXQ_MIN_ENT(efx) (2 * efx_tx_max_skb_descs(efx)) | |
4642610c | 55 | |
a53d26eb BK |
56 | /* All EF10 architecture NICs steal one bit of the DMAQ size for various |
57 | * other purposes when counting TxQ entries, so we halve the queue size. | |
58 | */ | |
59 | #define EFX_TXQ_MAX_ENT(efx) (EFX_WORKAROUND_EF10(efx) ? \ | |
d9317aea BH |
60 | EFX_MAX_DMAQ_SIZE / 2 : EFX_MAX_DMAQ_SIZE) |
61 | ||
f1c2ef40 BK |
62 | static inline bool efx_rss_enabled(struct efx_nic *efx) |
63 | { | |
64 | return efx->rss_spread > 1; | |
65 | } | |
66 | ||
64eebcfd | 67 | /* Filters */ |
add72477 BH |
68 | |
69 | /** | |
70 | * efx_filter_insert_filter - add or replace a filter | |
71 | * @efx: NIC in which to insert the filter | |
72 | * @spec: Specification for the filter | |
73 | * @replace_equal: Flag for whether the specified filter may replace an | |
74 | * existing filter with equal priority | |
75 | * | |
76 | * On success, return the filter ID. | |
77 | * On failure, return a negative error code. | |
78 | * | |
b883d0bd BH |
79 | * If existing filters have equal match values to the new filter spec, |
80 | * then the new filter might replace them or the function might fail, | |
81 | * as follows. | |
82 | * | |
83 | * 1. If the existing filters have lower priority, or @replace_equal | |
84 | * is set and they have equal priority, replace them. | |
85 | * | |
86 | * 2. If the existing filters have higher priority, return -%EPERM. | |
87 | * | |
88 | * 3. If !efx_filter_is_mc_recipient(@spec), or the NIC does not | |
89 | * support delivery to multiple recipients, return -%EEXIST. | |
90 | * | |
91 | * This implies that filters for multiple multicast recipients must | |
92 | * all be inserted with the same priority and @replace_equal = %false. | |
add72477 BH |
93 | */ |
94 | static inline s32 efx_filter_insert_filter(struct efx_nic *efx, | |
95 | struct efx_filter_spec *spec, | |
96 | bool replace_equal) | |
97 | { | |
98 | return efx->type->filter_insert(efx, spec, replace_equal); | |
99 | } | |
100 | ||
101 | /** | |
102 | * efx_filter_remove_id_safe - remove a filter by ID, carefully | |
103 | * @efx: NIC from which to remove the filter | |
104 | * @priority: Priority of filter, as passed to @efx_filter_insert_filter | |
105 | * @filter_id: ID of filter, as returned by @efx_filter_insert_filter | |
106 | * | |
107 | * This function will range-check @filter_id, so it is safe to call | |
108 | * with a value passed from userland. | |
109 | */ | |
110 | static inline int efx_filter_remove_id_safe(struct efx_nic *efx, | |
111 | enum efx_filter_priority priority, | |
112 | u32 filter_id) | |
113 | { | |
114 | return efx->type->filter_remove_safe(efx, priority, filter_id); | |
115 | } | |
116 | ||
117 | /** | |
118 | * efx_filter_get_filter_safe - retrieve a filter by ID, carefully | |
119 | * @efx: NIC from which to remove the filter | |
120 | * @priority: Priority of filter, as passed to @efx_filter_insert_filter | |
121 | * @filter_id: ID of filter, as returned by @efx_filter_insert_filter | |
122 | * @spec: Buffer in which to store filter specification | |
123 | * | |
124 | * This function will range-check @filter_id, so it is safe to call | |
125 | * with a value passed from userland. | |
126 | */ | |
127 | static inline int | |
128 | efx_filter_get_filter_safe(struct efx_nic *efx, | |
129 | enum efx_filter_priority priority, | |
130 | u32 filter_id, struct efx_filter_spec *spec) | |
131 | { | |
132 | return efx->type->filter_get_safe(efx, priority, filter_id, spec); | |
133 | } | |
134 | ||
add72477 BH |
135 | static inline u32 efx_filter_count_rx_used(struct efx_nic *efx, |
136 | enum efx_filter_priority priority) | |
137 | { | |
138 | return efx->type->filter_count_rx_used(efx, priority); | |
139 | } | |
140 | static inline u32 efx_filter_get_rx_id_limit(struct efx_nic *efx) | |
141 | { | |
142 | return efx->type->filter_get_rx_id_limit(efx); | |
143 | } | |
144 | static inline s32 efx_filter_get_rx_ids(struct efx_nic *efx, | |
145 | enum efx_filter_priority priority, | |
146 | u32 *buf, u32 size) | |
147 | { | |
148 | return efx->type->filter_get_rx_ids(efx, priority, buf, size); | |
149 | } | |
64d8ad6d | 150 | #ifdef CONFIG_RFS_ACCEL |
00aef986 JP |
151 | int efx_filter_rfs(struct net_device *net_dev, const struct sk_buff *skb, |
152 | u16 rxq_index, u32 flow_id); | |
8490e75c | 153 | bool __efx_filter_rfs_expire(struct efx_channel *channel, unsigned int quota); |
3af0f342 | 154 | static inline void efx_filter_rfs_expire(struct work_struct *data) |
64d8ad6d | 155 | { |
6fbc05e5 EC |
156 | struct delayed_work *dwork = to_delayed_work(data); |
157 | struct efx_channel *channel; | |
158 | unsigned int time, quota; | |
3af0f342 | 159 | |
6fbc05e5 EC |
160 | channel = container_of(dwork, struct efx_channel, filter_work); |
161 | time = jiffies - channel->rfs_last_expiry; | |
8490e75c EC |
162 | quota = channel->rfs_filter_count * time / (30 * HZ); |
163 | if (quota > 20 && __efx_filter_rfs_expire(channel, min(channel->rfs_filter_count, quota))) | |
164 | channel->rfs_last_expiry += time; | |
6fbc05e5 EC |
165 | /* Ensure we do more work eventually even if NAPI poll is not happening */ |
166 | schedule_delayed_work(dwork, 30 * HZ); | |
64d8ad6d BH |
167 | } |
168 | #define efx_filter_rfs_enabled() 1 | |
169 | #else | |
3af0f342 | 170 | static inline void efx_filter_rfs_expire(struct work_struct *data) {} |
64d8ad6d BH |
171 | #define efx_filter_rfs_enabled() 0 |
172 | #endif | |
f8d62037 | 173 | |
42356d9a | 174 | /* RSS contexts */ |
42356d9a EC |
175 | static inline bool efx_rss_active(struct efx_rss_context *ctx) |
176 | { | |
f7226e0f | 177 | return ctx->context_id != EFX_MCDI_RSS_CONTEXT_INVALID; |
42356d9a EC |
178 | } |
179 | ||
f5e7adc3 | 180 | /* Ethtool support */ |
f5e7adc3 BH |
181 | extern const struct ethtool_ops efx_ethtool_ops; |
182 | ||
8ceee660 | 183 | /* Global */ |
539de7c5 BK |
184 | unsigned int efx_usecs_to_ticks(struct efx_nic *efx, unsigned int usecs); |
185 | unsigned int efx_ticks_to_usecs(struct efx_nic *efx, unsigned int ticks); | |
00aef986 JP |
186 | int efx_init_irq_moderation(struct efx_nic *efx, unsigned int tx_usecs, |
187 | unsigned int rx_usecs, bool rx_adaptive, | |
188 | bool rx_may_override_tx); | |
189 | void efx_get_irq_moderation(struct efx_nic *efx, unsigned int *tx_usecs, | |
190 | unsigned int *rx_usecs, bool *rx_adaptive); | |
8ceee660 BH |
191 | |
192 | /* Dummy PHY ops for PHY drivers */ | |
00aef986 JP |
193 | int efx_port_dummy_op_int(struct efx_nic *efx); |
194 | void efx_port_dummy_op_void(struct efx_nic *efx); | |
8ceee660 | 195 | |
e4d112e4 EC |
196 | /* Update the generic software stats in the passed stats array */ |
197 | void efx_update_sw_stats(struct efx_nic *efx, u64 *stats); | |
198 | ||
f4150724 BH |
199 | /* MTD */ |
200 | #ifdef CONFIG_SFC_MTD | |
00aef986 JP |
201 | int efx_mtd_add(struct efx_nic *efx, struct efx_mtd_partition *parts, |
202 | size_t n_parts, size_t sizeof_part); | |
45a3fd55 BH |
203 | static inline int efx_mtd_probe(struct efx_nic *efx) |
204 | { | |
205 | return efx->type->mtd_probe(efx); | |
206 | } | |
00aef986 JP |
207 | void efx_mtd_rename(struct efx_nic *efx); |
208 | void efx_mtd_remove(struct efx_nic *efx); | |
f4150724 BH |
209 | #else |
210 | static inline int efx_mtd_probe(struct efx_nic *efx) { return 0; } | |
211 | static inline void efx_mtd_rename(struct efx_nic *efx) {} | |
212 | static inline void efx_mtd_remove(struct efx_nic *efx) {} | |
213 | #endif | |
8ceee660 | 214 | |
7fa8d547 SS |
215 | #ifdef CONFIG_SFC_SRIOV |
216 | static inline unsigned int efx_vf_size(struct efx_nic *efx) | |
217 | { | |
218 | return 1 << efx->vi_scale; | |
219 | } | |
220 | #endif | |
221 | ||
8ceee660 BH |
222 | static inline void efx_schedule_channel(struct efx_channel *channel) |
223 | { | |
62776d03 BH |
224 | netif_vdbg(channel->efx, intr, channel->efx->net_dev, |
225 | "channel %d scheduling NAPI poll on CPU%d\n", | |
226 | channel->channel, raw_smp_processor_id()); | |
8ceee660 | 227 | |
288379f0 | 228 | napi_schedule(&channel->napi_str); |
8ceee660 BH |
229 | } |
230 | ||
1646a6f3 BH |
231 | static inline void efx_schedule_channel_irq(struct efx_channel *channel) |
232 | { | |
dd40781e | 233 | channel->event_test_cpu = raw_smp_processor_id(); |
1646a6f3 BH |
234 | efx_schedule_channel(channel); |
235 | } | |
236 | ||
c2ab85d2 | 237 | void efx_link_clear_advertising(struct efx_nic *efx); |
00aef986 | 238 | void efx_link_set_wanted_fc(struct efx_nic *efx, u8); |
fdaa9aed | 239 | |
c2f3b8e3 DP |
240 | static inline void efx_device_detach_sync(struct efx_nic *efx) |
241 | { | |
242 | struct net_device *dev = efx->net_dev; | |
243 | ||
244 | /* Lock/freeze all TX queues so that we can be sure the | |
245 | * TX scheduler is stopped when we're done and before | |
246 | * netif_device_present() becomes false. | |
247 | */ | |
35205b21 | 248 | netif_tx_lock_bh(dev); |
c2f3b8e3 | 249 | netif_device_detach(dev); |
35205b21 | 250 | netif_tx_unlock_bh(dev); |
c2f3b8e3 DP |
251 | } |
252 | ||
9c568fd8 PD |
253 | static inline void efx_device_attach_if_not_resetting(struct efx_nic *efx) |
254 | { | |
255 | if ((efx->state != STATE_DISABLED) && !efx->reset_pending) | |
256 | netif_device_attach(efx->net_dev); | |
257 | } | |
258 | ||
dd98708c EC |
259 | static inline bool efx_rwsem_assert_write_locked(struct rw_semaphore *sem) |
260 | { | |
261 | if (WARN_ON(down_read_trylock(sem))) { | |
262 | up_read(sem); | |
263 | return false; | |
264 | } | |
265 | return true; | |
266 | } | |
267 | ||
dfe44c1f CM |
268 | int efx_xdp_tx_buffers(struct efx_nic *efx, int n, struct xdp_frame **xdpfs, |
269 | bool flush); | |
270 | ||
8ceee660 | 271 | #endif /* EFX_EFX_H */ |