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8ceee660 | 1 | /**************************************************************************** |
f7a6d2c4 | 2 | * Driver for Solarflare network controllers and boards |
8ceee660 | 3 | * Copyright 2005-2006 Fen Systems Ltd. |
f7a6d2c4 | 4 | * Copyright 2006-2013 Solarflare Communications Inc. |
8ceee660 BH |
5 | * |
6 | * This program is free software; you can redistribute it and/or modify it | |
7 | * under the terms of the GNU General Public License version 2 as published | |
8 | * by the Free Software Foundation, incorporated herein by reference. | |
9 | */ | |
10 | ||
11 | #ifndef EFX_EFX_H | |
12 | #define EFX_EFX_H | |
13 | ||
14 | #include "net_driver.h" | |
64eebcfd | 15 | #include "filter.h" |
8ceee660 | 16 | |
dc803df8 BH |
17 | /* Solarstorm controllers use BAR 0 for I/O space and BAR 2(&3) for memory */ |
18 | #define EFX_MEM_BAR 2 | |
19 | ||
8ceee660 | 20 | /* TX */ |
f5e7adc3 BH |
21 | extern int efx_probe_tx_queue(struct efx_tx_queue *tx_queue); |
22 | extern void efx_remove_tx_queue(struct efx_tx_queue *tx_queue); | |
23 | extern void efx_init_tx_queue(struct efx_tx_queue *tx_queue); | |
60031fcc | 24 | extern void efx_init_tx_queue_core_txq(struct efx_tx_queue *tx_queue); |
f5e7adc3 | 25 | extern void efx_fini_tx_queue(struct efx_tx_queue *tx_queue); |
f5e7adc3 BH |
26 | extern netdev_tx_t |
27 | efx_hard_start_xmit(struct sk_buff *skb, struct net_device *net_dev); | |
28 | extern netdev_tx_t | |
29 | efx_enqueue_skb(struct efx_tx_queue *tx_queue, struct sk_buff *skb); | |
59cf09cc | 30 | extern void efx_xmit_done(struct efx_tx_queue *tx_queue, unsigned int index); |
94b274bf | 31 | extern int efx_setup_tc(struct net_device *net_dev, u8 num_tc); |
7e6d06f0 | 32 | extern unsigned int efx_tx_max_skb_descs(struct efx_nic *efx); |
8ceee660 BH |
33 | |
34 | /* RX */ | |
1648a23f | 35 | extern void efx_rx_config_page_split(struct efx_nic *efx); |
f5e7adc3 BH |
36 | extern int efx_probe_rx_queue(struct efx_rx_queue *rx_queue); |
37 | extern void efx_remove_rx_queue(struct efx_rx_queue *rx_queue); | |
38 | extern void efx_init_rx_queue(struct efx_rx_queue *rx_queue); | |
39 | extern void efx_fini_rx_queue(struct efx_rx_queue *rx_queue); | |
f5e7adc3 | 40 | extern void efx_fast_push_rx_descriptors(struct efx_rx_queue *rx_queue); |
90d683af | 41 | extern void efx_rx_slow_fill(unsigned long context); |
85740cdf BH |
42 | extern void __efx_rx_packet(struct efx_channel *channel); |
43 | extern void efx_rx_packet(struct efx_rx_queue *rx_queue, | |
44 | unsigned int index, unsigned int n_frags, | |
db339569 | 45 | unsigned int len, u16 flags); |
ff734ef4 BH |
46 | static inline void efx_rx_flush_packet(struct efx_channel *channel) |
47 | { | |
85740cdf BH |
48 | if (channel->rx_pkt_n_frags) |
49 | __efx_rx_packet(channel); | |
ff734ef4 | 50 | } |
90d683af | 51 | extern void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue); |
ecc910f5 SH |
52 | |
53 | #define EFX_MAX_DMAQ_SIZE 4096UL | |
54 | #define EFX_DEFAULT_DMAQ_SIZE 1024UL | |
55 | #define EFX_MIN_DMAQ_SIZE 512UL | |
56 | ||
57 | #define EFX_MAX_EVQ_SIZE 16384UL | |
58 | #define EFX_MIN_EVQ_SIZE 512UL | |
8ceee660 | 59 | |
7e6d06f0 BH |
60 | /* Maximum number of TCP segments we support for soft-TSO */ |
61 | #define EFX_TSO_MAX_SEGS 100 | |
62 | ||
63 | /* The smallest [rt]xq_entries that the driver supports. RX minimum | |
64 | * is a bit arbitrary. For TX, we must have space for at least 2 | |
65 | * TSO skbs. | |
66 | */ | |
67 | #define EFX_RXQ_MIN_ENT 128U | |
68 | #define EFX_TXQ_MIN_ENT(efx) (2 * efx_tx_max_skb_descs(efx)) | |
4642610c | 69 | |
64eebcfd | 70 | /* Filters */ |
add72477 BH |
71 | |
72 | /** | |
73 | * efx_filter_insert_filter - add or replace a filter | |
74 | * @efx: NIC in which to insert the filter | |
75 | * @spec: Specification for the filter | |
76 | * @replace_equal: Flag for whether the specified filter may replace an | |
77 | * existing filter with equal priority | |
78 | * | |
79 | * On success, return the filter ID. | |
80 | * On failure, return a negative error code. | |
81 | * | |
b883d0bd BH |
82 | * If existing filters have equal match values to the new filter spec, |
83 | * then the new filter might replace them or the function might fail, | |
84 | * as follows. | |
85 | * | |
86 | * 1. If the existing filters have lower priority, or @replace_equal | |
87 | * is set and they have equal priority, replace them. | |
88 | * | |
89 | * 2. If the existing filters have higher priority, return -%EPERM. | |
90 | * | |
91 | * 3. If !efx_filter_is_mc_recipient(@spec), or the NIC does not | |
92 | * support delivery to multiple recipients, return -%EEXIST. | |
93 | * | |
94 | * This implies that filters for multiple multicast recipients must | |
95 | * all be inserted with the same priority and @replace_equal = %false. | |
add72477 BH |
96 | */ |
97 | static inline s32 efx_filter_insert_filter(struct efx_nic *efx, | |
98 | struct efx_filter_spec *spec, | |
99 | bool replace_equal) | |
100 | { | |
101 | return efx->type->filter_insert(efx, spec, replace_equal); | |
102 | } | |
103 | ||
104 | /** | |
105 | * efx_filter_remove_id_safe - remove a filter by ID, carefully | |
106 | * @efx: NIC from which to remove the filter | |
107 | * @priority: Priority of filter, as passed to @efx_filter_insert_filter | |
108 | * @filter_id: ID of filter, as returned by @efx_filter_insert_filter | |
109 | * | |
110 | * This function will range-check @filter_id, so it is safe to call | |
111 | * with a value passed from userland. | |
112 | */ | |
113 | static inline int efx_filter_remove_id_safe(struct efx_nic *efx, | |
114 | enum efx_filter_priority priority, | |
115 | u32 filter_id) | |
116 | { | |
117 | return efx->type->filter_remove_safe(efx, priority, filter_id); | |
118 | } | |
119 | ||
120 | /** | |
121 | * efx_filter_get_filter_safe - retrieve a filter by ID, carefully | |
122 | * @efx: NIC from which to remove the filter | |
123 | * @priority: Priority of filter, as passed to @efx_filter_insert_filter | |
124 | * @filter_id: ID of filter, as returned by @efx_filter_insert_filter | |
125 | * @spec: Buffer in which to store filter specification | |
126 | * | |
127 | * This function will range-check @filter_id, so it is safe to call | |
128 | * with a value passed from userland. | |
129 | */ | |
130 | static inline int | |
131 | efx_filter_get_filter_safe(struct efx_nic *efx, | |
132 | enum efx_filter_priority priority, | |
133 | u32 filter_id, struct efx_filter_spec *spec) | |
134 | { | |
135 | return efx->type->filter_get_safe(efx, priority, filter_id, spec); | |
136 | } | |
137 | ||
138 | /** | |
139 | * efx_farch_filter_clear_rx - remove RX filters by priority | |
140 | * @efx: NIC from which to remove the filters | |
141 | * @priority: Maximum priority to remove | |
142 | */ | |
143 | static inline void efx_filter_clear_rx(struct efx_nic *efx, | |
144 | enum efx_filter_priority priority) | |
145 | { | |
146 | return efx->type->filter_clear_rx(efx, priority); | |
147 | } | |
148 | ||
149 | static inline u32 efx_filter_count_rx_used(struct efx_nic *efx, | |
150 | enum efx_filter_priority priority) | |
151 | { | |
152 | return efx->type->filter_count_rx_used(efx, priority); | |
153 | } | |
154 | static inline u32 efx_filter_get_rx_id_limit(struct efx_nic *efx) | |
155 | { | |
156 | return efx->type->filter_get_rx_id_limit(efx); | |
157 | } | |
158 | static inline s32 efx_filter_get_rx_ids(struct efx_nic *efx, | |
159 | enum efx_filter_priority priority, | |
160 | u32 *buf, u32 size) | |
161 | { | |
162 | return efx->type->filter_get_rx_ids(efx, priority, buf, size); | |
163 | } | |
64d8ad6d BH |
164 | #ifdef CONFIG_RFS_ACCEL |
165 | extern int efx_filter_rfs(struct net_device *net_dev, const struct sk_buff *skb, | |
166 | u16 rxq_index, u32 flow_id); | |
167 | extern bool __efx_filter_rfs_expire(struct efx_nic *efx, unsigned quota); | |
168 | static inline void efx_filter_rfs_expire(struct efx_channel *channel) | |
169 | { | |
170 | if (channel->rfs_filters_added >= 60 && | |
171 | __efx_filter_rfs_expire(channel->efx, 100)) | |
172 | channel->rfs_filters_added -= 60; | |
173 | } | |
174 | #define efx_filter_rfs_enabled() 1 | |
175 | #else | |
176 | static inline void efx_filter_rfs_expire(struct efx_channel *channel) {} | |
177 | #define efx_filter_rfs_enabled() 0 | |
178 | #endif | |
b883d0bd | 179 | extern bool efx_filter_is_mc_recipient(const struct efx_filter_spec *spec); |
64eebcfd | 180 | |
8ceee660 | 181 | /* Channels */ |
7f967c01 | 182 | extern int efx_channel_dummy_op_int(struct efx_channel *channel); |
c31e5f9f | 183 | extern void efx_channel_dummy_op_void(struct efx_channel *channel); |
4642610c BH |
184 | extern int |
185 | efx_realloc_channels(struct efx_nic *efx, u32 rxq_entries, u32 txq_entries); | |
8ceee660 BH |
186 | |
187 | /* Ports */ | |
d3245b28 BH |
188 | extern int efx_reconfigure_port(struct efx_nic *efx); |
189 | extern int __efx_reconfigure_port(struct efx_nic *efx); | |
8c8661e4 | 190 | |
f5e7adc3 | 191 | /* Ethtool support */ |
f5e7adc3 BH |
192 | extern const struct ethtool_ops efx_ethtool_ops; |
193 | ||
8c8661e4 | 194 | /* Reset handling */ |
eb9f6744 | 195 | extern int efx_reset(struct efx_nic *efx, enum reset_type method); |
d3245b28 BH |
196 | extern void efx_reset_down(struct efx_nic *efx, enum reset_type method); |
197 | extern int efx_reset_up(struct efx_nic *efx, enum reset_type method, bool ok); | |
b28405b0 | 198 | extern int efx_try_recovery(struct efx_nic *efx); |
8ceee660 BH |
199 | |
200 | /* Global */ | |
201 | extern void efx_schedule_reset(struct efx_nic *efx, enum reset_type type); | |
9e393b30 BH |
202 | extern int efx_init_irq_moderation(struct efx_nic *efx, unsigned int tx_usecs, |
203 | unsigned int rx_usecs, bool rx_adaptive, | |
204 | bool rx_may_override_tx); | |
a0c4faf5 BH |
205 | extern void efx_get_irq_moderation(struct efx_nic *efx, unsigned int *tx_usecs, |
206 | unsigned int *rx_usecs, bool *rx_adaptive); | |
8ceee660 BH |
207 | |
208 | /* Dummy PHY ops for PHY drivers */ | |
209 | extern int efx_port_dummy_op_int(struct efx_nic *efx); | |
210 | extern void efx_port_dummy_op_void(struct efx_nic *efx); | |
d215697f | 211 | |
8ceee660 | 212 | |
f4150724 BH |
213 | /* MTD */ |
214 | #ifdef CONFIG_SFC_MTD | |
45a3fd55 BH |
215 | extern int efx_mtd_add(struct efx_nic *efx, struct efx_mtd_partition *parts, |
216 | size_t n_parts, size_t sizeof_part); | |
217 | static inline int efx_mtd_probe(struct efx_nic *efx) | |
218 | { | |
219 | return efx->type->mtd_probe(efx); | |
220 | } | |
f4150724 BH |
221 | extern void efx_mtd_rename(struct efx_nic *efx); |
222 | extern void efx_mtd_remove(struct efx_nic *efx); | |
223 | #else | |
224 | static inline int efx_mtd_probe(struct efx_nic *efx) { return 0; } | |
225 | static inline void efx_mtd_rename(struct efx_nic *efx) {} | |
226 | static inline void efx_mtd_remove(struct efx_nic *efx) {} | |
227 | #endif | |
8ceee660 | 228 | |
8ceee660 BH |
229 | static inline void efx_schedule_channel(struct efx_channel *channel) |
230 | { | |
62776d03 BH |
231 | netif_vdbg(channel->efx, intr, channel->efx->net_dev, |
232 | "channel %d scheduling NAPI poll on CPU%d\n", | |
233 | channel->channel, raw_smp_processor_id()); | |
8ceee660 | 234 | |
288379f0 | 235 | napi_schedule(&channel->napi_str); |
8ceee660 BH |
236 | } |
237 | ||
1646a6f3 BH |
238 | static inline void efx_schedule_channel_irq(struct efx_channel *channel) |
239 | { | |
dd40781e | 240 | channel->event_test_cpu = raw_smp_processor_id(); |
1646a6f3 BH |
241 | efx_schedule_channel(channel); |
242 | } | |
243 | ||
fdaa9aed | 244 | extern void efx_link_status_changed(struct efx_nic *efx); |
d3245b28 | 245 | extern void efx_link_set_advertising(struct efx_nic *efx, u32); |
b5626946 | 246 | extern void efx_link_set_wanted_fc(struct efx_nic *efx, u8); |
fdaa9aed | 247 | |
c2f3b8e3 DP |
248 | static inline void efx_device_detach_sync(struct efx_nic *efx) |
249 | { | |
250 | struct net_device *dev = efx->net_dev; | |
251 | ||
252 | /* Lock/freeze all TX queues so that we can be sure the | |
253 | * TX scheduler is stopped when we're done and before | |
254 | * netif_device_present() becomes false. | |
255 | */ | |
35205b21 | 256 | netif_tx_lock_bh(dev); |
c2f3b8e3 | 257 | netif_device_detach(dev); |
35205b21 | 258 | netif_tx_unlock_bh(dev); |
c2f3b8e3 DP |
259 | } |
260 | ||
8ceee660 | 261 | #endif /* EFX_EFX_H */ |