[linux-2.6-block.git] / drivers / net / ethernet / qualcomm / qca_spi.h

/* SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */
/*
 *   Copyright (c) 2011, 2012, Qualcomm Atheros Communications Inc.
 *   Copyright (c) 2014, I2SE GmbH
 */

/*   Qualcomm Atheros SPI register definition.
 *
 *   This module is designed to define the Qualcomm Atheros SPI register
 *   placeholders;
 */

#ifndef _QCA_SPI_H
#define _QCA_SPI_H

#include <linux/netdevice.h>
#include <linux/sched.h>
#include <linux/skbuff.h>
#include <linux/spi/spi.h>
#include <linux/types.h>

#include "qca_7k_common.h"

#define QCASPI_DRV_VERSION "0.2.7-i"
#define QCASPI_DRV_NAME    "qcaspi"

#define QCASPI_GOOD_SIGNATURE 0xAA55

#define QCASPI_TX_RING_MAX_LEN 10
#define QCASPI_TX_RING_MIN_LEN 2
#define QCASPI_RX_MAX_FRAMES 4

/* sync related constants */
#define QCASPI_SYNC_UNKNOWN 0
#define QCASPI_SYNC_RESET   1
#define QCASPI_SYNC_READY   2

#define QCASPI_RESET_TIMEOUT 10

/* sync events */
#define QCASPI_EVENT_UPDATE 0
#define QCASPI_EVENT_CPUON  1

struct tx_ring {
	struct sk_buff *skb[QCASPI_TX_RING_MAX_LEN];
	u16 head;
	u16 tail;
	u16 size;
	u16 count;
};

struct qcaspi_stats {
	u64 trig_reset;
	u64 device_reset;
	u64 reset_timeout;
	u64 read_err;
	u64 write_err;
	u64 read_buf_err;
	u64 write_buf_err;
	u64 out_of_mem;
	u64 write_buf_miss;
	u64 ring_full;
	u64 spi_err;
	u64 write_verify_failed;
	u64 buf_avail_err;
	u64 bad_signature;
};

struct qcaspi {
	struct net_device *net_dev;
	struct spi_device *spi_dev;
	struct task_struct *spi_thread;

	struct tx_ring txr;
	struct qcaspi_stats stats;

	u8 *rx_buffer;
	u32 buffer_size;
	u8 sync;

	struct qcafrm_handle frm_handle;
	struct sk_buff *rx_skb;

	unsigned int intr_req;
	unsigned int intr_svc;
	u16 reset_count;

#ifdef CONFIG_DEBUG_FS
	struct dentry *device_root;
#endif

	/* user configurable options */
	u32 clkspeed;
	u8 legacy_mode;
	u16 burst_len;
};

#endif /* _QCA_SPI_H */
Commit	Line	Data
060e309a	1	/* SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */
291ab06e SW	2	/*
	3	* Copyright (c) 2011, 2012, Qualcomm Atheros Communications Inc.
	4	* Copyright (c) 2014, I2SE GmbH
291ab06e SW	5	*/
	6
	7	/* Qualcomm Atheros SPI register definition.
	8	*
	9	* This module is designed to define the Qualcomm Atheros SPI register
	10	* placeholders;
	11	*/
	12
	13	#ifndef _QCA_SPI_H
	14	#define _QCA_SPI_H
	15
	16	#include <linux/netdevice.h>
	17	#include <linux/sched.h>
	18	#include <linux/skbuff.h>
	19	#include <linux/spi/spi.h>
	20	#include <linux/types.h>
	21
f1789286	22	#include "qca_7k_common.h"
291ab06e SW	23
	24	#define QCASPI_DRV_VERSION "0.2.7-i"
	25	#define QCASPI_DRV_NAME "qcaspi"
	26
	27	#define QCASPI_GOOD_SIGNATURE 0xAA55
	28
c7f6250a SW	29	#define QCASPI_TX_RING_MAX_LEN 10
c7f6250a SW	30	#define QCASPI_TX_RING_MIN_LEN 2
fa534395	31	#define QCASPI_RX_MAX_FRAMES 4
291ab06e SW	32
	33	/* sync related constants */
	34	#define QCASPI_SYNC_UNKNOWN 0
	35	#define QCASPI_SYNC_RESET 1
	36	#define QCASPI_SYNC_READY 2
	37
	38	#define QCASPI_RESET_TIMEOUT 10
	39
	40	/* sync events */
	41	#define QCASPI_EVENT_UPDATE 0
	42	#define QCASPI_EVENT_CPUON 1
	43
	44	struct tx_ring {
c7f6250a	45	struct sk_buff *skb[QCASPI_TX_RING_MAX_LEN];
291ab06e SW	46	u16 head;
	47	u16 tail;
	48	u16 size;
	49	u16 count;
	50	};
	51
	52	struct qcaspi_stats {
	53	u64 trig_reset;
	54	u64 device_reset;
	55	u64 reset_timeout;
	56	u64 read_err;
	57	u64 write_err;
	58	u64 read_buf_err;
	59	u64 write_buf_err;
	60	u64 out_of_mem;
	61	u64 write_buf_miss;
	62	u64 ring_full;
	63	u64 spi_err;
48c1699e	64	u64 write_verify_failed;
026b907d	65	u64 buf_avail_err;
a5393567	66	u64 bad_signature;
291ab06e SW	67	};
	68
	69	struct qcaspi {
	70	struct net_device *net_dev;
	71	struct spi_device *spi_dev;
	72	struct task_struct *spi_thread;
	73
	74	struct tx_ring txr;
	75	struct qcaspi_stats stats;
	76
291ab06e SW	77	u8 *rx_buffer;
	78	u32 buffer_size;
	79	u8 sync;
	80
	81	struct qcafrm_handle frm_handle;
	82	struct sk_buff *rx_skb;
	83
	84	unsigned int intr_req;
	85	unsigned int intr_svc;
bc19c329	86	u16 reset_count;
291ab06e SW	87
	88	#ifdef CONFIG_DEBUG_FS
	89	struct dentry *device_root;
	90	#endif
	91
	92	/* user configurable options */
	93	u32 clkspeed;
	94	u8 legacy_mode;
	95	u16 burst_len;
	96	};
	97
291ab06e	98	#endif /* _QCA_SPI_H */