Commit | Line | Data |
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c4e84bde RM |
1 | #include <linux/kernel.h> |
2 | #include <linux/init.h> | |
3 | #include <linux/types.h> | |
4 | #include <linux/module.h> | |
5 | #include <linux/list.h> | |
6 | #include <linux/pci.h> | |
7 | #include <linux/dma-mapping.h> | |
8 | #include <linux/pagemap.h> | |
9 | #include <linux/sched.h> | |
c4e84bde RM |
10 | #include <linux/dmapool.h> |
11 | #include <linux/mempool.h> | |
12 | #include <linux/spinlock.h> | |
13 | #include <linux/kthread.h> | |
14 | #include <linux/interrupt.h> | |
15 | #include <linux/errno.h> | |
16 | #include <linux/ioport.h> | |
17 | #include <linux/in.h> | |
18 | #include <linux/ip.h> | |
19 | #include <linux/ipv6.h> | |
20 | #include <net/ipv6.h> | |
21 | #include <linux/tcp.h> | |
22 | #include <linux/udp.h> | |
23 | #include <linux/if_arp.h> | |
24 | #include <linux/if_ether.h> | |
25 | #include <linux/netdevice.h> | |
26 | #include <linux/etherdevice.h> | |
27 | #include <linux/ethtool.h> | |
28 | #include <linux/skbuff.h> | |
29 | #include <linux/rtnetlink.h> | |
30 | #include <linux/if_vlan.h> | |
c4e84bde RM |
31 | #include <linux/delay.h> |
32 | #include <linux/mm.h> | |
33 | #include <linux/vmalloc.h> | |
34 | ||
c4e84bde RM |
35 | |
36 | #include "qlge.h" | |
37 | ||
9dfbbaa6 RM |
38 | static const char ql_gstrings_test[][ETH_GSTRING_LEN] = { |
39 | "Loopback test (offline)" | |
40 | }; | |
41 | #define QLGE_TEST_LEN (sizeof(ql_gstrings_test) / ETH_GSTRING_LEN) | |
42 | ||
c4e84bde RM |
43 | static int ql_update_ring_coalescing(struct ql_adapter *qdev) |
44 | { | |
45 | int i, status = 0; | |
46 | struct rx_ring *rx_ring; | |
47 | struct cqicb *cqicb; | |
48 | ||
49 | if (!netif_running(qdev->ndev)) | |
50 | return status; | |
51 | ||
c4e84bde RM |
52 | /* Skip the default queue, and update the outbound handler |
53 | * queues if they changed. | |
54 | */ | |
b2014ff8 | 55 | cqicb = (struct cqicb *)&qdev->rx_ring[qdev->rss_ring_count]; |
c4e84bde | 56 | if (le16_to_cpu(cqicb->irq_delay) != qdev->tx_coalesce_usecs || |
b2014ff8 RM |
57 | le16_to_cpu(cqicb->pkt_delay) != |
58 | qdev->tx_max_coalesced_frames) { | |
59 | for (i = qdev->rss_ring_count; i < qdev->rx_ring_count; i++) { | |
c4e84bde RM |
60 | rx_ring = &qdev->rx_ring[i]; |
61 | cqicb = (struct cqicb *)rx_ring; | |
8306c952 | 62 | cqicb->irq_delay = cpu_to_le16(qdev->tx_coalesce_usecs); |
c4e84bde | 63 | cqicb->pkt_delay = |
8306c952 | 64 | cpu_to_le16(qdev->tx_max_coalesced_frames); |
c4e84bde | 65 | cqicb->flags = FLAGS_LI; |
e332471c | 66 | status = ql_write_cfg(qdev, cqicb, sizeof(*cqicb), |
c4e84bde RM |
67 | CFG_LCQ, rx_ring->cq_id); |
68 | if (status) { | |
ae9540f7 JP |
69 | netif_err(qdev, ifup, qdev->ndev, |
70 | "Failed to load CQICB.\n"); | |
c4e84bde RM |
71 | goto exit; |
72 | } | |
73 | } | |
74 | } | |
75 | ||
76 | /* Update the inbound (RSS) handler queues if they changed. */ | |
b2014ff8 | 77 | cqicb = (struct cqicb *)&qdev->rx_ring[0]; |
c4e84bde | 78 | if (le16_to_cpu(cqicb->irq_delay) != qdev->rx_coalesce_usecs || |
b2014ff8 RM |
79 | le16_to_cpu(cqicb->pkt_delay) != |
80 | qdev->rx_max_coalesced_frames) { | |
81 | for (i = 0; i < qdev->rss_ring_count; i++, rx_ring++) { | |
c4e84bde RM |
82 | rx_ring = &qdev->rx_ring[i]; |
83 | cqicb = (struct cqicb *)rx_ring; | |
8306c952 | 84 | cqicb->irq_delay = cpu_to_le16(qdev->rx_coalesce_usecs); |
c4e84bde | 85 | cqicb->pkt_delay = |
8306c952 | 86 | cpu_to_le16(qdev->rx_max_coalesced_frames); |
c4e84bde | 87 | cqicb->flags = FLAGS_LI; |
e332471c | 88 | status = ql_write_cfg(qdev, cqicb, sizeof(*cqicb), |
c4e84bde RM |
89 | CFG_LCQ, rx_ring->cq_id); |
90 | if (status) { | |
ae9540f7 JP |
91 | netif_err(qdev, ifup, qdev->ndev, |
92 | "Failed to load CQICB.\n"); | |
c4e84bde RM |
93 | goto exit; |
94 | } | |
95 | } | |
96 | } | |
97 | exit: | |
c4e84bde RM |
98 | return status; |
99 | } | |
100 | ||
2f22d22e | 101 | static void ql_update_stats(struct ql_adapter *qdev) |
c4e84bde RM |
102 | { |
103 | u32 i; | |
104 | u64 data; | |
105 | u64 *iter = &qdev->nic_stats.tx_pkts; | |
106 | ||
107 | spin_lock(&qdev->stats_lock); | |
108 | if (ql_sem_spinlock(qdev, qdev->xg_sem_mask)) { | |
ae9540f7 JP |
109 | netif_err(qdev, drv, qdev->ndev, |
110 | "Couldn't get xgmac sem.\n"); | |
c4e84bde RM |
111 | goto quit; |
112 | } | |
113 | /* | |
114 | * Get TX statistics. | |
115 | */ | |
116 | for (i = 0x200; i < 0x280; i += 8) { | |
117 | if (ql_read_xgmac_reg64(qdev, i, &data)) { | |
ae9540f7 JP |
118 | netif_err(qdev, drv, qdev->ndev, |
119 | "Error reading status register 0x%.04x.\n", | |
120 | i); | |
c4e84bde RM |
121 | goto end; |
122 | } else | |
123 | *iter = data; | |
124 | iter++; | |
125 | } | |
126 | ||
127 | /* | |
128 | * Get RX statistics. | |
129 | */ | |
130 | for (i = 0x300; i < 0x3d0; i += 8) { | |
131 | if (ql_read_xgmac_reg64(qdev, i, &data)) { | |
ae9540f7 JP |
132 | netif_err(qdev, drv, qdev->ndev, |
133 | "Error reading status register 0x%.04x.\n", | |
134 | i); | |
c4e84bde RM |
135 | goto end; |
136 | } else | |
137 | *iter = data; | |
138 | iter++; | |
139 | } | |
140 | ||
6abd2346 RM |
141 | /* |
142 | * Get Per-priority TX pause frame counter statistics. | |
143 | */ | |
144 | for (i = 0x500; i < 0x540; i += 8) { | |
145 | if (ql_read_xgmac_reg64(qdev, i, &data)) { | |
ae9540f7 JP |
146 | netif_err(qdev, drv, qdev->ndev, |
147 | "Error reading status register 0x%.04x.\n", | |
148 | i); | |
6abd2346 RM |
149 | goto end; |
150 | } else | |
151 | *iter = data; | |
152 | iter++; | |
153 | } | |
154 | ||
155 | /* | |
156 | * Get Per-priority RX pause frame counter statistics. | |
157 | */ | |
158 | for (i = 0x568; i < 0x5a8; i += 8) { | |
159 | if (ql_read_xgmac_reg64(qdev, i, &data)) { | |
ae9540f7 JP |
160 | netif_err(qdev, drv, qdev->ndev, |
161 | "Error reading status register 0x%.04x.\n", | |
162 | i); | |
6abd2346 RM |
163 | goto end; |
164 | } else | |
165 | *iter = data; | |
166 | iter++; | |
167 | } | |
168 | ||
169 | /* | |
170 | * Get RX NIC FIFO DROP statistics. | |
171 | */ | |
172 | if (ql_read_xgmac_reg64(qdev, 0x5b8, &data)) { | |
ae9540f7 JP |
173 | netif_err(qdev, drv, qdev->ndev, |
174 | "Error reading status register 0x%.04x.\n", i); | |
6abd2346 RM |
175 | goto end; |
176 | } else | |
177 | *iter = data; | |
c4e84bde RM |
178 | end: |
179 | ql_sem_unlock(qdev, qdev->xg_sem_mask); | |
180 | quit: | |
181 | spin_unlock(&qdev->stats_lock); | |
182 | ||
183 | QL_DUMP_STAT(qdev); | |
c4e84bde RM |
184 | } |
185 | ||
186 | static char ql_stats_str_arr[][ETH_GSTRING_LEN] = { | |
187 | {"tx_pkts"}, | |
188 | {"tx_bytes"}, | |
189 | {"tx_mcast_pkts"}, | |
190 | {"tx_bcast_pkts"}, | |
191 | {"tx_ucast_pkts"}, | |
192 | {"tx_ctl_pkts"}, | |
193 | {"tx_pause_pkts"}, | |
194 | {"tx_64_pkts"}, | |
195 | {"tx_65_to_127_pkts"}, | |
196 | {"tx_128_to_255_pkts"}, | |
197 | {"tx_256_511_pkts"}, | |
198 | {"tx_512_to_1023_pkts"}, | |
199 | {"tx_1024_to_1518_pkts"}, | |
200 | {"tx_1519_to_max_pkts"}, | |
201 | {"tx_undersize_pkts"}, | |
202 | {"tx_oversize_pkts"}, | |
203 | {"rx_bytes"}, | |
204 | {"rx_bytes_ok"}, | |
205 | {"rx_pkts"}, | |
206 | {"rx_pkts_ok"}, | |
207 | {"rx_bcast_pkts"}, | |
208 | {"rx_mcast_pkts"}, | |
209 | {"rx_ucast_pkts"}, | |
210 | {"rx_undersize_pkts"}, | |
211 | {"rx_oversize_pkts"}, | |
212 | {"rx_jabber_pkts"}, | |
213 | {"rx_undersize_fcerr_pkts"}, | |
214 | {"rx_drop_events"}, | |
215 | {"rx_fcerr_pkts"}, | |
216 | {"rx_align_err"}, | |
217 | {"rx_symbol_err"}, | |
218 | {"rx_mac_err"}, | |
219 | {"rx_ctl_pkts"}, | |
220 | {"rx_pause_pkts"}, | |
221 | {"rx_64_pkts"}, | |
222 | {"rx_65_to_127_pkts"}, | |
223 | {"rx_128_255_pkts"}, | |
224 | {"rx_256_511_pkts"}, | |
225 | {"rx_512_to_1023_pkts"}, | |
226 | {"rx_1024_to_1518_pkts"}, | |
227 | {"rx_1519_to_max_pkts"}, | |
228 | {"rx_len_err_pkts"}, | |
6abd2346 RM |
229 | {"tx_cbfc_pause_frames0"}, |
230 | {"tx_cbfc_pause_frames1"}, | |
231 | {"tx_cbfc_pause_frames2"}, | |
232 | {"tx_cbfc_pause_frames3"}, | |
233 | {"tx_cbfc_pause_frames4"}, | |
234 | {"tx_cbfc_pause_frames5"}, | |
235 | {"tx_cbfc_pause_frames6"}, | |
236 | {"tx_cbfc_pause_frames7"}, | |
237 | {"rx_cbfc_pause_frames0"}, | |
238 | {"rx_cbfc_pause_frames1"}, | |
239 | {"rx_cbfc_pause_frames2"}, | |
240 | {"rx_cbfc_pause_frames3"}, | |
241 | {"rx_cbfc_pause_frames4"}, | |
242 | {"rx_cbfc_pause_frames5"}, | |
243 | {"rx_cbfc_pause_frames6"}, | |
244 | {"rx_cbfc_pause_frames7"}, | |
245 | {"rx_nic_fifo_drop"}, | |
c4e84bde RM |
246 | }; |
247 | ||
248 | static void ql_get_strings(struct net_device *dev, u32 stringset, u8 *buf) | |
249 | { | |
250 | switch (stringset) { | |
251 | case ETH_SS_STATS: | |
252 | memcpy(buf, ql_stats_str_arr, sizeof(ql_stats_str_arr)); | |
253 | break; | |
254 | } | |
255 | } | |
256 | ||
257 | static int ql_get_sset_count(struct net_device *dev, int sset) | |
258 | { | |
259 | switch (sset) { | |
9dfbbaa6 RM |
260 | case ETH_SS_TEST: |
261 | return QLGE_TEST_LEN; | |
c4e84bde RM |
262 | case ETH_SS_STATS: |
263 | return ARRAY_SIZE(ql_stats_str_arr); | |
264 | default: | |
265 | return -EOPNOTSUPP; | |
266 | } | |
267 | } | |
268 | ||
269 | static void | |
270 | ql_get_ethtool_stats(struct net_device *ndev, | |
271 | struct ethtool_stats *stats, u64 *data) | |
272 | { | |
273 | struct ql_adapter *qdev = netdev_priv(ndev); | |
274 | struct nic_stats *s = &qdev->nic_stats; | |
275 | ||
276 | ql_update_stats(qdev); | |
277 | ||
278 | *data++ = s->tx_pkts; | |
279 | *data++ = s->tx_bytes; | |
280 | *data++ = s->tx_mcast_pkts; | |
281 | *data++ = s->tx_bcast_pkts; | |
282 | *data++ = s->tx_ucast_pkts; | |
283 | *data++ = s->tx_ctl_pkts; | |
284 | *data++ = s->tx_pause_pkts; | |
285 | *data++ = s->tx_64_pkt; | |
286 | *data++ = s->tx_65_to_127_pkt; | |
287 | *data++ = s->tx_128_to_255_pkt; | |
288 | *data++ = s->tx_256_511_pkt; | |
289 | *data++ = s->tx_512_to_1023_pkt; | |
290 | *data++ = s->tx_1024_to_1518_pkt; | |
291 | *data++ = s->tx_1519_to_max_pkt; | |
292 | *data++ = s->tx_undersize_pkt; | |
293 | *data++ = s->tx_oversize_pkt; | |
294 | *data++ = s->rx_bytes; | |
295 | *data++ = s->rx_bytes_ok; | |
296 | *data++ = s->rx_pkts; | |
297 | *data++ = s->rx_pkts_ok; | |
298 | *data++ = s->rx_bcast_pkts; | |
299 | *data++ = s->rx_mcast_pkts; | |
300 | *data++ = s->rx_ucast_pkts; | |
301 | *data++ = s->rx_undersize_pkts; | |
302 | *data++ = s->rx_oversize_pkts; | |
303 | *data++ = s->rx_jabber_pkts; | |
304 | *data++ = s->rx_undersize_fcerr_pkts; | |
305 | *data++ = s->rx_drop_events; | |
306 | *data++ = s->rx_fcerr_pkts; | |
307 | *data++ = s->rx_align_err; | |
308 | *data++ = s->rx_symbol_err; | |
309 | *data++ = s->rx_mac_err; | |
310 | *data++ = s->rx_ctl_pkts; | |
311 | *data++ = s->rx_pause_pkts; | |
312 | *data++ = s->rx_64_pkts; | |
313 | *data++ = s->rx_65_to_127_pkts; | |
314 | *data++ = s->rx_128_255_pkts; | |
315 | *data++ = s->rx_256_511_pkts; | |
316 | *data++ = s->rx_512_to_1023_pkts; | |
317 | *data++ = s->rx_1024_to_1518_pkts; | |
318 | *data++ = s->rx_1519_to_max_pkts; | |
319 | *data++ = s->rx_len_err_pkts; | |
6abd2346 RM |
320 | *data++ = s->tx_cbfc_pause_frames0; |
321 | *data++ = s->tx_cbfc_pause_frames1; | |
322 | *data++ = s->tx_cbfc_pause_frames2; | |
323 | *data++ = s->tx_cbfc_pause_frames3; | |
324 | *data++ = s->tx_cbfc_pause_frames4; | |
325 | *data++ = s->tx_cbfc_pause_frames5; | |
326 | *data++ = s->tx_cbfc_pause_frames6; | |
327 | *data++ = s->tx_cbfc_pause_frames7; | |
328 | *data++ = s->rx_cbfc_pause_frames0; | |
329 | *data++ = s->rx_cbfc_pause_frames1; | |
330 | *data++ = s->rx_cbfc_pause_frames2; | |
331 | *data++ = s->rx_cbfc_pause_frames3; | |
332 | *data++ = s->rx_cbfc_pause_frames4; | |
333 | *data++ = s->rx_cbfc_pause_frames5; | |
334 | *data++ = s->rx_cbfc_pause_frames6; | |
335 | *data++ = s->rx_cbfc_pause_frames7; | |
336 | *data++ = s->rx_nic_fifo_drop; | |
c4e84bde RM |
337 | } |
338 | ||
339 | static int ql_get_settings(struct net_device *ndev, | |
340 | struct ethtool_cmd *ecmd) | |
341 | { | |
342 | struct ql_adapter *qdev = netdev_priv(ndev); | |
343 | ||
344 | ecmd->supported = SUPPORTED_10000baseT_Full; | |
345 | ecmd->advertising = ADVERTISED_10000baseT_Full; | |
346 | ecmd->autoneg = AUTONEG_ENABLE; | |
347 | ecmd->transceiver = XCVR_EXTERNAL; | |
b82808b7 RM |
348 | if ((qdev->link_status & STS_LINK_TYPE_MASK) == |
349 | STS_LINK_TYPE_10GBASET) { | |
c4e84bde RM |
350 | ecmd->supported |= (SUPPORTED_TP | SUPPORTED_Autoneg); |
351 | ecmd->advertising |= (ADVERTISED_TP | ADVERTISED_Autoneg); | |
352 | ecmd->port = PORT_TP; | |
353 | } else { | |
354 | ecmd->supported |= SUPPORTED_FIBRE; | |
355 | ecmd->advertising |= ADVERTISED_FIBRE; | |
356 | ecmd->port = PORT_FIBRE; | |
357 | } | |
358 | ||
70739497 | 359 | ethtool_cmd_speed_set(ecmd, SPEED_10000); |
c4e84bde RM |
360 | ecmd->duplex = DUPLEX_FULL; |
361 | ||
362 | return 0; | |
363 | } | |
364 | ||
365 | static void ql_get_drvinfo(struct net_device *ndev, | |
366 | struct ethtool_drvinfo *drvinfo) | |
367 | { | |
368 | struct ql_adapter *qdev = netdev_priv(ndev); | |
68aad78c RJ |
369 | strlcpy(drvinfo->driver, qlge_driver_name, sizeof(drvinfo->driver)); |
370 | strlcpy(drvinfo->version, qlge_driver_version, | |
371 | sizeof(drvinfo->version)); | |
372 | snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version), | |
373 | "v%d.%d.%d", | |
cfec0cbc RM |
374 | (qdev->fw_rev_id & 0x00ff0000) >> 16, |
375 | (qdev->fw_rev_id & 0x0000ff00) >> 8, | |
376 | (qdev->fw_rev_id & 0x000000ff)); | |
68aad78c RJ |
377 | strlcpy(drvinfo->bus_info, pci_name(qdev->pdev), |
378 | sizeof(drvinfo->bus_info)); | |
c4e84bde RM |
379 | drvinfo->n_stats = 0; |
380 | drvinfo->testinfo_len = 0; | |
673483c7 RM |
381 | if (!test_bit(QL_FRC_COREDUMP, &qdev->flags)) |
382 | drvinfo->regdump_len = sizeof(struct ql_mpi_coredump); | |
383 | else | |
384 | drvinfo->regdump_len = sizeof(struct ql_reg_dump); | |
c4e84bde RM |
385 | drvinfo->eedump_len = 0; |
386 | } | |
387 | ||
bc083ce9 RM |
388 | static void ql_get_wol(struct net_device *ndev, struct ethtool_wolinfo *wol) |
389 | { | |
390 | struct ql_adapter *qdev = netdev_priv(ndev); | |
206d78e0 JK |
391 | unsigned short ssys_dev = qdev->pdev->subsystem_device; |
392 | ||
393 | /* WOL is only supported for mezz card. */ | |
394 | if (ssys_dev == QLGE_MEZZ_SSYS_ID_068 || | |
395 | ssys_dev == QLGE_MEZZ_SSYS_ID_180) { | |
396 | wol->supported = WAKE_MAGIC; | |
397 | wol->wolopts = qdev->wol; | |
398 | } | |
bc083ce9 RM |
399 | } |
400 | ||
401 | static int ql_set_wol(struct net_device *ndev, struct ethtool_wolinfo *wol) | |
402 | { | |
403 | struct ql_adapter *qdev = netdev_priv(ndev); | |
404 | int status; | |
206d78e0 | 405 | unsigned short ssys_dev = qdev->pdev->subsystem_device; |
bc083ce9 | 406 | |
206d78e0 JK |
407 | /* WOL is only supported for mezz card. */ |
408 | if (ssys_dev != QLGE_MEZZ_SSYS_ID_068 || | |
409 | ssys_dev != QLGE_MEZZ_SSYS_ID_180) { | |
410 | netif_info(qdev, drv, qdev->ndev, | |
411 | "WOL is only supported for mezz card\n"); | |
412 | return -EOPNOTSUPP; | |
413 | } | |
bc083ce9 RM |
414 | if (wol->wolopts & ~WAKE_MAGIC) |
415 | return -EINVAL; | |
416 | qdev->wol = wol->wolopts; | |
417 | ||
ae9540f7 | 418 | netif_info(qdev, drv, qdev->ndev, "Set wol option 0x%x\n", qdev->wol); |
bc083ce9 RM |
419 | if (!qdev->wol) { |
420 | u32 wol = 0; | |
421 | status = ql_mb_wol_mode(qdev, wol); | |
ae9540f7 | 422 | netif_err(qdev, drv, qdev->ndev, "WOL %s (wol code 0x%x)\n", |
318ae2ed | 423 | status == 0 ? "cleared successfully" : "clear failed", |
ae9540f7 | 424 | wol); |
bc083ce9 RM |
425 | } |
426 | ||
427 | return 0; | |
428 | } | |
d8eb59dc | 429 | |
1b329124 | 430 | static int ql_set_phys_id(struct net_device *ndev, |
431 | enum ethtool_phys_id_state state) | |
432 | ||
d8eb59dc RM |
433 | { |
434 | struct ql_adapter *qdev = netdev_priv(ndev); | |
d8eb59dc | 435 | |
1b329124 | 436 | switch (state) { |
437 | case ETHTOOL_ID_ACTIVE: | |
438 | /* Save the current LED settings */ | |
439 | if (ql_mb_get_led_cfg(qdev)) | |
440 | return -EIO; | |
d8eb59dc | 441 | |
1b329124 | 442 | /* Start blinking */ |
d8eb59dc | 443 | ql_mb_set_led_cfg(qdev, QL_LED_BLINK); |
1b329124 | 444 | return 0; |
d8eb59dc | 445 | |
1b329124 | 446 | case ETHTOOL_ID_INACTIVE: |
447 | /* Restore LED settings */ | |
448 | if (ql_mb_set_led_cfg(qdev, qdev->led_config)) | |
449 | return -EIO; | |
450 | return 0; | |
d8eb59dc | 451 | |
1b329124 | 452 | default: |
453 | return -EINVAL; | |
454 | } | |
d8eb59dc | 455 | } |
a61f8026 | 456 | |
9dfbbaa6 RM |
457 | static int ql_start_loopback(struct ql_adapter *qdev) |
458 | { | |
459 | if (netif_carrier_ok(qdev->ndev)) { | |
460 | set_bit(QL_LB_LINK_UP, &qdev->flags); | |
461 | netif_carrier_off(qdev->ndev); | |
462 | } else | |
463 | clear_bit(QL_LB_LINK_UP, &qdev->flags); | |
464 | qdev->link_config |= CFG_LOOPBACK_PCS; | |
465 | return ql_mb_set_port_cfg(qdev); | |
466 | } | |
467 | ||
468 | static void ql_stop_loopback(struct ql_adapter *qdev) | |
469 | { | |
470 | qdev->link_config &= ~CFG_LOOPBACK_PCS; | |
471 | ql_mb_set_port_cfg(qdev); | |
472 | if (test_bit(QL_LB_LINK_UP, &qdev->flags)) { | |
473 | netif_carrier_on(qdev->ndev); | |
474 | clear_bit(QL_LB_LINK_UP, &qdev->flags); | |
475 | } | |
476 | } | |
477 | ||
478 | static void ql_create_lb_frame(struct sk_buff *skb, | |
479 | unsigned int frame_size) | |
480 | { | |
481 | memset(skb->data, 0xFF, frame_size); | |
482 | frame_size &= ~1; | |
483 | memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1); | |
484 | memset(&skb->data[frame_size / 2 + 10], 0xBE, 1); | |
485 | memset(&skb->data[frame_size / 2 + 12], 0xAF, 1); | |
486 | } | |
487 | ||
488 | void ql_check_lb_frame(struct ql_adapter *qdev, | |
489 | struct sk_buff *skb) | |
490 | { | |
491 | unsigned int frame_size = skb->len; | |
492 | ||
493 | if ((*(skb->data + 3) == 0xFF) && | |
494 | (*(skb->data + frame_size / 2 + 10) == 0xBE) && | |
495 | (*(skb->data + frame_size / 2 + 12) == 0xAF)) { | |
496 | atomic_dec(&qdev->lb_count); | |
497 | return; | |
498 | } | |
499 | } | |
500 | ||
501 | static int ql_run_loopback_test(struct ql_adapter *qdev) | |
502 | { | |
503 | int i; | |
504 | netdev_tx_t rc; | |
505 | struct sk_buff *skb; | |
506 | unsigned int size = SMALL_BUF_MAP_SIZE; | |
507 | ||
508 | for (i = 0; i < 64; i++) { | |
509 | skb = netdev_alloc_skb(qdev->ndev, size); | |
510 | if (!skb) | |
511 | return -ENOMEM; | |
512 | ||
513 | skb->queue_mapping = 0; | |
514 | skb_put(skb, size); | |
515 | ql_create_lb_frame(skb, size); | |
516 | rc = ql_lb_send(skb, qdev->ndev); | |
517 | if (rc != NETDEV_TX_OK) | |
518 | return -EPIPE; | |
519 | atomic_inc(&qdev->lb_count); | |
520 | } | |
aa13bd6e RM |
521 | /* Give queue time to settle before testing results. */ |
522 | msleep(2); | |
9dfbbaa6 RM |
523 | ql_clean_lb_rx_ring(&qdev->rx_ring[0], 128); |
524 | return atomic_read(&qdev->lb_count) ? -EIO : 0; | |
525 | } | |
526 | ||
527 | static int ql_loopback_test(struct ql_adapter *qdev, u64 *data) | |
528 | { | |
529 | *data = ql_start_loopback(qdev); | |
530 | if (*data) | |
531 | goto out; | |
532 | *data = ql_run_loopback_test(qdev); | |
533 | out: | |
534 | ql_stop_loopback(qdev); | |
535 | return *data; | |
536 | } | |
537 | ||
538 | static void ql_self_test(struct net_device *ndev, | |
539 | struct ethtool_test *eth_test, u64 *data) | |
540 | { | |
541 | struct ql_adapter *qdev = netdev_priv(ndev); | |
542 | ||
543 | if (netif_running(ndev)) { | |
544 | set_bit(QL_SELFTEST, &qdev->flags); | |
545 | if (eth_test->flags == ETH_TEST_FL_OFFLINE) { | |
546 | /* Offline tests */ | |
547 | if (ql_loopback_test(qdev, &data[0])) | |
548 | eth_test->flags |= ETH_TEST_FL_FAILED; | |
549 | ||
550 | } else { | |
551 | /* Online tests */ | |
552 | data[0] = 0; | |
553 | } | |
554 | clear_bit(QL_SELFTEST, &qdev->flags); | |
aa13bd6e RM |
555 | /* Give link time to come up after |
556 | * port configuration changes. | |
557 | */ | |
558 | msleep_interruptible(4 * 1000); | |
9dfbbaa6 | 559 | } else { |
ae9540f7 JP |
560 | netif_err(qdev, drv, qdev->ndev, |
561 | "is down, Loopback test will fail.\n"); | |
9dfbbaa6 RM |
562 | eth_test->flags |= ETH_TEST_FL_FAILED; |
563 | } | |
564 | } | |
565 | ||
a61f8026 RM |
566 | static int ql_get_regs_len(struct net_device *ndev) |
567 | { | |
673483c7 RM |
568 | struct ql_adapter *qdev = netdev_priv(ndev); |
569 | ||
570 | if (!test_bit(QL_FRC_COREDUMP, &qdev->flags)) | |
571 | return sizeof(struct ql_mpi_coredump); | |
572 | else | |
573 | return sizeof(struct ql_reg_dump); | |
a61f8026 RM |
574 | } |
575 | ||
576 | static void ql_get_regs(struct net_device *ndev, | |
577 | struct ethtool_regs *regs, void *p) | |
578 | { | |
579 | struct ql_adapter *qdev = netdev_priv(ndev); | |
580 | ||
673483c7 RM |
581 | ql_get_dump(qdev, p); |
582 | qdev->core_is_dumped = 0; | |
583 | if (!test_bit(QL_FRC_COREDUMP, &qdev->flags)) | |
584 | regs->len = sizeof(struct ql_mpi_coredump); | |
585 | else | |
586 | regs->len = sizeof(struct ql_reg_dump); | |
a61f8026 RM |
587 | } |
588 | ||
c4e84bde RM |
589 | static int ql_get_coalesce(struct net_device *dev, struct ethtool_coalesce *c) |
590 | { | |
591 | struct ql_adapter *qdev = netdev_priv(dev); | |
592 | ||
593 | c->rx_coalesce_usecs = qdev->rx_coalesce_usecs; | |
594 | c->tx_coalesce_usecs = qdev->tx_coalesce_usecs; | |
595 | ||
596 | /* This chip coalesces as follows: | |
597 | * If a packet arrives, hold off interrupts until | |
598 | * cqicb->int_delay expires, but if no other packets arrive don't | |
599 | * wait longer than cqicb->pkt_int_delay. But ethtool doesn't use a | |
600 | * timer to coalesce on a frame basis. So, we have to take ethtool's | |
601 | * max_coalesced_frames value and convert it to a delay in microseconds. | |
602 | * We do this by using a basic thoughput of 1,000,000 frames per | |
603 | * second @ (1024 bytes). This means one frame per usec. So it's a | |
604 | * simple one to one ratio. | |
605 | */ | |
606 | c->rx_max_coalesced_frames = qdev->rx_max_coalesced_frames; | |
607 | c->tx_max_coalesced_frames = qdev->tx_max_coalesced_frames; | |
608 | ||
609 | return 0; | |
610 | } | |
611 | ||
612 | static int ql_set_coalesce(struct net_device *ndev, struct ethtool_coalesce *c) | |
613 | { | |
614 | struct ql_adapter *qdev = netdev_priv(ndev); | |
615 | ||
616 | /* Validate user parameters. */ | |
617 | if (c->rx_coalesce_usecs > qdev->rx_ring_size / 2) | |
618 | return -EINVAL; | |
619 | /* Don't wait more than 10 usec. */ | |
620 | if (c->rx_max_coalesced_frames > MAX_INTER_FRAME_WAIT) | |
621 | return -EINVAL; | |
622 | if (c->tx_coalesce_usecs > qdev->tx_ring_size / 2) | |
623 | return -EINVAL; | |
624 | if (c->tx_max_coalesced_frames > MAX_INTER_FRAME_WAIT) | |
625 | return -EINVAL; | |
626 | ||
627 | /* Verify a change took place before updating the hardware. */ | |
628 | if (qdev->rx_coalesce_usecs == c->rx_coalesce_usecs && | |
629 | qdev->tx_coalesce_usecs == c->tx_coalesce_usecs && | |
630 | qdev->rx_max_coalesced_frames == c->rx_max_coalesced_frames && | |
631 | qdev->tx_max_coalesced_frames == c->tx_max_coalesced_frames) | |
632 | return 0; | |
633 | ||
634 | qdev->rx_coalesce_usecs = c->rx_coalesce_usecs; | |
635 | qdev->tx_coalesce_usecs = c->tx_coalesce_usecs; | |
636 | qdev->rx_max_coalesced_frames = c->rx_max_coalesced_frames; | |
637 | qdev->tx_max_coalesced_frames = c->tx_max_coalesced_frames; | |
638 | ||
639 | return ql_update_ring_coalescing(qdev); | |
640 | } | |
641 | ||
1d30df24 RM |
642 | static void ql_get_pauseparam(struct net_device *netdev, |
643 | struct ethtool_pauseparam *pause) | |
644 | { | |
645 | struct ql_adapter *qdev = netdev_priv(netdev); | |
646 | ||
647 | ql_mb_get_port_cfg(qdev); | |
648 | if (qdev->link_config & CFG_PAUSE_STD) { | |
649 | pause->rx_pause = 1; | |
650 | pause->tx_pause = 1; | |
651 | } | |
652 | } | |
653 | ||
654 | static int ql_set_pauseparam(struct net_device *netdev, | |
655 | struct ethtool_pauseparam *pause) | |
656 | { | |
657 | struct ql_adapter *qdev = netdev_priv(netdev); | |
658 | int status = 0; | |
659 | ||
660 | if ((pause->rx_pause) && (pause->tx_pause)) | |
661 | qdev->link_config |= CFG_PAUSE_STD; | |
662 | else if (!pause->rx_pause && !pause->tx_pause) | |
663 | qdev->link_config &= ~CFG_PAUSE_STD; | |
664 | else | |
665 | return -EINVAL; | |
666 | ||
667 | status = ql_mb_set_port_cfg(qdev); | |
1d30df24 RM |
668 | return status; |
669 | } | |
670 | ||
c4e84bde RM |
671 | static u32 ql_get_msglevel(struct net_device *ndev) |
672 | { | |
673 | struct ql_adapter *qdev = netdev_priv(ndev); | |
674 | return qdev->msg_enable; | |
675 | } | |
676 | ||
677 | static void ql_set_msglevel(struct net_device *ndev, u32 value) | |
678 | { | |
679 | struct ql_adapter *qdev = netdev_priv(ndev); | |
680 | qdev->msg_enable = value; | |
681 | } | |
682 | ||
683 | const struct ethtool_ops qlge_ethtool_ops = { | |
684 | .get_settings = ql_get_settings, | |
685 | .get_drvinfo = ql_get_drvinfo, | |
bc083ce9 RM |
686 | .get_wol = ql_get_wol, |
687 | .set_wol = ql_set_wol, | |
a61f8026 RM |
688 | .get_regs_len = ql_get_regs_len, |
689 | .get_regs = ql_get_regs, | |
c4e84bde RM |
690 | .get_msglevel = ql_get_msglevel, |
691 | .set_msglevel = ql_set_msglevel, | |
692 | .get_link = ethtool_op_get_link, | |
1b329124 | 693 | .set_phys_id = ql_set_phys_id, |
9dfbbaa6 | 694 | .self_test = ql_self_test, |
1d30df24 RM |
695 | .get_pauseparam = ql_get_pauseparam, |
696 | .set_pauseparam = ql_set_pauseparam, | |
c4e84bde RM |
697 | .get_coalesce = ql_get_coalesce, |
698 | .set_coalesce = ql_set_coalesce, | |
699 | .get_sset_count = ql_get_sset_count, | |
700 | .get_strings = ql_get_strings, | |
701 | .get_ethtool_stats = ql_get_ethtool_stats, | |
702 | }; | |
703 |