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Merge branch 'for-3.8' of git://linux-nfs.org/~bfields/linux
[linux-2.6-block.git] / drivers / net / ethernet / qlogic / qlcnic / qlcnic_ctx.c
CommitLineData
af19b491 1/*
40839129
SV		 2 * QLogic qlcnic NIC Driver
3 * Copyright (c) 2009-2010 QLogic Corporation
af19b491 4 *
40839129 5 * See LICENSE.qlcnic for copyright and licensing details.
af19b491
AKS		 6 */
7
8#include "qlcnic.h"
9
bff57d8e
SC		 10static int qlcnic_is_valid_nic_func(struct qlcnic_adapter *adapter, u8 pci_func)
11{
12 int i;
13
14 for (i = 0; i < adapter->ahw->act_pci_func; i++) {
15 if (adapter->npars[i].pci_func == pci_func)
16 return i;
17 }
18
19 return -1;
20}
21
af19b491
AKS		 22static u32
23qlcnic_poll_rsp(struct qlcnic_adapter *adapter)
24{
25 u32 rsp;
26 int timeout = 0;
27
28 do {
29 /* give atleast 1ms for firmware to respond */
68b3f28c 30 mdelay(1);
af19b491
AKS		 31
32 if (++timeout > QLCNIC_OS_CRB_RETRY_COUNT)
33 return QLCNIC_CDRP_RSP_TIMEOUT;
34
35 rsp = QLCRD32(adapter, QLCNIC_CDRP_CRB_OFFSET);
36 } while (!QLCNIC_CDRP_IS_RSP(rsp));
37
38 return rsp;
39}
40
7777de9a
AC		 41void
42qlcnic_issue_cmd(struct qlcnic_adapter *adapter, struct qlcnic_cmd_args *cmd)
af19b491
AKS		 43{
44 u32 rsp;
45 u32 signature;
af19b491 46 struct pci_dev *pdev = adapter->pdev;
7777de9a 47 struct qlcnic_hardware_context *ahw = adapter->ahw;
af19b491 48
7777de9a 49 signature = QLCNIC_CDRP_SIGNATURE_MAKE(ahw->pci_func,
79788450 50 adapter->ahw->fw_hal_version);
af19b491
AKS		 51
52 /* Acquire semaphore before accessing CRB */
7777de9a
AC		 53 if (qlcnic_api_lock(adapter)) {
54 cmd->rsp.cmd = QLCNIC_RCODE_TIMEOUT;
55 return;
56 }
af19b491
AKS		 57
58 QLCWR32(adapter, QLCNIC_SIGN_CRB_OFFSET, signature);
7777de9a
AC		 59 QLCWR32(adapter, QLCNIC_ARG1_CRB_OFFSET, cmd->req.arg1);
60 QLCWR32(adapter, QLCNIC_ARG2_CRB_OFFSET, cmd->req.arg2);
61 QLCWR32(adapter, QLCNIC_ARG3_CRB_OFFSET, cmd->req.arg3);
62 QLCWR32(adapter, QLCNIC_CDRP_CRB_OFFSET,
63 QLCNIC_CDRP_FORM_CMD(cmd->req.cmd));
af19b491
AKS		 64
65 rsp = qlcnic_poll_rsp(adapter);
66
67 if (rsp == QLCNIC_CDRP_RSP_TIMEOUT) {
e42ede22 68 dev_err(&pdev->dev, "CDRP response timeout.\n");
7777de9a 69 cmd->rsp.cmd = QLCNIC_RCODE_TIMEOUT;
af19b491 70 } else if (rsp == QLCNIC_CDRP_RSP_FAIL) {
7777de9a 71 cmd->rsp.cmd = QLCRD32(adapter, QLCNIC_ARG1_CRB_OFFSET);
e42ede22
JK		 72 switch (cmd->rsp.cmd) {
73 case QLCNIC_RCODE_INVALID_ARGS:
74 dev_err(&pdev->dev, "CDRP invalid args: 0x%x.\n",
7777de9a 75 cmd->rsp.cmd);
e42ede22
JK		 76 break;
77 case QLCNIC_RCODE_NOT_SUPPORTED:
78 case QLCNIC_RCODE_NOT_IMPL:
79 dev_err(&pdev->dev,
80 "CDRP command not supported: 0x%x.\n",
81 cmd->rsp.cmd);
82 break;
83 case QLCNIC_RCODE_NOT_PERMITTED:
84 dev_err(&pdev->dev,
85 "CDRP requested action not permitted: 0x%x.\n",
86 cmd->rsp.cmd);
87 break;
88 case QLCNIC_RCODE_INVALID:
89 dev_err(&pdev->dev,
90 "CDRP invalid or unknown cmd received: 0x%x.\n",
91 cmd->rsp.cmd);
92 break;
93 case QLCNIC_RCODE_TIMEOUT:
94 dev_err(&pdev->dev, "CDRP command timeout: 0x%x.\n",
95 cmd->rsp.cmd);
96 break;
97 default:
98 dev_err(&pdev->dev, "CDRP command failed: 0x%x.\n",
99 cmd->rsp.cmd);
100 }
9254b751 101 } else if (rsp == QLCNIC_CDRP_RSP_OK) {
7777de9a
AC		 102 cmd->rsp.cmd = QLCNIC_RCODE_SUCCESS;
103 if (cmd->rsp.arg2)
104 cmd->rsp.arg2 = QLCRD32(adapter,
105 QLCNIC_ARG2_CRB_OFFSET);
106 if (cmd->rsp.arg3)
107 cmd->rsp.arg3 = QLCRD32(adapter,
108 QLCNIC_ARG3_CRB_OFFSET);
af19b491 109 }
7777de9a
AC		 110 if (cmd->rsp.arg1)
111 cmd->rsp.arg1 = QLCRD32(adapter, QLCNIC_ARG1_CRB_OFFSET);
af19b491
AKS		 112
113 /* Release semaphore */
114 qlcnic_api_unlock(adapter);
115
af19b491
AKS		 116}
117
63507592 118static uint32_t qlcnic_temp_checksum(uint32_t *temp_buffer, u32 temp_size)
18f2f616
AC		 119{
120 uint64_t sum = 0;
121 int count = temp_size / sizeof(uint32_t);
122 while (count-- > 0)
123 sum += *temp_buffer++;
124 while (sum >> 32)
125 sum = (sum & 0xFFFFFFFF) + (sum >> 32);
126 return ~sum;
127}
128
129int qlcnic_fw_cmd_get_minidump_temp(struct qlcnic_adapter *adapter)
130{
131 int err, i;
18f2f616 132 void *tmp_addr;
63507592
SS		 133 u32 temp_size, version, csum, *template;
134 __le32 *tmp_buf;
7777de9a 135 struct qlcnic_cmd_args cmd;
18f2f616 136 struct qlcnic_hardware_context *ahw;
5d17f36b 137 struct qlcnic_dump_template_hdr *tmpl_hdr;
18f2f616
AC		 138 dma_addr_t tmp_addr_t = 0;
139
140 ahw = adapter->ahw;
7777de9a
AC		 141 memset(&cmd, 0, sizeof(cmd));
142 cmd.req.cmd = QLCNIC_CDRP_CMD_TEMP_SIZE;
143 memset(&cmd.rsp, 1, sizeof(struct _cdrp_cmd));
144 qlcnic_issue_cmd(adapter, &cmd);
145 if (cmd.rsp.cmd != QLCNIC_RCODE_SUCCESS) {
602ca6f0 146 dev_info(&adapter->pdev->dev,
7777de9a 147 "Can't get template size %d\n", cmd.rsp.cmd);
18f2f616
AC		 148 err = -EIO;
149 return err;
150 }
7777de9a
AC		 151 temp_size = cmd.rsp.arg2;
152 version = cmd.rsp.arg3;
5d17f36b
SS		 153 dev_info(&adapter->pdev->dev,
154 "minidump template version = 0x%x", version);
18f2f616
AC		 155 if (!temp_size)
156 return -EIO;
157
158 tmp_addr = dma_alloc_coherent(&adapter->pdev->dev, temp_size,
159 &tmp_addr_t, GFP_KERNEL);
160 if (!tmp_addr) {
161 dev_err(&adapter->pdev->dev,
162 "Can't get memory for FW dump template\n");
163 return -ENOMEM;
164 }
7777de9a
AC		 165 memset(&cmd.rsp, 0, sizeof(struct _cdrp_cmd));
166 cmd.req.cmd = QLCNIC_CDRP_CMD_GET_TEMP_HDR;
167 cmd.req.arg1 = LSD(tmp_addr_t);
168 cmd.req.arg2 = MSD(tmp_addr_t);
169 cmd.req.arg3 = temp_size;
170 qlcnic_issue_cmd(adapter, &cmd);
171
172 err = cmd.rsp.cmd;
18f2f616
AC		 173 if (err != QLCNIC_RCODE_SUCCESS) {
174 dev_err(&adapter->pdev->dev,
175 "Failed to get mini dump template header %d\n", err);
176 err = -EIO;
177 goto error;
178 }
18f2f616
AC		 179 ahw->fw_dump.tmpl_hdr = vzalloc(temp_size);
180 if (!ahw->fw_dump.tmpl_hdr) {
181 err = -EIO;
182 goto error;
183 }
43d620c8 184 tmp_buf = tmp_addr;
18f2f616
AC		 185 template = (u32 *) ahw->fw_dump.tmpl_hdr;
186 for (i = 0; i < temp_size/sizeof(u32); i++)
187 *template++ = __le32_to_cpu(*tmp_buf++);
188
63507592
SS		 189 csum = qlcnic_temp_checksum((u32 *)ahw->fw_dump.tmpl_hdr, temp_size);
190 if (csum) {
191 dev_err(&adapter->pdev->dev,
192 "Template header checksum validation failed\n");
193 err = -EIO;
194 goto error;
195 }
196
18f2f616 197 tmpl_hdr = ahw->fw_dump.tmpl_hdr;
40522998 198 tmpl_hdr->drv_cap_mask = QLCNIC_DUMP_MASK_DEF;
9d6a6440 199 ahw->fw_dump.enable = 1;
18f2f616
AC		 200error:
201 dma_free_coherent(&adapter->pdev->dev, temp_size, tmp_addr, tmp_addr_t);
202 return err;
203}
204
af19b491
AKS		 205int
206qlcnic_fw_cmd_set_mtu(struct qlcnic_adapter *adapter, int mtu)
207{
7777de9a 208 struct qlcnic_cmd_args cmd;
b1fc6d3c 209 struct qlcnic_recv_context *recv_ctx = adapter->recv_ctx;
af19b491 210
7777de9a
AC		 211 memset(&cmd, 0, sizeof(cmd));
212 cmd.req.cmd = QLCNIC_CDRP_CMD_SET_MTU;
213 cmd.req.arg1 = recv_ctx->context_id;
214 cmd.req.arg2 = mtu;
215 cmd.req.arg3 = 0;
af19b491 216 if (recv_ctx->state == QLCNIC_HOST_CTX_STATE_ACTIVE) {
7777de9a
AC		 217 qlcnic_issue_cmd(adapter, &cmd);
218 if (cmd.rsp.cmd) {
af19b491
AKS		 219 dev_err(&adapter->pdev->dev, "Failed to set mtu\n");
220 return -EIO;
221 }
222 }
223
224 return 0;
225}
226
227static int
228qlcnic_fw_cmd_create_rx_ctx(struct qlcnic_adapter *adapter)
229{
230 void *addr;
231 struct qlcnic_hostrq_rx_ctx *prq;
232 struct qlcnic_cardrsp_rx_ctx *prsp;
233 struct qlcnic_hostrq_rds_ring *prq_rds;
234 struct qlcnic_hostrq_sds_ring *prq_sds;
235 struct qlcnic_cardrsp_rds_ring *prsp_rds;
236 struct qlcnic_cardrsp_sds_ring *prsp_sds;
237 struct qlcnic_host_rds_ring *rds_ring;
238 struct qlcnic_host_sds_ring *sds_ring;
7777de9a 239 struct qlcnic_cmd_args cmd;
af19b491
AKS		 240
241 dma_addr_t hostrq_phys_addr, cardrsp_phys_addr;
242 u64 phys_addr;
243
b1fc6d3c 244 u8 i, nrds_rings, nsds_rings;
af19b491 245 size_t rq_size, rsp_size;
2e9d722d 246 u32 cap, reg, val, reg2;
af19b491 247 int err;
63507592 248 u16 temp;
af19b491 249
b1fc6d3c 250 struct qlcnic_recv_context *recv_ctx = adapter->recv_ctx;
af19b491
AKS		 251
252 nrds_rings = adapter->max_rds_rings;
253 nsds_rings = adapter->max_sds_rings;
254
255 rq_size =
256 SIZEOF_HOSTRQ_RX(struct qlcnic_hostrq_rx_ctx, nrds_rings,
257 nsds_rings);
258 rsp_size =
259 SIZEOF_CARDRSP_RX(struct qlcnic_cardrsp_rx_ctx, nrds_rings,
260 nsds_rings);
261
b1fc6d3c
AC		 262 addr = dma_alloc_coherent(&adapter->pdev->dev, rq_size,
263 &hostrq_phys_addr, GFP_KERNEL);
af19b491
AKS		 264 if (addr == NULL)
265 return -ENOMEM;
43d620c8 266 prq = addr;
af19b491 267
b1fc6d3c
AC		 268 addr = dma_alloc_coherent(&adapter->pdev->dev, rsp_size,
269 &cardrsp_phys_addr, GFP_KERNEL);
af19b491
AKS		 270 if (addr == NULL) {
271 err = -ENOMEM;
272 goto out_free_rq;
273 }
43d620c8 274 prsp = addr;
af19b491
AKS		 275
276 prq->host_rsp_dma_addr = cpu_to_le64(cardrsp_phys_addr);
277
8f891387 278 cap = (QLCNIC_CAP0_LEGACY_CONTEXT | QLCNIC_CAP0_LEGACY_MN
279 | QLCNIC_CAP0_VALIDOFF);
af19b491
AKS		 280 cap |= (QLCNIC_CAP0_JUMBO_CONTIGUOUS | QLCNIC_CAP0_LRO_CONTIGUOUS);
281
cae82d49
RB		 282 if (adapter->flags & QLCNIC_FW_LRO_MSS_CAP)
283 cap |= QLCNIC_CAP0_LRO_MSS;
284
63507592
SS		 285 temp = offsetof(struct qlcnic_hostrq_rx_ctx, msix_handler);
286 prq->valid_field_offset = cpu_to_le16(temp);
8f891387 287 prq->txrx_sds_binding = nsds_rings - 1;
288
af19b491
AKS		 289 prq->capabilities[0] = cpu_to_le32(cap);
290 prq->host_int_crb_mode =
291 cpu_to_le32(QLCNIC_HOST_INT_CRB_MODE_SHARED);
292 prq->host_rds_crb_mode =
293 cpu_to_le32(QLCNIC_HOST_RDS_CRB_MODE_UNIQUE);
294
295 prq->num_rds_rings = cpu_to_le16(nrds_rings);
296 prq->num_sds_rings = cpu_to_le16(nsds_rings);
b1fc6d3c 297 prq->rds_ring_offset = 0;
af19b491
AKS		 298
299 val = le32_to_cpu(prq->rds_ring_offset) +
300 (sizeof(struct qlcnic_hostrq_rds_ring) * nrds_rings);
301 prq->sds_ring_offset = cpu_to_le32(val);
302
303 prq_rds = (struct qlcnic_hostrq_rds_ring *)(prq->data +
304 le32_to_cpu(prq->rds_ring_offset));
305
306 for (i = 0; i < nrds_rings; i++) {
307
308 rds_ring = &recv_ctx->rds_rings[i];
8a15ad1f 309 rds_ring->producer = 0;
af19b491
AKS		 310
311 prq_rds[i].host_phys_addr = cpu_to_le64(rds_ring->phys_addr);
312 prq_rds[i].ring_size = cpu_to_le32(rds_ring->num_desc);
313 prq_rds[i].ring_kind = cpu_to_le32(i);
314 prq_rds[i].buff_size = cpu_to_le64(rds_ring->dma_size);
315 }
316
317 prq_sds = (struct qlcnic_hostrq_sds_ring *)(prq->data +
318 le32_to_cpu(prq->sds_ring_offset));
319
320 for (i = 0; i < nsds_rings; i++) {
321
322 sds_ring = &recv_ctx->sds_rings[i];
8a15ad1f
AKS		 323 sds_ring->consumer = 0;
324 memset(sds_ring->desc_head, 0, STATUS_DESC_RINGSIZE(sds_ring));
af19b491
AKS		 325
326 prq_sds[i].host_phys_addr = cpu_to_le64(sds_ring->phys_addr);
327 prq_sds[i].ring_size = cpu_to_le32(sds_ring->num_desc);
328 prq_sds[i].msi_index = cpu_to_le16(i);
329 }
330
331 phys_addr = hostrq_phys_addr;
7777de9a
AC		 332 memset(&cmd, 0, sizeof(cmd));
333 cmd.req.arg1 = (u32) (phys_addr >> 32);
334 cmd.req.arg2 = (u32) (phys_addr & 0xffffffff);
335 cmd.req.arg3 = rq_size;
336 cmd.req.cmd = QLCNIC_CDRP_CMD_CREATE_RX_CTX;
337 qlcnic_issue_cmd(adapter, &cmd);
338 err = cmd.rsp.cmd;
af19b491
AKS		 339 if (err) {
340 dev_err(&adapter->pdev->dev,
341 "Failed to create rx ctx in firmware%d\n", err);
342 goto out_free_rsp;
343 }
344
345
346 prsp_rds = ((struct qlcnic_cardrsp_rds_ring *)
347 &prsp->data[le32_to_cpu(prsp->rds_ring_offset)]);
348
349 for (i = 0; i < le16_to_cpu(prsp->num_rds_rings); i++) {
350 rds_ring = &recv_ctx->rds_rings[i];
351
352 reg = le32_to_cpu(prsp_rds[i].host_producer_crb);
b1fc6d3c 353 rds_ring->crb_rcv_producer = adapter->ahw->pci_base0 + reg;
af19b491
AKS		 354 }
355
356 prsp_sds = ((struct qlcnic_cardrsp_sds_ring *)
357 &prsp->data[le32_to_cpu(prsp->sds_ring_offset)]);
358
359 for (i = 0; i < le16_to_cpu(prsp->num_sds_rings); i++) {
360 sds_ring = &recv_ctx->sds_rings[i];
361
362 reg = le32_to_cpu(prsp_sds[i].host_consumer_crb);
2e9d722d 363 reg2 = le32_to_cpu(prsp_sds[i].interrupt_crb);
af19b491 364
b1fc6d3c
AC		 365 sds_ring->crb_sts_consumer = adapter->ahw->pci_base0 + reg;
366 sds_ring->crb_intr_mask = adapter->ahw->pci_base0 + reg2;
af19b491
AKS		 367 }
368
369 recv_ctx->state = le32_to_cpu(prsp->host_ctx_state);
370 recv_ctx->context_id = le16_to_cpu(prsp->context_id);
371 recv_ctx->virt_port = prsp->virt_port;
372
373out_free_rsp:
b1fc6d3c
AC		 374 dma_free_coherent(&adapter->pdev->dev, rsp_size, prsp,
375 cardrsp_phys_addr);
af19b491 376out_free_rq:
b1fc6d3c 377 dma_free_coherent(&adapter->pdev->dev, rq_size, prq, hostrq_phys_addr);
af19b491
AKS		 378 return err;
379}
380
381static void
382qlcnic_fw_cmd_destroy_rx_ctx(struct qlcnic_adapter *adapter)
383{
7777de9a 384 struct qlcnic_cmd_args cmd;
b1fc6d3c 385 struct qlcnic_recv_context *recv_ctx = adapter->recv_ctx;
af19b491 386
7777de9a
AC		 387 memset(&cmd, 0, sizeof(cmd));
388 cmd.req.arg1 = recv_ctx->context_id;
389 cmd.req.arg2 = QLCNIC_DESTROY_CTX_RESET;
390 cmd.req.arg3 = 0;
391 cmd.req.cmd = QLCNIC_CDRP_CMD_DESTROY_RX_CTX;
392 qlcnic_issue_cmd(adapter, &cmd);
393 if (cmd.rsp.cmd)
af19b491
AKS		 394 dev_err(&adapter->pdev->dev,
395 "Failed to destroy rx ctx in firmware\n");
d626ad4d
AKS		 396
397 recv_ctx->state = QLCNIC_HOST_CTX_STATE_FREED;
af19b491
AKS		 398}
399
400static int
401qlcnic_fw_cmd_create_tx_ctx(struct qlcnic_adapter *adapter)
402{
403 struct qlcnic_hostrq_tx_ctx *prq;
404 struct qlcnic_hostrq_cds_ring *prq_cds;
405 struct qlcnic_cardrsp_tx_ctx *prsp;
406 void *rq_addr, *rsp_addr;
407 size_t rq_size, rsp_size;
408 u32 temp;
7777de9a 409 struct qlcnic_cmd_args cmd;
af19b491
AKS		 410 int err;
411 u64 phys_addr;
412 dma_addr_t rq_phys_addr, rsp_phys_addr;
413 struct qlcnic_host_tx_ring *tx_ring = adapter->tx_ring;
414
8a15ad1f
AKS		 415 /* reset host resources */
416 tx_ring->producer = 0;
417 tx_ring->sw_consumer = 0;
418 *(tx_ring->hw_consumer) = 0;
419
af19b491 420 rq_size = SIZEOF_HOSTRQ_TX(struct qlcnic_hostrq_tx_ctx);
b1fc6d3c
AC		 421 rq_addr = dma_alloc_coherent(&adapter->pdev->dev, rq_size,
422 &rq_phys_addr, GFP_KERNEL);
af19b491
AKS		 423 if (!rq_addr)
424 return -ENOMEM;
425
426 rsp_size = SIZEOF_CARDRSP_TX(struct qlcnic_cardrsp_tx_ctx);
b1fc6d3c
AC		 427 rsp_addr = dma_alloc_coherent(&adapter->pdev->dev, rsp_size,
428 &rsp_phys_addr, GFP_KERNEL);
af19b491
AKS		 429 if (!rsp_addr) {
430 err = -ENOMEM;
431 goto out_free_rq;
432 }
433
434 memset(rq_addr, 0, rq_size);
43d620c8 435 prq = rq_addr;
af19b491
AKS		 436
437 memset(rsp_addr, 0, rsp_size);
43d620c8 438 prsp = rsp_addr;
af19b491
AKS		 439
440 prq->host_rsp_dma_addr = cpu_to_le64(rsp_phys_addr);
441
442 temp = (QLCNIC_CAP0_LEGACY_CONTEXT | QLCNIC_CAP0_LEGACY_MN |
443 QLCNIC_CAP0_LSO);
444 prq->capabilities[0] = cpu_to_le32(temp);
445
446 prq->host_int_crb_mode =
447 cpu_to_le32(QLCNIC_HOST_INT_CRB_MODE_SHARED);
448
449 prq->interrupt_ctl = 0;
450 prq->msi_index = 0;
451 prq->cmd_cons_dma_addr = cpu_to_le64(tx_ring->hw_cons_phys_addr);
452
453 prq_cds = &prq->cds_ring;
454
455 prq_cds->host_phys_addr = cpu_to_le64(tx_ring->phys_addr);
456 prq_cds->ring_size = cpu_to_le32(tx_ring->num_desc);
457
458 phys_addr = rq_phys_addr;
7777de9a
AC		 459 memset(&cmd, 0, sizeof(cmd));
460 cmd.req.arg1 = (u32)(phys_addr >> 32);
461 cmd.req.arg2 = ((u32)phys_addr & 0xffffffff);
462 cmd.req.arg3 = rq_size;
463 cmd.req.cmd = QLCNIC_CDRP_CMD_CREATE_TX_CTX;
464 qlcnic_issue_cmd(adapter, &cmd);
465 err = cmd.rsp.cmd;
af19b491
AKS		 466
467 if (err == QLCNIC_RCODE_SUCCESS) {
468 temp = le32_to_cpu(prsp->cds_ring.host_producer_crb);
b1fc6d3c 469 tx_ring->crb_cmd_producer = adapter->ahw->pci_base0 + temp;
af19b491 470
79788450 471 adapter->tx_ring->ctx_id = le16_to_cpu(prsp->context_id);
af19b491
AKS		 472 } else {
473 dev_err(&adapter->pdev->dev,
474 "Failed to create tx ctx in firmware%d\n", err);
475 err = -EIO;
476 }
477
b1fc6d3c
AC		 478 dma_free_coherent(&adapter->pdev->dev, rsp_size, rsp_addr,
479 rsp_phys_addr);
af19b491
AKS		 480
481out_free_rq:
b1fc6d3c 482 dma_free_coherent(&adapter->pdev->dev, rq_size, rq_addr, rq_phys_addr);
af19b491
AKS		 483
484 return err;
485}
486
487static void
488qlcnic_fw_cmd_destroy_tx_ctx(struct qlcnic_adapter *adapter)
489{
7777de9a
AC		 490 struct qlcnic_cmd_args cmd;
491
492 memset(&cmd, 0, sizeof(cmd));
79788450 493 cmd.req.arg1 = adapter->tx_ring->ctx_id;
7777de9a
AC		 494 cmd.req.arg2 = QLCNIC_DESTROY_CTX_RESET;
495 cmd.req.arg3 = 0;
496 cmd.req.cmd = QLCNIC_CDRP_CMD_DESTROY_TX_CTX;
497 qlcnic_issue_cmd(adapter, &cmd);
498 if (cmd.rsp.cmd)
af19b491
AKS		 499 dev_err(&adapter->pdev->dev,
500 "Failed to destroy tx ctx in firmware\n");
af19b491
AKS		 501}
502
503int
7e610caa 504qlcnic_fw_cmd_set_port(struct qlcnic_adapter *adapter, u32 config)
af19b491 505{
7777de9a
AC		 506 struct qlcnic_cmd_args cmd;
507
508 memset(&cmd, 0, sizeof(cmd));
509 cmd.req.arg1 = config;
510 cmd.req.cmd = QLCNIC_CDRP_CMD_CONFIG_PORT;
511 qlcnic_issue_cmd(adapter, &cmd);
512
513 return cmd.rsp.cmd;
af19b491
AKS		 514}
515
516int qlcnic_alloc_hw_resources(struct qlcnic_adapter *adapter)
517{
518 void *addr;
519 int err;
520 int ring;
521 struct qlcnic_recv_context *recv_ctx;
522 struct qlcnic_host_rds_ring *rds_ring;
523 struct qlcnic_host_sds_ring *sds_ring;
524 struct qlcnic_host_tx_ring *tx_ring;
525
526 struct pci_dev *pdev = adapter->pdev;
527
b1fc6d3c 528 recv_ctx = adapter->recv_ctx;
af19b491
AKS		 529 tx_ring = adapter->tx_ring;
530
b1fc6d3c
AC		 531 tx_ring->hw_consumer = (__le32 *) dma_alloc_coherent(&pdev->dev,
532 sizeof(u32), &tx_ring->hw_cons_phys_addr, GFP_KERNEL);
af19b491
AKS		 533 if (tx_ring->hw_consumer == NULL) {
534 dev_err(&pdev->dev, "failed to allocate tx consumer\n");
535 return -ENOMEM;
536 }
af19b491
AKS		 537
538 /* cmd desc ring */
b1fc6d3c
AC		 539 addr = dma_alloc_coherent(&pdev->dev, TX_DESC_RINGSIZE(tx_ring),
540 &tx_ring->phys_addr, GFP_KERNEL);
af19b491
AKS		 541
542 if (addr == NULL) {
543 dev_err(&pdev->dev, "failed to allocate tx desc ring\n");
aadd8184
AC		 544 err = -ENOMEM;
545 goto err_out_free;
af19b491
AKS		 546 }
547
43d620c8 548 tx_ring->desc_head = addr;
af19b491
AKS		 549
550 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
551 rds_ring = &recv_ctx->rds_rings[ring];
b1fc6d3c 552 addr = dma_alloc_coherent(&adapter->pdev->dev,
af19b491 553 RCV_DESC_RINGSIZE(rds_ring),
b1fc6d3c 554 &rds_ring->phys_addr, GFP_KERNEL);
af19b491
AKS		 555 if (addr == NULL) {
556 dev_err(&pdev->dev,
557 "failed to allocate rds ring [%d]\n", ring);
558 err = -ENOMEM;
559 goto err_out_free;
560 }
43d620c8 561 rds_ring->desc_head = addr;
af19b491
AKS		 562
563 }
564
565 for (ring = 0; ring < adapter->max_sds_rings; ring++) {
566 sds_ring = &recv_ctx->sds_rings[ring];
567
b1fc6d3c 568 addr = dma_alloc_coherent(&adapter->pdev->dev,
af19b491 569 STATUS_DESC_RINGSIZE(sds_ring),
b1fc6d3c 570 &sds_ring->phys_addr, GFP_KERNEL);
af19b491
AKS		 571 if (addr == NULL) {
572 dev_err(&pdev->dev,
573 "failed to allocate sds ring [%d]\n", ring);
574 err = -ENOMEM;
575 goto err_out_free;
576 }
43d620c8 577 sds_ring->desc_head = addr;
af19b491
AKS		 578 }
579
af19b491
AKS		 580 return 0;
581
582err_out_free:
583 qlcnic_free_hw_resources(adapter);
584 return err;
585}
586
8a15ad1f
AKS		 587
588int qlcnic_fw_create_ctx(struct qlcnic_adapter *adapter)
af19b491 589{
8a15ad1f
AKS		 590 int err;
591
b0044bcf 592 if (adapter->flags & QLCNIC_NEED_FLR) {
c21fd48c 593 pci_reset_function(adapter->pdev);
b0044bcf
RB		 594 adapter->flags &= ~QLCNIC_NEED_FLR;
595 }
c21fd48c 596
8a15ad1f
AKS		 597 err = qlcnic_fw_cmd_create_rx_ctx(adapter);
598 if (err)
599 return err;
600
601 err = qlcnic_fw_cmd_create_tx_ctx(adapter);
602 if (err) {
603 qlcnic_fw_cmd_destroy_rx_ctx(adapter);
604 return err;
605 }
af19b491 606
8a15ad1f
AKS		 607 set_bit(__QLCNIC_FW_ATTACHED, &adapter->state);
608 return 0;
609}
af19b491 610
8a15ad1f
AKS		 611void qlcnic_fw_destroy_ctx(struct qlcnic_adapter *adapter)
612{
af19b491
AKS		 613 if (test_and_clear_bit(__QLCNIC_FW_ATTACHED, &adapter->state)) {
614 qlcnic_fw_cmd_destroy_rx_ctx(adapter);
615 qlcnic_fw_cmd_destroy_tx_ctx(adapter);
616
617 /* Allow dma queues to drain after context reset */
68b3f28c 618 mdelay(20);
af19b491 619 }
8a15ad1f
AKS		 620}
621
622void qlcnic_free_hw_resources(struct qlcnic_adapter *adapter)
623{
624 struct qlcnic_recv_context *recv_ctx;
625 struct qlcnic_host_rds_ring *rds_ring;
626 struct qlcnic_host_sds_ring *sds_ring;
627 struct qlcnic_host_tx_ring *tx_ring;
628 int ring;
af19b491 629
b1fc6d3c 630 recv_ctx = adapter->recv_ctx;
af19b491
AKS		 631
632 tx_ring = adapter->tx_ring;
633 if (tx_ring->hw_consumer != NULL) {
b1fc6d3c 634 dma_free_coherent(&adapter->pdev->dev,
af19b491
AKS		 635 sizeof(u32),
636 tx_ring->hw_consumer,
637 tx_ring->hw_cons_phys_addr);
638 tx_ring->hw_consumer = NULL;
639 }
640
641 if (tx_ring->desc_head != NULL) {
b1fc6d3c 642 dma_free_coherent(&adapter->pdev->dev,
af19b491
AKS		 643 TX_DESC_RINGSIZE(tx_ring),
644 tx_ring->desc_head, tx_ring->phys_addr);
645 tx_ring->desc_head = NULL;
646 }
647
648 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
649 rds_ring = &recv_ctx->rds_rings[ring];
650
651 if (rds_ring->desc_head != NULL) {
b1fc6d3c 652 dma_free_coherent(&adapter->pdev->dev,
af19b491
AKS		 653 RCV_DESC_RINGSIZE(rds_ring),
654 rds_ring->desc_head,
655 rds_ring->phys_addr);
656 rds_ring->desc_head = NULL;
657 }
658 }
659
660 for (ring = 0; ring < adapter->max_sds_rings; ring++) {
661 sds_ring = &recv_ctx->sds_rings[ring];
662
663 if (sds_ring->desc_head != NULL) {
b1fc6d3c 664 dma_free_coherent(&adapter->pdev->dev,
af19b491
AKS		 665 STATUS_DESC_RINGSIZE(sds_ring),
666 sds_ring->desc_head,
667 sds_ring->phys_addr);
668 sds_ring->desc_head = NULL;
669 }
670 }
671}
672
2e9d722d
AC		 673
674/* Get MAC address of a NIC partition */
675int qlcnic_get_mac_address(struct qlcnic_adapter *adapter, u8 *mac)
676{
677 int err;
7777de9a
AC		 678 struct qlcnic_cmd_args cmd;
679
680 memset(&cmd, 0, sizeof(cmd));
681 cmd.req.arg1 = adapter->ahw->pci_func | BIT_8;
682 cmd.req.cmd = QLCNIC_CDRP_CMD_MAC_ADDRESS;
683 cmd.rsp.arg1 = cmd.rsp.arg2 = 1;
684 qlcnic_issue_cmd(adapter, &cmd);
685 err = cmd.rsp.cmd;
2e9d722d 686
7f9a0c34 687 if (err == QLCNIC_RCODE_SUCCESS)
5ad6ff9d 688 qlcnic_fetch_mac(cmd.rsp.arg1, cmd.rsp.arg2, 0, mac);
7f9a0c34 689 else {
2e9d722d
AC		 690 dev_err(&adapter->pdev->dev,
691 "Failed to get mac address%d\n", err);
692 err = -EIO;
693 }
694
695 return err;
696}
697
698/* Get info of a NIC partition */
346fe763
RB		 699int qlcnic_get_nic_info(struct qlcnic_adapter *adapter,
700 struct qlcnic_info *npar_info, u8 func_id)
2e9d722d
AC		 701{
702 int err;
703 dma_addr_t nic_dma_t;
63507592 704 struct qlcnic_info_le *nic_info;
2e9d722d 705 void *nic_info_addr;
7777de9a 706 struct qlcnic_cmd_args cmd;
63507592 707 size_t nic_size = sizeof(struct qlcnic_info_le);
2e9d722d 708
b1fc6d3c
AC		 709 nic_info_addr = dma_alloc_coherent(&adapter->pdev->dev, nic_size,
710 &nic_dma_t, GFP_KERNEL);
2e9d722d
AC		 711 if (!nic_info_addr)
712 return -ENOMEM;
713 memset(nic_info_addr, 0, nic_size);
714
43d620c8 715 nic_info = nic_info_addr;
7777de9a
AC		 716 memset(&cmd, 0, sizeof(cmd));
717 cmd.req.cmd = QLCNIC_CDRP_CMD_GET_NIC_INFO;
718 cmd.req.arg1 = MSD(nic_dma_t);
719 cmd.req.arg2 = LSD(nic_dma_t);
720 cmd.req.arg3 = (func_id << 16 | nic_size);
721 qlcnic_issue_cmd(adapter, &cmd);
722 err = cmd.rsp.cmd;
2e9d722d
AC		 723
724 if (err == QLCNIC_RCODE_SUCCESS) {
cea8975e
AC		 725 npar_info->pci_func = le16_to_cpu(nic_info->pci_func);
726 npar_info->op_mode = le16_to_cpu(nic_info->op_mode);
346fe763
RB		 727 npar_info->phys_port = le16_to_cpu(nic_info->phys_port);
728 npar_info->switch_mode = le16_to_cpu(nic_info->switch_mode);
729 npar_info->max_tx_ques = le16_to_cpu(nic_info->max_tx_ques);
730 npar_info->max_rx_ques = le16_to_cpu(nic_info->max_rx_ques);
731 npar_info->min_tx_bw = le16_to_cpu(nic_info->min_tx_bw);
732 npar_info->max_tx_bw = le16_to_cpu(nic_info->max_tx_bw);
733 npar_info->capabilities = le32_to_cpu(nic_info->capabilities);
734 npar_info->max_mtu = le16_to_cpu(nic_info->max_mtu);
0e33c664 735
2e9d722d
AC		 736 dev_info(&adapter->pdev->dev,
737 "phy port: %d switch_mode: %d,\n"
738 "\tmax_tx_q: %d max_rx_q: %d min_tx_bw: 0x%x,\n"
739 "\tmax_tx_bw: 0x%x max_mtu:0x%x, capabilities: 0x%x\n",
346fe763
RB		 740 npar_info->phys_port, npar_info->switch_mode,
741 npar_info->max_tx_ques, npar_info->max_rx_ques,
742 npar_info->min_tx_bw, npar_info->max_tx_bw,
743 npar_info->max_mtu, npar_info->capabilities);
2e9d722d
AC		 744 } else {
745 dev_err(&adapter->pdev->dev,
746 "Failed to get nic info%d\n", err);
747 err = -EIO;
748 }
749
b1fc6d3c
AC		 750 dma_free_coherent(&adapter->pdev->dev, nic_size, nic_info_addr,
751 nic_dma_t);
2e9d722d
AC		 752 return err;
753}
754
755/* Configure a NIC partition */
756int qlcnic_set_nic_info(struct qlcnic_adapter *adapter, struct qlcnic_info *nic)
757{
758 int err = -EIO;
2e9d722d
AC		 759 dma_addr_t nic_dma_t;
760 void *nic_info_addr;
7777de9a 761 struct qlcnic_cmd_args cmd;
63507592
SS		 762 struct qlcnic_info_le *nic_info;
763 size_t nic_size = sizeof(struct qlcnic_info_le);
2e9d722d 764
79788450 765 if (adapter->ahw->op_mode != QLCNIC_MGMT_FUNC)
2e9d722d
AC		 766 return err;
767
b1fc6d3c
AC		 768 nic_info_addr = dma_alloc_coherent(&adapter->pdev->dev, nic_size,
769 &nic_dma_t, GFP_KERNEL);
2e9d722d
AC		 770 if (!nic_info_addr)
771 return -ENOMEM;
772
773 memset(nic_info_addr, 0, nic_size);
43d620c8 774 nic_info = nic_info_addr;
2e9d722d
AC		 775
776 nic_info->pci_func = cpu_to_le16(nic->pci_func);
777 nic_info->op_mode = cpu_to_le16(nic->op_mode);
778 nic_info->phys_port = cpu_to_le16(nic->phys_port);
779 nic_info->switch_mode = cpu_to_le16(nic->switch_mode);
780 nic_info->capabilities = cpu_to_le32(nic->capabilities);
781 nic_info->max_mac_filters = nic->max_mac_filters;
782 nic_info->max_tx_ques = cpu_to_le16(nic->max_tx_ques);
783 nic_info->max_rx_ques = cpu_to_le16(nic->max_rx_ques);
784 nic_info->min_tx_bw = cpu_to_le16(nic->min_tx_bw);
785 nic_info->max_tx_bw = cpu_to_le16(nic->max_tx_bw);
786
7777de9a
AC		 787 memset(&cmd, 0, sizeof(cmd));
788 cmd.req.cmd = QLCNIC_CDRP_CMD_SET_NIC_INFO;
789 cmd.req.arg1 = MSD(nic_dma_t);
790 cmd.req.arg2 = LSD(nic_dma_t);
791 cmd.req.arg3 = ((nic->pci_func << 16) | nic_size);
792 qlcnic_issue_cmd(adapter, &cmd);
793 err = cmd.rsp.cmd;
2e9d722d
AC		 794
795 if (err != QLCNIC_RCODE_SUCCESS) {
796 dev_err(&adapter->pdev->dev,
797 "Failed to set nic info%d\n", err);
798 err = -EIO;
799 }
800
b1fc6d3c
AC		 801 dma_free_coherent(&adapter->pdev->dev, nic_size, nic_info_addr,
802 nic_dma_t);
2e9d722d
AC		 803 return err;
804}
805
806/* Get PCI Info of a partition */
346fe763
RB		 807int qlcnic_get_pci_info(struct qlcnic_adapter *adapter,
808 struct qlcnic_pci_info *pci_info)
2e9d722d
AC		 809{
810 int err = 0, i;
7777de9a 811 struct qlcnic_cmd_args cmd;
2e9d722d 812 dma_addr_t pci_info_dma_t;
63507592 813 struct qlcnic_pci_info_le *npar;
2e9d722d 814 void *pci_info_addr;
63507592 815 size_t npar_size = sizeof(struct qlcnic_pci_info_le);
2e9d722d
AC		 816 size_t pci_size = npar_size * QLCNIC_MAX_PCI_FUNC;
817
b1fc6d3c
AC		 818 pci_info_addr = dma_alloc_coherent(&adapter->pdev->dev, pci_size,
819 &pci_info_dma_t, GFP_KERNEL);
2e9d722d
AC		 820 if (!pci_info_addr)
821 return -ENOMEM;
822 memset(pci_info_addr, 0, pci_size);
823
43d620c8 824 npar = pci_info_addr;
7777de9a
AC		 825 memset(&cmd, 0, sizeof(cmd));
826 cmd.req.cmd = QLCNIC_CDRP_CMD_GET_PCI_INFO;
827 cmd.req.arg1 = MSD(pci_info_dma_t);
828 cmd.req.arg2 = LSD(pci_info_dma_t);
829 cmd.req.arg3 = pci_size;
830 qlcnic_issue_cmd(adapter, &cmd);
831 err = cmd.rsp.cmd;
2e9d722d 832
bff57d8e 833 adapter->ahw->act_pci_func = 0;
2e9d722d 834 if (err == QLCNIC_RCODE_SUCCESS) {
346fe763 835 for (i = 0; i < QLCNIC_MAX_PCI_FUNC; i++, npar++, pci_info++) {
a1c0c459
SC		 836 pci_info->id = le16_to_cpu(npar->id);
837 pci_info->active = le16_to_cpu(npar->active);
838 pci_info->type = le16_to_cpu(npar->type);
bff57d8e
SC		 839 if (pci_info->type == QLCNIC_TYPE_NIC)
840 adapter->ahw->act_pci_func++;
346fe763 841 pci_info->default_port =
a1c0c459 842 le16_to_cpu(npar->default_port);
346fe763 843 pci_info->tx_min_bw =
a1c0c459 844 le16_to_cpu(npar->tx_min_bw);
346fe763 845 pci_info->tx_max_bw =
a1c0c459 846 le16_to_cpu(npar->tx_max_bw);
346fe763 847 memcpy(pci_info->mac, npar->mac, ETH_ALEN);
2e9d722d
AC		 848 }
849 } else {
850 dev_err(&adapter->pdev->dev,
851 "Failed to get PCI Info%d\n", err);
2e9d722d
AC		 852 err = -EIO;
853 }
2e9d722d 854
b1fc6d3c 855 dma_free_coherent(&adapter->pdev->dev, pci_size, pci_info_addr,
2e9d722d
AC		 856 pci_info_dma_t);
857 return err;
858}
859
2e9d722d
AC		 860/* Configure eSwitch for port mirroring */
861int qlcnic_config_port_mirroring(struct qlcnic_adapter *adapter, u8 id,
862 u8 enable_mirroring, u8 pci_func)
863{
864 int err = -EIO;
865 u32 arg1;
7777de9a 866 struct qlcnic_cmd_args cmd;
2e9d722d 867
79788450
SC		 868 if (adapter->ahw->op_mode != QLCNIC_MGMT_FUNC ||
869 !(adapter->eswitch[id].flags & QLCNIC_SWITCH_ENABLE))
2e9d722d
AC		 870 return err;
871
872 arg1 = id | (enable_mirroring ? BIT_4 : 0);
873 arg1 |= pci_func << 8;
874
7777de9a
AC		 875 memset(&cmd, 0, sizeof(cmd));
876 cmd.req.cmd = QLCNIC_CDRP_CMD_SET_PORTMIRRORING;
877 cmd.req.arg1 = arg1;
878 qlcnic_issue_cmd(adapter, &cmd);
879 err = cmd.rsp.cmd;
2e9d722d
AC		 880
881 if (err != QLCNIC_RCODE_SUCCESS) {
882 dev_err(&adapter->pdev->dev,
883 "Failed to configure port mirroring%d on eswitch:%d\n",
884 pci_func, id);
885 } else {
886 dev_info(&adapter->pdev->dev,
887 "Configured eSwitch %d for port mirroring:%d\n",
888 id, pci_func);
889 }
890
891 return err;
892}
893
b6021212
AKS		 894int qlcnic_get_port_stats(struct qlcnic_adapter *adapter, const u8 func,
895 const u8 rx_tx, struct __qlcnic_esw_statistics *esw_stats) {
896
63507592
SS		 897 size_t stats_size = sizeof(struct qlcnic_esw_stats_le);
898 struct qlcnic_esw_stats_le *stats;
b6021212
AKS		 899 dma_addr_t stats_dma_t;
900 void *stats_addr;
901 u32 arg1;
7777de9a 902 struct qlcnic_cmd_args cmd;
b6021212
AKS		 903 int err;
904
905 if (esw_stats == NULL)
906 return -ENOMEM;
907
79788450
SC		 908 if ((adapter->ahw->op_mode != QLCNIC_MGMT_FUNC) &&
909 (func != adapter->ahw->pci_func)) {
b6021212
AKS		 910 dev_err(&adapter->pdev->dev,
911 "Not privilege to query stats for func=%d", func);
912 return -EIO;
913 }
914
b1fc6d3c
AC		 915 stats_addr = dma_alloc_coherent(&adapter->pdev->dev, stats_size,
916 &stats_dma_t, GFP_KERNEL);
b6021212
AKS		 917 if (!stats_addr) {
918 dev_err(&adapter->pdev->dev, "Unable to allocate memory\n");
919 return -ENOMEM;
920 }
921 memset(stats_addr, 0, stats_size);
922
923 arg1 = func | QLCNIC_STATS_VERSION << 8 | QLCNIC_STATS_PORT << 12;
924 arg1 |= rx_tx << 15 | stats_size << 16;
925
7777de9a
AC		 926 memset(&cmd, 0, sizeof(cmd));
927 cmd.req.cmd = QLCNIC_CDRP_CMD_GET_ESWITCH_STATS;
928 cmd.req.arg1 = arg1;
929 cmd.req.arg2 = MSD(stats_dma_t);
930 cmd.req.arg3 = LSD(stats_dma_t);
931 qlcnic_issue_cmd(adapter, &cmd);
932 err = cmd.rsp.cmd;
b6021212 933
63e74e9c 934 if (!err) {
43d620c8 935 stats = stats_addr;
63e74e9c
AKS		 936 esw_stats->context_id = le16_to_cpu(stats->context_id);
937 esw_stats->version = le16_to_cpu(stats->version);
938 esw_stats->size = le16_to_cpu(stats->size);
939 esw_stats->multicast_frames =
940 le64_to_cpu(stats->multicast_frames);
941 esw_stats->broadcast_frames =
942 le64_to_cpu(stats->broadcast_frames);
943 esw_stats->unicast_frames = le64_to_cpu(stats->unicast_frames);
944 esw_stats->dropped_frames = le64_to_cpu(stats->dropped_frames);
945 esw_stats->local_frames = le64_to_cpu(stats->local_frames);
946 esw_stats->errors = le64_to_cpu(stats->errors);
947 esw_stats->numbytes = le64_to_cpu(stats->numbytes);
948 }
b6021212 949
b1fc6d3c 950 dma_free_coherent(&adapter->pdev->dev, stats_size, stats_addr,
b6021212
AKS		 951 stats_dma_t);
952 return err;
953}
954
54a8997c
JK		 955/* This routine will retrieve the MAC statistics from firmware */
956int qlcnic_get_mac_stats(struct qlcnic_adapter *adapter,
957 struct qlcnic_mac_statistics *mac_stats)
958{
63507592 959 struct qlcnic_mac_statistics_le *stats;
54a8997c 960 struct qlcnic_cmd_args cmd;
63507592 961 size_t stats_size = sizeof(struct qlcnic_mac_statistics_le);
54a8997c
JK		 962 dma_addr_t stats_dma_t;
963 void *stats_addr;
964 int err;
965
966 stats_addr = dma_alloc_coherent(&adapter->pdev->dev, stats_size,
967 &stats_dma_t, GFP_KERNEL);
968 if (!stats_addr) {
969 dev_err(&adapter->pdev->dev,
970 "%s: Unable to allocate memory.\n", __func__);
971 return -ENOMEM;
972 }
973 memset(stats_addr, 0, stats_size);
974 memset(&cmd, 0, sizeof(cmd));
975 cmd.req.cmd = QLCNIC_CDRP_CMD_GET_MAC_STATS;
976 cmd.req.arg1 = stats_size << 16;
977 cmd.req.arg2 = MSD(stats_dma_t);
978 cmd.req.arg3 = LSD(stats_dma_t);
979
980 qlcnic_issue_cmd(adapter, &cmd);
981 err = cmd.rsp.cmd;
982
983 if (!err) {
984 stats = stats_addr;
985 mac_stats->mac_tx_frames = le64_to_cpu(stats->mac_tx_frames);
986 mac_stats->mac_tx_bytes = le64_to_cpu(stats->mac_tx_bytes);
987 mac_stats->mac_tx_mcast_pkts =
988 le64_to_cpu(stats->mac_tx_mcast_pkts);
989 mac_stats->mac_tx_bcast_pkts =
990 le64_to_cpu(stats->mac_tx_bcast_pkts);
991 mac_stats->mac_rx_frames = le64_to_cpu(stats->mac_rx_frames);
992 mac_stats->mac_rx_bytes = le64_to_cpu(stats->mac_rx_bytes);
993 mac_stats->mac_rx_mcast_pkts =
994 le64_to_cpu(stats->mac_rx_mcast_pkts);
995 mac_stats->mac_rx_length_error =
996 le64_to_cpu(stats->mac_rx_length_error);
997 mac_stats->mac_rx_length_small =
998 le64_to_cpu(stats->mac_rx_length_small);
999 mac_stats->mac_rx_length_large =
1000 le64_to_cpu(stats->mac_rx_length_large);
1001 mac_stats->mac_rx_jabber = le64_to_cpu(stats->mac_rx_jabber);
1002 mac_stats->mac_rx_dropped = le64_to_cpu(stats->mac_rx_dropped);
1003 mac_stats->mac_rx_crc_error = le64_to_cpu(stats->mac_rx_crc_error);
54a8997c
JK		 1004 }
1005
1006 dma_free_coherent(&adapter->pdev->dev, stats_size, stats_addr,
1007 stats_dma_t);
1008 return err;
1009}
1010
b6021212
AKS		 1011int qlcnic_get_eswitch_stats(struct qlcnic_adapter *adapter, const u8 eswitch,
1012 const u8 rx_tx, struct __qlcnic_esw_statistics *esw_stats) {
1013
1014 struct __qlcnic_esw_statistics port_stats;
1015 u8 i;
1016 int ret = -EIO;
1017
1018 if (esw_stats == NULL)
1019 return -ENOMEM;
79788450 1020 if (adapter->ahw->op_mode != QLCNIC_MGMT_FUNC)
b6021212
AKS		 1021 return -EIO;
1022 if (adapter->npars == NULL)
1023 return -EIO;
1024
ef182805 1025 memset(esw_stats, 0, sizeof(u64));
54a8997c
JK		 1026 esw_stats->unicast_frames = QLCNIC_STATS_NOT_AVAIL;
1027 esw_stats->multicast_frames = QLCNIC_STATS_NOT_AVAIL;
1028 esw_stats->broadcast_frames = QLCNIC_STATS_NOT_AVAIL;
1029 esw_stats->dropped_frames = QLCNIC_STATS_NOT_AVAIL;
1030 esw_stats->errors = QLCNIC_STATS_NOT_AVAIL;
1031 esw_stats->local_frames = QLCNIC_STATS_NOT_AVAIL;
1032 esw_stats->numbytes = QLCNIC_STATS_NOT_AVAIL;
b6021212
AKS		 1033 esw_stats->context_id = eswitch;
1034
bff57d8e 1035 for (i = 0; i < adapter->ahw->act_pci_func; i++) {
b6021212
AKS		 1036 if (adapter->npars[i].phy_port != eswitch)
1037 continue;
1038
1039 memset(&port_stats, 0, sizeof(struct __qlcnic_esw_statistics));
bff57d8e
SC		 1040 if (qlcnic_get_port_stats(adapter, adapter->npars[i].pci_func,
1041 rx_tx, &port_stats))
b6021212
AKS		 1042 continue;
1043
1044 esw_stats->size = port_stats.size;
1045 esw_stats->version = port_stats.version;
ef182805
AKS		 1046 QLCNIC_ADD_ESW_STATS(esw_stats->unicast_frames,
1047 port_stats.unicast_frames);
1048 QLCNIC_ADD_ESW_STATS(esw_stats->multicast_frames,
1049 port_stats.multicast_frames);
1050 QLCNIC_ADD_ESW_STATS(esw_stats->broadcast_frames,
1051 port_stats.broadcast_frames);
1052 QLCNIC_ADD_ESW_STATS(esw_stats->dropped_frames,
1053 port_stats.dropped_frames);
1054 QLCNIC_ADD_ESW_STATS(esw_stats->errors,
1055 port_stats.errors);
1056 QLCNIC_ADD_ESW_STATS(esw_stats->local_frames,
1057 port_stats.local_frames);
1058 QLCNIC_ADD_ESW_STATS(esw_stats->numbytes,
1059 port_stats.numbytes);
b6021212
AKS		 1060 ret = 0;
1061 }
1062 return ret;
1063}
1064
1065int qlcnic_clear_esw_stats(struct qlcnic_adapter *adapter, const u8 func_esw,
1066 const u8 port, const u8 rx_tx)
1067{
1068
1069 u32 arg1;
7777de9a 1070 struct qlcnic_cmd_args cmd;
b6021212 1071
79788450 1072 if (adapter->ahw->op_mode != QLCNIC_MGMT_FUNC)
b6021212
AKS		 1073 return -EIO;
1074
1075 if (func_esw == QLCNIC_STATS_PORT) {
1076 if (port >= QLCNIC_MAX_PCI_FUNC)
1077 goto err_ret;
1078 } else if (func_esw == QLCNIC_STATS_ESWITCH) {
1079 if (port >= QLCNIC_NIU_MAX_XG_PORTS)
1080 goto err_ret;
1081 } else {
1082 goto err_ret;
1083 }
1084
1085 if (rx_tx > QLCNIC_QUERY_TX_COUNTER)
1086 goto err_ret;
1087
1088 arg1 = port | QLCNIC_STATS_VERSION << 8 | func_esw << 12;
1089 arg1 |= BIT_14 | rx_tx << 15;
1090
7777de9a
AC		 1091 memset(&cmd, 0, sizeof(cmd));
1092 cmd.req.cmd = QLCNIC_CDRP_CMD_GET_ESWITCH_STATS;
1093 cmd.req.arg1 = arg1;
1094 qlcnic_issue_cmd(adapter, &cmd);
1095 return cmd.rsp.cmd;
b6021212
AKS		 1096
1097err_ret:
1098 dev_err(&adapter->pdev->dev, "Invalid argument func_esw=%d port=%d"
1099 "rx_ctx=%d\n", func_esw, port, rx_tx);
1100 return -EIO;
1101}
4e8acb01
RB		 1102
1103static int
1104__qlcnic_get_eswitch_port_config(struct qlcnic_adapter *adapter,
1105 u32 *arg1, u32 *arg2)
1106{
1107 int err = -EIO;
7777de9a 1108 struct qlcnic_cmd_args cmd;
4e8acb01
RB		 1109 u8 pci_func;
1110 pci_func = (*arg1 >> 8);
7777de9a
AC		 1111
1112 cmd.req.cmd = QLCNIC_CDRP_CMD_GET_ESWITCH_PORT_CONFIG;
1113 cmd.req.arg1 = *arg1;
1114 cmd.rsp.arg1 = cmd.rsp.arg2 = 1;
1115 qlcnic_issue_cmd(adapter, &cmd);
1116 *arg1 = cmd.rsp.arg1;
1117 *arg2 = cmd.rsp.arg2;
1118 err = cmd.rsp.cmd;
4e8acb01
RB		 1119
1120 if (err == QLCNIC_RCODE_SUCCESS) {
4e8acb01 1121 dev_info(&adapter->pdev->dev,
7373373d 1122 "eSwitch port config for pci func %d\n", pci_func);
4e8acb01
RB		 1123 } else {
1124 dev_err(&adapter->pdev->dev,
7373373d
RB		 1125 "Failed to get eswitch port config for pci func %d\n",
1126 pci_func);
4e8acb01
RB		 1127 }
1128 return err;
1129}
1130/* Configure eSwitch port
1131op_mode = 0 for setting default port behavior
1132op_mode = 1 for setting vlan id
1133op_mode = 2 for deleting vlan id
1134op_type = 0 for vlan_id
1135op_type = 1 for port vlan_id
1136*/
1137int qlcnic_config_switch_port(struct qlcnic_adapter *adapter,
1138 struct qlcnic_esw_func_cfg *esw_cfg)
1139{
bff57d8e 1140 int err = -EIO, index;
4e8acb01 1141 u32 arg1, arg2 = 0;
7777de9a 1142 struct qlcnic_cmd_args cmd;
4e8acb01
RB		 1143 u8 pci_func;
1144
79788450 1145 if (adapter->ahw->op_mode != QLCNIC_MGMT_FUNC)
4e8acb01
RB		 1146 return err;
1147 pci_func = esw_cfg->pci_func;
bff57d8e
SC		 1148 index = qlcnic_is_valid_nic_func(adapter, pci_func);
1149 if (index < 0)
1150 return err;
1151 arg1 = (adapter->npars[index].phy_port & BIT_0);
4e8acb01
RB		 1152 arg1 |= (pci_func << 8);
1153
1154 if (__qlcnic_get_eswitch_port_config(adapter, &arg1, &arg2))
1155 return err;
1156 arg1 &= ~(0x0ff << 8);
1157 arg1 |= (pci_func << 8);
1158 arg1 &= ~(BIT_2 | BIT_3);
1159 switch (esw_cfg->op_mode) {
1160 case QLCNIC_PORT_DEFAULTS:
1161 arg1 |= (BIT_4 | BIT_6 | BIT_7);
1162 arg2 |= (BIT_0 | BIT_1);
79788450 1163 if (adapter->ahw->capabilities & QLCNIC_FW_CAPABILITY_TSO)
4e8acb01
RB		 1164 arg2 |= (BIT_2 | BIT_3);
1165 if (!(esw_cfg->discard_tagged))
1166 arg1 &= ~BIT_4;
1167 if (!(esw_cfg->promisc_mode))
1168 arg1 &= ~BIT_6;
7373373d 1169 if (!(esw_cfg->mac_override))
4e8acb01
RB		 1170 arg1 &= ~BIT_7;
1171 if (!(esw_cfg->mac_anti_spoof))
1172 arg2 &= ~BIT_0;
1173 if (!(esw_cfg->offload_flags & BIT_0))
1174 arg2 &= ~(BIT_1 | BIT_2 | BIT_3);
1175 if (!(esw_cfg->offload_flags & BIT_1))
1176 arg2 &= ~BIT_2;
1177 if (!(esw_cfg->offload_flags & BIT_2))
1178 arg2 &= ~BIT_3;
1179 break;
1180 case QLCNIC_ADD_VLAN:
1181 arg1 |= (BIT_2 | BIT_5);
1182 arg1 |= (esw_cfg->vlan_id << 16);
1183 break;
1184 case QLCNIC_DEL_VLAN:
1185 arg1 |= (BIT_3 | BIT_5);
1186 arg1 &= ~(0x0ffff << 16);
e9a47700 1187 break;
4e8acb01
RB		 1188 default:
1189 return err;
1190 }
1191
7777de9a
AC		 1192 memset(&cmd, 0, sizeof(cmd));
1193 cmd.req.cmd = QLCNIC_CDRP_CMD_CONFIGURE_ESWITCH;
1194 cmd.req.arg1 = arg1;
1195 cmd.req.arg2 = arg2;
1196 qlcnic_issue_cmd(adapter, &cmd);
4e8acb01 1197
7777de9a 1198 err = cmd.rsp.cmd;
4e8acb01
RB		 1199 if (err != QLCNIC_RCODE_SUCCESS) {
1200 dev_err(&adapter->pdev->dev,
7373373d 1201 "Failed to configure eswitch pci func %d\n", pci_func);
4e8acb01
RB		 1202 } else {
1203 dev_info(&adapter->pdev->dev,
7373373d 1204 "Configured eSwitch for pci func %d\n", pci_func);
4e8acb01
RB		 1205 }
1206
1207 return err;
1208}
1209
1210int
1211qlcnic_get_eswitch_port_config(struct qlcnic_adapter *adapter,
1212 struct qlcnic_esw_func_cfg *esw_cfg)
1213{
1214 u32 arg1, arg2;
bff57d8e 1215 int index;
4e8acb01 1216 u8 phy_port;
bff57d8e
SC		 1217
1218 if (adapter->ahw->op_mode == QLCNIC_MGMT_FUNC) {
1219 index = qlcnic_is_valid_nic_func(adapter, esw_cfg->pci_func);
1220 if (index < 0)
1221 return -EIO;
1222 phy_port = adapter->npars[index].phy_port;
1223 } else {
79788450 1224 phy_port = adapter->ahw->physical_port;
bff57d8e 1225 }
4e8acb01
RB		 1226 arg1 = phy_port;
1227 arg1 |= (esw_cfg->pci_func << 8);
1228 if (__qlcnic_get_eswitch_port_config(adapter, &arg1, &arg2))
1229 return -EIO;
1230
1231 esw_cfg->discard_tagged = !!(arg1 & BIT_4);
1232 esw_cfg->host_vlan_tag = !!(arg1 & BIT_5);
1233 esw_cfg->promisc_mode = !!(arg1 & BIT_6);
7373373d 1234 esw_cfg->mac_override = !!(arg1 & BIT_7);
4e8acb01
RB		 1235 esw_cfg->vlan_id = LSW(arg1 >> 16);
1236 esw_cfg->mac_anti_spoof = (arg2 & 0x1);
1237 esw_cfg->offload_flags = ((arg2 >> 1) & 0x7);
1238
1239 return 0;
1240}
Linux 6.x block layer and io_uring tree(s)