projects / linux-2.6-block.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
qede: Linearize SKBs when needed
[linux-2.6-block.git] / drivers / net / ethernet / qlogic / qede / qede_main.c
CommitLineData
e712d52b
YM		 1/* QLogic qede NIC Driver
2* Copyright (c) 2015 QLogic Corporation
3*
4* This software is available under the terms of the GNU General Public License
5* (GPL) Version 2, available from the file COPYING in the main directory of
6* this source tree.
7*/
8
9#include <linux/module.h>
10#include <linux/pci.h>
11#include <linux/version.h>
12#include <linux/device.h>
13#include <linux/netdevice.h>
14#include <linux/etherdevice.h>
15#include <linux/skbuff.h>
16#include <linux/errno.h>
17#include <linux/list.h>
18#include <linux/string.h>
19#include <linux/dma-mapping.h>
20#include <linux/interrupt.h>
21#include <asm/byteorder.h>
22#include <asm/param.h>
23#include <linux/io.h>
24#include <linux/netdev_features.h>
25#include <linux/udp.h>
26#include <linux/tcp.h>
27#include <net/vxlan.h>
28#include <linux/ip.h>
29#include <net/ipv6.h>
30#include <net/tcp.h>
31#include <linux/if_ether.h>
32#include <linux/if_vlan.h>
33#include <linux/pkt_sched.h>
34#include <linux/ethtool.h>
35#include <linux/in.h>
36#include <linux/random.h>
37#include <net/ip6_checksum.h>
38#include <linux/bitops.h>
39
40#include "qede.h"
41
42static const char version[] = "QLogic QL4xxx 40G/100G Ethernet Driver qede "
43 DRV_MODULE_VERSION "\n";
44
45MODULE_DESCRIPTION("QLogic 40G/100G Ethernet Driver");
46MODULE_LICENSE("GPL");
47MODULE_VERSION(DRV_MODULE_VERSION);
48
49static uint debug;
50module_param(debug, uint, 0);
51MODULE_PARM_DESC(debug, " Default debug msglevel");
52
53static const struct qed_eth_ops *qed_ops;
54
55#define CHIP_NUM_57980S_40 0x1634
0e7441d7 56#define CHIP_NUM_57980S_10 0x1666
e712d52b
YM		 57#define CHIP_NUM_57980S_MF 0x1636
58#define CHIP_NUM_57980S_100 0x1644
59#define CHIP_NUM_57980S_50 0x1654
60#define CHIP_NUM_57980S_25 0x1656
61
62#ifndef PCI_DEVICE_ID_NX2_57980E
63#define PCI_DEVICE_ID_57980S_40 CHIP_NUM_57980S_40
64#define PCI_DEVICE_ID_57980S_10 CHIP_NUM_57980S_10
65#define PCI_DEVICE_ID_57980S_MF CHIP_NUM_57980S_MF
66#define PCI_DEVICE_ID_57980S_100 CHIP_NUM_57980S_100
67#define PCI_DEVICE_ID_57980S_50 CHIP_NUM_57980S_50
68#define PCI_DEVICE_ID_57980S_25 CHIP_NUM_57980S_25
69#endif
70
71static const struct pci_device_id qede_pci_tbl[] = {
72 { PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_40), 0 },
73 { PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_10), 0 },
74 { PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_MF), 0 },
75 { PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_100), 0 },
76 { PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_50), 0 },
77 { PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_25), 0 },
78 { 0 }
79};
80
81MODULE_DEVICE_TABLE(pci, qede_pci_tbl);
82
83static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id);
84
85#define TX_TIMEOUT (5 * HZ)
86
87static void qede_remove(struct pci_dev *pdev);
2950219d
YM		 88static int qede_alloc_rx_buffer(struct qede_dev *edev,
89 struct qede_rx_queue *rxq);
a2ec6172 90static void qede_link_update(void *dev, struct qed_link_output *link);
e712d52b
YM		 91
92static struct pci_driver qede_pci_driver = {
93 .name = "qede",
94 .id_table = qede_pci_tbl,
95 .probe = qede_probe,
96 .remove = qede_remove,
97};
98
a2ec6172
SK		 99static struct qed_eth_cb_ops qede_ll_ops = {
100 {
101 .link_update = qede_link_update,
102 },
103};
104
2950219d
YM		 105static int qede_netdev_event(struct notifier_block *this, unsigned long event,
106 void *ptr)
107{
108 struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
109 struct ethtool_drvinfo drvinfo;
110 struct qede_dev *edev;
111
112 /* Currently only support name change */
113 if (event != NETDEV_CHANGENAME)
114 goto done;
115
116 /* Check whether this is a qede device */
117 if (!ndev || !ndev->ethtool_ops || !ndev->ethtool_ops->get_drvinfo)
118 goto done;
119
120 memset(&drvinfo, 0, sizeof(drvinfo));
121 ndev->ethtool_ops->get_drvinfo(ndev, &drvinfo);
122 if (strcmp(drvinfo.driver, "qede"))
123 goto done;
124 edev = netdev_priv(ndev);
125
126 /* Notify qed of the name change */
127 if (!edev->ops || !edev->ops->common)
128 goto done;
129 edev->ops->common->set_id(edev->cdev, edev->ndev->name,
130 "qede");
131
132done:
133 return NOTIFY_DONE;
134}
135
136static struct notifier_block qede_netdev_notifier = {
137 .notifier_call = qede_netdev_event,
138};
139
e712d52b
YM		 140static
141int __init qede_init(void)
142{
143 int ret;
144 u32 qed_ver;
145
146 pr_notice("qede_init: %s\n", version);
147
148 qed_ver = qed_get_protocol_version(QED_PROTOCOL_ETH);
149 if (qed_ver != QEDE_ETH_INTERFACE_VERSION) {
150 pr_notice("Version mismatch [%08x != %08x]\n",
151 qed_ver,
152 QEDE_ETH_INTERFACE_VERSION);
153 return -EINVAL;
154 }
155
156 qed_ops = qed_get_eth_ops(QEDE_ETH_INTERFACE_VERSION);
157 if (!qed_ops) {
158 pr_notice("Failed to get qed ethtool operations\n");
159 return -EINVAL;
160 }
161
2950219d
YM		 162 /* Must register notifier before pci ops, since we might miss
163 * interface rename after pci probe and netdev registeration.
164 */
165 ret = register_netdevice_notifier(&qede_netdev_notifier);
166 if (ret) {
167 pr_notice("Failed to register netdevice_notifier\n");
168 qed_put_eth_ops();
169 return -EINVAL;
170 }
171
e712d52b
YM		 172 ret = pci_register_driver(&qede_pci_driver);
173 if (ret) {
174 pr_notice("Failed to register driver\n");
2950219d 175 unregister_netdevice_notifier(&qede_netdev_notifier);
e712d52b
YM		 176 qed_put_eth_ops();
177 return -EINVAL;
178 }
179
180 return 0;
181}
182
183static void __exit qede_cleanup(void)
184{
185 pr_notice("qede_cleanup called\n");
186
2950219d 187 unregister_netdevice_notifier(&qede_netdev_notifier);
e712d52b
YM		 188 pci_unregister_driver(&qede_pci_driver);
189 qed_put_eth_ops();
190}
191
192module_init(qede_init);
193module_exit(qede_cleanup);
194
2950219d
YM		 195/* -------------------------------------------------------------------------
196 * START OF FAST-PATH
197 * -------------------------------------------------------------------------
198 */
199
200/* Unmap the data and free skb */
201static int qede_free_tx_pkt(struct qede_dev *edev,
202 struct qede_tx_queue *txq,
203 int *len)
204{
205 u16 idx = txq->sw_tx_cons & NUM_TX_BDS_MAX;
206 struct sk_buff *skb = txq->sw_tx_ring[idx].skb;
207 struct eth_tx_1st_bd *first_bd;
208 struct eth_tx_bd *tx_data_bd;
209 int bds_consumed = 0;
210 int nbds;
211 bool data_split = txq->sw_tx_ring[idx].flags & QEDE_TSO_SPLIT_BD;
212 int i, split_bd_len = 0;
213
214 if (unlikely(!skb)) {
215 DP_ERR(edev,
216 "skb is null for txq idx=%d txq->sw_tx_cons=%d txq->sw_tx_prod=%d\n",
217 idx, txq->sw_tx_cons, txq->sw_tx_prod);
218 return -1;
219 }
220
221 *len = skb->len;
222
223 first_bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl);
224
225 bds_consumed++;
226
227 nbds = first_bd->data.nbds;
228
229 if (data_split) {
230 struct eth_tx_bd *split = (struct eth_tx_bd *)
231 qed_chain_consume(&txq->tx_pbl);
232 split_bd_len = BD_UNMAP_LEN(split);
233 bds_consumed++;
234 }
235 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
236 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
237
238 /* Unmap the data of the skb frags */
239 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++, bds_consumed++) {
240 tx_data_bd = (struct eth_tx_bd *)
241 qed_chain_consume(&txq->tx_pbl);
242 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(tx_data_bd),
243 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
244 }
245
246 while (bds_consumed++ < nbds)
247 qed_chain_consume(&txq->tx_pbl);
248
249 /* Free skb */
250 dev_kfree_skb_any(skb);
251 txq->sw_tx_ring[idx].skb = NULL;
252 txq->sw_tx_ring[idx].flags = 0;
253
254 return 0;
255}
256
257/* Unmap the data and free skb when mapping failed during start_xmit */
258static void qede_free_failed_tx_pkt(struct qede_dev *edev,
259 struct qede_tx_queue *txq,
260 struct eth_tx_1st_bd *first_bd,
261 int nbd,
262 bool data_split)
263{
264 u16 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
265 struct sk_buff *skb = txq->sw_tx_ring[idx].skb;
266 struct eth_tx_bd *tx_data_bd;
267 int i, split_bd_len = 0;
268
269 /* Return prod to its position before this skb was handled */
270 qed_chain_set_prod(&txq->tx_pbl,
271 le16_to_cpu(txq->tx_db.data.bd_prod),
272 first_bd);
273
274 first_bd = (struct eth_tx_1st_bd *)qed_chain_produce(&txq->tx_pbl);
275
276 if (data_split) {
277 struct eth_tx_bd *split = (struct eth_tx_bd *)
278 qed_chain_produce(&txq->tx_pbl);
279 split_bd_len = BD_UNMAP_LEN(split);
280 nbd--;
281 }
282
283 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
284 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
285
286 /* Unmap the data of the skb frags */
287 for (i = 0; i < nbd; i++) {
288 tx_data_bd = (struct eth_tx_bd *)
289 qed_chain_produce(&txq->tx_pbl);
290 if (tx_data_bd->nbytes)
291 dma_unmap_page(&edev->pdev->dev,
292 BD_UNMAP_ADDR(tx_data_bd),
293 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
294 }
295
296 /* Return again prod to its position before this skb was handled */
297 qed_chain_set_prod(&txq->tx_pbl,
298 le16_to_cpu(txq->tx_db.data.bd_prod),
299 first_bd);
300
301 /* Free skb */
302 dev_kfree_skb_any(skb);
303 txq->sw_tx_ring[idx].skb = NULL;
304 txq->sw_tx_ring[idx].flags = 0;
305}
306
307static u32 qede_xmit_type(struct qede_dev *edev,
308 struct sk_buff *skb,
309 int *ipv6_ext)
310{
311 u32 rc = XMIT_L4_CSUM;
312 __be16 l3_proto;
313
314 if (skb->ip_summed != CHECKSUM_PARTIAL)
315 return XMIT_PLAIN;
316
317 l3_proto = vlan_get_protocol(skb);
318 if (l3_proto == htons(ETH_P_IPV6) &&
319 (ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6))
320 *ipv6_ext = 1;
321
322 if (skb_is_gso(skb))
323 rc |= XMIT_LSO;
324
325 return rc;
326}
327
328static void qede_set_params_for_ipv6_ext(struct sk_buff *skb,
329 struct eth_tx_2nd_bd *second_bd,
330 struct eth_tx_3rd_bd *third_bd)
331{
332 u8 l4_proto;
fc48b7a6 333 u16 bd2_bits1 = 0, bd2_bits2 = 0;
2950219d 334
fc48b7a6 335 bd2_bits1 |= (1 << ETH_TX_DATA_2ND_BD_IPV6_EXT_SHIFT);
2950219d 336
fc48b7a6 337 bd2_bits2 |= ((((u8 *)skb_transport_header(skb) - skb->data) >> 1) &
2950219d
YM		 338 ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_MASK)
339 << ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_SHIFT;
340
fc48b7a6 341 bd2_bits1 |= (ETH_L4_PSEUDO_CSUM_CORRECT_LENGTH <<
2950219d
YM		 342 ETH_TX_DATA_2ND_BD_L4_PSEUDO_CSUM_MODE_SHIFT);
343
344 if (vlan_get_protocol(skb) == htons(ETH_P_IPV6))
345 l4_proto = ipv6_hdr(skb)->nexthdr;
346 else
347 l4_proto = ip_hdr(skb)->protocol;
348
349 if (l4_proto == IPPROTO_UDP)
fc48b7a6 350 bd2_bits1 |= 1 << ETH_TX_DATA_2ND_BD_L4_UDP_SHIFT;
2950219d 351
fc48b7a6 352 if (third_bd)
2950219d 353 third_bd->data.bitfields |=
fc48b7a6
YM		 354 cpu_to_le16(((tcp_hdrlen(skb) / 4) &
355 ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_MASK) <<
356 ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_SHIFT);
2950219d 357
fc48b7a6 358 second_bd->data.bitfields1 = cpu_to_le16(bd2_bits1);
2950219d
YM		 359 second_bd->data.bitfields2 = cpu_to_le16(bd2_bits2);
360}
361
362static int map_frag_to_bd(struct qede_dev *edev,
363 skb_frag_t *frag,
364 struct eth_tx_bd *bd)
365{
366 dma_addr_t mapping;
367
368 /* Map skb non-linear frag data for DMA */
369 mapping = skb_frag_dma_map(&edev->pdev->dev, frag, 0,
370 skb_frag_size(frag),
371 DMA_TO_DEVICE);
372 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
373 DP_NOTICE(edev, "Unable to map frag - dropping packet\n");
374 return -ENOMEM;
375 }
376
377 /* Setup the data pointer of the frag data */
378 BD_SET_UNMAP_ADDR_LEN(bd, mapping, skb_frag_size(frag));
379
380 return 0;
381}
382
b1199b10
YM		 383/* +2 for 1st BD for headers and 2nd BD for headlen (if required) */
384#if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET)
385static bool qede_pkt_req_lin(struct qede_dev *edev, struct sk_buff *skb,
386 u8 xmit_type)
387{
388 int allowed_frags = ETH_TX_MAX_BDS_PER_NON_LSO_PACKET - 1;
389
390 if (xmit_type & XMIT_LSO) {
391 int hlen;
392
393 hlen = skb_transport_header(skb) +
394 tcp_hdrlen(skb) - skb->data;
395
396 /* linear payload would require its own BD */
397 if (skb_headlen(skb) > hlen)
398 allowed_frags--;
399 }
400
401 return (skb_shinfo(skb)->nr_frags > allowed_frags);
402}
403#endif
404
2950219d
YM		 405/* Main transmit function */
406static
407netdev_tx_t qede_start_xmit(struct sk_buff *skb,
408 struct net_device *ndev)
409{
410 struct qede_dev *edev = netdev_priv(ndev);
411 struct netdev_queue *netdev_txq;
412 struct qede_tx_queue *txq;
413 struct eth_tx_1st_bd *first_bd;
414 struct eth_tx_2nd_bd *second_bd = NULL;
415 struct eth_tx_3rd_bd *third_bd = NULL;
416 struct eth_tx_bd *tx_data_bd = NULL;
417 u16 txq_index;
418 u8 nbd = 0;
419 dma_addr_t mapping;
420 int rc, frag_idx = 0, ipv6_ext = 0;
421 u8 xmit_type;
422 u16 idx;
423 u16 hlen;
424 bool data_split;
425
426 /* Get tx-queue context and netdev index */
427 txq_index = skb_get_queue_mapping(skb);
428 WARN_ON(txq_index >= QEDE_TSS_CNT(edev));
429 txq = QEDE_TX_QUEUE(edev, txq_index);
430 netdev_txq = netdev_get_tx_queue(ndev, txq_index);
431
2950219d
YM		 432 WARN_ON(qed_chain_get_elem_left(&txq->tx_pbl) <
433 (MAX_SKB_FRAGS + 1));
434
435 xmit_type = qede_xmit_type(edev, skb, &ipv6_ext);
436
b1199b10
YM		 437#if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET)
438 if (qede_pkt_req_lin(edev, skb, xmit_type)) {
439 if (skb_linearize(skb)) {
440 DP_NOTICE(edev,
441 "SKB linearization failed - silently dropping this SKB\n");
442 dev_kfree_skb_any(skb);
443 return NETDEV_TX_OK;
444 }
445 }
446#endif
447
2950219d
YM		 448 /* Fill the entry in the SW ring and the BDs in the FW ring */
449 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
450 txq->sw_tx_ring[idx].skb = skb;
451 first_bd = (struct eth_tx_1st_bd *)
452 qed_chain_produce(&txq->tx_pbl);
453 memset(first_bd, 0, sizeof(*first_bd));
454 first_bd->data.bd_flags.bitfields =
455 1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT;
456
457 /* Map skb linear data for DMA and set in the first BD */
458 mapping = dma_map_single(&edev->pdev->dev, skb->data,
459 skb_headlen(skb), DMA_TO_DEVICE);
460 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
461 DP_NOTICE(edev, "SKB mapping failed\n");
462 qede_free_failed_tx_pkt(edev, txq, first_bd, 0, false);
463 return NETDEV_TX_OK;
464 }
465 nbd++;
466 BD_SET_UNMAP_ADDR_LEN(first_bd, mapping, skb_headlen(skb));
467
468 /* In case there is IPv6 with extension headers or LSO we need 2nd and
469 * 3rd BDs.
470 */
471 if (unlikely((xmit_type & XMIT_LSO) | ipv6_ext)) {
472 second_bd = (struct eth_tx_2nd_bd *)
473 qed_chain_produce(&txq->tx_pbl);
474 memset(second_bd, 0, sizeof(*second_bd));
475
476 nbd++;
477 third_bd = (struct eth_tx_3rd_bd *)
478 qed_chain_produce(&txq->tx_pbl);
479 memset(third_bd, 0, sizeof(*third_bd));
480
481 nbd++;
482 /* We need to fill in additional data in second_bd... */
483 tx_data_bd = (struct eth_tx_bd *)second_bd;
484 }
485
486 if (skb_vlan_tag_present(skb)) {
487 first_bd->data.vlan = cpu_to_le16(skb_vlan_tag_get(skb));
488 first_bd->data.bd_flags.bitfields |=
489 1 << ETH_TX_1ST_BD_FLAGS_VLAN_INSERTION_SHIFT;
490 }
491
492 /* Fill the parsing flags & params according to the requested offload */
493 if (xmit_type & XMIT_L4_CSUM) {
fc48b7a6
YM		 494 u16 temp = 1 << ETH_TX_DATA_1ST_BD_TUNN_CFG_OVERRIDE_SHIFT;
495
2950219d
YM		 496 /* We don't re-calculate IP checksum as it is already done by
497 * the upper stack
498 */
499 first_bd->data.bd_flags.bitfields |=
500 1 << ETH_TX_1ST_BD_FLAGS_L4_CSUM_SHIFT;
501
fc48b7a6
YM		 502 first_bd->data.bitfields |= cpu_to_le16(temp);
503
2950219d
YM		 504 /* If the packet is IPv6 with extension header, indicate that
505 * to FW and pass few params, since the device cracker doesn't
506 * support parsing IPv6 with extension header/s.
507 */
508 if (unlikely(ipv6_ext))
509 qede_set_params_for_ipv6_ext(skb, second_bd, third_bd);
510 }
511
512 if (xmit_type & XMIT_LSO) {
513 first_bd->data.bd_flags.bitfields |=
514 (1 << ETH_TX_1ST_BD_FLAGS_LSO_SHIFT);
515 third_bd->data.lso_mss =
516 cpu_to_le16(skb_shinfo(skb)->gso_size);
517
518 first_bd->data.bd_flags.bitfields |=
519 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT;
520 hlen = skb_transport_header(skb) +
521 tcp_hdrlen(skb) - skb->data;
522
523 /* @@@TBD - if will not be removed need to check */
524 third_bd->data.bitfields |=
fc48b7a6 525 cpu_to_le16((1 << ETH_TX_DATA_3RD_BD_HDR_NBD_SHIFT));
2950219d
YM		 526
527 /* Make life easier for FW guys who can't deal with header and
528 * data on same BD. If we need to split, use the second bd...
529 */
530 if (unlikely(skb_headlen(skb) > hlen)) {
531 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
532 "TSO split header size is %d (%x:%x)\n",
533 first_bd->nbytes, first_bd->addr.hi,
534 first_bd->addr.lo);
535
536 mapping = HILO_U64(le32_to_cpu(first_bd->addr.hi),
537 le32_to_cpu(first_bd->addr.lo)) +
538 hlen;
539
540 BD_SET_UNMAP_ADDR_LEN(tx_data_bd, mapping,
541 le16_to_cpu(first_bd->nbytes) -
542 hlen);
543
544 /* this marks the BD as one that has no
545 * individual mapping
546 */
547 txq->sw_tx_ring[idx].flags |= QEDE_TSO_SPLIT_BD;
548
549 first_bd->nbytes = cpu_to_le16(hlen);
550
551 tx_data_bd = (struct eth_tx_bd *)third_bd;
552 data_split = true;
553 }
554 }
555
556 /* Handle fragmented skb */
557 /* special handle for frags inside 2nd and 3rd bds.. */
558 while (tx_data_bd && frag_idx < skb_shinfo(skb)->nr_frags) {
559 rc = map_frag_to_bd(edev,
560 &skb_shinfo(skb)->frags[frag_idx],
561 tx_data_bd);
562 if (rc) {
563 qede_free_failed_tx_pkt(edev, txq, first_bd, nbd,
564 data_split);
565 return NETDEV_TX_OK;
566 }
567
568 if (tx_data_bd == (struct eth_tx_bd *)second_bd)
569 tx_data_bd = (struct eth_tx_bd *)third_bd;
570 else
571 tx_data_bd = NULL;
572
573 frag_idx++;
574 }
575
576 /* map last frags into 4th, 5th .... */
577 for (; frag_idx < skb_shinfo(skb)->nr_frags; frag_idx++, nbd++) {
578 tx_data_bd = (struct eth_tx_bd *)
579 qed_chain_produce(&txq->tx_pbl);
580
581 memset(tx_data_bd, 0, sizeof(*tx_data_bd));
582
583 rc = map_frag_to_bd(edev,
584 &skb_shinfo(skb)->frags[frag_idx],
585 tx_data_bd);
586 if (rc) {
587 qede_free_failed_tx_pkt(edev, txq, first_bd, nbd,
588 data_split);
589 return NETDEV_TX_OK;
590 }
591 }
592
593 /* update the first BD with the actual num BDs */
594 first_bd->data.nbds = nbd;
595
596 netdev_tx_sent_queue(netdev_txq, skb->len);
597
598 skb_tx_timestamp(skb);
599
600 /* Advance packet producer only before sending the packet since mapping
601 * of pages may fail.
602 */
603 txq->sw_tx_prod++;
604
605 /* 'next page' entries are counted in the producer value */
606 txq->tx_db.data.bd_prod =
607 cpu_to_le16(qed_chain_get_prod_idx(&txq->tx_pbl));
608
609 /* wmb makes sure that the BDs data is updated before updating the
610 * producer, otherwise FW may read old data from the BDs.
611 */
612 wmb();
613 barrier();
614 writel(txq->tx_db.raw, txq->doorbell_addr);
615
616 /* mmiowb is needed to synchronize doorbell writes from more than one
617 * processor. It guarantees that the write arrives to the device before
618 * the queue lock is released and another start_xmit is called (possibly
619 * on another CPU). Without this barrier, the next doorbell can bypass
620 * this doorbell. This is applicable to IA64/Altix systems.
621 */
622 mmiowb();
623
624 if (unlikely(qed_chain_get_elem_left(&txq->tx_pbl)
625 < (MAX_SKB_FRAGS + 1))) {
626 netif_tx_stop_queue(netdev_txq);
627 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
628 "Stop queue was called\n");
629 /* paired memory barrier is in qede_tx_int(), we have to keep
630 * ordering of set_bit() in netif_tx_stop_queue() and read of
631 * fp->bd_tx_cons
632 */
633 smp_mb();
634
635 if (qed_chain_get_elem_left(&txq->tx_pbl)
636 >= (MAX_SKB_FRAGS + 1) &&
637 (edev->state == QEDE_STATE_OPEN)) {
638 netif_tx_wake_queue(netdev_txq);
639 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
640 "Wake queue was called\n");
641 }
642 }
643
644 return NETDEV_TX_OK;
645}
646
647static int qede_txq_has_work(struct qede_tx_queue *txq)
648{
649 u16 hw_bd_cons;
650
651 /* Tell compiler that consumer and producer can change */
652 barrier();
653 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
654 if (qed_chain_get_cons_idx(&txq->tx_pbl) == hw_bd_cons + 1)
655 return 0;
656
657 return hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl);
658}
659
660static int qede_tx_int(struct qede_dev *edev,
661 struct qede_tx_queue *txq)
662{
663 struct netdev_queue *netdev_txq;
664 u16 hw_bd_cons;
665 unsigned int pkts_compl = 0, bytes_compl = 0;
666 int rc;
667
668 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->index);
669
670 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
671 barrier();
672
673 while (hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl)) {
674 int len = 0;
675
676 rc = qede_free_tx_pkt(edev, txq, &len);
677 if (rc) {
678 DP_NOTICE(edev, "hw_bd_cons = %d, chain_cons=%d\n",
679 hw_bd_cons,
680 qed_chain_get_cons_idx(&txq->tx_pbl));
681 break;
682 }
683
684 bytes_compl += len;
685 pkts_compl++;
686 txq->sw_tx_cons++;
687 }
688
689 netdev_tx_completed_queue(netdev_txq, pkts_compl, bytes_compl);
690
691 /* Need to make the tx_bd_cons update visible to start_xmit()
692 * before checking for netif_tx_queue_stopped(). Without the
693 * memory barrier, there is a small possibility that
694 * start_xmit() will miss it and cause the queue to be stopped
695 * forever.
696 * On the other hand we need an rmb() here to ensure the proper
697 * ordering of bit testing in the following
698 * netif_tx_queue_stopped(txq) call.
699 */
700 smp_mb();
701
702 if (unlikely(netif_tx_queue_stopped(netdev_txq))) {
703 /* Taking tx_lock is needed to prevent reenabling the queue
704 * while it's empty. This could have happen if rx_action() gets
705 * suspended in qede_tx_int() after the condition before
706 * netif_tx_wake_queue(), while tx_action (qede_start_xmit()):
707 *
708 * stops the queue->sees fresh tx_bd_cons->releases the queue->
709 * sends some packets consuming the whole queue again->
710 * stops the queue
711 */
712
713 __netif_tx_lock(netdev_txq, smp_processor_id());
714
715 if ((netif_tx_queue_stopped(netdev_txq)) &&
716 (edev->state == QEDE_STATE_OPEN) &&
717 (qed_chain_get_elem_left(&txq->tx_pbl)
718 >= (MAX_SKB_FRAGS + 1))) {
719 netif_tx_wake_queue(netdev_txq);
720 DP_VERBOSE(edev, NETIF_MSG_TX_DONE,
721 "Wake queue was called\n");
722 }
723
724 __netif_tx_unlock(netdev_txq);
725 }
726
727 return 0;
728}
729
730static bool qede_has_rx_work(struct qede_rx_queue *rxq)
731{
732 u16 hw_comp_cons, sw_comp_cons;
733
734 /* Tell compiler that status block fields can change */
735 barrier();
736
737 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
738 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
739
740 return hw_comp_cons != sw_comp_cons;
741}
742
743static bool qede_has_tx_work(struct qede_fastpath *fp)
744{
745 u8 tc;
746
747 for (tc = 0; tc < fp->edev->num_tc; tc++)
748 if (qede_txq_has_work(&fp->txqs[tc]))
749 return true;
750 return false;
751}
752
fc48b7a6
YM		 753/* This function reuses the buffer(from an offset) from
754 * consumer index to producer index in the bd ring
2950219d 755 */
fc48b7a6
YM		 756static inline void qede_reuse_page(struct qede_dev *edev,
757 struct qede_rx_queue *rxq,
758 struct sw_rx_data *curr_cons)
2950219d 759{
2950219d 760 struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring);
fc48b7a6
YM		 761 struct sw_rx_data *curr_prod;
762 dma_addr_t new_mapping;
2950219d 763
fc48b7a6
YM		 764 curr_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
765 *curr_prod = *curr_cons;
2950219d 766
fc48b7a6
YM		 767 new_mapping = curr_prod->mapping + curr_prod->page_offset;
768
769 rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(new_mapping));
770 rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(new_mapping));
2950219d 771
2950219d 772 rxq->sw_rx_prod++;
fc48b7a6
YM		 773 curr_cons->data = NULL;
774}
775
776static inline int qede_realloc_rx_buffer(struct qede_dev *edev,
777 struct qede_rx_queue *rxq,
778 struct sw_rx_data *curr_cons)
779{
780 /* Move to the next segment in the page */
781 curr_cons->page_offset += rxq->rx_buf_seg_size;
782
783 if (curr_cons->page_offset == PAGE_SIZE) {
784 if (unlikely(qede_alloc_rx_buffer(edev, rxq)))
785 return -ENOMEM;
786
787 dma_unmap_page(&edev->pdev->dev, curr_cons->mapping,
788 PAGE_SIZE, DMA_FROM_DEVICE);
789 } else {
790 /* Increment refcount of the page as we don't want
791 * network stack to take the ownership of the page
792 * which can be recycled multiple times by the driver.
793 */
794 atomic_inc(&curr_cons->data->_count);
795 qede_reuse_page(edev, rxq, curr_cons);
796 }
797
798 return 0;
2950219d
YM		 799}
800
801static inline void qede_update_rx_prod(struct qede_dev *edev,
802 struct qede_rx_queue *rxq)
803{
804 u16 bd_prod = qed_chain_get_prod_idx(&rxq->rx_bd_ring);
805 u16 cqe_prod = qed_chain_get_prod_idx(&rxq->rx_comp_ring);
806 struct eth_rx_prod_data rx_prods = {0};
807
808 /* Update producers */
809 rx_prods.bd_prod = cpu_to_le16(bd_prod);
810 rx_prods.cqe_prod = cpu_to_le16(cqe_prod);
811
812 /* Make sure that the BD and SGE data is updated before updating the
813 * producers since FW might read the BD/SGE right after the producer
814 * is updated.
815 */
816 wmb();
817
818 internal_ram_wr(rxq->hw_rxq_prod_addr, sizeof(rx_prods),
819 (u32 *)&rx_prods);
820
821 /* mmiowb is needed to synchronize doorbell writes from more than one
822 * processor. It guarantees that the write arrives to the device before
823 * the napi lock is released and another qede_poll is called (possibly
824 * on another CPU). Without this barrier, the next doorbell can bypass
825 * this doorbell. This is applicable to IA64/Altix systems.
826 */
827 mmiowb();
828}
829
830static u32 qede_get_rxhash(struct qede_dev *edev,
831 u8 bitfields,
832 __le32 rss_hash,
833 enum pkt_hash_types *rxhash_type)
834{
835 enum rss_hash_type htype;
836
837 htype = GET_FIELD(bitfields, ETH_FAST_PATH_RX_REG_CQE_RSS_HASH_TYPE);
838
839 if ((edev->ndev->features & NETIF_F_RXHASH) && htype) {
840 *rxhash_type = ((htype == RSS_HASH_TYPE_IPV4) ||
841 (htype == RSS_HASH_TYPE_IPV6)) ?
842 PKT_HASH_TYPE_L3 : PKT_HASH_TYPE_L4;
843 return le32_to_cpu(rss_hash);
844 }
845 *rxhash_type = PKT_HASH_TYPE_NONE;
846 return 0;
847}
848
849static void qede_set_skb_csum(struct sk_buff *skb, u8 csum_flag)
850{
851 skb_checksum_none_assert(skb);
852
853 if (csum_flag & QEDE_CSUM_UNNECESSARY)
854 skb->ip_summed = CHECKSUM_UNNECESSARY;
855}
856
857static inline void qede_skb_receive(struct qede_dev *edev,
858 struct qede_fastpath *fp,
859 struct sk_buff *skb,
860 u16 vlan_tag)
861{
862 if (vlan_tag)
863 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
864 vlan_tag);
865
866 napi_gro_receive(&fp->napi, skb);
867}
868
869static u8 qede_check_csum(u16 flag)
870{
871 u16 csum_flag = 0;
872 u8 csum = 0;
873
874 if ((PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
875 PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT) & flag) {
876 csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
877 PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
878 csum = QEDE_CSUM_UNNECESSARY;
879 }
880
881 csum_flag |= PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
882 PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
883
884 if (csum_flag & flag)
885 return QEDE_CSUM_ERROR;
886
887 return csum;
888}
889
890static int qede_rx_int(struct qede_fastpath *fp, int budget)
891{
892 struct qede_dev *edev = fp->edev;
893 struct qede_rx_queue *rxq = fp->rxq;
894
895 u16 hw_comp_cons, sw_comp_cons, sw_rx_index, parse_flag;
896 int rx_pkt = 0;
897 u8 csum_flag;
898
899 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
900 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
901
902 /* Memory barrier to prevent the CPU from doing speculative reads of CQE
903 * / BD in the while-loop before reading hw_comp_cons. If the CQE is
904 * read before it is written by FW, then FW writes CQE and SB, and then
905 * the CPU reads the hw_comp_cons, it will use an old CQE.
906 */
907 rmb();
908
909 /* Loop to complete all indicated BDs */
910 while (sw_comp_cons != hw_comp_cons) {
911 struct eth_fast_path_rx_reg_cqe *fp_cqe;
912 enum pkt_hash_types rxhash_type;
913 enum eth_rx_cqe_type cqe_type;
914 struct sw_rx_data *sw_rx_data;
915 union eth_rx_cqe *cqe;
916 struct sk_buff *skb;
fc48b7a6
YM		 917 struct page *data;
918 __le16 flags;
2950219d
YM		 919 u16 len, pad;
920 u32 rx_hash;
2950219d
YM		 921
922 /* Get the CQE from the completion ring */
923 cqe = (union eth_rx_cqe *)
924 qed_chain_consume(&rxq->rx_comp_ring);
925 cqe_type = cqe->fast_path_regular.type;
926
927 if (unlikely(cqe_type == ETH_RX_CQE_TYPE_SLOW_PATH)) {
928 edev->ops->eth_cqe_completion(
929 edev->cdev, fp->rss_id,
930 (struct eth_slow_path_rx_cqe *)cqe);
931 goto next_cqe;
932 }
933
934 /* Get the data from the SW ring */
935 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
936 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index];
937 data = sw_rx_data->data;
938
939 fp_cqe = &cqe->fast_path_regular;
fc48b7a6 940 len = le16_to_cpu(fp_cqe->len_on_first_bd);
2950219d 941 pad = fp_cqe->placement_offset;
fc48b7a6 942 flags = cqe->fast_path_regular.pars_flags.flags;
2950219d 943
fc48b7a6
YM		 944 /* If this is an error packet then drop it */
945 parse_flag = le16_to_cpu(flags);
2950219d 946
fc48b7a6
YM		 947 csum_flag = qede_check_csum(parse_flag);
948 if (unlikely(csum_flag == QEDE_CSUM_ERROR)) {
949 DP_NOTICE(edev,
950 "CQE in CONS = %u has error, flags = %x, dropping incoming packet\n",
951 sw_comp_cons, parse_flag);
952 rxq->rx_hw_errors++;
953 qede_reuse_page(edev, rxq, sw_rx_data);
954 goto next_rx;
955 }
2950219d 956
fc48b7a6
YM		 957 skb = netdev_alloc_skb(edev->ndev, QEDE_RX_HDR_SIZE);
958 if (unlikely(!skb)) {
2950219d 959 DP_NOTICE(edev,
fc48b7a6
YM		 960 "Build_skb failed, dropping incoming packet\n");
961 qede_reuse_page(edev, rxq, sw_rx_data);
2950219d 962 rxq->rx_alloc_errors++;
fc48b7a6
YM		 963 goto next_rx;
964 }
965
966 /* Copy data into SKB */
967 if (len + pad <= QEDE_RX_HDR_SIZE) {
968 memcpy(skb_put(skb, len),
969 page_address(data) + pad +
970 sw_rx_data->page_offset, len);
971 qede_reuse_page(edev, rxq, sw_rx_data);
972 } else {
973 struct skb_frag_struct *frag;
974 unsigned int pull_len;
975 unsigned char *va;
976
977 frag = &skb_shinfo(skb)->frags[0];
978
979 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, data,
980 pad + sw_rx_data->page_offset,
981 len, rxq->rx_buf_seg_size);
982
983 va = skb_frag_address(frag);
984 pull_len = eth_get_headlen(va, QEDE_RX_HDR_SIZE);
985
986 /* Align the pull_len to optimize memcpy */
987 memcpy(skb->data, va, ALIGN(pull_len, sizeof(long)));
988
989 skb_frag_size_sub(frag, pull_len);
990 frag->page_offset += pull_len;
991 skb->data_len -= pull_len;
992 skb->tail += pull_len;
993
994 if (unlikely(qede_realloc_rx_buffer(edev, rxq,
995 sw_rx_data))) {
996 DP_ERR(edev, "Failed to allocate rx buffer\n");
997 rxq->rx_alloc_errors++;
998 goto next_cqe;
999 }
2950219d
YM		 1000 }
1001
fc48b7a6
YM		 1002 if (fp_cqe->bd_num != 1) {
1003 u16 pkt_len = le16_to_cpu(fp_cqe->pkt_len);
1004 u8 num_frags;
1005
1006 pkt_len -= len;
1007
1008 for (num_frags = fp_cqe->bd_num - 1; num_frags > 0;
1009 num_frags--) {
1010 u16 cur_size = pkt_len > rxq->rx_buf_size ?
1011 rxq->rx_buf_size : pkt_len;
1012
1013 WARN_ONCE(!cur_size,
1014 "Still got %d BDs for mapping jumbo, but length became 0\n",
1015 num_frags);
1016
1017 if (unlikely(qede_alloc_rx_buffer(edev, rxq)))
1018 goto next_cqe;
1019
1020 rxq->sw_rx_cons++;
1021 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
1022 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index];
1023 qed_chain_consume(&rxq->rx_bd_ring);
1024 dma_unmap_page(&edev->pdev->dev,
1025 sw_rx_data->mapping,
1026 PAGE_SIZE, DMA_FROM_DEVICE);
1027
1028 skb_fill_page_desc(skb,
1029 skb_shinfo(skb)->nr_frags++,
1030 sw_rx_data->data, 0,
1031 cur_size);
1032
1033 skb->truesize += PAGE_SIZE;
1034 skb->data_len += cur_size;
1035 skb->len += cur_size;
1036 pkt_len -= cur_size;
1037 }
2950219d 1038
fc48b7a6
YM		 1039 if (pkt_len)
1040 DP_ERR(edev,
1041 "Mapped all BDs of jumbo, but still have %d bytes\n",
1042 pkt_len);
1043 }
2950219d
YM		 1044
1045 skb->protocol = eth_type_trans(skb, edev->ndev);
1046
1047 rx_hash = qede_get_rxhash(edev, fp_cqe->bitfields,
1048 fp_cqe->rss_hash,
1049 &rxhash_type);
1050
1051 skb_set_hash(skb, rx_hash, rxhash_type);
1052
1053 qede_set_skb_csum(skb, csum_flag);
1054
1055 skb_record_rx_queue(skb, fp->rss_id);
1056
1057 qede_skb_receive(edev, fp, skb, le16_to_cpu(fp_cqe->vlan_tag));
1058
1059 qed_chain_consume(&rxq->rx_bd_ring);
1060
1061next_rx:
1062 rxq->sw_rx_cons++;
1063 rx_pkt++;
1064
1065next_cqe: /* don't consume bd rx buffer */
1066 qed_chain_recycle_consumed(&rxq->rx_comp_ring);
1067 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
1068 /* CR TPA - revisit how to handle budget in TPA perhaps
1069 * increase on "end"
1070 */
1071 if (rx_pkt == budget)
1072 break;
1073 } /* repeat while sw_comp_cons != hw_comp_cons... */
1074
1075 /* Update producers */
1076 qede_update_rx_prod(edev, rxq);
1077
1078 return rx_pkt;
1079}
1080
1081static int qede_poll(struct napi_struct *napi, int budget)
1082{
1083 int work_done = 0;
1084 struct qede_fastpath *fp = container_of(napi, struct qede_fastpath,
1085 napi);
1086 struct qede_dev *edev = fp->edev;
1087
1088 while (1) {
1089 u8 tc;
1090
1091 for (tc = 0; tc < edev->num_tc; tc++)
1092 if (qede_txq_has_work(&fp->txqs[tc]))
1093 qede_tx_int(edev, &fp->txqs[tc]);
1094
1095 if (qede_has_rx_work(fp->rxq)) {
1096 work_done += qede_rx_int(fp, budget - work_done);
1097
1098 /* must not complete if we consumed full budget */
1099 if (work_done >= budget)
1100 break;
1101 }
1102
1103 /* Fall out from the NAPI loop if needed */
1104 if (!(qede_has_rx_work(fp->rxq) || qede_has_tx_work(fp))) {
1105 qed_sb_update_sb_idx(fp->sb_info);
1106 /* *_has_*_work() reads the status block,
1107 * thus we need to ensure that status block indices
1108 * have been actually read (qed_sb_update_sb_idx)
1109 * prior to this check (*_has_*_work) so that
1110 * we won't write the "newer" value of the status block
1111 * to HW (if there was a DMA right after
1112 * qede_has_rx_work and if there is no rmb, the memory
1113 * reading (qed_sb_update_sb_idx) may be postponed
1114 * to right before *_ack_sb). In this case there
1115 * will never be another interrupt until there is
1116 * another update of the status block, while there
1117 * is still unhandled work.
1118 */
1119 rmb();
1120
1121 if (!(qede_has_rx_work(fp->rxq) ||
1122 qede_has_tx_work(fp))) {
1123 napi_complete(napi);
1124 /* Update and reenable interrupts */
1125 qed_sb_ack(fp->sb_info, IGU_INT_ENABLE,
1126 1 /*update*/);
1127 break;
1128 }
1129 }
1130 }
1131
1132 return work_done;
1133}
1134
1135static irqreturn_t qede_msix_fp_int(int irq, void *fp_cookie)
1136{
1137 struct qede_fastpath *fp = fp_cookie;
1138
1139 qed_sb_ack(fp->sb_info, IGU_INT_DISABLE, 0 /*do not update*/);
1140
1141 napi_schedule_irqoff(&fp->napi);
1142 return IRQ_HANDLED;
1143}
1144
1145/* -------------------------------------------------------------------------
1146 * END OF FAST-PATH
1147 * -------------------------------------------------------------------------
1148 */
1149
1150static int qede_open(struct net_device *ndev);
1151static int qede_close(struct net_device *ndev);
0d8e0aa0
SK		 1152static int qede_set_mac_addr(struct net_device *ndev, void *p);
1153static void qede_set_rx_mode(struct net_device *ndev);
1154static void qede_config_rx_mode(struct net_device *ndev);
1155
1156static int qede_set_ucast_rx_mac(struct qede_dev *edev,
1157 enum qed_filter_xcast_params_type opcode,
1158 unsigned char mac[ETH_ALEN])
1159{
1160 struct qed_filter_params filter_cmd;
1161
1162 memset(&filter_cmd, 0, sizeof(filter_cmd));
1163 filter_cmd.type = QED_FILTER_TYPE_UCAST;
1164 filter_cmd.filter.ucast.type = opcode;
1165 filter_cmd.filter.ucast.mac_valid = 1;
1166 ether_addr_copy(filter_cmd.filter.ucast.mac, mac);
1167
1168 return edev->ops->filter_config(edev->cdev, &filter_cmd);
1169}
1170
7c1bfcad
SRK		 1171static int qede_set_ucast_rx_vlan(struct qede_dev *edev,
1172 enum qed_filter_xcast_params_type opcode,
1173 u16 vid)
1174{
1175 struct qed_filter_params filter_cmd;
1176
1177 memset(&filter_cmd, 0, sizeof(filter_cmd));
1178 filter_cmd.type = QED_FILTER_TYPE_UCAST;
1179 filter_cmd.filter.ucast.type = opcode;
1180 filter_cmd.filter.ucast.vlan_valid = 1;
1181 filter_cmd.filter.ucast.vlan = vid;
1182
1183 return edev->ops->filter_config(edev->cdev, &filter_cmd);
1184}
1185
133fac0e
SK		 1186void qede_fill_by_demand_stats(struct qede_dev *edev)
1187{
1188 struct qed_eth_stats stats;
1189
1190 edev->ops->get_vport_stats(edev->cdev, &stats);
1191 edev->stats.no_buff_discards = stats.no_buff_discards;
1192 edev->stats.rx_ucast_bytes = stats.rx_ucast_bytes;
1193 edev->stats.rx_mcast_bytes = stats.rx_mcast_bytes;
1194 edev->stats.rx_bcast_bytes = stats.rx_bcast_bytes;
1195 edev->stats.rx_ucast_pkts = stats.rx_ucast_pkts;
1196 edev->stats.rx_mcast_pkts = stats.rx_mcast_pkts;
1197 edev->stats.rx_bcast_pkts = stats.rx_bcast_pkts;
1198 edev->stats.mftag_filter_discards = stats.mftag_filter_discards;
1199 edev->stats.mac_filter_discards = stats.mac_filter_discards;
1200
1201 edev->stats.tx_ucast_bytes = stats.tx_ucast_bytes;
1202 edev->stats.tx_mcast_bytes = stats.tx_mcast_bytes;
1203 edev->stats.tx_bcast_bytes = stats.tx_bcast_bytes;
1204 edev->stats.tx_ucast_pkts = stats.tx_ucast_pkts;
1205 edev->stats.tx_mcast_pkts = stats.tx_mcast_pkts;
1206 edev->stats.tx_bcast_pkts = stats.tx_bcast_pkts;
1207 edev->stats.tx_err_drop_pkts = stats.tx_err_drop_pkts;
1208 edev->stats.coalesced_pkts = stats.tpa_coalesced_pkts;
1209 edev->stats.coalesced_events = stats.tpa_coalesced_events;
1210 edev->stats.coalesced_aborts_num = stats.tpa_aborts_num;
1211 edev->stats.non_coalesced_pkts = stats.tpa_not_coalesced_pkts;
1212 edev->stats.coalesced_bytes = stats.tpa_coalesced_bytes;
1213
1214 edev->stats.rx_64_byte_packets = stats.rx_64_byte_packets;
1215 edev->stats.rx_127_byte_packets = stats.rx_127_byte_packets;
1216 edev->stats.rx_255_byte_packets = stats.rx_255_byte_packets;
1217 edev->stats.rx_511_byte_packets = stats.rx_511_byte_packets;
1218 edev->stats.rx_1023_byte_packets = stats.rx_1023_byte_packets;
1219 edev->stats.rx_1518_byte_packets = stats.rx_1518_byte_packets;
1220 edev->stats.rx_1522_byte_packets = stats.rx_1522_byte_packets;
1221 edev->stats.rx_2047_byte_packets = stats.rx_2047_byte_packets;
1222 edev->stats.rx_4095_byte_packets = stats.rx_4095_byte_packets;
1223 edev->stats.rx_9216_byte_packets = stats.rx_9216_byte_packets;
1224 edev->stats.rx_16383_byte_packets = stats.rx_16383_byte_packets;
1225 edev->stats.rx_crc_errors = stats.rx_crc_errors;
1226 edev->stats.rx_mac_crtl_frames = stats.rx_mac_crtl_frames;
1227 edev->stats.rx_pause_frames = stats.rx_pause_frames;
1228 edev->stats.rx_pfc_frames = stats.rx_pfc_frames;
1229 edev->stats.rx_align_errors = stats.rx_align_errors;
1230 edev->stats.rx_carrier_errors = stats.rx_carrier_errors;
1231 edev->stats.rx_oversize_packets = stats.rx_oversize_packets;
1232 edev->stats.rx_jabbers = stats.rx_jabbers;
1233 edev->stats.rx_undersize_packets = stats.rx_undersize_packets;
1234 edev->stats.rx_fragments = stats.rx_fragments;
1235 edev->stats.tx_64_byte_packets = stats.tx_64_byte_packets;
1236 edev->stats.tx_65_to_127_byte_packets = stats.tx_65_to_127_byte_packets;
1237 edev->stats.tx_128_to_255_byte_packets =
1238 stats.tx_128_to_255_byte_packets;
1239 edev->stats.tx_256_to_511_byte_packets =
1240 stats.tx_256_to_511_byte_packets;
1241 edev->stats.tx_512_to_1023_byte_packets =
1242 stats.tx_512_to_1023_byte_packets;
1243 edev->stats.tx_1024_to_1518_byte_packets =
1244 stats.tx_1024_to_1518_byte_packets;
1245 edev->stats.tx_1519_to_2047_byte_packets =
1246 stats.tx_1519_to_2047_byte_packets;
1247 edev->stats.tx_2048_to_4095_byte_packets =
1248 stats.tx_2048_to_4095_byte_packets;
1249 edev->stats.tx_4096_to_9216_byte_packets =
1250 stats.tx_4096_to_9216_byte_packets;
1251 edev->stats.tx_9217_to_16383_byte_packets =
1252 stats.tx_9217_to_16383_byte_packets;
1253 edev->stats.tx_pause_frames = stats.tx_pause_frames;
1254 edev->stats.tx_pfc_frames = stats.tx_pfc_frames;
1255 edev->stats.tx_lpi_entry_count = stats.tx_lpi_entry_count;
1256 edev->stats.tx_total_collisions = stats.tx_total_collisions;
1257 edev->stats.brb_truncates = stats.brb_truncates;
1258 edev->stats.brb_discards = stats.brb_discards;
1259 edev->stats.tx_mac_ctrl_frames = stats.tx_mac_ctrl_frames;
1260}
1261
1262static struct rtnl_link_stats64 *qede_get_stats64(
1263 struct net_device *dev,
1264 struct rtnl_link_stats64 *stats)
1265{
1266 struct qede_dev *edev = netdev_priv(dev);
1267
1268 qede_fill_by_demand_stats(edev);
1269
1270 stats->rx_packets = edev->stats.rx_ucast_pkts +
1271 edev->stats.rx_mcast_pkts +
1272 edev->stats.rx_bcast_pkts;
1273 stats->tx_packets = edev->stats.tx_ucast_pkts +
1274 edev->stats.tx_mcast_pkts +
1275 edev->stats.tx_bcast_pkts;
1276
1277 stats->rx_bytes = edev->stats.rx_ucast_bytes +
1278 edev->stats.rx_mcast_bytes +
1279 edev->stats.rx_bcast_bytes;
1280
1281 stats->tx_bytes = edev->stats.tx_ucast_bytes +
1282 edev->stats.tx_mcast_bytes +
1283 edev->stats.tx_bcast_bytes;
1284
1285 stats->tx_errors = edev->stats.tx_err_drop_pkts;
1286 stats->multicast = edev->stats.rx_mcast_pkts +
1287 edev->stats.rx_bcast_pkts;
1288
1289 stats->rx_fifo_errors = edev->stats.no_buff_discards;
1290
1291 stats->collisions = edev->stats.tx_total_collisions;
1292 stats->rx_crc_errors = edev->stats.rx_crc_errors;
1293 stats->rx_frame_errors = edev->stats.rx_align_errors;
1294
1295 return stats;
1296}
1297
7c1bfcad
SRK		 1298static void qede_config_accept_any_vlan(struct qede_dev *edev, bool action)
1299{
1300 struct qed_update_vport_params params;
1301 int rc;
1302
1303 /* Proceed only if action actually needs to be performed */
1304 if (edev->accept_any_vlan == action)
1305 return;
1306
1307 memset(&params, 0, sizeof(params));
1308
1309 params.vport_id = 0;
1310 params.accept_any_vlan = action;
1311 params.update_accept_any_vlan_flg = 1;
1312
1313 rc = edev->ops->vport_update(edev->cdev, &params);
1314 if (rc) {
1315 DP_ERR(edev, "Failed to %s accept-any-vlan\n",
1316 action ? "enable" : "disable");
1317 } else {
1318 DP_INFO(edev, "%s accept-any-vlan\n",
1319 action ? "enabled" : "disabled");
1320 edev->accept_any_vlan = action;
1321 }
1322}
1323
1324static int qede_vlan_rx_add_vid(struct net_device *dev, __be16 proto, u16 vid)
1325{
1326 struct qede_dev *edev = netdev_priv(dev);
1327 struct qede_vlan *vlan, *tmp;
1328 int rc;
1329
1330 DP_VERBOSE(edev, NETIF_MSG_IFUP, "Adding vlan 0x%04x\n", vid);
1331
1332 vlan = kzalloc(sizeof(*vlan), GFP_KERNEL);
1333 if (!vlan) {
1334 DP_INFO(edev, "Failed to allocate struct for vlan\n");
1335 return -ENOMEM;
1336 }
1337 INIT_LIST_HEAD(&vlan->list);
1338 vlan->vid = vid;
1339 vlan->configured = false;
1340
1341 /* Verify vlan isn't already configured */
1342 list_for_each_entry(tmp, &edev->vlan_list, list) {
1343 if (tmp->vid == vlan->vid) {
1344 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1345 "vlan already configured\n");
1346 kfree(vlan);
1347 return -EEXIST;
1348 }
1349 }
1350
1351 /* If interface is down, cache this VLAN ID and return */
1352 if (edev->state != QEDE_STATE_OPEN) {
1353 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
1354 "Interface is down, VLAN %d will be configured when interface is up\n",
1355 vid);
1356 if (vid != 0)
1357 edev->non_configured_vlans++;
1358 list_add(&vlan->list, &edev->vlan_list);
1359
1360 return 0;
1361 }
1362
1363 /* Check for the filter limit.
1364 * Note - vlan0 has a reserved filter and can be added without
1365 * worrying about quota
1366 */
1367 if ((edev->configured_vlans < edev->dev_info.num_vlan_filters) ||
1368 (vlan->vid == 0)) {
1369 rc = qede_set_ucast_rx_vlan(edev,
1370 QED_FILTER_XCAST_TYPE_ADD,
1371 vlan->vid);
1372 if (rc) {
1373 DP_ERR(edev, "Failed to configure VLAN %d\n",
1374 vlan->vid);
1375 kfree(vlan);
1376 return -EINVAL;
1377 }
1378 vlan->configured = true;
1379
1380 /* vlan0 filter isn't consuming out of our quota */
1381 if (vlan->vid != 0)
1382 edev->configured_vlans++;
1383 } else {
1384 /* Out of quota; Activate accept-any-VLAN mode */
1385 if (!edev->non_configured_vlans)
1386 qede_config_accept_any_vlan(edev, true);
1387
1388 edev->non_configured_vlans++;
1389 }
1390
1391 list_add(&vlan->list, &edev->vlan_list);
1392
1393 return 0;
1394}
1395
1396static void qede_del_vlan_from_list(struct qede_dev *edev,
1397 struct qede_vlan *vlan)
1398{
1399 /* vlan0 filter isn't consuming out of our quota */
1400 if (vlan->vid != 0) {
1401 if (vlan->configured)
1402 edev->configured_vlans--;
1403 else
1404 edev->non_configured_vlans--;
1405 }
1406
1407 list_del(&vlan->list);
1408 kfree(vlan);
1409}
1410
1411static int qede_configure_vlan_filters(struct qede_dev *edev)
1412{
1413 int rc = 0, real_rc = 0, accept_any_vlan = 0;
1414 struct qed_dev_eth_info *dev_info;
1415 struct qede_vlan *vlan = NULL;
1416
1417 if (list_empty(&edev->vlan_list))
1418 return 0;
1419
1420 dev_info = &edev->dev_info;
1421
1422 /* Configure non-configured vlans */
1423 list_for_each_entry(vlan, &edev->vlan_list, list) {
1424 if (vlan->configured)
1425 continue;
1426
1427 /* We have used all our credits, now enable accept_any_vlan */
1428 if ((vlan->vid != 0) &&
1429 (edev->configured_vlans == dev_info->num_vlan_filters)) {
1430 accept_any_vlan = 1;
1431 continue;
1432 }
1433
1434 DP_VERBOSE(edev, NETIF_MSG_IFUP, "Adding vlan %d\n", vlan->vid);
1435
1436 rc = qede_set_ucast_rx_vlan(edev, QED_FILTER_XCAST_TYPE_ADD,
1437 vlan->vid);
1438 if (rc) {
1439 DP_ERR(edev, "Failed to configure VLAN %u\n",
1440 vlan->vid);
1441 real_rc = rc;
1442 continue;
1443 }
1444
1445 vlan->configured = true;
1446 /* vlan0 filter doesn't consume our VLAN filter's quota */
1447 if (vlan->vid != 0) {
1448 edev->non_configured_vlans--;
1449 edev->configured_vlans++;
1450 }
1451 }
1452
1453 /* enable accept_any_vlan mode if we have more VLANs than credits,
1454 * or remove accept_any_vlan mode if we've actually removed
1455 * a non-configured vlan, and all remaining vlans are truly configured.
1456 */
1457
1458 if (accept_any_vlan)
1459 qede_config_accept_any_vlan(edev, true);
1460 else if (!edev->non_configured_vlans)
1461 qede_config_accept_any_vlan(edev, false);
1462
1463 return real_rc;
1464}
1465
1466static int qede_vlan_rx_kill_vid(struct net_device *dev, __be16 proto, u16 vid)
1467{
1468 struct qede_dev *edev = netdev_priv(dev);
1469 struct qede_vlan *vlan = NULL;
1470 int rc;
1471
1472 DP_VERBOSE(edev, NETIF_MSG_IFDOWN, "Removing vlan 0x%04x\n", vid);
1473
1474 /* Find whether entry exists */
1475 list_for_each_entry(vlan, &edev->vlan_list, list)
1476 if (vlan->vid == vid)
1477 break;
1478
1479 if (!vlan || (vlan->vid != vid)) {
1480 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1481 "Vlan isn't configured\n");
1482 return 0;
1483 }
1484
1485 if (edev->state != QEDE_STATE_OPEN) {
1486 /* As interface is already down, we don't have a VPORT
1487 * instance to remove vlan filter. So just update vlan list
1488 */
1489 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
1490 "Interface is down, removing VLAN from list only\n");
1491 qede_del_vlan_from_list(edev, vlan);
1492 return 0;
1493 }
1494
1495 /* Remove vlan */
1496 rc = qede_set_ucast_rx_vlan(edev, QED_FILTER_XCAST_TYPE_DEL, vid);
1497 if (rc) {
1498 DP_ERR(edev, "Failed to remove VLAN %d\n", vid);
1499 return -EINVAL;
1500 }
1501
1502 qede_del_vlan_from_list(edev, vlan);
1503
1504 /* We have removed a VLAN - try to see if we can
1505 * configure non-configured VLAN from the list.
1506 */
1507 rc = qede_configure_vlan_filters(edev);
1508
1509 return rc;
1510}
1511
1512static void qede_vlan_mark_nonconfigured(struct qede_dev *edev)
1513{
1514 struct qede_vlan *vlan = NULL;
1515
1516 if (list_empty(&edev->vlan_list))
1517 return;
1518
1519 list_for_each_entry(vlan, &edev->vlan_list, list) {
1520 if (!vlan->configured)
1521 continue;
1522
1523 vlan->configured = false;
1524
1525 /* vlan0 filter isn't consuming out of our quota */
1526 if (vlan->vid != 0) {
1527 edev->non_configured_vlans++;
1528 edev->configured_vlans--;
1529 }
1530
1531 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
1532 "marked vlan %d as non-configured\n",
1533 vlan->vid);
1534 }
1535
1536 edev->accept_any_vlan = false;
1537}
1538
2950219d
YM		 1539static const struct net_device_ops qede_netdev_ops = {
1540 .ndo_open = qede_open,
1541 .ndo_stop = qede_close,
1542 .ndo_start_xmit = qede_start_xmit,
0d8e0aa0
SK		 1543 .ndo_set_rx_mode = qede_set_rx_mode,
1544 .ndo_set_mac_address = qede_set_mac_addr,
2950219d 1545 .ndo_validate_addr = eth_validate_addr,
133fac0e 1546 .ndo_change_mtu = qede_change_mtu,
7c1bfcad
SRK		 1547 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
1548 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
133fac0e 1549 .ndo_get_stats64 = qede_get_stats64,
2950219d
YM		 1550};
1551
e712d52b
YM		 1552/* -------------------------------------------------------------------------
1553 * START OF PROBE / REMOVE
1554 * -------------------------------------------------------------------------
1555 */
1556
1557static struct qede_dev *qede_alloc_etherdev(struct qed_dev *cdev,
1558 struct pci_dev *pdev,
1559 struct qed_dev_eth_info *info,
1560 u32 dp_module,
1561 u8 dp_level)
1562{
1563 struct net_device *ndev;
1564 struct qede_dev *edev;
1565
1566 ndev = alloc_etherdev_mqs(sizeof(*edev),
1567 info->num_queues,
1568 info->num_queues);
1569 if (!ndev) {
1570 pr_err("etherdev allocation failed\n");
1571 return NULL;
1572 }
1573
1574 edev = netdev_priv(ndev);
1575 edev->ndev = ndev;
1576 edev->cdev = cdev;
1577 edev->pdev = pdev;
1578 edev->dp_module = dp_module;
1579 edev->dp_level = dp_level;
1580 edev->ops = qed_ops;
2950219d
YM		 1581 edev->q_num_rx_buffers = NUM_RX_BDS_DEF;
1582 edev->q_num_tx_buffers = NUM_TX_BDS_DEF;
e712d52b
YM		 1583
1584 DP_INFO(edev, "Allocated netdev with 64 tx queues and 64 rx queues\n");
1585
1586 SET_NETDEV_DEV(ndev, &pdev->dev);
1587
133fac0e 1588 memset(&edev->stats, 0, sizeof(edev->stats));
e712d52b
YM		 1589 memcpy(&edev->dev_info, info, sizeof(*info));
1590
1591 edev->num_tc = edev->dev_info.num_tc;
1592
7c1bfcad
SRK		 1593 INIT_LIST_HEAD(&edev->vlan_list);
1594
e712d52b
YM		 1595 return edev;
1596}
1597
1598static void qede_init_ndev(struct qede_dev *edev)
1599{
1600 struct net_device *ndev = edev->ndev;
1601 struct pci_dev *pdev = edev->pdev;
1602 u32 hw_features;
1603
1604 pci_set_drvdata(pdev, ndev);
1605
1606 ndev->mem_start = edev->dev_info.common.pci_mem_start;
1607 ndev->base_addr = ndev->mem_start;
1608 ndev->mem_end = edev->dev_info.common.pci_mem_end;
1609 ndev->irq = edev->dev_info.common.pci_irq;
1610
1611 ndev->watchdog_timeo = TX_TIMEOUT;
1612
2950219d
YM		 1613 ndev->netdev_ops = &qede_netdev_ops;
1614
133fac0e
SK		 1615 qede_set_ethtool_ops(ndev);
1616
e712d52b
YM		 1617 /* user-changeble features */
1618 hw_features = NETIF_F_GRO | NETIF_F_SG |
1619 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1620 NETIF_F_TSO | NETIF_F_TSO6;
1621
1622 ndev->vlan_features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
1623 NETIF_F_HIGHDMA;
1624 ndev->features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
1625 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HIGHDMA |
7c1bfcad 1626 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_TX;
e712d52b
YM		 1627
1628 ndev->hw_features = hw_features;
1629
1630 /* Set network device HW mac */
1631 ether_addr_copy(edev->ndev->dev_addr, edev->dev_info.common.hw_mac);
1632}
1633
1634/* This function converts from 32b param to two params of level and module
1635 * Input 32b decoding:
1636 * b31 - enable all NOTICE prints. NOTICE prints are for deviation from the
1637 * 'happy' flow, e.g. memory allocation failed.
1638 * b30 - enable all INFO prints. INFO prints are for major steps in the flow
1639 * and provide important parameters.
1640 * b29-b0 - per-module bitmap, where each bit enables VERBOSE prints of that
1641 * module. VERBOSE prints are for tracking the specific flow in low level.
1642 *
1643 * Notice that the level should be that of the lowest required logs.
1644 */
133fac0e 1645void qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level)
e712d52b
YM		 1646{
1647 *p_dp_level = QED_LEVEL_NOTICE;
1648 *p_dp_module = 0;
1649
1650 if (debug & QED_LOG_VERBOSE_MASK) {
1651 *p_dp_level = QED_LEVEL_VERBOSE;
1652 *p_dp_module = (debug & 0x3FFFFFFF);
1653 } else if (debug & QED_LOG_INFO_MASK) {
1654 *p_dp_level = QED_LEVEL_INFO;
1655 } else if (debug & QED_LOG_NOTICE_MASK) {
1656 *p_dp_level = QED_LEVEL_NOTICE;
1657 }
1658}
1659
2950219d
YM		 1660static void qede_free_fp_array(struct qede_dev *edev)
1661{
1662 if (edev->fp_array) {
1663 struct qede_fastpath *fp;
1664 int i;
1665
1666 for_each_rss(i) {
1667 fp = &edev->fp_array[i];
1668
1669 kfree(fp->sb_info);
1670 kfree(fp->rxq);
1671 kfree(fp->txqs);
1672 }
1673 kfree(edev->fp_array);
1674 }
1675 edev->num_rss = 0;
1676}
1677
1678static int qede_alloc_fp_array(struct qede_dev *edev)
1679{
1680 struct qede_fastpath *fp;
1681 int i;
1682
1683 edev->fp_array = kcalloc(QEDE_RSS_CNT(edev),
1684 sizeof(*edev->fp_array), GFP_KERNEL);
1685 if (!edev->fp_array) {
1686 DP_NOTICE(edev, "fp array allocation failed\n");
1687 goto err;
1688 }
1689
1690 for_each_rss(i) {
1691 fp = &edev->fp_array[i];
1692
1693 fp->sb_info = kcalloc(1, sizeof(*fp->sb_info), GFP_KERNEL);
1694 if (!fp->sb_info) {
1695 DP_NOTICE(edev, "sb info struct allocation failed\n");
1696 goto err;
1697 }
1698
1699 fp->rxq = kcalloc(1, sizeof(*fp->rxq), GFP_KERNEL);
1700 if (!fp->rxq) {
1701 DP_NOTICE(edev, "RXQ struct allocation failed\n");
1702 goto err;
1703 }
1704
1705 fp->txqs = kcalloc(edev->num_tc, sizeof(*fp->txqs), GFP_KERNEL);
1706 if (!fp->txqs) {
1707 DP_NOTICE(edev, "TXQ array allocation failed\n");
1708 goto err;
1709 }
1710 }
1711
1712 return 0;
1713err:
1714 qede_free_fp_array(edev);
1715 return -ENOMEM;
1716}
1717
0d8e0aa0
SK		 1718static void qede_sp_task(struct work_struct *work)
1719{
1720 struct qede_dev *edev = container_of(work, struct qede_dev,
1721 sp_task.work);
1722 mutex_lock(&edev->qede_lock);
1723
1724 if (edev->state == QEDE_STATE_OPEN) {
1725 if (test_and_clear_bit(QEDE_SP_RX_MODE, &edev->sp_flags))
1726 qede_config_rx_mode(edev->ndev);
1727 }
1728
1729 mutex_unlock(&edev->qede_lock);
1730}
1731
e712d52b
YM		 1732static void qede_update_pf_params(struct qed_dev *cdev)
1733{
1734 struct qed_pf_params pf_params;
1735
1736 /* 16 rx + 16 tx */
1737 memset(&pf_params, 0, sizeof(struct qed_pf_params));
1738 pf_params.eth_pf_params.num_cons = 32;
1739 qed_ops->common->update_pf_params(cdev, &pf_params);
1740}
1741
1742enum qede_probe_mode {
1743 QEDE_PROBE_NORMAL,
1744};
1745
1746static int __qede_probe(struct pci_dev *pdev, u32 dp_module, u8 dp_level,
1747 enum qede_probe_mode mode)
1748{
1749 struct qed_slowpath_params params;
1750 struct qed_dev_eth_info dev_info;
1751 struct qede_dev *edev;
1752 struct qed_dev *cdev;
1753 int rc;
1754
1755 if (unlikely(dp_level & QED_LEVEL_INFO))
1756 pr_notice("Starting qede probe\n");
1757
1758 cdev = qed_ops->common->probe(pdev, QED_PROTOCOL_ETH,
1759 dp_module, dp_level);
1760 if (!cdev) {
1761 rc = -ENODEV;
1762 goto err0;
1763 }
1764
1765 qede_update_pf_params(cdev);
1766
1767 /* Start the Slowpath-process */
1768 memset(&params, 0, sizeof(struct qed_slowpath_params));
1769 params.int_mode = QED_INT_MODE_MSIX;
1770 params.drv_major = QEDE_MAJOR_VERSION;
1771 params.drv_minor = QEDE_MINOR_VERSION;
1772 params.drv_rev = QEDE_REVISION_VERSION;
1773 params.drv_eng = QEDE_ENGINEERING_VERSION;
1774 strlcpy(params.name, "qede LAN", QED_DRV_VER_STR_SIZE);
1775 rc = qed_ops->common->slowpath_start(cdev, &params);
1776 if (rc) {
1777 pr_notice("Cannot start slowpath\n");
1778 goto err1;
1779 }
1780
1781 /* Learn information crucial for qede to progress */
1782 rc = qed_ops->fill_dev_info(cdev, &dev_info);
1783 if (rc)
1784 goto err2;
1785
1786 edev = qede_alloc_etherdev(cdev, pdev, &dev_info, dp_module,
1787 dp_level);
1788 if (!edev) {
1789 rc = -ENOMEM;
1790 goto err2;
1791 }
1792
1793 qede_init_ndev(edev);
1794
2950219d
YM		 1795 rc = register_netdev(edev->ndev);
1796 if (rc) {
1797 DP_NOTICE(edev, "Cannot register net-device\n");
1798 goto err3;
1799 }
1800
e712d52b
YM		 1801 edev->ops->common->set_id(cdev, edev->ndev->name, DRV_MODULE_VERSION);
1802
a2ec6172
SK		 1803 edev->ops->register_ops(cdev, &qede_ll_ops, edev);
1804
0d8e0aa0
SK		 1805 INIT_DELAYED_WORK(&edev->sp_task, qede_sp_task);
1806 mutex_init(&edev->qede_lock);
1807
e712d52b
YM		 1808 DP_INFO(edev, "Ending successfully qede probe\n");
1809
1810 return 0;
1811
2950219d
YM		 1812err3:
1813 free_netdev(edev->ndev);
e712d52b
YM		 1814err2:
1815 qed_ops->common->slowpath_stop(cdev);
1816err1:
1817 qed_ops->common->remove(cdev);
1818err0:
1819 return rc;
1820}
1821
1822static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1823{
1824 u32 dp_module = 0;
1825 u8 dp_level = 0;
1826
1827 qede_config_debug(debug, &dp_module, &dp_level);
1828
1829 return __qede_probe(pdev, dp_module, dp_level,
1830 QEDE_PROBE_NORMAL);
1831}
1832
1833enum qede_remove_mode {
1834 QEDE_REMOVE_NORMAL,
1835};
1836
1837static void __qede_remove(struct pci_dev *pdev, enum qede_remove_mode mode)
1838{
1839 struct net_device *ndev = pci_get_drvdata(pdev);
1840 struct qede_dev *edev = netdev_priv(ndev);
1841 struct qed_dev *cdev = edev->cdev;
1842
1843 DP_INFO(edev, "Starting qede_remove\n");
1844
0d8e0aa0 1845 cancel_delayed_work_sync(&edev->sp_task);
2950219d
YM		 1846 unregister_netdev(ndev);
1847
e712d52b
YM		 1848 edev->ops->common->set_power_state(cdev, PCI_D0);
1849
1850 pci_set_drvdata(pdev, NULL);
1851
1852 free_netdev(ndev);
1853
1854 /* Use global ops since we've freed edev */
1855 qed_ops->common->slowpath_stop(cdev);
1856 qed_ops->common->remove(cdev);
1857
1858 pr_notice("Ending successfully qede_remove\n");
1859}
1860
1861static void qede_remove(struct pci_dev *pdev)
1862{
1863 __qede_remove(pdev, QEDE_REMOVE_NORMAL);
1864}
2950219d
YM		 1865
1866/* -------------------------------------------------------------------------
1867 * START OF LOAD / UNLOAD
1868 * -------------------------------------------------------------------------
1869 */
1870
1871static int qede_set_num_queues(struct qede_dev *edev)
1872{
1873 int rc;
1874 u16 rss_num;
1875
1876 /* Setup queues according to possible resources*/
8edf049d
SK		 1877 if (edev->req_rss)
1878 rss_num = edev->req_rss;
1879 else
1880 rss_num = netif_get_num_default_rss_queues() *
1881 edev->dev_info.common.num_hwfns;
2950219d
YM		 1882
1883 rss_num = min_t(u16, QEDE_MAX_RSS_CNT(edev), rss_num);
1884
1885 rc = edev->ops->common->set_fp_int(edev->cdev, rss_num);
1886 if (rc > 0) {
1887 /* Managed to request interrupts for our queues */
1888 edev->num_rss = rc;
1889 DP_INFO(edev, "Managed %d [of %d] RSS queues\n",
1890 QEDE_RSS_CNT(edev), rss_num);
1891 rc = 0;
1892 }
1893 return rc;
1894}
1895
1896static void qede_free_mem_sb(struct qede_dev *edev,
1897 struct qed_sb_info *sb_info)
1898{
1899 if (sb_info->sb_virt)
1900 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_info->sb_virt),
1901 (void *)sb_info->sb_virt, sb_info->sb_phys);
1902}
1903
1904/* This function allocates fast-path status block memory */
1905static int qede_alloc_mem_sb(struct qede_dev *edev,
1906 struct qed_sb_info *sb_info,
1907 u16 sb_id)
1908{
1909 struct status_block *sb_virt;
1910 dma_addr_t sb_phys;
1911 int rc;
1912
1913 sb_virt = dma_alloc_coherent(&edev->pdev->dev,
1914 sizeof(*sb_virt),
1915 &sb_phys, GFP_KERNEL);
1916 if (!sb_virt) {
1917 DP_ERR(edev, "Status block allocation failed\n");
1918 return -ENOMEM;
1919 }
1920
1921 rc = edev->ops->common->sb_init(edev->cdev, sb_info,
1922 sb_virt, sb_phys, sb_id,
1923 QED_SB_TYPE_L2_QUEUE);
1924 if (rc) {
1925 DP_ERR(edev, "Status block initialization failed\n");
1926 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_virt),
1927 sb_virt, sb_phys);
1928 return rc;
1929 }
1930
1931 return 0;
1932}
1933
1934static void qede_free_rx_buffers(struct qede_dev *edev,
1935 struct qede_rx_queue *rxq)
1936{
1937 u16 i;
1938
1939 for (i = rxq->sw_rx_cons; i != rxq->sw_rx_prod; i++) {
1940 struct sw_rx_data *rx_buf;
fc48b7a6 1941 struct page *data;
2950219d
YM		 1942
1943 rx_buf = &rxq->sw_rx_ring[i & NUM_RX_BDS_MAX];
1944 data = rx_buf->data;
1945
fc48b7a6
YM		 1946 dma_unmap_page(&edev->pdev->dev,
1947 rx_buf->mapping,
1948 PAGE_SIZE, DMA_FROM_DEVICE);
2950219d
YM		 1949
1950 rx_buf->data = NULL;
fc48b7a6 1951 __free_page(data);
2950219d
YM		 1952 }
1953}
1954
1955static void qede_free_mem_rxq(struct qede_dev *edev,
1956 struct qede_rx_queue *rxq)
1957{
1958 /* Free rx buffers */
1959 qede_free_rx_buffers(edev, rxq);
1960
1961 /* Free the parallel SW ring */
1962 kfree(rxq->sw_rx_ring);
1963
1964 /* Free the real RQ ring used by FW */
1965 edev->ops->common->chain_free(edev->cdev, &rxq->rx_bd_ring);
1966 edev->ops->common->chain_free(edev->cdev, &rxq->rx_comp_ring);
1967}
1968
1969static int qede_alloc_rx_buffer(struct qede_dev *edev,
1970 struct qede_rx_queue *rxq)
1971{
1972 struct sw_rx_data *sw_rx_data;
1973 struct eth_rx_bd *rx_bd;
1974 dma_addr_t mapping;
fc48b7a6 1975 struct page *data;
2950219d 1976 u16 rx_buf_size;
2950219d
YM		 1977
1978 rx_buf_size = rxq->rx_buf_size;
1979
fc48b7a6 1980 data = alloc_pages(GFP_ATOMIC, 0);
2950219d 1981 if (unlikely(!data)) {
fc48b7a6 1982 DP_NOTICE(edev, "Failed to allocate Rx data [page]\n");
2950219d
YM		 1983 return -ENOMEM;
1984 }
1985
fc48b7a6
YM		 1986 /* Map the entire page as it would be used
1987 * for multiple RX buffer segment size mapping.
1988 */
1989 mapping = dma_map_page(&edev->pdev->dev, data, 0,
1990 PAGE_SIZE, DMA_FROM_DEVICE);
2950219d 1991 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
fc48b7a6 1992 __free_page(data);
2950219d
YM		 1993 DP_NOTICE(edev, "Failed to map Rx buffer\n");
1994 return -ENOMEM;
1995 }
1996
1997 sw_rx_data = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
fc48b7a6 1998 sw_rx_data->page_offset = 0;
2950219d 1999 sw_rx_data->data = data;
fc48b7a6 2000 sw_rx_data->mapping = mapping;
2950219d
YM		 2001
2002 /* Advance PROD and get BD pointer */
2003 rx_bd = (struct eth_rx_bd *)qed_chain_produce(&rxq->rx_bd_ring);
2004 WARN_ON(!rx_bd);
2005 rx_bd->addr.hi = cpu_to_le32(upper_32_bits(mapping));
2006 rx_bd->addr.lo = cpu_to_le32(lower_32_bits(mapping));
2007
2008 rxq->sw_rx_prod++;
2009
2010 return 0;
2011}
2012
2013/* This function allocates all memory needed per Rx queue */
2014static int qede_alloc_mem_rxq(struct qede_dev *edev,
2015 struct qede_rx_queue *rxq)
2016{
2017 int i, rc, size, num_allocated;
2018
2019 rxq->num_rx_buffers = edev->q_num_rx_buffers;
2020
fc48b7a6
YM		 2021 rxq->rx_buf_size = NET_IP_ALIGN + ETH_OVERHEAD +
2022 edev->ndev->mtu;
2023 if (rxq->rx_buf_size > PAGE_SIZE)
2024 rxq->rx_buf_size = PAGE_SIZE;
2025
2026 /* Segment size to spilt a page in multiple equal parts */
2027 rxq->rx_buf_seg_size = roundup_pow_of_two(rxq->rx_buf_size);
2950219d
YM		 2028
2029 /* Allocate the parallel driver ring for Rx buffers */
fc48b7a6 2030 size = sizeof(*rxq->sw_rx_ring) * RX_RING_SIZE;
2950219d
YM		 2031 rxq->sw_rx_ring = kzalloc(size, GFP_KERNEL);
2032 if (!rxq->sw_rx_ring) {
2033 DP_ERR(edev, "Rx buffers ring allocation failed\n");
2034 goto err;
2035 }
2036
2037 /* Allocate FW Rx ring */
2038 rc = edev->ops->common->chain_alloc(edev->cdev,
2039 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
2040 QED_CHAIN_MODE_NEXT_PTR,
fc48b7a6 2041 RX_RING_SIZE,
2950219d
YM		 2042 sizeof(struct eth_rx_bd),
2043 &rxq->rx_bd_ring);
2044
2045 if (rc)
2046 goto err;
2047
2048 /* Allocate FW completion ring */
2049 rc = edev->ops->common->chain_alloc(edev->cdev,
2050 QED_CHAIN_USE_TO_CONSUME,
2051 QED_CHAIN_MODE_PBL,
fc48b7a6 2052 RX_RING_SIZE,
2950219d
YM		 2053 sizeof(union eth_rx_cqe),
2054 &rxq->rx_comp_ring);
2055 if (rc)
2056 goto err;
2057
2058 /* Allocate buffers for the Rx ring */
2059 for (i = 0; i < rxq->num_rx_buffers; i++) {
2060 rc = qede_alloc_rx_buffer(edev, rxq);
2061 if (rc)
2062 break;
2063 }
2064 num_allocated = i;
2065 if (!num_allocated) {
2066 DP_ERR(edev, "Rx buffers allocation failed\n");
2067 goto err;
2068 } else if (num_allocated < rxq->num_rx_buffers) {
2069 DP_NOTICE(edev,
2070 "Allocated less buffers than desired (%d allocated)\n",
2071 num_allocated);
2072 }
2073
2074 return 0;
2075
2076err:
2077 qede_free_mem_rxq(edev, rxq);
2078 return -ENOMEM;
2079}
2080
2081static void qede_free_mem_txq(struct qede_dev *edev,
2082 struct qede_tx_queue *txq)
2083{
2084 /* Free the parallel SW ring */
2085 kfree(txq->sw_tx_ring);
2086
2087 /* Free the real RQ ring used by FW */
2088 edev->ops->common->chain_free(edev->cdev, &txq->tx_pbl);
2089}
2090
2091/* This function allocates all memory needed per Tx queue */
2092static int qede_alloc_mem_txq(struct qede_dev *edev,
2093 struct qede_tx_queue *txq)
2094{
2095 int size, rc;
2096 union eth_tx_bd_types *p_virt;
2097
2098 txq->num_tx_buffers = edev->q_num_tx_buffers;
2099
2100 /* Allocate the parallel driver ring for Tx buffers */
2101 size = sizeof(*txq->sw_tx_ring) * NUM_TX_BDS_MAX;
2102 txq->sw_tx_ring = kzalloc(size, GFP_KERNEL);
2103 if (!txq->sw_tx_ring) {
2104 DP_NOTICE(edev, "Tx buffers ring allocation failed\n");
2105 goto err;
2106 }
2107
2108 rc = edev->ops->common->chain_alloc(edev->cdev,
2109 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
2110 QED_CHAIN_MODE_PBL,
2111 NUM_TX_BDS_MAX,
2112 sizeof(*p_virt),
2113 &txq->tx_pbl);
2114 if (rc)
2115 goto err;
2116
2117 return 0;
2118
2119err:
2120 qede_free_mem_txq(edev, txq);
2121 return -ENOMEM;
2122}
2123
2124/* This function frees all memory of a single fp */
2125static void qede_free_mem_fp(struct qede_dev *edev,
2126 struct qede_fastpath *fp)
2127{
2128 int tc;
2129
2130 qede_free_mem_sb(edev, fp->sb_info);
2131
2132 qede_free_mem_rxq(edev, fp->rxq);
2133
2134 for (tc = 0; tc < edev->num_tc; tc++)
2135 qede_free_mem_txq(edev, &fp->txqs[tc]);
2136}
2137
2138/* This function allocates all memory needed for a single fp (i.e. an entity
2139 * which contains status block, one rx queue and multiple per-TC tx queues.
2140 */
2141static int qede_alloc_mem_fp(struct qede_dev *edev,
2142 struct qede_fastpath *fp)
2143{
2144 int rc, tc;
2145
2146 rc = qede_alloc_mem_sb(edev, fp->sb_info, fp->rss_id);
2147 if (rc)
2148 goto err;
2149
2150 rc = qede_alloc_mem_rxq(edev, fp->rxq);
2151 if (rc)
2152 goto err;
2153
2154 for (tc = 0; tc < edev->num_tc; tc++) {
2155 rc = qede_alloc_mem_txq(edev, &fp->txqs[tc]);
2156 if (rc)
2157 goto err;
2158 }
2159
2160 return 0;
2161
2162err:
2163 qede_free_mem_fp(edev, fp);
2164 return -ENOMEM;
2165}
2166
2167static void qede_free_mem_load(struct qede_dev *edev)
2168{
2169 int i;
2170
2171 for_each_rss(i) {
2172 struct qede_fastpath *fp = &edev->fp_array[i];
2173
2174 qede_free_mem_fp(edev, fp);
2175 }
2176}
2177
2178/* This function allocates all qede memory at NIC load. */
2179static int qede_alloc_mem_load(struct qede_dev *edev)
2180{
2181 int rc = 0, rss_id;
2182
2183 for (rss_id = 0; rss_id < QEDE_RSS_CNT(edev); rss_id++) {
2184 struct qede_fastpath *fp = &edev->fp_array[rss_id];
2185
2186 rc = qede_alloc_mem_fp(edev, fp);
2187 if (rc)
2188 break;
2189 }
2190
2191 if (rss_id != QEDE_RSS_CNT(edev)) {
2192 /* Failed allocating memory for all the queues */
2193 if (!rss_id) {
2194 DP_ERR(edev,
2195 "Failed to allocate memory for the leading queue\n");
2196 rc = -ENOMEM;
2197 } else {
2198 DP_NOTICE(edev,
2199 "Failed to allocate memory for all of RSS queues\n Desired: %d queues, allocated: %d queues\n",
2200 QEDE_RSS_CNT(edev), rss_id);
2201 }
2202 edev->num_rss = rss_id;
2203 }
2204
2205 return 0;
2206}
2207
2208/* This function inits fp content and resets the SB, RXQ and TXQ structures */
2209static void qede_init_fp(struct qede_dev *edev)
2210{
2211 int rss_id, txq_index, tc;
2212 struct qede_fastpath *fp;
2213
2214 for_each_rss(rss_id) {
2215 fp = &edev->fp_array[rss_id];
2216
2217 fp->edev = edev;
2218 fp->rss_id = rss_id;
2219
2220 memset((void *)&fp->napi, 0, sizeof(fp->napi));
2221
2222 memset((void *)fp->sb_info, 0, sizeof(*fp->sb_info));
2223
2224 memset((void *)fp->rxq, 0, sizeof(*fp->rxq));
2225 fp->rxq->rxq_id = rss_id;
2226
2227 memset((void *)fp->txqs, 0, (edev->num_tc * sizeof(*fp->txqs)));
2228 for (tc = 0; tc < edev->num_tc; tc++) {
2229 txq_index = tc * QEDE_RSS_CNT(edev) + rss_id;
2230 fp->txqs[tc].index = txq_index;
2231 }
2232
2233 snprintf(fp->name, sizeof(fp->name), "%s-fp-%d",
2234 edev->ndev->name, rss_id);
2235 }
2236}
2237
2238static int qede_set_real_num_queues(struct qede_dev *edev)
2239{
2240 int rc = 0;
2241
2242 rc = netif_set_real_num_tx_queues(edev->ndev, QEDE_TSS_CNT(edev));
2243 if (rc) {
2244 DP_NOTICE(edev, "Failed to set real number of Tx queues\n");
2245 return rc;
2246 }
2247 rc = netif_set_real_num_rx_queues(edev->ndev, QEDE_RSS_CNT(edev));
2248 if (rc) {
2249 DP_NOTICE(edev, "Failed to set real number of Rx queues\n");
2250 return rc;
2251 }
2252
2253 return 0;
2254}
2255
2256static void qede_napi_disable_remove(struct qede_dev *edev)
2257{
2258 int i;
2259
2260 for_each_rss(i) {
2261 napi_disable(&edev->fp_array[i].napi);
2262
2263 netif_napi_del(&edev->fp_array[i].napi);
2264 }
2265}
2266
2267static void qede_napi_add_enable(struct qede_dev *edev)
2268{
2269 int i;
2270
2271 /* Add NAPI objects */
2272 for_each_rss(i) {
2273 netif_napi_add(edev->ndev, &edev->fp_array[i].napi,
2274 qede_poll, NAPI_POLL_WEIGHT);
2275 napi_enable(&edev->fp_array[i].napi);
2276 }
2277}
2278
2279static void qede_sync_free_irqs(struct qede_dev *edev)
2280{
2281 int i;
2282
2283 for (i = 0; i < edev->int_info.used_cnt; i++) {
2284 if (edev->int_info.msix_cnt) {
2285 synchronize_irq(edev->int_info.msix[i].vector);
2286 free_irq(edev->int_info.msix[i].vector,
2287 &edev->fp_array[i]);
2288 } else {
2289 edev->ops->common->simd_handler_clean(edev->cdev, i);
2290 }
2291 }
2292
2293 edev->int_info.used_cnt = 0;
2294}
2295
2296static int qede_req_msix_irqs(struct qede_dev *edev)
2297{
2298 int i, rc;
2299
2300 /* Sanitize number of interrupts == number of prepared RSS queues */
2301 if (QEDE_RSS_CNT(edev) > edev->int_info.msix_cnt) {
2302 DP_ERR(edev,
2303 "Interrupt mismatch: %d RSS queues > %d MSI-x vectors\n",
2304 QEDE_RSS_CNT(edev), edev->int_info.msix_cnt);
2305 return -EINVAL;
2306 }
2307
2308 for (i = 0; i < QEDE_RSS_CNT(edev); i++) {
2309 rc = request_irq(edev->int_info.msix[i].vector,
2310 qede_msix_fp_int, 0, edev->fp_array[i].name,
2311 &edev->fp_array[i]);
2312 if (rc) {
2313 DP_ERR(edev, "Request fp %d irq failed\n", i);
2314 qede_sync_free_irqs(edev);
2315 return rc;
2316 }
2317 DP_VERBOSE(edev, NETIF_MSG_INTR,
2318 "Requested fp irq for %s [entry %d]. Cookie is at %p\n",
2319 edev->fp_array[i].name, i,
2320 &edev->fp_array[i]);
2321 edev->int_info.used_cnt++;
2322 }
2323
2324 return 0;
2325}
2326
2327static void qede_simd_fp_handler(void *cookie)
2328{
2329 struct qede_fastpath *fp = (struct qede_fastpath *)cookie;
2330
2331 napi_schedule_irqoff(&fp->napi);
2332}
2333
2334static int qede_setup_irqs(struct qede_dev *edev)
2335{
2336 int i, rc = 0;
2337
2338 /* Learn Interrupt configuration */
2339 rc = edev->ops->common->get_fp_int(edev->cdev, &edev->int_info);
2340 if (rc)
2341 return rc;
2342
2343 if (edev->int_info.msix_cnt) {
2344 rc = qede_req_msix_irqs(edev);
2345 if (rc)
2346 return rc;
2347 edev->ndev->irq = edev->int_info.msix[0].vector;
2348 } else {
2349 const struct qed_common_ops *ops;
2350
2351 /* qed should learn receive the RSS ids and callbacks */
2352 ops = edev->ops->common;
2353 for (i = 0; i < QEDE_RSS_CNT(edev); i++)
2354 ops->simd_handler_config(edev->cdev,
2355 &edev->fp_array[i], i,
2356 qede_simd_fp_handler);
2357 edev->int_info.used_cnt = QEDE_RSS_CNT(edev);
2358 }
2359 return 0;
2360}
2361
2362static int qede_drain_txq(struct qede_dev *edev,
2363 struct qede_tx_queue *txq,
2364 bool allow_drain)
2365{
2366 int rc, cnt = 1000;
2367
2368 while (txq->sw_tx_cons != txq->sw_tx_prod) {
2369 if (!cnt) {
2370 if (allow_drain) {
2371 DP_NOTICE(edev,
2372 "Tx queue[%d] is stuck, requesting MCP to drain\n",
2373 txq->index);
2374 rc = edev->ops->common->drain(edev->cdev);
2375 if (rc)
2376 return rc;
2377 return qede_drain_txq(edev, txq, false);
2378 }
2379 DP_NOTICE(edev,
2380 "Timeout waiting for tx queue[%d]: PROD=%d, CONS=%d\n",
2381 txq->index, txq->sw_tx_prod,
2382 txq->sw_tx_cons);
2383 return -ENODEV;
2384 }
2385 cnt--;
2386 usleep_range(1000, 2000);
2387 barrier();
2388 }
2389
2390 /* FW finished processing, wait for HW to transmit all tx packets */
2391 usleep_range(1000, 2000);
2392
2393 return 0;
2394}
2395
2396static int qede_stop_queues(struct qede_dev *edev)
2397{
2398 struct qed_update_vport_params vport_update_params;
2399 struct qed_dev *cdev = edev->cdev;
2400 int rc, tc, i;
2401
2402 /* Disable the vport */
2403 memset(&vport_update_params, 0, sizeof(vport_update_params));
2404 vport_update_params.vport_id = 0;
2405 vport_update_params.update_vport_active_flg = 1;
2406 vport_update_params.vport_active_flg = 0;
2407 vport_update_params.update_rss_flg = 0;
2408
2409 rc = edev->ops->vport_update(cdev, &vport_update_params);
2410 if (rc) {
2411 DP_ERR(edev, "Failed to update vport\n");
2412 return rc;
2413 }
2414
2415 /* Flush Tx queues. If needed, request drain from MCP */
2416 for_each_rss(i) {
2417 struct qede_fastpath *fp = &edev->fp_array[i];
2418
2419 for (tc = 0; tc < edev->num_tc; tc++) {
2420 struct qede_tx_queue *txq = &fp->txqs[tc];
2421
2422 rc = qede_drain_txq(edev, txq, true);
2423 if (rc)
2424 return rc;
2425 }
2426 }
2427
2428 /* Stop all Queues in reverse order*/
2429 for (i = QEDE_RSS_CNT(edev) - 1; i >= 0; i--) {
2430 struct qed_stop_rxq_params rx_params;
2431
2432 /* Stop the Tx Queue(s)*/
2433 for (tc = 0; tc < edev->num_tc; tc++) {
2434 struct qed_stop_txq_params tx_params;
2435
2436 tx_params.rss_id = i;
2437 tx_params.tx_queue_id = tc * QEDE_RSS_CNT(edev) + i;
2438 rc = edev->ops->q_tx_stop(cdev, &tx_params);
2439 if (rc) {
2440 DP_ERR(edev, "Failed to stop TXQ #%d\n",
2441 tx_params.tx_queue_id);
2442 return rc;
2443 }
2444 }
2445
2446 /* Stop the Rx Queue*/
2447 memset(&rx_params, 0, sizeof(rx_params));
2448 rx_params.rss_id = i;
2449 rx_params.rx_queue_id = i;
2450
2451 rc = edev->ops->q_rx_stop(cdev, &rx_params);
2452 if (rc) {
2453 DP_ERR(edev, "Failed to stop RXQ #%d\n", i);
2454 return rc;
2455 }
2456 }
2457
2458 /* Stop the vport */
2459 rc = edev->ops->vport_stop(cdev, 0);
2460 if (rc)
2461 DP_ERR(edev, "Failed to stop VPORT\n");
2462
2463 return rc;
2464}
2465
2466static int qede_start_queues(struct qede_dev *edev)
2467{
2468 int rc, tc, i;
2469 int vport_id = 0, drop_ttl0_flg = 1, vlan_removal_en = 1;
2470 struct qed_dev *cdev = edev->cdev;
2471 struct qed_update_vport_rss_params *rss_params = &edev->rss_params;
2472 struct qed_update_vport_params vport_update_params;
2473 struct qed_queue_start_common_params q_params;
2474
2475 if (!edev->num_rss) {
2476 DP_ERR(edev,
2477 "Cannot update V-VPORT as active as there are no Rx queues\n");
2478 return -EINVAL;
2479 }
2480
2481 rc = edev->ops->vport_start(cdev, vport_id,
2482 edev->ndev->mtu,
2483 drop_ttl0_flg,
2484 vlan_removal_en);
2485
2486 if (rc) {
2487 DP_ERR(edev, "Start V-PORT failed %d\n", rc);
2488 return rc;
2489 }
2490
2491 DP_VERBOSE(edev, NETIF_MSG_IFUP,
2492 "Start vport ramrod passed, vport_id = %d, MTU = %d, vlan_removal_en = %d\n",
2493 vport_id, edev->ndev->mtu + 0xe, vlan_removal_en);
2494
2495 for_each_rss(i) {
2496 struct qede_fastpath *fp = &edev->fp_array[i];
2497 dma_addr_t phys_table = fp->rxq->rx_comp_ring.pbl.p_phys_table;
2498
2499 memset(&q_params, 0, sizeof(q_params));
2500 q_params.rss_id = i;
2501 q_params.queue_id = i;
2502 q_params.vport_id = 0;
2503 q_params.sb = fp->sb_info->igu_sb_id;
2504 q_params.sb_idx = RX_PI;
2505
2506 rc = edev->ops->q_rx_start(cdev, &q_params,
2507 fp->rxq->rx_buf_size,
2508 fp->rxq->rx_bd_ring.p_phys_addr,
2509 phys_table,
2510 fp->rxq->rx_comp_ring.page_cnt,
2511 &fp->rxq->hw_rxq_prod_addr);
2512 if (rc) {
2513 DP_ERR(edev, "Start RXQ #%d failed %d\n", i, rc);
2514 return rc;
2515 }
2516
2517 fp->rxq->hw_cons_ptr = &fp->sb_info->sb_virt->pi_array[RX_PI];
2518
2519 qede_update_rx_prod(edev, fp->rxq);
2520
2521 for (tc = 0; tc < edev->num_tc; tc++) {
2522 struct qede_tx_queue *txq = &fp->txqs[tc];
2523 int txq_index = tc * QEDE_RSS_CNT(edev) + i;
2524
2525 memset(&q_params, 0, sizeof(q_params));
2526 q_params.rss_id = i;
2527 q_params.queue_id = txq_index;
2528 q_params.vport_id = 0;
2529 q_params.sb = fp->sb_info->igu_sb_id;
2530 q_params.sb_idx = TX_PI(tc);
2531
2532 rc = edev->ops->q_tx_start(cdev, &q_params,
2533 txq->tx_pbl.pbl.p_phys_table,
2534 txq->tx_pbl.page_cnt,
2535 &txq->doorbell_addr);
2536 if (rc) {
2537 DP_ERR(edev, "Start TXQ #%d failed %d\n",
2538 txq_index, rc);
2539 return rc;
2540 }
2541
2542 txq->hw_cons_ptr =
2543 &fp->sb_info->sb_virt->pi_array[TX_PI(tc)];
2544 SET_FIELD(txq->tx_db.data.params,
2545 ETH_DB_DATA_DEST, DB_DEST_XCM);
2546 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_CMD,
2547 DB_AGG_CMD_SET);
2548 SET_FIELD(txq->tx_db.data.params,
2549 ETH_DB_DATA_AGG_VAL_SEL,
2550 DQ_XCM_ETH_TX_BD_PROD_CMD);
2551
2552 txq->tx_db.data.agg_flags = DQ_XCM_ETH_DQ_CF_CMD;
2553 }
2554 }
2555
2556 /* Prepare and send the vport enable */
2557 memset(&vport_update_params, 0, sizeof(vport_update_params));
2558 vport_update_params.vport_id = vport_id;
2559 vport_update_params.update_vport_active_flg = 1;
2560 vport_update_params.vport_active_flg = 1;
2561
2562 /* Fill struct with RSS params */
2563 if (QEDE_RSS_CNT(edev) > 1) {
2564 vport_update_params.update_rss_flg = 1;
2565 for (i = 0; i < 128; i++)
2566 rss_params->rss_ind_table[i] =
2567 ethtool_rxfh_indir_default(i, QEDE_RSS_CNT(edev));
2568 netdev_rss_key_fill(rss_params->rss_key,
2569 sizeof(rss_params->rss_key));
2570 } else {
2571 memset(rss_params, 0, sizeof(*rss_params));
2572 }
2573 memcpy(&vport_update_params.rss_params, rss_params,
2574 sizeof(*rss_params));
2575
2576 rc = edev->ops->vport_update(cdev, &vport_update_params);
2577 if (rc) {
2578 DP_ERR(edev, "Update V-PORT failed %d\n", rc);
2579 return rc;
2580 }
2581
2582 return 0;
2583}
2584
0d8e0aa0
SK		 2585static int qede_set_mcast_rx_mac(struct qede_dev *edev,
2586 enum qed_filter_xcast_params_type opcode,
2587 unsigned char *mac, int num_macs)
2588{
2589 struct qed_filter_params filter_cmd;
2590 int i;
2591
2592 memset(&filter_cmd, 0, sizeof(filter_cmd));
2593 filter_cmd.type = QED_FILTER_TYPE_MCAST;
2594 filter_cmd.filter.mcast.type = opcode;
2595 filter_cmd.filter.mcast.num = num_macs;
2596
2597 for (i = 0; i < num_macs; i++, mac += ETH_ALEN)
2598 ether_addr_copy(filter_cmd.filter.mcast.mac[i], mac);
2599
2600 return edev->ops->filter_config(edev->cdev, &filter_cmd);
2601}
2602
2950219d
YM		 2603enum qede_unload_mode {
2604 QEDE_UNLOAD_NORMAL,
2605};
2606
2607static void qede_unload(struct qede_dev *edev, enum qede_unload_mode mode)
2608{
a2ec6172 2609 struct qed_link_params link_params;
2950219d
YM		 2610 int rc;
2611
2612 DP_INFO(edev, "Starting qede unload\n");
2613
0d8e0aa0
SK		 2614 mutex_lock(&edev->qede_lock);
2615 edev->state = QEDE_STATE_CLOSED;
2616
2950219d
YM		 2617 /* Close OS Tx */
2618 netif_tx_disable(edev->ndev);
2619 netif_carrier_off(edev->ndev);
2620
a2ec6172
SK		 2621 /* Reset the link */
2622 memset(&link_params, 0, sizeof(link_params));
2623 link_params.link_up = false;
2624 edev->ops->common->set_link(edev->cdev, &link_params);
2950219d
YM		 2625 rc = qede_stop_queues(edev);
2626 if (rc) {
2627 qede_sync_free_irqs(edev);
2628 goto out;
2629 }
2630
2631 DP_INFO(edev, "Stopped Queues\n");
2632
7c1bfcad 2633 qede_vlan_mark_nonconfigured(edev);
2950219d
YM		 2634 edev->ops->fastpath_stop(edev->cdev);
2635
2636 /* Release the interrupts */
2637 qede_sync_free_irqs(edev);
2638 edev->ops->common->set_fp_int(edev->cdev, 0);
2639
2640 qede_napi_disable_remove(edev);
2641
2642 qede_free_mem_load(edev);
2643 qede_free_fp_array(edev);
2644
2645out:
2646 mutex_unlock(&edev->qede_lock);
2647 DP_INFO(edev, "Ending qede unload\n");
2648}
2649
2650enum qede_load_mode {
2651 QEDE_LOAD_NORMAL,
2652};
2653
2654static int qede_load(struct qede_dev *edev, enum qede_load_mode mode)
2655{
a2ec6172
SK		 2656 struct qed_link_params link_params;
2657 struct qed_link_output link_output;
2950219d
YM		 2658 int rc;
2659
2660 DP_INFO(edev, "Starting qede load\n");
2661
2662 rc = qede_set_num_queues(edev);
2663 if (rc)
2664 goto err0;
2665
2666 rc = qede_alloc_fp_array(edev);
2667 if (rc)
2668 goto err0;
2669
2670 qede_init_fp(edev);
2671
2672 rc = qede_alloc_mem_load(edev);
2673 if (rc)
2674 goto err1;
2675 DP_INFO(edev, "Allocated %d RSS queues on %d TC/s\n",
2676 QEDE_RSS_CNT(edev), edev->num_tc);
2677
2678 rc = qede_set_real_num_queues(edev);
2679 if (rc)
2680 goto err2;
2681
2682 qede_napi_add_enable(edev);
2683 DP_INFO(edev, "Napi added and enabled\n");
2684
2685 rc = qede_setup_irqs(edev);
2686 if (rc)
2687 goto err3;
2688 DP_INFO(edev, "Setup IRQs succeeded\n");
2689
2690 rc = qede_start_queues(edev);
2691 if (rc)
2692 goto err4;
2693 DP_INFO(edev, "Start VPORT, RXQ and TXQ succeeded\n");
2694
2695 /* Add primary mac and set Rx filters */
2696 ether_addr_copy(edev->primary_mac, edev->ndev->dev_addr);
2697
0d8e0aa0
SK		 2698 mutex_lock(&edev->qede_lock);
2699 edev->state = QEDE_STATE_OPEN;
2700 mutex_unlock(&edev->qede_lock);
a2ec6172 2701
7c1bfcad
SRK		 2702 /* Program un-configured VLANs */
2703 qede_configure_vlan_filters(edev);
2704
a2ec6172
SK		 2705 /* Ask for link-up using current configuration */
2706 memset(&link_params, 0, sizeof(link_params));
2707 link_params.link_up = true;
2708 edev->ops->common->set_link(edev->cdev, &link_params);
2709
2710 /* Query whether link is already-up */
2711 memset(&link_output, 0, sizeof(link_output));
2712 edev->ops->common->get_link(edev->cdev, &link_output);
2713 qede_link_update(edev, &link_output);
2714
2950219d
YM		 2715 DP_INFO(edev, "Ending successfully qede load\n");
2716
2717 return 0;
2718
2719err4:
2720 qede_sync_free_irqs(edev);
2721 memset(&edev->int_info.msix_cnt, 0, sizeof(struct qed_int_info));
2722err3:
2723 qede_napi_disable_remove(edev);
2724err2:
2725 qede_free_mem_load(edev);
2726err1:
2727 edev->ops->common->set_fp_int(edev->cdev, 0);
2728 qede_free_fp_array(edev);
2729 edev->num_rss = 0;
2730err0:
2731 return rc;
2732}
2733
133fac0e
SK		 2734void qede_reload(struct qede_dev *edev,
2735 void (*func)(struct qede_dev *, union qede_reload_args *),
2736 union qede_reload_args *args)
2737{
2738 qede_unload(edev, QEDE_UNLOAD_NORMAL);
2739 /* Call function handler to update parameters
2740 * needed for function load.
2741 */
2742 if (func)
2743 func(edev, args);
2744
2745 qede_load(edev, QEDE_LOAD_NORMAL);
2746
2747 mutex_lock(&edev->qede_lock);
2748 qede_config_rx_mode(edev->ndev);
2749 mutex_unlock(&edev->qede_lock);
2750}
2751
2950219d
YM		 2752/* called with rtnl_lock */
2753static int qede_open(struct net_device *ndev)
2754{
2755 struct qede_dev *edev = netdev_priv(ndev);
2756
2757 netif_carrier_off(ndev);
2758
2759 edev->ops->common->set_power_state(edev->cdev, PCI_D0);
2760
2761 return qede_load(edev, QEDE_LOAD_NORMAL);
2762}
2763
2764static int qede_close(struct net_device *ndev)
2765{
2766 struct qede_dev *edev = netdev_priv(ndev);
2767
2768 qede_unload(edev, QEDE_UNLOAD_NORMAL);
2769
2770 return 0;
2771}
0d8e0aa0 2772
a2ec6172
SK		 2773static void qede_link_update(void *dev, struct qed_link_output *link)
2774{
2775 struct qede_dev *edev = dev;
2776
2777 if (!netif_running(edev->ndev)) {
2778 DP_VERBOSE(edev, NETIF_MSG_LINK, "Interface is not running\n");
2779 return;
2780 }
2781
2782 if (link->link_up) {
2783 DP_NOTICE(edev, "Link is up\n");
2784 netif_tx_start_all_queues(edev->ndev);
2785 netif_carrier_on(edev->ndev);
2786 } else {
2787 DP_NOTICE(edev, "Link is down\n");
2788 netif_tx_disable(edev->ndev);
2789 netif_carrier_off(edev->ndev);
2790 }
2791}
2792
0d8e0aa0
SK		 2793static int qede_set_mac_addr(struct net_device *ndev, void *p)
2794{
2795 struct qede_dev *edev = netdev_priv(ndev);
2796 struct sockaddr *addr = p;
2797 int rc;
2798
2799 ASSERT_RTNL(); /* @@@TBD To be removed */
2800
2801 DP_INFO(edev, "Set_mac_addr called\n");
2802
2803 if (!is_valid_ether_addr(addr->sa_data)) {
2804 DP_NOTICE(edev, "The MAC address is not valid\n");
2805 return -EFAULT;
2806 }
2807
2808 ether_addr_copy(ndev->dev_addr, addr->sa_data);
2809
2810 if (!netif_running(ndev)) {
2811 DP_NOTICE(edev, "The device is currently down\n");
2812 return 0;
2813 }
2814
2815 /* Remove the previous primary mac */
2816 rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL,
2817 edev->primary_mac);
2818 if (rc)
2819 return rc;
2820
2821 /* Add MAC filter according to the new unicast HW MAC address */
2822 ether_addr_copy(edev->primary_mac, ndev->dev_addr);
2823 return qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD,
2824 edev->primary_mac);
2825}
2826
2827static int
2828qede_configure_mcast_filtering(struct net_device *ndev,
2829 enum qed_filter_rx_mode_type *accept_flags)
2830{
2831 struct qede_dev *edev = netdev_priv(ndev);
2832 unsigned char *mc_macs, *temp;
2833 struct netdev_hw_addr *ha;
2834 int rc = 0, mc_count;
2835 size_t size;
2836
2837 size = 64 * ETH_ALEN;
2838
2839 mc_macs = kzalloc(size, GFP_KERNEL);
2840 if (!mc_macs) {
2841 DP_NOTICE(edev,
2842 "Failed to allocate memory for multicast MACs\n");
2843 rc = -ENOMEM;
2844 goto exit;
2845 }
2846
2847 temp = mc_macs;
2848
2849 /* Remove all previously configured MAC filters */
2850 rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL,
2851 mc_macs, 1);
2852 if (rc)
2853 goto exit;
2854
2855 netif_addr_lock_bh(ndev);
2856
2857 mc_count = netdev_mc_count(ndev);
2858 if (mc_count < 64) {
2859 netdev_for_each_mc_addr(ha, ndev) {
2860 ether_addr_copy(temp, ha->addr);
2861 temp += ETH_ALEN;
2862 }
2863 }
2864
2865 netif_addr_unlock_bh(ndev);
2866
2867 /* Check for all multicast @@@TBD resource allocation */
2868 if ((ndev->flags & IFF_ALLMULTI) ||
2869 (mc_count > 64)) {
2870 if (*accept_flags == QED_FILTER_RX_MODE_TYPE_REGULAR)
2871 *accept_flags = QED_FILTER_RX_MODE_TYPE_MULTI_PROMISC;
2872 } else {
2873 /* Add all multicast MAC filters */
2874 rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD,
2875 mc_macs, mc_count);
2876 }
2877
2878exit:
2879 kfree(mc_macs);
2880 return rc;
2881}
2882
2883static void qede_set_rx_mode(struct net_device *ndev)
2884{
2885 struct qede_dev *edev = netdev_priv(ndev);
2886
2887 DP_INFO(edev, "qede_set_rx_mode called\n");
2888
2889 if (edev->state != QEDE_STATE_OPEN) {
2890 DP_INFO(edev,
2891 "qede_set_rx_mode called while interface is down\n");
2892 } else {
2893 set_bit(QEDE_SP_RX_MODE, &edev->sp_flags);
2894 schedule_delayed_work(&edev->sp_task, 0);
2895 }
2896}
2897
2898/* Must be called with qede_lock held */
2899static void qede_config_rx_mode(struct net_device *ndev)
2900{
2901 enum qed_filter_rx_mode_type accept_flags = QED_FILTER_TYPE_UCAST;
2902 struct qede_dev *edev = netdev_priv(ndev);
2903 struct qed_filter_params rx_mode;
2904 unsigned char *uc_macs, *temp;
2905 struct netdev_hw_addr *ha;
2906 int rc, uc_count;
2907 size_t size;
2908
2909 netif_addr_lock_bh(ndev);
2910
2911 uc_count = netdev_uc_count(ndev);
2912 size = uc_count * ETH_ALEN;
2913
2914 uc_macs = kzalloc(size, GFP_ATOMIC);
2915 if (!uc_macs) {
2916 DP_NOTICE(edev, "Failed to allocate memory for unicast MACs\n");
2917 netif_addr_unlock_bh(ndev);
2918 return;
2919 }
2920
2921 temp = uc_macs;
2922 netdev_for_each_uc_addr(ha, ndev) {
2923 ether_addr_copy(temp, ha->addr);
2924 temp += ETH_ALEN;
2925 }
2926
2927 netif_addr_unlock_bh(ndev);
2928
2929 /* Configure the struct for the Rx mode */
2930 memset(&rx_mode, 0, sizeof(struct qed_filter_params));
2931 rx_mode.type = QED_FILTER_TYPE_RX_MODE;
2932
2933 /* Remove all previous unicast secondary macs and multicast macs
2934 * (configrue / leave the primary mac)
2935 */
2936 rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_REPLACE,
2937 edev->primary_mac);
2938 if (rc)
2939 goto out;
2940
2941 /* Check for promiscuous */
2942 if ((ndev->flags & IFF_PROMISC) ||
2943 (uc_count > 15)) { /* @@@TBD resource allocation - 1 */
2944 accept_flags = QED_FILTER_RX_MODE_TYPE_PROMISC;
2945 } else {
2946 /* Add MAC filters according to the unicast secondary macs */
2947 int i;
2948
2949 temp = uc_macs;
2950 for (i = 0; i < uc_count; i++) {
2951 rc = qede_set_ucast_rx_mac(edev,
2952 QED_FILTER_XCAST_TYPE_ADD,
2953 temp);
2954 if (rc)
2955 goto out;
2956
2957 temp += ETH_ALEN;
2958 }
2959
2960 rc = qede_configure_mcast_filtering(ndev, &accept_flags);
2961 if (rc)
2962 goto out;
2963 }
2964
7c1bfcad
SRK		 2965 /* take care of VLAN mode */
2966 if (ndev->flags & IFF_PROMISC) {
2967 qede_config_accept_any_vlan(edev, true);
2968 } else if (!edev->non_configured_vlans) {
2969 /* It's possible that accept_any_vlan mode is set due to a
2970 * previous setting of IFF_PROMISC. If vlan credits are
2971 * sufficient, disable accept_any_vlan.
2972 */
2973 qede_config_accept_any_vlan(edev, false);
2974 }
2975
0d8e0aa0
SK		 2976 rx_mode.filter.accept_flags = accept_flags;
2977 edev->ops->filter_config(edev->cdev, &rx_mode);
2978out:
2979 kfree(uc_macs);
2980}
Linux 6.x block layer and io_uring tree(s)