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Merge tag 'drm-fixes-for-v4.7-rc2' of git://people.freedesktop.org/~airlied/linux
[linux-2.6-block.git] / drivers / net / ethernet / qlogic / qede / qede_main.c
CommitLineData
e712d52b
YM		 1/* QLogic qede NIC Driver
2* Copyright (c) 2015 QLogic Corporation
3*
4* This software is available under the terms of the GNU General Public License
5* (GPL) Version 2, available from the file COPYING in the main directory of
6* this source tree.
7*/
8
9#include <linux/module.h>
10#include <linux/pci.h>
11#include <linux/version.h>
12#include <linux/device.h>
13#include <linux/netdevice.h>
14#include <linux/etherdevice.h>
15#include <linux/skbuff.h>
16#include <linux/errno.h>
17#include <linux/list.h>
18#include <linux/string.h>
19#include <linux/dma-mapping.h>
20#include <linux/interrupt.h>
21#include <asm/byteorder.h>
22#include <asm/param.h>
23#include <linux/io.h>
24#include <linux/netdev_features.h>
25#include <linux/udp.h>
26#include <linux/tcp.h>
b18e170c 27#ifdef CONFIG_QEDE_VXLAN
e712d52b 28#include <net/vxlan.h>
b18e170c 29#endif
9a109dd0
MC		 30#ifdef CONFIG_QEDE_GENEVE
31#include <net/geneve.h>
32#endif
e712d52b
YM		 33#include <linux/ip.h>
34#include <net/ipv6.h>
35#include <net/tcp.h>
36#include <linux/if_ether.h>
37#include <linux/if_vlan.h>
38#include <linux/pkt_sched.h>
39#include <linux/ethtool.h>
40#include <linux/in.h>
41#include <linux/random.h>
42#include <net/ip6_checksum.h>
43#include <linux/bitops.h>
44
45#include "qede.h"
46
5abd7e92
YM		 47static char version[] =
48 "QLogic FastLinQ 4xxxx Ethernet Driver qede " DRV_MODULE_VERSION "\n";
e712d52b 49
5abd7e92 50MODULE_DESCRIPTION("QLogic FastLinQ 4xxxx Ethernet Driver");
e712d52b
YM		 51MODULE_LICENSE("GPL");
52MODULE_VERSION(DRV_MODULE_VERSION);
53
54static uint debug;
55module_param(debug, uint, 0);
56MODULE_PARM_DESC(debug, " Default debug msglevel");
57
58static const struct qed_eth_ops *qed_ops;
59
60#define CHIP_NUM_57980S_40 0x1634
0e7441d7 61#define CHIP_NUM_57980S_10 0x1666
e712d52b
YM		 62#define CHIP_NUM_57980S_MF 0x1636
63#define CHIP_NUM_57980S_100 0x1644
64#define CHIP_NUM_57980S_50 0x1654
65#define CHIP_NUM_57980S_25 0x1656
fefb0202 66#define CHIP_NUM_57980S_IOV 0x1664
e712d52b
YM		 67
68#ifndef PCI_DEVICE_ID_NX2_57980E
69#define PCI_DEVICE_ID_57980S_40 CHIP_NUM_57980S_40
70#define PCI_DEVICE_ID_57980S_10 CHIP_NUM_57980S_10
71#define PCI_DEVICE_ID_57980S_MF CHIP_NUM_57980S_MF
72#define PCI_DEVICE_ID_57980S_100 CHIP_NUM_57980S_100
73#define PCI_DEVICE_ID_57980S_50 CHIP_NUM_57980S_50
74#define PCI_DEVICE_ID_57980S_25 CHIP_NUM_57980S_25
fefb0202 75#define PCI_DEVICE_ID_57980S_IOV CHIP_NUM_57980S_IOV
e712d52b
YM		 76#endif
77
fefb0202
YM		 78enum qede_pci_private {
79 QEDE_PRIVATE_PF,
80 QEDE_PRIVATE_VF
81};
82
e712d52b 83static const struct pci_device_id qede_pci_tbl[] = {
fefb0202
YM		 84 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_40), QEDE_PRIVATE_PF},
85 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_10), QEDE_PRIVATE_PF},
86 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_MF), QEDE_PRIVATE_PF},
87 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_100), QEDE_PRIVATE_PF},
88 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_50), QEDE_PRIVATE_PF},
89 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_25), QEDE_PRIVATE_PF},
90 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_IOV), QEDE_PRIVATE_VF},
e712d52b
YM		 91 { 0 }
92};
93
94MODULE_DEVICE_TABLE(pci, qede_pci_tbl);
95
96static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id);
97
98#define TX_TIMEOUT (5 * HZ)
99
100static void qede_remove(struct pci_dev *pdev);
2950219d
YM		 101static int qede_alloc_rx_buffer(struct qede_dev *edev,
102 struct qede_rx_queue *rxq);
a2ec6172 103static void qede_link_update(void *dev, struct qed_link_output *link);
e712d52b 104
fefb0202 105#ifdef CONFIG_QED_SRIOV
08feecd7
YM		 106static int qede_set_vf_vlan(struct net_device *ndev, int vf, u16 vlan, u8 qos)
107{
108 struct qede_dev *edev = netdev_priv(ndev);
109
110 if (vlan > 4095) {
111 DP_NOTICE(edev, "Illegal vlan value %d\n", vlan);
112 return -EINVAL;
113 }
114
115 DP_VERBOSE(edev, QED_MSG_IOV, "Setting Vlan 0x%04x to VF [%d]\n",
116 vlan, vf);
117
118 return edev->ops->iov->set_vlan(edev->cdev, vlan, vf);
119}
120
eff16960
YM		 121static int qede_set_vf_mac(struct net_device *ndev, int vfidx, u8 *mac)
122{
123 struct qede_dev *edev = netdev_priv(ndev);
124
125 DP_VERBOSE(edev, QED_MSG_IOV,
126 "Setting MAC %02x:%02x:%02x:%02x:%02x:%02x to VF [%d]\n",
127 mac[0], mac[1], mac[2], mac[3], mac[4], mac[5], vfidx);
128
129 if (!is_valid_ether_addr(mac)) {
130 DP_VERBOSE(edev, QED_MSG_IOV, "MAC address isn't valid\n");
131 return -EINVAL;
132 }
133
134 return edev->ops->iov->set_mac(edev->cdev, mac, vfidx);
135}
136
fefb0202
YM		 137static int qede_sriov_configure(struct pci_dev *pdev, int num_vfs_param)
138{
139 struct qede_dev *edev = netdev_priv(pci_get_drvdata(pdev));
831bfb0e
YM		 140 struct qed_dev_info *qed_info = &edev->dev_info.common;
141 int rc;
fefb0202
YM		 142
143 DP_VERBOSE(edev, QED_MSG_IOV, "Requested %d VFs\n", num_vfs_param);
144
831bfb0e
YM		 145 rc = edev->ops->iov->configure(edev->cdev, num_vfs_param);
146
147 /* Enable/Disable Tx switching for PF */
148 if ((rc == num_vfs_param) && netif_running(edev->ndev) &&
149 qed_info->mf_mode != QED_MF_NPAR && qed_info->tx_switching) {
150 struct qed_update_vport_params params;
151
152 memset(&params, 0, sizeof(params));
153 params.vport_id = 0;
154 params.update_tx_switching_flg = 1;
155 params.tx_switching_flg = num_vfs_param ? 1 : 0;
156 edev->ops->vport_update(edev->cdev, &params);
157 }
158
159 return rc;
fefb0202
YM		 160}
161#endif
162
e712d52b
YM		 163static struct pci_driver qede_pci_driver = {
164 .name = "qede",
165 .id_table = qede_pci_tbl,
166 .probe = qede_probe,
167 .remove = qede_remove,
fefb0202
YM		 168#ifdef CONFIG_QED_SRIOV
169 .sriov_configure = qede_sriov_configure,
170#endif
e712d52b
YM		 171};
172
eff16960
YM		 173static void qede_force_mac(void *dev, u8 *mac)
174{
175 struct qede_dev *edev = dev;
176
177 ether_addr_copy(edev->ndev->dev_addr, mac);
178 ether_addr_copy(edev->primary_mac, mac);
179}
180
a2ec6172
SK		 181static struct qed_eth_cb_ops qede_ll_ops = {
182 {
183 .link_update = qede_link_update,
184 },
eff16960 185 .force_mac = qede_force_mac,
a2ec6172
SK		 186};
187
2950219d
YM		 188static int qede_netdev_event(struct notifier_block *this, unsigned long event,
189 void *ptr)
190{
191 struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
192 struct ethtool_drvinfo drvinfo;
193 struct qede_dev *edev;
194
195 /* Currently only support name change */
196 if (event != NETDEV_CHANGENAME)
197 goto done;
198
199 /* Check whether this is a qede device */
200 if (!ndev || !ndev->ethtool_ops || !ndev->ethtool_ops->get_drvinfo)
201 goto done;
202
203 memset(&drvinfo, 0, sizeof(drvinfo));
204 ndev->ethtool_ops->get_drvinfo(ndev, &drvinfo);
205 if (strcmp(drvinfo.driver, "qede"))
206 goto done;
207 edev = netdev_priv(ndev);
208
209 /* Notify qed of the name change */
210 if (!edev->ops || !edev->ops->common)
211 goto done;
212 edev->ops->common->set_id(edev->cdev, edev->ndev->name,
213 "qede");
214
215done:
216 return NOTIFY_DONE;
217}
218
219static struct notifier_block qede_netdev_notifier = {
220 .notifier_call = qede_netdev_event,
221};
222
e712d52b
YM		 223static
224int __init qede_init(void)
225{
226 int ret;
e712d52b
YM		 227
228 pr_notice("qede_init: %s\n", version);
229
95114344 230 qed_ops = qed_get_eth_ops();
e712d52b
YM		 231 if (!qed_ops) {
232 pr_notice("Failed to get qed ethtool operations\n");
233 return -EINVAL;
234 }
235
2950219d
YM		 236 /* Must register notifier before pci ops, since we might miss
237 * interface rename after pci probe and netdev registeration.
238 */
239 ret = register_netdevice_notifier(&qede_netdev_notifier);
240 if (ret) {
241 pr_notice("Failed to register netdevice_notifier\n");
242 qed_put_eth_ops();
243 return -EINVAL;
244 }
245
e712d52b
YM		 246 ret = pci_register_driver(&qede_pci_driver);
247 if (ret) {
248 pr_notice("Failed to register driver\n");
2950219d 249 unregister_netdevice_notifier(&qede_netdev_notifier);
e712d52b
YM		 250 qed_put_eth_ops();
251 return -EINVAL;
252 }
253
254 return 0;
255}
256
257static void __exit qede_cleanup(void)
258{
259 pr_notice("qede_cleanup called\n");
260
2950219d 261 unregister_netdevice_notifier(&qede_netdev_notifier);
e712d52b
YM		 262 pci_unregister_driver(&qede_pci_driver);
263 qed_put_eth_ops();
264}
265
266module_init(qede_init);
267module_exit(qede_cleanup);
268
2950219d
YM		 269/* -------------------------------------------------------------------------
270 * START OF FAST-PATH
271 * -------------------------------------------------------------------------
272 */
273
274/* Unmap the data and free skb */
275static int qede_free_tx_pkt(struct qede_dev *edev,
276 struct qede_tx_queue *txq,
277 int *len)
278{
279 u16 idx = txq->sw_tx_cons & NUM_TX_BDS_MAX;
280 struct sk_buff *skb = txq->sw_tx_ring[idx].skb;
281 struct eth_tx_1st_bd *first_bd;
282 struct eth_tx_bd *tx_data_bd;
283 int bds_consumed = 0;
284 int nbds;
285 bool data_split = txq->sw_tx_ring[idx].flags & QEDE_TSO_SPLIT_BD;
286 int i, split_bd_len = 0;
287
288 if (unlikely(!skb)) {
289 DP_ERR(edev,
290 "skb is null for txq idx=%d txq->sw_tx_cons=%d txq->sw_tx_prod=%d\n",
291 idx, txq->sw_tx_cons, txq->sw_tx_prod);
292 return -1;
293 }
294
295 *len = skb->len;
296
297 first_bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl);
298
299 bds_consumed++;
300
301 nbds = first_bd->data.nbds;
302
303 if (data_split) {
304 struct eth_tx_bd *split = (struct eth_tx_bd *)
305 qed_chain_consume(&txq->tx_pbl);
306 split_bd_len = BD_UNMAP_LEN(split);
307 bds_consumed++;
308 }
309 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
310 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
311
312 /* Unmap the data of the skb frags */
313 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++, bds_consumed++) {
314 tx_data_bd = (struct eth_tx_bd *)
315 qed_chain_consume(&txq->tx_pbl);
316 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(tx_data_bd),
317 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
318 }
319
320 while (bds_consumed++ < nbds)
321 qed_chain_consume(&txq->tx_pbl);
322
323 /* Free skb */
324 dev_kfree_skb_any(skb);
325 txq->sw_tx_ring[idx].skb = NULL;
326 txq->sw_tx_ring[idx].flags = 0;
327
328 return 0;
329}
330
331/* Unmap the data and free skb when mapping failed during start_xmit */
332static void qede_free_failed_tx_pkt(struct qede_dev *edev,
333 struct qede_tx_queue *txq,
334 struct eth_tx_1st_bd *first_bd,
335 int nbd,
336 bool data_split)
337{
338 u16 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
339 struct sk_buff *skb = txq->sw_tx_ring[idx].skb;
340 struct eth_tx_bd *tx_data_bd;
341 int i, split_bd_len = 0;
342
343 /* Return prod to its position before this skb was handled */
344 qed_chain_set_prod(&txq->tx_pbl,
345 le16_to_cpu(txq->tx_db.data.bd_prod),
346 first_bd);
347
348 first_bd = (struct eth_tx_1st_bd *)qed_chain_produce(&txq->tx_pbl);
349
350 if (data_split) {
351 struct eth_tx_bd *split = (struct eth_tx_bd *)
352 qed_chain_produce(&txq->tx_pbl);
353 split_bd_len = BD_UNMAP_LEN(split);
354 nbd--;
355 }
356
357 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
358 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
359
360 /* Unmap the data of the skb frags */
361 for (i = 0; i < nbd; i++) {
362 tx_data_bd = (struct eth_tx_bd *)
363 qed_chain_produce(&txq->tx_pbl);
364 if (tx_data_bd->nbytes)
365 dma_unmap_page(&edev->pdev->dev,
366 BD_UNMAP_ADDR(tx_data_bd),
367 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
368 }
369
370 /* Return again prod to its position before this skb was handled */
371 qed_chain_set_prod(&txq->tx_pbl,
372 le16_to_cpu(txq->tx_db.data.bd_prod),
373 first_bd);
374
375 /* Free skb */
376 dev_kfree_skb_any(skb);
377 txq->sw_tx_ring[idx].skb = NULL;
378 txq->sw_tx_ring[idx].flags = 0;
379}
380
381static u32 qede_xmit_type(struct qede_dev *edev,
382 struct sk_buff *skb,
383 int *ipv6_ext)
384{
385 u32 rc = XMIT_L4_CSUM;
386 __be16 l3_proto;
387
388 if (skb->ip_summed != CHECKSUM_PARTIAL)
389 return XMIT_PLAIN;
390
391 l3_proto = vlan_get_protocol(skb);
392 if (l3_proto == htons(ETH_P_IPV6) &&
393 (ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6))
394 *ipv6_ext = 1;
395
14db81de
MC		 396 if (skb->encapsulation)
397 rc |= XMIT_ENC;
398
2950219d
YM		 399 if (skb_is_gso(skb))
400 rc |= XMIT_LSO;
401
402 return rc;
403}
404
405static void qede_set_params_for_ipv6_ext(struct sk_buff *skb,
406 struct eth_tx_2nd_bd *second_bd,
407 struct eth_tx_3rd_bd *third_bd)
408{
409 u8 l4_proto;
fc48b7a6 410 u16 bd2_bits1 = 0, bd2_bits2 = 0;
2950219d 411
fc48b7a6 412 bd2_bits1 |= (1 << ETH_TX_DATA_2ND_BD_IPV6_EXT_SHIFT);
2950219d 413
fc48b7a6 414 bd2_bits2 |= ((((u8 *)skb_transport_header(skb) - skb->data) >> 1) &
2950219d
YM		 415 ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_MASK)
416 << ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_SHIFT;
417
fc48b7a6 418 bd2_bits1 |= (ETH_L4_PSEUDO_CSUM_CORRECT_LENGTH <<
2950219d
YM		 419 ETH_TX_DATA_2ND_BD_L4_PSEUDO_CSUM_MODE_SHIFT);
420
421 if (vlan_get_protocol(skb) == htons(ETH_P_IPV6))
422 l4_proto = ipv6_hdr(skb)->nexthdr;
423 else
424 l4_proto = ip_hdr(skb)->protocol;
425
426 if (l4_proto == IPPROTO_UDP)
fc48b7a6 427 bd2_bits1 |= 1 << ETH_TX_DATA_2ND_BD_L4_UDP_SHIFT;
2950219d 428
fc48b7a6 429 if (third_bd)
2950219d 430 third_bd->data.bitfields |=
fc48b7a6
YM		 431 cpu_to_le16(((tcp_hdrlen(skb) / 4) &
432 ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_MASK) <<
433 ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_SHIFT);
2950219d 434
fc48b7a6 435 second_bd->data.bitfields1 = cpu_to_le16(bd2_bits1);
2950219d
YM		 436 second_bd->data.bitfields2 = cpu_to_le16(bd2_bits2);
437}
438
439static int map_frag_to_bd(struct qede_dev *edev,
440 skb_frag_t *frag,
441 struct eth_tx_bd *bd)
442{
443 dma_addr_t mapping;
444
445 /* Map skb non-linear frag data for DMA */
446 mapping = skb_frag_dma_map(&edev->pdev->dev, frag, 0,
447 skb_frag_size(frag),
448 DMA_TO_DEVICE);
449 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
450 DP_NOTICE(edev, "Unable to map frag - dropping packet\n");
451 return -ENOMEM;
452 }
453
454 /* Setup the data pointer of the frag data */
455 BD_SET_UNMAP_ADDR_LEN(bd, mapping, skb_frag_size(frag));
456
457 return 0;
458}
459
14db81de
MC		 460static u16 qede_get_skb_hlen(struct sk_buff *skb, bool is_encap_pkt)
461{
462 if (is_encap_pkt)
463 return (skb_inner_transport_header(skb) +
464 inner_tcp_hdrlen(skb) - skb->data);
465 else
466 return (skb_transport_header(skb) +
467 tcp_hdrlen(skb) - skb->data);
468}
469
b1199b10
YM		 470/* +2 for 1st BD for headers and 2nd BD for headlen (if required) */
471#if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET)
472static bool qede_pkt_req_lin(struct qede_dev *edev, struct sk_buff *skb,
473 u8 xmit_type)
474{
475 int allowed_frags = ETH_TX_MAX_BDS_PER_NON_LSO_PACKET - 1;
476
477 if (xmit_type & XMIT_LSO) {
478 int hlen;
479
14db81de 480 hlen = qede_get_skb_hlen(skb, xmit_type & XMIT_ENC);
b1199b10
YM		 481
482 /* linear payload would require its own BD */
483 if (skb_headlen(skb) > hlen)
484 allowed_frags--;
485 }
486
487 return (skb_shinfo(skb)->nr_frags > allowed_frags);
488}
489#endif
490
2950219d
YM		 491/* Main transmit function */
492static
493netdev_tx_t qede_start_xmit(struct sk_buff *skb,
494 struct net_device *ndev)
495{
496 struct qede_dev *edev = netdev_priv(ndev);
497 struct netdev_queue *netdev_txq;
498 struct qede_tx_queue *txq;
499 struct eth_tx_1st_bd *first_bd;
500 struct eth_tx_2nd_bd *second_bd = NULL;
501 struct eth_tx_3rd_bd *third_bd = NULL;
502 struct eth_tx_bd *tx_data_bd = NULL;
503 u16 txq_index;
504 u8 nbd = 0;
505 dma_addr_t mapping;
506 int rc, frag_idx = 0, ipv6_ext = 0;
507 u8 xmit_type;
508 u16 idx;
509 u16 hlen;
810810ff 510 bool data_split = false;
2950219d
YM		 511
512 /* Get tx-queue context and netdev index */
513 txq_index = skb_get_queue_mapping(skb);
514 WARN_ON(txq_index >= QEDE_TSS_CNT(edev));
515 txq = QEDE_TX_QUEUE(edev, txq_index);
516 netdev_txq = netdev_get_tx_queue(ndev, txq_index);
517
2950219d
YM		 518 WARN_ON(qed_chain_get_elem_left(&txq->tx_pbl) <
519 (MAX_SKB_FRAGS + 1));
520
521 xmit_type = qede_xmit_type(edev, skb, &ipv6_ext);
522
b1199b10
YM		 523#if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET)
524 if (qede_pkt_req_lin(edev, skb, xmit_type)) {
525 if (skb_linearize(skb)) {
526 DP_NOTICE(edev,
527 "SKB linearization failed - silently dropping this SKB\n");
528 dev_kfree_skb_any(skb);
529 return NETDEV_TX_OK;
530 }
531 }
532#endif
533
2950219d
YM		 534 /* Fill the entry in the SW ring and the BDs in the FW ring */
535 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
536 txq->sw_tx_ring[idx].skb = skb;
537 first_bd = (struct eth_tx_1st_bd *)
538 qed_chain_produce(&txq->tx_pbl);
539 memset(first_bd, 0, sizeof(*first_bd));
540 first_bd->data.bd_flags.bitfields =
541 1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT;
542
543 /* Map skb linear data for DMA and set in the first BD */
544 mapping = dma_map_single(&edev->pdev->dev, skb->data,
545 skb_headlen(skb), DMA_TO_DEVICE);
546 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
547 DP_NOTICE(edev, "SKB mapping failed\n");
548 qede_free_failed_tx_pkt(edev, txq, first_bd, 0, false);
549 return NETDEV_TX_OK;
550 }
551 nbd++;
552 BD_SET_UNMAP_ADDR_LEN(first_bd, mapping, skb_headlen(skb));
553
554 /* In case there is IPv6 with extension headers or LSO we need 2nd and
555 * 3rd BDs.
556 */
557 if (unlikely((xmit_type & XMIT_LSO) | ipv6_ext)) {
558 second_bd = (struct eth_tx_2nd_bd *)
559 qed_chain_produce(&txq->tx_pbl);
560 memset(second_bd, 0, sizeof(*second_bd));
561
562 nbd++;
563 third_bd = (struct eth_tx_3rd_bd *)
564 qed_chain_produce(&txq->tx_pbl);
565 memset(third_bd, 0, sizeof(*third_bd));
566
567 nbd++;
568 /* We need to fill in additional data in second_bd... */
569 tx_data_bd = (struct eth_tx_bd *)second_bd;
570 }
571
572 if (skb_vlan_tag_present(skb)) {
573 first_bd->data.vlan = cpu_to_le16(skb_vlan_tag_get(skb));
574 first_bd->data.bd_flags.bitfields |=
575 1 << ETH_TX_1ST_BD_FLAGS_VLAN_INSERTION_SHIFT;
576 }
577
578 /* Fill the parsing flags & params according to the requested offload */
579 if (xmit_type & XMIT_L4_CSUM) {
fc48b7a6
YM		 580 u16 temp = 1 << ETH_TX_DATA_1ST_BD_TUNN_CFG_OVERRIDE_SHIFT;
581
2950219d
YM		 582 /* We don't re-calculate IP checksum as it is already done by
583 * the upper stack
584 */
585 first_bd->data.bd_flags.bitfields |=
586 1 << ETH_TX_1ST_BD_FLAGS_L4_CSUM_SHIFT;
587
14db81de
MC		 588 if (xmit_type & XMIT_ENC) {
589 first_bd->data.bd_flags.bitfields |=
590 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT;
591 } else {
592 /* In cases when OS doesn't indicate for inner offloads
593 * when packet is tunnelled, we need to override the HW
594 * tunnel configuration so that packets are treated as
595 * regular non tunnelled packets and no inner offloads
596 * are done by the hardware.
597 */
598 first_bd->data.bitfields |= cpu_to_le16(temp);
599 }
fc48b7a6 600
2950219d
YM		 601 /* If the packet is IPv6 with extension header, indicate that
602 * to FW and pass few params, since the device cracker doesn't
603 * support parsing IPv6 with extension header/s.
604 */
605 if (unlikely(ipv6_ext))
606 qede_set_params_for_ipv6_ext(skb, second_bd, third_bd);
607 }
608
609 if (xmit_type & XMIT_LSO) {
610 first_bd->data.bd_flags.bitfields |=
611 (1 << ETH_TX_1ST_BD_FLAGS_LSO_SHIFT);
612 third_bd->data.lso_mss =
613 cpu_to_le16(skb_shinfo(skb)->gso_size);
614
14db81de
MC		 615 if (unlikely(xmit_type & XMIT_ENC)) {
616 first_bd->data.bd_flags.bitfields |=
617 1 << ETH_TX_1ST_BD_FLAGS_TUNN_IP_CSUM_SHIFT;
618 hlen = qede_get_skb_hlen(skb, true);
619 } else {
620 first_bd->data.bd_flags.bitfields |=
621 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT;
622 hlen = qede_get_skb_hlen(skb, false);
623 }
2950219d
YM		 624
625 /* @@@TBD - if will not be removed need to check */
626 third_bd->data.bitfields |=
fc48b7a6 627 cpu_to_le16((1 << ETH_TX_DATA_3RD_BD_HDR_NBD_SHIFT));
2950219d
YM		 628
629 /* Make life easier for FW guys who can't deal with header and
630 * data on same BD. If we need to split, use the second bd...
631 */
632 if (unlikely(skb_headlen(skb) > hlen)) {
633 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
634 "TSO split header size is %d (%x:%x)\n",
635 first_bd->nbytes, first_bd->addr.hi,
636 first_bd->addr.lo);
637
638 mapping = HILO_U64(le32_to_cpu(first_bd->addr.hi),
639 le32_to_cpu(first_bd->addr.lo)) +
640 hlen;
641
642 BD_SET_UNMAP_ADDR_LEN(tx_data_bd, mapping,
643 le16_to_cpu(first_bd->nbytes) -
644 hlen);
645
646 /* this marks the BD as one that has no
647 * individual mapping
648 */
649 txq->sw_tx_ring[idx].flags |= QEDE_TSO_SPLIT_BD;
650
651 first_bd->nbytes = cpu_to_le16(hlen);
652
653 tx_data_bd = (struct eth_tx_bd *)third_bd;
654 data_split = true;
655 }
656 }
657
658 /* Handle fragmented skb */
659 /* special handle for frags inside 2nd and 3rd bds.. */
660 while (tx_data_bd && frag_idx < skb_shinfo(skb)->nr_frags) {
661 rc = map_frag_to_bd(edev,
662 &skb_shinfo(skb)->frags[frag_idx],
663 tx_data_bd);
664 if (rc) {
665 qede_free_failed_tx_pkt(edev, txq, first_bd, nbd,
666 data_split);
667 return NETDEV_TX_OK;
668 }
669
670 if (tx_data_bd == (struct eth_tx_bd *)second_bd)
671 tx_data_bd = (struct eth_tx_bd *)third_bd;
672 else
673 tx_data_bd = NULL;
674
675 frag_idx++;
676 }
677
678 /* map last frags into 4th, 5th .... */
679 for (; frag_idx < skb_shinfo(skb)->nr_frags; frag_idx++, nbd++) {
680 tx_data_bd = (struct eth_tx_bd *)
681 qed_chain_produce(&txq->tx_pbl);
682
683 memset(tx_data_bd, 0, sizeof(*tx_data_bd));
684
685 rc = map_frag_to_bd(edev,
686 &skb_shinfo(skb)->frags[frag_idx],
687 tx_data_bd);
688 if (rc) {
689 qede_free_failed_tx_pkt(edev, txq, first_bd, nbd,
690 data_split);
691 return NETDEV_TX_OK;
692 }
693 }
694
695 /* update the first BD with the actual num BDs */
696 first_bd->data.nbds = nbd;
697
698 netdev_tx_sent_queue(netdev_txq, skb->len);
699
700 skb_tx_timestamp(skb);
701
702 /* Advance packet producer only before sending the packet since mapping
703 * of pages may fail.
704 */
705 txq->sw_tx_prod++;
706
707 /* 'next page' entries are counted in the producer value */
708 txq->tx_db.data.bd_prod =
709 cpu_to_le16(qed_chain_get_prod_idx(&txq->tx_pbl));
710
711 /* wmb makes sure that the BDs data is updated before updating the
712 * producer, otherwise FW may read old data from the BDs.
713 */
714 wmb();
715 barrier();
716 writel(txq->tx_db.raw, txq->doorbell_addr);
717
718 /* mmiowb is needed to synchronize doorbell writes from more than one
719 * processor. It guarantees that the write arrives to the device before
720 * the queue lock is released and another start_xmit is called (possibly
721 * on another CPU). Without this barrier, the next doorbell can bypass
722 * this doorbell. This is applicable to IA64/Altix systems.
723 */
724 mmiowb();
725
726 if (unlikely(qed_chain_get_elem_left(&txq->tx_pbl)
727 < (MAX_SKB_FRAGS + 1))) {
728 netif_tx_stop_queue(netdev_txq);
729 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
730 "Stop queue was called\n");
731 /* paired memory barrier is in qede_tx_int(), we have to keep
732 * ordering of set_bit() in netif_tx_stop_queue() and read of
733 * fp->bd_tx_cons
734 */
735 smp_mb();
736
737 if (qed_chain_get_elem_left(&txq->tx_pbl)
738 >= (MAX_SKB_FRAGS + 1) &&
739 (edev->state == QEDE_STATE_OPEN)) {
740 netif_tx_wake_queue(netdev_txq);
741 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
742 "Wake queue was called\n");
743 }
744 }
745
746 return NETDEV_TX_OK;
747}
748
16f46bf0 749int qede_txq_has_work(struct qede_tx_queue *txq)
2950219d
YM		 750{
751 u16 hw_bd_cons;
752
753 /* Tell compiler that consumer and producer can change */
754 barrier();
755 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
756 if (qed_chain_get_cons_idx(&txq->tx_pbl) == hw_bd_cons + 1)
757 return 0;
758
759 return hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl);
760}
761
762static int qede_tx_int(struct qede_dev *edev,
763 struct qede_tx_queue *txq)
764{
765 struct netdev_queue *netdev_txq;
766 u16 hw_bd_cons;
767 unsigned int pkts_compl = 0, bytes_compl = 0;
768 int rc;
769
770 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->index);
771
772 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
773 barrier();
774
775 while (hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl)) {
776 int len = 0;
777
778 rc = qede_free_tx_pkt(edev, txq, &len);
779 if (rc) {
780 DP_NOTICE(edev, "hw_bd_cons = %d, chain_cons=%d\n",
781 hw_bd_cons,
782 qed_chain_get_cons_idx(&txq->tx_pbl));
783 break;
784 }
785
786 bytes_compl += len;
787 pkts_compl++;
788 txq->sw_tx_cons++;
789 }
790
791 netdev_tx_completed_queue(netdev_txq, pkts_compl, bytes_compl);
792
793 /* Need to make the tx_bd_cons update visible to start_xmit()
794 * before checking for netif_tx_queue_stopped(). Without the
795 * memory barrier, there is a small possibility that
796 * start_xmit() will miss it and cause the queue to be stopped
797 * forever.
798 * On the other hand we need an rmb() here to ensure the proper
799 * ordering of bit testing in the following
800 * netif_tx_queue_stopped(txq) call.
801 */
802 smp_mb();
803
804 if (unlikely(netif_tx_queue_stopped(netdev_txq))) {
805 /* Taking tx_lock is needed to prevent reenabling the queue
806 * while it's empty. This could have happen if rx_action() gets
807 * suspended in qede_tx_int() after the condition before
808 * netif_tx_wake_queue(), while tx_action (qede_start_xmit()):
809 *
810 * stops the queue->sees fresh tx_bd_cons->releases the queue->
811 * sends some packets consuming the whole queue again->
812 * stops the queue
813 */
814
815 __netif_tx_lock(netdev_txq, smp_processor_id());
816
817 if ((netif_tx_queue_stopped(netdev_txq)) &&
818 (edev->state == QEDE_STATE_OPEN) &&
819 (qed_chain_get_elem_left(&txq->tx_pbl)
820 >= (MAX_SKB_FRAGS + 1))) {
821 netif_tx_wake_queue(netdev_txq);
822 DP_VERBOSE(edev, NETIF_MSG_TX_DONE,
823 "Wake queue was called\n");
824 }
825
826 __netif_tx_unlock(netdev_txq);
827 }
828
829 return 0;
830}
831
16f46bf0 832bool qede_has_rx_work(struct qede_rx_queue *rxq)
2950219d
YM		 833{
834 u16 hw_comp_cons, sw_comp_cons;
835
836 /* Tell compiler that status block fields can change */
837 barrier();
838
839 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
840 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
841
842 return hw_comp_cons != sw_comp_cons;
843}
844
845static bool qede_has_tx_work(struct qede_fastpath *fp)
846{
847 u8 tc;
848
849 for (tc = 0; tc < fp->edev->num_tc; tc++)
850 if (qede_txq_has_work(&fp->txqs[tc]))
851 return true;
852 return false;
853}
854
f86af2df
MC		 855static inline void qede_rx_bd_ring_consume(struct qede_rx_queue *rxq)
856{
857 qed_chain_consume(&rxq->rx_bd_ring);
858 rxq->sw_rx_cons++;
859}
860
fc48b7a6
YM		 861/* This function reuses the buffer(from an offset) from
862 * consumer index to producer index in the bd ring
2950219d 863 */
fc48b7a6
YM		 864static inline void qede_reuse_page(struct qede_dev *edev,
865 struct qede_rx_queue *rxq,
866 struct sw_rx_data *curr_cons)
2950219d 867{
2950219d 868 struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring);
fc48b7a6
YM		 869 struct sw_rx_data *curr_prod;
870 dma_addr_t new_mapping;
2950219d 871
fc48b7a6
YM		 872 curr_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
873 *curr_prod = *curr_cons;
2950219d 874
fc48b7a6
YM		 875 new_mapping = curr_prod->mapping + curr_prod->page_offset;
876
877 rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(new_mapping));
878 rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(new_mapping));
2950219d 879
2950219d 880 rxq->sw_rx_prod++;
fc48b7a6
YM		 881 curr_cons->data = NULL;
882}
883
f86af2df
MC		 884/* In case of allocation failures reuse buffers
885 * from consumer index to produce buffers for firmware
886 */
16f46bf0
SRK		 887void qede_recycle_rx_bd_ring(struct qede_rx_queue *rxq,
888 struct qede_dev *edev, u8 count)
f86af2df
MC		 889{
890 struct sw_rx_data *curr_cons;
891
892 for (; count > 0; count--) {
893 curr_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX];
894 qede_reuse_page(edev, rxq, curr_cons);
895 qede_rx_bd_ring_consume(rxq);
896 }
897}
898
fc48b7a6
YM		 899static inline int qede_realloc_rx_buffer(struct qede_dev *edev,
900 struct qede_rx_queue *rxq,
901 struct sw_rx_data *curr_cons)
902{
903 /* Move to the next segment in the page */
904 curr_cons->page_offset += rxq->rx_buf_seg_size;
905
906 if (curr_cons->page_offset == PAGE_SIZE) {
f86af2df
MC		 907 if (unlikely(qede_alloc_rx_buffer(edev, rxq))) {
908 /* Since we failed to allocate new buffer
909 * current buffer can be used again.
910 */
911 curr_cons->page_offset -= rxq->rx_buf_seg_size;
912
fc48b7a6 913 return -ENOMEM;
f86af2df 914 }
fc48b7a6
YM		 915
916 dma_unmap_page(&edev->pdev->dev, curr_cons->mapping,
917 PAGE_SIZE, DMA_FROM_DEVICE);
918 } else {
919 /* Increment refcount of the page as we don't want
920 * network stack to take the ownership of the page
921 * which can be recycled multiple times by the driver.
922 */
6d061f9f 923 page_ref_inc(curr_cons->data);
fc48b7a6
YM		 924 qede_reuse_page(edev, rxq, curr_cons);
925 }
926
927 return 0;
2950219d
YM		 928}
929
930static inline void qede_update_rx_prod(struct qede_dev *edev,
931 struct qede_rx_queue *rxq)
932{
933 u16 bd_prod = qed_chain_get_prod_idx(&rxq->rx_bd_ring);
934 u16 cqe_prod = qed_chain_get_prod_idx(&rxq->rx_comp_ring);
935 struct eth_rx_prod_data rx_prods = {0};
936
937 /* Update producers */
938 rx_prods.bd_prod = cpu_to_le16(bd_prod);
939 rx_prods.cqe_prod = cpu_to_le16(cqe_prod);
940
941 /* Make sure that the BD and SGE data is updated before updating the
942 * producers since FW might read the BD/SGE right after the producer
943 * is updated.
944 */
945 wmb();
946
947 internal_ram_wr(rxq->hw_rxq_prod_addr, sizeof(rx_prods),
948 (u32 *)&rx_prods);
949
950 /* mmiowb is needed to synchronize doorbell writes from more than one
951 * processor. It guarantees that the write arrives to the device before
952 * the napi lock is released and another qede_poll is called (possibly
953 * on another CPU). Without this barrier, the next doorbell can bypass
954 * this doorbell. This is applicable to IA64/Altix systems.
955 */
956 mmiowb();
957}
958
959static u32 qede_get_rxhash(struct qede_dev *edev,
960 u8 bitfields,
961 __le32 rss_hash,
962 enum pkt_hash_types *rxhash_type)
963{
964 enum rss_hash_type htype;
965
966 htype = GET_FIELD(bitfields, ETH_FAST_PATH_RX_REG_CQE_RSS_HASH_TYPE);
967
968 if ((edev->ndev->features & NETIF_F_RXHASH) && htype) {
969 *rxhash_type = ((htype == RSS_HASH_TYPE_IPV4) ||
970 (htype == RSS_HASH_TYPE_IPV6)) ?
971 PKT_HASH_TYPE_L3 : PKT_HASH_TYPE_L4;
972 return le32_to_cpu(rss_hash);
973 }
974 *rxhash_type = PKT_HASH_TYPE_NONE;
975 return 0;
976}
977
978static void qede_set_skb_csum(struct sk_buff *skb, u8 csum_flag)
979{
980 skb_checksum_none_assert(skb);
981
982 if (csum_flag & QEDE_CSUM_UNNECESSARY)
983 skb->ip_summed = CHECKSUM_UNNECESSARY;
14db81de
MC		 984
985 if (csum_flag & QEDE_TUNN_CSUM_UNNECESSARY)
986 skb->csum_level = 1;
2950219d
YM		 987}
988
989static inline void qede_skb_receive(struct qede_dev *edev,
990 struct qede_fastpath *fp,
991 struct sk_buff *skb,
992 u16 vlan_tag)
993{
994 if (vlan_tag)
995 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
996 vlan_tag);
997
998 napi_gro_receive(&fp->napi, skb);
999}
1000
55482edc
MC		 1001static void qede_set_gro_params(struct qede_dev *edev,
1002 struct sk_buff *skb,
1003 struct eth_fast_path_rx_tpa_start_cqe *cqe)
1004{
1005 u16 parsing_flags = le16_to_cpu(cqe->pars_flags.flags);
1006
1007 if (((parsing_flags >> PARSING_AND_ERR_FLAGS_L3TYPE_SHIFT) &
1008 PARSING_AND_ERR_FLAGS_L3TYPE_MASK) == 2)
1009 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV6;
1010 else
1011 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
1012
1013 skb_shinfo(skb)->gso_size = __le16_to_cpu(cqe->len_on_first_bd) -
1014 cqe->header_len;
1015}
1016
1017static int qede_fill_frag_skb(struct qede_dev *edev,
1018 struct qede_rx_queue *rxq,
1019 u8 tpa_agg_index,
1020 u16 len_on_bd)
1021{
1022 struct sw_rx_data *current_bd = &rxq->sw_rx_ring[rxq->sw_rx_cons &
1023 NUM_RX_BDS_MAX];
1024 struct qede_agg_info *tpa_info = &rxq->tpa_info[tpa_agg_index];
1025 struct sk_buff *skb = tpa_info->skb;
1026
1027 if (unlikely(tpa_info->agg_state != QEDE_AGG_STATE_START))
1028 goto out;
1029
1030 /* Add one frag and update the appropriate fields in the skb */
1031 skb_fill_page_desc(skb, tpa_info->frag_id++,
1032 current_bd->data, current_bd->page_offset,
1033 len_on_bd);
1034
1035 if (unlikely(qede_realloc_rx_buffer(edev, rxq, current_bd))) {
f86af2df
MC		 1036 /* Incr page ref count to reuse on allocation failure
1037 * so that it doesn't get freed while freeing SKB.
1038 */
0139aa7b 1039 page_ref_inc(current_bd->data);
55482edc
MC		 1040 goto out;
1041 }
1042
1043 qed_chain_consume(&rxq->rx_bd_ring);
1044 rxq->sw_rx_cons++;
1045
1046 skb->data_len += len_on_bd;
1047 skb->truesize += rxq->rx_buf_seg_size;
1048 skb->len += len_on_bd;
1049
1050 return 0;
1051
1052out:
f86af2df
MC		 1053 tpa_info->agg_state = QEDE_AGG_STATE_ERROR;
1054 qede_recycle_rx_bd_ring(rxq, edev, 1);
55482edc
MC		 1055 return -ENOMEM;
1056}
1057
1058static void qede_tpa_start(struct qede_dev *edev,
1059 struct qede_rx_queue *rxq,
1060 struct eth_fast_path_rx_tpa_start_cqe *cqe)
1061{
1062 struct qede_agg_info *tpa_info = &rxq->tpa_info[cqe->tpa_agg_index];
1063 struct eth_rx_bd *rx_bd_cons = qed_chain_consume(&rxq->rx_bd_ring);
1064 struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring);
1065 struct sw_rx_data *replace_buf = &tpa_info->replace_buf;
1066 dma_addr_t mapping = tpa_info->replace_buf_mapping;
1067 struct sw_rx_data *sw_rx_data_cons;
1068 struct sw_rx_data *sw_rx_data_prod;
1069 enum pkt_hash_types rxhash_type;
1070 u32 rxhash;
1071
1072 sw_rx_data_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX];
1073 sw_rx_data_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
1074
1075 /* Use pre-allocated replacement buffer - we can't release the agg.
1076 * start until its over and we don't want to risk allocation failing
1077 * here, so re-allocate when aggregation will be over.
1078 */
09ec8e7f 1079 sw_rx_data_prod->mapping = replace_buf->mapping;
55482edc
MC		 1080
1081 sw_rx_data_prod->data = replace_buf->data;
1082 rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(mapping));
1083 rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(mapping));
1084 sw_rx_data_prod->page_offset = replace_buf->page_offset;
1085
1086 rxq->sw_rx_prod++;
1087
1088 /* move partial skb from cons to pool (don't unmap yet)
1089 * save mapping, incase we drop the packet later on.
1090 */
1091 tpa_info->start_buf = *sw_rx_data_cons;
1092 mapping = HILO_U64(le32_to_cpu(rx_bd_cons->addr.hi),
1093 le32_to_cpu(rx_bd_cons->addr.lo));
1094
1095 tpa_info->start_buf_mapping = mapping;
1096 rxq->sw_rx_cons++;
1097
1098 /* set tpa state to start only if we are able to allocate skb
1099 * for this aggregation, otherwise mark as error and aggregation will
1100 * be dropped
1101 */
1102 tpa_info->skb = netdev_alloc_skb(edev->ndev,
1103 le16_to_cpu(cqe->len_on_first_bd));
1104 if (unlikely(!tpa_info->skb)) {
f86af2df 1105 DP_NOTICE(edev, "Failed to allocate SKB for gro\n");
55482edc 1106 tpa_info->agg_state = QEDE_AGG_STATE_ERROR;
f86af2df 1107 goto cons_buf;
55482edc
MC		 1108 }
1109
1110 skb_put(tpa_info->skb, le16_to_cpu(cqe->len_on_first_bd));
1111 memcpy(&tpa_info->start_cqe, cqe, sizeof(tpa_info->start_cqe));
1112
1113 /* Start filling in the aggregation info */
1114 tpa_info->frag_id = 0;
1115 tpa_info->agg_state = QEDE_AGG_STATE_START;
1116
1117 rxhash = qede_get_rxhash(edev, cqe->bitfields,
1118 cqe->rss_hash, &rxhash_type);
1119 skb_set_hash(tpa_info->skb, rxhash, rxhash_type);
1120 if ((le16_to_cpu(cqe->pars_flags.flags) >>
1121 PARSING_AND_ERR_FLAGS_TAG8021QEXIST_SHIFT) &
1122 PARSING_AND_ERR_FLAGS_TAG8021QEXIST_MASK)
1123 tpa_info->vlan_tag = le16_to_cpu(cqe->vlan_tag);
1124 else
1125 tpa_info->vlan_tag = 0;
1126
1127 /* This is needed in order to enable forwarding support */
1128 qede_set_gro_params(edev, tpa_info->skb, cqe);
1129
f86af2df 1130cons_buf: /* We still need to handle bd_len_list to consume buffers */
55482edc
MC		 1131 if (likely(cqe->ext_bd_len_list[0]))
1132 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
1133 le16_to_cpu(cqe->ext_bd_len_list[0]));
1134
1135 if (unlikely(cqe->ext_bd_len_list[1])) {
1136 DP_ERR(edev,
1137 "Unlikely - got a TPA aggregation with more than one ext_bd_len_list entry in the TPA start\n");
1138 tpa_info->agg_state = QEDE_AGG_STATE_ERROR;
1139 }
1140}
1141
88f09bd5 1142#ifdef CONFIG_INET
55482edc
MC		 1143static void qede_gro_ip_csum(struct sk_buff *skb)
1144{
1145 const struct iphdr *iph = ip_hdr(skb);
1146 struct tcphdr *th;
1147
55482edc
MC		 1148 skb_set_transport_header(skb, sizeof(struct iphdr));
1149 th = tcp_hdr(skb);
1150
1151 th->check = ~tcp_v4_check(skb->len - skb_transport_offset(skb),
1152 iph->saddr, iph->daddr, 0);
1153
1154 tcp_gro_complete(skb);
1155}
1156
1157static void qede_gro_ipv6_csum(struct sk_buff *skb)
1158{
1159 struct ipv6hdr *iph = ipv6_hdr(skb);
1160 struct tcphdr *th;
1161
55482edc
MC		 1162 skb_set_transport_header(skb, sizeof(struct ipv6hdr));
1163 th = tcp_hdr(skb);
1164
1165 th->check = ~tcp_v6_check(skb->len - skb_transport_offset(skb),
1166 &iph->saddr, &iph->daddr, 0);
1167 tcp_gro_complete(skb);
1168}
88f09bd5 1169#endif
55482edc
MC		 1170
1171static void qede_gro_receive(struct qede_dev *edev,
1172 struct qede_fastpath *fp,
1173 struct sk_buff *skb,
1174 u16 vlan_tag)
1175{
ee2fa8e6
MC		 1176 /* FW can send a single MTU sized packet from gro flow
1177 * due to aggregation timeout/last segment etc. which
1178 * is not expected to be a gro packet. If a skb has zero
1179 * frags then simply push it in the stack as non gso skb.
1180 */
1181 if (unlikely(!skb->data_len)) {
1182 skb_shinfo(skb)->gso_type = 0;
1183 skb_shinfo(skb)->gso_size = 0;
1184 goto send_skb;
1185 }
1186
88f09bd5 1187#ifdef CONFIG_INET
55482edc 1188 if (skb_shinfo(skb)->gso_size) {
aad94c04
MC		 1189 skb_set_network_header(skb, 0);
1190
55482edc
MC		 1191 switch (skb->protocol) {
1192 case htons(ETH_P_IP):
1193 qede_gro_ip_csum(skb);
1194 break;
1195 case htons(ETH_P_IPV6):
1196 qede_gro_ipv6_csum(skb);
1197 break;
1198 default:
1199 DP_ERR(edev,
1200 "Error: FW GRO supports only IPv4/IPv6, not 0x%04x\n",
1201 ntohs(skb->protocol));
1202 }
1203 }
88f09bd5 1204#endif
ee2fa8e6
MC		 1205
1206send_skb:
55482edc
MC		 1207 skb_record_rx_queue(skb, fp->rss_id);
1208 qede_skb_receive(edev, fp, skb, vlan_tag);
1209}
1210
1211static inline void qede_tpa_cont(struct qede_dev *edev,
1212 struct qede_rx_queue *rxq,
1213 struct eth_fast_path_rx_tpa_cont_cqe *cqe)
1214{
1215 int i;
1216
1217 for (i = 0; cqe->len_list[i]; i++)
1218 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
1219 le16_to_cpu(cqe->len_list[i]));
1220
1221 if (unlikely(i > 1))
1222 DP_ERR(edev,
1223 "Strange - TPA cont with more than a single len_list entry\n");
1224}
1225
1226static void qede_tpa_end(struct qede_dev *edev,
1227 struct qede_fastpath *fp,
1228 struct eth_fast_path_rx_tpa_end_cqe *cqe)
1229{
1230 struct qede_rx_queue *rxq = fp->rxq;
1231 struct qede_agg_info *tpa_info;
1232 struct sk_buff *skb;
1233 int i;
1234
1235 tpa_info = &rxq->tpa_info[cqe->tpa_agg_index];
1236 skb = tpa_info->skb;
1237
1238 for (i = 0; cqe->len_list[i]; i++)
1239 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
1240 le16_to_cpu(cqe->len_list[i]));
1241 if (unlikely(i > 1))
1242 DP_ERR(edev,
1243 "Strange - TPA emd with more than a single len_list entry\n");
1244
1245 if (unlikely(tpa_info->agg_state != QEDE_AGG_STATE_START))
1246 goto err;
1247
1248 /* Sanity */
1249 if (unlikely(cqe->num_of_bds != tpa_info->frag_id + 1))
1250 DP_ERR(edev,
1251 "Strange - TPA had %02x BDs, but SKB has only %d frags\n",
1252 cqe->num_of_bds, tpa_info->frag_id);
1253 if (unlikely(skb->len != le16_to_cpu(cqe->total_packet_len)))
1254 DP_ERR(edev,
1255 "Strange - total packet len [cqe] is %4x but SKB has len %04x\n",
1256 le16_to_cpu(cqe->total_packet_len), skb->len);
1257
1258 memcpy(skb->data,
1259 page_address(tpa_info->start_buf.data) +
1260 tpa_info->start_cqe.placement_offset +
1261 tpa_info->start_buf.page_offset,
1262 le16_to_cpu(tpa_info->start_cqe.len_on_first_bd));
1263
1264 /* Recycle [mapped] start buffer for the next replacement */
1265 tpa_info->replace_buf = tpa_info->start_buf;
1266 tpa_info->replace_buf_mapping = tpa_info->start_buf_mapping;
1267
1268 /* Finalize the SKB */
1269 skb->protocol = eth_type_trans(skb, edev->ndev);
1270 skb->ip_summed = CHECKSUM_UNNECESSARY;
1271
1272 /* tcp_gro_complete() will copy NAPI_GRO_CB(skb)->count
1273 * to skb_shinfo(skb)->gso_segs
1274 */
1275 NAPI_GRO_CB(skb)->count = le16_to_cpu(cqe->num_of_coalesced_segs);
1276
1277 qede_gro_receive(edev, fp, skb, tpa_info->vlan_tag);
1278
1279 tpa_info->agg_state = QEDE_AGG_STATE_NONE;
1280
1281 return;
1282err:
1283 /* The BD starting the aggregation is still mapped; Re-use it for
1284 * future aggregations [as replacement buffer]
1285 */
1286 memcpy(&tpa_info->replace_buf, &tpa_info->start_buf,
1287 sizeof(struct sw_rx_data));
1288 tpa_info->replace_buf_mapping = tpa_info->start_buf_mapping;
1289 tpa_info->start_buf.data = NULL;
1290 tpa_info->agg_state = QEDE_AGG_STATE_NONE;
1291 dev_kfree_skb_any(tpa_info->skb);
1292 tpa_info->skb = NULL;
1293}
1294
14db81de
MC		 1295static bool qede_tunn_exist(u16 flag)
1296{
1297 return !!(flag & (PARSING_AND_ERR_FLAGS_TUNNELEXIST_MASK <<
1298 PARSING_AND_ERR_FLAGS_TUNNELEXIST_SHIFT));
1299}
1300
1301static u8 qede_check_tunn_csum(u16 flag)
1302{
1303 u16 csum_flag = 0;
1304 u8 tcsum = 0;
1305
1306 if (flag & (PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_MASK <<
1307 PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_SHIFT))
1308 csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_MASK <<
1309 PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_SHIFT;
1310
1311 if (flag & (PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
1312 PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT)) {
1313 csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
1314 PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
1315 tcsum = QEDE_TUNN_CSUM_UNNECESSARY;
1316 }
1317
1318 csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_MASK <<
1319 PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_SHIFT |
1320 PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
1321 PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
1322
1323 if (csum_flag & flag)
1324 return QEDE_CSUM_ERROR;
1325
1326 return QEDE_CSUM_UNNECESSARY | tcsum;
1327}
1328
1329static u8 qede_check_notunn_csum(u16 flag)
2950219d
YM		 1330{
1331 u16 csum_flag = 0;
1332 u8 csum = 0;
1333
14db81de
MC		 1334 if (flag & (PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
1335 PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT)) {
2950219d
YM		 1336 csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
1337 PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
1338 csum = QEDE_CSUM_UNNECESSARY;
1339 }
1340
1341 csum_flag |= PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
1342 PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
1343
1344 if (csum_flag & flag)
1345 return QEDE_CSUM_ERROR;
1346
1347 return csum;
1348}
1349
14db81de
MC		 1350static u8 qede_check_csum(u16 flag)
1351{
1352 if (!qede_tunn_exist(flag))
1353 return qede_check_notunn_csum(flag);
1354 else
1355 return qede_check_tunn_csum(flag);
1356}
1357
2950219d
YM		 1358static int qede_rx_int(struct qede_fastpath *fp, int budget)
1359{
1360 struct qede_dev *edev = fp->edev;
1361 struct qede_rx_queue *rxq = fp->rxq;
1362
1363 u16 hw_comp_cons, sw_comp_cons, sw_rx_index, parse_flag;
1364 int rx_pkt = 0;
1365 u8 csum_flag;
1366
1367 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
1368 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
1369
1370 /* Memory barrier to prevent the CPU from doing speculative reads of CQE
1371 * / BD in the while-loop before reading hw_comp_cons. If the CQE is
1372 * read before it is written by FW, then FW writes CQE and SB, and then
1373 * the CPU reads the hw_comp_cons, it will use an old CQE.
1374 */
1375 rmb();
1376
1377 /* Loop to complete all indicated BDs */
1378 while (sw_comp_cons != hw_comp_cons) {
1379 struct eth_fast_path_rx_reg_cqe *fp_cqe;
1380 enum pkt_hash_types rxhash_type;
1381 enum eth_rx_cqe_type cqe_type;
1382 struct sw_rx_data *sw_rx_data;
1383 union eth_rx_cqe *cqe;
1384 struct sk_buff *skb;
fc48b7a6
YM		 1385 struct page *data;
1386 __le16 flags;
2950219d
YM		 1387 u16 len, pad;
1388 u32 rx_hash;
2950219d
YM		 1389
1390 /* Get the CQE from the completion ring */
1391 cqe = (union eth_rx_cqe *)
1392 qed_chain_consume(&rxq->rx_comp_ring);
1393 cqe_type = cqe->fast_path_regular.type;
1394
1395 if (unlikely(cqe_type == ETH_RX_CQE_TYPE_SLOW_PATH)) {
1396 edev->ops->eth_cqe_completion(
1397 edev->cdev, fp->rss_id,
1398 (struct eth_slow_path_rx_cqe *)cqe);
1399 goto next_cqe;
1400 }
1401
55482edc
MC		 1402 if (cqe_type != ETH_RX_CQE_TYPE_REGULAR) {
1403 switch (cqe_type) {
1404 case ETH_RX_CQE_TYPE_TPA_START:
1405 qede_tpa_start(edev, rxq,
1406 &cqe->fast_path_tpa_start);
1407 goto next_cqe;
1408 case ETH_RX_CQE_TYPE_TPA_CONT:
1409 qede_tpa_cont(edev, rxq,
1410 &cqe->fast_path_tpa_cont);
1411 goto next_cqe;
1412 case ETH_RX_CQE_TYPE_TPA_END:
1413 qede_tpa_end(edev, fp,
1414 &cqe->fast_path_tpa_end);
1415 goto next_rx_only;
1416 default:
1417 break;
1418 }
1419 }
1420
2950219d
YM		 1421 /* Get the data from the SW ring */
1422 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
1423 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index];
1424 data = sw_rx_data->data;
1425
1426 fp_cqe = &cqe->fast_path_regular;
fc48b7a6 1427 len = le16_to_cpu(fp_cqe->len_on_first_bd);
2950219d 1428 pad = fp_cqe->placement_offset;
fc48b7a6 1429 flags = cqe->fast_path_regular.pars_flags.flags;
2950219d 1430
fc48b7a6
YM		 1431 /* If this is an error packet then drop it */
1432 parse_flag = le16_to_cpu(flags);
2950219d 1433
fc48b7a6
YM		 1434 csum_flag = qede_check_csum(parse_flag);
1435 if (unlikely(csum_flag == QEDE_CSUM_ERROR)) {
1436 DP_NOTICE(edev,
1437 "CQE in CONS = %u has error, flags = %x, dropping incoming packet\n",
1438 sw_comp_cons, parse_flag);
1439 rxq->rx_hw_errors++;
f86af2df
MC		 1440 qede_recycle_rx_bd_ring(rxq, edev, fp_cqe->bd_num);
1441 goto next_cqe;
fc48b7a6 1442 }
2950219d 1443
fc48b7a6
YM		 1444 skb = netdev_alloc_skb(edev->ndev, QEDE_RX_HDR_SIZE);
1445 if (unlikely(!skb)) {
2950219d 1446 DP_NOTICE(edev,
fc48b7a6 1447 "Build_skb failed, dropping incoming packet\n");
f86af2df 1448 qede_recycle_rx_bd_ring(rxq, edev, fp_cqe->bd_num);
2950219d 1449 rxq->rx_alloc_errors++;
f86af2df 1450 goto next_cqe;
fc48b7a6
YM		 1451 }
1452
1453 /* Copy data into SKB */
1454 if (len + pad <= QEDE_RX_HDR_SIZE) {
1455 memcpy(skb_put(skb, len),
1456 page_address(data) + pad +
1457 sw_rx_data->page_offset, len);
1458 qede_reuse_page(edev, rxq, sw_rx_data);
1459 } else {
1460 struct skb_frag_struct *frag;
1461 unsigned int pull_len;
1462 unsigned char *va;
1463
1464 frag = &skb_shinfo(skb)->frags[0];
1465
1466 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, data,
1467 pad + sw_rx_data->page_offset,
1468 len, rxq->rx_buf_seg_size);
1469
1470 va = skb_frag_address(frag);
1471 pull_len = eth_get_headlen(va, QEDE_RX_HDR_SIZE);
1472
1473 /* Align the pull_len to optimize memcpy */
1474 memcpy(skb->data, va, ALIGN(pull_len, sizeof(long)));
1475
1476 skb_frag_size_sub(frag, pull_len);
1477 frag->page_offset += pull_len;
1478 skb->data_len -= pull_len;
1479 skb->tail += pull_len;
1480
1481 if (unlikely(qede_realloc_rx_buffer(edev, rxq,
1482 sw_rx_data))) {
1483 DP_ERR(edev, "Failed to allocate rx buffer\n");
f86af2df
MC		 1484 /* Incr page ref count to reuse on allocation
1485 * failure so that it doesn't get freed while
1486 * freeing SKB.
1487 */
1488
0139aa7b 1489 page_ref_inc(sw_rx_data->data);
fc48b7a6 1490 rxq->rx_alloc_errors++;
f86af2df
MC		 1491 qede_recycle_rx_bd_ring(rxq, edev,
1492 fp_cqe->bd_num);
1493 dev_kfree_skb_any(skb);
fc48b7a6
YM		 1494 goto next_cqe;
1495 }
2950219d
YM		 1496 }
1497
f86af2df
MC		 1498 qede_rx_bd_ring_consume(rxq);
1499
fc48b7a6
YM		 1500 if (fp_cqe->bd_num != 1) {
1501 u16 pkt_len = le16_to_cpu(fp_cqe->pkt_len);
1502 u8 num_frags;
1503
1504 pkt_len -= len;
1505
1506 for (num_frags = fp_cqe->bd_num - 1; num_frags > 0;
1507 num_frags--) {
1508 u16 cur_size = pkt_len > rxq->rx_buf_size ?
1509 rxq->rx_buf_size : pkt_len;
f86af2df
MC		 1510 if (unlikely(!cur_size)) {
1511 DP_ERR(edev,
1512 "Still got %d BDs for mapping jumbo, but length became 0\n",
1513 num_frags);
1514 qede_recycle_rx_bd_ring(rxq, edev,
1515 num_frags);
1516 dev_kfree_skb_any(skb);
1517 goto next_cqe;
1518 }
fc48b7a6 1519
f86af2df
MC		 1520 if (unlikely(qede_alloc_rx_buffer(edev, rxq))) {
1521 qede_recycle_rx_bd_ring(rxq, edev,
1522 num_frags);
1523 dev_kfree_skb_any(skb);
fc48b7a6 1524 goto next_cqe;
f86af2df 1525 }
fc48b7a6 1526
fc48b7a6
YM		 1527 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
1528 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index];
f86af2df
MC		 1529 qede_rx_bd_ring_consume(rxq);
1530
fc48b7a6
YM		 1531 dma_unmap_page(&edev->pdev->dev,
1532 sw_rx_data->mapping,
1533 PAGE_SIZE, DMA_FROM_DEVICE);
1534
1535 skb_fill_page_desc(skb,
1536 skb_shinfo(skb)->nr_frags++,
1537 sw_rx_data->data, 0,
1538 cur_size);
1539
1540 skb->truesize += PAGE_SIZE;
1541 skb->data_len += cur_size;
1542 skb->len += cur_size;
1543 pkt_len -= cur_size;
1544 }
2950219d 1545
f86af2df 1546 if (unlikely(pkt_len))
fc48b7a6
YM		 1547 DP_ERR(edev,
1548 "Mapped all BDs of jumbo, but still have %d bytes\n",
1549 pkt_len);
1550 }
2950219d
YM		 1551
1552 skb->protocol = eth_type_trans(skb, edev->ndev);
1553
1554 rx_hash = qede_get_rxhash(edev, fp_cqe->bitfields,
1555 fp_cqe->rss_hash,
1556 &rxhash_type);
1557
1558 skb_set_hash(skb, rx_hash, rxhash_type);
1559
1560 qede_set_skb_csum(skb, csum_flag);
1561
1562 skb_record_rx_queue(skb, fp->rss_id);
1563
1564 qede_skb_receive(edev, fp, skb, le16_to_cpu(fp_cqe->vlan_tag));
55482edc 1565next_rx_only:
2950219d
YM		 1566 rx_pkt++;
1567
1568next_cqe: /* don't consume bd rx buffer */
1569 qed_chain_recycle_consumed(&rxq->rx_comp_ring);
1570 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
1571 /* CR TPA - revisit how to handle budget in TPA perhaps
1572 * increase on "end"
1573 */
1574 if (rx_pkt == budget)
1575 break;
1576 } /* repeat while sw_comp_cons != hw_comp_cons... */
1577
1578 /* Update producers */
1579 qede_update_rx_prod(edev, rxq);
1580
1581 return rx_pkt;
1582}
1583
1584static int qede_poll(struct napi_struct *napi, int budget)
1585{
1586 int work_done = 0;
1587 struct qede_fastpath *fp = container_of(napi, struct qede_fastpath,
1588 napi);
1589 struct qede_dev *edev = fp->edev;
1590
1591 while (1) {
1592 u8 tc;
1593
1594 for (tc = 0; tc < edev->num_tc; tc++)
1595 if (qede_txq_has_work(&fp->txqs[tc]))
1596 qede_tx_int(edev, &fp->txqs[tc]);
1597
1598 if (qede_has_rx_work(fp->rxq)) {
1599 work_done += qede_rx_int(fp, budget - work_done);
1600
1601 /* must not complete if we consumed full budget */
1602 if (work_done >= budget)
1603 break;
1604 }
1605
1606 /* Fall out from the NAPI loop if needed */
1607 if (!(qede_has_rx_work(fp->rxq) || qede_has_tx_work(fp))) {
1608 qed_sb_update_sb_idx(fp->sb_info);
1609 /* *_has_*_work() reads the status block,
1610 * thus we need to ensure that status block indices
1611 * have been actually read (qed_sb_update_sb_idx)
1612 * prior to this check (*_has_*_work) so that
1613 * we won't write the "newer" value of the status block
1614 * to HW (if there was a DMA right after
1615 * qede_has_rx_work and if there is no rmb, the memory
1616 * reading (qed_sb_update_sb_idx) may be postponed
1617 * to right before *_ack_sb). In this case there
1618 * will never be another interrupt until there is
1619 * another update of the status block, while there
1620 * is still unhandled work.
1621 */
1622 rmb();
1623
1624 if (!(qede_has_rx_work(fp->rxq) ||
1625 qede_has_tx_work(fp))) {
1626 napi_complete(napi);
1627 /* Update and reenable interrupts */
1628 qed_sb_ack(fp->sb_info, IGU_INT_ENABLE,
1629 1 /*update*/);
1630 break;
1631 }
1632 }
1633 }
1634
1635 return work_done;
1636}
1637
1638static irqreturn_t qede_msix_fp_int(int irq, void *fp_cookie)
1639{
1640 struct qede_fastpath *fp = fp_cookie;
1641
1642 qed_sb_ack(fp->sb_info, IGU_INT_DISABLE, 0 /*do not update*/);
1643
1644 napi_schedule_irqoff(&fp->napi);
1645 return IRQ_HANDLED;
1646}
1647
1648/* -------------------------------------------------------------------------
1649 * END OF FAST-PATH
1650 * -------------------------------------------------------------------------
1651 */
1652
1653static int qede_open(struct net_device *ndev);
1654static int qede_close(struct net_device *ndev);
0d8e0aa0
SK		 1655static int qede_set_mac_addr(struct net_device *ndev, void *p);
1656static void qede_set_rx_mode(struct net_device *ndev);
1657static void qede_config_rx_mode(struct net_device *ndev);
1658
1659static int qede_set_ucast_rx_mac(struct qede_dev *edev,
1660 enum qed_filter_xcast_params_type opcode,
1661 unsigned char mac[ETH_ALEN])
1662{
1663 struct qed_filter_params filter_cmd;
1664
1665 memset(&filter_cmd, 0, sizeof(filter_cmd));
1666 filter_cmd.type = QED_FILTER_TYPE_UCAST;
1667 filter_cmd.filter.ucast.type = opcode;
1668 filter_cmd.filter.ucast.mac_valid = 1;
1669 ether_addr_copy(filter_cmd.filter.ucast.mac, mac);
1670
1671 return edev->ops->filter_config(edev->cdev, &filter_cmd);
1672}
1673
7c1bfcad
SRK		 1674static int qede_set_ucast_rx_vlan(struct qede_dev *edev,
1675 enum qed_filter_xcast_params_type opcode,
1676 u16 vid)
1677{
1678 struct qed_filter_params filter_cmd;
1679
1680 memset(&filter_cmd, 0, sizeof(filter_cmd));
1681 filter_cmd.type = QED_FILTER_TYPE_UCAST;
1682 filter_cmd.filter.ucast.type = opcode;
1683 filter_cmd.filter.ucast.vlan_valid = 1;
1684 filter_cmd.filter.ucast.vlan = vid;
1685
1686 return edev->ops->filter_config(edev->cdev, &filter_cmd);
1687}
1688
133fac0e
SK		 1689void qede_fill_by_demand_stats(struct qede_dev *edev)
1690{
1691 struct qed_eth_stats stats;
1692
1693 edev->ops->get_vport_stats(edev->cdev, &stats);
1694 edev->stats.no_buff_discards = stats.no_buff_discards;
1695 edev->stats.rx_ucast_bytes = stats.rx_ucast_bytes;
1696 edev->stats.rx_mcast_bytes = stats.rx_mcast_bytes;
1697 edev->stats.rx_bcast_bytes = stats.rx_bcast_bytes;
1698 edev->stats.rx_ucast_pkts = stats.rx_ucast_pkts;
1699 edev->stats.rx_mcast_pkts = stats.rx_mcast_pkts;
1700 edev->stats.rx_bcast_pkts = stats.rx_bcast_pkts;
1701 edev->stats.mftag_filter_discards = stats.mftag_filter_discards;
1702 edev->stats.mac_filter_discards = stats.mac_filter_discards;
1703
1704 edev->stats.tx_ucast_bytes = stats.tx_ucast_bytes;
1705 edev->stats.tx_mcast_bytes = stats.tx_mcast_bytes;
1706 edev->stats.tx_bcast_bytes = stats.tx_bcast_bytes;
1707 edev->stats.tx_ucast_pkts = stats.tx_ucast_pkts;
1708 edev->stats.tx_mcast_pkts = stats.tx_mcast_pkts;
1709 edev->stats.tx_bcast_pkts = stats.tx_bcast_pkts;
1710 edev->stats.tx_err_drop_pkts = stats.tx_err_drop_pkts;
1711 edev->stats.coalesced_pkts = stats.tpa_coalesced_pkts;
1712 edev->stats.coalesced_events = stats.tpa_coalesced_events;
1713 edev->stats.coalesced_aborts_num = stats.tpa_aborts_num;
1714 edev->stats.non_coalesced_pkts = stats.tpa_not_coalesced_pkts;
1715 edev->stats.coalesced_bytes = stats.tpa_coalesced_bytes;
1716
1717 edev->stats.rx_64_byte_packets = stats.rx_64_byte_packets;
d4967cf3
YM		 1718 edev->stats.rx_65_to_127_byte_packets = stats.rx_65_to_127_byte_packets;
1719 edev->stats.rx_128_to_255_byte_packets =
1720 stats.rx_128_to_255_byte_packets;
1721 edev->stats.rx_256_to_511_byte_packets =
1722 stats.rx_256_to_511_byte_packets;
1723 edev->stats.rx_512_to_1023_byte_packets =
1724 stats.rx_512_to_1023_byte_packets;
1725 edev->stats.rx_1024_to_1518_byte_packets =
1726 stats.rx_1024_to_1518_byte_packets;
1727 edev->stats.rx_1519_to_1522_byte_packets =
1728 stats.rx_1519_to_1522_byte_packets;
1729 edev->stats.rx_1519_to_2047_byte_packets =
1730 stats.rx_1519_to_2047_byte_packets;
1731 edev->stats.rx_2048_to_4095_byte_packets =
1732 stats.rx_2048_to_4095_byte_packets;
1733 edev->stats.rx_4096_to_9216_byte_packets =
1734 stats.rx_4096_to_9216_byte_packets;
1735 edev->stats.rx_9217_to_16383_byte_packets =
1736 stats.rx_9217_to_16383_byte_packets;
133fac0e
SK		 1737 edev->stats.rx_crc_errors = stats.rx_crc_errors;
1738 edev->stats.rx_mac_crtl_frames = stats.rx_mac_crtl_frames;
1739 edev->stats.rx_pause_frames = stats.rx_pause_frames;
1740 edev->stats.rx_pfc_frames = stats.rx_pfc_frames;
1741 edev->stats.rx_align_errors = stats.rx_align_errors;
1742 edev->stats.rx_carrier_errors = stats.rx_carrier_errors;
1743 edev->stats.rx_oversize_packets = stats.rx_oversize_packets;
1744 edev->stats.rx_jabbers = stats.rx_jabbers;
1745 edev->stats.rx_undersize_packets = stats.rx_undersize_packets;
1746 edev->stats.rx_fragments = stats.rx_fragments;
1747 edev->stats.tx_64_byte_packets = stats.tx_64_byte_packets;
1748 edev->stats.tx_65_to_127_byte_packets = stats.tx_65_to_127_byte_packets;
1749 edev->stats.tx_128_to_255_byte_packets =
1750 stats.tx_128_to_255_byte_packets;
1751 edev->stats.tx_256_to_511_byte_packets =
1752 stats.tx_256_to_511_byte_packets;
1753 edev->stats.tx_512_to_1023_byte_packets =
1754 stats.tx_512_to_1023_byte_packets;
1755 edev->stats.tx_1024_to_1518_byte_packets =
1756 stats.tx_1024_to_1518_byte_packets;
1757 edev->stats.tx_1519_to_2047_byte_packets =
1758 stats.tx_1519_to_2047_byte_packets;
1759 edev->stats.tx_2048_to_4095_byte_packets =
1760 stats.tx_2048_to_4095_byte_packets;
1761 edev->stats.tx_4096_to_9216_byte_packets =
1762 stats.tx_4096_to_9216_byte_packets;
1763 edev->stats.tx_9217_to_16383_byte_packets =
1764 stats.tx_9217_to_16383_byte_packets;
1765 edev->stats.tx_pause_frames = stats.tx_pause_frames;
1766 edev->stats.tx_pfc_frames = stats.tx_pfc_frames;
1767 edev->stats.tx_lpi_entry_count = stats.tx_lpi_entry_count;
1768 edev->stats.tx_total_collisions = stats.tx_total_collisions;
1769 edev->stats.brb_truncates = stats.brb_truncates;
1770 edev->stats.brb_discards = stats.brb_discards;
1771 edev->stats.tx_mac_ctrl_frames = stats.tx_mac_ctrl_frames;
1772}
1773
1774static struct rtnl_link_stats64 *qede_get_stats64(
1775 struct net_device *dev,
1776 struct rtnl_link_stats64 *stats)
1777{
1778 struct qede_dev *edev = netdev_priv(dev);
1779
1780 qede_fill_by_demand_stats(edev);
1781
1782 stats->rx_packets = edev->stats.rx_ucast_pkts +
1783 edev->stats.rx_mcast_pkts +
1784 edev->stats.rx_bcast_pkts;
1785 stats->tx_packets = edev->stats.tx_ucast_pkts +
1786 edev->stats.tx_mcast_pkts +
1787 edev->stats.tx_bcast_pkts;
1788
1789 stats->rx_bytes = edev->stats.rx_ucast_bytes +
1790 edev->stats.rx_mcast_bytes +
1791 edev->stats.rx_bcast_bytes;
1792
1793 stats->tx_bytes = edev->stats.tx_ucast_bytes +
1794 edev->stats.tx_mcast_bytes +
1795 edev->stats.tx_bcast_bytes;
1796
1797 stats->tx_errors = edev->stats.tx_err_drop_pkts;
1798 stats->multicast = edev->stats.rx_mcast_pkts +
1799 edev->stats.rx_bcast_pkts;
1800
1801 stats->rx_fifo_errors = edev->stats.no_buff_discards;
1802
1803 stats->collisions = edev->stats.tx_total_collisions;
1804 stats->rx_crc_errors = edev->stats.rx_crc_errors;
1805 stats->rx_frame_errors = edev->stats.rx_align_errors;
1806
1807 return stats;
1808}
1809
733def6a 1810#ifdef CONFIG_QED_SRIOV
73390ac9
YM		 1811static int qede_get_vf_config(struct net_device *dev, int vfidx,
1812 struct ifla_vf_info *ivi)
1813{
1814 struct qede_dev *edev = netdev_priv(dev);
1815
1816 if (!edev->ops)
1817 return -EINVAL;
1818
1819 return edev->ops->iov->get_config(edev->cdev, vfidx, ivi);
1820}
1821
733def6a
YM		 1822static int qede_set_vf_rate(struct net_device *dev, int vfidx,
1823 int min_tx_rate, int max_tx_rate)
1824{
1825 struct qede_dev *edev = netdev_priv(dev);
1826
be7b6d64 1827 return edev->ops->iov->set_rate(edev->cdev, vfidx, min_tx_rate,
733def6a
YM		 1828 max_tx_rate);
1829}
1830
6ddc7608
YM		 1831static int qede_set_vf_spoofchk(struct net_device *dev, int vfidx, bool val)
1832{
1833 struct qede_dev *edev = netdev_priv(dev);
1834
1835 if (!edev->ops)
1836 return -EINVAL;
1837
1838 return edev->ops->iov->set_spoof(edev->cdev, vfidx, val);
1839}
1840
733def6a
YM		 1841static int qede_set_vf_link_state(struct net_device *dev, int vfidx,
1842 int link_state)
1843{
1844 struct qede_dev *edev = netdev_priv(dev);
1845
1846 if (!edev->ops)
1847 return -EINVAL;
1848
1849 return edev->ops->iov->set_link_state(edev->cdev, vfidx, link_state);
1850}
1851#endif
1852
7c1bfcad
SRK		 1853static void qede_config_accept_any_vlan(struct qede_dev *edev, bool action)
1854{
1855 struct qed_update_vport_params params;
1856 int rc;
1857
1858 /* Proceed only if action actually needs to be performed */
1859 if (edev->accept_any_vlan == action)
1860 return;
1861
1862 memset(&params, 0, sizeof(params));
1863
1864 params.vport_id = 0;
1865 params.accept_any_vlan = action;
1866 params.update_accept_any_vlan_flg = 1;
1867
1868 rc = edev->ops->vport_update(edev->cdev, &params);
1869 if (rc) {
1870 DP_ERR(edev, "Failed to %s accept-any-vlan\n",
1871 action ? "enable" : "disable");
1872 } else {
1873 DP_INFO(edev, "%s accept-any-vlan\n",
1874 action ? "enabled" : "disabled");
1875 edev->accept_any_vlan = action;
1876 }
1877}
1878
1879static int qede_vlan_rx_add_vid(struct net_device *dev, __be16 proto, u16 vid)
1880{
1881 struct qede_dev *edev = netdev_priv(dev);
1882 struct qede_vlan *vlan, *tmp;
1883 int rc;
1884
1885 DP_VERBOSE(edev, NETIF_MSG_IFUP, "Adding vlan 0x%04x\n", vid);
1886
1887 vlan = kzalloc(sizeof(*vlan), GFP_KERNEL);
1888 if (!vlan) {
1889 DP_INFO(edev, "Failed to allocate struct for vlan\n");
1890 return -ENOMEM;
1891 }
1892 INIT_LIST_HEAD(&vlan->list);
1893 vlan->vid = vid;
1894 vlan->configured = false;
1895
1896 /* Verify vlan isn't already configured */
1897 list_for_each_entry(tmp, &edev->vlan_list, list) {
1898 if (tmp->vid == vlan->vid) {
1899 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1900 "vlan already configured\n");
1901 kfree(vlan);
1902 return -EEXIST;
1903 }
1904 }
1905
1906 /* If interface is down, cache this VLAN ID and return */
1907 if (edev->state != QEDE_STATE_OPEN) {
1908 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
1909 "Interface is down, VLAN %d will be configured when interface is up\n",
1910 vid);
1911 if (vid != 0)
1912 edev->non_configured_vlans++;
1913 list_add(&vlan->list, &edev->vlan_list);
1914
1915 return 0;
1916 }
1917
1918 /* Check for the filter limit.
1919 * Note - vlan0 has a reserved filter and can be added without
1920 * worrying about quota
1921 */
1922 if ((edev->configured_vlans < edev->dev_info.num_vlan_filters) ||
1923 (vlan->vid == 0)) {
1924 rc = qede_set_ucast_rx_vlan(edev,
1925 QED_FILTER_XCAST_TYPE_ADD,
1926 vlan->vid);
1927 if (rc) {
1928 DP_ERR(edev, "Failed to configure VLAN %d\n",
1929 vlan->vid);
1930 kfree(vlan);
1931 return -EINVAL;
1932 }
1933 vlan->configured = true;
1934
1935 /* vlan0 filter isn't consuming out of our quota */
1936 if (vlan->vid != 0)
1937 edev->configured_vlans++;
1938 } else {
1939 /* Out of quota; Activate accept-any-VLAN mode */
1940 if (!edev->non_configured_vlans)
1941 qede_config_accept_any_vlan(edev, true);
1942
1943 edev->non_configured_vlans++;
1944 }
1945
1946 list_add(&vlan->list, &edev->vlan_list);
1947
1948 return 0;
1949}
1950
1951static void qede_del_vlan_from_list(struct qede_dev *edev,
1952 struct qede_vlan *vlan)
1953{
1954 /* vlan0 filter isn't consuming out of our quota */
1955 if (vlan->vid != 0) {
1956 if (vlan->configured)
1957 edev->configured_vlans--;
1958 else
1959 edev->non_configured_vlans--;
1960 }
1961
1962 list_del(&vlan->list);
1963 kfree(vlan);
1964}
1965
1966static int qede_configure_vlan_filters(struct qede_dev *edev)
1967{
1968 int rc = 0, real_rc = 0, accept_any_vlan = 0;
1969 struct qed_dev_eth_info *dev_info;
1970 struct qede_vlan *vlan = NULL;
1971
1972 if (list_empty(&edev->vlan_list))
1973 return 0;
1974
1975 dev_info = &edev->dev_info;
1976
1977 /* Configure non-configured vlans */
1978 list_for_each_entry(vlan, &edev->vlan_list, list) {
1979 if (vlan->configured)
1980 continue;
1981
1982 /* We have used all our credits, now enable accept_any_vlan */
1983 if ((vlan->vid != 0) &&
1984 (edev->configured_vlans == dev_info->num_vlan_filters)) {
1985 accept_any_vlan = 1;
1986 continue;
1987 }
1988
1989 DP_VERBOSE(edev, NETIF_MSG_IFUP, "Adding vlan %d\n", vlan->vid);
1990
1991 rc = qede_set_ucast_rx_vlan(edev, QED_FILTER_XCAST_TYPE_ADD,
1992 vlan->vid);
1993 if (rc) {
1994 DP_ERR(edev, "Failed to configure VLAN %u\n",
1995 vlan->vid);
1996 real_rc = rc;
1997 continue;
1998 }
1999
2000 vlan->configured = true;
2001 /* vlan0 filter doesn't consume our VLAN filter's quota */
2002 if (vlan->vid != 0) {
2003 edev->non_configured_vlans--;
2004 edev->configured_vlans++;
2005 }
2006 }
2007
2008 /* enable accept_any_vlan mode if we have more VLANs than credits,
2009 * or remove accept_any_vlan mode if we've actually removed
2010 * a non-configured vlan, and all remaining vlans are truly configured.
2011 */
2012
2013 if (accept_any_vlan)
2014 qede_config_accept_any_vlan(edev, true);
2015 else if (!edev->non_configured_vlans)
2016 qede_config_accept_any_vlan(edev, false);
2017
2018 return real_rc;
2019}
2020
2021static int qede_vlan_rx_kill_vid(struct net_device *dev, __be16 proto, u16 vid)
2022{
2023 struct qede_dev *edev = netdev_priv(dev);
2024 struct qede_vlan *vlan = NULL;
2025 int rc;
2026
2027 DP_VERBOSE(edev, NETIF_MSG_IFDOWN, "Removing vlan 0x%04x\n", vid);
2028
2029 /* Find whether entry exists */
2030 list_for_each_entry(vlan, &edev->vlan_list, list)
2031 if (vlan->vid == vid)
2032 break;
2033
2034 if (!vlan || (vlan->vid != vid)) {
2035 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
2036 "Vlan isn't configured\n");
2037 return 0;
2038 }
2039
2040 if (edev->state != QEDE_STATE_OPEN) {
2041 /* As interface is already down, we don't have a VPORT
2042 * instance to remove vlan filter. So just update vlan list
2043 */
2044 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
2045 "Interface is down, removing VLAN from list only\n");
2046 qede_del_vlan_from_list(edev, vlan);
2047 return 0;
2048 }
2049
2050 /* Remove vlan */
2051 rc = qede_set_ucast_rx_vlan(edev, QED_FILTER_XCAST_TYPE_DEL, vid);
2052 if (rc) {
2053 DP_ERR(edev, "Failed to remove VLAN %d\n", vid);
2054 return -EINVAL;
2055 }
2056
2057 qede_del_vlan_from_list(edev, vlan);
2058
2059 /* We have removed a VLAN - try to see if we can
2060 * configure non-configured VLAN from the list.
2061 */
2062 rc = qede_configure_vlan_filters(edev);
2063
2064 return rc;
2065}
2066
2067static void qede_vlan_mark_nonconfigured(struct qede_dev *edev)
2068{
2069 struct qede_vlan *vlan = NULL;
2070
2071 if (list_empty(&edev->vlan_list))
2072 return;
2073
2074 list_for_each_entry(vlan, &edev->vlan_list, list) {
2075 if (!vlan->configured)
2076 continue;
2077
2078 vlan->configured = false;
2079
2080 /* vlan0 filter isn't consuming out of our quota */
2081 if (vlan->vid != 0) {
2082 edev->non_configured_vlans++;
2083 edev->configured_vlans--;
2084 }
2085
2086 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
2087 "marked vlan %d as non-configured\n",
2088 vlan->vid);
2089 }
2090
2091 edev->accept_any_vlan = false;
2092}
2093
ce2b885c
YM		 2094int qede_set_features(struct net_device *dev, netdev_features_t features)
2095{
2096 struct qede_dev *edev = netdev_priv(dev);
2097 netdev_features_t changes = features ^ dev->features;
2098 bool need_reload = false;
2099
2100 /* No action needed if hardware GRO is disabled during driver load */
2101 if (changes & NETIF_F_GRO) {
2102 if (dev->features & NETIF_F_GRO)
2103 need_reload = !edev->gro_disable;
2104 else
2105 need_reload = edev->gro_disable;
2106 }
2107
2108 if (need_reload && netif_running(edev->ndev)) {
2109 dev->features = features;
2110 qede_reload(edev, NULL, NULL);
2111 return 1;
2112 }
2113
2114 return 0;
2115}
2116
b18e170c
MC		 2117#ifdef CONFIG_QEDE_VXLAN
2118static void qede_add_vxlan_port(struct net_device *dev,
2119 sa_family_t sa_family, __be16 port)
2120{
2121 struct qede_dev *edev = netdev_priv(dev);
2122 u16 t_port = ntohs(port);
2123
2124 if (edev->vxlan_dst_port)
2125 return;
2126
2127 edev->vxlan_dst_port = t_port;
2128
2129 DP_VERBOSE(edev, QED_MSG_DEBUG, "Added vxlan port=%d", t_port);
2130
2131 set_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags);
2132 schedule_delayed_work(&edev->sp_task, 0);
2133}
2134
2135static void qede_del_vxlan_port(struct net_device *dev,
2136 sa_family_t sa_family, __be16 port)
2137{
2138 struct qede_dev *edev = netdev_priv(dev);
2139 u16 t_port = ntohs(port);
2140
2141 if (t_port != edev->vxlan_dst_port)
2142 return;
2143
2144 edev->vxlan_dst_port = 0;
2145
2146 DP_VERBOSE(edev, QED_MSG_DEBUG, "Deleted vxlan port=%d", t_port);
2147
2148 set_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags);
2149 schedule_delayed_work(&edev->sp_task, 0);
2150}
2151#endif
2152
9a109dd0
MC		 2153#ifdef CONFIG_QEDE_GENEVE
2154static void qede_add_geneve_port(struct net_device *dev,
2155 sa_family_t sa_family, __be16 port)
2156{
2157 struct qede_dev *edev = netdev_priv(dev);
2158 u16 t_port = ntohs(port);
2159
2160 if (edev->geneve_dst_port)
2161 return;
2162
2163 edev->geneve_dst_port = t_port;
2164
2165 DP_VERBOSE(edev, QED_MSG_DEBUG, "Added geneve port=%d", t_port);
2166 set_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags);
2167 schedule_delayed_work(&edev->sp_task, 0);
2168}
2169
2170static void qede_del_geneve_port(struct net_device *dev,
2171 sa_family_t sa_family, __be16 port)
2172{
2173 struct qede_dev *edev = netdev_priv(dev);
2174 u16 t_port = ntohs(port);
2175
2176 if (t_port != edev->geneve_dst_port)
2177 return;
2178
2179 edev->geneve_dst_port = 0;
2180
2181 DP_VERBOSE(edev, QED_MSG_DEBUG, "Deleted geneve port=%d", t_port);
2182 set_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags);
2183 schedule_delayed_work(&edev->sp_task, 0);
2184}
2185#endif
2186
2950219d
YM		 2187static const struct net_device_ops qede_netdev_ops = {
2188 .ndo_open = qede_open,
2189 .ndo_stop = qede_close,
2190 .ndo_start_xmit = qede_start_xmit,
0d8e0aa0
SK		 2191 .ndo_set_rx_mode = qede_set_rx_mode,
2192 .ndo_set_mac_address = qede_set_mac_addr,
2950219d 2193 .ndo_validate_addr = eth_validate_addr,
133fac0e 2194 .ndo_change_mtu = qede_change_mtu,
08feecd7 2195#ifdef CONFIG_QED_SRIOV
eff16960 2196 .ndo_set_vf_mac = qede_set_vf_mac,
08feecd7
YM		 2197 .ndo_set_vf_vlan = qede_set_vf_vlan,
2198#endif
7c1bfcad
SRK		 2199 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
2200 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
ce2b885c 2201 .ndo_set_features = qede_set_features,
133fac0e 2202 .ndo_get_stats64 = qede_get_stats64,
733def6a
YM		 2203#ifdef CONFIG_QED_SRIOV
2204 .ndo_set_vf_link_state = qede_set_vf_link_state,
6ddc7608 2205 .ndo_set_vf_spoofchk = qede_set_vf_spoofchk,
73390ac9 2206 .ndo_get_vf_config = qede_get_vf_config,
733def6a
YM		 2207 .ndo_set_vf_rate = qede_set_vf_rate,
2208#endif
b18e170c
MC		 2209#ifdef CONFIG_QEDE_VXLAN
2210 .ndo_add_vxlan_port = qede_add_vxlan_port,
2211 .ndo_del_vxlan_port = qede_del_vxlan_port,
2212#endif
9a109dd0
MC		 2213#ifdef CONFIG_QEDE_GENEVE
2214 .ndo_add_geneve_port = qede_add_geneve_port,
2215 .ndo_del_geneve_port = qede_del_geneve_port,
2216#endif
2950219d
YM		 2217};
2218
e712d52b
YM		 2219/* -------------------------------------------------------------------------
2220 * START OF PROBE / REMOVE
2221 * -------------------------------------------------------------------------
2222 */
2223
2224static struct qede_dev *qede_alloc_etherdev(struct qed_dev *cdev,
2225 struct pci_dev *pdev,
2226 struct qed_dev_eth_info *info,
2227 u32 dp_module,
2228 u8 dp_level)
2229{
2230 struct net_device *ndev;
2231 struct qede_dev *edev;
2232
2233 ndev = alloc_etherdev_mqs(sizeof(*edev),
2234 info->num_queues,
2235 info->num_queues);
2236 if (!ndev) {
2237 pr_err("etherdev allocation failed\n");
2238 return NULL;
2239 }
2240
2241 edev = netdev_priv(ndev);
2242 edev->ndev = ndev;
2243 edev->cdev = cdev;
2244 edev->pdev = pdev;
2245 edev->dp_module = dp_module;
2246 edev->dp_level = dp_level;
2247 edev->ops = qed_ops;
2950219d
YM		 2248 edev->q_num_rx_buffers = NUM_RX_BDS_DEF;
2249 edev->q_num_tx_buffers = NUM_TX_BDS_DEF;
e712d52b 2250
e712d52b
YM		 2251 SET_NETDEV_DEV(ndev, &pdev->dev);
2252
133fac0e 2253 memset(&edev->stats, 0, sizeof(edev->stats));
e712d52b
YM		 2254 memcpy(&edev->dev_info, info, sizeof(*info));
2255
2256 edev->num_tc = edev->dev_info.num_tc;
2257
7c1bfcad
SRK		 2258 INIT_LIST_HEAD(&edev->vlan_list);
2259
e712d52b
YM		 2260 return edev;
2261}
2262
2263static void qede_init_ndev(struct qede_dev *edev)
2264{
2265 struct net_device *ndev = edev->ndev;
2266 struct pci_dev *pdev = edev->pdev;
2267 u32 hw_features;
2268
2269 pci_set_drvdata(pdev, ndev);
2270
2271 ndev->mem_start = edev->dev_info.common.pci_mem_start;
2272 ndev->base_addr = ndev->mem_start;
2273 ndev->mem_end = edev->dev_info.common.pci_mem_end;
2274 ndev->irq = edev->dev_info.common.pci_irq;
2275
2276 ndev->watchdog_timeo = TX_TIMEOUT;
2277
2950219d
YM		 2278 ndev->netdev_ops = &qede_netdev_ops;
2279
133fac0e
SK		 2280 qede_set_ethtool_ops(ndev);
2281
e712d52b
YM		 2282 /* user-changeble features */
2283 hw_features = NETIF_F_GRO | NETIF_F_SG |
2284 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2285 NETIF_F_TSO | NETIF_F_TSO6;
2286
14db81de
MC		 2287 /* Encap features*/
2288 hw_features |= NETIF_F_GSO_GRE | NETIF_F_GSO_UDP_TUNNEL |
2289 NETIF_F_TSO_ECN;
2290 ndev->hw_enc_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2291 NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO_ECN |
2292 NETIF_F_TSO6 | NETIF_F_GSO_GRE |
2293 NETIF_F_GSO_UDP_TUNNEL | NETIF_F_RXCSUM;
2294
e712d52b
YM		 2295 ndev->vlan_features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
2296 NETIF_F_HIGHDMA;
2297 ndev->features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
2298 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HIGHDMA |
7c1bfcad 2299 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_TX;
e712d52b
YM		 2300
2301 ndev->hw_features = hw_features;
2302
2303 /* Set network device HW mac */
2304 ether_addr_copy(edev->ndev->dev_addr, edev->dev_info.common.hw_mac);
2305}
2306
2307/* This function converts from 32b param to two params of level and module
2308 * Input 32b decoding:
2309 * b31 - enable all NOTICE prints. NOTICE prints are for deviation from the
2310 * 'happy' flow, e.g. memory allocation failed.
2311 * b30 - enable all INFO prints. INFO prints are for major steps in the flow
2312 * and provide important parameters.
2313 * b29-b0 - per-module bitmap, where each bit enables VERBOSE prints of that
2314 * module. VERBOSE prints are for tracking the specific flow in low level.
2315 *
2316 * Notice that the level should be that of the lowest required logs.
2317 */
133fac0e 2318void qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level)
e712d52b
YM		 2319{
2320 *p_dp_level = QED_LEVEL_NOTICE;
2321 *p_dp_module = 0;
2322
2323 if (debug & QED_LOG_VERBOSE_MASK) {
2324 *p_dp_level = QED_LEVEL_VERBOSE;
2325 *p_dp_module = (debug & 0x3FFFFFFF);
2326 } else if (debug & QED_LOG_INFO_MASK) {
2327 *p_dp_level = QED_LEVEL_INFO;
2328 } else if (debug & QED_LOG_NOTICE_MASK) {
2329 *p_dp_level = QED_LEVEL_NOTICE;
2330 }
2331}
2332
2950219d
YM		 2333static void qede_free_fp_array(struct qede_dev *edev)
2334{
2335 if (edev->fp_array) {
2336 struct qede_fastpath *fp;
2337 int i;
2338
2339 for_each_rss(i) {
2340 fp = &edev->fp_array[i];
2341
2342 kfree(fp->sb_info);
2343 kfree(fp->rxq);
2344 kfree(fp->txqs);
2345 }
2346 kfree(edev->fp_array);
2347 }
2348 edev->num_rss = 0;
2349}
2350
2351static int qede_alloc_fp_array(struct qede_dev *edev)
2352{
2353 struct qede_fastpath *fp;
2354 int i;
2355
2356 edev->fp_array = kcalloc(QEDE_RSS_CNT(edev),
2357 sizeof(*edev->fp_array), GFP_KERNEL);
2358 if (!edev->fp_array) {
2359 DP_NOTICE(edev, "fp array allocation failed\n");
2360 goto err;
2361 }
2362
2363 for_each_rss(i) {
2364 fp = &edev->fp_array[i];
2365
2366 fp->sb_info = kcalloc(1, sizeof(*fp->sb_info), GFP_KERNEL);
2367 if (!fp->sb_info) {
2368 DP_NOTICE(edev, "sb info struct allocation failed\n");
2369 goto err;
2370 }
2371
2372 fp->rxq = kcalloc(1, sizeof(*fp->rxq), GFP_KERNEL);
2373 if (!fp->rxq) {
2374 DP_NOTICE(edev, "RXQ struct allocation failed\n");
2375 goto err;
2376 }
2377
2378 fp->txqs = kcalloc(edev->num_tc, sizeof(*fp->txqs), GFP_KERNEL);
2379 if (!fp->txqs) {
2380 DP_NOTICE(edev, "TXQ array allocation failed\n");
2381 goto err;
2382 }
2383 }
2384
2385 return 0;
2386err:
2387 qede_free_fp_array(edev);
2388 return -ENOMEM;
2389}
2390
0d8e0aa0
SK		 2391static void qede_sp_task(struct work_struct *work)
2392{
2393 struct qede_dev *edev = container_of(work, struct qede_dev,
2394 sp_task.work);
b18e170c
MC		 2395 struct qed_dev *cdev = edev->cdev;
2396
0d8e0aa0
SK		 2397 mutex_lock(&edev->qede_lock);
2398
2399 if (edev->state == QEDE_STATE_OPEN) {
2400 if (test_and_clear_bit(QEDE_SP_RX_MODE, &edev->sp_flags))
2401 qede_config_rx_mode(edev->ndev);
2402 }
2403
b18e170c
MC		 2404 if (test_and_clear_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags)) {
2405 struct qed_tunn_params tunn_params;
2406
2407 memset(&tunn_params, 0, sizeof(tunn_params));
2408 tunn_params.update_vxlan_port = 1;
2409 tunn_params.vxlan_port = edev->vxlan_dst_port;
2410 qed_ops->tunn_config(cdev, &tunn_params);
2411 }
2412
9a109dd0
MC		 2413 if (test_and_clear_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags)) {
2414 struct qed_tunn_params tunn_params;
2415
2416 memset(&tunn_params, 0, sizeof(tunn_params));
2417 tunn_params.update_geneve_port = 1;
2418 tunn_params.geneve_port = edev->geneve_dst_port;
2419 qed_ops->tunn_config(cdev, &tunn_params);
2420 }
2421
0d8e0aa0
SK		 2422 mutex_unlock(&edev->qede_lock);
2423}
2424
e712d52b
YM		 2425static void qede_update_pf_params(struct qed_dev *cdev)
2426{
2427 struct qed_pf_params pf_params;
2428
8e0ddc04 2429 /* 64 rx + 64 tx */
e712d52b 2430 memset(&pf_params, 0, sizeof(struct qed_pf_params));
8e0ddc04 2431 pf_params.eth_pf_params.num_cons = 128;
e712d52b
YM		 2432 qed_ops->common->update_pf_params(cdev, &pf_params);
2433}
2434
2435enum qede_probe_mode {
2436 QEDE_PROBE_NORMAL,
2437};
2438
2439static int __qede_probe(struct pci_dev *pdev, u32 dp_module, u8 dp_level,
1408cc1f 2440 bool is_vf, enum qede_probe_mode mode)
e712d52b 2441{
1408cc1f 2442 struct qed_probe_params probe_params;
e712d52b
YM		 2443 struct qed_slowpath_params params;
2444 struct qed_dev_eth_info dev_info;
2445 struct qede_dev *edev;
2446 struct qed_dev *cdev;
2447 int rc;
2448
2449 if (unlikely(dp_level & QED_LEVEL_INFO))
2450 pr_notice("Starting qede probe\n");
2451
1408cc1f
YM		 2452 memset(&probe_params, 0, sizeof(probe_params));
2453 probe_params.protocol = QED_PROTOCOL_ETH;
2454 probe_params.dp_module = dp_module;
2455 probe_params.dp_level = dp_level;
2456 probe_params.is_vf = is_vf;
2457 cdev = qed_ops->common->probe(pdev, &probe_params);
e712d52b
YM		 2458 if (!cdev) {
2459 rc = -ENODEV;
2460 goto err0;
2461 }
2462
2463 qede_update_pf_params(cdev);
2464
2465 /* Start the Slowpath-process */
2466 memset(&params, 0, sizeof(struct qed_slowpath_params));
2467 params.int_mode = QED_INT_MODE_MSIX;
2468 params.drv_major = QEDE_MAJOR_VERSION;
2469 params.drv_minor = QEDE_MINOR_VERSION;
2470 params.drv_rev = QEDE_REVISION_VERSION;
2471 params.drv_eng = QEDE_ENGINEERING_VERSION;
2472 strlcpy(params.name, "qede LAN", QED_DRV_VER_STR_SIZE);
2473 rc = qed_ops->common->slowpath_start(cdev, &params);
2474 if (rc) {
2475 pr_notice("Cannot start slowpath\n");
2476 goto err1;
2477 }
2478
2479 /* Learn information crucial for qede to progress */
2480 rc = qed_ops->fill_dev_info(cdev, &dev_info);
2481 if (rc)
2482 goto err2;
2483
2484 edev = qede_alloc_etherdev(cdev, pdev, &dev_info, dp_module,
2485 dp_level);
2486 if (!edev) {
2487 rc = -ENOMEM;
2488 goto err2;
2489 }
2490
fefb0202
YM		 2491 if (is_vf)
2492 edev->flags |= QEDE_FLAG_IS_VF;
2493
e712d52b
YM		 2494 qede_init_ndev(edev);
2495
2950219d
YM		 2496 rc = register_netdev(edev->ndev);
2497 if (rc) {
2498 DP_NOTICE(edev, "Cannot register net-device\n");
2499 goto err3;
2500 }
2501
e712d52b
YM		 2502 edev->ops->common->set_id(cdev, edev->ndev->name, DRV_MODULE_VERSION);
2503
a2ec6172
SK		 2504 edev->ops->register_ops(cdev, &qede_ll_ops, edev);
2505
0d8e0aa0
SK		 2506 INIT_DELAYED_WORK(&edev->sp_task, qede_sp_task);
2507 mutex_init(&edev->qede_lock);
2508
e712d52b
YM		 2509 DP_INFO(edev, "Ending successfully qede probe\n");
2510
2511 return 0;
2512
2950219d
YM		 2513err3:
2514 free_netdev(edev->ndev);
e712d52b
YM		 2515err2:
2516 qed_ops->common->slowpath_stop(cdev);
2517err1:
2518 qed_ops->common->remove(cdev);
2519err0:
2520 return rc;
2521}
2522
2523static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id)
2524{
fefb0202 2525 bool is_vf = false;
e712d52b
YM		 2526 u32 dp_module = 0;
2527 u8 dp_level = 0;
2528
fefb0202
YM		 2529 switch ((enum qede_pci_private)id->driver_data) {
2530 case QEDE_PRIVATE_VF:
2531 if (debug & QED_LOG_VERBOSE_MASK)
2532 dev_err(&pdev->dev, "Probing a VF\n");
2533 is_vf = true;
2534 break;
2535 default:
2536 if (debug & QED_LOG_VERBOSE_MASK)
2537 dev_err(&pdev->dev, "Probing a PF\n");
2538 }
2539
e712d52b
YM		 2540 qede_config_debug(debug, &dp_module, &dp_level);
2541
fefb0202 2542 return __qede_probe(pdev, dp_module, dp_level, is_vf,
e712d52b
YM		 2543 QEDE_PROBE_NORMAL);
2544}
2545
2546enum qede_remove_mode {
2547 QEDE_REMOVE_NORMAL,
2548};
2549
2550static void __qede_remove(struct pci_dev *pdev, enum qede_remove_mode mode)
2551{
2552 struct net_device *ndev = pci_get_drvdata(pdev);
2553 struct qede_dev *edev = netdev_priv(ndev);
2554 struct qed_dev *cdev = edev->cdev;
2555
2556 DP_INFO(edev, "Starting qede_remove\n");
2557
0d8e0aa0 2558 cancel_delayed_work_sync(&edev->sp_task);
2950219d
YM		 2559 unregister_netdev(ndev);
2560
e712d52b
YM		 2561 edev->ops->common->set_power_state(cdev, PCI_D0);
2562
2563 pci_set_drvdata(pdev, NULL);
2564
2565 free_netdev(ndev);
2566
2567 /* Use global ops since we've freed edev */
2568 qed_ops->common->slowpath_stop(cdev);
2569 qed_ops->common->remove(cdev);
2570
2571 pr_notice("Ending successfully qede_remove\n");
2572}
2573
2574static void qede_remove(struct pci_dev *pdev)
2575{
2576 __qede_remove(pdev, QEDE_REMOVE_NORMAL);
2577}
2950219d
YM		 2578
2579/* -------------------------------------------------------------------------
2580 * START OF LOAD / UNLOAD
2581 * -------------------------------------------------------------------------
2582 */
2583
2584static int qede_set_num_queues(struct qede_dev *edev)
2585{
2586 int rc;
2587 u16 rss_num;
2588
2589 /* Setup queues according to possible resources*/
8edf049d
SK		 2590 if (edev->req_rss)
2591 rss_num = edev->req_rss;
2592 else
2593 rss_num = netif_get_num_default_rss_queues() *
2594 edev->dev_info.common.num_hwfns;
2950219d
YM		 2595
2596 rss_num = min_t(u16, QEDE_MAX_RSS_CNT(edev), rss_num);
2597
2598 rc = edev->ops->common->set_fp_int(edev->cdev, rss_num);
2599 if (rc > 0) {
2600 /* Managed to request interrupts for our queues */
2601 edev->num_rss = rc;
2602 DP_INFO(edev, "Managed %d [of %d] RSS queues\n",
2603 QEDE_RSS_CNT(edev), rss_num);
2604 rc = 0;
2605 }
2606 return rc;
2607}
2608
2609static void qede_free_mem_sb(struct qede_dev *edev,
2610 struct qed_sb_info *sb_info)
2611{
2612 if (sb_info->sb_virt)
2613 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_info->sb_virt),
2614 (void *)sb_info->sb_virt, sb_info->sb_phys);
2615}
2616
2617/* This function allocates fast-path status block memory */
2618static int qede_alloc_mem_sb(struct qede_dev *edev,
2619 struct qed_sb_info *sb_info,
2620 u16 sb_id)
2621{
2622 struct status_block *sb_virt;
2623 dma_addr_t sb_phys;
2624 int rc;
2625
2626 sb_virt = dma_alloc_coherent(&edev->pdev->dev,
2627 sizeof(*sb_virt),
2628 &sb_phys, GFP_KERNEL);
2629 if (!sb_virt) {
2630 DP_ERR(edev, "Status block allocation failed\n");
2631 return -ENOMEM;
2632 }
2633
2634 rc = edev->ops->common->sb_init(edev->cdev, sb_info,
2635 sb_virt, sb_phys, sb_id,
2636 QED_SB_TYPE_L2_QUEUE);
2637 if (rc) {
2638 DP_ERR(edev, "Status block initialization failed\n");
2639 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_virt),
2640 sb_virt, sb_phys);
2641 return rc;
2642 }
2643
2644 return 0;
2645}
2646
2647static void qede_free_rx_buffers(struct qede_dev *edev,
2648 struct qede_rx_queue *rxq)
2649{
2650 u16 i;
2651
2652 for (i = rxq->sw_rx_cons; i != rxq->sw_rx_prod; i++) {
2653 struct sw_rx_data *rx_buf;
fc48b7a6 2654 struct page *data;
2950219d
YM		 2655
2656 rx_buf = &rxq->sw_rx_ring[i & NUM_RX_BDS_MAX];
2657 data = rx_buf->data;
2658
fc48b7a6
YM		 2659 dma_unmap_page(&edev->pdev->dev,
2660 rx_buf->mapping,
2661 PAGE_SIZE, DMA_FROM_DEVICE);
2950219d
YM		 2662
2663 rx_buf->data = NULL;
fc48b7a6 2664 __free_page(data);
2950219d
YM		 2665 }
2666}
2667
55482edc
MC		 2668static void qede_free_sge_mem(struct qede_dev *edev,
2669 struct qede_rx_queue *rxq) {
2670 int i;
2671
2672 if (edev->gro_disable)
2673 return;
2674
2675 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) {
2676 struct qede_agg_info *tpa_info = &rxq->tpa_info[i];
2677 struct sw_rx_data *replace_buf = &tpa_info->replace_buf;
2678
f86af2df 2679 if (replace_buf->data) {
55482edc 2680 dma_unmap_page(&edev->pdev->dev,
09ec8e7f 2681 replace_buf->mapping,
55482edc
MC		 2682 PAGE_SIZE, DMA_FROM_DEVICE);
2683 __free_page(replace_buf->data);
2684 }
2685 }
2686}
2687
2950219d
YM		 2688static void qede_free_mem_rxq(struct qede_dev *edev,
2689 struct qede_rx_queue *rxq)
2690{
55482edc
MC		 2691 qede_free_sge_mem(edev, rxq);
2692
2950219d
YM		 2693 /* Free rx buffers */
2694 qede_free_rx_buffers(edev, rxq);
2695
2696 /* Free the parallel SW ring */
2697 kfree(rxq->sw_rx_ring);
2698
2699 /* Free the real RQ ring used by FW */
2700 edev->ops->common->chain_free(edev->cdev, &rxq->rx_bd_ring);
2701 edev->ops->common->chain_free(edev->cdev, &rxq->rx_comp_ring);
2702}
2703
2704static int qede_alloc_rx_buffer(struct qede_dev *edev,
2705 struct qede_rx_queue *rxq)
2706{
2707 struct sw_rx_data *sw_rx_data;
2708 struct eth_rx_bd *rx_bd;
2709 dma_addr_t mapping;
fc48b7a6 2710 struct page *data;
2950219d 2711 u16 rx_buf_size;
2950219d
YM		 2712
2713 rx_buf_size = rxq->rx_buf_size;
2714
fc48b7a6 2715 data = alloc_pages(GFP_ATOMIC, 0);
2950219d 2716 if (unlikely(!data)) {
fc48b7a6 2717 DP_NOTICE(edev, "Failed to allocate Rx data [page]\n");
2950219d
YM		 2718 return -ENOMEM;
2719 }
2720
fc48b7a6
YM		 2721 /* Map the entire page as it would be used
2722 * for multiple RX buffer segment size mapping.
2723 */
2724 mapping = dma_map_page(&edev->pdev->dev, data, 0,
2725 PAGE_SIZE, DMA_FROM_DEVICE);
2950219d 2726 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
fc48b7a6 2727 __free_page(data);
2950219d
YM		 2728 DP_NOTICE(edev, "Failed to map Rx buffer\n");
2729 return -ENOMEM;
2730 }
2731
2732 sw_rx_data = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
fc48b7a6 2733 sw_rx_data->page_offset = 0;
2950219d 2734 sw_rx_data->data = data;
fc48b7a6 2735 sw_rx_data->mapping = mapping;
2950219d
YM		 2736
2737 /* Advance PROD and get BD pointer */
2738 rx_bd = (struct eth_rx_bd *)qed_chain_produce(&rxq->rx_bd_ring);
2739 WARN_ON(!rx_bd);
2740 rx_bd->addr.hi = cpu_to_le32(upper_32_bits(mapping));
2741 rx_bd->addr.lo = cpu_to_le32(lower_32_bits(mapping));
2742
2743 rxq->sw_rx_prod++;
2744
2745 return 0;
2746}
2747
55482edc
MC		 2748static int qede_alloc_sge_mem(struct qede_dev *edev,
2749 struct qede_rx_queue *rxq)
2750{
2751 dma_addr_t mapping;
2752 int i;
2753
2754 if (edev->gro_disable)
2755 return 0;
2756
2757 if (edev->ndev->mtu > PAGE_SIZE) {
2758 edev->gro_disable = 1;
2759 return 0;
2760 }
2761
2762 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) {
2763 struct qede_agg_info *tpa_info = &rxq->tpa_info[i];
2764 struct sw_rx_data *replace_buf = &tpa_info->replace_buf;
2765
2766 replace_buf->data = alloc_pages(GFP_ATOMIC, 0);
2767 if (unlikely(!replace_buf->data)) {
2768 DP_NOTICE(edev,
2769 "Failed to allocate TPA skb pool [replacement buffer]\n");
2770 goto err;
2771 }
2772
2773 mapping = dma_map_page(&edev->pdev->dev, replace_buf->data, 0,
2774 rxq->rx_buf_size, DMA_FROM_DEVICE);
2775 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
2776 DP_NOTICE(edev,
2777 "Failed to map TPA replacement buffer\n");
2778 goto err;
2779 }
2780
09ec8e7f 2781 replace_buf->mapping = mapping;
55482edc
MC		 2782 tpa_info->replace_buf.page_offset = 0;
2783
2784 tpa_info->replace_buf_mapping = mapping;
2785 tpa_info->agg_state = QEDE_AGG_STATE_NONE;
2786 }
2787
2788 return 0;
2789err:
2790 qede_free_sge_mem(edev, rxq);
2791 edev->gro_disable = 1;
2792 return -ENOMEM;
2793}
2794
2950219d
YM		 2795/* This function allocates all memory needed per Rx queue */
2796static int qede_alloc_mem_rxq(struct qede_dev *edev,
2797 struct qede_rx_queue *rxq)
2798{
f86af2df 2799 int i, rc, size;
2950219d
YM		 2800
2801 rxq->num_rx_buffers = edev->q_num_rx_buffers;
2802
fc48b7a6
YM		 2803 rxq->rx_buf_size = NET_IP_ALIGN + ETH_OVERHEAD +
2804 edev->ndev->mtu;
2805 if (rxq->rx_buf_size > PAGE_SIZE)
2806 rxq->rx_buf_size = PAGE_SIZE;
2807
2808 /* Segment size to spilt a page in multiple equal parts */
2809 rxq->rx_buf_seg_size = roundup_pow_of_two(rxq->rx_buf_size);
2950219d
YM		 2810
2811 /* Allocate the parallel driver ring for Rx buffers */
fc48b7a6 2812 size = sizeof(*rxq->sw_rx_ring) * RX_RING_SIZE;
2950219d
YM		 2813 rxq->sw_rx_ring = kzalloc(size, GFP_KERNEL);
2814 if (!rxq->sw_rx_ring) {
2815 DP_ERR(edev, "Rx buffers ring allocation failed\n");
f86af2df 2816 rc = -ENOMEM;
2950219d
YM		 2817 goto err;
2818 }
2819
2820 /* Allocate FW Rx ring */
2821 rc = edev->ops->common->chain_alloc(edev->cdev,
2822 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
2823 QED_CHAIN_MODE_NEXT_PTR,
fc48b7a6 2824 RX_RING_SIZE,
2950219d
YM		 2825 sizeof(struct eth_rx_bd),
2826 &rxq->rx_bd_ring);
2827
2828 if (rc)
2829 goto err;
2830
2831 /* Allocate FW completion ring */
2832 rc = edev->ops->common->chain_alloc(edev->cdev,
2833 QED_CHAIN_USE_TO_CONSUME,
2834 QED_CHAIN_MODE_PBL,
fc48b7a6 2835 RX_RING_SIZE,
2950219d
YM		 2836 sizeof(union eth_rx_cqe),
2837 &rxq->rx_comp_ring);
2838 if (rc)
2839 goto err;
2840
2841 /* Allocate buffers for the Rx ring */
2842 for (i = 0; i < rxq->num_rx_buffers; i++) {
2843 rc = qede_alloc_rx_buffer(edev, rxq);
f86af2df
MC		 2844 if (rc) {
2845 DP_ERR(edev,
2846 "Rx buffers allocation failed at index %d\n", i);
2847 goto err;
2848 }
2950219d
YM		 2849 }
2850
f86af2df 2851 rc = qede_alloc_sge_mem(edev, rxq);
2950219d 2852err:
f86af2df 2853 return rc;
2950219d
YM		 2854}
2855
2856static void qede_free_mem_txq(struct qede_dev *edev,
2857 struct qede_tx_queue *txq)
2858{
2859 /* Free the parallel SW ring */
2860 kfree(txq->sw_tx_ring);
2861
2862 /* Free the real RQ ring used by FW */
2863 edev->ops->common->chain_free(edev->cdev, &txq->tx_pbl);
2864}
2865
2866/* This function allocates all memory needed per Tx queue */
2867static int qede_alloc_mem_txq(struct qede_dev *edev,
2868 struct qede_tx_queue *txq)
2869{
2870 int size, rc;
2871 union eth_tx_bd_types *p_virt;
2872
2873 txq->num_tx_buffers = edev->q_num_tx_buffers;
2874
2875 /* Allocate the parallel driver ring for Tx buffers */
2876 size = sizeof(*txq->sw_tx_ring) * NUM_TX_BDS_MAX;
2877 txq->sw_tx_ring = kzalloc(size, GFP_KERNEL);
2878 if (!txq->sw_tx_ring) {
2879 DP_NOTICE(edev, "Tx buffers ring allocation failed\n");
2880 goto err;
2881 }
2882
2883 rc = edev->ops->common->chain_alloc(edev->cdev,
2884 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
2885 QED_CHAIN_MODE_PBL,
2886 NUM_TX_BDS_MAX,
2887 sizeof(*p_virt),
2888 &txq->tx_pbl);
2889 if (rc)
2890 goto err;
2891
2892 return 0;
2893
2894err:
2895 qede_free_mem_txq(edev, txq);
2896 return -ENOMEM;
2897}
2898
2899/* This function frees all memory of a single fp */
2900static void qede_free_mem_fp(struct qede_dev *edev,
2901 struct qede_fastpath *fp)
2902{
2903 int tc;
2904
2905 qede_free_mem_sb(edev, fp->sb_info);
2906
2907 qede_free_mem_rxq(edev, fp->rxq);
2908
2909 for (tc = 0; tc < edev->num_tc; tc++)
2910 qede_free_mem_txq(edev, &fp->txqs[tc]);
2911}
2912
2913/* This function allocates all memory needed for a single fp (i.e. an entity
2914 * which contains status block, one rx queue and multiple per-TC tx queues.
2915 */
2916static int qede_alloc_mem_fp(struct qede_dev *edev,
2917 struct qede_fastpath *fp)
2918{
2919 int rc, tc;
2920
2921 rc = qede_alloc_mem_sb(edev, fp->sb_info, fp->rss_id);
2922 if (rc)
2923 goto err;
2924
2925 rc = qede_alloc_mem_rxq(edev, fp->rxq);
2926 if (rc)
2927 goto err;
2928
2929 for (tc = 0; tc < edev->num_tc; tc++) {
2930 rc = qede_alloc_mem_txq(edev, &fp->txqs[tc]);
2931 if (rc)
2932 goto err;
2933 }
2934
2935 return 0;
2950219d 2936err:
f86af2df 2937 return rc;
2950219d
YM		 2938}
2939
2940static void qede_free_mem_load(struct qede_dev *edev)
2941{
2942 int i;
2943
2944 for_each_rss(i) {
2945 struct qede_fastpath *fp = &edev->fp_array[i];
2946
2947 qede_free_mem_fp(edev, fp);
2948 }
2949}
2950
2951/* This function allocates all qede memory at NIC load. */
2952static int qede_alloc_mem_load(struct qede_dev *edev)
2953{
2954 int rc = 0, rss_id;
2955
2956 for (rss_id = 0; rss_id < QEDE_RSS_CNT(edev); rss_id++) {
2957 struct qede_fastpath *fp = &edev->fp_array[rss_id];
2958
2959 rc = qede_alloc_mem_fp(edev, fp);
f86af2df 2960 if (rc) {
2950219d 2961 DP_ERR(edev,
f86af2df
MC		 2962 "Failed to allocate memory for fastpath - rss id = %d\n",
2963 rss_id);
2964 qede_free_mem_load(edev);
2965 return rc;
2950219d 2966 }
2950219d
YM		 2967 }
2968
2969 return 0;
2970}
2971
2972/* This function inits fp content and resets the SB, RXQ and TXQ structures */
2973static void qede_init_fp(struct qede_dev *edev)
2974{
2975 int rss_id, txq_index, tc;
2976 struct qede_fastpath *fp;
2977
2978 for_each_rss(rss_id) {
2979 fp = &edev->fp_array[rss_id];
2980
2981 fp->edev = edev;
2982 fp->rss_id = rss_id;
2983
2984 memset((void *)&fp->napi, 0, sizeof(fp->napi));
2985
2986 memset((void *)fp->sb_info, 0, sizeof(*fp->sb_info));
2987
2988 memset((void *)fp->rxq, 0, sizeof(*fp->rxq));
2989 fp->rxq->rxq_id = rss_id;
2990
2991 memset((void *)fp->txqs, 0, (edev->num_tc * sizeof(*fp->txqs)));
2992 for (tc = 0; tc < edev->num_tc; tc++) {
2993 txq_index = tc * QEDE_RSS_CNT(edev) + rss_id;
2994 fp->txqs[tc].index = txq_index;
2995 }
2996
2997 snprintf(fp->name, sizeof(fp->name), "%s-fp-%d",
2998 edev->ndev->name, rss_id);
2999 }
55482edc
MC		 3000
3001 edev->gro_disable = !(edev->ndev->features & NETIF_F_GRO);
2950219d
YM		 3002}
3003
3004static int qede_set_real_num_queues(struct qede_dev *edev)
3005{
3006 int rc = 0;
3007
3008 rc = netif_set_real_num_tx_queues(edev->ndev, QEDE_TSS_CNT(edev));
3009 if (rc) {
3010 DP_NOTICE(edev, "Failed to set real number of Tx queues\n");
3011 return rc;
3012 }
3013 rc = netif_set_real_num_rx_queues(edev->ndev, QEDE_RSS_CNT(edev));
3014 if (rc) {
3015 DP_NOTICE(edev, "Failed to set real number of Rx queues\n");
3016 return rc;
3017 }
3018
3019 return 0;
3020}
3021
3022static void qede_napi_disable_remove(struct qede_dev *edev)
3023{
3024 int i;
3025
3026 for_each_rss(i) {
3027 napi_disable(&edev->fp_array[i].napi);
3028
3029 netif_napi_del(&edev->fp_array[i].napi);
3030 }
3031}
3032
3033static void qede_napi_add_enable(struct qede_dev *edev)
3034{
3035 int i;
3036
3037 /* Add NAPI objects */
3038 for_each_rss(i) {
3039 netif_napi_add(edev->ndev, &edev->fp_array[i].napi,
3040 qede_poll, NAPI_POLL_WEIGHT);
3041 napi_enable(&edev->fp_array[i].napi);
3042 }
3043}
3044
3045static void qede_sync_free_irqs(struct qede_dev *edev)
3046{
3047 int i;
3048
3049 for (i = 0; i < edev->int_info.used_cnt; i++) {
3050 if (edev->int_info.msix_cnt) {
3051 synchronize_irq(edev->int_info.msix[i].vector);
3052 free_irq(edev->int_info.msix[i].vector,
3053 &edev->fp_array[i]);
3054 } else {
3055 edev->ops->common->simd_handler_clean(edev->cdev, i);
3056 }
3057 }
3058
3059 edev->int_info.used_cnt = 0;
3060}
3061
3062static int qede_req_msix_irqs(struct qede_dev *edev)
3063{
3064 int i, rc;
3065
3066 /* Sanitize number of interrupts == number of prepared RSS queues */
3067 if (QEDE_RSS_CNT(edev) > edev->int_info.msix_cnt) {
3068 DP_ERR(edev,
3069 "Interrupt mismatch: %d RSS queues > %d MSI-x vectors\n",
3070 QEDE_RSS_CNT(edev), edev->int_info.msix_cnt);
3071 return -EINVAL;
3072 }
3073
3074 for (i = 0; i < QEDE_RSS_CNT(edev); i++) {
3075 rc = request_irq(edev->int_info.msix[i].vector,
3076 qede_msix_fp_int, 0, edev->fp_array[i].name,
3077 &edev->fp_array[i]);
3078 if (rc) {
3079 DP_ERR(edev, "Request fp %d irq failed\n", i);
3080 qede_sync_free_irqs(edev);
3081 return rc;
3082 }
3083 DP_VERBOSE(edev, NETIF_MSG_INTR,
3084 "Requested fp irq for %s [entry %d]. Cookie is at %p\n",
3085 edev->fp_array[i].name, i,
3086 &edev->fp_array[i]);
3087 edev->int_info.used_cnt++;
3088 }
3089
3090 return 0;
3091}
3092
3093static void qede_simd_fp_handler(void *cookie)
3094{
3095 struct qede_fastpath *fp = (struct qede_fastpath *)cookie;
3096
3097 napi_schedule_irqoff(&fp->napi);
3098}
3099
3100static int qede_setup_irqs(struct qede_dev *edev)
3101{
3102 int i, rc = 0;
3103
3104 /* Learn Interrupt configuration */
3105 rc = edev->ops->common->get_fp_int(edev->cdev, &edev->int_info);
3106 if (rc)
3107 return rc;
3108
3109 if (edev->int_info.msix_cnt) {
3110 rc = qede_req_msix_irqs(edev);
3111 if (rc)
3112 return rc;
3113 edev->ndev->irq = edev->int_info.msix[0].vector;
3114 } else {
3115 const struct qed_common_ops *ops;
3116
3117 /* qed should learn receive the RSS ids and callbacks */
3118 ops = edev->ops->common;
3119 for (i = 0; i < QEDE_RSS_CNT(edev); i++)
3120 ops->simd_handler_config(edev->cdev,
3121 &edev->fp_array[i], i,
3122 qede_simd_fp_handler);
3123 edev->int_info.used_cnt = QEDE_RSS_CNT(edev);
3124 }
3125 return 0;
3126}
3127
3128static int qede_drain_txq(struct qede_dev *edev,
3129 struct qede_tx_queue *txq,
3130 bool allow_drain)
3131{
3132 int rc, cnt = 1000;
3133
3134 while (txq->sw_tx_cons != txq->sw_tx_prod) {
3135 if (!cnt) {
3136 if (allow_drain) {
3137 DP_NOTICE(edev,
3138 "Tx queue[%d] is stuck, requesting MCP to drain\n",
3139 txq->index);
3140 rc = edev->ops->common->drain(edev->cdev);
3141 if (rc)
3142 return rc;
3143 return qede_drain_txq(edev, txq, false);
3144 }
3145 DP_NOTICE(edev,
3146 "Timeout waiting for tx queue[%d]: PROD=%d, CONS=%d\n",
3147 txq->index, txq->sw_tx_prod,
3148 txq->sw_tx_cons);
3149 return -ENODEV;
3150 }
3151 cnt--;
3152 usleep_range(1000, 2000);
3153 barrier();
3154 }
3155
3156 /* FW finished processing, wait for HW to transmit all tx packets */
3157 usleep_range(1000, 2000);
3158
3159 return 0;
3160}
3161
3162static int qede_stop_queues(struct qede_dev *edev)
3163{
3164 struct qed_update_vport_params vport_update_params;
3165 struct qed_dev *cdev = edev->cdev;
3166 int rc, tc, i;
3167
3168 /* Disable the vport */
3169 memset(&vport_update_params, 0, sizeof(vport_update_params));
3170 vport_update_params.vport_id = 0;
3171 vport_update_params.update_vport_active_flg = 1;
3172 vport_update_params.vport_active_flg = 0;
3173 vport_update_params.update_rss_flg = 0;
3174
3175 rc = edev->ops->vport_update(cdev, &vport_update_params);
3176 if (rc) {
3177 DP_ERR(edev, "Failed to update vport\n");
3178 return rc;
3179 }
3180
3181 /* Flush Tx queues. If needed, request drain from MCP */
3182 for_each_rss(i) {
3183 struct qede_fastpath *fp = &edev->fp_array[i];
3184
3185 for (tc = 0; tc < edev->num_tc; tc++) {
3186 struct qede_tx_queue *txq = &fp->txqs[tc];
3187
3188 rc = qede_drain_txq(edev, txq, true);
3189 if (rc)
3190 return rc;
3191 }
3192 }
3193
3194 /* Stop all Queues in reverse order*/
3195 for (i = QEDE_RSS_CNT(edev) - 1; i >= 0; i--) {
3196 struct qed_stop_rxq_params rx_params;
3197
3198 /* Stop the Tx Queue(s)*/
3199 for (tc = 0; tc < edev->num_tc; tc++) {
3200 struct qed_stop_txq_params tx_params;
3201
3202 tx_params.rss_id = i;
3203 tx_params.tx_queue_id = tc * QEDE_RSS_CNT(edev) + i;
3204 rc = edev->ops->q_tx_stop(cdev, &tx_params);
3205 if (rc) {
3206 DP_ERR(edev, "Failed to stop TXQ #%d\n",
3207 tx_params.tx_queue_id);
3208 return rc;
3209 }
3210 }
3211
3212 /* Stop the Rx Queue*/
3213 memset(&rx_params, 0, sizeof(rx_params));
3214 rx_params.rss_id = i;
3215 rx_params.rx_queue_id = i;
3216
3217 rc = edev->ops->q_rx_stop(cdev, &rx_params);
3218 if (rc) {
3219 DP_ERR(edev, "Failed to stop RXQ #%d\n", i);
3220 return rc;
3221 }
3222 }
3223
3224 /* Stop the vport */
3225 rc = edev->ops->vport_stop(cdev, 0);
3226 if (rc)
3227 DP_ERR(edev, "Failed to stop VPORT\n");
3228
3229 return rc;
3230}
3231
3232static int qede_start_queues(struct qede_dev *edev)
3233{
3234 int rc, tc, i;
088c8618 3235 int vlan_removal_en = 1;
2950219d 3236 struct qed_dev *cdev = edev->cdev;
2950219d
YM		 3237 struct qed_update_vport_params vport_update_params;
3238 struct qed_queue_start_common_params q_params;
fefb0202 3239 struct qed_dev_info *qed_info = &edev->dev_info.common;
088c8618 3240 struct qed_start_vport_params start = {0};
961acdea 3241 bool reset_rss_indir = false;
2950219d
YM		 3242
3243 if (!edev->num_rss) {
3244 DP_ERR(edev,
3245 "Cannot update V-VPORT as active as there are no Rx queues\n");
3246 return -EINVAL;
3247 }
3248
55482edc 3249 start.gro_enable = !edev->gro_disable;
088c8618
MC		 3250 start.mtu = edev->ndev->mtu;
3251 start.vport_id = 0;
3252 start.drop_ttl0 = true;
3253 start.remove_inner_vlan = vlan_removal_en;
3254
3255 rc = edev->ops->vport_start(cdev, &start);
2950219d
YM		 3256
3257 if (rc) {
3258 DP_ERR(edev, "Start V-PORT failed %d\n", rc);
3259 return rc;
3260 }
3261
3262 DP_VERBOSE(edev, NETIF_MSG_IFUP,
3263 "Start vport ramrod passed, vport_id = %d, MTU = %d, vlan_removal_en = %d\n",
088c8618 3264 start.vport_id, edev->ndev->mtu + 0xe, vlan_removal_en);
2950219d
YM		 3265
3266 for_each_rss(i) {
3267 struct qede_fastpath *fp = &edev->fp_array[i];
3268 dma_addr_t phys_table = fp->rxq->rx_comp_ring.pbl.p_phys_table;
3269
3270 memset(&q_params, 0, sizeof(q_params));
3271 q_params.rss_id = i;
3272 q_params.queue_id = i;
3273 q_params.vport_id = 0;
3274 q_params.sb = fp->sb_info->igu_sb_id;
3275 q_params.sb_idx = RX_PI;
3276
3277 rc = edev->ops->q_rx_start(cdev, &q_params,
3278 fp->rxq->rx_buf_size,
3279 fp->rxq->rx_bd_ring.p_phys_addr,
3280 phys_table,
3281 fp->rxq->rx_comp_ring.page_cnt,
3282 &fp->rxq->hw_rxq_prod_addr);
3283 if (rc) {
3284 DP_ERR(edev, "Start RXQ #%d failed %d\n", i, rc);
3285 return rc;
3286 }
3287
3288 fp->rxq->hw_cons_ptr = &fp->sb_info->sb_virt->pi_array[RX_PI];
3289
3290 qede_update_rx_prod(edev, fp->rxq);
3291
3292 for (tc = 0; tc < edev->num_tc; tc++) {
3293 struct qede_tx_queue *txq = &fp->txqs[tc];
3294 int txq_index = tc * QEDE_RSS_CNT(edev) + i;
3295
3296 memset(&q_params, 0, sizeof(q_params));
3297 q_params.rss_id = i;
3298 q_params.queue_id = txq_index;
3299 q_params.vport_id = 0;
3300 q_params.sb = fp->sb_info->igu_sb_id;
3301 q_params.sb_idx = TX_PI(tc);
3302
3303 rc = edev->ops->q_tx_start(cdev, &q_params,
3304 txq->tx_pbl.pbl.p_phys_table,
3305 txq->tx_pbl.page_cnt,
3306 &txq->doorbell_addr);
3307 if (rc) {
3308 DP_ERR(edev, "Start TXQ #%d failed %d\n",
3309 txq_index, rc);
3310 return rc;
3311 }
3312
3313 txq->hw_cons_ptr =
3314 &fp->sb_info->sb_virt->pi_array[TX_PI(tc)];
3315 SET_FIELD(txq->tx_db.data.params,
3316 ETH_DB_DATA_DEST, DB_DEST_XCM);
3317 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_CMD,
3318 DB_AGG_CMD_SET);
3319 SET_FIELD(txq->tx_db.data.params,
3320 ETH_DB_DATA_AGG_VAL_SEL,
3321 DQ_XCM_ETH_TX_BD_PROD_CMD);
3322
3323 txq->tx_db.data.agg_flags = DQ_XCM_ETH_DQ_CF_CMD;
3324 }
3325 }
3326
3327 /* Prepare and send the vport enable */
3328 memset(&vport_update_params, 0, sizeof(vport_update_params));
088c8618 3329 vport_update_params.vport_id = start.vport_id;
2950219d
YM		 3330 vport_update_params.update_vport_active_flg = 1;
3331 vport_update_params.vport_active_flg = 1;
3332
831bfb0e
YM		 3333 if ((qed_info->mf_mode == QED_MF_NPAR || pci_num_vf(edev->pdev)) &&
3334 qed_info->tx_switching) {
3335 vport_update_params.update_tx_switching_flg = 1;
3336 vport_update_params.tx_switching_flg = 1;
3337 }
3338
2950219d
YM		 3339 /* Fill struct with RSS params */
3340 if (QEDE_RSS_CNT(edev) > 1) {
3341 vport_update_params.update_rss_flg = 1;
961acdea
SRK		 3342
3343 /* Need to validate current RSS config uses valid entries */
3344 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) {
3345 if (edev->rss_params.rss_ind_table[i] >=
3346 edev->num_rss) {
3347 reset_rss_indir = true;
3348 break;
3349 }
3350 }
3351
3352 if (!(edev->rss_params_inited & QEDE_RSS_INDIR_INITED) ||
3353 reset_rss_indir) {
3354 u16 val;
3355
3356 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) {
3357 u16 indir_val;
3358
3359 val = QEDE_RSS_CNT(edev);
3360 indir_val = ethtool_rxfh_indir_default(i, val);
3361 edev->rss_params.rss_ind_table[i] = indir_val;
3362 }
3363 edev->rss_params_inited |= QEDE_RSS_INDIR_INITED;
3364 }
3365
3366 if (!(edev->rss_params_inited & QEDE_RSS_KEY_INITED)) {
3367 netdev_rss_key_fill(edev->rss_params.rss_key,
3368 sizeof(edev->rss_params.rss_key));
3369 edev->rss_params_inited |= QEDE_RSS_KEY_INITED;
3370 }
3371
3372 if (!(edev->rss_params_inited & QEDE_RSS_CAPS_INITED)) {
3373 edev->rss_params.rss_caps = QED_RSS_IPV4 |
3374 QED_RSS_IPV6 |
3375 QED_RSS_IPV4_TCP |
3376 QED_RSS_IPV6_TCP;
3377 edev->rss_params_inited |= QEDE_RSS_CAPS_INITED;
3378 }
3379
3380 memcpy(&vport_update_params.rss_params, &edev->rss_params,
3381 sizeof(vport_update_params.rss_params));
2950219d 3382 } else {
961acdea
SRK		 3383 memset(&vport_update_params.rss_params, 0,
3384 sizeof(vport_update_params.rss_params));
2950219d 3385 }
2950219d
YM		 3386
3387 rc = edev->ops->vport_update(cdev, &vport_update_params);
3388 if (rc) {
3389 DP_ERR(edev, "Update V-PORT failed %d\n", rc);
3390 return rc;
3391 }
3392
3393 return 0;
3394}
3395
0d8e0aa0
SK		 3396static int qede_set_mcast_rx_mac(struct qede_dev *edev,
3397 enum qed_filter_xcast_params_type opcode,
3398 unsigned char *mac, int num_macs)
3399{
3400 struct qed_filter_params filter_cmd;
3401 int i;
3402
3403 memset(&filter_cmd, 0, sizeof(filter_cmd));
3404 filter_cmd.type = QED_FILTER_TYPE_MCAST;
3405 filter_cmd.filter.mcast.type = opcode;
3406 filter_cmd.filter.mcast.num = num_macs;
3407
3408 for (i = 0; i < num_macs; i++, mac += ETH_ALEN)
3409 ether_addr_copy(filter_cmd.filter.mcast.mac[i], mac);
3410
3411 return edev->ops->filter_config(edev->cdev, &filter_cmd);
3412}
3413
2950219d
YM		 3414enum qede_unload_mode {
3415 QEDE_UNLOAD_NORMAL,
3416};
3417
3418static void qede_unload(struct qede_dev *edev, enum qede_unload_mode mode)
3419{
a2ec6172 3420 struct qed_link_params link_params;
2950219d
YM		 3421 int rc;
3422
3423 DP_INFO(edev, "Starting qede unload\n");
3424
0d8e0aa0
SK		 3425 mutex_lock(&edev->qede_lock);
3426 edev->state = QEDE_STATE_CLOSED;
3427
2950219d
YM		 3428 /* Close OS Tx */
3429 netif_tx_disable(edev->ndev);
3430 netif_carrier_off(edev->ndev);
3431
a2ec6172
SK		 3432 /* Reset the link */
3433 memset(&link_params, 0, sizeof(link_params));
3434 link_params.link_up = false;
3435 edev->ops->common->set_link(edev->cdev, &link_params);
2950219d
YM		 3436 rc = qede_stop_queues(edev);
3437 if (rc) {
3438 qede_sync_free_irqs(edev);
3439 goto out;
3440 }
3441
3442 DP_INFO(edev, "Stopped Queues\n");
3443
7c1bfcad 3444 qede_vlan_mark_nonconfigured(edev);
2950219d
YM		 3445 edev->ops->fastpath_stop(edev->cdev);
3446
3447 /* Release the interrupts */
3448 qede_sync_free_irqs(edev);
3449 edev->ops->common->set_fp_int(edev->cdev, 0);
3450
3451 qede_napi_disable_remove(edev);
3452
3453 qede_free_mem_load(edev);
3454 qede_free_fp_array(edev);
3455
3456out:
3457 mutex_unlock(&edev->qede_lock);
3458 DP_INFO(edev, "Ending qede unload\n");
3459}
3460
3461enum qede_load_mode {
3462 QEDE_LOAD_NORMAL,
3463};
3464
3465static int qede_load(struct qede_dev *edev, enum qede_load_mode mode)
3466{
a2ec6172
SK		 3467 struct qed_link_params link_params;
3468 struct qed_link_output link_output;
2950219d
YM		 3469 int rc;
3470
3471 DP_INFO(edev, "Starting qede load\n");
3472
3473 rc = qede_set_num_queues(edev);
3474 if (rc)
3475 goto err0;
3476
3477 rc = qede_alloc_fp_array(edev);
3478 if (rc)
3479 goto err0;
3480
3481 qede_init_fp(edev);
3482
3483 rc = qede_alloc_mem_load(edev);
3484 if (rc)
3485 goto err1;
3486 DP_INFO(edev, "Allocated %d RSS queues on %d TC/s\n",
3487 QEDE_RSS_CNT(edev), edev->num_tc);
3488
3489 rc = qede_set_real_num_queues(edev);
3490 if (rc)
3491 goto err2;
3492
3493 qede_napi_add_enable(edev);
3494 DP_INFO(edev, "Napi added and enabled\n");
3495
3496 rc = qede_setup_irqs(edev);
3497 if (rc)
3498 goto err3;
3499 DP_INFO(edev, "Setup IRQs succeeded\n");
3500
3501 rc = qede_start_queues(edev);
3502 if (rc)
3503 goto err4;
3504 DP_INFO(edev, "Start VPORT, RXQ and TXQ succeeded\n");
3505
3506 /* Add primary mac and set Rx filters */
3507 ether_addr_copy(edev->primary_mac, edev->ndev->dev_addr);
3508
0d8e0aa0
SK		 3509 mutex_lock(&edev->qede_lock);
3510 edev->state = QEDE_STATE_OPEN;
3511 mutex_unlock(&edev->qede_lock);
a2ec6172 3512
7c1bfcad
SRK		 3513 /* Program un-configured VLANs */
3514 qede_configure_vlan_filters(edev);
3515
a2ec6172
SK		 3516 /* Ask for link-up using current configuration */
3517 memset(&link_params, 0, sizeof(link_params));
3518 link_params.link_up = true;
3519 edev->ops->common->set_link(edev->cdev, &link_params);
3520
3521 /* Query whether link is already-up */
3522 memset(&link_output, 0, sizeof(link_output));
3523 edev->ops->common->get_link(edev->cdev, &link_output);
3524 qede_link_update(edev, &link_output);
3525
2950219d
YM		 3526 DP_INFO(edev, "Ending successfully qede load\n");
3527
3528 return 0;
3529
3530err4:
3531 qede_sync_free_irqs(edev);
3532 memset(&edev->int_info.msix_cnt, 0, sizeof(struct qed_int_info));
3533err3:
3534 qede_napi_disable_remove(edev);
3535err2:
3536 qede_free_mem_load(edev);
3537err1:
3538 edev->ops->common->set_fp_int(edev->cdev, 0);
3539 qede_free_fp_array(edev);
3540 edev->num_rss = 0;
3541err0:
3542 return rc;
3543}
3544
133fac0e
SK		 3545void qede_reload(struct qede_dev *edev,
3546 void (*func)(struct qede_dev *, union qede_reload_args *),
3547 union qede_reload_args *args)
3548{
3549 qede_unload(edev, QEDE_UNLOAD_NORMAL);
3550 /* Call function handler to update parameters
3551 * needed for function load.
3552 */
3553 if (func)
3554 func(edev, args);
3555
3556 qede_load(edev, QEDE_LOAD_NORMAL);
3557
3558 mutex_lock(&edev->qede_lock);
3559 qede_config_rx_mode(edev->ndev);
3560 mutex_unlock(&edev->qede_lock);
3561}
3562
2950219d
YM		 3563/* called with rtnl_lock */
3564static int qede_open(struct net_device *ndev)
3565{
3566 struct qede_dev *edev = netdev_priv(ndev);
b18e170c 3567 int rc;
2950219d
YM		 3568
3569 netif_carrier_off(ndev);
3570
3571 edev->ops->common->set_power_state(edev->cdev, PCI_D0);
3572
b18e170c
MC		 3573 rc = qede_load(edev, QEDE_LOAD_NORMAL);
3574
3575 if (rc)
3576 return rc;
3577
3578#ifdef CONFIG_QEDE_VXLAN
3579 vxlan_get_rx_port(ndev);
9a109dd0
MC		 3580#endif
3581#ifdef CONFIG_QEDE_GENEVE
3582 geneve_get_rx_port(ndev);
b18e170c
MC		 3583#endif
3584 return 0;
2950219d
YM		 3585}
3586
3587static int qede_close(struct net_device *ndev)
3588{
3589 struct qede_dev *edev = netdev_priv(ndev);
3590
3591 qede_unload(edev, QEDE_UNLOAD_NORMAL);
3592
3593 return 0;
3594}
0d8e0aa0 3595
a2ec6172
SK		 3596static void qede_link_update(void *dev, struct qed_link_output *link)
3597{
3598 struct qede_dev *edev = dev;
3599
3600 if (!netif_running(edev->ndev)) {
3601 DP_VERBOSE(edev, NETIF_MSG_LINK, "Interface is not running\n");
3602 return;
3603 }
3604
3605 if (link->link_up) {
8e025ae2
YM		 3606 if (!netif_carrier_ok(edev->ndev)) {
3607 DP_NOTICE(edev, "Link is up\n");
3608 netif_tx_start_all_queues(edev->ndev);
3609 netif_carrier_on(edev->ndev);
3610 }
a2ec6172 3611 } else {
8e025ae2
YM		 3612 if (netif_carrier_ok(edev->ndev)) {
3613 DP_NOTICE(edev, "Link is down\n");
3614 netif_tx_disable(edev->ndev);
3615 netif_carrier_off(edev->ndev);
3616 }
a2ec6172
SK		 3617 }
3618}
3619
0d8e0aa0
SK		 3620static int qede_set_mac_addr(struct net_device *ndev, void *p)
3621{
3622 struct qede_dev *edev = netdev_priv(ndev);
3623 struct sockaddr *addr = p;
3624 int rc;
3625
3626 ASSERT_RTNL(); /* @@@TBD To be removed */
3627
3628 DP_INFO(edev, "Set_mac_addr called\n");
3629
3630 if (!is_valid_ether_addr(addr->sa_data)) {
3631 DP_NOTICE(edev, "The MAC address is not valid\n");
3632 return -EFAULT;
3633 }
3634
eff16960
YM		 3635 if (!edev->ops->check_mac(edev->cdev, addr->sa_data)) {
3636 DP_NOTICE(edev, "qed prevents setting MAC\n");
3637 return -EINVAL;
3638 }
3639
0d8e0aa0
SK		 3640 ether_addr_copy(ndev->dev_addr, addr->sa_data);
3641
3642 if (!netif_running(ndev)) {
3643 DP_NOTICE(edev, "The device is currently down\n");
3644 return 0;
3645 }
3646
3647 /* Remove the previous primary mac */
3648 rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL,
3649 edev->primary_mac);
3650 if (rc)
3651 return rc;
3652
3653 /* Add MAC filter according to the new unicast HW MAC address */
3654 ether_addr_copy(edev->primary_mac, ndev->dev_addr);
3655 return qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD,
3656 edev->primary_mac);
3657}
3658
3659static int
3660qede_configure_mcast_filtering(struct net_device *ndev,
3661 enum qed_filter_rx_mode_type *accept_flags)
3662{
3663 struct qede_dev *edev = netdev_priv(ndev);
3664 unsigned char *mc_macs, *temp;
3665 struct netdev_hw_addr *ha;
3666 int rc = 0, mc_count;
3667 size_t size;
3668
3669 size = 64 * ETH_ALEN;
3670
3671 mc_macs = kzalloc(size, GFP_KERNEL);
3672 if (!mc_macs) {
3673 DP_NOTICE(edev,
3674 "Failed to allocate memory for multicast MACs\n");
3675 rc = -ENOMEM;
3676 goto exit;
3677 }
3678
3679 temp = mc_macs;
3680
3681 /* Remove all previously configured MAC filters */
3682 rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL,
3683 mc_macs, 1);
3684 if (rc)
3685 goto exit;
3686
3687 netif_addr_lock_bh(ndev);
3688
3689 mc_count = netdev_mc_count(ndev);
3690 if (mc_count < 64) {
3691 netdev_for_each_mc_addr(ha, ndev) {
3692 ether_addr_copy(temp, ha->addr);
3693 temp += ETH_ALEN;
3694 }
3695 }
3696
3697 netif_addr_unlock_bh(ndev);
3698
3699 /* Check for all multicast @@@TBD resource allocation */
3700 if ((ndev->flags & IFF_ALLMULTI) ||
3701 (mc_count > 64)) {
3702 if (*accept_flags == QED_FILTER_RX_MODE_TYPE_REGULAR)
3703 *accept_flags = QED_FILTER_RX_MODE_TYPE_MULTI_PROMISC;
3704 } else {
3705 /* Add all multicast MAC filters */
3706 rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD,
3707 mc_macs, mc_count);
3708 }
3709
3710exit:
3711 kfree(mc_macs);
3712 return rc;
3713}
3714
3715static void qede_set_rx_mode(struct net_device *ndev)
3716{
3717 struct qede_dev *edev = netdev_priv(ndev);
3718
3719 DP_INFO(edev, "qede_set_rx_mode called\n");
3720
3721 if (edev->state != QEDE_STATE_OPEN) {
3722 DP_INFO(edev,
3723 "qede_set_rx_mode called while interface is down\n");
3724 } else {
3725 set_bit(QEDE_SP_RX_MODE, &edev->sp_flags);
3726 schedule_delayed_work(&edev->sp_task, 0);
3727 }
3728}
3729
3730/* Must be called with qede_lock held */
3731static void qede_config_rx_mode(struct net_device *ndev)
3732{
3733 enum qed_filter_rx_mode_type accept_flags = QED_FILTER_TYPE_UCAST;
3734 struct qede_dev *edev = netdev_priv(ndev);
3735 struct qed_filter_params rx_mode;
3736 unsigned char *uc_macs, *temp;
3737 struct netdev_hw_addr *ha;
3738 int rc, uc_count;
3739 size_t size;
3740
3741 netif_addr_lock_bh(ndev);
3742
3743 uc_count = netdev_uc_count(ndev);
3744 size = uc_count * ETH_ALEN;
3745
3746 uc_macs = kzalloc(size, GFP_ATOMIC);
3747 if (!uc_macs) {
3748 DP_NOTICE(edev, "Failed to allocate memory for unicast MACs\n");
3749 netif_addr_unlock_bh(ndev);
3750 return;
3751 }
3752
3753 temp = uc_macs;
3754 netdev_for_each_uc_addr(ha, ndev) {
3755 ether_addr_copy(temp, ha->addr);
3756 temp += ETH_ALEN;
3757 }
3758
3759 netif_addr_unlock_bh(ndev);
3760
3761 /* Configure the struct for the Rx mode */
3762 memset(&rx_mode, 0, sizeof(struct qed_filter_params));
3763 rx_mode.type = QED_FILTER_TYPE_RX_MODE;
3764
3765 /* Remove all previous unicast secondary macs and multicast macs
3766 * (configrue / leave the primary mac)
3767 */
3768 rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_REPLACE,
3769 edev->primary_mac);
3770 if (rc)
3771 goto out;
3772
3773 /* Check for promiscuous */
3774 if ((ndev->flags & IFF_PROMISC) ||
3775 (uc_count > 15)) { /* @@@TBD resource allocation - 1 */
3776 accept_flags = QED_FILTER_RX_MODE_TYPE_PROMISC;
3777 } else {
3778 /* Add MAC filters according to the unicast secondary macs */
3779 int i;
3780
3781 temp = uc_macs;
3782 for (i = 0; i < uc_count; i++) {
3783 rc = qede_set_ucast_rx_mac(edev,
3784 QED_FILTER_XCAST_TYPE_ADD,
3785 temp);
3786 if (rc)
3787 goto out;
3788
3789 temp += ETH_ALEN;
3790 }
3791
3792 rc = qede_configure_mcast_filtering(ndev, &accept_flags);
3793 if (rc)
3794 goto out;
3795 }
3796
7c1bfcad
SRK		 3797 /* take care of VLAN mode */
3798 if (ndev->flags & IFF_PROMISC) {
3799 qede_config_accept_any_vlan(edev, true);
3800 } else if (!edev->non_configured_vlans) {
3801 /* It's possible that accept_any_vlan mode is set due to a
3802 * previous setting of IFF_PROMISC. If vlan credits are
3803 * sufficient, disable accept_any_vlan.
3804 */
3805 qede_config_accept_any_vlan(edev, false);
3806 }
3807
0d8e0aa0
SK		 3808 rx_mode.filter.accept_flags = accept_flags;
3809 edev->ops->filter_config(edev->cdev, &rx_mode);
3810out:
3811 kfree(uc_macs);
3812}
Linux 6.x block layer and io_uring tree(s)