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qed: Improve VF interrupt reset
[linux-2.6-block.git] / drivers / net / ethernet / qlogic / qed / qed_sriov.c
CommitLineData
32a47e72
YM		 1/* QLogic qed NIC Driver
2 * Copyright (c) 2015 QLogic Corporation
3 *
4 * This software is available under the terms of the GNU General Public License
5 * (GPL) Version 2, available from the file COPYING in the main directory of
6 * this source tree.
7 */
8
dacd88d6 9#include <linux/etherdevice.h>
36558c3d 10#include <linux/crc32.h>
0b55e27d 11#include <linux/qed/qed_iov_if.h>
1408cc1f
YM		 12#include "qed_cxt.h"
13#include "qed_hsi.h"
32a47e72 14#include "qed_hw.h"
1408cc1f 15#include "qed_init_ops.h"
32a47e72 16#include "qed_int.h"
1408cc1f 17#include "qed_mcp.h"
32a47e72 18#include "qed_reg_addr.h"
1408cc1f 19#include "qed_sp.h"
32a47e72
YM		 20#include "qed_sriov.h"
21#include "qed_vf.h"
22
1408cc1f
YM		 23/* IOV ramrods */
24static int qed_sp_vf_start(struct qed_hwfn *p_hwfn,
25 u32 concrete_vfid, u16 opaque_vfid)
26{
27 struct vf_start_ramrod_data *p_ramrod = NULL;
28 struct qed_spq_entry *p_ent = NULL;
29 struct qed_sp_init_data init_data;
30 int rc = -EINVAL;
31
32 /* Get SPQ entry */
33 memset(&init_data, 0, sizeof(init_data));
34 init_data.cid = qed_spq_get_cid(p_hwfn);
35 init_data.opaque_fid = opaque_vfid;
36 init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
37
38 rc = qed_sp_init_request(p_hwfn, &p_ent,
39 COMMON_RAMROD_VF_START,
40 PROTOCOLID_COMMON, &init_data);
41 if (rc)
42 return rc;
43
44 p_ramrod = &p_ent->ramrod.vf_start;
45
46 p_ramrod->vf_id = GET_FIELD(concrete_vfid, PXP_CONCRETE_FID_VFID);
47 p_ramrod->opaque_fid = cpu_to_le16(opaque_vfid);
48
49 p_ramrod->personality = PERSONALITY_ETH;
50
51 return qed_spq_post(p_hwfn, p_ent, NULL);
52}
53
0b55e27d
YM		 54static int qed_sp_vf_stop(struct qed_hwfn *p_hwfn,
55 u32 concrete_vfid, u16 opaque_vfid)
56{
57 struct vf_stop_ramrod_data *p_ramrod = NULL;
58 struct qed_spq_entry *p_ent = NULL;
59 struct qed_sp_init_data init_data;
60 int rc = -EINVAL;
61
62 /* Get SPQ entry */
63 memset(&init_data, 0, sizeof(init_data));
64 init_data.cid = qed_spq_get_cid(p_hwfn);
65 init_data.opaque_fid = opaque_vfid;
66 init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
67
68 rc = qed_sp_init_request(p_hwfn, &p_ent,
69 COMMON_RAMROD_VF_STOP,
70 PROTOCOLID_COMMON, &init_data);
71 if (rc)
72 return rc;
73
74 p_ramrod = &p_ent->ramrod.vf_stop;
75
76 p_ramrod->vf_id = GET_FIELD(concrete_vfid, PXP_CONCRETE_FID_VFID);
77
78 return qed_spq_post(p_hwfn, p_ent, NULL);
79}
80
32a47e72
YM		 81bool qed_iov_is_valid_vfid(struct qed_hwfn *p_hwfn,
82 int rel_vf_id, bool b_enabled_only)
83{
84 if (!p_hwfn->pf_iov_info) {
85 DP_NOTICE(p_hwfn->cdev, "No iov info\n");
86 return false;
87 }
88
89 if ((rel_vf_id >= p_hwfn->cdev->p_iov_info->total_vfs) ||
90 (rel_vf_id < 0))
91 return false;
92
93 if ((!p_hwfn->pf_iov_info->vfs_array[rel_vf_id].b_init) &&
94 b_enabled_only)
95 return false;
96
97 return true;
98}
99
37bff2b9
YM		 100static struct qed_vf_info *qed_iov_get_vf_info(struct qed_hwfn *p_hwfn,
101 u16 relative_vf_id,
102 bool b_enabled_only)
103{
104 struct qed_vf_info *vf = NULL;
105
106 if (!p_hwfn->pf_iov_info) {
107 DP_NOTICE(p_hwfn->cdev, "No iov info\n");
108 return NULL;
109 }
110
111 if (qed_iov_is_valid_vfid(p_hwfn, relative_vf_id, b_enabled_only))
112 vf = &p_hwfn->pf_iov_info->vfs_array[relative_vf_id];
113 else
114 DP_ERR(p_hwfn, "qed_iov_get_vf_info: VF[%d] is not enabled\n",
115 relative_vf_id);
116
117 return vf;
118}
119
36558c3d
YM		 120int qed_iov_post_vf_bulletin(struct qed_hwfn *p_hwfn,
121 int vfid, struct qed_ptt *p_ptt)
122{
123 struct qed_bulletin_content *p_bulletin;
124 int crc_size = sizeof(p_bulletin->crc);
125 struct qed_dmae_params params;
126 struct qed_vf_info *p_vf;
127
128 p_vf = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
129 if (!p_vf)
130 return -EINVAL;
131
132 if (!p_vf->vf_bulletin)
133 return -EINVAL;
134
135 p_bulletin = p_vf->bulletin.p_virt;
136
137 /* Increment bulletin board version and compute crc */
138 p_bulletin->version++;
139 p_bulletin->crc = crc32(0, (u8 *)p_bulletin + crc_size,
140 p_vf->bulletin.size - crc_size);
141
142 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
143 "Posting Bulletin 0x%08x to VF[%d] (CRC 0x%08x)\n",
144 p_bulletin->version, p_vf->relative_vf_id, p_bulletin->crc);
145
146 /* propagate bulletin board via dmae to vm memory */
147 memset(&params, 0, sizeof(params));
148 params.flags = QED_DMAE_FLAG_VF_DST;
149 params.dst_vfid = p_vf->abs_vf_id;
150 return qed_dmae_host2host(p_hwfn, p_ptt, p_vf->bulletin.phys,
151 p_vf->vf_bulletin, p_vf->bulletin.size / 4,
152 &params);
153}
154
32a47e72
YM		 155static int qed_iov_pci_cfg_info(struct qed_dev *cdev)
156{
157 struct qed_hw_sriov_info *iov = cdev->p_iov_info;
158 int pos = iov->pos;
159
160 DP_VERBOSE(cdev, QED_MSG_IOV, "sriov ext pos %d\n", pos);
161 pci_read_config_word(cdev->pdev, pos + PCI_SRIOV_CTRL, &iov->ctrl);
162
163 pci_read_config_word(cdev->pdev,
164 pos + PCI_SRIOV_TOTAL_VF, &iov->total_vfs);
165 pci_read_config_word(cdev->pdev,
166 pos + PCI_SRIOV_INITIAL_VF, &iov->initial_vfs);
167
168 pci_read_config_word(cdev->pdev, pos + PCI_SRIOV_NUM_VF, &iov->num_vfs);
169 if (iov->num_vfs) {
170 DP_VERBOSE(cdev,
171 QED_MSG_IOV,
172 "Number of VFs are already set to non-zero value. Ignoring PCI configuration value\n");
173 iov->num_vfs = 0;
174 }
175
176 pci_read_config_word(cdev->pdev,
177 pos + PCI_SRIOV_VF_OFFSET, &iov->offset);
178
179 pci_read_config_word(cdev->pdev,
180 pos + PCI_SRIOV_VF_STRIDE, &iov->stride);
181
182 pci_read_config_word(cdev->pdev,
183 pos + PCI_SRIOV_VF_DID, &iov->vf_device_id);
184
185 pci_read_config_dword(cdev->pdev,
186 pos + PCI_SRIOV_SUP_PGSIZE, &iov->pgsz);
187
188 pci_read_config_dword(cdev->pdev, pos + PCI_SRIOV_CAP, &iov->cap);
189
190 pci_read_config_byte(cdev->pdev, pos + PCI_SRIOV_FUNC_LINK, &iov->link);
191
192 DP_VERBOSE(cdev,
193 QED_MSG_IOV,
194 "IOV info: nres %d, cap 0x%x, ctrl 0x%x, total %d, initial %d, num vfs %d, offset %d, stride %d, page size 0x%x\n",
195 iov->nres,
196 iov->cap,
197 iov->ctrl,
198 iov->total_vfs,
199 iov->initial_vfs,
200 iov->nr_virtfn, iov->offset, iov->stride, iov->pgsz);
201
202 /* Some sanity checks */
203 if (iov->num_vfs > NUM_OF_VFS(cdev) ||
204 iov->total_vfs > NUM_OF_VFS(cdev)) {
205 /* This can happen only due to a bug. In this case we set
206 * num_vfs to zero to avoid memory corruption in the code that
207 * assumes max number of vfs
208 */
209 DP_NOTICE(cdev,
210 "IOV: Unexpected number of vfs set: %d setting num_vf to zero\n",
211 iov->num_vfs);
212
213 iov->num_vfs = 0;
214 iov->total_vfs = 0;
215 }
216
217 return 0;
218}
219
220static void qed_iov_clear_vf_igu_blocks(struct qed_hwfn *p_hwfn,
221 struct qed_ptt *p_ptt)
222{
223 struct qed_igu_block *p_sb;
224 u16 sb_id;
225 u32 val;
226
227 if (!p_hwfn->hw_info.p_igu_info) {
228 DP_ERR(p_hwfn,
229 "qed_iov_clear_vf_igu_blocks IGU Info not initialized\n");
230 return;
231 }
232
233 for (sb_id = 0; sb_id < QED_MAPPING_MEMORY_SIZE(p_hwfn->cdev);
234 sb_id++) {
235 p_sb = &p_hwfn->hw_info.p_igu_info->igu_map.igu_blocks[sb_id];
236 if ((p_sb->status & QED_IGU_STATUS_FREE) &&
237 !(p_sb->status & QED_IGU_STATUS_PF)) {
238 val = qed_rd(p_hwfn, p_ptt,
239 IGU_REG_MAPPING_MEMORY + sb_id * 4);
240 SET_FIELD(val, IGU_MAPPING_LINE_VALID, 0);
241 qed_wr(p_hwfn, p_ptt,
242 IGU_REG_MAPPING_MEMORY + 4 * sb_id, val);
243 }
244 }
245}
246
247static void qed_iov_setup_vfdb(struct qed_hwfn *p_hwfn)
248{
249 struct qed_hw_sriov_info *p_iov = p_hwfn->cdev->p_iov_info;
250 struct qed_pf_iov *p_iov_info = p_hwfn->pf_iov_info;
251 struct qed_bulletin_content *p_bulletin_virt;
252 dma_addr_t req_p, rply_p, bulletin_p;
253 union pfvf_tlvs *p_reply_virt_addr;
254 union vfpf_tlvs *p_req_virt_addr;
255 u8 idx = 0;
256
257 memset(p_iov_info->vfs_array, 0, sizeof(p_iov_info->vfs_array));
258
259 p_req_virt_addr = p_iov_info->mbx_msg_virt_addr;
260 req_p = p_iov_info->mbx_msg_phys_addr;
261 p_reply_virt_addr = p_iov_info->mbx_reply_virt_addr;
262 rply_p = p_iov_info->mbx_reply_phys_addr;
263 p_bulletin_virt = p_iov_info->p_bulletins;
264 bulletin_p = p_iov_info->bulletins_phys;
265 if (!p_req_virt_addr || !p_reply_virt_addr || !p_bulletin_virt) {
266 DP_ERR(p_hwfn,
267 "qed_iov_setup_vfdb called without allocating mem first\n");
268 return;
269 }
270
271 for (idx = 0; idx < p_iov->total_vfs; idx++) {
272 struct qed_vf_info *vf = &p_iov_info->vfs_array[idx];
273 u32 concrete;
274
275 vf->vf_mbx.req_virt = p_req_virt_addr + idx;
276 vf->vf_mbx.req_phys = req_p + idx * sizeof(union vfpf_tlvs);
277 vf->vf_mbx.reply_virt = p_reply_virt_addr + idx;
278 vf->vf_mbx.reply_phys = rply_p + idx * sizeof(union pfvf_tlvs);
279
280 vf->state = VF_STOPPED;
281 vf->b_init = false;
282
283 vf->bulletin.phys = idx *
284 sizeof(struct qed_bulletin_content) +
285 bulletin_p;
286 vf->bulletin.p_virt = p_bulletin_virt + idx;
287 vf->bulletin.size = sizeof(struct qed_bulletin_content);
288
289 vf->relative_vf_id = idx;
290 vf->abs_vf_id = idx + p_iov->first_vf_in_pf;
291 concrete = qed_vfid_to_concrete(p_hwfn, vf->abs_vf_id);
292 vf->concrete_fid = concrete;
293 vf->opaque_fid = (p_hwfn->hw_info.opaque_fid & 0xff) |
294 (vf->abs_vf_id << 8);
295 vf->vport_id = idx + 1;
296 }
297}
298
299static int qed_iov_allocate_vfdb(struct qed_hwfn *p_hwfn)
300{
301 struct qed_pf_iov *p_iov_info = p_hwfn->pf_iov_info;
302 void **p_v_addr;
303 u16 num_vfs = 0;
304
305 num_vfs = p_hwfn->cdev->p_iov_info->total_vfs;
306
307 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
308 "qed_iov_allocate_vfdb for %d VFs\n", num_vfs);
309
310 /* Allocate PF Mailbox buffer (per-VF) */
311 p_iov_info->mbx_msg_size = sizeof(union vfpf_tlvs) * num_vfs;
312 p_v_addr = &p_iov_info->mbx_msg_virt_addr;
313 *p_v_addr = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
314 p_iov_info->mbx_msg_size,
315 &p_iov_info->mbx_msg_phys_addr,
316 GFP_KERNEL);
317 if (!*p_v_addr)
318 return -ENOMEM;
319
320 /* Allocate PF Mailbox Reply buffer (per-VF) */
321 p_iov_info->mbx_reply_size = sizeof(union pfvf_tlvs) * num_vfs;
322 p_v_addr = &p_iov_info->mbx_reply_virt_addr;
323 *p_v_addr = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
324 p_iov_info->mbx_reply_size,
325 &p_iov_info->mbx_reply_phys_addr,
326 GFP_KERNEL);
327 if (!*p_v_addr)
328 return -ENOMEM;
329
330 p_iov_info->bulletins_size = sizeof(struct qed_bulletin_content) *
331 num_vfs;
332 p_v_addr = &p_iov_info->p_bulletins;
333 *p_v_addr = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
334 p_iov_info->bulletins_size,
335 &p_iov_info->bulletins_phys,
336 GFP_KERNEL);
337 if (!*p_v_addr)
338 return -ENOMEM;
339
340 DP_VERBOSE(p_hwfn,
341 QED_MSG_IOV,
342 "PF's Requests mailbox [%p virt 0x%llx phys], Response mailbox [%p virt 0x%llx phys] Bulletins [%p virt 0x%llx phys]\n",
343 p_iov_info->mbx_msg_virt_addr,
344 (u64) p_iov_info->mbx_msg_phys_addr,
345 p_iov_info->mbx_reply_virt_addr,
346 (u64) p_iov_info->mbx_reply_phys_addr,
347 p_iov_info->p_bulletins, (u64) p_iov_info->bulletins_phys);
348
349 return 0;
350}
351
352static void qed_iov_free_vfdb(struct qed_hwfn *p_hwfn)
353{
354 struct qed_pf_iov *p_iov_info = p_hwfn->pf_iov_info;
355
356 if (p_hwfn->pf_iov_info->mbx_msg_virt_addr)
357 dma_free_coherent(&p_hwfn->cdev->pdev->dev,
358 p_iov_info->mbx_msg_size,
359 p_iov_info->mbx_msg_virt_addr,
360 p_iov_info->mbx_msg_phys_addr);
361
362 if (p_hwfn->pf_iov_info->mbx_reply_virt_addr)
363 dma_free_coherent(&p_hwfn->cdev->pdev->dev,
364 p_iov_info->mbx_reply_size,
365 p_iov_info->mbx_reply_virt_addr,
366 p_iov_info->mbx_reply_phys_addr);
367
368 if (p_iov_info->p_bulletins)
369 dma_free_coherent(&p_hwfn->cdev->pdev->dev,
370 p_iov_info->bulletins_size,
371 p_iov_info->p_bulletins,
372 p_iov_info->bulletins_phys);
373}
374
375int qed_iov_alloc(struct qed_hwfn *p_hwfn)
376{
377 struct qed_pf_iov *p_sriov;
378
379 if (!IS_PF_SRIOV(p_hwfn)) {
380 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
381 "No SR-IOV - no need for IOV db\n");
382 return 0;
383 }
384
385 p_sriov = kzalloc(sizeof(*p_sriov), GFP_KERNEL);
386 if (!p_sriov) {
387 DP_NOTICE(p_hwfn, "Failed to allocate `struct qed_sriov'\n");
388 return -ENOMEM;
389 }
390
391 p_hwfn->pf_iov_info = p_sriov;
392
393 return qed_iov_allocate_vfdb(p_hwfn);
394}
395
396void qed_iov_setup(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
397{
398 if (!IS_PF_SRIOV(p_hwfn) || !IS_PF_SRIOV_ALLOC(p_hwfn))
399 return;
400
401 qed_iov_setup_vfdb(p_hwfn);
402 qed_iov_clear_vf_igu_blocks(p_hwfn, p_ptt);
403}
404
405void qed_iov_free(struct qed_hwfn *p_hwfn)
406{
407 if (IS_PF_SRIOV_ALLOC(p_hwfn)) {
408 qed_iov_free_vfdb(p_hwfn);
409 kfree(p_hwfn->pf_iov_info);
410 }
411}
412
413void qed_iov_free_hw_info(struct qed_dev *cdev)
414{
415 kfree(cdev->p_iov_info);
416 cdev->p_iov_info = NULL;
417}
418
419int qed_iov_hw_info(struct qed_hwfn *p_hwfn)
420{
421 struct qed_dev *cdev = p_hwfn->cdev;
422 int pos;
423 int rc;
424
1408cc1f
YM		 425 if (IS_VF(p_hwfn->cdev))
426 return 0;
427
32a47e72
YM		 428 /* Learn the PCI configuration */
429 pos = pci_find_ext_capability(p_hwfn->cdev->pdev,
430 PCI_EXT_CAP_ID_SRIOV);
431 if (!pos) {
432 DP_VERBOSE(p_hwfn, QED_MSG_IOV, "No PCIe IOV support\n");
433 return 0;
434 }
435
436 /* Allocate a new struct for IOV information */
437 cdev->p_iov_info = kzalloc(sizeof(*cdev->p_iov_info), GFP_KERNEL);
438 if (!cdev->p_iov_info) {
439 DP_NOTICE(p_hwfn, "Can't support IOV due to lack of memory\n");
440 return -ENOMEM;
441 }
442 cdev->p_iov_info->pos = pos;
443
444 rc = qed_iov_pci_cfg_info(cdev);
445 if (rc)
446 return rc;
447
448 /* We want PF IOV to be synonemous with the existance of p_iov_info;
449 * In case the capability is published but there are no VFs, simply
450 * de-allocate the struct.
451 */
452 if (!cdev->p_iov_info->total_vfs) {
453 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
454 "IOV capabilities, but no VFs are published\n");
455 kfree(cdev->p_iov_info);
456 cdev->p_iov_info = NULL;
457 return 0;
458 }
459
460 /* Calculate the first VF index - this is a bit tricky; Basically,
461 * VFs start at offset 16 relative to PF0, and 2nd engine VFs begin
462 * after the first engine's VFs.
463 */
464 cdev->p_iov_info->first_vf_in_pf = p_hwfn->cdev->p_iov_info->offset +
465 p_hwfn->abs_pf_id - 16;
466 if (QED_PATH_ID(p_hwfn))
467 cdev->p_iov_info->first_vf_in_pf -= MAX_NUM_VFS_BB;
468
469 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
470 "First VF in hwfn 0x%08x\n",
471 cdev->p_iov_info->first_vf_in_pf);
472
473 return 0;
474}
475
37bff2b9
YM		 476static bool qed_iov_pf_sanity_check(struct qed_hwfn *p_hwfn, int vfid)
477{
478 /* Check PF supports sriov */
b0409fa0
YM		 479 if (IS_VF(p_hwfn->cdev) || !IS_QED_SRIOV(p_hwfn->cdev) ||
480 !IS_PF_SRIOV_ALLOC(p_hwfn))
37bff2b9
YM		 481 return false;
482
483 /* Check VF validity */
b0409fa0 484 if (!qed_iov_is_valid_vfid(p_hwfn, vfid, true))
37bff2b9
YM		 485 return false;
486
487 return true;
488}
489
0b55e27d
YM		 490static void qed_iov_set_vf_to_disable(struct qed_dev *cdev,
491 u16 rel_vf_id, u8 to_disable)
492{
493 struct qed_vf_info *vf;
494 int i;
495
496 for_each_hwfn(cdev, i) {
497 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
498
499 vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, false);
500 if (!vf)
501 continue;
502
503 vf->to_disable = to_disable;
504 }
505}
506
507void qed_iov_set_vfs_to_disable(struct qed_dev *cdev, u8 to_disable)
508{
509 u16 i;
510
511 if (!IS_QED_SRIOV(cdev))
512 return;
513
514 for (i = 0; i < cdev->p_iov_info->total_vfs; i++)
515 qed_iov_set_vf_to_disable(cdev, i, to_disable);
516}
517
1408cc1f
YM		 518static void qed_iov_vf_pglue_clear_err(struct qed_hwfn *p_hwfn,
519 struct qed_ptt *p_ptt, u8 abs_vfid)
520{
521 qed_wr(p_hwfn, p_ptt,
522 PGLUE_B_REG_WAS_ERROR_VF_31_0_CLR + (abs_vfid >> 5) * 4,
523 1 << (abs_vfid & 0x1f));
524}
525
dacd88d6
YM		 526static void qed_iov_vf_igu_reset(struct qed_hwfn *p_hwfn,
527 struct qed_ptt *p_ptt, struct qed_vf_info *vf)
528{
dacd88d6
YM		 529 int i;
530
531 /* Set VF masks and configuration - pretend */
532 qed_fid_pretend(p_hwfn, p_ptt, (u16) vf->concrete_fid);
533
534 qed_wr(p_hwfn, p_ptt, IGU_REG_STATISTIC_NUM_VF_MSG_SENT, 0);
535
dacd88d6
YM		 536 /* unpretend */
537 qed_fid_pretend(p_hwfn, p_ptt, (u16) p_hwfn->hw_info.concrete_fid);
538
539 /* iterate over all queues, clear sb consumer */
b2b897eb
YM		 540 for (i = 0; i < vf->num_sbs; i++)
541 qed_int_igu_init_pure_rt_single(p_hwfn, p_ptt,
542 vf->igu_sbs[i],
543 vf->opaque_fid, true);
dacd88d6
YM		 544}
545
0b55e27d
YM		 546static void qed_iov_vf_igu_set_int(struct qed_hwfn *p_hwfn,
547 struct qed_ptt *p_ptt,
548 struct qed_vf_info *vf, bool enable)
549{
550 u32 igu_vf_conf;
551
552 qed_fid_pretend(p_hwfn, p_ptt, (u16) vf->concrete_fid);
553
554 igu_vf_conf = qed_rd(p_hwfn, p_ptt, IGU_REG_VF_CONFIGURATION);
555
556 if (enable)
557 igu_vf_conf |= IGU_VF_CONF_MSI_MSIX_EN;
558 else
559 igu_vf_conf &= ~IGU_VF_CONF_MSI_MSIX_EN;
560
561 qed_wr(p_hwfn, p_ptt, IGU_REG_VF_CONFIGURATION, igu_vf_conf);
562
563 /* unpretend */
564 qed_fid_pretend(p_hwfn, p_ptt, (u16) p_hwfn->hw_info.concrete_fid);
565}
566
1408cc1f
YM		 567static int qed_iov_enable_vf_access(struct qed_hwfn *p_hwfn,
568 struct qed_ptt *p_ptt,
569 struct qed_vf_info *vf)
570{
571 u32 igu_vf_conf = IGU_VF_CONF_FUNC_EN;
572 int rc;
573
0b55e27d
YM		 574 if (vf->to_disable)
575 return 0;
576
1408cc1f
YM		 577 DP_VERBOSE(p_hwfn,
578 QED_MSG_IOV,
579 "Enable internal access for vf %x [abs %x]\n",
580 vf->abs_vf_id, QED_VF_ABS_ID(p_hwfn, vf));
581
582 qed_iov_vf_pglue_clear_err(p_hwfn, p_ptt, QED_VF_ABS_ID(p_hwfn, vf));
583
b2b897eb
YM		 584 qed_iov_vf_igu_reset(p_hwfn, p_ptt, vf);
585
1408cc1f
YM		 586 rc = qed_mcp_config_vf_msix(p_hwfn, p_ptt, vf->abs_vf_id, vf->num_sbs);
587 if (rc)
588 return rc;
589
590 qed_fid_pretend(p_hwfn, p_ptt, (u16) vf->concrete_fid);
591
592 SET_FIELD(igu_vf_conf, IGU_VF_CONF_PARENT, p_hwfn->rel_pf_id);
593 STORE_RT_REG(p_hwfn, IGU_REG_VF_CONFIGURATION_RT_OFFSET, igu_vf_conf);
594
595 qed_init_run(p_hwfn, p_ptt, PHASE_VF, vf->abs_vf_id,
596 p_hwfn->hw_info.hw_mode);
597
598 /* unpretend */
599 qed_fid_pretend(p_hwfn, p_ptt, (u16) p_hwfn->hw_info.concrete_fid);
600
601 if (vf->state != VF_STOPPED) {
602 DP_NOTICE(p_hwfn, "VF[%02x] is already started\n",
603 vf->abs_vf_id);
604 return -EINVAL;
605 }
606
607 /* Start VF */
608 rc = qed_sp_vf_start(p_hwfn, vf->concrete_fid, vf->opaque_fid);
609 if (rc)
610 DP_NOTICE(p_hwfn, "Failed to start VF[%02x]\n", vf->abs_vf_id);
611
612 vf->state = VF_FREE;
613
614 return rc;
615}
616
0b55e27d
YM		 617/**
618 * @brief qed_iov_config_perm_table - configure the permission
619 * zone table.
620 * In E4, queue zone permission table size is 320x9. There
621 * are 320 VF queues for single engine device (256 for dual
622 * engine device), and each entry has the following format:
623 * {Valid, VF[7:0]}
624 * @param p_hwfn
625 * @param p_ptt
626 * @param vf
627 * @param enable
628 */
629static void qed_iov_config_perm_table(struct qed_hwfn *p_hwfn,
630 struct qed_ptt *p_ptt,
631 struct qed_vf_info *vf, u8 enable)
632{
633 u32 reg_addr, val;
634 u16 qzone_id = 0;
635 int qid;
636
637 for (qid = 0; qid < vf->num_rxqs; qid++) {
638 qed_fw_l2_queue(p_hwfn, vf->vf_queues[qid].fw_rx_qid,
639 &qzone_id);
640
641 reg_addr = PSWHST_REG_ZONE_PERMISSION_TABLE + qzone_id * 4;
642 val = enable ? (vf->abs_vf_id | (1 << 8)) : 0;
643 qed_wr(p_hwfn, p_ptt, reg_addr, val);
644 }
645}
646
dacd88d6
YM		 647static void qed_iov_enable_vf_traffic(struct qed_hwfn *p_hwfn,
648 struct qed_ptt *p_ptt,
649 struct qed_vf_info *vf)
650{
651 /* Reset vf in IGU - interrupts are still disabled */
652 qed_iov_vf_igu_reset(p_hwfn, p_ptt, vf);
653
654 qed_iov_vf_igu_set_int(p_hwfn, p_ptt, vf, 1);
655
656 /* Permission Table */
657 qed_iov_config_perm_table(p_hwfn, p_ptt, vf, true);
658}
659
1408cc1f
YM		 660static u8 qed_iov_alloc_vf_igu_sbs(struct qed_hwfn *p_hwfn,
661 struct qed_ptt *p_ptt,
662 struct qed_vf_info *vf, u16 num_rx_queues)
663{
664 struct qed_igu_block *igu_blocks;
665 int qid = 0, igu_id = 0;
666 u32 val = 0;
667
668 igu_blocks = p_hwfn->hw_info.p_igu_info->igu_map.igu_blocks;
669
670 if (num_rx_queues > p_hwfn->hw_info.p_igu_info->free_blks)
671 num_rx_queues = p_hwfn->hw_info.p_igu_info->free_blks;
672 p_hwfn->hw_info.p_igu_info->free_blks -= num_rx_queues;
673
674 SET_FIELD(val, IGU_MAPPING_LINE_FUNCTION_NUMBER, vf->abs_vf_id);
675 SET_FIELD(val, IGU_MAPPING_LINE_VALID, 1);
676 SET_FIELD(val, IGU_MAPPING_LINE_PF_VALID, 0);
677
678 while ((qid < num_rx_queues) &&
679 (igu_id < QED_MAPPING_MEMORY_SIZE(p_hwfn->cdev))) {
680 if (igu_blocks[igu_id].status & QED_IGU_STATUS_FREE) {
681 struct cau_sb_entry sb_entry;
682
683 vf->igu_sbs[qid] = (u16)igu_id;
684 igu_blocks[igu_id].status &= ~QED_IGU_STATUS_FREE;
685
686 SET_FIELD(val, IGU_MAPPING_LINE_VECTOR_NUMBER, qid);
687
688 qed_wr(p_hwfn, p_ptt,
689 IGU_REG_MAPPING_MEMORY + sizeof(u32) * igu_id,
690 val);
691
692 /* Configure igu sb in CAU which were marked valid */
693 qed_init_cau_sb_entry(p_hwfn, &sb_entry,
694 p_hwfn->rel_pf_id,
695 vf->abs_vf_id, 1);
696 qed_dmae_host2grc(p_hwfn, p_ptt,
697 (u64)(uintptr_t)&sb_entry,
698 CAU_REG_SB_VAR_MEMORY +
699 igu_id * sizeof(u64), 2, 0);
700 qid++;
701 }
702 igu_id++;
703 }
704
705 vf->num_sbs = (u8) num_rx_queues;
706
707 return vf->num_sbs;
708}
709
0b55e27d
YM		 710static void qed_iov_free_vf_igu_sbs(struct qed_hwfn *p_hwfn,
711 struct qed_ptt *p_ptt,
712 struct qed_vf_info *vf)
713{
714 struct qed_igu_info *p_info = p_hwfn->hw_info.p_igu_info;
715 int idx, igu_id;
716 u32 addr, val;
717
718 /* Invalidate igu CAM lines and mark them as free */
719 for (idx = 0; idx < vf->num_sbs; idx++) {
720 igu_id = vf->igu_sbs[idx];
721 addr = IGU_REG_MAPPING_MEMORY + sizeof(u32) * igu_id;
722
723 val = qed_rd(p_hwfn, p_ptt, addr);
724 SET_FIELD(val, IGU_MAPPING_LINE_VALID, 0);
725 qed_wr(p_hwfn, p_ptt, addr, val);
726
727 p_info->igu_map.igu_blocks[igu_id].status |=
728 QED_IGU_STATUS_FREE;
729
730 p_hwfn->hw_info.p_igu_info->free_blks++;
731 }
732
733 vf->num_sbs = 0;
734}
735
1408cc1f
YM		 736static int qed_iov_init_hw_for_vf(struct qed_hwfn *p_hwfn,
737 struct qed_ptt *p_ptt,
738 u16 rel_vf_id, u16 num_rx_queues)
739{
740 u8 num_of_vf_avaiable_chains = 0;
741 struct qed_vf_info *vf = NULL;
742 int rc = 0;
743 u32 cids;
744 u8 i;
745
746 vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, false);
747 if (!vf) {
748 DP_ERR(p_hwfn, "qed_iov_init_hw_for_vf : vf is NULL\n");
749 return -EINVAL;
750 }
751
752 if (vf->b_init) {
753 DP_NOTICE(p_hwfn, "VF[%d] is already active.\n", rel_vf_id);
754 return -EINVAL;
755 }
756
757 /* Limit number of queues according to number of CIDs */
758 qed_cxt_get_proto_cid_count(p_hwfn, PROTOCOLID_ETH, &cids);
759 DP_VERBOSE(p_hwfn,
760 QED_MSG_IOV,
761 "VF[%d] - requesting to initialize for 0x%04x queues [0x%04x CIDs available]\n",
762 vf->relative_vf_id, num_rx_queues, (u16) cids);
763 num_rx_queues = min_t(u16, num_rx_queues, ((u16) cids));
764
765 num_of_vf_avaiable_chains = qed_iov_alloc_vf_igu_sbs(p_hwfn,
766 p_ptt,
767 vf,
768 num_rx_queues);
769 if (!num_of_vf_avaiable_chains) {
770 DP_ERR(p_hwfn, "no available igu sbs\n");
771 return -ENOMEM;
772 }
773
774 /* Choose queue number and index ranges */
775 vf->num_rxqs = num_of_vf_avaiable_chains;
776 vf->num_txqs = num_of_vf_avaiable_chains;
777
778 for (i = 0; i < vf->num_rxqs; i++) {
779 u16 queue_id = qed_int_queue_id_from_sb_id(p_hwfn,
780 vf->igu_sbs[i]);
781
782 if (queue_id > RESC_NUM(p_hwfn, QED_L2_QUEUE)) {
783 DP_NOTICE(p_hwfn,
784 "VF[%d] will require utilizing of out-of-bounds queues - %04x\n",
785 vf->relative_vf_id, queue_id);
786 return -EINVAL;
787 }
788
789 /* CIDs are per-VF, so no problem having them 0-based. */
790 vf->vf_queues[i].fw_rx_qid = queue_id;
791 vf->vf_queues[i].fw_tx_qid = queue_id;
792 vf->vf_queues[i].fw_cid = i;
793
794 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
795 "VF[%d] - [%d] SB %04x, Tx/Rx queue %04x CID %04x\n",
796 vf->relative_vf_id, i, vf->igu_sbs[i], queue_id, i);
797 }
798 rc = qed_iov_enable_vf_access(p_hwfn, p_ptt, vf);
799 if (!rc) {
800 vf->b_init = true;
801
802 if (IS_LEAD_HWFN(p_hwfn))
803 p_hwfn->cdev->p_iov_info->num_vfs++;
804 }
805
806 return rc;
807}
808
0b55e27d
YM		 809static int qed_iov_release_hw_for_vf(struct qed_hwfn *p_hwfn,
810 struct qed_ptt *p_ptt, u16 rel_vf_id)
811{
812 struct qed_vf_info *vf = NULL;
813 int rc = 0;
814
815 vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, true);
816 if (!vf) {
817 DP_ERR(p_hwfn, "qed_iov_release_hw_for_vf : vf is NULL\n");
818 return -EINVAL;
819 }
820
36558c3d
YM		 821 if (vf->bulletin.p_virt)
822 memset(vf->bulletin.p_virt, 0, sizeof(*vf->bulletin.p_virt));
823
824 memset(&vf->p_vf_info, 0, sizeof(vf->p_vf_info));
825
0b55e27d
YM		 826 if (vf->state != VF_STOPPED) {
827 /* Stopping the VF */
828 rc = qed_sp_vf_stop(p_hwfn, vf->concrete_fid, vf->opaque_fid);
829
830 if (rc != 0) {
831 DP_ERR(p_hwfn, "qed_sp_vf_stop returned error %d\n",
832 rc);
833 return rc;
834 }
835
836 vf->state = VF_STOPPED;
837 }
838
839 /* disablng interrupts and resetting permission table was done during
840 * vf-close, however, we could get here without going through vf_close
841 */
842 /* Disable Interrupts for VF */
843 qed_iov_vf_igu_set_int(p_hwfn, p_ptt, vf, 0);
844
845 /* Reset Permission table */
846 qed_iov_config_perm_table(p_hwfn, p_ptt, vf, 0);
847
848 vf->num_rxqs = 0;
849 vf->num_txqs = 0;
850 qed_iov_free_vf_igu_sbs(p_hwfn, p_ptt, vf);
851
852 if (vf->b_init) {
853 vf->b_init = false;
854
855 if (IS_LEAD_HWFN(p_hwfn))
856 p_hwfn->cdev->p_iov_info->num_vfs--;
857 }
858
859 return 0;
860}
861
37bff2b9
YM		 862static bool qed_iov_tlv_supported(u16 tlvtype)
863{
864 return CHANNEL_TLV_NONE < tlvtype && tlvtype < CHANNEL_TLV_MAX;
865}
866
867/* place a given tlv on the tlv buffer, continuing current tlv list */
868void *qed_add_tlv(struct qed_hwfn *p_hwfn, u8 **offset, u16 type, u16 length)
869{
870 struct channel_tlv *tl = (struct channel_tlv *)*offset;
871
872 tl->type = type;
873 tl->length = length;
874
875 /* Offset should keep pointing to next TLV (the end of the last) */
876 *offset += length;
877
878 /* Return a pointer to the start of the added tlv */
879 return *offset - length;
880}
881
882/* list the types and lengths of the tlvs on the buffer */
883void qed_dp_tlv_list(struct qed_hwfn *p_hwfn, void *tlvs_list)
884{
885 u16 i = 1, total_length = 0;
886 struct channel_tlv *tlv;
887
888 do {
889 tlv = (struct channel_tlv *)((u8 *)tlvs_list + total_length);
890
891 /* output tlv */
892 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
893 "TLV number %d: type %d, length %d\n",
894 i, tlv->type, tlv->length);
895
896 if (tlv->type == CHANNEL_TLV_LIST_END)
897 return;
898
899 /* Validate entry - protect against malicious VFs */
900 if (!tlv->length) {
901 DP_NOTICE(p_hwfn, "TLV of length 0 found\n");
902 return;
903 }
904
905 total_length += tlv->length;
906
907 if (total_length >= sizeof(struct tlv_buffer_size)) {
908 DP_NOTICE(p_hwfn, "TLV ==> Buffer overflow\n");
909 return;
910 }
911
912 i++;
913 } while (1);
914}
915
916static void qed_iov_send_response(struct qed_hwfn *p_hwfn,
917 struct qed_ptt *p_ptt,
918 struct qed_vf_info *p_vf,
919 u16 length, u8 status)
920{
921 struct qed_iov_vf_mbx *mbx = &p_vf->vf_mbx;
922 struct qed_dmae_params params;
923 u8 eng_vf_id;
924
925 mbx->reply_virt->default_resp.hdr.status = status;
926
927 qed_dp_tlv_list(p_hwfn, mbx->reply_virt);
928
929 eng_vf_id = p_vf->abs_vf_id;
930
931 memset(&params, 0, sizeof(struct qed_dmae_params));
932 params.flags = QED_DMAE_FLAG_VF_DST;
933 params.dst_vfid = eng_vf_id;
934
935 qed_dmae_host2host(p_hwfn, p_ptt, mbx->reply_phys + sizeof(u64),
936 mbx->req_virt->first_tlv.reply_address +
937 sizeof(u64),
938 (sizeof(union pfvf_tlvs) - sizeof(u64)) / 4,
939 &params);
940
941 qed_dmae_host2host(p_hwfn, p_ptt, mbx->reply_phys,
942 mbx->req_virt->first_tlv.reply_address,
943 sizeof(u64) / 4, &params);
944
945 REG_WR(p_hwfn,
946 GTT_BAR0_MAP_REG_USDM_RAM +
947 USTORM_VF_PF_CHANNEL_READY_OFFSET(eng_vf_id), 1);
948}
949
dacd88d6
YM		 950static u16 qed_iov_vport_to_tlv(struct qed_hwfn *p_hwfn,
951 enum qed_iov_vport_update_flag flag)
952{
953 switch (flag) {
954 case QED_IOV_VP_UPDATE_ACTIVATE:
955 return CHANNEL_TLV_VPORT_UPDATE_ACTIVATE;
17b235c1
YM		 956 case QED_IOV_VP_UPDATE_VLAN_STRIP:
957 return CHANNEL_TLV_VPORT_UPDATE_VLAN_STRIP;
958 case QED_IOV_VP_UPDATE_TX_SWITCH:
959 return CHANNEL_TLV_VPORT_UPDATE_TX_SWITCH;
dacd88d6
YM		 960 case QED_IOV_VP_UPDATE_MCAST:
961 return CHANNEL_TLV_VPORT_UPDATE_MCAST;
962 case QED_IOV_VP_UPDATE_ACCEPT_PARAM:
963 return CHANNEL_TLV_VPORT_UPDATE_ACCEPT_PARAM;
964 case QED_IOV_VP_UPDATE_RSS:
965 return CHANNEL_TLV_VPORT_UPDATE_RSS;
17b235c1
YM		 966 case QED_IOV_VP_UPDATE_ACCEPT_ANY_VLAN:
967 return CHANNEL_TLV_VPORT_UPDATE_ACCEPT_ANY_VLAN;
968 case QED_IOV_VP_UPDATE_SGE_TPA:
969 return CHANNEL_TLV_VPORT_UPDATE_SGE_TPA;
dacd88d6
YM		 970 default:
971 return 0;
972 }
973}
974
975static u16 qed_iov_prep_vp_update_resp_tlvs(struct qed_hwfn *p_hwfn,
976 struct qed_vf_info *p_vf,
977 struct qed_iov_vf_mbx *p_mbx,
978 u8 status,
979 u16 tlvs_mask, u16 tlvs_accepted)
980{
981 struct pfvf_def_resp_tlv *resp;
982 u16 size, total_len, i;
983
984 memset(p_mbx->reply_virt, 0, sizeof(union pfvf_tlvs));
985 p_mbx->offset = (u8 *)p_mbx->reply_virt;
986 size = sizeof(struct pfvf_def_resp_tlv);
987 total_len = size;
988
989 qed_add_tlv(p_hwfn, &p_mbx->offset, CHANNEL_TLV_VPORT_UPDATE, size);
990
991 /* Prepare response for all extended tlvs if they are found by PF */
992 for (i = 0; i < QED_IOV_VP_UPDATE_MAX; i++) {
993 if (!(tlvs_mask & (1 << i)))
994 continue;
995
996 resp = qed_add_tlv(p_hwfn, &p_mbx->offset,
997 qed_iov_vport_to_tlv(p_hwfn, i), size);
998
999 if (tlvs_accepted & (1 << i))
1000 resp->hdr.status = status;
1001 else
1002 resp->hdr.status = PFVF_STATUS_NOT_SUPPORTED;
1003
1004 DP_VERBOSE(p_hwfn,
1005 QED_MSG_IOV,
1006 "VF[%d] - vport_update response: TLV %d, status %02x\n",
1007 p_vf->relative_vf_id,
1008 qed_iov_vport_to_tlv(p_hwfn, i), resp->hdr.status);
1009
1010 total_len += size;
1011 }
1012
1013 qed_add_tlv(p_hwfn, &p_mbx->offset, CHANNEL_TLV_LIST_END,
1014 sizeof(struct channel_list_end_tlv));
1015
1016 return total_len;
1017}
1018
37bff2b9
YM		 1019static void qed_iov_prepare_resp(struct qed_hwfn *p_hwfn,
1020 struct qed_ptt *p_ptt,
1021 struct qed_vf_info *vf_info,
1022 u16 type, u16 length, u8 status)
1023{
1024 struct qed_iov_vf_mbx *mbx = &vf_info->vf_mbx;
1025
1026 mbx->offset = (u8 *)mbx->reply_virt;
1027
1028 qed_add_tlv(p_hwfn, &mbx->offset, type, length);
1029 qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_LIST_END,
1030 sizeof(struct channel_list_end_tlv));
1031
1032 qed_iov_send_response(p_hwfn, p_ptt, vf_info, length, status);
1033}
1034
0b55e27d
YM		 1035struct qed_public_vf_info *qed_iov_get_public_vf_info(struct qed_hwfn *p_hwfn,
1036 u16 relative_vf_id,
1037 bool b_enabled_only)
1038{
1039 struct qed_vf_info *vf = NULL;
1040
1041 vf = qed_iov_get_vf_info(p_hwfn, relative_vf_id, b_enabled_only);
1042 if (!vf)
1043 return NULL;
1044
1045 return &vf->p_vf_info;
1046}
1047
1048void qed_iov_clean_vf(struct qed_hwfn *p_hwfn, u8 vfid)
1049{
1050 struct qed_public_vf_info *vf_info;
1051
1052 vf_info = qed_iov_get_public_vf_info(p_hwfn, vfid, false);
1053
1054 if (!vf_info)
1055 return;
1056
1057 /* Clear the VF mac */
1058 memset(vf_info->mac, 0, ETH_ALEN);
1059}
1060
1061static void qed_iov_vf_cleanup(struct qed_hwfn *p_hwfn,
1062 struct qed_vf_info *p_vf)
1063{
1064 u32 i;
1065
1066 p_vf->vf_bulletin = 0;
dacd88d6 1067 p_vf->vport_instance = 0;
0b55e27d
YM		 1068 p_vf->num_mac_filters = 0;
1069 p_vf->num_vlan_filters = 0;
08feecd7 1070 p_vf->configured_features = 0;
0b55e27d
YM		 1071
1072 /* If VF previously requested less resources, go back to default */
1073 p_vf->num_rxqs = p_vf->num_sbs;
1074 p_vf->num_txqs = p_vf->num_sbs;
1075
dacd88d6
YM		 1076 p_vf->num_active_rxqs = 0;
1077
0b55e27d
YM		 1078 for (i = 0; i < QED_MAX_VF_CHAINS_PER_PF; i++)
1079 p_vf->vf_queues[i].rxq_active = 0;
1080
08feecd7 1081 memset(&p_vf->shadow_config, 0, sizeof(p_vf->shadow_config));
0b55e27d
YM		 1082 qed_iov_clean_vf(p_hwfn, p_vf->relative_vf_id);
1083}
1084
1408cc1f
YM		 1085static void qed_iov_vf_mbx_acquire(struct qed_hwfn *p_hwfn,
1086 struct qed_ptt *p_ptt,
1087 struct qed_vf_info *vf)
37bff2b9 1088{
1408cc1f
YM		 1089 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
1090 struct pfvf_acquire_resp_tlv *resp = &mbx->reply_virt->acquire_resp;
1091 struct pf_vf_pfdev_info *pfdev_info = &resp->pfdev_info;
1092 struct vfpf_acquire_tlv *req = &mbx->req_virt->acquire;
1093 u8 i, vfpf_status = PFVF_STATUS_SUCCESS;
1094 struct pf_vf_resc *resc = &resp->resc;
1095
1096 /* Validate FW compatibility */
1097 if (req->vfdev_info.fw_major != FW_MAJOR_VERSION ||
1098 req->vfdev_info.fw_minor != FW_MINOR_VERSION ||
1099 req->vfdev_info.fw_revision != FW_REVISION_VERSION ||
1100 req->vfdev_info.fw_engineering != FW_ENGINEERING_VERSION) {
1101 DP_INFO(p_hwfn,
1102 "VF[%d] is running an incompatible driver [VF needs FW %02x:%02x:%02x:%02x but Hypervisor is using %02x:%02x:%02x:%02x]\n",
1103 vf->abs_vf_id,
1104 req->vfdev_info.fw_major,
1105 req->vfdev_info.fw_minor,
1106 req->vfdev_info.fw_revision,
1107 req->vfdev_info.fw_engineering,
1108 FW_MAJOR_VERSION,
1109 FW_MINOR_VERSION,
1110 FW_REVISION_VERSION, FW_ENGINEERING_VERSION);
1111 vfpf_status = PFVF_STATUS_NOT_SUPPORTED;
1112 goto out;
1113 }
1114
1115 /* On 100g PFs, prevent old VFs from loading */
1116 if ((p_hwfn->cdev->num_hwfns > 1) &&
1117 !(req->vfdev_info.capabilities & VFPF_ACQUIRE_CAP_100G)) {
1118 DP_INFO(p_hwfn,
1119 "VF[%d] is running an old driver that doesn't support 100g\n",
1120 vf->abs_vf_id);
1121 vfpf_status = PFVF_STATUS_NOT_SUPPORTED;
1122 goto out;
1123 }
1124
1125 memset(resp, 0, sizeof(*resp));
1126
1127 /* Fill in vf info stuff */
1128 vf->opaque_fid = req->vfdev_info.opaque_fid;
1129 vf->num_mac_filters = 1;
1130 vf->num_vlan_filters = QED_ETH_VF_NUM_VLAN_FILTERS;
1131
1132 vf->vf_bulletin = req->bulletin_addr;
1133 vf->bulletin.size = (vf->bulletin.size < req->bulletin_size) ?
1134 vf->bulletin.size : req->bulletin_size;
1135
1136 /* fill in pfdev info */
1137 pfdev_info->chip_num = p_hwfn->cdev->chip_num;
1138 pfdev_info->db_size = 0;
1139 pfdev_info->indices_per_sb = PIS_PER_SB;
1140
1141 pfdev_info->capabilities = PFVF_ACQUIRE_CAP_DEFAULT_UNTAGGED |
1142 PFVF_ACQUIRE_CAP_POST_FW_OVERRIDE;
1143 if (p_hwfn->cdev->num_hwfns > 1)
1144 pfdev_info->capabilities |= PFVF_ACQUIRE_CAP_100G;
1145
1146 pfdev_info->stats_info.mstats.address =
1147 PXP_VF_BAR0_START_MSDM_ZONE_B +
1148 offsetof(struct mstorm_vf_zone, non_trigger.eth_queue_stat);
1149 pfdev_info->stats_info.mstats.len =
1150 sizeof(struct eth_mstorm_per_queue_stat);
1151
1152 pfdev_info->stats_info.ustats.address =
1153 PXP_VF_BAR0_START_USDM_ZONE_B +
1154 offsetof(struct ustorm_vf_zone, non_trigger.eth_queue_stat);
1155 pfdev_info->stats_info.ustats.len =
1156 sizeof(struct eth_ustorm_per_queue_stat);
1157
1158 pfdev_info->stats_info.pstats.address =
1159 PXP_VF_BAR0_START_PSDM_ZONE_B +
1160 offsetof(struct pstorm_vf_zone, non_trigger.eth_queue_stat);
1161 pfdev_info->stats_info.pstats.len =
1162 sizeof(struct eth_pstorm_per_queue_stat);
1163
1164 pfdev_info->stats_info.tstats.address = 0;
1165 pfdev_info->stats_info.tstats.len = 0;
1166
1167 memcpy(pfdev_info->port_mac, p_hwfn->hw_info.hw_mac_addr, ETH_ALEN);
1168
1169 pfdev_info->fw_major = FW_MAJOR_VERSION;
1170 pfdev_info->fw_minor = FW_MINOR_VERSION;
1171 pfdev_info->fw_rev = FW_REVISION_VERSION;
1172 pfdev_info->fw_eng = FW_ENGINEERING_VERSION;
1173 pfdev_info->os_type = VFPF_ACQUIRE_OS_LINUX;
1174 qed_mcp_get_mfw_ver(p_hwfn, p_ptt, &pfdev_info->mfw_ver, NULL);
1175
1176 pfdev_info->dev_type = p_hwfn->cdev->type;
1177 pfdev_info->chip_rev = p_hwfn->cdev->chip_rev;
1178
1179 resc->num_rxqs = vf->num_rxqs;
1180 resc->num_txqs = vf->num_txqs;
1181 resc->num_sbs = vf->num_sbs;
1182 for (i = 0; i < resc->num_sbs; i++) {
1183 resc->hw_sbs[i].hw_sb_id = vf->igu_sbs[i];
1184 resc->hw_sbs[i].sb_qid = 0;
1185 }
1186
1187 for (i = 0; i < resc->num_rxqs; i++) {
1188 qed_fw_l2_queue(p_hwfn, vf->vf_queues[i].fw_rx_qid,
1189 (u16 *)&resc->hw_qid[i]);
1190 resc->cid[i] = vf->vf_queues[i].fw_cid;
1191 }
1192
1193 resc->num_mac_filters = min_t(u8, vf->num_mac_filters,
1194 req->resc_request.num_mac_filters);
1195 resc->num_vlan_filters = min_t(u8, vf->num_vlan_filters,
1196 req->resc_request.num_vlan_filters);
1197
1198 /* This isn't really required as VF isn't limited, but some VFs might
1199 * actually test this value, so need to provide it.
1200 */
1201 resc->num_mc_filters = req->resc_request.num_mc_filters;
1202
1203 /* Fill agreed size of bulletin board in response */
1204 resp->bulletin_size = vf->bulletin.size;
36558c3d 1205 qed_iov_post_vf_bulletin(p_hwfn, vf->relative_vf_id, p_ptt);
1408cc1f
YM		 1206
1207 DP_VERBOSE(p_hwfn,
1208 QED_MSG_IOV,
1209 "VF[%d] ACQUIRE_RESPONSE: pfdev_info- chip_num=0x%x, db_size=%d, idx_per_sb=%d, pf_cap=0x%llx\n"
1210 "resources- n_rxq-%d, n_txq-%d, n_sbs-%d, n_macs-%d, n_vlans-%d\n",
1211 vf->abs_vf_id,
1212 resp->pfdev_info.chip_num,
1213 resp->pfdev_info.db_size,
1214 resp->pfdev_info.indices_per_sb,
1215 resp->pfdev_info.capabilities,
1216 resc->num_rxqs,
1217 resc->num_txqs,
1218 resc->num_sbs,
1219 resc->num_mac_filters,
1220 resc->num_vlan_filters);
1221 vf->state = VF_ACQUIRED;
1222
1223 /* Prepare Response */
1224out:
1225 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_ACQUIRE,
1226 sizeof(struct pfvf_acquire_resp_tlv), vfpf_status);
37bff2b9
YM		 1227}
1228
6ddc7608
YM		 1229static int __qed_iov_spoofchk_set(struct qed_hwfn *p_hwfn,
1230 struct qed_vf_info *p_vf, bool val)
1231{
1232 struct qed_sp_vport_update_params params;
1233 int rc;
1234
1235 if (val == p_vf->spoof_chk) {
1236 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
1237 "Spoofchk value[%d] is already configured\n", val);
1238 return 0;
1239 }
1240
1241 memset(&params, 0, sizeof(struct qed_sp_vport_update_params));
1242 params.opaque_fid = p_vf->opaque_fid;
1243 params.vport_id = p_vf->vport_id;
1244 params.update_anti_spoofing_en_flg = 1;
1245 params.anti_spoofing_en = val;
1246
1247 rc = qed_sp_vport_update(p_hwfn, &params, QED_SPQ_MODE_EBLOCK, NULL);
1248 if (rc) {
1249 p_vf->spoof_chk = val;
1250 p_vf->req_spoofchk_val = p_vf->spoof_chk;
1251 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
1252 "Spoofchk val[%d] configured\n", val);
1253 } else {
1254 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
1255 "Spoofchk configuration[val:%d] failed for VF[%d]\n",
1256 val, p_vf->relative_vf_id);
1257 }
1258
1259 return rc;
1260}
1261
08feecd7
YM		 1262static int qed_iov_reconfigure_unicast_vlan(struct qed_hwfn *p_hwfn,
1263 struct qed_vf_info *p_vf)
1264{
1265 struct qed_filter_ucast filter;
1266 int rc = 0;
1267 int i;
1268
1269 memset(&filter, 0, sizeof(filter));
1270 filter.is_rx_filter = 1;
1271 filter.is_tx_filter = 1;
1272 filter.vport_to_add_to = p_vf->vport_id;
1273 filter.opcode = QED_FILTER_ADD;
1274
1275 /* Reconfigure vlans */
1276 for (i = 0; i < QED_ETH_VF_NUM_VLAN_FILTERS + 1; i++) {
1277 if (!p_vf->shadow_config.vlans[i].used)
1278 continue;
1279
1280 filter.type = QED_FILTER_VLAN;
1281 filter.vlan = p_vf->shadow_config.vlans[i].vid;
1282 DP_VERBOSE(p_hwfn,
1283 QED_MSG_IOV,
1284 "Reconfiguring VLAN [0x%04x] for VF [%04x]\n",
1285 filter.vlan, p_vf->relative_vf_id);
1286 rc = qed_sp_eth_filter_ucast(p_hwfn,
1287 p_vf->opaque_fid,
1288 &filter,
1289 QED_SPQ_MODE_CB, NULL);
1290 if (rc) {
1291 DP_NOTICE(p_hwfn,
1292 "Failed to configure VLAN [%04x] to VF [%04x]\n",
1293 filter.vlan, p_vf->relative_vf_id);
1294 break;
1295 }
1296 }
1297
1298 return rc;
1299}
1300
1301static int
1302qed_iov_reconfigure_unicast_shadow(struct qed_hwfn *p_hwfn,
1303 struct qed_vf_info *p_vf, u64 events)
1304{
1305 int rc = 0;
1306
1307 if ((events & (1 << VLAN_ADDR_FORCED)) &&
1308 !(p_vf->configured_features & (1 << VLAN_ADDR_FORCED)))
1309 rc = qed_iov_reconfigure_unicast_vlan(p_hwfn, p_vf);
1310
1311 return rc;
1312}
1313
1314static int qed_iov_configure_vport_forced(struct qed_hwfn *p_hwfn,
1315 struct qed_vf_info *p_vf, u64 events)
1316{
1317 int rc = 0;
1318 struct qed_filter_ucast filter;
1319
1320 if (!p_vf->vport_instance)
1321 return -EINVAL;
1322
eff16960
YM		 1323 if (events & (1 << MAC_ADDR_FORCED)) {
1324 /* Since there's no way [currently] of removing the MAC,
1325 * we can always assume this means we need to force it.
1326 */
1327 memset(&filter, 0, sizeof(filter));
1328 filter.type = QED_FILTER_MAC;
1329 filter.opcode = QED_FILTER_REPLACE;
1330 filter.is_rx_filter = 1;
1331 filter.is_tx_filter = 1;
1332 filter.vport_to_add_to = p_vf->vport_id;
1333 ether_addr_copy(filter.mac, p_vf->bulletin.p_virt->mac);
1334
1335 rc = qed_sp_eth_filter_ucast(p_hwfn, p_vf->opaque_fid,
1336 &filter, QED_SPQ_MODE_CB, NULL);
1337 if (rc) {
1338 DP_NOTICE(p_hwfn,
1339 "PF failed to configure MAC for VF\n");
1340 return rc;
1341 }
1342
1343 p_vf->configured_features |= 1 << MAC_ADDR_FORCED;
1344 }
1345
08feecd7
YM		 1346 if (events & (1 << VLAN_ADDR_FORCED)) {
1347 struct qed_sp_vport_update_params vport_update;
1348 u8 removal;
1349 int i;
1350
1351 memset(&filter, 0, sizeof(filter));
1352 filter.type = QED_FILTER_VLAN;
1353 filter.is_rx_filter = 1;
1354 filter.is_tx_filter = 1;
1355 filter.vport_to_add_to = p_vf->vport_id;
1356 filter.vlan = p_vf->bulletin.p_virt->pvid;
1357 filter.opcode = filter.vlan ? QED_FILTER_REPLACE :
1358 QED_FILTER_FLUSH;
1359
1360 /* Send the ramrod */
1361 rc = qed_sp_eth_filter_ucast(p_hwfn, p_vf->opaque_fid,
1362 &filter, QED_SPQ_MODE_CB, NULL);
1363 if (rc) {
1364 DP_NOTICE(p_hwfn,
1365 "PF failed to configure VLAN for VF\n");
1366 return rc;
1367 }
1368
1369 /* Update the default-vlan & silent vlan stripping */
1370 memset(&vport_update, 0, sizeof(vport_update));
1371 vport_update.opaque_fid = p_vf->opaque_fid;
1372 vport_update.vport_id = p_vf->vport_id;
1373 vport_update.update_default_vlan_enable_flg = 1;
1374 vport_update.default_vlan_enable_flg = filter.vlan ? 1 : 0;
1375 vport_update.update_default_vlan_flg = 1;
1376 vport_update.default_vlan = filter.vlan;
1377
1378 vport_update.update_inner_vlan_removal_flg = 1;
1379 removal = filter.vlan ? 1
1380 : p_vf->shadow_config.inner_vlan_removal;
1381 vport_update.inner_vlan_removal_flg = removal;
1382 vport_update.silent_vlan_removal_flg = filter.vlan ? 1 : 0;
1383 rc = qed_sp_vport_update(p_hwfn,
1384 &vport_update,
1385 QED_SPQ_MODE_EBLOCK, NULL);
1386 if (rc) {
1387 DP_NOTICE(p_hwfn,
1388 "PF failed to configure VF vport for vlan\n");
1389 return rc;
1390 }
1391
1392 /* Update all the Rx queues */
1393 for (i = 0; i < QED_MAX_VF_CHAINS_PER_PF; i++) {
1394 u16 qid;
1395
1396 if (!p_vf->vf_queues[i].rxq_active)
1397 continue;
1398
1399 qid = p_vf->vf_queues[i].fw_rx_qid;
1400
1401 rc = qed_sp_eth_rx_queues_update(p_hwfn, qid,
1402 1, 0, 1,
1403 QED_SPQ_MODE_EBLOCK,
1404 NULL);
1405 if (rc) {
1406 DP_NOTICE(p_hwfn,
1407 "Failed to send Rx update fo queue[0x%04x]\n",
1408 qid);
1409 return rc;
1410 }
1411 }
1412
1413 if (filter.vlan)
1414 p_vf->configured_features |= 1 << VLAN_ADDR_FORCED;
1415 else
1416 p_vf->configured_features &= ~(1 << VLAN_ADDR_FORCED);
1417 }
1418
1419 /* If forced features are terminated, we need to configure the shadow
1420 * configuration back again.
1421 */
1422 if (events)
1423 qed_iov_reconfigure_unicast_shadow(p_hwfn, p_vf, events);
1424
1425 return rc;
1426}
1427
dacd88d6
YM		 1428static void qed_iov_vf_mbx_start_vport(struct qed_hwfn *p_hwfn,
1429 struct qed_ptt *p_ptt,
1430 struct qed_vf_info *vf)
1431{
1432 struct qed_sp_vport_start_params params = { 0 };
1433 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
1434 struct vfpf_vport_start_tlv *start;
1435 u8 status = PFVF_STATUS_SUCCESS;
1436 struct qed_vf_info *vf_info;
08feecd7 1437 u64 *p_bitmap;
dacd88d6
YM		 1438 int sb_id;
1439 int rc;
1440
1441 vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vf->relative_vf_id, true);
1442 if (!vf_info) {
1443 DP_NOTICE(p_hwfn->cdev,
1444 "Failed to get VF info, invalid vfid [%d]\n",
1445 vf->relative_vf_id);
1446 return;
1447 }
1448
1449 vf->state = VF_ENABLED;
1450 start = &mbx->req_virt->start_vport;
1451
1452 /* Initialize Status block in CAU */
1453 for (sb_id = 0; sb_id < vf->num_sbs; sb_id++) {
1454 if (!start->sb_addr[sb_id]) {
1455 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
1456 "VF[%d] did not fill the address of SB %d\n",
1457 vf->relative_vf_id, sb_id);
1458 break;
1459 }
1460
1461 qed_int_cau_conf_sb(p_hwfn, p_ptt,
1462 start->sb_addr[sb_id],
1463 vf->igu_sbs[sb_id],
1464 vf->abs_vf_id, 1);
1465 }
1466 qed_iov_enable_vf_traffic(p_hwfn, p_ptt, vf);
1467
1468 vf->mtu = start->mtu;
08feecd7
YM		 1469 vf->shadow_config.inner_vlan_removal = start->inner_vlan_removal;
1470
1471 /* Take into consideration configuration forced by hypervisor;
1472 * If none is configured, use the supplied VF values [for old
1473 * vfs that would still be fine, since they passed '0' as padding].
1474 */
1475 p_bitmap = &vf_info->bulletin.p_virt->valid_bitmap;
1476 if (!(*p_bitmap & (1 << VFPF_BULLETIN_UNTAGGED_DEFAULT_FORCED))) {
1477 u8 vf_req = start->only_untagged;
1478
1479 vf_info->bulletin.p_virt->default_only_untagged = vf_req;
1480 *p_bitmap |= 1 << VFPF_BULLETIN_UNTAGGED_DEFAULT;
1481 }
dacd88d6
YM		 1482
1483 params.tpa_mode = start->tpa_mode;
1484 params.remove_inner_vlan = start->inner_vlan_removal;
831bfb0e 1485 params.tx_switching = true;
dacd88d6 1486
08feecd7 1487 params.only_untagged = vf_info->bulletin.p_virt->default_only_untagged;
dacd88d6
YM		 1488 params.drop_ttl0 = false;
1489 params.concrete_fid = vf->concrete_fid;
1490 params.opaque_fid = vf->opaque_fid;
1491 params.vport_id = vf->vport_id;
1492 params.max_buffers_per_cqe = start->max_buffers_per_cqe;
1493 params.mtu = vf->mtu;
1494
1495 rc = qed_sp_eth_vport_start(p_hwfn, &params);
1496 if (rc != 0) {
1497 DP_ERR(p_hwfn,
1498 "qed_iov_vf_mbx_start_vport returned error %d\n", rc);
1499 status = PFVF_STATUS_FAILURE;
1500 } else {
1501 vf->vport_instance++;
08feecd7
YM		 1502
1503 /* Force configuration if needed on the newly opened vport */
1504 qed_iov_configure_vport_forced(p_hwfn, vf, *p_bitmap);
6ddc7608
YM		 1505
1506 __qed_iov_spoofchk_set(p_hwfn, vf, vf->req_spoofchk_val);
dacd88d6
YM		 1507 }
1508 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_VPORT_START,
1509 sizeof(struct pfvf_def_resp_tlv), status);
1510}
1511
1512static void qed_iov_vf_mbx_stop_vport(struct qed_hwfn *p_hwfn,
1513 struct qed_ptt *p_ptt,
1514 struct qed_vf_info *vf)
1515{
1516 u8 status = PFVF_STATUS_SUCCESS;
1517 int rc;
1518
1519 vf->vport_instance--;
6ddc7608 1520 vf->spoof_chk = false;
dacd88d6
YM		 1521
1522 rc = qed_sp_vport_stop(p_hwfn, vf->opaque_fid, vf->vport_id);
1523 if (rc != 0) {
1524 DP_ERR(p_hwfn, "qed_iov_vf_mbx_stop_vport returned error %d\n",
1525 rc);
1526 status = PFVF_STATUS_FAILURE;
1527 }
1528
08feecd7
YM		 1529 /* Forget the configuration on the vport */
1530 vf->configured_features = 0;
1531 memset(&vf->shadow_config, 0, sizeof(vf->shadow_config));
1532
dacd88d6
YM		 1533 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_VPORT_TEARDOWN,
1534 sizeof(struct pfvf_def_resp_tlv), status);
1535}
1536
1537#define TSTORM_QZONE_START PXP_VF_BAR0_START_SDM_ZONE_A
1538#define MSTORM_QZONE_START(dev) (TSTORM_QZONE_START + \
1539 (TSTORM_QZONE_SIZE * NUM_OF_L2_QUEUES(dev)))
1540
1541static void qed_iov_vf_mbx_start_rxq_resp(struct qed_hwfn *p_hwfn,
1542 struct qed_ptt *p_ptt,
1543 struct qed_vf_info *vf, u8 status)
1544{
1545 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
1546 struct pfvf_start_queue_resp_tlv *p_tlv;
1547 struct vfpf_start_rxq_tlv *req;
1548
1549 mbx->offset = (u8 *)mbx->reply_virt;
1550
1551 p_tlv = qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_START_RXQ,
1552 sizeof(*p_tlv));
1553 qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_LIST_END,
1554 sizeof(struct channel_list_end_tlv));
1555
1556 /* Update the TLV with the response */
1557 if (status == PFVF_STATUS_SUCCESS) {
1558 u16 hw_qid = 0;
1559
1560 req = &mbx->req_virt->start_rxq;
1561 qed_fw_l2_queue(p_hwfn, vf->vf_queues[req->rx_qid].fw_rx_qid,
1562 &hw_qid);
1563
1564 p_tlv->offset = MSTORM_QZONE_START(p_hwfn->cdev) +
1565 hw_qid * MSTORM_QZONE_SIZE +
1566 offsetof(struct mstorm_eth_queue_zone,
1567 rx_producers);
1568 }
1569
1570 qed_iov_send_response(p_hwfn, p_ptt, vf, sizeof(*p_tlv), status);
1571}
1572
1573static void qed_iov_vf_mbx_start_rxq(struct qed_hwfn *p_hwfn,
1574 struct qed_ptt *p_ptt,
1575 struct qed_vf_info *vf)
1576{
1577 struct qed_queue_start_common_params params;
1578 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
1579 u8 status = PFVF_STATUS_SUCCESS;
1580 struct vfpf_start_rxq_tlv *req;
1581 int rc;
1582
1583 memset(&params, 0, sizeof(params));
1584 req = &mbx->req_virt->start_rxq;
1585 params.queue_id = vf->vf_queues[req->rx_qid].fw_rx_qid;
1586 params.vport_id = vf->vport_id;
1587 params.sb = req->hw_sb;
1588 params.sb_idx = req->sb_index;
1589
1590 rc = qed_sp_eth_rxq_start_ramrod(p_hwfn, vf->opaque_fid,
1591 vf->vf_queues[req->rx_qid].fw_cid,
1592 &params,
1593 vf->abs_vf_id + 0x10,
1594 req->bd_max_bytes,
1595 req->rxq_addr,
1596 req->cqe_pbl_addr, req->cqe_pbl_size);
1597
1598 if (rc) {
1599 status = PFVF_STATUS_FAILURE;
1600 } else {
1601 vf->vf_queues[req->rx_qid].rxq_active = true;
1602 vf->num_active_rxqs++;
1603 }
1604
1605 qed_iov_vf_mbx_start_rxq_resp(p_hwfn, p_ptt, vf, status);
1606}
1607
1608static void qed_iov_vf_mbx_start_txq(struct qed_hwfn *p_hwfn,
1609 struct qed_ptt *p_ptt,
1610 struct qed_vf_info *vf)
1611{
1612 u16 length = sizeof(struct pfvf_def_resp_tlv);
1613 struct qed_queue_start_common_params params;
1614 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
1615 union qed_qm_pq_params pq_params;
1616 u8 status = PFVF_STATUS_SUCCESS;
1617 struct vfpf_start_txq_tlv *req;
1618 int rc;
1619
1620 /* Prepare the parameters which would choose the right PQ */
1621 memset(&pq_params, 0, sizeof(pq_params));
1622 pq_params.eth.is_vf = 1;
1623 pq_params.eth.vf_id = vf->relative_vf_id;
1624
1625 memset(&params, 0, sizeof(params));
1626 req = &mbx->req_virt->start_txq;
1627 params.queue_id = vf->vf_queues[req->tx_qid].fw_tx_qid;
1628 params.vport_id = vf->vport_id;
1629 params.sb = req->hw_sb;
1630 params.sb_idx = req->sb_index;
1631
1632 rc = qed_sp_eth_txq_start_ramrod(p_hwfn,
1633 vf->opaque_fid,
1634 vf->vf_queues[req->tx_qid].fw_cid,
1635 &params,
1636 vf->abs_vf_id + 0x10,
1637 req->pbl_addr,
1638 req->pbl_size, &pq_params);
1639
1640 if (rc)
1641 status = PFVF_STATUS_FAILURE;
1642 else
1643 vf->vf_queues[req->tx_qid].txq_active = true;
1644
1645 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_START_TXQ,
1646 length, status);
1647}
1648
1649static int qed_iov_vf_stop_rxqs(struct qed_hwfn *p_hwfn,
1650 struct qed_vf_info *vf,
1651 u16 rxq_id, u8 num_rxqs, bool cqe_completion)
1652{
1653 int rc = 0;
1654 int qid;
1655
1656 if (rxq_id + num_rxqs > ARRAY_SIZE(vf->vf_queues))
1657 return -EINVAL;
1658
1659 for (qid = rxq_id; qid < rxq_id + num_rxqs; qid++) {
1660 if (vf->vf_queues[qid].rxq_active) {
1661 rc = qed_sp_eth_rx_queue_stop(p_hwfn,
1662 vf->vf_queues[qid].
1663 fw_rx_qid, false,
1664 cqe_completion);
1665
1666 if (rc)
1667 return rc;
1668 }
1669 vf->vf_queues[qid].rxq_active = false;
1670 vf->num_active_rxqs--;
1671 }
1672
1673 return rc;
1674}
1675
1676static int qed_iov_vf_stop_txqs(struct qed_hwfn *p_hwfn,
1677 struct qed_vf_info *vf, u16 txq_id, u8 num_txqs)
1678{
1679 int rc = 0;
1680 int qid;
1681
1682 if (txq_id + num_txqs > ARRAY_SIZE(vf->vf_queues))
1683 return -EINVAL;
1684
1685 for (qid = txq_id; qid < txq_id + num_txqs; qid++) {
1686 if (vf->vf_queues[qid].txq_active) {
1687 rc = qed_sp_eth_tx_queue_stop(p_hwfn,
1688 vf->vf_queues[qid].
1689 fw_tx_qid);
1690
1691 if (rc)
1692 return rc;
1693 }
1694 vf->vf_queues[qid].txq_active = false;
1695 }
1696 return rc;
1697}
1698
1699static void qed_iov_vf_mbx_stop_rxqs(struct qed_hwfn *p_hwfn,
1700 struct qed_ptt *p_ptt,
1701 struct qed_vf_info *vf)
1702{
1703 u16 length = sizeof(struct pfvf_def_resp_tlv);
1704 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
1705 u8 status = PFVF_STATUS_SUCCESS;
1706 struct vfpf_stop_rxqs_tlv *req;
1707 int rc;
1708
1709 /* We give the option of starting from qid != 0, in this case we
1710 * need to make sure that qid + num_qs doesn't exceed the actual
1711 * amount of queues that exist.
1712 */
1713 req = &mbx->req_virt->stop_rxqs;
1714 rc = qed_iov_vf_stop_rxqs(p_hwfn, vf, req->rx_qid,
1715 req->num_rxqs, req->cqe_completion);
1716 if (rc)
1717 status = PFVF_STATUS_FAILURE;
1718
1719 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_STOP_RXQS,
1720 length, status);
1721}
1722
1723static void qed_iov_vf_mbx_stop_txqs(struct qed_hwfn *p_hwfn,
1724 struct qed_ptt *p_ptt,
1725 struct qed_vf_info *vf)
1726{
1727 u16 length = sizeof(struct pfvf_def_resp_tlv);
1728 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
1729 u8 status = PFVF_STATUS_SUCCESS;
1730 struct vfpf_stop_txqs_tlv *req;
1731 int rc;
1732
1733 /* We give the option of starting from qid != 0, in this case we
1734 * need to make sure that qid + num_qs doesn't exceed the actual
1735 * amount of queues that exist.
1736 */
1737 req = &mbx->req_virt->stop_txqs;
1738 rc = qed_iov_vf_stop_txqs(p_hwfn, vf, req->tx_qid, req->num_txqs);
1739 if (rc)
1740 status = PFVF_STATUS_FAILURE;
1741
1742 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_STOP_TXQS,
1743 length, status);
1744}
1745
17b235c1
YM		 1746static void qed_iov_vf_mbx_update_rxqs(struct qed_hwfn *p_hwfn,
1747 struct qed_ptt *p_ptt,
1748 struct qed_vf_info *vf)
1749{
1750 u16 length = sizeof(struct pfvf_def_resp_tlv);
1751 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
1752 struct vfpf_update_rxq_tlv *req;
1753 u8 status = PFVF_STATUS_SUCCESS;
1754 u8 complete_event_flg;
1755 u8 complete_cqe_flg;
1756 u16 qid;
1757 int rc;
1758 u8 i;
1759
1760 req = &mbx->req_virt->update_rxq;
1761 complete_cqe_flg = !!(req->flags & VFPF_RXQ_UPD_COMPLETE_CQE_FLAG);
1762 complete_event_flg = !!(req->flags & VFPF_RXQ_UPD_COMPLETE_EVENT_FLAG);
1763
1764 for (i = 0; i < req->num_rxqs; i++) {
1765 qid = req->rx_qid + i;
1766
1767 if (!vf->vf_queues[qid].rxq_active) {
1768 DP_NOTICE(p_hwfn, "VF rx_qid = %d isn`t active!\n",
1769 qid);
1770 status = PFVF_STATUS_FAILURE;
1771 break;
1772 }
1773
1774 rc = qed_sp_eth_rx_queues_update(p_hwfn,
1775 vf->vf_queues[qid].fw_rx_qid,
1776 1,
1777 complete_cqe_flg,
1778 complete_event_flg,
1779 QED_SPQ_MODE_EBLOCK, NULL);
1780
1781 if (rc) {
1782 status = PFVF_STATUS_FAILURE;
1783 break;
1784 }
1785 }
1786
1787 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_UPDATE_RXQ,
1788 length, status);
1789}
1790
dacd88d6
YM		 1791void *qed_iov_search_list_tlvs(struct qed_hwfn *p_hwfn,
1792 void *p_tlvs_list, u16 req_type)
1793{
1794 struct channel_tlv *p_tlv = (struct channel_tlv *)p_tlvs_list;
1795 int len = 0;
1796
1797 do {
1798 if (!p_tlv->length) {
1799 DP_NOTICE(p_hwfn, "Zero length TLV found\n");
1800 return NULL;
1801 }
1802
1803 if (p_tlv->type == req_type) {
1804 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
1805 "Extended tlv type %d, length %d found\n",
1806 p_tlv->type, p_tlv->length);
1807 return p_tlv;
1808 }
1809
1810 len += p_tlv->length;
1811 p_tlv = (struct channel_tlv *)((u8 *)p_tlv + p_tlv->length);
1812
1813 if ((len + p_tlv->length) > TLV_BUFFER_SIZE) {
1814 DP_NOTICE(p_hwfn, "TLVs has overrun the buffer size\n");
1815 return NULL;
1816 }
1817 } while (p_tlv->type != CHANNEL_TLV_LIST_END);
1818
1819 return NULL;
1820}
1821
1822static void
1823qed_iov_vp_update_act_param(struct qed_hwfn *p_hwfn,
1824 struct qed_sp_vport_update_params *p_data,
1825 struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
1826{
1827 struct vfpf_vport_update_activate_tlv *p_act_tlv;
1828 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_ACTIVATE;
1829
1830 p_act_tlv = (struct vfpf_vport_update_activate_tlv *)
1831 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
1832 if (!p_act_tlv)
1833 return;
1834
1835 p_data->update_vport_active_rx_flg = p_act_tlv->update_rx;
1836 p_data->vport_active_rx_flg = p_act_tlv->active_rx;
1837 p_data->update_vport_active_tx_flg = p_act_tlv->update_tx;
1838 p_data->vport_active_tx_flg = p_act_tlv->active_tx;
1839 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_ACTIVATE;
1840}
1841
17b235c1
YM		 1842static void
1843qed_iov_vp_update_vlan_param(struct qed_hwfn *p_hwfn,
1844 struct qed_sp_vport_update_params *p_data,
1845 struct qed_vf_info *p_vf,
1846 struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
1847{
1848 struct vfpf_vport_update_vlan_strip_tlv *p_vlan_tlv;
1849 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_VLAN_STRIP;
1850
1851 p_vlan_tlv = (struct vfpf_vport_update_vlan_strip_tlv *)
1852 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
1853 if (!p_vlan_tlv)
1854 return;
1855
08feecd7
YM		 1856 p_vf->shadow_config.inner_vlan_removal = p_vlan_tlv->remove_vlan;
1857
1858 /* Ignore the VF request if we're forcing a vlan */
1859 if (!(p_vf->configured_features & (1 << VLAN_ADDR_FORCED))) {
1860 p_data->update_inner_vlan_removal_flg = 1;
1861 p_data->inner_vlan_removal_flg = p_vlan_tlv->remove_vlan;
1862 }
17b235c1
YM		 1863
1864 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_VLAN_STRIP;
1865}
1866
1867static void
1868qed_iov_vp_update_tx_switch(struct qed_hwfn *p_hwfn,
1869 struct qed_sp_vport_update_params *p_data,
1870 struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
1871{
1872 struct vfpf_vport_update_tx_switch_tlv *p_tx_switch_tlv;
1873 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_TX_SWITCH;
1874
1875 p_tx_switch_tlv = (struct vfpf_vport_update_tx_switch_tlv *)
1876 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt,
1877 tlv);
1878 if (!p_tx_switch_tlv)
1879 return;
1880
1881 p_data->update_tx_switching_flg = 1;
1882 p_data->tx_switching_flg = p_tx_switch_tlv->tx_switching;
1883 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_TX_SWITCH;
1884}
1885
dacd88d6
YM		 1886static void
1887qed_iov_vp_update_mcast_bin_param(struct qed_hwfn *p_hwfn,
1888 struct qed_sp_vport_update_params *p_data,
1889 struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
1890{
1891 struct vfpf_vport_update_mcast_bin_tlv *p_mcast_tlv;
1892 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_MCAST;
1893
1894 p_mcast_tlv = (struct vfpf_vport_update_mcast_bin_tlv *)
1895 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
1896 if (!p_mcast_tlv)
1897 return;
1898
1899 p_data->update_approx_mcast_flg = 1;
1900 memcpy(p_data->bins, p_mcast_tlv->bins,
1901 sizeof(unsigned long) * ETH_MULTICAST_MAC_BINS_IN_REGS);
1902 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_MCAST;
1903}
1904
1905static void
1906qed_iov_vp_update_accept_flag(struct qed_hwfn *p_hwfn,
1907 struct qed_sp_vport_update_params *p_data,
1908 struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
1909{
1910 struct qed_filter_accept_flags *p_flags = &p_data->accept_flags;
1911 struct vfpf_vport_update_accept_param_tlv *p_accept_tlv;
1912 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_ACCEPT_PARAM;
1913
1914 p_accept_tlv = (struct vfpf_vport_update_accept_param_tlv *)
1915 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
1916 if (!p_accept_tlv)
1917 return;
1918
1919 p_flags->update_rx_mode_config = p_accept_tlv->update_rx_mode;
1920 p_flags->rx_accept_filter = p_accept_tlv->rx_accept_filter;
1921 p_flags->update_tx_mode_config = p_accept_tlv->update_tx_mode;
1922 p_flags->tx_accept_filter = p_accept_tlv->tx_accept_filter;
1923 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_ACCEPT_PARAM;
1924}
1925
17b235c1
YM		 1926static void
1927qed_iov_vp_update_accept_any_vlan(struct qed_hwfn *p_hwfn,
1928 struct qed_sp_vport_update_params *p_data,
1929 struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
1930{
1931 struct vfpf_vport_update_accept_any_vlan_tlv *p_accept_any_vlan;
1932 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_ACCEPT_ANY_VLAN;
1933
1934 p_accept_any_vlan = (struct vfpf_vport_update_accept_any_vlan_tlv *)
1935 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt,
1936 tlv);
1937 if (!p_accept_any_vlan)
1938 return;
1939
1940 p_data->accept_any_vlan = p_accept_any_vlan->accept_any_vlan;
1941 p_data->update_accept_any_vlan_flg =
1942 p_accept_any_vlan->update_accept_any_vlan_flg;
1943 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_ACCEPT_ANY_VLAN;
1944}
1945
dacd88d6
YM		 1946static void
1947qed_iov_vp_update_rss_param(struct qed_hwfn *p_hwfn,
1948 struct qed_vf_info *vf,
1949 struct qed_sp_vport_update_params *p_data,
1950 struct qed_rss_params *p_rss,
1951 struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
1952{
1953 struct vfpf_vport_update_rss_tlv *p_rss_tlv;
1954 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_RSS;
1955 u16 i, q_idx, max_q_idx;
1956 u16 table_size;
1957
1958 p_rss_tlv = (struct vfpf_vport_update_rss_tlv *)
1959 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
1960 if (!p_rss_tlv) {
1961 p_data->rss_params = NULL;
1962 return;
1963 }
1964
1965 memset(p_rss, 0, sizeof(struct qed_rss_params));
1966
1967 p_rss->update_rss_config = !!(p_rss_tlv->update_rss_flags &
1968 VFPF_UPDATE_RSS_CONFIG_FLAG);
1969 p_rss->update_rss_capabilities = !!(p_rss_tlv->update_rss_flags &
1970 VFPF_UPDATE_RSS_CAPS_FLAG);
1971 p_rss->update_rss_ind_table = !!(p_rss_tlv->update_rss_flags &
1972 VFPF_UPDATE_RSS_IND_TABLE_FLAG);
1973 p_rss->update_rss_key = !!(p_rss_tlv->update_rss_flags &
1974 VFPF_UPDATE_RSS_KEY_FLAG);
1975
1976 p_rss->rss_enable = p_rss_tlv->rss_enable;
1977 p_rss->rss_eng_id = vf->relative_vf_id + 1;
1978 p_rss->rss_caps = p_rss_tlv->rss_caps;
1979 p_rss->rss_table_size_log = p_rss_tlv->rss_table_size_log;
1980 memcpy(p_rss->rss_ind_table, p_rss_tlv->rss_ind_table,
1981 sizeof(p_rss->rss_ind_table));
1982 memcpy(p_rss->rss_key, p_rss_tlv->rss_key, sizeof(p_rss->rss_key));
1983
1984 table_size = min_t(u16, ARRAY_SIZE(p_rss->rss_ind_table),
1985 (1 << p_rss_tlv->rss_table_size_log));
1986
1987 max_q_idx = ARRAY_SIZE(vf->vf_queues);
1988
1989 for (i = 0; i < table_size; i++) {
1990 u16 index = vf->vf_queues[0].fw_rx_qid;
1991
1992 q_idx = p_rss->rss_ind_table[i];
1993 if (q_idx >= max_q_idx)
1994 DP_NOTICE(p_hwfn,
1995 "rss_ind_table[%d] = %d, rxq is out of range\n",
1996 i, q_idx);
1997 else if (!vf->vf_queues[q_idx].rxq_active)
1998 DP_NOTICE(p_hwfn,
1999 "rss_ind_table[%d] = %d, rxq is not active\n",
2000 i, q_idx);
2001 else
2002 index = vf->vf_queues[q_idx].fw_rx_qid;
2003 p_rss->rss_ind_table[i] = index;
2004 }
2005
2006 p_data->rss_params = p_rss;
2007 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_RSS;
2008}
2009
17b235c1
YM		 2010static void
2011qed_iov_vp_update_sge_tpa_param(struct qed_hwfn *p_hwfn,
2012 struct qed_vf_info *vf,
2013 struct qed_sp_vport_update_params *p_data,
2014 struct qed_sge_tpa_params *p_sge_tpa,
2015 struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
2016{
2017 struct vfpf_vport_update_sge_tpa_tlv *p_sge_tpa_tlv;
2018 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_SGE_TPA;
2019
2020 p_sge_tpa_tlv = (struct vfpf_vport_update_sge_tpa_tlv *)
2021 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
2022
2023 if (!p_sge_tpa_tlv) {
2024 p_data->sge_tpa_params = NULL;
2025 return;
2026 }
2027
2028 memset(p_sge_tpa, 0, sizeof(struct qed_sge_tpa_params));
2029
2030 p_sge_tpa->update_tpa_en_flg =
2031 !!(p_sge_tpa_tlv->update_sge_tpa_flags & VFPF_UPDATE_TPA_EN_FLAG);
2032 p_sge_tpa->update_tpa_param_flg =
2033 !!(p_sge_tpa_tlv->update_sge_tpa_flags &
2034 VFPF_UPDATE_TPA_PARAM_FLAG);
2035
2036 p_sge_tpa->tpa_ipv4_en_flg =
2037 !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_IPV4_EN_FLAG);
2038 p_sge_tpa->tpa_ipv6_en_flg =
2039 !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_IPV6_EN_FLAG);
2040 p_sge_tpa->tpa_pkt_split_flg =
2041 !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_PKT_SPLIT_FLAG);
2042 p_sge_tpa->tpa_hdr_data_split_flg =
2043 !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_HDR_DATA_SPLIT_FLAG);
2044 p_sge_tpa->tpa_gro_consistent_flg =
2045 !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_GRO_CONSIST_FLAG);
2046
2047 p_sge_tpa->tpa_max_aggs_num = p_sge_tpa_tlv->tpa_max_aggs_num;
2048 p_sge_tpa->tpa_max_size = p_sge_tpa_tlv->tpa_max_size;
2049 p_sge_tpa->tpa_min_size_to_start = p_sge_tpa_tlv->tpa_min_size_to_start;
2050 p_sge_tpa->tpa_min_size_to_cont = p_sge_tpa_tlv->tpa_min_size_to_cont;
2051 p_sge_tpa->max_buffers_per_cqe = p_sge_tpa_tlv->max_buffers_per_cqe;
2052
2053 p_data->sge_tpa_params = p_sge_tpa;
2054
2055 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_SGE_TPA;
2056}
2057
dacd88d6
YM		 2058static void qed_iov_vf_mbx_vport_update(struct qed_hwfn *p_hwfn,
2059 struct qed_ptt *p_ptt,
2060 struct qed_vf_info *vf)
2061{
2062 struct qed_sp_vport_update_params params;
2063 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
17b235c1 2064 struct qed_sge_tpa_params sge_tpa_params;
dacd88d6
YM		 2065 struct qed_rss_params rss_params;
2066 u8 status = PFVF_STATUS_SUCCESS;
2067 u16 tlvs_mask = 0;
2068 u16 length;
2069 int rc;
2070
2071 memset(&params, 0, sizeof(params));
2072 params.opaque_fid = vf->opaque_fid;
2073 params.vport_id = vf->vport_id;
2074 params.rss_params = NULL;
2075
2076 /* Search for extended tlvs list and update values
2077 * from VF in struct qed_sp_vport_update_params.
2078 */
2079 qed_iov_vp_update_act_param(p_hwfn, &params, mbx, &tlvs_mask);
17b235c1
YM		 2080 qed_iov_vp_update_vlan_param(p_hwfn, &params, vf, mbx, &tlvs_mask);
2081 qed_iov_vp_update_tx_switch(p_hwfn, &params, mbx, &tlvs_mask);
dacd88d6
YM		 2082 qed_iov_vp_update_mcast_bin_param(p_hwfn, &params, mbx, &tlvs_mask);
2083 qed_iov_vp_update_accept_flag(p_hwfn, &params, mbx, &tlvs_mask);
2084 qed_iov_vp_update_rss_param(p_hwfn, vf, &params, &rss_params,
2085 mbx, &tlvs_mask);
17b235c1
YM		 2086 qed_iov_vp_update_accept_any_vlan(p_hwfn, &params, mbx, &tlvs_mask);
2087 qed_iov_vp_update_sge_tpa_param(p_hwfn, vf, &params,
2088 &sge_tpa_params, mbx, &tlvs_mask);
dacd88d6
YM		 2089
2090 /* Just log a message if there is no single extended tlv in buffer.
2091 * When all features of vport update ramrod would be requested by VF
2092 * as extended TLVs in buffer then an error can be returned in response
2093 * if there is no extended TLV present in buffer.
2094 */
2095 if (!tlvs_mask) {
2096 DP_NOTICE(p_hwfn,
2097 "No feature tlvs found for vport update\n");
2098 status = PFVF_STATUS_NOT_SUPPORTED;
2099 goto out;
2100 }
2101
2102 rc = qed_sp_vport_update(p_hwfn, &params, QED_SPQ_MODE_EBLOCK, NULL);
2103
2104 if (rc)
2105 status = PFVF_STATUS_FAILURE;
2106
2107out:
2108 length = qed_iov_prep_vp_update_resp_tlvs(p_hwfn, vf, mbx, status,
2109 tlvs_mask, tlvs_mask);
2110 qed_iov_send_response(p_hwfn, p_ptt, vf, length, status);
2111}
2112
08feecd7
YM		 2113static int qed_iov_vf_update_unicast_shadow(struct qed_hwfn *p_hwfn,
2114 struct qed_vf_info *p_vf,
2115 struct qed_filter_ucast *p_params)
2116{
2117 int i;
2118
2119 if (p_params->type == QED_FILTER_MAC)
2120 return 0;
2121
2122 /* First remove entries and then add new ones */
2123 if (p_params->opcode == QED_FILTER_REMOVE) {
2124 for (i = 0; i < QED_ETH_VF_NUM_VLAN_FILTERS + 1; i++)
2125 if (p_vf->shadow_config.vlans[i].used &&
2126 p_vf->shadow_config.vlans[i].vid ==
2127 p_params->vlan) {
2128 p_vf->shadow_config.vlans[i].used = false;
2129 break;
2130 }
2131 if (i == QED_ETH_VF_NUM_VLAN_FILTERS + 1) {
2132 DP_VERBOSE(p_hwfn,
2133 QED_MSG_IOV,
2134 "VF [%d] - Tries to remove a non-existing vlan\n",
2135 p_vf->relative_vf_id);
2136 return -EINVAL;
2137 }
2138 } else if (p_params->opcode == QED_FILTER_REPLACE ||
2139 p_params->opcode == QED_FILTER_FLUSH) {
2140 for (i = 0; i < QED_ETH_VF_NUM_VLAN_FILTERS + 1; i++)
2141 p_vf->shadow_config.vlans[i].used = false;
2142 }
2143
2144 /* In forced mode, we're willing to remove entries - but we don't add
2145 * new ones.
2146 */
2147 if (p_vf->bulletin.p_virt->valid_bitmap & (1 << VLAN_ADDR_FORCED))
2148 return 0;
2149
2150 if (p_params->opcode == QED_FILTER_ADD ||
2151 p_params->opcode == QED_FILTER_REPLACE) {
2152 for (i = 0; i < QED_ETH_VF_NUM_VLAN_FILTERS + 1; i++) {
2153 if (p_vf->shadow_config.vlans[i].used)
2154 continue;
2155
2156 p_vf->shadow_config.vlans[i].used = true;
2157 p_vf->shadow_config.vlans[i].vid = p_params->vlan;
2158 break;
2159 }
2160
2161 if (i == QED_ETH_VF_NUM_VLAN_FILTERS + 1) {
2162 DP_VERBOSE(p_hwfn,
2163 QED_MSG_IOV,
2164 "VF [%d] - Tries to configure more than %d vlan filters\n",
2165 p_vf->relative_vf_id,
2166 QED_ETH_VF_NUM_VLAN_FILTERS + 1);
2167 return -EINVAL;
2168 }
2169 }
2170
2171 return 0;
2172}
2173
dacd88d6
YM		 2174int qed_iov_chk_ucast(struct qed_hwfn *hwfn,
2175 int vfid, struct qed_filter_ucast *params)
2176{
2177 struct qed_public_vf_info *vf;
2178
2179 vf = qed_iov_get_public_vf_info(hwfn, vfid, true);
2180 if (!vf)
2181 return -EINVAL;
2182
2183 /* No real decision to make; Store the configured MAC */
2184 if (params->type == QED_FILTER_MAC ||
2185 params->type == QED_FILTER_MAC_VLAN)
2186 ether_addr_copy(vf->mac, params->mac);
2187
2188 return 0;
2189}
2190
2191static void qed_iov_vf_mbx_ucast_filter(struct qed_hwfn *p_hwfn,
2192 struct qed_ptt *p_ptt,
2193 struct qed_vf_info *vf)
2194{
08feecd7 2195 struct qed_bulletin_content *p_bulletin = vf->bulletin.p_virt;
dacd88d6
YM		 2196 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
2197 struct vfpf_ucast_filter_tlv *req;
2198 u8 status = PFVF_STATUS_SUCCESS;
2199 struct qed_filter_ucast params;
2200 int rc;
2201
2202 /* Prepare the unicast filter params */
2203 memset(&params, 0, sizeof(struct qed_filter_ucast));
2204 req = &mbx->req_virt->ucast_filter;
2205 params.opcode = (enum qed_filter_opcode)req->opcode;
2206 params.type = (enum qed_filter_ucast_type)req->type;
2207
2208 params.is_rx_filter = 1;
2209 params.is_tx_filter = 1;
2210 params.vport_to_remove_from = vf->vport_id;
2211 params.vport_to_add_to = vf->vport_id;
2212 memcpy(params.mac, req->mac, ETH_ALEN);
2213 params.vlan = req->vlan;
2214
2215 DP_VERBOSE(p_hwfn,
2216 QED_MSG_IOV,
2217 "VF[%d]: opcode 0x%02x type 0x%02x [%s %s] [vport 0x%02x] MAC %02x:%02x:%02x:%02x:%02x:%02x, vlan 0x%04x\n",
2218 vf->abs_vf_id, params.opcode, params.type,
2219 params.is_rx_filter ? "RX" : "",
2220 params.is_tx_filter ? "TX" : "",
2221 params.vport_to_add_to,
2222 params.mac[0], params.mac[1],
2223 params.mac[2], params.mac[3],
2224 params.mac[4], params.mac[5], params.vlan);
2225
2226 if (!vf->vport_instance) {
2227 DP_VERBOSE(p_hwfn,
2228 QED_MSG_IOV,
2229 "No VPORT instance available for VF[%d], failing ucast MAC configuration\n",
2230 vf->abs_vf_id);
2231 status = PFVF_STATUS_FAILURE;
2232 goto out;
2233 }
2234
08feecd7
YM		 2235 /* Update shadow copy of the VF configuration */
2236 if (qed_iov_vf_update_unicast_shadow(p_hwfn, vf, &params)) {
2237 status = PFVF_STATUS_FAILURE;
2238 goto out;
2239 }
2240
2241 /* Determine if the unicast filtering is acceptible by PF */
2242 if ((p_bulletin->valid_bitmap & (1 << VLAN_ADDR_FORCED)) &&
2243 (params.type == QED_FILTER_VLAN ||
2244 params.type == QED_FILTER_MAC_VLAN)) {
2245 /* Once VLAN is forced or PVID is set, do not allow
2246 * to add/replace any further VLANs.
2247 */
2248 if (params.opcode == QED_FILTER_ADD ||
2249 params.opcode == QED_FILTER_REPLACE)
2250 status = PFVF_STATUS_FORCED;
2251 goto out;
2252 }
2253
eff16960
YM		 2254 if ((p_bulletin->valid_bitmap & (1 << MAC_ADDR_FORCED)) &&
2255 (params.type == QED_FILTER_MAC ||
2256 params.type == QED_FILTER_MAC_VLAN)) {
2257 if (!ether_addr_equal(p_bulletin->mac, params.mac) ||
2258 (params.opcode != QED_FILTER_ADD &&
2259 params.opcode != QED_FILTER_REPLACE))
2260 status = PFVF_STATUS_FORCED;
2261 goto out;
2262 }
2263
dacd88d6
YM		 2264 rc = qed_iov_chk_ucast(p_hwfn, vf->relative_vf_id, &params);
2265 if (rc) {
2266 status = PFVF_STATUS_FAILURE;
2267 goto out;
2268 }
2269
2270 rc = qed_sp_eth_filter_ucast(p_hwfn, vf->opaque_fid, &params,
2271 QED_SPQ_MODE_CB, NULL);
2272 if (rc)
2273 status = PFVF_STATUS_FAILURE;
2274
2275out:
2276 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_UCAST_FILTER,
2277 sizeof(struct pfvf_def_resp_tlv), status);
2278}
2279
0b55e27d
YM		 2280static void qed_iov_vf_mbx_int_cleanup(struct qed_hwfn *p_hwfn,
2281 struct qed_ptt *p_ptt,
2282 struct qed_vf_info *vf)
2283{
2284 int i;
2285
2286 /* Reset the SBs */
2287 for (i = 0; i < vf->num_sbs; i++)
2288 qed_int_igu_init_pure_rt_single(p_hwfn, p_ptt,
2289 vf->igu_sbs[i],
2290 vf->opaque_fid, false);
2291
2292 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_INT_CLEANUP,
2293 sizeof(struct pfvf_def_resp_tlv),
2294 PFVF_STATUS_SUCCESS);
2295}
2296
2297static void qed_iov_vf_mbx_close(struct qed_hwfn *p_hwfn,
2298 struct qed_ptt *p_ptt, struct qed_vf_info *vf)
2299{
2300 u16 length = sizeof(struct pfvf_def_resp_tlv);
2301 u8 status = PFVF_STATUS_SUCCESS;
2302
2303 /* Disable Interrupts for VF */
2304 qed_iov_vf_igu_set_int(p_hwfn, p_ptt, vf, 0);
2305
2306 /* Reset Permission table */
2307 qed_iov_config_perm_table(p_hwfn, p_ptt, vf, 0);
2308
2309 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_CLOSE,
2310 length, status);
2311}
2312
2313static void qed_iov_vf_mbx_release(struct qed_hwfn *p_hwfn,
2314 struct qed_ptt *p_ptt,
2315 struct qed_vf_info *p_vf)
2316{
2317 u16 length = sizeof(struct pfvf_def_resp_tlv);
2318
2319 qed_iov_vf_cleanup(p_hwfn, p_vf);
2320
2321 qed_iov_prepare_resp(p_hwfn, p_ptt, p_vf, CHANNEL_TLV_RELEASE,
2322 length, PFVF_STATUS_SUCCESS);
2323}
2324
2325static int
2326qed_iov_vf_flr_poll_dorq(struct qed_hwfn *p_hwfn,
2327 struct qed_vf_info *p_vf, struct qed_ptt *p_ptt)
2328{
2329 int cnt;
2330 u32 val;
2331
2332 qed_fid_pretend(p_hwfn, p_ptt, (u16) p_vf->concrete_fid);
2333
2334 for (cnt = 0; cnt < 50; cnt++) {
2335 val = qed_rd(p_hwfn, p_ptt, DORQ_REG_VF_USAGE_CNT);
2336 if (!val)
2337 break;
2338 msleep(20);
2339 }
2340 qed_fid_pretend(p_hwfn, p_ptt, (u16) p_hwfn->hw_info.concrete_fid);
2341
2342 if (cnt == 50) {
2343 DP_ERR(p_hwfn,
2344 "VF[%d] - dorq failed to cleanup [usage 0x%08x]\n",
2345 p_vf->abs_vf_id, val);
2346 return -EBUSY;
2347 }
2348
2349 return 0;
2350}
2351
2352static int
2353qed_iov_vf_flr_poll_pbf(struct qed_hwfn *p_hwfn,
2354 struct qed_vf_info *p_vf, struct qed_ptt *p_ptt)
2355{
2356 u32 cons[MAX_NUM_VOQS], distance[MAX_NUM_VOQS];
2357 int i, cnt;
2358
2359 /* Read initial consumers & producers */
2360 for (i = 0; i < MAX_NUM_VOQS; i++) {
2361 u32 prod;
2362
2363 cons[i] = qed_rd(p_hwfn, p_ptt,
2364 PBF_REG_NUM_BLOCKS_ALLOCATED_CONS_VOQ0 +
2365 i * 0x40);
2366 prod = qed_rd(p_hwfn, p_ptt,
2367 PBF_REG_NUM_BLOCKS_ALLOCATED_PROD_VOQ0 +
2368 i * 0x40);
2369 distance[i] = prod - cons[i];
2370 }
2371
2372 /* Wait for consumers to pass the producers */
2373 i = 0;
2374 for (cnt = 0; cnt < 50; cnt++) {
2375 for (; i < MAX_NUM_VOQS; i++) {
2376 u32 tmp;
2377
2378 tmp = qed_rd(p_hwfn, p_ptt,
2379 PBF_REG_NUM_BLOCKS_ALLOCATED_CONS_VOQ0 +
2380 i * 0x40);
2381 if (distance[i] > tmp - cons[i])
2382 break;
2383 }
2384
2385 if (i == MAX_NUM_VOQS)
2386 break;
2387
2388 msleep(20);
2389 }
2390
2391 if (cnt == 50) {
2392 DP_ERR(p_hwfn, "VF[%d] - pbf polling failed on VOQ %d\n",
2393 p_vf->abs_vf_id, i);
2394 return -EBUSY;
2395 }
2396
2397 return 0;
2398}
2399
2400static int qed_iov_vf_flr_poll(struct qed_hwfn *p_hwfn,
2401 struct qed_vf_info *p_vf, struct qed_ptt *p_ptt)
2402{
2403 int rc;
2404
2405 rc = qed_iov_vf_flr_poll_dorq(p_hwfn, p_vf, p_ptt);
2406 if (rc)
2407 return rc;
2408
2409 rc = qed_iov_vf_flr_poll_pbf(p_hwfn, p_vf, p_ptt);
2410 if (rc)
2411 return rc;
2412
2413 return 0;
2414}
2415
2416static int
2417qed_iov_execute_vf_flr_cleanup(struct qed_hwfn *p_hwfn,
2418 struct qed_ptt *p_ptt,
2419 u16 rel_vf_id, u32 *ack_vfs)
2420{
2421 struct qed_vf_info *p_vf;
2422 int rc = 0;
2423
2424 p_vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, false);
2425 if (!p_vf)
2426 return 0;
2427
2428 if (p_hwfn->pf_iov_info->pending_flr[rel_vf_id / 64] &
2429 (1ULL << (rel_vf_id % 64))) {
2430 u16 vfid = p_vf->abs_vf_id;
2431
2432 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
2433 "VF[%d] - Handling FLR\n", vfid);
2434
2435 qed_iov_vf_cleanup(p_hwfn, p_vf);
2436
2437 /* If VF isn't active, no need for anything but SW */
2438 if (!p_vf->b_init)
2439 goto cleanup;
2440
2441 rc = qed_iov_vf_flr_poll(p_hwfn, p_vf, p_ptt);
2442 if (rc)
2443 goto cleanup;
2444
2445 rc = qed_final_cleanup(p_hwfn, p_ptt, vfid, true);
2446 if (rc) {
2447 DP_ERR(p_hwfn, "Failed handle FLR of VF[%d]\n", vfid);
2448 return rc;
2449 }
2450
2451 /* VF_STOPPED has to be set only after final cleanup
2452 * but prior to re-enabling the VF.
2453 */
2454 p_vf->state = VF_STOPPED;
2455
2456 rc = qed_iov_enable_vf_access(p_hwfn, p_ptt, p_vf);
2457 if (rc) {
2458 DP_ERR(p_hwfn, "Failed to re-enable VF[%d] acces\n",
2459 vfid);
2460 return rc;
2461 }
2462cleanup:
2463 /* Mark VF for ack and clean pending state */
2464 if (p_vf->state == VF_RESET)
2465 p_vf->state = VF_STOPPED;
2466 ack_vfs[vfid / 32] |= (1 << (vfid % 32));
2467 p_hwfn->pf_iov_info->pending_flr[rel_vf_id / 64] &=
2468 ~(1ULL << (rel_vf_id % 64));
2469 p_hwfn->pf_iov_info->pending_events[rel_vf_id / 64] &=
2470 ~(1ULL << (rel_vf_id % 64));
2471 }
2472
2473 return rc;
2474}
2475
2476int qed_iov_vf_flr_cleanup(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
2477{
2478 u32 ack_vfs[VF_MAX_STATIC / 32];
2479 int rc = 0;
2480 u16 i;
2481
2482 memset(ack_vfs, 0, sizeof(u32) * (VF_MAX_STATIC / 32));
2483
2484 /* Since BRB <-> PRS interface can't be tested as part of the flr
2485 * polling due to HW limitations, simply sleep a bit. And since
2486 * there's no need to wait per-vf, do it before looping.
2487 */
2488 msleep(100);
2489
2490 for (i = 0; i < p_hwfn->cdev->p_iov_info->total_vfs; i++)
2491 qed_iov_execute_vf_flr_cleanup(p_hwfn, p_ptt, i, ack_vfs);
2492
2493 rc = qed_mcp_ack_vf_flr(p_hwfn, p_ptt, ack_vfs);
2494 return rc;
2495}
2496
2497int qed_iov_mark_vf_flr(struct qed_hwfn *p_hwfn, u32 *p_disabled_vfs)
2498{
2499 u16 i, found = 0;
2500
2501 DP_VERBOSE(p_hwfn, QED_MSG_IOV, "Marking FLR-ed VFs\n");
2502 for (i = 0; i < (VF_MAX_STATIC / 32); i++)
2503 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
2504 "[%08x,...,%08x]: %08x\n",
2505 i * 32, (i + 1) * 32 - 1, p_disabled_vfs[i]);
2506
2507 if (!p_hwfn->cdev->p_iov_info) {
2508 DP_NOTICE(p_hwfn, "VF flr but no IOV\n");
2509 return 0;
2510 }
2511
2512 /* Mark VFs */
2513 for (i = 0; i < p_hwfn->cdev->p_iov_info->total_vfs; i++) {
2514 struct qed_vf_info *p_vf;
2515 u8 vfid;
2516
2517 p_vf = qed_iov_get_vf_info(p_hwfn, i, false);
2518 if (!p_vf)
2519 continue;
2520
2521 vfid = p_vf->abs_vf_id;
2522 if ((1 << (vfid % 32)) & p_disabled_vfs[vfid / 32]) {
2523 u64 *p_flr = p_hwfn->pf_iov_info->pending_flr;
2524 u16 rel_vf_id = p_vf->relative_vf_id;
2525
2526 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
2527 "VF[%d] [rel %d] got FLR-ed\n",
2528 vfid, rel_vf_id);
2529
2530 p_vf->state = VF_RESET;
2531
2532 /* No need to lock here, since pending_flr should
2533 * only change here and before ACKing MFw. Since
2534 * MFW will not trigger an additional attention for
2535 * VF flr until ACKs, we're safe.
2536 */
2537 p_flr[rel_vf_id / 64] |= 1ULL << (rel_vf_id % 64);
2538 found = 1;
2539 }
2540 }
2541
2542 return found;
2543}
2544
36558c3d
YM		 2545void qed_iov_set_link(struct qed_hwfn *p_hwfn,
2546 u16 vfid,
2547 struct qed_mcp_link_params *params,
2548 struct qed_mcp_link_state *link,
2549 struct qed_mcp_link_capabilities *p_caps)
2550{
2551 struct qed_vf_info *p_vf = qed_iov_get_vf_info(p_hwfn,
2552 vfid,
2553 false);
2554 struct qed_bulletin_content *p_bulletin;
2555
2556 if (!p_vf)
2557 return;
2558
2559 p_bulletin = p_vf->bulletin.p_virt;
2560 p_bulletin->req_autoneg = params->speed.autoneg;
2561 p_bulletin->req_adv_speed = params->speed.advertised_speeds;
2562 p_bulletin->req_forced_speed = params->speed.forced_speed;
2563 p_bulletin->req_autoneg_pause = params->pause.autoneg;
2564 p_bulletin->req_forced_rx = params->pause.forced_rx;
2565 p_bulletin->req_forced_tx = params->pause.forced_tx;
2566 p_bulletin->req_loopback = params->loopback_mode;
2567
2568 p_bulletin->link_up = link->link_up;
2569 p_bulletin->speed = link->speed;
2570 p_bulletin->full_duplex = link->full_duplex;
2571 p_bulletin->autoneg = link->an;
2572 p_bulletin->autoneg_complete = link->an_complete;
2573 p_bulletin->parallel_detection = link->parallel_detection;
2574 p_bulletin->pfc_enabled = link->pfc_enabled;
2575 p_bulletin->partner_adv_speed = link->partner_adv_speed;
2576 p_bulletin->partner_tx_flow_ctrl_en = link->partner_tx_flow_ctrl_en;
2577 p_bulletin->partner_rx_flow_ctrl_en = link->partner_rx_flow_ctrl_en;
2578 p_bulletin->partner_adv_pause = link->partner_adv_pause;
2579 p_bulletin->sfp_tx_fault = link->sfp_tx_fault;
2580
2581 p_bulletin->capability_speed = p_caps->speed_capabilities;
2582}
2583
73390ac9
YM		 2584static void qed_iov_get_link(struct qed_hwfn *p_hwfn,
2585 u16 vfid,
2586 struct qed_mcp_link_params *p_params,
2587 struct qed_mcp_link_state *p_link,
2588 struct qed_mcp_link_capabilities *p_caps)
2589{
2590 struct qed_vf_info *p_vf = qed_iov_get_vf_info(p_hwfn,
2591 vfid,
2592 false);
2593 struct qed_bulletin_content *p_bulletin;
2594
2595 if (!p_vf)
2596 return;
2597
2598 p_bulletin = p_vf->bulletin.p_virt;
2599
2600 if (p_params)
2601 __qed_vf_get_link_params(p_hwfn, p_params, p_bulletin);
2602 if (p_link)
2603 __qed_vf_get_link_state(p_hwfn, p_link, p_bulletin);
2604 if (p_caps)
2605 __qed_vf_get_link_caps(p_hwfn, p_caps, p_bulletin);
2606}
2607
37bff2b9
YM		 2608static void qed_iov_process_mbx_req(struct qed_hwfn *p_hwfn,
2609 struct qed_ptt *p_ptt, int vfid)
2610{
2611 struct qed_iov_vf_mbx *mbx;
2612 struct qed_vf_info *p_vf;
2613 int i;
2614
2615 p_vf = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
2616 if (!p_vf)
2617 return;
2618
2619 mbx = &p_vf->vf_mbx;
2620
2621 /* qed_iov_process_mbx_request */
2622 DP_VERBOSE(p_hwfn,
2623 QED_MSG_IOV,
2624 "qed_iov_process_mbx_req vfid %d\n", p_vf->abs_vf_id);
2625
2626 mbx->first_tlv = mbx->req_virt->first_tlv;
2627
2628 /* check if tlv type is known */
2629 if (qed_iov_tlv_supported(mbx->first_tlv.tl.type)) {
1408cc1f
YM		 2630 switch (mbx->first_tlv.tl.type) {
2631 case CHANNEL_TLV_ACQUIRE:
2632 qed_iov_vf_mbx_acquire(p_hwfn, p_ptt, p_vf);
2633 break;
dacd88d6
YM		 2634 case CHANNEL_TLV_VPORT_START:
2635 qed_iov_vf_mbx_start_vport(p_hwfn, p_ptt, p_vf);
2636 break;
2637 case CHANNEL_TLV_VPORT_TEARDOWN:
2638 qed_iov_vf_mbx_stop_vport(p_hwfn, p_ptt, p_vf);
2639 break;
2640 case CHANNEL_TLV_START_RXQ:
2641 qed_iov_vf_mbx_start_rxq(p_hwfn, p_ptt, p_vf);
2642 break;
2643 case CHANNEL_TLV_START_TXQ:
2644 qed_iov_vf_mbx_start_txq(p_hwfn, p_ptt, p_vf);
2645 break;
2646 case CHANNEL_TLV_STOP_RXQS:
2647 qed_iov_vf_mbx_stop_rxqs(p_hwfn, p_ptt, p_vf);
2648 break;
2649 case CHANNEL_TLV_STOP_TXQS:
2650 qed_iov_vf_mbx_stop_txqs(p_hwfn, p_ptt, p_vf);
2651 break;
17b235c1
YM		 2652 case CHANNEL_TLV_UPDATE_RXQ:
2653 qed_iov_vf_mbx_update_rxqs(p_hwfn, p_ptt, p_vf);
2654 break;
dacd88d6
YM		 2655 case CHANNEL_TLV_VPORT_UPDATE:
2656 qed_iov_vf_mbx_vport_update(p_hwfn, p_ptt, p_vf);
2657 break;
2658 case CHANNEL_TLV_UCAST_FILTER:
2659 qed_iov_vf_mbx_ucast_filter(p_hwfn, p_ptt, p_vf);
2660 break;
0b55e27d
YM		 2661 case CHANNEL_TLV_CLOSE:
2662 qed_iov_vf_mbx_close(p_hwfn, p_ptt, p_vf);
2663 break;
2664 case CHANNEL_TLV_INT_CLEANUP:
2665 qed_iov_vf_mbx_int_cleanup(p_hwfn, p_ptt, p_vf);
2666 break;
2667 case CHANNEL_TLV_RELEASE:
2668 qed_iov_vf_mbx_release(p_hwfn, p_ptt, p_vf);
2669 break;
1408cc1f 2670 }
37bff2b9
YM		 2671 } else {
2672 /* unknown TLV - this may belong to a VF driver from the future
2673 * - a version written after this PF driver was written, which
2674 * supports features unknown as of yet. Too bad since we don't
2675 * support them. Or this may be because someone wrote a crappy
2676 * VF driver and is sending garbage over the channel.
2677 */
2678 DP_ERR(p_hwfn,
2679 "unknown TLV. type %d length %d. first 20 bytes of mailbox buffer:\n",
2680 mbx->first_tlv.tl.type, mbx->first_tlv.tl.length);
2681
2682 for (i = 0; i < 20; i++) {
2683 DP_VERBOSE(p_hwfn,
2684 QED_MSG_IOV,
2685 "%x ",
2686 mbx->req_virt->tlv_buf_size.tlv_buffer[i]);
2687 }
2688 }
2689}
2690
2691void qed_iov_pf_add_pending_events(struct qed_hwfn *p_hwfn, u8 vfid)
2692{
2693 u64 add_bit = 1ULL << (vfid % 64);
2694
2695 p_hwfn->pf_iov_info->pending_events[vfid / 64] |= add_bit;
2696}
2697
2698static void qed_iov_pf_get_and_clear_pending_events(struct qed_hwfn *p_hwfn,
2699 u64 *events)
2700{
2701 u64 *p_pending_events = p_hwfn->pf_iov_info->pending_events;
2702
2703 memcpy(events, p_pending_events, sizeof(u64) * QED_VF_ARRAY_LENGTH);
2704 memset(p_pending_events, 0, sizeof(u64) * QED_VF_ARRAY_LENGTH);
2705}
2706
2707static int qed_sriov_vfpf_msg(struct qed_hwfn *p_hwfn,
2708 u16 abs_vfid, struct regpair *vf_msg)
2709{
2710 u8 min = (u8)p_hwfn->cdev->p_iov_info->first_vf_in_pf;
2711 struct qed_vf_info *p_vf;
2712
2713 if (!qed_iov_pf_sanity_check(p_hwfn, (int)abs_vfid - min)) {
2714 DP_VERBOSE(p_hwfn,
2715 QED_MSG_IOV,
2716 "Got a message from VF [abs 0x%08x] that cannot be handled by PF\n",
2717 abs_vfid);
2718 return 0;
2719 }
2720 p_vf = &p_hwfn->pf_iov_info->vfs_array[(u8)abs_vfid - min];
2721
2722 /* List the physical address of the request so that handler
2723 * could later on copy the message from it.
2724 */
2725 p_vf->vf_mbx.pending_req = (((u64)vf_msg->hi) << 32) | vf_msg->lo;
2726
2727 /* Mark the event and schedule the workqueue */
2728 qed_iov_pf_add_pending_events(p_hwfn, p_vf->relative_vf_id);
2729 qed_schedule_iov(p_hwfn, QED_IOV_WQ_MSG_FLAG);
2730
2731 return 0;
2732}
2733
2734int qed_sriov_eqe_event(struct qed_hwfn *p_hwfn,
2735 u8 opcode, __le16 echo, union event_ring_data *data)
2736{
2737 switch (opcode) {
2738 case COMMON_EVENT_VF_PF_CHANNEL:
2739 return qed_sriov_vfpf_msg(p_hwfn, le16_to_cpu(echo),
2740 &data->vf_pf_channel.msg_addr);
2741 default:
2742 DP_INFO(p_hwfn->cdev, "Unknown sriov eqe event 0x%02x\n",
2743 opcode);
2744 return -EINVAL;
2745 }
2746}
2747
32a47e72
YM		 2748u16 qed_iov_get_next_active_vf(struct qed_hwfn *p_hwfn, u16 rel_vf_id)
2749{
2750 struct qed_hw_sriov_info *p_iov = p_hwfn->cdev->p_iov_info;
2751 u16 i;
2752
2753 if (!p_iov)
2754 goto out;
2755
2756 for (i = rel_vf_id; i < p_iov->total_vfs; i++)
2757 if (qed_iov_is_valid_vfid(p_hwfn, rel_vf_id, true))
2758 return i;
2759
2760out:
2761 return MAX_NUM_VFS;
2762}
37bff2b9
YM		 2763
2764static int qed_iov_copy_vf_msg(struct qed_hwfn *p_hwfn, struct qed_ptt *ptt,
2765 int vfid)
2766{
2767 struct qed_dmae_params params;
2768 struct qed_vf_info *vf_info;
2769
2770 vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
2771 if (!vf_info)
2772 return -EINVAL;
2773
2774 memset(&params, 0, sizeof(struct qed_dmae_params));
2775 params.flags = QED_DMAE_FLAG_VF_SRC | QED_DMAE_FLAG_COMPLETION_DST;
2776 params.src_vfid = vf_info->abs_vf_id;
2777
2778 if (qed_dmae_host2host(p_hwfn, ptt,
2779 vf_info->vf_mbx.pending_req,
2780 vf_info->vf_mbx.req_phys,
2781 sizeof(union vfpf_tlvs) / 4, &params)) {
2782 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
2783 "Failed to copy message from VF 0x%02x\n", vfid);
2784
2785 return -EIO;
2786 }
2787
2788 return 0;
2789}
2790
eff16960
YM		 2791static void qed_iov_bulletin_set_forced_mac(struct qed_hwfn *p_hwfn,
2792 u8 *mac, int vfid)
2793{
2794 struct qed_vf_info *vf_info;
2795 u64 feature;
2796
2797 vf_info = qed_iov_get_vf_info(p_hwfn, (u16)vfid, true);
2798 if (!vf_info) {
2799 DP_NOTICE(p_hwfn->cdev,
2800 "Can not set forced MAC, invalid vfid [%d]\n", vfid);
2801 return;
2802 }
2803
2804 feature = 1 << MAC_ADDR_FORCED;
2805 memcpy(vf_info->bulletin.p_virt->mac, mac, ETH_ALEN);
2806
2807 vf_info->bulletin.p_virt->valid_bitmap |= feature;
2808 /* Forced MAC will disable MAC_ADDR */
2809 vf_info->bulletin.p_virt->valid_bitmap &=
2810 ~(1 << VFPF_BULLETIN_MAC_ADDR);
2811
2812 qed_iov_configure_vport_forced(p_hwfn, vf_info, feature);
2813}
2814
08feecd7
YM		 2815void qed_iov_bulletin_set_forced_vlan(struct qed_hwfn *p_hwfn,
2816 u16 pvid, int vfid)
2817{
2818 struct qed_vf_info *vf_info;
2819 u64 feature;
2820
2821 vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
2822 if (!vf_info) {
2823 DP_NOTICE(p_hwfn->cdev,
2824 "Can not set forced MAC, invalid vfid [%d]\n", vfid);
2825 return;
2826 }
2827
2828 feature = 1 << VLAN_ADDR_FORCED;
2829 vf_info->bulletin.p_virt->pvid = pvid;
2830 if (pvid)
2831 vf_info->bulletin.p_virt->valid_bitmap |= feature;
2832 else
2833 vf_info->bulletin.p_virt->valid_bitmap &= ~feature;
2834
2835 qed_iov_configure_vport_forced(p_hwfn, vf_info, feature);
2836}
2837
6ddc7608
YM		 2838static bool qed_iov_vf_has_vport_instance(struct qed_hwfn *p_hwfn, int vfid)
2839{
2840 struct qed_vf_info *p_vf_info;
2841
2842 p_vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
2843 if (!p_vf_info)
2844 return false;
2845
2846 return !!p_vf_info->vport_instance;
2847}
2848
0b55e27d
YM		 2849bool qed_iov_is_vf_stopped(struct qed_hwfn *p_hwfn, int vfid)
2850{
2851 struct qed_vf_info *p_vf_info;
2852
2853 p_vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
2854 if (!p_vf_info)
2855 return true;
2856
2857 return p_vf_info->state == VF_STOPPED;
2858}
2859
73390ac9
YM		 2860static bool qed_iov_spoofchk_get(struct qed_hwfn *p_hwfn, int vfid)
2861{
2862 struct qed_vf_info *vf_info;
2863
2864 vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
2865 if (!vf_info)
2866 return false;
2867
2868 return vf_info->spoof_chk;
2869}
2870
6ddc7608
YM		 2871int qed_iov_spoofchk_set(struct qed_hwfn *p_hwfn, int vfid, bool val)
2872{
2873 struct qed_vf_info *vf;
2874 int rc = -EINVAL;
2875
2876 if (!qed_iov_pf_sanity_check(p_hwfn, vfid)) {
2877 DP_NOTICE(p_hwfn,
2878 "SR-IOV sanity check failed, can't set spoofchk\n");
2879 goto out;
2880 }
2881
2882 vf = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
2883 if (!vf)
2884 goto out;
2885
2886 if (!qed_iov_vf_has_vport_instance(p_hwfn, vfid)) {
2887 /* After VF VPORT start PF will configure spoof check */
2888 vf->req_spoofchk_val = val;
2889 rc = 0;
2890 goto out;
2891 }
2892
2893 rc = __qed_iov_spoofchk_set(p_hwfn, vf, val);
2894
2895out:
2896 return rc;
2897}
2898
eff16960
YM		 2899static u8 *qed_iov_bulletin_get_forced_mac(struct qed_hwfn *p_hwfn,
2900 u16 rel_vf_id)
2901{
2902 struct qed_vf_info *p_vf;
2903
2904 p_vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, true);
2905 if (!p_vf || !p_vf->bulletin.p_virt)
2906 return NULL;
2907
2908 if (!(p_vf->bulletin.p_virt->valid_bitmap & (1 << MAC_ADDR_FORCED)))
2909 return NULL;
2910
2911 return p_vf->bulletin.p_virt->mac;
2912}
2913
08feecd7
YM		 2914u16 qed_iov_bulletin_get_forced_vlan(struct qed_hwfn *p_hwfn, u16 rel_vf_id)
2915{
2916 struct qed_vf_info *p_vf;
2917
2918 p_vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, true);
2919 if (!p_vf || !p_vf->bulletin.p_virt)
2920 return 0;
2921
2922 if (!(p_vf->bulletin.p_virt->valid_bitmap & (1 << VLAN_ADDR_FORCED)))
2923 return 0;
2924
2925 return p_vf->bulletin.p_virt->pvid;
2926}
2927
733def6a
YM		 2928static int qed_iov_configure_tx_rate(struct qed_hwfn *p_hwfn,
2929 struct qed_ptt *p_ptt, int vfid, int val)
2930{
2931 struct qed_vf_info *vf;
2932 u8 abs_vp_id = 0;
2933 int rc;
2934
2935 vf = qed_iov_get_vf_info(p_hwfn, (u16)vfid, true);
2936 if (!vf)
2937 return -EINVAL;
2938
2939 rc = qed_fw_vport(p_hwfn, vf->vport_id, &abs_vp_id);
2940 if (rc)
2941 return rc;
2942
2943 return qed_init_vport_rl(p_hwfn, p_ptt, abs_vp_id, (u32)val);
2944}
2945
2946int qed_iov_configure_min_tx_rate(struct qed_dev *cdev, int vfid, u32 rate)
2947{
2948 struct qed_vf_info *vf;
2949 u8 vport_id;
2950 int i;
2951
2952 for_each_hwfn(cdev, i) {
2953 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
2954
2955 if (!qed_iov_pf_sanity_check(p_hwfn, vfid)) {
2956 DP_NOTICE(p_hwfn,
2957 "SR-IOV sanity check failed, can't set min rate\n");
2958 return -EINVAL;
2959 }
2960 }
2961
2962 vf = qed_iov_get_vf_info(QED_LEADING_HWFN(cdev), (u16)vfid, true);
2963 vport_id = vf->vport_id;
2964
2965 return qed_configure_vport_wfq(cdev, vport_id, rate);
2966}
2967
73390ac9
YM		 2968static int qed_iov_get_vf_min_rate(struct qed_hwfn *p_hwfn, int vfid)
2969{
2970 struct qed_wfq_data *vf_vp_wfq;
2971 struct qed_vf_info *vf_info;
2972
2973 vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
2974 if (!vf_info)
2975 return 0;
2976
2977 vf_vp_wfq = &p_hwfn->qm_info.wfq_data[vf_info->vport_id];
2978
2979 if (vf_vp_wfq->configured)
2980 return vf_vp_wfq->min_speed;
2981 else
2982 return 0;
2983}
2984
37bff2b9
YM		 2985/**
2986 * qed_schedule_iov - schedules IOV task for VF and PF
2987 * @hwfn: hardware function pointer
2988 * @flag: IOV flag for VF/PF
2989 */
2990void qed_schedule_iov(struct qed_hwfn *hwfn, enum qed_iov_wq_flag flag)
2991{
2992 smp_mb__before_atomic();
2993 set_bit(flag, &hwfn->iov_task_flags);
2994 smp_mb__after_atomic();
2995 DP_VERBOSE(hwfn, QED_MSG_IOV, "Scheduling iov task [Flag: %d]\n", flag);
2996 queue_delayed_work(hwfn->iov_wq, &hwfn->iov_task, 0);
2997}
2998
1408cc1f
YM		 2999void qed_vf_start_iov_wq(struct qed_dev *cdev)
3000{
3001 int i;
3002
3003 for_each_hwfn(cdev, i)
3004 queue_delayed_work(cdev->hwfns[i].iov_wq,
3005 &cdev->hwfns[i].iov_task, 0);
3006}
3007
0b55e27d
YM		 3008int qed_sriov_disable(struct qed_dev *cdev, bool pci_enabled)
3009{
3010 int i, j;
3011
3012 for_each_hwfn(cdev, i)
3013 if (cdev->hwfns[i].iov_wq)
3014 flush_workqueue(cdev->hwfns[i].iov_wq);
3015
3016 /* Mark VFs for disablement */
3017 qed_iov_set_vfs_to_disable(cdev, true);
3018
3019 if (cdev->p_iov_info && cdev->p_iov_info->num_vfs && pci_enabled)
3020 pci_disable_sriov(cdev->pdev);
3021
3022 for_each_hwfn(cdev, i) {
3023 struct qed_hwfn *hwfn = &cdev->hwfns[i];
3024 struct qed_ptt *ptt = qed_ptt_acquire(hwfn);
3025
3026 /* Failure to acquire the ptt in 100g creates an odd error
3027 * where the first engine has already relased IOV.
3028 */
3029 if (!ptt) {
3030 DP_ERR(hwfn, "Failed to acquire ptt\n");
3031 return -EBUSY;
3032 }
3033
733def6a
YM		 3034 /* Clean WFQ db and configure equal weight for all vports */
3035 qed_clean_wfq_db(hwfn, ptt);
3036
0b55e27d
YM		 3037 qed_for_each_vf(hwfn, j) {
3038 int k;
3039
3040 if (!qed_iov_is_valid_vfid(hwfn, j, true))
3041 continue;
3042
3043 /* Wait until VF is disabled before releasing */
3044 for (k = 0; k < 100; k++) {
3045 if (!qed_iov_is_vf_stopped(hwfn, j))
3046 msleep(20);
3047 else
3048 break;
3049 }
3050
3051 if (k < 100)
3052 qed_iov_release_hw_for_vf(&cdev->hwfns[i],
3053 ptt, j);
3054 else
3055 DP_ERR(hwfn,
3056 "Timeout waiting for VF's FLR to end\n");
3057 }
3058
3059 qed_ptt_release(hwfn, ptt);
3060 }
3061
3062 qed_iov_set_vfs_to_disable(cdev, false);
3063
3064 return 0;
3065}
3066
3067static int qed_sriov_enable(struct qed_dev *cdev, int num)
3068{
3069 struct qed_sb_cnt_info sb_cnt_info;
3070 int i, j, rc;
3071
3072 if (num >= RESC_NUM(&cdev->hwfns[0], QED_VPORT)) {
3073 DP_NOTICE(cdev, "Can start at most %d VFs\n",
3074 RESC_NUM(&cdev->hwfns[0], QED_VPORT) - 1);
3075 return -EINVAL;
3076 }
3077
3078 /* Initialize HW for VF access */
3079 for_each_hwfn(cdev, j) {
3080 struct qed_hwfn *hwfn = &cdev->hwfns[j];
3081 struct qed_ptt *ptt = qed_ptt_acquire(hwfn);
3082 int num_sbs = 0, limit = 16;
3083
3084 if (!ptt) {
3085 DP_ERR(hwfn, "Failed to acquire ptt\n");
3086 rc = -EBUSY;
3087 goto err;
3088 }
3089
3090 memset(&sb_cnt_info, 0, sizeof(sb_cnt_info));
3091 qed_int_get_num_sbs(hwfn, &sb_cnt_info);
3092 num_sbs = min_t(int, sb_cnt_info.sb_free_blk, limit);
3093
3094 for (i = 0; i < num; i++) {
3095 if (!qed_iov_is_valid_vfid(hwfn, i, false))
3096 continue;
3097
3098 rc = qed_iov_init_hw_for_vf(hwfn,
3099 ptt, i, num_sbs / num);
3100 if (rc) {
3101 DP_ERR(cdev, "Failed to enable VF[%d]\n", i);
3102 qed_ptt_release(hwfn, ptt);
3103 goto err;
3104 }
3105 }
3106
3107 qed_ptt_release(hwfn, ptt);
3108 }
3109
3110 /* Enable SRIOV PCIe functions */
3111 rc = pci_enable_sriov(cdev->pdev, num);
3112 if (rc) {
3113 DP_ERR(cdev, "Failed to enable sriov [%d]\n", rc);
3114 goto err;
3115 }
3116
3117 return num;
3118
3119err:
3120 qed_sriov_disable(cdev, false);
3121 return rc;
3122}
3123
3124static int qed_sriov_configure(struct qed_dev *cdev, int num_vfs_param)
3125{
3126 if (!IS_QED_SRIOV(cdev)) {
3127 DP_VERBOSE(cdev, QED_MSG_IOV, "SR-IOV is not supported\n");
3128 return -EOPNOTSUPP;
3129 }
3130
3131 if (num_vfs_param)
3132 return qed_sriov_enable(cdev, num_vfs_param);
3133 else
3134 return qed_sriov_disable(cdev, true);
3135}
3136
eff16960
YM		 3137static int qed_sriov_pf_set_mac(struct qed_dev *cdev, u8 *mac, int vfid)
3138{
3139 int i;
3140
3141 if (!IS_QED_SRIOV(cdev) || !IS_PF_SRIOV_ALLOC(&cdev->hwfns[0])) {
3142 DP_VERBOSE(cdev, QED_MSG_IOV,
3143 "Cannot set a VF MAC; Sriov is not enabled\n");
3144 return -EINVAL;
3145 }
3146
3147 if (!qed_iov_is_valid_vfid(&cdev->hwfns[0], vfid, true)) {
3148 DP_VERBOSE(cdev, QED_MSG_IOV,
3149 "Cannot set VF[%d] MAC (VF is not active)\n", vfid);
3150 return -EINVAL;
3151 }
3152
3153 for_each_hwfn(cdev, i) {
3154 struct qed_hwfn *hwfn = &cdev->hwfns[i];
3155 struct qed_public_vf_info *vf_info;
3156
3157 vf_info = qed_iov_get_public_vf_info(hwfn, vfid, true);
3158 if (!vf_info)
3159 continue;
3160
3161 /* Set the forced MAC, and schedule the IOV task */
3162 ether_addr_copy(vf_info->forced_mac, mac);
3163 qed_schedule_iov(hwfn, QED_IOV_WQ_SET_UNICAST_FILTER_FLAG);
3164 }
3165
3166 return 0;
3167}
3168
08feecd7
YM		 3169static int qed_sriov_pf_set_vlan(struct qed_dev *cdev, u16 vid, int vfid)
3170{
3171 int i;
3172
3173 if (!IS_QED_SRIOV(cdev) || !IS_PF_SRIOV_ALLOC(&cdev->hwfns[0])) {
3174 DP_VERBOSE(cdev, QED_MSG_IOV,
3175 "Cannot set a VF MAC; Sriov is not enabled\n");
3176 return -EINVAL;
3177 }
3178
3179 if (!qed_iov_is_valid_vfid(&cdev->hwfns[0], vfid, true)) {
3180 DP_VERBOSE(cdev, QED_MSG_IOV,
3181 "Cannot set VF[%d] MAC (VF is not active)\n", vfid);
3182 return -EINVAL;
3183 }
3184
3185 for_each_hwfn(cdev, i) {
3186 struct qed_hwfn *hwfn = &cdev->hwfns[i];
3187 struct qed_public_vf_info *vf_info;
3188
3189 vf_info = qed_iov_get_public_vf_info(hwfn, vfid, true);
3190 if (!vf_info)
3191 continue;
3192
3193 /* Set the forced vlan, and schedule the IOV task */
3194 vf_info->forced_vlan = vid;
3195 qed_schedule_iov(hwfn, QED_IOV_WQ_SET_UNICAST_FILTER_FLAG);
3196 }
3197
3198 return 0;
3199}
3200
73390ac9
YM		 3201static int qed_get_vf_config(struct qed_dev *cdev,
3202 int vf_id, struct ifla_vf_info *ivi)
3203{
3204 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
3205 struct qed_public_vf_info *vf_info;
3206 struct qed_mcp_link_state link;
3207 u32 tx_rate;
3208
3209 /* Sanitize request */
3210 if (IS_VF(cdev))
3211 return -EINVAL;
3212
3213 if (!qed_iov_is_valid_vfid(&cdev->hwfns[0], vf_id, true)) {
3214 DP_VERBOSE(cdev, QED_MSG_IOV,
3215 "VF index [%d] isn't active\n", vf_id);
3216 return -EINVAL;
3217 }
3218
3219 vf_info = qed_iov_get_public_vf_info(hwfn, vf_id, true);
3220
3221 qed_iov_get_link(hwfn, vf_id, NULL, &link, NULL);
3222
3223 /* Fill information about VF */
3224 ivi->vf = vf_id;
3225
3226 if (is_valid_ether_addr(vf_info->forced_mac))
3227 ether_addr_copy(ivi->mac, vf_info->forced_mac);
3228 else
3229 ether_addr_copy(ivi->mac, vf_info->mac);
3230
3231 ivi->vlan = vf_info->forced_vlan;
3232 ivi->spoofchk = qed_iov_spoofchk_get(hwfn, vf_id);
3233 ivi->linkstate = vf_info->link_state;
3234 tx_rate = vf_info->tx_rate;
3235 ivi->max_tx_rate = tx_rate ? tx_rate : link.speed;
3236 ivi->min_tx_rate = qed_iov_get_vf_min_rate(hwfn, vf_id);
3237
3238 return 0;
3239}
3240
36558c3d
YM		 3241void qed_inform_vf_link_state(struct qed_hwfn *hwfn)
3242{
3243 struct qed_mcp_link_capabilities caps;
3244 struct qed_mcp_link_params params;
3245 struct qed_mcp_link_state link;
3246 int i;
3247
3248 if (!hwfn->pf_iov_info)
3249 return;
3250
3251 /* Update bulletin of all future possible VFs with link configuration */
3252 for (i = 0; i < hwfn->cdev->p_iov_info->total_vfs; i++) {
733def6a
YM		 3253 struct qed_public_vf_info *vf_info;
3254
3255 vf_info = qed_iov_get_public_vf_info(hwfn, i, false);
3256 if (!vf_info)
3257 continue;
3258
36558c3d
YM		 3259 memcpy(&params, qed_mcp_get_link_params(hwfn), sizeof(params));
3260 memcpy(&link, qed_mcp_get_link_state(hwfn), sizeof(link));
3261 memcpy(&caps, qed_mcp_get_link_capabilities(hwfn),
3262 sizeof(caps));
3263
733def6a
YM		 3264 /* Modify link according to the VF's configured link state */
3265 switch (vf_info->link_state) {
3266 case IFLA_VF_LINK_STATE_DISABLE:
3267 link.link_up = false;
3268 break;
3269 case IFLA_VF_LINK_STATE_ENABLE:
3270 link.link_up = true;
3271 /* Set speed according to maximum supported by HW.
3272 * that is 40G for regular devices and 100G for CMT
3273 * mode devices.
3274 */
3275 link.speed = (hwfn->cdev->num_hwfns > 1) ?
3276 100000 : 40000;
3277 default:
3278 /* In auto mode pass PF link image to VF */
3279 break;
3280 }
3281
3282 if (link.link_up && vf_info->tx_rate) {
3283 struct qed_ptt *ptt;
3284 int rate;
3285
3286 rate = min_t(int, vf_info->tx_rate, link.speed);
3287
3288 ptt = qed_ptt_acquire(hwfn);
3289 if (!ptt) {
3290 DP_NOTICE(hwfn, "Failed to acquire PTT\n");
3291 return;
3292 }
3293
3294 if (!qed_iov_configure_tx_rate(hwfn, ptt, i, rate)) {
3295 vf_info->tx_rate = rate;
3296 link.speed = rate;
3297 }
3298
3299 qed_ptt_release(hwfn, ptt);
3300 }
3301
36558c3d
YM		 3302 qed_iov_set_link(hwfn, i, &params, &link, &caps);
3303 }
3304
3305 qed_schedule_iov(hwfn, QED_IOV_WQ_BULLETIN_UPDATE_FLAG);
3306}
3307
733def6a
YM		 3308static int qed_set_vf_link_state(struct qed_dev *cdev,
3309 int vf_id, int link_state)
3310{
3311 int i;
3312
3313 /* Sanitize request */
3314 if (IS_VF(cdev))
3315 return -EINVAL;
3316
3317 if (!qed_iov_is_valid_vfid(&cdev->hwfns[0], vf_id, true)) {
3318 DP_VERBOSE(cdev, QED_MSG_IOV,
3319 "VF index [%d] isn't active\n", vf_id);
3320 return -EINVAL;
3321 }
3322
3323 /* Handle configuration of link state */
3324 for_each_hwfn(cdev, i) {
3325 struct qed_hwfn *hwfn = &cdev->hwfns[i];
3326 struct qed_public_vf_info *vf;
3327
3328 vf = qed_iov_get_public_vf_info(hwfn, vf_id, true);
3329 if (!vf)
3330 continue;
3331
3332 if (vf->link_state == link_state)
3333 continue;
3334
3335 vf->link_state = link_state;
3336 qed_inform_vf_link_state(&cdev->hwfns[i]);
3337 }
3338
3339 return 0;
3340}
3341
6ddc7608
YM		 3342static int qed_spoof_configure(struct qed_dev *cdev, int vfid, bool val)
3343{
3344 int i, rc = -EINVAL;
3345
3346 for_each_hwfn(cdev, i) {
3347 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
3348
3349 rc = qed_iov_spoofchk_set(p_hwfn, vfid, val);
3350 if (rc)
3351 break;
3352 }
3353
3354 return rc;
3355}
3356
733def6a
YM		 3357static int qed_configure_max_vf_rate(struct qed_dev *cdev, int vfid, int rate)
3358{
3359 int i;
3360
3361 for_each_hwfn(cdev, i) {
3362 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
3363 struct qed_public_vf_info *vf;
3364
3365 if (!qed_iov_pf_sanity_check(p_hwfn, vfid)) {
3366 DP_NOTICE(p_hwfn,
3367 "SR-IOV sanity check failed, can't set tx rate\n");
3368 return -EINVAL;
3369 }
3370
3371 vf = qed_iov_get_public_vf_info(p_hwfn, vfid, true);
3372
3373 vf->tx_rate = rate;
3374
3375 qed_inform_vf_link_state(p_hwfn);
3376 }
3377
3378 return 0;
3379}
3380
3381static int qed_set_vf_rate(struct qed_dev *cdev,
3382 int vfid, u32 min_rate, u32 max_rate)
3383{
3384 int rc_min = 0, rc_max = 0;
3385
3386 if (max_rate)
3387 rc_max = qed_configure_max_vf_rate(cdev, vfid, max_rate);
3388
3389 if (min_rate)
3390 rc_min = qed_iov_configure_min_tx_rate(cdev, vfid, min_rate);
3391
3392 if (rc_max | rc_min)
3393 return -EINVAL;
3394
3395 return 0;
3396}
3397
37bff2b9
YM		 3398static void qed_handle_vf_msg(struct qed_hwfn *hwfn)
3399{
3400 u64 events[QED_VF_ARRAY_LENGTH];
3401 struct qed_ptt *ptt;
3402 int i;
3403
3404 ptt = qed_ptt_acquire(hwfn);
3405 if (!ptt) {
3406 DP_VERBOSE(hwfn, QED_MSG_IOV,
3407 "Can't acquire PTT; re-scheduling\n");
3408 qed_schedule_iov(hwfn, QED_IOV_WQ_MSG_FLAG);
3409 return;
3410 }
3411
3412 qed_iov_pf_get_and_clear_pending_events(hwfn, events);
3413
3414 DP_VERBOSE(hwfn, QED_MSG_IOV,
3415 "Event mask of VF events: 0x%llx 0x%llx 0x%llx\n",
3416 events[0], events[1], events[2]);
3417
3418 qed_for_each_vf(hwfn, i) {
3419 /* Skip VFs with no pending messages */
3420 if (!(events[i / 64] & (1ULL << (i % 64))))
3421 continue;
3422
3423 DP_VERBOSE(hwfn, QED_MSG_IOV,
3424 "Handling VF message from VF 0x%02x [Abs 0x%02x]\n",
3425 i, hwfn->cdev->p_iov_info->first_vf_in_pf + i);
3426
3427 /* Copy VF's message to PF's request buffer for that VF */
3428 if (qed_iov_copy_vf_msg(hwfn, ptt, i))
3429 continue;
3430
3431 qed_iov_process_mbx_req(hwfn, ptt, i);
3432 }
3433
3434 qed_ptt_release(hwfn, ptt);
3435}
3436
08feecd7
YM		 3437static void qed_handle_pf_set_vf_unicast(struct qed_hwfn *hwfn)
3438{
3439 int i;
3440
3441 qed_for_each_vf(hwfn, i) {
3442 struct qed_public_vf_info *info;
3443 bool update = false;
eff16960 3444 u8 *mac;
08feecd7
YM		 3445
3446 info = qed_iov_get_public_vf_info(hwfn, i, true);
3447 if (!info)
3448 continue;
3449
3450 /* Update data on bulletin board */
eff16960
YM		 3451 mac = qed_iov_bulletin_get_forced_mac(hwfn, i);
3452 if (is_valid_ether_addr(info->forced_mac) &&
3453 (!mac || !ether_addr_equal(mac, info->forced_mac))) {
3454 DP_VERBOSE(hwfn,
3455 QED_MSG_IOV,
3456 "Handling PF setting of VF MAC to VF 0x%02x [Abs 0x%02x]\n",
3457 i,
3458 hwfn->cdev->p_iov_info->first_vf_in_pf + i);
3459
3460 /* Update bulletin board with forced MAC */
3461 qed_iov_bulletin_set_forced_mac(hwfn,
3462 info->forced_mac, i);
3463 update = true;
3464 }
08feecd7
YM		 3465
3466 if (qed_iov_bulletin_get_forced_vlan(hwfn, i) ^
3467 info->forced_vlan) {
3468 DP_VERBOSE(hwfn,
3469 QED_MSG_IOV,
3470 "Handling PF setting of pvid [0x%04x] to VF 0x%02x [Abs 0x%02x]\n",
3471 info->forced_vlan,
3472 i,
3473 hwfn->cdev->p_iov_info->first_vf_in_pf + i);
3474 qed_iov_bulletin_set_forced_vlan(hwfn,
3475 info->forced_vlan, i);
3476 update = true;
3477 }
3478
3479 if (update)
3480 qed_schedule_iov(hwfn, QED_IOV_WQ_BULLETIN_UPDATE_FLAG);
3481 }
3482}
3483
36558c3d
YM		 3484static void qed_handle_bulletin_post(struct qed_hwfn *hwfn)
3485{
3486 struct qed_ptt *ptt;
3487 int i;
3488
3489 ptt = qed_ptt_acquire(hwfn);
3490 if (!ptt) {
3491 DP_NOTICE(hwfn, "Failed allocating a ptt entry\n");
3492 qed_schedule_iov(hwfn, QED_IOV_WQ_BULLETIN_UPDATE_FLAG);
3493 return;
3494 }
3495
3496 qed_for_each_vf(hwfn, i)
3497 qed_iov_post_vf_bulletin(hwfn, i, ptt);
3498
3499 qed_ptt_release(hwfn, ptt);
3500}
3501
37bff2b9
YM		 3502void qed_iov_pf_task(struct work_struct *work)
3503{
3504 struct qed_hwfn *hwfn = container_of(work, struct qed_hwfn,
3505 iov_task.work);
0b55e27d 3506 int rc;
37bff2b9
YM		 3507
3508 if (test_and_clear_bit(QED_IOV_WQ_STOP_WQ_FLAG, &hwfn->iov_task_flags))
3509 return;
3510
0b55e27d
YM		 3511 if (test_and_clear_bit(QED_IOV_WQ_FLR_FLAG, &hwfn->iov_task_flags)) {
3512 struct qed_ptt *ptt = qed_ptt_acquire(hwfn);
3513
3514 if (!ptt) {
3515 qed_schedule_iov(hwfn, QED_IOV_WQ_FLR_FLAG);
3516 return;
3517 }
3518
3519 rc = qed_iov_vf_flr_cleanup(hwfn, ptt);
3520 if (rc)
3521 qed_schedule_iov(hwfn, QED_IOV_WQ_FLR_FLAG);
3522
3523 qed_ptt_release(hwfn, ptt);
3524 }
3525
37bff2b9
YM		 3526 if (test_and_clear_bit(QED_IOV_WQ_MSG_FLAG, &hwfn->iov_task_flags))
3527 qed_handle_vf_msg(hwfn);
08feecd7
YM		 3528
3529 if (test_and_clear_bit(QED_IOV_WQ_SET_UNICAST_FILTER_FLAG,
3530 &hwfn->iov_task_flags))
3531 qed_handle_pf_set_vf_unicast(hwfn);
3532
36558c3d
YM		 3533 if (test_and_clear_bit(QED_IOV_WQ_BULLETIN_UPDATE_FLAG,
3534 &hwfn->iov_task_flags))
3535 qed_handle_bulletin_post(hwfn);
37bff2b9
YM		 3536}
3537
3538void qed_iov_wq_stop(struct qed_dev *cdev, bool schedule_first)
3539{
3540 int i;
3541
3542 for_each_hwfn(cdev, i) {
3543 if (!cdev->hwfns[i].iov_wq)
3544 continue;
3545
3546 if (schedule_first) {
3547 qed_schedule_iov(&cdev->hwfns[i],
3548 QED_IOV_WQ_STOP_WQ_FLAG);
3549 cancel_delayed_work_sync(&cdev->hwfns[i].iov_task);
3550 }
3551
3552 flush_workqueue(cdev->hwfns[i].iov_wq);
3553 destroy_workqueue(cdev->hwfns[i].iov_wq);
3554 }
3555}
3556
3557int qed_iov_wq_start(struct qed_dev *cdev)
3558{
3559 char name[NAME_SIZE];
3560 int i;
3561
3562 for_each_hwfn(cdev, i) {
3563 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
3564
36558c3d
YM		 3565 /* PFs needs a dedicated workqueue only if they support IOV.
3566 * VFs always require one.
3567 */
3568 if (IS_PF(p_hwfn->cdev) && !IS_PF_SRIOV(p_hwfn))
37bff2b9
YM		 3569 continue;
3570
3571 snprintf(name, NAME_SIZE, "iov-%02x:%02x.%02x",
3572 cdev->pdev->bus->number,
3573 PCI_SLOT(cdev->pdev->devfn), p_hwfn->abs_pf_id);
3574
3575 p_hwfn->iov_wq = create_singlethread_workqueue(name);
3576 if (!p_hwfn->iov_wq) {
3577 DP_NOTICE(p_hwfn, "Cannot create iov workqueue\n");
3578 return -ENOMEM;
3579 }
3580
36558c3d
YM		 3581 if (IS_PF(cdev))
3582 INIT_DELAYED_WORK(&p_hwfn->iov_task, qed_iov_pf_task);
3583 else
3584 INIT_DELAYED_WORK(&p_hwfn->iov_task, qed_iov_vf_task);
37bff2b9
YM		 3585 }
3586
3587 return 0;
3588}
0b55e27d
YM		 3589
3590const struct qed_iov_hv_ops qed_iov_ops_pass = {
3591 .configure = &qed_sriov_configure,
eff16960 3592 .set_mac = &qed_sriov_pf_set_mac,
08feecd7 3593 .set_vlan = &qed_sriov_pf_set_vlan,
73390ac9 3594 .get_config = &qed_get_vf_config,
733def6a 3595 .set_link_state = &qed_set_vf_link_state,
6ddc7608 3596 .set_spoof = &qed_spoof_configure,
733def6a 3597 .set_rate = &qed_set_vf_rate,
0b55e27d 3598};
Linux 6.x block layer and io_uring tree(s)