qed: Add support for Energy efficient ethernet.
[linux-2.6-block.git] / drivers / net / ethernet / qlogic / qed / qed_mcp.h
CommitLineData
fe56b9e6 1/* QLogic qed NIC Driver
e8f1cb50 2 * Copyright (c) 2015-2017 QLogic Corporation
fe56b9e6 3 *
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4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and /or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
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31 */
32
33#ifndef _QED_MCP_H
34#define _QED_MCP_H
35
36#include <linux/types.h>
37#include <linux/delay.h>
fe56b9e6 38#include <linux/slab.h>
5529bad9 39#include <linux/spinlock.h>
1e128c81 40#include <linux/qed/qed_fcoe_if.h>
fe56b9e6 41#include "qed_hsi.h"
5d24bcf1 42#include "qed_dev_api.h"
fe56b9e6 43
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44struct qed_mcp_link_speed_params {
45 bool autoneg;
46 u32 advertised_speeds; /* bitmask of DRV_SPEED_CAPABILITY */
47 u32 forced_speed; /* In Mb/s */
48};
49
50struct qed_mcp_link_pause_params {
51 bool autoneg;
52 bool forced_rx;
53 bool forced_tx;
54};
55
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56enum qed_mcp_eee_mode {
57 QED_MCP_EEE_DISABLED,
58 QED_MCP_EEE_ENABLED,
59 QED_MCP_EEE_UNSUPPORTED
60};
61
cc875c2e 62struct qed_mcp_link_params {
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63 struct qed_mcp_link_speed_params speed;
64 struct qed_mcp_link_pause_params pause;
65 u32 loopback_mode;
66 struct qed_link_eee_params eee;
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67};
68
69struct qed_mcp_link_capabilities {
70 u32 speed_capabilities;
34f9199c 71 bool default_speed_autoneg;
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72 enum qed_mcp_eee_mode default_eee;
73 u32 eee_lpi_timer;
74 u8 eee_speed_caps;
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75};
76
77struct qed_mcp_link_state {
78 bool link_up;
79
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80 u32 min_pf_rate;
81
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82 /* Actual link speed in Mb/s */
83 u32 line_speed;
84
85 /* PF max speed in Mb/s, deduced from line_speed
86 * according to PF max bandwidth configuration.
87 */
88 u32 speed;
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89 bool full_duplex;
90
91 bool an;
92 bool an_complete;
93 bool parallel_detection;
94 bool pfc_enabled;
95
96#define QED_LINK_PARTNER_SPEED_1G_HD BIT(0)
97#define QED_LINK_PARTNER_SPEED_1G_FD BIT(1)
98#define QED_LINK_PARTNER_SPEED_10G BIT(2)
99#define QED_LINK_PARTNER_SPEED_20G BIT(3)
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100#define QED_LINK_PARTNER_SPEED_25G BIT(4)
101#define QED_LINK_PARTNER_SPEED_40G BIT(5)
102#define QED_LINK_PARTNER_SPEED_50G BIT(6)
103#define QED_LINK_PARTNER_SPEED_100G BIT(7)
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104 u32 partner_adv_speed;
105
106 bool partner_tx_flow_ctrl_en;
107 bool partner_rx_flow_ctrl_en;
108
109#define QED_LINK_PARTNER_SYMMETRIC_PAUSE (1)
110#define QED_LINK_PARTNER_ASYMMETRIC_PAUSE (2)
111#define QED_LINK_PARTNER_BOTH_PAUSE (3)
112 u8 partner_adv_pause;
113
114 bool sfp_tx_fault;
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115 bool eee_active;
116 u8 eee_adv_caps;
117 u8 eee_lp_adv_caps;
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118};
119
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120struct qed_mcp_function_info {
121 u8 pause_on_host;
122
123 enum qed_pci_personality protocol;
124
125 u8 bandwidth_min;
126 u8 bandwidth_max;
127
128 u8 mac[ETH_ALEN];
129
130 u64 wwn_port;
131 u64 wwn_node;
132
133#define QED_MCP_VLAN_UNSET (0xffff)
134 u16 ovlan;
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135
136 u16 mtu;
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137};
138
139struct qed_mcp_nvm_common {
140 u32 offset;
141 u32 param;
142 u32 resp;
143 u32 cmd;
144};
145
146struct qed_mcp_drv_version {
147 u32 version;
148 u8 name[MCP_DRV_VER_STR_SIZE - 4];
149};
150
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151struct qed_mcp_lan_stats {
152 u64 ucast_rx_pkts;
153 u64 ucast_tx_pkts;
154 u32 fcs_err;
155};
156
157struct qed_mcp_fcoe_stats {
158 u64 rx_pkts;
159 u64 tx_pkts;
160 u32 fcs_err;
161 u32 login_failure;
162};
163
164struct qed_mcp_iscsi_stats {
165 u64 rx_pdus;
166 u64 tx_pdus;
167 u64 rx_bytes;
168 u64 tx_bytes;
169};
170
171struct qed_mcp_rdma_stats {
172 u64 rx_pkts;
173 u64 tx_pkts;
174 u64 rx_bytes;
175 u64 tx_byts;
176};
177
178enum qed_mcp_protocol_type {
179 QED_MCP_LAN_STATS,
180 QED_MCP_FCOE_STATS,
181 QED_MCP_ISCSI_STATS,
182 QED_MCP_RDMA_STATS
183};
184
185union qed_mcp_protocol_stats {
186 struct qed_mcp_lan_stats lan_stats;
187 struct qed_mcp_fcoe_stats fcoe_stats;
188 struct qed_mcp_iscsi_stats iscsi_stats;
189 struct qed_mcp_rdma_stats rdma_stats;
190};
191
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192enum qed_ov_eswitch {
193 QED_OV_ESWITCH_NONE,
194 QED_OV_ESWITCH_VEB,
195 QED_OV_ESWITCH_VEPA
196};
197
198enum qed_ov_client {
199 QED_OV_CLIENT_DRV,
200 QED_OV_CLIENT_USER,
201 QED_OV_CLIENT_VENDOR_SPEC
202};
203
204enum qed_ov_driver_state {
205 QED_OV_DRIVER_STATE_NOT_LOADED,
206 QED_OV_DRIVER_STATE_DISABLED,
207 QED_OV_DRIVER_STATE_ACTIVE
208};
209
210enum qed_ov_wol {
211 QED_OV_WOL_DEFAULT,
212 QED_OV_WOL_DISABLED,
213 QED_OV_WOL_ENABLED
214};
215
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216/**
217 * @brief - returns the link params of the hw function
218 *
219 * @param p_hwfn
220 *
221 * @returns pointer to link params
222 */
223struct qed_mcp_link_params *qed_mcp_get_link_params(struct qed_hwfn *);
224
225/**
226 * @brief - return the link state of the hw function
227 *
228 * @param p_hwfn
229 *
230 * @returns pointer to link state
231 */
232struct qed_mcp_link_state *qed_mcp_get_link_state(struct qed_hwfn *);
233
234/**
235 * @brief - return the link capabilities of the hw function
236 *
237 * @param p_hwfn
238 *
239 * @returns pointer to link capabilities
240 */
241struct qed_mcp_link_capabilities
242 *qed_mcp_get_link_capabilities(struct qed_hwfn *p_hwfn);
243
244/**
245 * @brief Request the MFW to set the the link according to 'link_input'.
246 *
247 * @param p_hwfn
248 * @param p_ptt
249 * @param b_up - raise link if `true'. Reset link if `false'.
250 *
251 * @return int
252 */
253int qed_mcp_set_link(struct qed_hwfn *p_hwfn,
254 struct qed_ptt *p_ptt,
255 bool b_up);
256
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257/**
258 * @brief Get the management firmware version value
259 *
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260 * @param p_hwfn
261 * @param p_ptt
262 * @param p_mfw_ver - mfw version value
263 * @param p_running_bundle_id - image id in nvram; Optional.
fe56b9e6 264 *
1408cc1f 265 * @return int - 0 - operation was successful.
fe56b9e6 266 */
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267int qed_mcp_get_mfw_ver(struct qed_hwfn *p_hwfn,
268 struct qed_ptt *p_ptt,
269 u32 *p_mfw_ver, u32 *p_running_bundle_id);
fe56b9e6 270
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271/**
272 * @brief Get the MBI version value
273 *
274 * @param p_hwfn
275 * @param p_ptt
276 * @param p_mbi_ver - A pointer to a variable to be filled with the MBI version.
277 *
278 * @return int - 0 - operation was successful.
279 */
280int qed_mcp_get_mbi_ver(struct qed_hwfn *p_hwfn,
281 struct qed_ptt *p_ptt, u32 *p_mbi_ver);
282
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283/**
284 * @brief Get media type value of the port.
285 *
286 * @param cdev - qed dev pointer
287 * @param mfw_ver - media type value
288 *
289 * @return int -
290 * 0 - Operation was successul.
291 * -EBUSY - Operation failed
292 */
293int qed_mcp_get_media_type(struct qed_dev *cdev,
294 u32 *media_type);
295
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296/**
297 * @brief General function for sending commands to the MCP
298 * mailbox. It acquire mutex lock for the entire
299 * operation, from sending the request until the MCP
300 * response. Waiting for MCP response will be checked up
301 * to 5 seconds every 5ms.
302 *
303 * @param p_hwfn - hw function
304 * @param p_ptt - PTT required for register access
305 * @param cmd - command to be sent to the MCP.
306 * @param param - Optional param
307 * @param o_mcp_resp - The MCP response code (exclude sequence).
308 * @param o_mcp_param- Optional parameter provided by the MCP
309 * response
310 * @return int - 0 - operation
311 * was successul.
312 */
313int qed_mcp_cmd(struct qed_hwfn *p_hwfn,
314 struct qed_ptt *p_ptt,
315 u32 cmd,
316 u32 param,
317 u32 *o_mcp_resp,
318 u32 *o_mcp_param);
319
320/**
321 * @brief - drains the nig, allowing completion to pass in case of pauses.
322 * (Should be called only from sleepable context)
323 *
324 * @param p_hwfn
325 * @param p_ptt
326 */
327int qed_mcp_drain(struct qed_hwfn *p_hwfn,
328 struct qed_ptt *p_ptt);
329
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330/**
331 * @brief Get the flash size value
332 *
333 * @param p_hwfn
334 * @param p_ptt
335 * @param p_flash_size - flash size in bytes to be filled.
336 *
337 * @return int - 0 - operation was successul.
338 */
339int qed_mcp_get_flash_size(struct qed_hwfn *p_hwfn,
340 struct qed_ptt *p_ptt,
341 u32 *p_flash_size);
342
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343/**
344 * @brief Send driver version to MFW
345 *
346 * @param p_hwfn
347 * @param p_ptt
348 * @param version - Version value
349 * @param name - Protocol driver name
350 *
351 * @return int - 0 - operation was successul.
352 */
353int
354qed_mcp_send_drv_version(struct qed_hwfn *p_hwfn,
355 struct qed_ptt *p_ptt,
356 struct qed_mcp_drv_version *p_ver);
357
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358/**
359 * @brief Notify MFW about the change in base device properties
360 *
361 * @param p_hwfn
362 * @param p_ptt
363 * @param client - qed client type
364 *
365 * @return int - 0 - operation was successful.
366 */
367int qed_mcp_ov_update_current_config(struct qed_hwfn *p_hwfn,
368 struct qed_ptt *p_ptt,
369 enum qed_ov_client client);
370
371/**
372 * @brief Notify MFW about the driver state
373 *
374 * @param p_hwfn
375 * @param p_ptt
376 * @param drv_state - Driver state
377 *
378 * @return int - 0 - operation was successful.
379 */
380int qed_mcp_ov_update_driver_state(struct qed_hwfn *p_hwfn,
381 struct qed_ptt *p_ptt,
382 enum qed_ov_driver_state drv_state);
383
384/**
385 * @brief Send MTU size to MFW
386 *
387 * @param p_hwfn
388 * @param p_ptt
389 * @param mtu - MTU size
390 *
391 * @return int - 0 - operation was successful.
392 */
393int qed_mcp_ov_update_mtu(struct qed_hwfn *p_hwfn,
394 struct qed_ptt *p_ptt, u16 mtu);
395
396/**
397 * @brief Send MAC address to MFW
398 *
399 * @param p_hwfn
400 * @param p_ptt
401 * @param mac - MAC address
402 *
403 * @return int - 0 - operation was successful.
404 */
405int qed_mcp_ov_update_mac(struct qed_hwfn *p_hwfn,
406 struct qed_ptt *p_ptt, u8 *mac);
407
408/**
409 * @brief Send WOL mode to MFW
410 *
411 * @param p_hwfn
412 * @param p_ptt
413 * @param wol - WOL mode
414 *
415 * @return int - 0 - operation was successful.
416 */
417int qed_mcp_ov_update_wol(struct qed_hwfn *p_hwfn,
418 struct qed_ptt *p_ptt,
419 enum qed_ov_wol wol);
420
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421/**
422 * @brief Set LED status
423 *
424 * @param p_hwfn
425 * @param p_ptt
426 * @param mode - LED mode
427 *
428 * @return int - 0 - operation was successful.
429 */
430int qed_mcp_set_led(struct qed_hwfn *p_hwfn,
431 struct qed_ptt *p_ptt,
432 enum qed_led_mode mode);
433
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434/**
435 * @brief Read from nvm
436 *
437 * @param cdev
438 * @param addr - nvm offset
439 * @param p_buf - nvm read buffer
440 * @param len - buffer len
441 *
442 * @return int - 0 - operation was successful.
443 */
444int qed_mcp_nvm_read(struct qed_dev *cdev, u32 addr, u8 *p_buf, u32 len);
445
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446struct qed_nvm_image_att {
447 u32 start_addr;
448 u32 length;
449};
450
451/**
452 * @brief Allows reading a whole nvram image
453 *
454 * @param p_hwfn
455 * @param p_ptt
456 * @param image_id - image requested for reading
457 * @param p_buffer - allocated buffer into which to fill data
458 * @param buffer_len - length of the allocated buffer.
459 *
460 * @return 0 iff p_buffer now contains the nvram image.
461 */
462int qed_mcp_get_nvm_image(struct qed_hwfn *p_hwfn,
463 struct qed_ptt *p_ptt,
464 enum qed_nvm_images image_id,
465 u8 *p_buffer, u32 buffer_len);
466
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467/**
468 * @brief Bist register test
469 *
470 * @param p_hwfn - hw function
471 * @param p_ptt - PTT required for register access
472 *
473 * @return int - 0 - operation was successful.
474 */
475int qed_mcp_bist_register_test(struct qed_hwfn *p_hwfn,
476 struct qed_ptt *p_ptt);
477
478/**
479 * @brief Bist clock test
480 *
481 * @param p_hwfn - hw function
482 * @param p_ptt - PTT required for register access
483 *
484 * @return int - 0 - operation was successful.
485 */
486int qed_mcp_bist_clock_test(struct qed_hwfn *p_hwfn,
487 struct qed_ptt *p_ptt);
488
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489/**
490 * @brief Bist nvm test - get number of images
491 *
492 * @param p_hwfn - hw function
493 * @param p_ptt - PTT required for register access
494 * @param num_images - number of images if operation was
495 * successful. 0 if not.
496 *
497 * @return int - 0 - operation was successful.
498 */
499int qed_mcp_bist_nvm_test_get_num_images(struct qed_hwfn *p_hwfn,
500 struct qed_ptt *p_ptt,
501 u32 *num_images);
502
503/**
504 * @brief Bist nvm test - get image attributes by index
505 *
506 * @param p_hwfn - hw function
507 * @param p_ptt - PTT required for register access
508 * @param p_image_att - Attributes of image
509 * @param image_index - Index of image to get information for
510 *
511 * @return int - 0 - operation was successful.
512 */
513int qed_mcp_bist_nvm_test_get_image_att(struct qed_hwfn *p_hwfn,
514 struct qed_ptt *p_ptt,
515 struct bist_nvm_image_att *p_image_att,
516 u32 image_index);
517
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518/* Using hwfn number (and not pf_num) is required since in CMT mode,
519 * same pf_num may be used by two different hwfn
520 * TODO - this shouldn't really be in .h file, but until all fields
521 * required during hw-init will be placed in their correct place in shmem
522 * we need it in qed_dev.c [for readin the nvram reflection in shmem].
523 */
524#define MCP_PF_ID_BY_REL(p_hwfn, rel_pfid) (QED_IS_BB((p_hwfn)->cdev) ? \
525 ((rel_pfid) | \
526 ((p_hwfn)->abs_pf_id & 1) << 3) : \
527 rel_pfid)
528#define MCP_PF_ID(p_hwfn) MCP_PF_ID_BY_REL(p_hwfn, (p_hwfn)->rel_pf_id)
529
9c79ddaa 530#define MFW_PORT(_p_hwfn) ((_p_hwfn)->abs_pf_id % \
78cea9ff 531 ((_p_hwfn)->cdev->num_ports_in_engine * \
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532 qed_device_num_engines((_p_hwfn)->cdev)))
533
fe56b9e6 534struct qed_mcp_info {
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535 /* List for mailbox commands which were sent and wait for a response */
536 struct list_head cmd_list;
537
538 /* Spinlock used for protecting the access to the mailbox commands list
539 * and the sending of the commands.
540 */
541 spinlock_t cmd_lock;
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542
543 /* Spinlock used for syncing SW link-changes and link-changes
544 * originating from attention context.
545 */
546 spinlock_t link_lock;
5529bad9 547 bool block_mb_sending;
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548 u32 public_base;
549 u32 drv_mb_addr;
550 u32 mfw_mb_addr;
551 u32 port_addr;
552 u16 drv_mb_seq;
553 u16 drv_pulse_seq;
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554 struct qed_mcp_link_params link_input;
555 struct qed_mcp_link_state link_output;
556 struct qed_mcp_link_capabilities link_capabilities;
fe56b9e6 557 struct qed_mcp_function_info func_info;
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558 u8 *mfw_mb_cur;
559 u8 *mfw_mb_shadow;
560 u16 mfw_mb_length;
4ed1eea8 561 u32 mcp_hist;
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562
563 /* Capabilties negotiated with the MFW */
564 u32 capabilities;
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565};
566
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567struct qed_mcp_mb_params {
568 u32 cmd;
569 u32 param;
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570 void *p_data_src;
571 u8 data_src_size;
572 void *p_data_dst;
573 u8 data_dst_size;
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574 u32 mcp_resp;
575 u32 mcp_param;
576};
577
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578/**
579 * @brief Initialize the interface with the MCP
580 *
581 * @param p_hwfn - HW func
582 * @param p_ptt - PTT required for register access
583 *
584 * @return int
585 */
586int qed_mcp_cmd_init(struct qed_hwfn *p_hwfn,
587 struct qed_ptt *p_ptt);
588
589/**
590 * @brief Initialize the port interface with the MCP
591 *
592 * @param p_hwfn
593 * @param p_ptt
594 * Can only be called after `num_ports_in_engines' is set
595 */
596void qed_mcp_cmd_port_init(struct qed_hwfn *p_hwfn,
597 struct qed_ptt *p_ptt);
598/**
599 * @brief Releases resources allocated during the init process.
600 *
601 * @param p_hwfn - HW func
602 * @param p_ptt - PTT required for register access
603 *
604 * @return int
605 */
606
607int qed_mcp_free(struct qed_hwfn *p_hwfn);
608
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609/**
610 * @brief This function is called from the DPC context. After
611 * pointing PTT to the mfw mb, check for events sent by the MCP
612 * to the driver and ack them. In case a critical event
613 * detected, it will be handled here, otherwise the work will be
614 * queued to a sleepable work-queue.
615 *
616 * @param p_hwfn - HW function
617 * @param p_ptt - PTT required for register access
618 * @return int - 0 - operation
619 * was successul.
620 */
621int qed_mcp_handle_events(struct qed_hwfn *p_hwfn,
622 struct qed_ptt *p_ptt);
623
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624enum qed_drv_role {
625 QED_DRV_ROLE_OS,
626 QED_DRV_ROLE_KDUMP,
627};
628
629struct qed_load_req_params {
630 /* Input params */
631 enum qed_drv_role drv_role;
632 u8 timeout_val;
633 bool avoid_eng_reset;
634 enum qed_override_force_load override_force_load;
635
636 /* Output params */
637 u32 load_code;
638};
639
fe56b9e6 640/**
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641 * @brief Sends a LOAD_REQ to the MFW, and in case the operation succeeds,
642 * returns whether this PF is the first on the engine/port or function.
643 *
644 * @param p_hwfn
645 * @param p_ptt
646 * @param p_params
647 *
648 * @return int - 0 - Operation was successful.
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649 */
650int qed_mcp_load_req(struct qed_hwfn *p_hwfn,
651 struct qed_ptt *p_ptt,
5d24bcf1 652 struct qed_load_req_params *p_params);
fe56b9e6 653
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654/**
655 * @brief Sends a UNLOAD_REQ message to the MFW
656 *
657 * @param p_hwfn
658 * @param p_ptt
659 *
660 * @return int - 0 - Operation was successful.
661 */
662int qed_mcp_unload_req(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
663
664/**
665 * @brief Sends a UNLOAD_DONE message to the MFW
666 *
667 * @param p_hwfn
668 * @param p_ptt
669 *
670 * @return int - 0 - Operation was successful.
671 */
672int qed_mcp_unload_done(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
673
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674/**
675 * @brief Read the MFW mailbox into Current buffer.
676 *
677 * @param p_hwfn
678 * @param p_ptt
679 */
680void qed_mcp_read_mb(struct qed_hwfn *p_hwfn,
681 struct qed_ptt *p_ptt);
682
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683/**
684 * @brief Ack to mfw that driver finished FLR process for VFs
685 *
686 * @param p_hwfn
687 * @param p_ptt
688 * @param vfs_to_ack - bit mask of all engine VFs for which the PF acks.
689 *
690 * @param return int - 0 upon success.
691 */
692int qed_mcp_ack_vf_flr(struct qed_hwfn *p_hwfn,
693 struct qed_ptt *p_ptt, u32 *vfs_to_ack);
694
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695/**
696 * @brief - calls during init to read shmem of all function-related info.
697 *
698 * @param p_hwfn
699 *
700 * @param return 0 upon success.
701 */
702int qed_mcp_fill_shmem_func_info(struct qed_hwfn *p_hwfn,
703 struct qed_ptt *p_ptt);
704
705/**
706 * @brief - Reset the MCP using mailbox command.
707 *
708 * @param p_hwfn
709 * @param p_ptt
710 *
711 * @param return 0 upon success.
712 */
713int qed_mcp_reset(struct qed_hwfn *p_hwfn,
714 struct qed_ptt *p_ptt);
715
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716/**
717 * @brief - Sends an NVM read command request to the MFW to get
718 * a buffer.
719 *
720 * @param p_hwfn
721 * @param p_ptt
722 * @param cmd - Command: DRV_MSG_CODE_NVM_GET_FILE_DATA or
723 * DRV_MSG_CODE_NVM_READ_NVRAM commands
724 * @param param - [0:23] - Offset [24:31] - Size
725 * @param o_mcp_resp - MCP response
726 * @param o_mcp_param - MCP response param
727 * @param o_txn_size - Buffer size output
728 * @param o_buf - Pointer to the buffer returned by the MFW.
729 *
730 * @param return 0 upon success.
731 */
732int qed_mcp_nvm_rd_cmd(struct qed_hwfn *p_hwfn,
733 struct qed_ptt *p_ptt,
734 u32 cmd,
735 u32 param,
736 u32 *o_mcp_resp,
737 u32 *o_mcp_param, u32 *o_txn_size, u32 *o_buf);
738
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739/**
740 * @brief indicates whether the MFW objects [under mcp_info] are accessible
741 *
742 * @param p_hwfn
743 *
744 * @return true iff MFW is running and mcp_info is initialized
745 */
746bool qed_mcp_is_init(struct qed_hwfn *p_hwfn);
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747
748/**
749 * @brief request MFW to configure MSI-X for a VF
750 *
751 * @param p_hwfn
752 * @param p_ptt
753 * @param vf_id - absolute inside engine
754 * @param num_sbs - number of entries to request
755 *
756 * @return int
757 */
758int qed_mcp_config_vf_msix(struct qed_hwfn *p_hwfn,
759 struct qed_ptt *p_ptt, u8 vf_id, u8 num);
760
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761/**
762 * @brief - Halt the MCP.
763 *
764 * @param p_hwfn
765 * @param p_ptt
766 *
767 * @param return 0 upon success.
768 */
769int qed_mcp_halt(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
770
771/**
772 * @brief - Wake up the MCP.
773 *
774 * @param p_hwfn
775 * @param p_ptt
776 *
777 * @param return 0 upon success.
778 */
779int qed_mcp_resume(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
780
a64b02d5 781int qed_configure_pf_min_bandwidth(struct qed_dev *cdev, u8 min_bw);
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782int qed_configure_pf_max_bandwidth(struct qed_dev *cdev, u8 max_bw);
783int __qed_configure_pf_max_bandwidth(struct qed_hwfn *p_hwfn,
784 struct qed_ptt *p_ptt,
785 struct qed_mcp_link_state *p_link,
786 u8 max_bw);
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787int __qed_configure_pf_min_bandwidth(struct qed_hwfn *p_hwfn,
788 struct qed_ptt *p_ptt,
789 struct qed_mcp_link_state *p_link,
790 u8 min_bw);
351a4ded 791
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792int qed_mcp_mask_parities(struct qed_hwfn *p_hwfn,
793 struct qed_ptt *p_ptt, u32 mask_parities);
794
0fefbfba 795/**
9c8517c4 796 * @brief - Sets the MFW's max value for the given resource
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797 *
798 * @param p_hwfn
799 * @param p_ptt
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800 * @param res_id
801 * @param resc_max_val
802 * @param p_mcp_resp
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803 *
804 * @return int - 0 - operation was successful.
805 */
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806int
807qed_mcp_set_resc_max_val(struct qed_hwfn *p_hwfn,
808 struct qed_ptt *p_ptt,
809 enum qed_resources res_id,
810 u32 resc_max_val, u32 *p_mcp_resp);
0fefbfba 811
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812/**
813 * @brief - Gets the MFW allocation info for the given resource
814 *
815 * @param p_hwfn
816 * @param p_ptt
9c8517c4 817 * @param res_id
2edbff8d 818 * @param p_mcp_resp
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819 * @param p_resc_num
820 * @param p_resc_start
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821 *
822 * @return int - 0 - operation was successful.
823 */
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824int
825qed_mcp_get_resc_info(struct qed_hwfn *p_hwfn,
826 struct qed_ptt *p_ptt,
827 enum qed_resources res_id,
828 u32 *p_mcp_resp, u32 *p_resc_num, u32 *p_resc_start);
829
830/**
831 * @brief Send eswitch mode to MFW
832 *
833 * @param p_hwfn
834 * @param p_ptt
835 * @param eswitch - eswitch mode
836 *
837 * @return int - 0 - operation was successful.
838 */
839int qed_mcp_ov_update_eswitch(struct qed_hwfn *p_hwfn,
840 struct qed_ptt *p_ptt,
841 enum qed_ov_eswitch eswitch);
842
843#define QED_MCP_RESC_LOCK_MIN_VAL RESOURCE_DUMP
844#define QED_MCP_RESC_LOCK_MAX_VAL 31
845
846enum qed_resc_lock {
847 QED_RESC_LOCK_DBG_DUMP = QED_MCP_RESC_LOCK_MIN_VAL,
db82f70e 848 QED_RESC_LOCK_PTP_PORT0,
849 QED_RESC_LOCK_PTP_PORT1,
850 QED_RESC_LOCK_PTP_PORT2,
851 QED_RESC_LOCK_PTP_PORT3,
f470f22c 852 QED_RESC_LOCK_RESC_ALLOC = QED_MCP_RESC_LOCK_MAX_VAL,
853 QED_RESC_LOCK_RESC_INVALID
9c8517c4 854};
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855
856/**
857 * @brief - Initiates PF FLR
858 *
859 * @param p_hwfn
860 * @param p_ptt
861 *
862 * @return int - 0 - operation was successful.
863 */
864int qed_mcp_initiate_pf_flr(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
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865struct qed_resc_lock_params {
866 /* Resource number [valid values are 0..31] */
867 u8 resource;
868
869 /* Lock timeout value in seconds [default, none or 1..254] */
870 u8 timeout;
871#define QED_MCP_RESC_LOCK_TO_DEFAULT 0
872#define QED_MCP_RESC_LOCK_TO_NONE 255
873
874 /* Number of times to retry locking */
875 u8 retry_num;
f470f22c 876#define QED_MCP_RESC_LOCK_RETRY_CNT_DFLT 10
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877
878 /* The interval in usec between retries */
879 u16 retry_interval;
f470f22c 880#define QED_MCP_RESC_LOCK_RETRY_VAL_DFLT 10000
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881
882 /* Use sleep or delay between retries */
883 bool sleep_b4_retry;
884
885 /* Will be set as true if the resource is free and granted */
886 bool b_granted;
887
888 /* Will be filled with the resource owner.
889 * [0..15 = PF0-15, 16 = MFW]
890 */
891 u8 owner;
892};
893
894/**
895 * @brief Acquires MFW generic resource lock
896 *
897 * @param p_hwfn
898 * @param p_ptt
899 * @param p_params
900 *
901 * @return int - 0 - operation was successful.
902 */
903int
904qed_mcp_resc_lock(struct qed_hwfn *p_hwfn,
905 struct qed_ptt *p_ptt, struct qed_resc_lock_params *p_params);
906
907struct qed_resc_unlock_params {
908 /* Resource number [valid values are 0..31] */
909 u8 resource;
910
911 /* Allow to release a resource even if belongs to another PF */
912 bool b_force;
913
914 /* Will be set as true if the resource is released */
915 bool b_released;
916};
917
918/**
919 * @brief Releases MFW generic resource lock
920 *
921 * @param p_hwfn
922 * @param p_ptt
923 * @param p_params
924 *
925 * @return int - 0 - operation was successful.
926 */
927int
928qed_mcp_resc_unlock(struct qed_hwfn *p_hwfn,
929 struct qed_ptt *p_ptt,
930 struct qed_resc_unlock_params *p_params);
931
f470f22c 932/**
933 * @brief - default initialization for lock/unlock resource structs
934 *
935 * @param p_lock - lock params struct to be initialized; Can be NULL
936 * @param p_unlock - unlock params struct to be initialized; Can be NULL
937 * @param resource - the requested resource
938 * @paral b_is_permanent - disable retries & aging when set
939 */
940void qed_mcp_resc_lock_default_init(struct qed_resc_lock_params *p_lock,
941 struct qed_resc_unlock_params *p_unlock,
942 enum qed_resc_lock
943 resource, bool b_is_permanent);
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944/**
945 * @brief Learn of supported MFW features; To be done during early init
946 *
947 * @param p_hwfn
948 * @param p_ptt
949 */
950int qed_mcp_get_capabilities(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
f470f22c 951
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952/**
953 * @brief Inform MFW of set of features supported by driver. Should be done
954 * inside the content of the LOAD_REQ.
955 *
956 * @param p_hwfn
957 * @param p_ptt
958 */
959int qed_mcp_set_capabilities(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
fe56b9e6 960#endif