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fe56b9e6 | 1 | /* QLogic qed NIC Driver |
e8f1cb50 | 2 | * Copyright (c) 2015-2017 QLogic Corporation |
fe56b9e6 | 3 | * |
e8f1cb50 MY |
4 | * This software is available to you under a choice of one of two |
5 | * licenses. You may choose to be licensed under the terms of the GNU | |
6 | * General Public License (GPL) Version 2, available from the file | |
7 | * COPYING in the main directory of this source tree, or the | |
8 | * OpenIB.org BSD license below: | |
9 | * | |
10 | * Redistribution and use in source and binary forms, with or | |
11 | * without modification, are permitted provided that the following | |
12 | * conditions are met: | |
13 | * | |
14 | * - Redistributions of source code must retain the above | |
15 | * copyright notice, this list of conditions and the following | |
16 | * disclaimer. | |
17 | * | |
18 | * - Redistributions in binary form must reproduce the above | |
19 | * copyright notice, this list of conditions and the following | |
20 | * disclaimer in the documentation and /or other materials | |
21 | * provided with the distribution. | |
22 | * | |
23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
25 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
26 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | |
27 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | |
28 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | |
29 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | |
30 | * SOFTWARE. | |
fe56b9e6 YM |
31 | */ |
32 | ||
33 | #ifndef _QED_MCP_H | |
34 | #define _QED_MCP_H | |
35 | ||
36 | #include <linux/types.h> | |
37 | #include <linux/delay.h> | |
fe56b9e6 | 38 | #include <linux/slab.h> |
5529bad9 | 39 | #include <linux/spinlock.h> |
1e128c81 | 40 | #include <linux/qed/qed_fcoe_if.h> |
fe56b9e6 | 41 | #include "qed_hsi.h" |
5d24bcf1 | 42 | #include "qed_dev_api.h" |
fe56b9e6 | 43 | |
cc875c2e YM |
44 | struct qed_mcp_link_speed_params { |
45 | bool autoneg; | |
46 | u32 advertised_speeds; /* bitmask of DRV_SPEED_CAPABILITY */ | |
47 | u32 forced_speed; /* In Mb/s */ | |
48 | }; | |
49 | ||
50 | struct qed_mcp_link_pause_params { | |
51 | bool autoneg; | |
52 | bool forced_rx; | |
53 | bool forced_tx; | |
54 | }; | |
55 | ||
56 | struct qed_mcp_link_params { | |
57 | struct qed_mcp_link_speed_params speed; | |
58 | struct qed_mcp_link_pause_params pause; | |
59 | u32 loopback_mode; | |
60 | }; | |
61 | ||
62 | struct qed_mcp_link_capabilities { | |
63 | u32 speed_capabilities; | |
34f9199c | 64 | bool default_speed_autoneg; |
cc875c2e YM |
65 | }; |
66 | ||
67 | struct qed_mcp_link_state { | |
68 | bool link_up; | |
69 | ||
a64b02d5 MC |
70 | u32 min_pf_rate; |
71 | ||
4b01e519 MC |
72 | /* Actual link speed in Mb/s */ |
73 | u32 line_speed; | |
74 | ||
75 | /* PF max speed in Mb/s, deduced from line_speed | |
76 | * according to PF max bandwidth configuration. | |
77 | */ | |
78 | u32 speed; | |
cc875c2e YM |
79 | bool full_duplex; |
80 | ||
81 | bool an; | |
82 | bool an_complete; | |
83 | bool parallel_detection; | |
84 | bool pfc_enabled; | |
85 | ||
86 | #define QED_LINK_PARTNER_SPEED_1G_HD BIT(0) | |
87 | #define QED_LINK_PARTNER_SPEED_1G_FD BIT(1) | |
88 | #define QED_LINK_PARTNER_SPEED_10G BIT(2) | |
89 | #define QED_LINK_PARTNER_SPEED_20G BIT(3) | |
054c67d1 SRK |
90 | #define QED_LINK_PARTNER_SPEED_25G BIT(4) |
91 | #define QED_LINK_PARTNER_SPEED_40G BIT(5) | |
92 | #define QED_LINK_PARTNER_SPEED_50G BIT(6) | |
93 | #define QED_LINK_PARTNER_SPEED_100G BIT(7) | |
cc875c2e YM |
94 | u32 partner_adv_speed; |
95 | ||
96 | bool partner_tx_flow_ctrl_en; | |
97 | bool partner_rx_flow_ctrl_en; | |
98 | ||
99 | #define QED_LINK_PARTNER_SYMMETRIC_PAUSE (1) | |
100 | #define QED_LINK_PARTNER_ASYMMETRIC_PAUSE (2) | |
101 | #define QED_LINK_PARTNER_BOTH_PAUSE (3) | |
102 | u8 partner_adv_pause; | |
103 | ||
104 | bool sfp_tx_fault; | |
105 | }; | |
106 | ||
fe56b9e6 YM |
107 | struct qed_mcp_function_info { |
108 | u8 pause_on_host; | |
109 | ||
110 | enum qed_pci_personality protocol; | |
111 | ||
112 | u8 bandwidth_min; | |
113 | u8 bandwidth_max; | |
114 | ||
115 | u8 mac[ETH_ALEN]; | |
116 | ||
117 | u64 wwn_port; | |
118 | u64 wwn_node; | |
119 | ||
120 | #define QED_MCP_VLAN_UNSET (0xffff) | |
121 | u16 ovlan; | |
0fefbfba SK |
122 | |
123 | u16 mtu; | |
fe56b9e6 YM |
124 | }; |
125 | ||
126 | struct qed_mcp_nvm_common { | |
127 | u32 offset; | |
128 | u32 param; | |
129 | u32 resp; | |
130 | u32 cmd; | |
131 | }; | |
132 | ||
133 | struct qed_mcp_drv_version { | |
134 | u32 version; | |
135 | u8 name[MCP_DRV_VER_STR_SIZE - 4]; | |
136 | }; | |
137 | ||
6c754246 SRK |
138 | struct qed_mcp_lan_stats { |
139 | u64 ucast_rx_pkts; | |
140 | u64 ucast_tx_pkts; | |
141 | u32 fcs_err; | |
142 | }; | |
143 | ||
144 | struct qed_mcp_fcoe_stats { | |
145 | u64 rx_pkts; | |
146 | u64 tx_pkts; | |
147 | u32 fcs_err; | |
148 | u32 login_failure; | |
149 | }; | |
150 | ||
151 | struct qed_mcp_iscsi_stats { | |
152 | u64 rx_pdus; | |
153 | u64 tx_pdus; | |
154 | u64 rx_bytes; | |
155 | u64 tx_bytes; | |
156 | }; | |
157 | ||
158 | struct qed_mcp_rdma_stats { | |
159 | u64 rx_pkts; | |
160 | u64 tx_pkts; | |
161 | u64 rx_bytes; | |
162 | u64 tx_byts; | |
163 | }; | |
164 | ||
165 | enum qed_mcp_protocol_type { | |
166 | QED_MCP_LAN_STATS, | |
167 | QED_MCP_FCOE_STATS, | |
168 | QED_MCP_ISCSI_STATS, | |
169 | QED_MCP_RDMA_STATS | |
170 | }; | |
171 | ||
172 | union qed_mcp_protocol_stats { | |
173 | struct qed_mcp_lan_stats lan_stats; | |
174 | struct qed_mcp_fcoe_stats fcoe_stats; | |
175 | struct qed_mcp_iscsi_stats iscsi_stats; | |
176 | struct qed_mcp_rdma_stats rdma_stats; | |
177 | }; | |
178 | ||
0fefbfba SK |
179 | enum qed_ov_eswitch { |
180 | QED_OV_ESWITCH_NONE, | |
181 | QED_OV_ESWITCH_VEB, | |
182 | QED_OV_ESWITCH_VEPA | |
183 | }; | |
184 | ||
185 | enum qed_ov_client { | |
186 | QED_OV_CLIENT_DRV, | |
187 | QED_OV_CLIENT_USER, | |
188 | QED_OV_CLIENT_VENDOR_SPEC | |
189 | }; | |
190 | ||
191 | enum qed_ov_driver_state { | |
192 | QED_OV_DRIVER_STATE_NOT_LOADED, | |
193 | QED_OV_DRIVER_STATE_DISABLED, | |
194 | QED_OV_DRIVER_STATE_ACTIVE | |
195 | }; | |
196 | ||
197 | enum qed_ov_wol { | |
198 | QED_OV_WOL_DEFAULT, | |
199 | QED_OV_WOL_DISABLED, | |
200 | QED_OV_WOL_ENABLED | |
201 | }; | |
202 | ||
cc875c2e YM |
203 | /** |
204 | * @brief - returns the link params of the hw function | |
205 | * | |
206 | * @param p_hwfn | |
207 | * | |
208 | * @returns pointer to link params | |
209 | */ | |
210 | struct qed_mcp_link_params *qed_mcp_get_link_params(struct qed_hwfn *); | |
211 | ||
212 | /** | |
213 | * @brief - return the link state of the hw function | |
214 | * | |
215 | * @param p_hwfn | |
216 | * | |
217 | * @returns pointer to link state | |
218 | */ | |
219 | struct qed_mcp_link_state *qed_mcp_get_link_state(struct qed_hwfn *); | |
220 | ||
221 | /** | |
222 | * @brief - return the link capabilities of the hw function | |
223 | * | |
224 | * @param p_hwfn | |
225 | * | |
226 | * @returns pointer to link capabilities | |
227 | */ | |
228 | struct qed_mcp_link_capabilities | |
229 | *qed_mcp_get_link_capabilities(struct qed_hwfn *p_hwfn); | |
230 | ||
231 | /** | |
232 | * @brief Request the MFW to set the the link according to 'link_input'. | |
233 | * | |
234 | * @param p_hwfn | |
235 | * @param p_ptt | |
236 | * @param b_up - raise link if `true'. Reset link if `false'. | |
237 | * | |
238 | * @return int | |
239 | */ | |
240 | int qed_mcp_set_link(struct qed_hwfn *p_hwfn, | |
241 | struct qed_ptt *p_ptt, | |
242 | bool b_up); | |
243 | ||
fe56b9e6 YM |
244 | /** |
245 | * @brief Get the management firmware version value | |
246 | * | |
1408cc1f YM |
247 | * @param p_hwfn |
248 | * @param p_ptt | |
249 | * @param p_mfw_ver - mfw version value | |
250 | * @param p_running_bundle_id - image id in nvram; Optional. | |
fe56b9e6 | 251 | * |
1408cc1f | 252 | * @return int - 0 - operation was successful. |
fe56b9e6 | 253 | */ |
1408cc1f YM |
254 | int qed_mcp_get_mfw_ver(struct qed_hwfn *p_hwfn, |
255 | struct qed_ptt *p_ptt, | |
256 | u32 *p_mfw_ver, u32 *p_running_bundle_id); | |
fe56b9e6 | 257 | |
ae33666a TT |
258 | /** |
259 | * @brief Get the MBI version value | |
260 | * | |
261 | * @param p_hwfn | |
262 | * @param p_ptt | |
263 | * @param p_mbi_ver - A pointer to a variable to be filled with the MBI version. | |
264 | * | |
265 | * @return int - 0 - operation was successful. | |
266 | */ | |
267 | int qed_mcp_get_mbi_ver(struct qed_hwfn *p_hwfn, | |
268 | struct qed_ptt *p_ptt, u32 *p_mbi_ver); | |
269 | ||
cc875c2e YM |
270 | /** |
271 | * @brief Get media type value of the port. | |
272 | * | |
273 | * @param cdev - qed dev pointer | |
274 | * @param mfw_ver - media type value | |
275 | * | |
276 | * @return int - | |
277 | * 0 - Operation was successul. | |
278 | * -EBUSY - Operation failed | |
279 | */ | |
280 | int qed_mcp_get_media_type(struct qed_dev *cdev, | |
281 | u32 *media_type); | |
282 | ||
fe56b9e6 YM |
283 | /** |
284 | * @brief General function for sending commands to the MCP | |
285 | * mailbox. It acquire mutex lock for the entire | |
286 | * operation, from sending the request until the MCP | |
287 | * response. Waiting for MCP response will be checked up | |
288 | * to 5 seconds every 5ms. | |
289 | * | |
290 | * @param p_hwfn - hw function | |
291 | * @param p_ptt - PTT required for register access | |
292 | * @param cmd - command to be sent to the MCP. | |
293 | * @param param - Optional param | |
294 | * @param o_mcp_resp - The MCP response code (exclude sequence). | |
295 | * @param o_mcp_param- Optional parameter provided by the MCP | |
296 | * response | |
297 | * @return int - 0 - operation | |
298 | * was successul. | |
299 | */ | |
300 | int qed_mcp_cmd(struct qed_hwfn *p_hwfn, | |
301 | struct qed_ptt *p_ptt, | |
302 | u32 cmd, | |
303 | u32 param, | |
304 | u32 *o_mcp_resp, | |
305 | u32 *o_mcp_param); | |
306 | ||
307 | /** | |
308 | * @brief - drains the nig, allowing completion to pass in case of pauses. | |
309 | * (Should be called only from sleepable context) | |
310 | * | |
311 | * @param p_hwfn | |
312 | * @param p_ptt | |
313 | */ | |
314 | int qed_mcp_drain(struct qed_hwfn *p_hwfn, | |
315 | struct qed_ptt *p_ptt); | |
316 | ||
cee4d264 MC |
317 | /** |
318 | * @brief Get the flash size value | |
319 | * | |
320 | * @param p_hwfn | |
321 | * @param p_ptt | |
322 | * @param p_flash_size - flash size in bytes to be filled. | |
323 | * | |
324 | * @return int - 0 - operation was successul. | |
325 | */ | |
326 | int qed_mcp_get_flash_size(struct qed_hwfn *p_hwfn, | |
327 | struct qed_ptt *p_ptt, | |
328 | u32 *p_flash_size); | |
329 | ||
fe56b9e6 YM |
330 | /** |
331 | * @brief Send driver version to MFW | |
332 | * | |
333 | * @param p_hwfn | |
334 | * @param p_ptt | |
335 | * @param version - Version value | |
336 | * @param name - Protocol driver name | |
337 | * | |
338 | * @return int - 0 - operation was successul. | |
339 | */ | |
340 | int | |
341 | qed_mcp_send_drv_version(struct qed_hwfn *p_hwfn, | |
342 | struct qed_ptt *p_ptt, | |
343 | struct qed_mcp_drv_version *p_ver); | |
344 | ||
0fefbfba SK |
345 | /** |
346 | * @brief Notify MFW about the change in base device properties | |
347 | * | |
348 | * @param p_hwfn | |
349 | * @param p_ptt | |
350 | * @param client - qed client type | |
351 | * | |
352 | * @return int - 0 - operation was successful. | |
353 | */ | |
354 | int qed_mcp_ov_update_current_config(struct qed_hwfn *p_hwfn, | |
355 | struct qed_ptt *p_ptt, | |
356 | enum qed_ov_client client); | |
357 | ||
358 | /** | |
359 | * @brief Notify MFW about the driver state | |
360 | * | |
361 | * @param p_hwfn | |
362 | * @param p_ptt | |
363 | * @param drv_state - Driver state | |
364 | * | |
365 | * @return int - 0 - operation was successful. | |
366 | */ | |
367 | int qed_mcp_ov_update_driver_state(struct qed_hwfn *p_hwfn, | |
368 | struct qed_ptt *p_ptt, | |
369 | enum qed_ov_driver_state drv_state); | |
370 | ||
371 | /** | |
372 | * @brief Send MTU size to MFW | |
373 | * | |
374 | * @param p_hwfn | |
375 | * @param p_ptt | |
376 | * @param mtu - MTU size | |
377 | * | |
378 | * @return int - 0 - operation was successful. | |
379 | */ | |
380 | int qed_mcp_ov_update_mtu(struct qed_hwfn *p_hwfn, | |
381 | struct qed_ptt *p_ptt, u16 mtu); | |
382 | ||
383 | /** | |
384 | * @brief Send MAC address to MFW | |
385 | * | |
386 | * @param p_hwfn | |
387 | * @param p_ptt | |
388 | * @param mac - MAC address | |
389 | * | |
390 | * @return int - 0 - operation was successful. | |
391 | */ | |
392 | int qed_mcp_ov_update_mac(struct qed_hwfn *p_hwfn, | |
393 | struct qed_ptt *p_ptt, u8 *mac); | |
394 | ||
395 | /** | |
396 | * @brief Send WOL mode to MFW | |
397 | * | |
398 | * @param p_hwfn | |
399 | * @param p_ptt | |
400 | * @param wol - WOL mode | |
401 | * | |
402 | * @return int - 0 - operation was successful. | |
403 | */ | |
404 | int qed_mcp_ov_update_wol(struct qed_hwfn *p_hwfn, | |
405 | struct qed_ptt *p_ptt, | |
406 | enum qed_ov_wol wol); | |
407 | ||
91420b83 SK |
408 | /** |
409 | * @brief Set LED status | |
410 | * | |
411 | * @param p_hwfn | |
412 | * @param p_ptt | |
413 | * @param mode - LED mode | |
414 | * | |
415 | * @return int - 0 - operation was successful. | |
416 | */ | |
417 | int qed_mcp_set_led(struct qed_hwfn *p_hwfn, | |
418 | struct qed_ptt *p_ptt, | |
419 | enum qed_led_mode mode); | |
420 | ||
7a4b21b7 MY |
421 | /** |
422 | * @brief Read from nvm | |
423 | * | |
424 | * @param cdev | |
425 | * @param addr - nvm offset | |
426 | * @param p_buf - nvm read buffer | |
427 | * @param len - buffer len | |
428 | * | |
429 | * @return int - 0 - operation was successful. | |
430 | */ | |
431 | int qed_mcp_nvm_read(struct qed_dev *cdev, u32 addr, u8 *p_buf, u32 len); | |
432 | ||
03dc76ca SRK |
433 | /** |
434 | * @brief Bist register test | |
435 | * | |
436 | * @param p_hwfn - hw function | |
437 | * @param p_ptt - PTT required for register access | |
438 | * | |
439 | * @return int - 0 - operation was successful. | |
440 | */ | |
441 | int qed_mcp_bist_register_test(struct qed_hwfn *p_hwfn, | |
442 | struct qed_ptt *p_ptt); | |
443 | ||
444 | /** | |
445 | * @brief Bist clock test | |
446 | * | |
447 | * @param p_hwfn - hw function | |
448 | * @param p_ptt - PTT required for register access | |
449 | * | |
450 | * @return int - 0 - operation was successful. | |
451 | */ | |
452 | int qed_mcp_bist_clock_test(struct qed_hwfn *p_hwfn, | |
453 | struct qed_ptt *p_ptt); | |
454 | ||
7a4b21b7 MY |
455 | /** |
456 | * @brief Bist nvm test - get number of images | |
457 | * | |
458 | * @param p_hwfn - hw function | |
459 | * @param p_ptt - PTT required for register access | |
460 | * @param num_images - number of images if operation was | |
461 | * successful. 0 if not. | |
462 | * | |
463 | * @return int - 0 - operation was successful. | |
464 | */ | |
465 | int qed_mcp_bist_nvm_test_get_num_images(struct qed_hwfn *p_hwfn, | |
466 | struct qed_ptt *p_ptt, | |
467 | u32 *num_images); | |
468 | ||
469 | /** | |
470 | * @brief Bist nvm test - get image attributes by index | |
471 | * | |
472 | * @param p_hwfn - hw function | |
473 | * @param p_ptt - PTT required for register access | |
474 | * @param p_image_att - Attributes of image | |
475 | * @param image_index - Index of image to get information for | |
476 | * | |
477 | * @return int - 0 - operation was successful. | |
478 | */ | |
479 | int qed_mcp_bist_nvm_test_get_image_att(struct qed_hwfn *p_hwfn, | |
480 | struct qed_ptt *p_ptt, | |
481 | struct bist_nvm_image_att *p_image_att, | |
482 | u32 image_index); | |
483 | ||
fe56b9e6 YM |
484 | /* Using hwfn number (and not pf_num) is required since in CMT mode, |
485 | * same pf_num may be used by two different hwfn | |
486 | * TODO - this shouldn't really be in .h file, but until all fields | |
487 | * required during hw-init will be placed in their correct place in shmem | |
488 | * we need it in qed_dev.c [for readin the nvram reflection in shmem]. | |
489 | */ | |
490 | #define MCP_PF_ID_BY_REL(p_hwfn, rel_pfid) (QED_IS_BB((p_hwfn)->cdev) ? \ | |
491 | ((rel_pfid) | \ | |
492 | ((p_hwfn)->abs_pf_id & 1) << 3) : \ | |
493 | rel_pfid) | |
494 | #define MCP_PF_ID(p_hwfn) MCP_PF_ID_BY_REL(p_hwfn, (p_hwfn)->rel_pf_id) | |
495 | ||
9c79ddaa | 496 | #define MFW_PORT(_p_hwfn) ((_p_hwfn)->abs_pf_id % \ |
78cea9ff | 497 | ((_p_hwfn)->cdev->num_ports_in_engine * \ |
9c79ddaa MY |
498 | qed_device_num_engines((_p_hwfn)->cdev))) |
499 | ||
fe56b9e6 | 500 | struct qed_mcp_info { |
4ed1eea8 TT |
501 | /* List for mailbox commands which were sent and wait for a response */ |
502 | struct list_head cmd_list; | |
503 | ||
504 | /* Spinlock used for protecting the access to the mailbox commands list | |
505 | * and the sending of the commands. | |
506 | */ | |
507 | spinlock_t cmd_lock; | |
65ed2ffd MY |
508 | |
509 | /* Spinlock used for syncing SW link-changes and link-changes | |
510 | * originating from attention context. | |
511 | */ | |
512 | spinlock_t link_lock; | |
5529bad9 | 513 | bool block_mb_sending; |
fe56b9e6 YM |
514 | u32 public_base; |
515 | u32 drv_mb_addr; | |
516 | u32 mfw_mb_addr; | |
517 | u32 port_addr; | |
518 | u16 drv_mb_seq; | |
519 | u16 drv_pulse_seq; | |
cc875c2e YM |
520 | struct qed_mcp_link_params link_input; |
521 | struct qed_mcp_link_state link_output; | |
522 | struct qed_mcp_link_capabilities link_capabilities; | |
fe56b9e6 | 523 | struct qed_mcp_function_info func_info; |
fe56b9e6 YM |
524 | u8 *mfw_mb_cur; |
525 | u8 *mfw_mb_shadow; | |
526 | u16 mfw_mb_length; | |
4ed1eea8 | 527 | u32 mcp_hist; |
fe56b9e6 YM |
528 | }; |
529 | ||
5529bad9 TT |
530 | struct qed_mcp_mb_params { |
531 | u32 cmd; | |
532 | u32 param; | |
2f67af8c TT |
533 | void *p_data_src; |
534 | u8 data_src_size; | |
535 | void *p_data_dst; | |
536 | u8 data_dst_size; | |
5529bad9 TT |
537 | u32 mcp_resp; |
538 | u32 mcp_param; | |
539 | }; | |
540 | ||
fe56b9e6 YM |
541 | /** |
542 | * @brief Initialize the interface with the MCP | |
543 | * | |
544 | * @param p_hwfn - HW func | |
545 | * @param p_ptt - PTT required for register access | |
546 | * | |
547 | * @return int | |
548 | */ | |
549 | int qed_mcp_cmd_init(struct qed_hwfn *p_hwfn, | |
550 | struct qed_ptt *p_ptt); | |
551 | ||
552 | /** | |
553 | * @brief Initialize the port interface with the MCP | |
554 | * | |
555 | * @param p_hwfn | |
556 | * @param p_ptt | |
557 | * Can only be called after `num_ports_in_engines' is set | |
558 | */ | |
559 | void qed_mcp_cmd_port_init(struct qed_hwfn *p_hwfn, | |
560 | struct qed_ptt *p_ptt); | |
561 | /** | |
562 | * @brief Releases resources allocated during the init process. | |
563 | * | |
564 | * @param p_hwfn - HW func | |
565 | * @param p_ptt - PTT required for register access | |
566 | * | |
567 | * @return int | |
568 | */ | |
569 | ||
570 | int qed_mcp_free(struct qed_hwfn *p_hwfn); | |
571 | ||
cc875c2e YM |
572 | /** |
573 | * @brief This function is called from the DPC context. After | |
574 | * pointing PTT to the mfw mb, check for events sent by the MCP | |
575 | * to the driver and ack them. In case a critical event | |
576 | * detected, it will be handled here, otherwise the work will be | |
577 | * queued to a sleepable work-queue. | |
578 | * | |
579 | * @param p_hwfn - HW function | |
580 | * @param p_ptt - PTT required for register access | |
581 | * @return int - 0 - operation | |
582 | * was successul. | |
583 | */ | |
584 | int qed_mcp_handle_events(struct qed_hwfn *p_hwfn, | |
585 | struct qed_ptt *p_ptt); | |
586 | ||
5d24bcf1 TT |
587 | enum qed_drv_role { |
588 | QED_DRV_ROLE_OS, | |
589 | QED_DRV_ROLE_KDUMP, | |
590 | }; | |
591 | ||
592 | struct qed_load_req_params { | |
593 | /* Input params */ | |
594 | enum qed_drv_role drv_role; | |
595 | u8 timeout_val; | |
596 | bool avoid_eng_reset; | |
597 | enum qed_override_force_load override_force_load; | |
598 | ||
599 | /* Output params */ | |
600 | u32 load_code; | |
601 | }; | |
602 | ||
fe56b9e6 | 603 | /** |
5d24bcf1 TT |
604 | * @brief Sends a LOAD_REQ to the MFW, and in case the operation succeeds, |
605 | * returns whether this PF is the first on the engine/port or function. | |
606 | * | |
607 | * @param p_hwfn | |
608 | * @param p_ptt | |
609 | * @param p_params | |
610 | * | |
611 | * @return int - 0 - Operation was successful. | |
fe56b9e6 YM |
612 | */ |
613 | int qed_mcp_load_req(struct qed_hwfn *p_hwfn, | |
614 | struct qed_ptt *p_ptt, | |
5d24bcf1 | 615 | struct qed_load_req_params *p_params); |
fe56b9e6 | 616 | |
1226337a TT |
617 | /** |
618 | * @brief Sends a UNLOAD_REQ message to the MFW | |
619 | * | |
620 | * @param p_hwfn | |
621 | * @param p_ptt | |
622 | * | |
623 | * @return int - 0 - Operation was successful. | |
624 | */ | |
625 | int qed_mcp_unload_req(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); | |
626 | ||
627 | /** | |
628 | * @brief Sends a UNLOAD_DONE message to the MFW | |
629 | * | |
630 | * @param p_hwfn | |
631 | * @param p_ptt | |
632 | * | |
633 | * @return int - 0 - Operation was successful. | |
634 | */ | |
635 | int qed_mcp_unload_done(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); | |
636 | ||
fe56b9e6 YM |
637 | /** |
638 | * @brief Read the MFW mailbox into Current buffer. | |
639 | * | |
640 | * @param p_hwfn | |
641 | * @param p_ptt | |
642 | */ | |
643 | void qed_mcp_read_mb(struct qed_hwfn *p_hwfn, | |
644 | struct qed_ptt *p_ptt); | |
645 | ||
0b55e27d YM |
646 | /** |
647 | * @brief Ack to mfw that driver finished FLR process for VFs | |
648 | * | |
649 | * @param p_hwfn | |
650 | * @param p_ptt | |
651 | * @param vfs_to_ack - bit mask of all engine VFs for which the PF acks. | |
652 | * | |
653 | * @param return int - 0 upon success. | |
654 | */ | |
655 | int qed_mcp_ack_vf_flr(struct qed_hwfn *p_hwfn, | |
656 | struct qed_ptt *p_ptt, u32 *vfs_to_ack); | |
657 | ||
fe56b9e6 YM |
658 | /** |
659 | * @brief - calls during init to read shmem of all function-related info. | |
660 | * | |
661 | * @param p_hwfn | |
662 | * | |
663 | * @param return 0 upon success. | |
664 | */ | |
665 | int qed_mcp_fill_shmem_func_info(struct qed_hwfn *p_hwfn, | |
666 | struct qed_ptt *p_ptt); | |
667 | ||
668 | /** | |
669 | * @brief - Reset the MCP using mailbox command. | |
670 | * | |
671 | * @param p_hwfn | |
672 | * @param p_ptt | |
673 | * | |
674 | * @param return 0 upon success. | |
675 | */ | |
676 | int qed_mcp_reset(struct qed_hwfn *p_hwfn, | |
677 | struct qed_ptt *p_ptt); | |
678 | ||
4102426f TT |
679 | /** |
680 | * @brief - Sends an NVM read command request to the MFW to get | |
681 | * a buffer. | |
682 | * | |
683 | * @param p_hwfn | |
684 | * @param p_ptt | |
685 | * @param cmd - Command: DRV_MSG_CODE_NVM_GET_FILE_DATA or | |
686 | * DRV_MSG_CODE_NVM_READ_NVRAM commands | |
687 | * @param param - [0:23] - Offset [24:31] - Size | |
688 | * @param o_mcp_resp - MCP response | |
689 | * @param o_mcp_param - MCP response param | |
690 | * @param o_txn_size - Buffer size output | |
691 | * @param o_buf - Pointer to the buffer returned by the MFW. | |
692 | * | |
693 | * @param return 0 upon success. | |
694 | */ | |
695 | int qed_mcp_nvm_rd_cmd(struct qed_hwfn *p_hwfn, | |
696 | struct qed_ptt *p_ptt, | |
697 | u32 cmd, | |
698 | u32 param, | |
699 | u32 *o_mcp_resp, | |
700 | u32 *o_mcp_param, u32 *o_txn_size, u32 *o_buf); | |
701 | ||
fe56b9e6 YM |
702 | /** |
703 | * @brief indicates whether the MFW objects [under mcp_info] are accessible | |
704 | * | |
705 | * @param p_hwfn | |
706 | * | |
707 | * @return true iff MFW is running and mcp_info is initialized | |
708 | */ | |
709 | bool qed_mcp_is_init(struct qed_hwfn *p_hwfn); | |
1408cc1f YM |
710 | |
711 | /** | |
712 | * @brief request MFW to configure MSI-X for a VF | |
713 | * | |
714 | * @param p_hwfn | |
715 | * @param p_ptt | |
716 | * @param vf_id - absolute inside engine | |
717 | * @param num_sbs - number of entries to request | |
718 | * | |
719 | * @return int | |
720 | */ | |
721 | int qed_mcp_config_vf_msix(struct qed_hwfn *p_hwfn, | |
722 | struct qed_ptt *p_ptt, u8 vf_id, u8 num); | |
723 | ||
4102426f TT |
724 | /** |
725 | * @brief - Halt the MCP. | |
726 | * | |
727 | * @param p_hwfn | |
728 | * @param p_ptt | |
729 | * | |
730 | * @param return 0 upon success. | |
731 | */ | |
732 | int qed_mcp_halt(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); | |
733 | ||
734 | /** | |
735 | * @brief - Wake up the MCP. | |
736 | * | |
737 | * @param p_hwfn | |
738 | * @param p_ptt | |
739 | * | |
740 | * @param return 0 upon success. | |
741 | */ | |
742 | int qed_mcp_resume(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); | |
743 | ||
a64b02d5 | 744 | int qed_configure_pf_min_bandwidth(struct qed_dev *cdev, u8 min_bw); |
4b01e519 MC |
745 | int qed_configure_pf_max_bandwidth(struct qed_dev *cdev, u8 max_bw); |
746 | int __qed_configure_pf_max_bandwidth(struct qed_hwfn *p_hwfn, | |
747 | struct qed_ptt *p_ptt, | |
748 | struct qed_mcp_link_state *p_link, | |
749 | u8 max_bw); | |
a64b02d5 MC |
750 | int __qed_configure_pf_min_bandwidth(struct qed_hwfn *p_hwfn, |
751 | struct qed_ptt *p_ptt, | |
752 | struct qed_mcp_link_state *p_link, | |
753 | u8 min_bw); | |
351a4ded | 754 | |
4102426f TT |
755 | int qed_mcp_mask_parities(struct qed_hwfn *p_hwfn, |
756 | struct qed_ptt *p_ptt, u32 mask_parities); | |
757 | ||
0fefbfba | 758 | /** |
9c8517c4 | 759 | * @brief - Sets the MFW's max value for the given resource |
0fefbfba SK |
760 | * |
761 | * @param p_hwfn | |
762 | * @param p_ptt | |
9c8517c4 TT |
763 | * @param res_id |
764 | * @param resc_max_val | |
765 | * @param p_mcp_resp | |
0fefbfba SK |
766 | * |
767 | * @return int - 0 - operation was successful. | |
768 | */ | |
9c8517c4 TT |
769 | int |
770 | qed_mcp_set_resc_max_val(struct qed_hwfn *p_hwfn, | |
771 | struct qed_ptt *p_ptt, | |
772 | enum qed_resources res_id, | |
773 | u32 resc_max_val, u32 *p_mcp_resp); | |
0fefbfba | 774 | |
2edbff8d TT |
775 | /** |
776 | * @brief - Gets the MFW allocation info for the given resource | |
777 | * | |
778 | * @param p_hwfn | |
779 | * @param p_ptt | |
9c8517c4 | 780 | * @param res_id |
2edbff8d | 781 | * @param p_mcp_resp |
9c8517c4 TT |
782 | * @param p_resc_num |
783 | * @param p_resc_start | |
2edbff8d TT |
784 | * |
785 | * @return int - 0 - operation was successful. | |
786 | */ | |
9c8517c4 TT |
787 | int |
788 | qed_mcp_get_resc_info(struct qed_hwfn *p_hwfn, | |
789 | struct qed_ptt *p_ptt, | |
790 | enum qed_resources res_id, | |
791 | u32 *p_mcp_resp, u32 *p_resc_num, u32 *p_resc_start); | |
792 | ||
793 | /** | |
794 | * @brief Send eswitch mode to MFW | |
795 | * | |
796 | * @param p_hwfn | |
797 | * @param p_ptt | |
798 | * @param eswitch - eswitch mode | |
799 | * | |
800 | * @return int - 0 - operation was successful. | |
801 | */ | |
802 | int qed_mcp_ov_update_eswitch(struct qed_hwfn *p_hwfn, | |
803 | struct qed_ptt *p_ptt, | |
804 | enum qed_ov_eswitch eswitch); | |
805 | ||
806 | #define QED_MCP_RESC_LOCK_MIN_VAL RESOURCE_DUMP | |
807 | #define QED_MCP_RESC_LOCK_MAX_VAL 31 | |
808 | ||
809 | enum qed_resc_lock { | |
810 | QED_RESC_LOCK_DBG_DUMP = QED_MCP_RESC_LOCK_MIN_VAL, | |
db82f70e | 811 | QED_RESC_LOCK_PTP_PORT0, |
812 | QED_RESC_LOCK_PTP_PORT1, | |
813 | QED_RESC_LOCK_PTP_PORT2, | |
814 | QED_RESC_LOCK_PTP_PORT3, | |
f470f22c | 815 | QED_RESC_LOCK_RESC_ALLOC = QED_MCP_RESC_LOCK_MAX_VAL, |
816 | QED_RESC_LOCK_RESC_INVALID | |
9c8517c4 | 817 | }; |
18a69e36 MY |
818 | |
819 | /** | |
820 | * @brief - Initiates PF FLR | |
821 | * | |
822 | * @param p_hwfn | |
823 | * @param p_ptt | |
824 | * | |
825 | * @return int - 0 - operation was successful. | |
826 | */ | |
827 | int qed_mcp_initiate_pf_flr(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); | |
95691c9c TT |
828 | struct qed_resc_lock_params { |
829 | /* Resource number [valid values are 0..31] */ | |
830 | u8 resource; | |
831 | ||
832 | /* Lock timeout value in seconds [default, none or 1..254] */ | |
833 | u8 timeout; | |
834 | #define QED_MCP_RESC_LOCK_TO_DEFAULT 0 | |
835 | #define QED_MCP_RESC_LOCK_TO_NONE 255 | |
836 | ||
837 | /* Number of times to retry locking */ | |
838 | u8 retry_num; | |
f470f22c | 839 | #define QED_MCP_RESC_LOCK_RETRY_CNT_DFLT 10 |
95691c9c TT |
840 | |
841 | /* The interval in usec between retries */ | |
842 | u16 retry_interval; | |
f470f22c | 843 | #define QED_MCP_RESC_LOCK_RETRY_VAL_DFLT 10000 |
95691c9c TT |
844 | |
845 | /* Use sleep or delay between retries */ | |
846 | bool sleep_b4_retry; | |
847 | ||
848 | /* Will be set as true if the resource is free and granted */ | |
849 | bool b_granted; | |
850 | ||
851 | /* Will be filled with the resource owner. | |
852 | * [0..15 = PF0-15, 16 = MFW] | |
853 | */ | |
854 | u8 owner; | |
855 | }; | |
856 | ||
857 | /** | |
858 | * @brief Acquires MFW generic resource lock | |
859 | * | |
860 | * @param p_hwfn | |
861 | * @param p_ptt | |
862 | * @param p_params | |
863 | * | |
864 | * @return int - 0 - operation was successful. | |
865 | */ | |
866 | int | |
867 | qed_mcp_resc_lock(struct qed_hwfn *p_hwfn, | |
868 | struct qed_ptt *p_ptt, struct qed_resc_lock_params *p_params); | |
869 | ||
870 | struct qed_resc_unlock_params { | |
871 | /* Resource number [valid values are 0..31] */ | |
872 | u8 resource; | |
873 | ||
874 | /* Allow to release a resource even if belongs to another PF */ | |
875 | bool b_force; | |
876 | ||
877 | /* Will be set as true if the resource is released */ | |
878 | bool b_released; | |
879 | }; | |
880 | ||
881 | /** | |
882 | * @brief Releases MFW generic resource lock | |
883 | * | |
884 | * @param p_hwfn | |
885 | * @param p_ptt | |
886 | * @param p_params | |
887 | * | |
888 | * @return int - 0 - operation was successful. | |
889 | */ | |
890 | int | |
891 | qed_mcp_resc_unlock(struct qed_hwfn *p_hwfn, | |
892 | struct qed_ptt *p_ptt, | |
893 | struct qed_resc_unlock_params *p_params); | |
894 | ||
f470f22c | 895 | /** |
896 | * @brief - default initialization for lock/unlock resource structs | |
897 | * | |
898 | * @param p_lock - lock params struct to be initialized; Can be NULL | |
899 | * @param p_unlock - unlock params struct to be initialized; Can be NULL | |
900 | * @param resource - the requested resource | |
901 | * @paral b_is_permanent - disable retries & aging when set | |
902 | */ | |
903 | void qed_mcp_resc_lock_default_init(struct qed_resc_lock_params *p_lock, | |
904 | struct qed_resc_unlock_params *p_unlock, | |
905 | enum qed_resc_lock | |
906 | resource, bool b_is_permanent); | |
907 | ||
fe56b9e6 | 908 | #endif |