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1da177e4 LT |
1 | /* hamachi.c: A Packet Engines GNIC-II Gigabit Ethernet driver for Linux. */ |
2 | /* | |
3 | Written 1998-2000 by Donald Becker. | |
4 | Updates 2000 by Keith Underwood. | |
5 | ||
6aa20a22 | 6 | This software may be used and distributed according to the terms of |
1da177e4 LT |
7 | the GNU General Public License (GPL), incorporated herein by reference. |
8 | Drivers based on or derived from this code fall under the GPL and must | |
9 | retain the authorship, copyright and license notice. This file is not | |
10 | a complete program and may only be used when the entire operating | |
11 | system is licensed under the GPL. | |
12 | ||
13 | The author may be reached as becker@scyld.com, or C/O | |
14 | Scyld Computing Corporation | |
15 | 410 Severn Ave., Suite 210 | |
16 | Annapolis MD 21403 | |
17 | ||
18 | This driver is for the Packet Engines GNIC-II PCI Gigabit Ethernet | |
19 | adapter. | |
20 | ||
21 | Support and updates available at | |
22 | http://www.scyld.com/network/hamachi.html | |
03a8c661 | 23 | [link no longer provides useful info -jgarzik] |
1da177e4 LT |
24 | or |
25 | http://www.parl.clemson.edu/~keithu/hamachi.html | |
26 | ||
1da177e4 LT |
27 | */ |
28 | ||
29 | #define DRV_NAME "hamachi" | |
d5b20697 AG |
30 | #define DRV_VERSION "2.1" |
31 | #define DRV_RELDATE "Sept 11, 2006" | |
1da177e4 LT |
32 | |
33 | ||
34 | /* A few user-configurable values. */ | |
35 | ||
36 | static int debug = 1; /* 1 normal messages, 0 quiet .. 7 verbose. */ | |
37 | #define final_version | |
38 | #define hamachi_debug debug | |
39 | /* Maximum events (Rx packets, etc.) to handle at each interrupt. */ | |
40 | static int max_interrupt_work = 40; | |
41 | static int mtu; | |
42 | /* Default values selected by testing on a dual processor PIII-450 */ | |
43 | /* These six interrupt control parameters may be set directly when loading the | |
44 | * module, or through the rx_params and tx_params variables | |
45 | */ | |
46 | static int max_rx_latency = 0x11; | |
47 | static int max_rx_gap = 0x05; | |
48 | static int min_rx_pkt = 0x18; | |
6aa20a22 | 49 | static int max_tx_latency = 0x00; |
1da177e4 LT |
50 | static int max_tx_gap = 0x00; |
51 | static int min_tx_pkt = 0x30; | |
52 | ||
53 | /* Set the copy breakpoint for the copy-only-tiny-frames scheme. | |
54 | -Setting to > 1518 causes all frames to be copied | |
55 | -Setting to 0 disables copies | |
56 | */ | |
57 | static int rx_copybreak; | |
58 | ||
59 | /* An override for the hardware detection of bus width. | |
60 | Set to 1 to force 32 bit PCI bus detection. Set to 4 to force 64 bit. | |
61 | Add 2 to disable parity detection. | |
62 | */ | |
63 | static int force32; | |
64 | ||
65 | ||
66 | /* Used to pass the media type, etc. | |
67 | These exist for driver interoperability. | |
68 | No media types are currently defined. | |
69 | - The lower 4 bits are reserved for the media type. | |
70 | - The next three bits may be set to one of the following: | |
71 | 0x00000000 : Autodetect PCI bus | |
72 | 0x00000010 : Force 32 bit PCI bus | |
73 | 0x00000020 : Disable parity detection | |
74 | 0x00000040 : Force 64 bit PCI bus | |
75 | Default is autodetect | |
76 | - The next bit can be used to force half-duplex. This is a bad | |
77 | idea since no known implementations implement half-duplex, and, | |
78 | in general, half-duplex for gigabit ethernet is a bad idea. | |
6aa20a22 | 79 | 0x00000080 : Force half-duplex |
1da177e4 LT |
80 | Default is full-duplex. |
81 | - In the original driver, the ninth bit could be used to force | |
82 | full-duplex. Maintain that for compatibility | |
83 | 0x00000200 : Force full-duplex | |
84 | */ | |
85 | #define MAX_UNITS 8 /* More are supported, limit only on options */ | |
86 | static int options[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1}; | |
87 | static int full_duplex[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1}; | |
88 | /* The Hamachi chipset supports 3 parameters each for Rx and Tx | |
89 | * interruput management. Parameters will be loaded as specified into | |
6aa20a22 | 90 | * the TxIntControl and RxIntControl registers. |
1da177e4 LT |
91 | * |
92 | * The registers are arranged as follows: | |
93 | * 23 - 16 15 - 8 7 - 0 | |
94 | * _________________________________ | |
95 | * | min_pkt | max_gap | max_latency | | |
96 | * --------------------------------- | |
97 | * min_pkt : The minimum number of packets processed between | |
6aa20a22 | 98 | * interrupts. |
1da177e4 LT |
99 | * max_gap : The maximum inter-packet gap in units of 8.192 us |
100 | * max_latency : The absolute time between interrupts in units of 8.192 us | |
6aa20a22 | 101 | * |
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102 | */ |
103 | static int rx_params[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1}; | |
104 | static int tx_params[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1}; | |
105 | ||
106 | /* Operational parameters that are set at compile time. */ | |
107 | ||
108 | /* Keep the ring sizes a power of two for compile efficiency. | |
109 | The compiler will convert <unsigned>'%'<2^N> into a bit mask. | |
110 | Making the Tx ring too large decreases the effectiveness of channel | |
111 | bonding and packet priority. | |
112 | There are no ill effects from too-large receive rings, except for | |
113 | excessive memory usage */ | |
114 | /* Empirically it appears that the Tx ring needs to be a little bigger | |
115 | for these Gbit adapters or you get into an overrun condition really | |
116 | easily. Also, things appear to work a bit better in back-to-back | |
117 | configurations if the Rx ring is 8 times the size of the Tx ring | |
118 | */ | |
119 | #define TX_RING_SIZE 64 | |
120 | #define RX_RING_SIZE 512 | |
121 | #define TX_TOTAL_SIZE TX_RING_SIZE*sizeof(struct hamachi_desc) | |
122 | #define RX_TOTAL_SIZE RX_RING_SIZE*sizeof(struct hamachi_desc) | |
123 | ||
124 | /* | |
125 | * Enable netdev_ioctl. Added interrupt coalescing parameter adjustment. | |
126 | * 2/19/99 Pete Wyckoff <wyckoff@ca.sandia.gov> | |
127 | */ | |
128 | ||
129 | /* play with 64-bit addrlen; seems to be a teensy bit slower --pw */ | |
130 | /* #define ADDRLEN 64 */ | |
131 | ||
132 | /* | |
133 | * RX_CHECKSUM turns on card-generated receive checksum generation for | |
134 | * TCP and UDP packets. Otherwise the upper layers do the calculation. | |
1da177e4 LT |
135 | * 3/10/1999 Pete Wyckoff <wyckoff@ca.sandia.gov> |
136 | */ | |
0f020dec | 137 | #define RX_CHECKSUM |
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138 | |
139 | /* Operational parameters that usually are not changed. */ | |
140 | /* Time in jiffies before concluding the transmitter is hung. */ | |
141 | #define TX_TIMEOUT (5*HZ) | |
142 | ||
d43c36dc | 143 | #include <linux/capability.h> |
1da177e4 LT |
144 | #include <linux/module.h> |
145 | #include <linux/kernel.h> | |
146 | #include <linux/string.h> | |
147 | #include <linux/timer.h> | |
148 | #include <linux/time.h> | |
149 | #include <linux/errno.h> | |
150 | #include <linux/ioport.h> | |
1da177e4 LT |
151 | #include <linux/interrupt.h> |
152 | #include <linux/pci.h> | |
153 | #include <linux/init.h> | |
154 | #include <linux/ethtool.h> | |
155 | #include <linux/mii.h> | |
156 | #include <linux/netdevice.h> | |
157 | #include <linux/etherdevice.h> | |
158 | #include <linux/skbuff.h> | |
159 | #include <linux/ip.h> | |
160 | #include <linux/delay.h> | |
161 | #include <linux/bitops.h> | |
162 | ||
163 | #include <asm/uaccess.h> | |
164 | #include <asm/processor.h> /* Processor type for cache alignment. */ | |
165 | #include <asm/io.h> | |
166 | #include <asm/unaligned.h> | |
167 | #include <asm/cache.h> | |
168 | ||
134c1f15 | 169 | static const char version[] = |
1da177e4 | 170 | KERN_INFO DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE " Written by Donald Becker\n" |
ad361c98 JP |
171 | " Some modifications by Eric kasten <kasten@nscl.msu.edu>\n" |
172 | " Further modifications by Keith Underwood <keithu@parl.clemson.edu>\n"; | |
1da177e4 LT |
173 | |
174 | ||
175 | /* IP_MF appears to be only defined in <netinet/ip.h>, however, | |
176 | we need it for hardware checksumming support. FYI... some of | |
177 | the definitions in <netinet/ip.h> conflict/duplicate those in | |
178 | other linux headers causing many compiler warnings. | |
179 | */ | |
180 | #ifndef IP_MF | |
6aa20a22 | 181 | #define IP_MF 0x2000 /* IP more frags from <netinet/ip.h> */ |
1da177e4 LT |
182 | #endif |
183 | ||
184 | /* Define IP_OFFSET to be IPOPT_OFFSET */ | |
185 | #ifndef IP_OFFSET | |
186 | #ifdef IPOPT_OFFSET | |
187 | #define IP_OFFSET IPOPT_OFFSET | |
188 | #else | |
189 | #define IP_OFFSET 2 | |
190 | #endif | |
191 | #endif | |
192 | ||
193 | #define RUN_AT(x) (jiffies + (x)) | |
194 | ||
f20badbe Z |
195 | #ifndef ADDRLEN |
196 | #define ADDRLEN 32 | |
197 | #endif | |
198 | ||
1da177e4 LT |
199 | /* Condensed bus+endian portability operations. */ |
200 | #if ADDRLEN == 64 | |
201 | #define cpu_to_leXX(addr) cpu_to_le64(addr) | |
8e985918 | 202 | #define leXX_to_cpu(addr) le64_to_cpu(addr) |
6aa20a22 | 203 | #else |
1da177e4 | 204 | #define cpu_to_leXX(addr) cpu_to_le32(addr) |
8e985918 | 205 | #define leXX_to_cpu(addr) le32_to_cpu(addr) |
6aa20a22 | 206 | #endif |
1da177e4 LT |
207 | |
208 | ||
209 | /* | |
210 | Theory of Operation | |
211 | ||
212 | I. Board Compatibility | |
213 | ||
214 | This device driver is designed for the Packet Engines "Hamachi" | |
215 | Gigabit Ethernet chip. The only PCA currently supported is the GNIC-II 64-bit | |
216 | 66Mhz PCI card. | |
217 | ||
218 | II. Board-specific settings | |
219 | ||
220 | No jumpers exist on the board. The chip supports software correction of | |
221 | various motherboard wiring errors, however this driver does not support | |
222 | that feature. | |
223 | ||
224 | III. Driver operation | |
225 | ||
226 | IIIa. Ring buffers | |
227 | ||
228 | The Hamachi uses a typical descriptor based bus-master architecture. | |
229 | The descriptor list is similar to that used by the Digital Tulip. | |
230 | This driver uses two statically allocated fixed-size descriptor lists | |
231 | formed into rings by a branch from the final descriptor to the beginning of | |
232 | the list. The ring sizes are set at compile time by RX/TX_RING_SIZE. | |
233 | ||
234 | This driver uses a zero-copy receive and transmit scheme similar my other | |
235 | network drivers. | |
236 | The driver allocates full frame size skbuffs for the Rx ring buffers at | |
237 | open() time and passes the skb->data field to the Hamachi as receive data | |
238 | buffers. When an incoming frame is less than RX_COPYBREAK bytes long, | |
239 | a fresh skbuff is allocated and the frame is copied to the new skbuff. | |
240 | When the incoming frame is larger, the skbuff is passed directly up the | |
241 | protocol stack and replaced by a newly allocated skbuff. | |
242 | ||
243 | The RX_COPYBREAK value is chosen to trade-off the memory wasted by | |
244 | using a full-sized skbuff for small frames vs. the copying costs of larger | |
245 | frames. Gigabit cards are typically used on generously configured machines | |
246 | and the underfilled buffers have negligible impact compared to the benefit of | |
247 | a single allocation size, so the default value of zero results in never | |
248 | copying packets. | |
249 | ||
250 | IIIb/c. Transmit/Receive Structure | |
251 | ||
252 | The Rx and Tx descriptor structure are straight-forward, with no historical | |
253 | baggage that must be explained. Unlike the awkward DBDMA structure, there | |
254 | are no unused fields or option bits that had only one allowable setting. | |
255 | ||
256 | Two details should be noted about the descriptors: The chip supports both 32 | |
257 | bit and 64 bit address structures, and the length field is overwritten on | |
258 | the receive descriptors. The descriptor length is set in the control word | |
259 | for each channel. The development driver uses 32 bit addresses only, however | |
260 | 64 bit addresses may be enabled for 64 bit architectures e.g. the Alpha. | |
261 | ||
262 | IIId. Synchronization | |
263 | ||
264 | This driver is very similar to my other network drivers. | |
265 | The driver runs as two independent, single-threaded flows of control. One | |
266 | is the send-packet routine, which enforces single-threaded use by the | |
267 | dev->tbusy flag. The other thread is the interrupt handler, which is single | |
268 | threaded by the hardware and other software. | |
269 | ||
270 | The send packet thread has partial control over the Tx ring and 'dev->tbusy' | |
271 | flag. It sets the tbusy flag whenever it's queuing a Tx packet. If the next | |
272 | queue slot is empty, it clears the tbusy flag when finished otherwise it sets | |
273 | the 'hmp->tx_full' flag. | |
274 | ||
275 | The interrupt handler has exclusive control over the Rx ring and records stats | |
276 | from the Tx ring. After reaping the stats, it marks the Tx queue entry as | |
277 | empty by incrementing the dirty_tx mark. Iff the 'hmp->tx_full' flag is set, it | |
278 | clears both the tx_full and tbusy flags. | |
279 | ||
280 | IV. Notes | |
281 | ||
282 | Thanks to Kim Stearns of Packet Engines for providing a pair of GNIC-II boards. | |
283 | ||
284 | IVb. References | |
285 | ||
286 | Hamachi Engineering Design Specification, 5/15/97 | |
287 | (Note: This version was marked "Confidential".) | |
288 | ||
289 | IVc. Errata | |
290 | ||
6aa20a22 | 291 | None noted. |
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292 | |
293 | V. Recent Changes | |
294 | ||
6aa20a22 | 295 | 01/15/1999 EPK Enlargement of the TX and RX ring sizes. This appears |
1da177e4 LT |
296 | to help avoid some stall conditions -- this needs further research. |
297 | ||
6aa20a22 | 298 | 01/15/1999 EPK Creation of the hamachi_tx function. This function cleans |
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299 | the Tx ring and is called from hamachi_start_xmit (this used to be |
300 | called from hamachi_interrupt but it tends to delay execution of the | |
301 | interrupt handler and thus reduce bandwidth by reducing the latency | |
6aa20a22 JG |
302 | between hamachi_rx()'s). Notably, some modification has been made so |
303 | that the cleaning loop checks only to make sure that the DescOwn bit | |
304 | isn't set in the status flag since the card is not required | |
1da177e4 LT |
305 | to set the entire flag to zero after processing. |
306 | ||
6aa20a22 | 307 | 01/15/1999 EPK In the hamachi_start_tx function, the Tx ring full flag is |
1da177e4 LT |
308 | checked before attempting to add a buffer to the ring. If the ring is full |
309 | an attempt is made to free any dirty buffers and thus find space for | |
310 | the new buffer or the function returns non-zero which should case the | |
311 | scheduler to reschedule the buffer later. | |
312 | ||
6aa20a22 JG |
313 | 01/15/1999 EPK Some adjustments were made to the chip initialization. |
314 | End-to-end flow control should now be fully active and the interrupt | |
1da177e4 LT |
315 | algorithm vars have been changed. These could probably use further tuning. |
316 | ||
317 | 01/15/1999 EPK Added the max_{rx,tx}_latency options. These are used to | |
318 | set the rx and tx latencies for the Hamachi interrupts. If you're having | |
319 | problems with network stalls, try setting these to higher values. | |
320 | Valid values are 0x00 through 0xff. | |
321 | ||
6aa20a22 | 322 | 01/15/1999 EPK In general, the overall bandwidth has increased and |
1da177e4 LT |
323 | latencies are better (sometimes by a factor of 2). Stalls are rare at |
324 | this point, however there still appears to be a bug somewhere between the | |
325 | hardware and driver. TCP checksum errors under load also appear to be | |
326 | eliminated at this point. | |
327 | ||
328 | 01/18/1999 EPK Ensured that the DescEndRing bit was being set on both the | |
329 | Rx and Tx rings. This appears to have been affecting whether a particular | |
330 | peer-to-peer connection would hang under high load. I believe the Rx | |
331 | rings was typically getting set correctly, but the Tx ring wasn't getting | |
332 | the DescEndRing bit set during initialization. ??? Does this mean the | |
333 | hamachi card is using the DescEndRing in processing even if a particular | |
6aa20a22 | 334 | slot isn't in use -- hypothetically, the card might be searching the |
1da177e4 LT |
335 | entire Tx ring for slots with the DescOwn bit set and then processing |
336 | them. If the DescEndRing bit isn't set, then it might just wander off | |
337 | through memory until it hits a chunk of data with that bit set | |
338 | and then looping back. | |
339 | ||
6aa20a22 | 340 | 02/09/1999 EPK Added Michel Mueller's TxDMA Interrupt and Tx-timeout |
1da177e4 LT |
341 | problem (TxCmd and RxCmd need only to be set when idle or stopped. |
342 | ||
343 | 02/09/1999 EPK Added code to check/reset dev->tbusy in hamachi_interrupt. | |
6aa20a22 | 344 | (Michel Mueller pointed out the ``permanently busy'' potential |
1da177e4 LT |
345 | problem here). |
346 | ||
6aa20a22 | 347 | 02/22/1999 EPK Added Pete Wyckoff's ioctl to control the Tx/Rx latencies. |
1da177e4 LT |
348 | |
349 | 02/23/1999 EPK Verified that the interrupt status field bits for Tx were | |
350 | incorrectly defined and corrected (as per Michel Mueller). | |
351 | ||
352 | 02/23/1999 EPK Corrected the Tx full check to check that at least 4 slots | |
353 | were available before reseting the tbusy and tx_full flags | |
354 | (as per Michel Mueller). | |
355 | ||
356 | 03/11/1999 EPK Added Pete Wyckoff's hardware checksumming support. | |
357 | ||
358 | 12/31/1999 KDU Cleaned up assorted things and added Don's code to force | |
359 | 32 bit. | |
360 | ||
361 | 02/20/2000 KDU Some of the control was just plain odd. Cleaned up the | |
362 | hamachi_start_xmit() and hamachi_interrupt() code. There is still some | |
6aa20a22 | 363 | re-structuring I would like to do. |
1da177e4 LT |
364 | |
365 | 03/01/2000 KDU Experimenting with a WIDE range of interrupt mitigation | |
366 | parameters on a dual P3-450 setup yielded the new default interrupt | |
367 | mitigation parameters. Tx should interrupt VERY infrequently due to | |
368 | Eric's scheme. Rx should be more often... | |
369 | ||
370 | 03/13/2000 KDU Added a patch to make the Rx Checksum code interact | |
6aa20a22 | 371 | nicely with non-linux machines. |
1da177e4 | 372 | |
6aa20a22 | 373 | 03/13/2000 KDU Experimented with some of the configuration values: |
1da177e4 LT |
374 | |
375 | -It seems that enabling PCI performance commands for descriptors | |
6aa20a22 JG |
376 | (changing RxDMACtrl and TxDMACtrl lower nibble from 5 to D) has minimal |
377 | performance impact for any of my tests. (ttcp, netpipe, netperf) I will | |
1da177e4 LT |
378 | leave them that way until I hear further feedback. |
379 | ||
6aa20a22 | 380 | -Increasing the PCI_LATENCY_TIMER to 130 |
1da177e4 LT |
381 | (2 + (burst size of 128 * (0 wait states + 1))) seems to slightly |
382 | degrade performance. Leaving default at 64 pending further information. | |
383 | ||
6aa20a22 | 384 | 03/14/2000 KDU Further tuning: |
1da177e4 LT |
385 | |
386 | -adjusted boguscnt in hamachi_rx() to depend on interrupt | |
387 | mitigation parameters chosen. | |
388 | ||
6aa20a22 | 389 | -Selected a set of interrupt parameters based on some extensive testing. |
1da177e4 LT |
390 | These may change with more testing. |
391 | ||
392 | TO DO: | |
393 | ||
394 | -Consider borrowing from the acenic driver code to check PCI_COMMAND for | |
395 | PCI_COMMAND_INVALIDATE. Set maximum burst size to cache line size in | |
396 | that case. | |
397 | ||
6aa20a22 | 398 | -fix the reset procedure. It doesn't quite work. |
1da177e4 LT |
399 | */ |
400 | ||
401 | /* A few values that may be tweaked. */ | |
402 | /* Size of each temporary Rx buffer, calculated as: | |
403 | * 1518 bytes (ethernet packet) + 2 bytes (to get 8 byte alignment for | |
89d71a66 | 404 | * the card) + 8 bytes of status info + 8 bytes for the Rx Checksum |
1da177e4 | 405 | */ |
89d71a66 | 406 | #define PKT_BUF_SZ 1536 |
1da177e4 LT |
407 | |
408 | /* For now, this is going to be set to the maximum size of an ethernet | |
409 | * packet. Eventually, we may want to make it a variable that is | |
410 | * related to the MTU | |
411 | */ | |
412 | #define MAX_FRAME_SIZE 1518 | |
413 | ||
414 | /* The rest of these values should never change. */ | |
415 | ||
416 | static void hamachi_timer(unsigned long data); | |
417 | ||
418 | enum capability_flags {CanHaveMII=1, }; | |
f71e1309 | 419 | static const struct chip_info { |
1da177e4 LT |
420 | u16 vendor_id, device_id, device_id_mask, pad; |
421 | const char *name; | |
422 | void (*media_timer)(unsigned long data); | |
423 | int flags; | |
424 | } chip_tbl[] = { | |
425 | {0x1318, 0x0911, 0xffff, 0, "Hamachi GNIC-II", hamachi_timer, 0}, | |
426 | {0,}, | |
427 | }; | |
428 | ||
429 | /* Offsets to the Hamachi registers. Various sizes. */ | |
430 | enum hamachi_offsets { | |
431 | TxDMACtrl=0x00, TxCmd=0x04, TxStatus=0x06, TxPtr=0x08, TxCurPtr=0x10, | |
432 | RxDMACtrl=0x20, RxCmd=0x24, RxStatus=0x26, RxPtr=0x28, RxCurPtr=0x30, | |
433 | PCIClkMeas=0x060, MiscStatus=0x066, ChipRev=0x68, ChipReset=0x06B, | |
434 | LEDCtrl=0x06C, VirtualJumpers=0x06D, GPIO=0x6E, | |
435 | TxChecksum=0x074, RxChecksum=0x076, | |
436 | TxIntrCtrl=0x078, RxIntrCtrl=0x07C, | |
437 | InterruptEnable=0x080, InterruptClear=0x084, IntrStatus=0x088, | |
438 | EventStatus=0x08C, | |
439 | MACCnfg=0x0A0, FrameGap0=0x0A2, FrameGap1=0x0A4, | |
440 | /* See enum MII_offsets below. */ | |
441 | MACCnfg2=0x0B0, RxDepth=0x0B8, FlowCtrl=0x0BC, MaxFrameSize=0x0CE, | |
442 | AddrMode=0x0D0, StationAddr=0x0D2, | |
443 | /* Gigabit AutoNegotiation. */ | |
444 | ANCtrl=0x0E0, ANStatus=0x0E2, ANXchngCtrl=0x0E4, ANAdvertise=0x0E8, | |
445 | ANLinkPartnerAbility=0x0EA, | |
446 | EECmdStatus=0x0F0, EEData=0x0F1, EEAddr=0x0F2, | |
447 | FIFOcfg=0x0F8, | |
448 | }; | |
449 | ||
450 | /* Offsets to the MII-mode registers. */ | |
451 | enum MII_offsets { | |
452 | MII_Cmd=0xA6, MII_Addr=0xA8, MII_Wr_Data=0xAA, MII_Rd_Data=0xAC, | |
453 | MII_Status=0xAE, | |
454 | }; | |
455 | ||
456 | /* Bits in the interrupt status/mask registers. */ | |
457 | enum intr_status_bits { | |
458 | IntrRxDone=0x01, IntrRxPCIFault=0x02, IntrRxPCIErr=0x04, | |
459 | IntrTxDone=0x100, IntrTxPCIFault=0x200, IntrTxPCIErr=0x400, | |
460 | LinkChange=0x10000, NegotiationChange=0x20000, StatsMax=0x40000, }; | |
461 | ||
462 | /* The Hamachi Rx and Tx buffer descriptors. */ | |
463 | struct hamachi_desc { | |
8e985918 | 464 | __le32 status_n_length; |
1da177e4 LT |
465 | #if ADDRLEN == 64 |
466 | u32 pad; | |
8e985918 | 467 | __le64 addr; |
1da177e4 | 468 | #else |
8e985918 | 469 | __le32 addr; |
1da177e4 LT |
470 | #endif |
471 | }; | |
472 | ||
473 | /* Bits in hamachi_desc.status_n_length */ | |
474 | enum desc_status_bits { | |
6aa20a22 | 475 | DescOwn=0x80000000, DescEndPacket=0x40000000, DescEndRing=0x20000000, |
1da177e4 LT |
476 | DescIntr=0x10000000, |
477 | }; | |
478 | ||
479 | #define PRIV_ALIGN 15 /* Required alignment mask */ | |
480 | #define MII_CNT 4 | |
481 | struct hamachi_private { | |
482 | /* Descriptor rings first for alignment. Tx requires a second descriptor | |
483 | for status. */ | |
484 | struct hamachi_desc *rx_ring; | |
485 | struct hamachi_desc *tx_ring; | |
486 | struct sk_buff* rx_skbuff[RX_RING_SIZE]; | |
487 | struct sk_buff* tx_skbuff[TX_RING_SIZE]; | |
488 | dma_addr_t tx_ring_dma; | |
489 | dma_addr_t rx_ring_dma; | |
1da177e4 LT |
490 | struct timer_list timer; /* Media selection timer. */ |
491 | /* Frequently used and paired value: keep adjacent for cache effect. */ | |
492 | spinlock_t lock; | |
493 | int chip_id; | |
494 | unsigned int cur_rx, dirty_rx; /* Producer/consumer ring indices */ | |
495 | unsigned int cur_tx, dirty_tx; | |
496 | unsigned int rx_buf_sz; /* Based on MTU+slack. */ | |
497 | unsigned int tx_full:1; /* The Tx queue is full. */ | |
498 | unsigned int duplex_lock:1; | |
499 | unsigned int default_port:4; /* Last dev->if_port value. */ | |
500 | /* MII transceiver section. */ | |
501 | int mii_cnt; /* MII device addresses. */ | |
502 | struct mii_if_info mii_if; /* MII lib hooks/info */ | |
503 | unsigned char phys[MII_CNT]; /* MII device addresses, only first one used. */ | |
504 | u32 rx_int_var, tx_int_var; /* interrupt control variables */ | |
505 | u32 option; /* Hold on to a copy of the options */ | |
506 | struct pci_dev *pci_dev; | |
507 | void __iomem *base; | |
508 | }; | |
509 | ||
510 | MODULE_AUTHOR("Donald Becker <becker@scyld.com>, Eric Kasten <kasten@nscl.msu.edu>, Keith Underwood <keithu@parl.clemson.edu>"); | |
511 | MODULE_DESCRIPTION("Packet Engines 'Hamachi' GNIC-II Gigabit Ethernet driver"); | |
512 | MODULE_LICENSE("GPL"); | |
513 | ||
514 | module_param(max_interrupt_work, int, 0); | |
515 | module_param(mtu, int, 0); | |
516 | module_param(debug, int, 0); | |
517 | module_param(min_rx_pkt, int, 0); | |
518 | module_param(max_rx_gap, int, 0); | |
519 | module_param(max_rx_latency, int, 0); | |
520 | module_param(min_tx_pkt, int, 0); | |
521 | module_param(max_tx_gap, int, 0); | |
522 | module_param(max_tx_latency, int, 0); | |
523 | module_param(rx_copybreak, int, 0); | |
524 | module_param_array(rx_params, int, NULL, 0); | |
525 | module_param_array(tx_params, int, NULL, 0); | |
526 | module_param_array(options, int, NULL, 0); | |
527 | module_param_array(full_duplex, int, NULL, 0); | |
528 | module_param(force32, int, 0); | |
529 | MODULE_PARM_DESC(max_interrupt_work, "GNIC-II maximum events handled per interrupt"); | |
530 | MODULE_PARM_DESC(mtu, "GNIC-II MTU (all boards)"); | |
531 | MODULE_PARM_DESC(debug, "GNIC-II debug level (0-7)"); | |
532 | MODULE_PARM_DESC(min_rx_pkt, "GNIC-II minimum Rx packets processed between interrupts"); | |
533 | MODULE_PARM_DESC(max_rx_gap, "GNIC-II maximum Rx inter-packet gap in 8.192 microsecond units"); | |
534 | MODULE_PARM_DESC(max_rx_latency, "GNIC-II time between Rx interrupts in 8.192 microsecond units"); | |
535 | MODULE_PARM_DESC(min_tx_pkt, "GNIC-II minimum Tx packets processed between interrupts"); | |
536 | MODULE_PARM_DESC(max_tx_gap, "GNIC-II maximum Tx inter-packet gap in 8.192 microsecond units"); | |
537 | MODULE_PARM_DESC(max_tx_latency, "GNIC-II time between Tx interrupts in 8.192 microsecond units"); | |
538 | MODULE_PARM_DESC(rx_copybreak, "GNIC-II copy breakpoint for copy-only-tiny-frames"); | |
539 | MODULE_PARM_DESC(rx_params, "GNIC-II min_rx_pkt+max_rx_gap+max_rx_latency"); | |
540 | MODULE_PARM_DESC(tx_params, "GNIC-II min_tx_pkt+max_tx_gap+max_tx_latency"); | |
541 | MODULE_PARM_DESC(options, "GNIC-II Bits 0-3: media type, bits 4-6: as force32, bit 7: half duplex, bit 9 full duplex"); | |
542 | MODULE_PARM_DESC(full_duplex, "GNIC-II full duplex setting(s) (1)"); | |
543 | MODULE_PARM_DESC(force32, "GNIC-II: Bit 0: 32 bit PCI, bit 1: disable parity, bit 2: 64 bit PCI (all boards)"); | |
6aa20a22 | 544 | |
1da177e4 LT |
545 | static int read_eeprom(void __iomem *ioaddr, int location); |
546 | static int mdio_read(struct net_device *dev, int phy_id, int location); | |
547 | static void mdio_write(struct net_device *dev, int phy_id, int location, int value); | |
548 | static int hamachi_open(struct net_device *dev); | |
549 | static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd); | |
550 | static void hamachi_timer(unsigned long data); | |
551 | static void hamachi_tx_timeout(struct net_device *dev); | |
552 | static void hamachi_init_ring(struct net_device *dev); | |
61357325 SH |
553 | static netdev_tx_t hamachi_start_xmit(struct sk_buff *skb, |
554 | struct net_device *dev); | |
7d12e780 | 555 | static irqreturn_t hamachi_interrupt(int irq, void *dev_instance); |
1da177e4 LT |
556 | static int hamachi_rx(struct net_device *dev); |
557 | static inline int hamachi_tx(struct net_device *dev); | |
558 | static void hamachi_error(struct net_device *dev, int intr_status); | |
559 | static int hamachi_close(struct net_device *dev); | |
560 | static struct net_device_stats *hamachi_get_stats(struct net_device *dev); | |
561 | static void set_rx_mode(struct net_device *dev); | |
7282d491 JG |
562 | static const struct ethtool_ops ethtool_ops; |
563 | static const struct ethtool_ops ethtool_ops_no_mii; | |
1da177e4 | 564 | |
a8652d23 SH |
565 | static const struct net_device_ops hamachi_netdev_ops = { |
566 | .ndo_open = hamachi_open, | |
567 | .ndo_stop = hamachi_close, | |
568 | .ndo_start_xmit = hamachi_start_xmit, | |
569 | .ndo_get_stats = hamachi_get_stats, | |
afc4b13d | 570 | .ndo_set_rx_mode = set_rx_mode, |
a8652d23 SH |
571 | .ndo_change_mtu = eth_change_mtu, |
572 | .ndo_validate_addr = eth_validate_addr, | |
fe96aaa1 | 573 | .ndo_set_mac_address = eth_mac_addr, |
a8652d23 SH |
574 | .ndo_tx_timeout = hamachi_tx_timeout, |
575 | .ndo_do_ioctl = netdev_ioctl, | |
576 | }; | |
577 | ||
578 | ||
134c1f15 BP |
579 | static int hamachi_init_one(struct pci_dev *pdev, |
580 | const struct pci_device_id *ent) | |
1da177e4 LT |
581 | { |
582 | struct hamachi_private *hmp; | |
583 | int option, i, rx_int_var, tx_int_var, boguscnt; | |
584 | int chip_id = ent->driver_data; | |
585 | int irq; | |
586 | void __iomem *ioaddr; | |
587 | unsigned long base; | |
588 | static int card_idx; | |
589 | struct net_device *dev; | |
590 | void *ring_space; | |
591 | dma_addr_t ring_dma; | |
592 | int ret = -ENOMEM; | |
593 | ||
594 | /* when built into the kernel, we only print version if device is found */ | |
595 | #ifndef MODULE | |
596 | static int printed_version; | |
597 | if (!printed_version++) | |
598 | printk(version); | |
599 | #endif | |
600 | ||
601 | if (pci_enable_device(pdev)) { | |
602 | ret = -EIO; | |
603 | goto err_out; | |
604 | } | |
605 | ||
606 | base = pci_resource_start(pdev, 0); | |
607 | #ifdef __alpha__ /* Really "64 bit addrs" */ | |
608 | base |= (pci_resource_start(pdev, 1) << 32); | |
609 | #endif | |
610 | ||
611 | pci_set_master(pdev); | |
612 | ||
613 | i = pci_request_regions(pdev, DRV_NAME); | |
2e8a538d JG |
614 | if (i) |
615 | return i; | |
1da177e4 LT |
616 | |
617 | irq = pdev->irq; | |
618 | ioaddr = ioremap(base, 0x400); | |
619 | if (!ioaddr) | |
620 | goto err_out_release; | |
621 | ||
622 | dev = alloc_etherdev(sizeof(struct hamachi_private)); | |
623 | if (!dev) | |
624 | goto err_out_iounmap; | |
625 | ||
1da177e4 LT |
626 | SET_NETDEV_DEV(dev, &pdev->dev); |
627 | ||
1da177e4 LT |
628 | for (i = 0; i < 6; i++) |
629 | dev->dev_addr[i] = 1 ? read_eeprom(ioaddr, 4 + i) | |
630 | : readb(ioaddr + StationAddr + i); | |
631 | ||
632 | #if ! defined(final_version) | |
633 | if (hamachi_debug > 4) | |
634 | for (i = 0; i < 0x10; i++) | |
635 | printk("%2.2x%s", | |
636 | read_eeprom(ioaddr, i), i % 16 != 15 ? " " : "\n"); | |
637 | #endif | |
638 | ||
639 | hmp = netdev_priv(dev); | |
640 | spin_lock_init(&hmp->lock); | |
641 | ||
642 | hmp->mii_if.dev = dev; | |
643 | hmp->mii_if.mdio_read = mdio_read; | |
644 | hmp->mii_if.mdio_write = mdio_write; | |
645 | hmp->mii_if.phy_id_mask = 0x1f; | |
646 | hmp->mii_if.reg_num_mask = 0x1f; | |
647 | ||
648 | ring_space = pci_alloc_consistent(pdev, TX_TOTAL_SIZE, &ring_dma); | |
649 | if (!ring_space) | |
650 | goto err_out_cleardev; | |
43d620c8 | 651 | hmp->tx_ring = ring_space; |
1da177e4 LT |
652 | hmp->tx_ring_dma = ring_dma; |
653 | ||
654 | ring_space = pci_alloc_consistent(pdev, RX_TOTAL_SIZE, &ring_dma); | |
655 | if (!ring_space) | |
656 | goto err_out_unmap_tx; | |
43d620c8 | 657 | hmp->rx_ring = ring_space; |
1da177e4 LT |
658 | hmp->rx_ring_dma = ring_dma; |
659 | ||
660 | /* Check for options being passed in */ | |
661 | option = card_idx < MAX_UNITS ? options[card_idx] : 0; | |
662 | if (dev->mem_start) | |
663 | option = dev->mem_start; | |
664 | ||
665 | /* If the bus size is misidentified, do the following. */ | |
6aa20a22 | 666 | force32 = force32 ? force32 : |
1da177e4 LT |
667 | ((option >= 0) ? ((option & 0x00000070) >> 4) : 0 ); |
668 | if (force32) | |
669 | writeb(force32, ioaddr + VirtualJumpers); | |
670 | ||
671 | /* Hmmm, do we really need to reset the chip???. */ | |
672 | writeb(0x01, ioaddr + ChipReset); | |
673 | ||
674 | /* After a reset, the clock speed measurement of the PCI bus will not | |
675 | * be valid for a moment. Wait for a little while until it is. If | |
676 | * it takes more than 10ms, forget it. | |
677 | */ | |
6aa20a22 | 678 | udelay(10); |
1da177e4 LT |
679 | i = readb(ioaddr + PCIClkMeas); |
680 | for (boguscnt = 0; (!(i & 0x080)) && boguscnt < 1000; boguscnt++){ | |
6aa20a22 JG |
681 | udelay(10); |
682 | i = readb(ioaddr + PCIClkMeas); | |
1da177e4 LT |
683 | } |
684 | ||
685 | hmp->base = ioaddr; | |
1da177e4 LT |
686 | pci_set_drvdata(pdev, dev); |
687 | ||
688 | hmp->chip_id = chip_id; | |
689 | hmp->pci_dev = pdev; | |
690 | ||
691 | /* The lower four bits are the media type. */ | |
692 | if (option > 0) { | |
693 | hmp->option = option; | |
694 | if (option & 0x200) | |
695 | hmp->mii_if.full_duplex = 1; | |
696 | else if (option & 0x080) | |
697 | hmp->mii_if.full_duplex = 0; | |
698 | hmp->default_port = option & 15; | |
699 | if (hmp->default_port) | |
700 | hmp->mii_if.force_media = 1; | |
701 | } | |
702 | if (card_idx < MAX_UNITS && full_duplex[card_idx] > 0) | |
703 | hmp->mii_if.full_duplex = 1; | |
704 | ||
705 | /* lock the duplex mode if someone specified a value */ | |
706 | if (hmp->mii_if.full_duplex || (option & 0x080)) | |
707 | hmp->duplex_lock = 1; | |
708 | ||
709 | /* Set interrupt tuning parameters */ | |
710 | max_rx_latency = max_rx_latency & 0x00ff; | |
711 | max_rx_gap = max_rx_gap & 0x00ff; | |
712 | min_rx_pkt = min_rx_pkt & 0x00ff; | |
713 | max_tx_latency = max_tx_latency & 0x00ff; | |
714 | max_tx_gap = max_tx_gap & 0x00ff; | |
715 | min_tx_pkt = min_tx_pkt & 0x00ff; | |
716 | ||
717 | rx_int_var = card_idx < MAX_UNITS ? rx_params[card_idx] : -1; | |
718 | tx_int_var = card_idx < MAX_UNITS ? tx_params[card_idx] : -1; | |
6aa20a22 | 719 | hmp->rx_int_var = rx_int_var >= 0 ? rx_int_var : |
1da177e4 | 720 | (min_rx_pkt << 16 | max_rx_gap << 8 | max_rx_latency); |
6aa20a22 | 721 | hmp->tx_int_var = tx_int_var >= 0 ? tx_int_var : |
1da177e4 LT |
722 | (min_tx_pkt << 16 | max_tx_gap << 8 | max_tx_latency); |
723 | ||
724 | ||
725 | /* The Hamachi-specific entries in the device structure. */ | |
a8652d23 | 726 | dev->netdev_ops = &hamachi_netdev_ops; |
1da177e4 LT |
727 | if (chip_tbl[hmp->chip_id].flags & CanHaveMII) |
728 | SET_ETHTOOL_OPS(dev, ðtool_ops); | |
729 | else | |
730 | SET_ETHTOOL_OPS(dev, ðtool_ops_no_mii); | |
1da177e4 LT |
731 | dev->watchdog_timeo = TX_TIMEOUT; |
732 | if (mtu) | |
733 | dev->mtu = mtu; | |
734 | ||
735 | i = register_netdev(dev); | |
736 | if (i) { | |
737 | ret = i; | |
738 | goto err_out_unmap_rx; | |
739 | } | |
740 | ||
e174961c | 741 | printk(KERN_INFO "%s: %s type %x at %p, %pM, IRQ %d.\n", |
1da177e4 | 742 | dev->name, chip_tbl[chip_id].name, readl(ioaddr + ChipRev), |
e174961c | 743 | ioaddr, dev->dev_addr, irq); |
1da177e4 LT |
744 | i = readb(ioaddr + PCIClkMeas); |
745 | printk(KERN_INFO "%s: %d-bit %d Mhz PCI bus (%d), Virtual Jumpers " | |
746 | "%2.2x, LPA %4.4x.\n", | |
747 | dev->name, readw(ioaddr + MiscStatus) & 1 ? 64 : 32, | |
748 | i ? 2000/(i&0x7f) : 0, i&0x7f, (int)readb(ioaddr + VirtualJumpers), | |
749 | readw(ioaddr + ANLinkPartnerAbility)); | |
750 | ||
751 | if (chip_tbl[hmp->chip_id].flags & CanHaveMII) { | |
752 | int phy, phy_idx = 0; | |
753 | for (phy = 0; phy < 32 && phy_idx < MII_CNT; phy++) { | |
754 | int mii_status = mdio_read(dev, phy, MII_BMSR); | |
755 | if (mii_status != 0xffff && | |
756 | mii_status != 0x0000) { | |
757 | hmp->phys[phy_idx++] = phy; | |
758 | hmp->mii_if.advertising = mdio_read(dev, phy, MII_ADVERTISE); | |
759 | printk(KERN_INFO "%s: MII PHY found at address %d, status " | |
760 | "0x%4.4x advertising %4.4x.\n", | |
761 | dev->name, phy, mii_status, hmp->mii_if.advertising); | |
762 | } | |
763 | } | |
764 | hmp->mii_cnt = phy_idx; | |
765 | if (hmp->mii_cnt > 0) | |
766 | hmp->mii_if.phy_id = hmp->phys[0]; | |
767 | else | |
768 | memset(&hmp->mii_if, 0, sizeof(hmp->mii_if)); | |
769 | } | |
770 | /* Configure gigabit autonegotiation. */ | |
771 | writew(0x0400, ioaddr + ANXchngCtrl); /* Enable legacy links. */ | |
772 | writew(0x08e0, ioaddr + ANAdvertise); /* Set our advertise word. */ | |
773 | writew(0x1000, ioaddr + ANCtrl); /* Enable negotiation */ | |
774 | ||
775 | card_idx++; | |
776 | return 0; | |
777 | ||
778 | err_out_unmap_rx: | |
6aa20a22 | 779 | pci_free_consistent(pdev, RX_TOTAL_SIZE, hmp->rx_ring, |
1da177e4 LT |
780 | hmp->rx_ring_dma); |
781 | err_out_unmap_tx: | |
6aa20a22 | 782 | pci_free_consistent(pdev, TX_TOTAL_SIZE, hmp->tx_ring, |
1da177e4 LT |
783 | hmp->tx_ring_dma); |
784 | err_out_cleardev: | |
785 | free_netdev (dev); | |
786 | err_out_iounmap: | |
787 | iounmap(ioaddr); | |
788 | err_out_release: | |
789 | pci_release_regions(pdev); | |
790 | err_out: | |
791 | return ret; | |
792 | } | |
793 | ||
134c1f15 | 794 | static int read_eeprom(void __iomem *ioaddr, int location) |
1da177e4 LT |
795 | { |
796 | int bogus_cnt = 1000; | |
797 | ||
798 | /* We should check busy first - per docs -KDU */ | |
799 | while ((readb(ioaddr + EECmdStatus) & 0x40) && --bogus_cnt > 0); | |
800 | writew(location, ioaddr + EEAddr); | |
801 | writeb(0x02, ioaddr + EECmdStatus); | |
802 | bogus_cnt = 1000; | |
803 | while ((readb(ioaddr + EECmdStatus) & 0x40) && --bogus_cnt > 0); | |
804 | if (hamachi_debug > 5) | |
805 | printk(" EEPROM status is %2.2x after %d ticks.\n", | |
806 | (int)readb(ioaddr + EECmdStatus), 1000- bogus_cnt); | |
807 | return readb(ioaddr + EEData); | |
808 | } | |
809 | ||
810 | /* MII Managemen Data I/O accesses. | |
811 | These routines assume the MDIO controller is idle, and do not exit until | |
812 | the command is finished. */ | |
813 | ||
814 | static int mdio_read(struct net_device *dev, int phy_id, int location) | |
815 | { | |
816 | struct hamachi_private *hmp = netdev_priv(dev); | |
817 | void __iomem *ioaddr = hmp->base; | |
818 | int i; | |
819 | ||
820 | /* We should check busy first - per docs -KDU */ | |
821 | for (i = 10000; i >= 0; i--) | |
822 | if ((readw(ioaddr + MII_Status) & 1) == 0) | |
823 | break; | |
824 | writew((phy_id<<8) + location, ioaddr + MII_Addr); | |
825 | writew(0x0001, ioaddr + MII_Cmd); | |
826 | for (i = 10000; i >= 0; i--) | |
827 | if ((readw(ioaddr + MII_Status) & 1) == 0) | |
828 | break; | |
829 | return readw(ioaddr + MII_Rd_Data); | |
830 | } | |
831 | ||
832 | static void mdio_write(struct net_device *dev, int phy_id, int location, int value) | |
833 | { | |
834 | struct hamachi_private *hmp = netdev_priv(dev); | |
835 | void __iomem *ioaddr = hmp->base; | |
836 | int i; | |
837 | ||
838 | /* We should check busy first - per docs -KDU */ | |
839 | for (i = 10000; i >= 0; i--) | |
840 | if ((readw(ioaddr + MII_Status) & 1) == 0) | |
841 | break; | |
842 | writew((phy_id<<8) + location, ioaddr + MII_Addr); | |
843 | writew(value, ioaddr + MII_Wr_Data); | |
844 | ||
845 | /* Wait for the command to finish. */ | |
846 | for (i = 10000; i >= 0; i--) | |
847 | if ((readw(ioaddr + MII_Status) & 1) == 0) | |
848 | break; | |
1da177e4 LT |
849 | } |
850 | ||
6aa20a22 | 851 | |
1da177e4 LT |
852 | static int hamachi_open(struct net_device *dev) |
853 | { | |
854 | struct hamachi_private *hmp = netdev_priv(dev); | |
855 | void __iomem *ioaddr = hmp->base; | |
856 | int i; | |
857 | u32 rx_int_var, tx_int_var; | |
858 | u16 fifo_info; | |
859 | ||
0ca0aa08 FR |
860 | i = request_irq(hmp->pci_dev->irq, hamachi_interrupt, IRQF_SHARED, |
861 | dev->name, dev); | |
1da177e4 LT |
862 | if (i) |
863 | return i; | |
864 | ||
1da177e4 LT |
865 | hamachi_init_ring(dev); |
866 | ||
867 | #if ADDRLEN == 64 | |
868 | /* writellll anyone ? */ | |
8e985918 AV |
869 | writel(hmp->rx_ring_dma, ioaddr + RxPtr); |
870 | writel(hmp->rx_ring_dma >> 32, ioaddr + RxPtr + 4); | |
871 | writel(hmp->tx_ring_dma, ioaddr + TxPtr); | |
872 | writel(hmp->tx_ring_dma >> 32, ioaddr + TxPtr + 4); | |
1da177e4 | 873 | #else |
8e985918 AV |
874 | writel(hmp->rx_ring_dma, ioaddr + RxPtr); |
875 | writel(hmp->tx_ring_dma, ioaddr + TxPtr); | |
1da177e4 LT |
876 | #endif |
877 | ||
6aa20a22 | 878 | /* TODO: It would make sense to organize this as words since the card |
1da177e4 LT |
879 | * documentation does. -KDU |
880 | */ | |
881 | for (i = 0; i < 6; i++) | |
882 | writeb(dev->dev_addr[i], ioaddr + StationAddr + i); | |
883 | ||
884 | /* Initialize other registers: with so many this eventually this will | |
885 | converted to an offset/value list. */ | |
886 | ||
887 | /* Configure the FIFO */ | |
888 | fifo_info = (readw(ioaddr + GPIO) & 0x00C0) >> 6; | |
889 | switch (fifo_info){ | |
6aa20a22 | 890 | case 0 : |
1da177e4 LT |
891 | /* No FIFO */ |
892 | writew(0x0000, ioaddr + FIFOcfg); | |
893 | break; | |
6aa20a22 | 894 | case 1 : |
1da177e4 LT |
895 | /* Configure the FIFO for 512K external, 16K used for Tx. */ |
896 | writew(0x0028, ioaddr + FIFOcfg); | |
897 | break; | |
6aa20a22 | 898 | case 2 : |
1da177e4 LT |
899 | /* Configure the FIFO for 1024 external, 32K used for Tx. */ |
900 | writew(0x004C, ioaddr + FIFOcfg); | |
901 | break; | |
6aa20a22 | 902 | case 3 : |
1da177e4 LT |
903 | /* Configure the FIFO for 2048 external, 32K used for Tx. */ |
904 | writew(0x006C, ioaddr + FIFOcfg); | |
905 | break; | |
6aa20a22 | 906 | default : |
1da177e4 LT |
907 | printk(KERN_WARNING "%s: Unsupported external memory config!\n", |
908 | dev->name); | |
909 | /* Default to no FIFO */ | |
910 | writew(0x0000, ioaddr + FIFOcfg); | |
911 | break; | |
912 | } | |
6aa20a22 | 913 | |
1da177e4 LT |
914 | if (dev->if_port == 0) |
915 | dev->if_port = hmp->default_port; | |
916 | ||
917 | ||
918 | /* Setting the Rx mode will start the Rx process. */ | |
6aa20a22 | 919 | /* If someone didn't choose a duplex, default to full-duplex */ |
1da177e4 LT |
920 | if (hmp->duplex_lock != 1) |
921 | hmp->mii_if.full_duplex = 1; | |
922 | ||
923 | /* always 1, takes no more time to do it */ | |
924 | writew(0x0001, ioaddr + RxChecksum); | |
1da177e4 | 925 | writew(0x0000, ioaddr + TxChecksum); |
1da177e4 LT |
926 | writew(0x8000, ioaddr + MACCnfg); /* Soft reset the MAC */ |
927 | writew(0x215F, ioaddr + MACCnfg); | |
6aa20a22 | 928 | writew(0x000C, ioaddr + FrameGap0); |
1da177e4 LT |
929 | /* WHAT?!?!? Why isn't this documented somewhere? -KDU */ |
930 | writew(0x1018, ioaddr + FrameGap1); | |
931 | /* Why do we enable receives/transmits here? -KDU */ | |
932 | writew(0x0780, ioaddr + MACCnfg2); /* Upper 16 bits control LEDs. */ | |
933 | /* Enable automatic generation of flow control frames, period 0xffff. */ | |
934 | writel(0x0030FFFF, ioaddr + FlowCtrl); | |
935 | writew(MAX_FRAME_SIZE, ioaddr + MaxFrameSize); /* dev->mtu+14 ??? */ | |
936 | ||
937 | /* Enable legacy links. */ | |
938 | writew(0x0400, ioaddr + ANXchngCtrl); /* Enable legacy links. */ | |
939 | /* Initial Link LED to blinking red. */ | |
940 | writeb(0x03, ioaddr + LEDCtrl); | |
941 | ||
942 | /* Configure interrupt mitigation. This has a great effect on | |
943 | performance, so systems tuning should start here!. */ | |
944 | ||
945 | rx_int_var = hmp->rx_int_var; | |
946 | tx_int_var = hmp->tx_int_var; | |
947 | ||
948 | if (hamachi_debug > 1) { | |
949 | printk("max_tx_latency: %d, max_tx_gap: %d, min_tx_pkt: %d\n", | |
6aa20a22 | 950 | tx_int_var & 0x00ff, (tx_int_var & 0x00ff00) >> 8, |
1da177e4 LT |
951 | (tx_int_var & 0x00ff0000) >> 16); |
952 | printk("max_rx_latency: %d, max_rx_gap: %d, min_rx_pkt: %d\n", | |
6aa20a22 | 953 | rx_int_var & 0x00ff, (rx_int_var & 0x00ff00) >> 8, |
1da177e4 LT |
954 | (rx_int_var & 0x00ff0000) >> 16); |
955 | printk("rx_int_var: %x, tx_int_var: %x\n", rx_int_var, tx_int_var); | |
956 | } | |
957 | ||
6aa20a22 JG |
958 | writel(tx_int_var, ioaddr + TxIntrCtrl); |
959 | writel(rx_int_var, ioaddr + RxIntrCtrl); | |
1da177e4 LT |
960 | |
961 | set_rx_mode(dev); | |
962 | ||
963 | netif_start_queue(dev); | |
964 | ||
965 | /* Enable interrupts by setting the interrupt mask. */ | |
966 | writel(0x80878787, ioaddr + InterruptEnable); | |
967 | writew(0x0000, ioaddr + EventStatus); /* Clear non-interrupting events */ | |
968 | ||
969 | /* Configure and start the DMA channels. */ | |
970 | /* Burst sizes are in the low three bits: size = 4<<(val&7) */ | |
971 | #if ADDRLEN == 64 | |
972 | writew(0x005D, ioaddr + RxDMACtrl); /* 128 dword bursts */ | |
973 | writew(0x005D, ioaddr + TxDMACtrl); | |
974 | #else | |
975 | writew(0x001D, ioaddr + RxDMACtrl); | |
976 | writew(0x001D, ioaddr + TxDMACtrl); | |
977 | #endif | |
978 | writew(0x0001, ioaddr + RxCmd); | |
979 | ||
980 | if (hamachi_debug > 2) { | |
981 | printk(KERN_DEBUG "%s: Done hamachi_open(), status: Rx %x Tx %x.\n", | |
982 | dev->name, readw(ioaddr + RxStatus), readw(ioaddr + TxStatus)); | |
983 | } | |
984 | /* Set the timer to check for link beat. */ | |
985 | init_timer(&hmp->timer); | |
986 | hmp->timer.expires = RUN_AT((24*HZ)/10); /* 2.4 sec. */ | |
987 | hmp->timer.data = (unsigned long)dev; | |
c061b18d | 988 | hmp->timer.function = hamachi_timer; /* timer handler */ |
1da177e4 LT |
989 | add_timer(&hmp->timer); |
990 | ||
991 | return 0; | |
992 | } | |
993 | ||
994 | static inline int hamachi_tx(struct net_device *dev) | |
995 | { | |
996 | struct hamachi_private *hmp = netdev_priv(dev); | |
997 | ||
998 | /* Update the dirty pointer until we find an entry that is | |
999 | still owned by the card */ | |
1000 | for (; hmp->cur_tx - hmp->dirty_tx > 0; hmp->dirty_tx++) { | |
1001 | int entry = hmp->dirty_tx % TX_RING_SIZE; | |
1002 | struct sk_buff *skb; | |
1003 | ||
6aa20a22 | 1004 | if (hmp->tx_ring[entry].status_n_length & cpu_to_le32(DescOwn)) |
1da177e4 LT |
1005 | break; |
1006 | /* Free the original skb. */ | |
1007 | skb = hmp->tx_skbuff[entry]; | |
ddfce6bb | 1008 | if (skb) { |
6aa20a22 | 1009 | pci_unmap_single(hmp->pci_dev, |
8e985918 AV |
1010 | leXX_to_cpu(hmp->tx_ring[entry].addr), |
1011 | skb->len, PCI_DMA_TODEVICE); | |
1da177e4 LT |
1012 | dev_kfree_skb(skb); |
1013 | hmp->tx_skbuff[entry] = NULL; | |
1014 | } | |
1015 | hmp->tx_ring[entry].status_n_length = 0; | |
6aa20a22 | 1016 | if (entry >= TX_RING_SIZE-1) |
1da177e4 | 1017 | hmp->tx_ring[TX_RING_SIZE-1].status_n_length |= |
6aa20a22 | 1018 | cpu_to_le32(DescEndRing); |
0b9be50b | 1019 | dev->stats.tx_packets++; |
1da177e4 LT |
1020 | } |
1021 | ||
1022 | return 0; | |
1023 | } | |
1024 | ||
1025 | static void hamachi_timer(unsigned long data) | |
1026 | { | |
1027 | struct net_device *dev = (struct net_device *)data; | |
1028 | struct hamachi_private *hmp = netdev_priv(dev); | |
1029 | void __iomem *ioaddr = hmp->base; | |
1030 | int next_tick = 10*HZ; | |
1031 | ||
1032 | if (hamachi_debug > 2) { | |
1033 | printk(KERN_INFO "%s: Hamachi Autonegotiation status %4.4x, LPA " | |
1034 | "%4.4x.\n", dev->name, readw(ioaddr + ANStatus), | |
1035 | readw(ioaddr + ANLinkPartnerAbility)); | |
1036 | printk(KERN_INFO "%s: Autonegotiation regs %4.4x %4.4x %4.4x " | |
1037 | "%4.4x %4.4x %4.4x.\n", dev->name, | |
1038 | readw(ioaddr + 0x0e0), | |
1039 | readw(ioaddr + 0x0e2), | |
1040 | readw(ioaddr + 0x0e4), | |
1041 | readw(ioaddr + 0x0e6), | |
1042 | readw(ioaddr + 0x0e8), | |
1043 | readw(ioaddr + 0x0eA)); | |
1044 | } | |
1045 | /* We could do something here... nah. */ | |
1046 | hmp->timer.expires = RUN_AT(next_tick); | |
1047 | add_timer(&hmp->timer); | |
1048 | } | |
1049 | ||
1050 | static void hamachi_tx_timeout(struct net_device *dev) | |
1051 | { | |
1052 | int i; | |
1053 | struct hamachi_private *hmp = netdev_priv(dev); | |
1054 | void __iomem *ioaddr = hmp->base; | |
1055 | ||
1056 | printk(KERN_WARNING "%s: Hamachi transmit timed out, status %8.8x," | |
1057 | " resetting...\n", dev->name, (int)readw(ioaddr + TxStatus)); | |
1058 | ||
1059 | { | |
1da177e4 LT |
1060 | printk(KERN_DEBUG " Rx ring %p: ", hmp->rx_ring); |
1061 | for (i = 0; i < RX_RING_SIZE; i++) | |
ad361c98 JP |
1062 | printk(KERN_CONT " %8.8x", |
1063 | le32_to_cpu(hmp->rx_ring[i].status_n_length)); | |
1064 | printk(KERN_CONT "\n"); | |
1065 | printk(KERN_DEBUG" Tx ring %p: ", hmp->tx_ring); | |
1da177e4 | 1066 | for (i = 0; i < TX_RING_SIZE; i++) |
ad361c98 JP |
1067 | printk(KERN_CONT " %4.4x", |
1068 | le32_to_cpu(hmp->tx_ring[i].status_n_length)); | |
1069 | printk(KERN_CONT "\n"); | |
1da177e4 LT |
1070 | } |
1071 | ||
6aa20a22 | 1072 | /* Reinit the hardware and make sure the Rx and Tx processes |
1da177e4 LT |
1073 | are up and running. |
1074 | */ | |
1075 | dev->if_port = 0; | |
1076 | /* The right way to do Reset. -KDU | |
1077 | * -Clear OWN bit in all Rx/Tx descriptors | |
1078 | * -Wait 50 uS for channels to go idle | |
1079 | * -Turn off MAC receiver | |
1080 | * -Issue Reset | |
1081 | */ | |
6aa20a22 | 1082 | |
1da177e4 LT |
1083 | for (i = 0; i < RX_RING_SIZE; i++) |
1084 | hmp->rx_ring[i].status_n_length &= cpu_to_le32(~DescOwn); | |
1085 | ||
1086 | /* Presume that all packets in the Tx queue are gone if we have to | |
1087 | * re-init the hardware. | |
1088 | */ | |
1089 | for (i = 0; i < TX_RING_SIZE; i++){ | |
1090 | struct sk_buff *skb; | |
1091 | ||
1092 | if (i >= TX_RING_SIZE - 1) | |
8e985918 AV |
1093 | hmp->tx_ring[i].status_n_length = |
1094 | cpu_to_le32(DescEndRing) | | |
1095 | (hmp->tx_ring[i].status_n_length & | |
1096 | cpu_to_le32(0x0000ffff)); | |
6aa20a22 | 1097 | else |
8e985918 | 1098 | hmp->tx_ring[i].status_n_length &= cpu_to_le32(0x0000ffff); |
1da177e4 LT |
1099 | skb = hmp->tx_skbuff[i]; |
1100 | if (skb){ | |
8e985918 | 1101 | pci_unmap_single(hmp->pci_dev, leXX_to_cpu(hmp->tx_ring[i].addr), |
1da177e4 LT |
1102 | skb->len, PCI_DMA_TODEVICE); |
1103 | dev_kfree_skb(skb); | |
1104 | hmp->tx_skbuff[i] = NULL; | |
1105 | } | |
1106 | } | |
1107 | ||
1108 | udelay(60); /* Sleep 60 us just for safety sake */ | |
1109 | writew(0x0002, ioaddr + RxCmd); /* STOP Rx */ | |
6aa20a22 JG |
1110 | |
1111 | writeb(0x01, ioaddr + ChipReset); /* Reinit the hardware */ | |
1da177e4 LT |
1112 | |
1113 | hmp->tx_full = 0; | |
1114 | hmp->cur_rx = hmp->cur_tx = 0; | |
1115 | hmp->dirty_rx = hmp->dirty_tx = 0; | |
1116 | /* Rx packets are also presumed lost; however, we need to make sure a | |
1117 | * ring of buffers is in tact. -KDU | |
6aa20a22 | 1118 | */ |
1da177e4 LT |
1119 | for (i = 0; i < RX_RING_SIZE; i++){ |
1120 | struct sk_buff *skb = hmp->rx_skbuff[i]; | |
1121 | ||
1122 | if (skb){ | |
8e985918 AV |
1123 | pci_unmap_single(hmp->pci_dev, |
1124 | leXX_to_cpu(hmp->rx_ring[i].addr), | |
1da177e4 LT |
1125 | hmp->rx_buf_sz, PCI_DMA_FROMDEVICE); |
1126 | dev_kfree_skb(skb); | |
1127 | hmp->rx_skbuff[i] = NULL; | |
1128 | } | |
1129 | } | |
1130 | /* Fill in the Rx buffers. Handle allocation failure gracefully. */ | |
1131 | for (i = 0; i < RX_RING_SIZE; i++) { | |
89d71a66 ED |
1132 | struct sk_buff *skb; |
1133 | ||
1134 | skb = netdev_alloc_skb_ip_align(dev, hmp->rx_buf_sz); | |
1da177e4 LT |
1135 | hmp->rx_skbuff[i] = skb; |
1136 | if (skb == NULL) | |
1137 | break; | |
8eb60131 | 1138 | |
6aa20a22 | 1139 | hmp->rx_ring[i].addr = cpu_to_leXX(pci_map_single(hmp->pci_dev, |
689be439 | 1140 | skb->data, hmp->rx_buf_sz, PCI_DMA_FROMDEVICE)); |
6aa20a22 | 1141 | hmp->rx_ring[i].status_n_length = cpu_to_le32(DescOwn | |
1da177e4 LT |
1142 | DescEndPacket | DescIntr | (hmp->rx_buf_sz - 2)); |
1143 | } | |
1144 | hmp->dirty_rx = (unsigned int)(i - RX_RING_SIZE); | |
1145 | /* Mark the last entry as wrapping the ring. */ | |
1146 | hmp->rx_ring[RX_RING_SIZE-1].status_n_length |= cpu_to_le32(DescEndRing); | |
1147 | ||
1148 | /* Trigger an immediate transmit demand. */ | |
cdd0db05 | 1149 | dev->trans_start = jiffies; /* prevent tx timeout */ |
0b9be50b | 1150 | dev->stats.tx_errors++; |
1da177e4 LT |
1151 | |
1152 | /* Restart the chip's Tx/Rx processes . */ | |
1153 | writew(0x0002, ioaddr + TxCmd); /* STOP Tx */ | |
1154 | writew(0x0001, ioaddr + TxCmd); /* START Tx */ | |
1155 | writew(0x0001, ioaddr + RxCmd); /* START Rx */ | |
1156 | ||
1157 | netif_wake_queue(dev); | |
1158 | } | |
1159 | ||
1160 | ||
1161 | /* Initialize the Rx and Tx rings, along with various 'dev' bits. */ | |
1162 | static void hamachi_init_ring(struct net_device *dev) | |
1163 | { | |
1164 | struct hamachi_private *hmp = netdev_priv(dev); | |
1165 | int i; | |
1166 | ||
1167 | hmp->tx_full = 0; | |
1168 | hmp->cur_rx = hmp->cur_tx = 0; | |
1169 | hmp->dirty_rx = hmp->dirty_tx = 0; | |
1170 | ||
1da177e4 | 1171 | /* +26 gets the maximum ethernet encapsulation, +7 & ~7 because the |
6aa20a22 JG |
1172 | * card needs room to do 8 byte alignment, +2 so we can reserve |
1173 | * the first 2 bytes, and +16 gets room for the status word from the | |
1da177e4 LT |
1174 | * card. -KDU |
1175 | */ | |
6aa20a22 | 1176 | hmp->rx_buf_sz = (dev->mtu <= 1492 ? PKT_BUF_SZ : |
89d71a66 | 1177 | (((dev->mtu+26+7) & ~7) + 16)); |
1da177e4 LT |
1178 | |
1179 | /* Initialize all Rx descriptors. */ | |
1180 | for (i = 0; i < RX_RING_SIZE; i++) { | |
1181 | hmp->rx_ring[i].status_n_length = 0; | |
1182 | hmp->rx_skbuff[i] = NULL; | |
1183 | } | |
1184 | /* Fill in the Rx buffers. Handle allocation failure gracefully. */ | |
1185 | for (i = 0; i < RX_RING_SIZE; i++) { | |
dae2e9f4 | 1186 | struct sk_buff *skb = netdev_alloc_skb(dev, hmp->rx_buf_sz + 2); |
1da177e4 LT |
1187 | hmp->rx_skbuff[i] = skb; |
1188 | if (skb == NULL) | |
1189 | break; | |
1da177e4 | 1190 | skb_reserve(skb, 2); /* 16 byte align the IP header. */ |
6aa20a22 | 1191 | hmp->rx_ring[i].addr = cpu_to_leXX(pci_map_single(hmp->pci_dev, |
689be439 | 1192 | skb->data, hmp->rx_buf_sz, PCI_DMA_FROMDEVICE)); |
1da177e4 | 1193 | /* -2 because it doesn't REALLY have that first 2 bytes -KDU */ |
6aa20a22 | 1194 | hmp->rx_ring[i].status_n_length = cpu_to_le32(DescOwn | |
1da177e4 LT |
1195 | DescEndPacket | DescIntr | (hmp->rx_buf_sz -2)); |
1196 | } | |
1197 | hmp->dirty_rx = (unsigned int)(i - RX_RING_SIZE); | |
1198 | hmp->rx_ring[RX_RING_SIZE-1].status_n_length |= cpu_to_le32(DescEndRing); | |
1199 | ||
1200 | for (i = 0; i < TX_RING_SIZE; i++) { | |
1201 | hmp->tx_skbuff[i] = NULL; | |
1202 | hmp->tx_ring[i].status_n_length = 0; | |
1203 | } | |
1204 | /* Mark the last entry of the ring */ | |
1205 | hmp->tx_ring[TX_RING_SIZE-1].status_n_length |= cpu_to_le32(DescEndRing); | |
1da177e4 LT |
1206 | } |
1207 | ||
1208 | ||
61357325 SH |
1209 | static netdev_tx_t hamachi_start_xmit(struct sk_buff *skb, |
1210 | struct net_device *dev) | |
1da177e4 LT |
1211 | { |
1212 | struct hamachi_private *hmp = netdev_priv(dev); | |
1213 | unsigned entry; | |
1214 | u16 status; | |
1215 | ||
6aa20a22 | 1216 | /* Ok, now make sure that the queue has space before trying to |
1da177e4 LT |
1217 | add another skbuff. if we return non-zero the scheduler |
1218 | should interpret this as a queue full and requeue the buffer | |
1219 | for later. | |
1220 | */ | |
1221 | if (hmp->tx_full) { | |
1222 | /* We should NEVER reach this point -KDU */ | |
1223 | printk(KERN_WARNING "%s: Hamachi transmit queue full at slot %d.\n",dev->name, hmp->cur_tx); | |
1224 | ||
1225 | /* Wake the potentially-idle transmit channel. */ | |
1226 | /* If we don't need to read status, DON'T -KDU */ | |
1227 | status=readw(hmp->base + TxStatus); | |
1228 | if( !(status & 0x0001) || (status & 0x0002)) | |
1229 | writew(0x0001, hmp->base + TxCmd); | |
5b548140 | 1230 | return NETDEV_TX_BUSY; |
6aa20a22 | 1231 | } |
1da177e4 LT |
1232 | |
1233 | /* Caution: the write order is important here, set the field | |
1234 | with the "ownership" bits last. */ | |
1235 | ||
1236 | /* Calculate the next Tx descriptor entry. */ | |
1237 | entry = hmp->cur_tx % TX_RING_SIZE; | |
1238 | ||
1239 | hmp->tx_skbuff[entry] = skb; | |
1240 | ||
6aa20a22 | 1241 | hmp->tx_ring[entry].addr = cpu_to_leXX(pci_map_single(hmp->pci_dev, |
1da177e4 | 1242 | skb->data, skb->len, PCI_DMA_TODEVICE)); |
6aa20a22 | 1243 | |
1da177e4 LT |
1244 | /* Hmmmm, could probably put a DescIntr on these, but the way |
1245 | the driver is currently coded makes Tx interrupts unnecessary | |
1246 | since the clearing of the Tx ring is handled by the start_xmit | |
1247 | routine. This organization helps mitigate the interrupts a | |
1248 | bit and probably renders the max_tx_latency param useless. | |
6aa20a22 | 1249 | |
1da177e4 LT |
1250 | Update: Putting a DescIntr bit on all of the descriptors and |
1251 | mitigating interrupt frequency with the tx_min_pkt parameter. -KDU | |
1252 | */ | |
1253 | if (entry >= TX_RING_SIZE-1) /* Wrap ring */ | |
1254 | hmp->tx_ring[entry].status_n_length = cpu_to_le32(DescOwn | | |
1255 | DescEndPacket | DescEndRing | DescIntr | skb->len); | |
1256 | else | |
1257 | hmp->tx_ring[entry].status_n_length = cpu_to_le32(DescOwn | | |
1258 | DescEndPacket | DescIntr | skb->len); | |
1259 | hmp->cur_tx++; | |
1260 | ||
1261 | /* Non-x86 Todo: explicitly flush cache lines here. */ | |
1262 | ||
1263 | /* Wake the potentially-idle transmit channel. */ | |
1264 | /* If we don't need to read status, DON'T -KDU */ | |
1265 | status=readw(hmp->base + TxStatus); | |
1266 | if( !(status & 0x0001) || (status & 0x0002)) | |
1267 | writew(0x0001, hmp->base + TxCmd); | |
1268 | ||
1269 | /* Immediately before returning, let's clear as many entries as we can. */ | |
1270 | hamachi_tx(dev); | |
1271 | ||
1272 | /* We should kick the bottom half here, since we are not accepting | |
1273 | * interrupts with every packet. i.e. realize that Gigabit ethernet | |
1274 | * can transmit faster than ordinary machines can load packets; | |
1275 | * hence, any packet that got put off because we were in the transmit | |
1276 | * routine should IMMEDIATELY get a chance to be re-queued. -KDU | |
1277 | */ | |
6aa20a22 | 1278 | if ((hmp->cur_tx - hmp->dirty_tx) < (TX_RING_SIZE - 4)) |
1da177e4 LT |
1279 | netif_wake_queue(dev); /* Typical path */ |
1280 | else { | |
1281 | hmp->tx_full = 1; | |
1282 | netif_stop_queue(dev); | |
1283 | } | |
1da177e4 LT |
1284 | |
1285 | if (hamachi_debug > 4) { | |
1286 | printk(KERN_DEBUG "%s: Hamachi transmit frame #%d queued in slot %d.\n", | |
1287 | dev->name, hmp->cur_tx, entry); | |
1288 | } | |
6ed10654 | 1289 | return NETDEV_TX_OK; |
1da177e4 LT |
1290 | } |
1291 | ||
1292 | /* The interrupt handler does all of the Rx thread work and cleans up | |
1293 | after the Tx thread. */ | |
7d12e780 | 1294 | static irqreturn_t hamachi_interrupt(int irq, void *dev_instance) |
1da177e4 LT |
1295 | { |
1296 | struct net_device *dev = dev_instance; | |
1297 | struct hamachi_private *hmp = netdev_priv(dev); | |
1298 | void __iomem *ioaddr = hmp->base; | |
1299 | long boguscnt = max_interrupt_work; | |
1300 | int handled = 0; | |
1301 | ||
1302 | #ifndef final_version /* Can never occur. */ | |
1303 | if (dev == NULL) { | |
1304 | printk (KERN_ERR "hamachi_interrupt(): irq %d for unknown device.\n", irq); | |
1305 | return IRQ_NONE; | |
1306 | } | |
1307 | #endif | |
1308 | ||
1309 | spin_lock(&hmp->lock); | |
1310 | ||
1311 | do { | |
1312 | u32 intr_status = readl(ioaddr + InterruptClear); | |
1313 | ||
1314 | if (hamachi_debug > 4) | |
1315 | printk(KERN_DEBUG "%s: Hamachi interrupt, status %4.4x.\n", | |
1316 | dev->name, intr_status); | |
1317 | ||
1318 | if (intr_status == 0) | |
1319 | break; | |
1320 | ||
1321 | handled = 1; | |
1322 | ||
1323 | if (intr_status & IntrRxDone) | |
1324 | hamachi_rx(dev); | |
1325 | ||
1326 | if (intr_status & IntrTxDone){ | |
1327 | /* This code should RARELY need to execute. After all, this is | |
1328 | * a gigabit link, it should consume packets as fast as we put | |
1329 | * them in AND we clear the Tx ring in hamachi_start_xmit(). | |
6aa20a22 | 1330 | */ |
1da177e4 LT |
1331 | if (hmp->tx_full){ |
1332 | for (; hmp->cur_tx - hmp->dirty_tx > 0; hmp->dirty_tx++){ | |
1333 | int entry = hmp->dirty_tx % TX_RING_SIZE; | |
1334 | struct sk_buff *skb; | |
1335 | ||
6aa20a22 | 1336 | if (hmp->tx_ring[entry].status_n_length & cpu_to_le32(DescOwn)) |
1da177e4 LT |
1337 | break; |
1338 | skb = hmp->tx_skbuff[entry]; | |
1339 | /* Free the original skb. */ | |
1340 | if (skb){ | |
6aa20a22 | 1341 | pci_unmap_single(hmp->pci_dev, |
8e985918 | 1342 | leXX_to_cpu(hmp->tx_ring[entry].addr), |
1da177e4 LT |
1343 | skb->len, |
1344 | PCI_DMA_TODEVICE); | |
1345 | dev_kfree_skb_irq(skb); | |
1346 | hmp->tx_skbuff[entry] = NULL; | |
1347 | } | |
1348 | hmp->tx_ring[entry].status_n_length = 0; | |
6aa20a22 JG |
1349 | if (entry >= TX_RING_SIZE-1) |
1350 | hmp->tx_ring[TX_RING_SIZE-1].status_n_length |= | |
1da177e4 | 1351 | cpu_to_le32(DescEndRing); |
0b9be50b | 1352 | dev->stats.tx_packets++; |
1da177e4 LT |
1353 | } |
1354 | if (hmp->cur_tx - hmp->dirty_tx < TX_RING_SIZE - 4){ | |
1355 | /* The ring is no longer full */ | |
1356 | hmp->tx_full = 0; | |
1357 | netif_wake_queue(dev); | |
1358 | } | |
1359 | } else { | |
1360 | netif_wake_queue(dev); | |
1361 | } | |
1362 | } | |
1363 | ||
1364 | ||
1365 | /* Abnormal error summary/uncommon events handlers. */ | |
1366 | if (intr_status & | |
1367 | (IntrTxPCIFault | IntrTxPCIErr | IntrRxPCIFault | IntrRxPCIErr | | |
1368 | LinkChange | NegotiationChange | StatsMax)) | |
1369 | hamachi_error(dev, intr_status); | |
1370 | ||
1371 | if (--boguscnt < 0) { | |
1372 | printk(KERN_WARNING "%s: Too much work at interrupt, status=0x%4.4x.\n", | |
1373 | dev->name, intr_status); | |
1374 | break; | |
1375 | } | |
1376 | } while (1); | |
1377 | ||
1378 | if (hamachi_debug > 3) | |
1379 | printk(KERN_DEBUG "%s: exiting interrupt, status=%#4.4x.\n", | |
1380 | dev->name, readl(ioaddr + IntrStatus)); | |
1381 | ||
1382 | #ifndef final_version | |
1383 | /* Code that should never be run! Perhaps remove after testing.. */ | |
1384 | { | |
1385 | static int stopit = 10; | |
1386 | if (dev->start == 0 && --stopit < 0) { | |
1387 | printk(KERN_ERR "%s: Emergency stop, looping startup interrupt.\n", | |
1388 | dev->name); | |
1389 | free_irq(irq, dev); | |
1390 | } | |
1391 | } | |
1392 | #endif | |
1393 | ||
1394 | spin_unlock(&hmp->lock); | |
1395 | return IRQ_RETVAL(handled); | |
1396 | } | |
1397 | ||
1398 | /* This routine is logically part of the interrupt handler, but separated | |
1399 | for clarity and better register allocation. */ | |
1400 | static int hamachi_rx(struct net_device *dev) | |
1401 | { | |
1402 | struct hamachi_private *hmp = netdev_priv(dev); | |
1403 | int entry = hmp->cur_rx % RX_RING_SIZE; | |
1404 | int boguscnt = (hmp->dirty_rx + RX_RING_SIZE) - hmp->cur_rx; | |
1405 | ||
1406 | if (hamachi_debug > 4) { | |
1407 | printk(KERN_DEBUG " In hamachi_rx(), entry %d status %4.4x.\n", | |
1408 | entry, hmp->rx_ring[entry].status_n_length); | |
1409 | } | |
1410 | ||
1411 | /* If EOP is set on the next entry, it's a new packet. Send it up. */ | |
1412 | while (1) { | |
1413 | struct hamachi_desc *desc = &(hmp->rx_ring[entry]); | |
1414 | u32 desc_status = le32_to_cpu(desc->status_n_length); | |
1415 | u16 data_size = desc_status; /* Implicit truncate */ | |
6aa20a22 | 1416 | u8 *buf_addr; |
1da177e4 | 1417 | s32 frame_status; |
6aa20a22 | 1418 | |
1da177e4 LT |
1419 | if (desc_status & DescOwn) |
1420 | break; | |
1421 | pci_dma_sync_single_for_cpu(hmp->pci_dev, | |
8e985918 | 1422 | leXX_to_cpu(desc->addr), |
1da177e4 LT |
1423 | hmp->rx_buf_sz, |
1424 | PCI_DMA_FROMDEVICE); | |
689be439 | 1425 | buf_addr = (u8 *) hmp->rx_skbuff[entry]->data; |
6caf52a4 | 1426 | frame_status = get_unaligned_le32(&(buf_addr[data_size - 12])); |
1da177e4 LT |
1427 | if (hamachi_debug > 4) |
1428 | printk(KERN_DEBUG " hamachi_rx() status was %8.8x.\n", | |
1429 | frame_status); | |
1430 | if (--boguscnt < 0) | |
1431 | break; | |
1432 | if ( ! (desc_status & DescEndPacket)) { | |
1433 | printk(KERN_WARNING "%s: Oversized Ethernet frame spanned " | |
1434 | "multiple buffers, entry %#x length %d status %4.4x!\n", | |
1435 | dev->name, hmp->cur_rx, data_size, desc_status); | |
1436 | printk(KERN_WARNING "%s: Oversized Ethernet frame %p vs %p.\n", | |
1437 | dev->name, desc, &hmp->rx_ring[hmp->cur_rx % RX_RING_SIZE]); | |
1438 | printk(KERN_WARNING "%s: Oversized Ethernet frame -- next status %x/%x last status %x.\n", | |
1439 | dev->name, | |
8e985918 AV |
1440 | le32_to_cpu(hmp->rx_ring[(hmp->cur_rx+1) % RX_RING_SIZE].status_n_length) & 0xffff0000, |
1441 | le32_to_cpu(hmp->rx_ring[(hmp->cur_rx+1) % RX_RING_SIZE].status_n_length) & 0x0000ffff, | |
1442 | le32_to_cpu(hmp->rx_ring[(hmp->cur_rx-1) % RX_RING_SIZE].status_n_length)); | |
0b9be50b | 1443 | dev->stats.rx_length_errors++; |
1da177e4 LT |
1444 | } /* else Omit for prototype errata??? */ |
1445 | if (frame_status & 0x00380000) { | |
1446 | /* There was an error. */ | |
1447 | if (hamachi_debug > 2) | |
1448 | printk(KERN_DEBUG " hamachi_rx() Rx error was %8.8x.\n", | |
1449 | frame_status); | |
0b9be50b KV |
1450 | dev->stats.rx_errors++; |
1451 | if (frame_status & 0x00600000) | |
1452 | dev->stats.rx_length_errors++; | |
1453 | if (frame_status & 0x00080000) | |
1454 | dev->stats.rx_frame_errors++; | |
1455 | if (frame_status & 0x00100000) | |
1456 | dev->stats.rx_crc_errors++; | |
1457 | if (frame_status < 0) | |
1458 | dev->stats.rx_dropped++; | |
1da177e4 LT |
1459 | } else { |
1460 | struct sk_buff *skb; | |
1461 | /* Omit CRC */ | |
6aa20a22 | 1462 | u16 pkt_len = (frame_status & 0x07ff) - 4; |
1da177e4 LT |
1463 | #ifdef RX_CHECKSUM |
1464 | u32 pfck = *(u32 *) &buf_addr[data_size - 8]; | |
1465 | #endif | |
1466 | ||
1467 | ||
1468 | #ifndef final_version | |
1469 | if (hamachi_debug > 4) | |
1470 | printk(KERN_DEBUG " hamachi_rx() normal Rx pkt length %d" | |
1471 | " of %d, bogus_cnt %d.\n", | |
1472 | pkt_len, data_size, boguscnt); | |
1473 | if (hamachi_debug > 5) | |
1474 | printk(KERN_DEBUG"%s: rx status %8.8x %8.8x %8.8x %8.8x %8.8x.\n", | |
1475 | dev->name, | |
1476 | *(s32*)&(buf_addr[data_size - 20]), | |
1477 | *(s32*)&(buf_addr[data_size - 16]), | |
1478 | *(s32*)&(buf_addr[data_size - 12]), | |
1479 | *(s32*)&(buf_addr[data_size - 8]), | |
1480 | *(s32*)&(buf_addr[data_size - 4])); | |
1481 | #endif | |
1482 | /* Check if the packet is long enough to accept without copying | |
1483 | to a minimally-sized skbuff. */ | |
8e95a202 | 1484 | if (pkt_len < rx_copybreak && |
dae2e9f4 | 1485 | (skb = netdev_alloc_skb(dev, pkt_len + 2)) != NULL) { |
1da177e4 LT |
1486 | #ifdef RX_CHECKSUM |
1487 | printk(KERN_ERR "%s: rx_copybreak non-zero " | |
1488 | "not good with RX_CHECKSUM\n", dev->name); | |
1489 | #endif | |
1da177e4 LT |
1490 | skb_reserve(skb, 2); /* 16 byte align the IP header */ |
1491 | pci_dma_sync_single_for_cpu(hmp->pci_dev, | |
8e985918 | 1492 | leXX_to_cpu(hmp->rx_ring[entry].addr), |
1da177e4 LT |
1493 | hmp->rx_buf_sz, |
1494 | PCI_DMA_FROMDEVICE); | |
1495 | /* Call copy + cksum if available. */ | |
1496 | #if 1 || USE_IP_COPYSUM | |
8c7b7faa DM |
1497 | skb_copy_to_linear_data(skb, |
1498 | hmp->rx_skbuff[entry]->data, pkt_len); | |
1da177e4 LT |
1499 | skb_put(skb, pkt_len); |
1500 | #else | |
1501 | memcpy(skb_put(skb, pkt_len), hmp->rx_ring_dma | |
1502 | + entry*sizeof(*desc), pkt_len); | |
1503 | #endif | |
1504 | pci_dma_sync_single_for_device(hmp->pci_dev, | |
8e985918 | 1505 | leXX_to_cpu(hmp->rx_ring[entry].addr), |
1da177e4 LT |
1506 | hmp->rx_buf_sz, |
1507 | PCI_DMA_FROMDEVICE); | |
1508 | } else { | |
6aa20a22 | 1509 | pci_unmap_single(hmp->pci_dev, |
8e985918 | 1510 | leXX_to_cpu(hmp->rx_ring[entry].addr), |
1da177e4 LT |
1511 | hmp->rx_buf_sz, PCI_DMA_FROMDEVICE); |
1512 | skb_put(skb = hmp->rx_skbuff[entry], pkt_len); | |
1513 | hmp->rx_skbuff[entry] = NULL; | |
1514 | } | |
1515 | skb->protocol = eth_type_trans(skb, dev); | |
1516 | ||
1517 | ||
1518 | #ifdef RX_CHECKSUM | |
1519 | /* TCP or UDP on ipv4, DIX encoding */ | |
1520 | if (pfck>>24 == 0x91 || pfck>>24 == 0x51) { | |
1521 | struct iphdr *ih = (struct iphdr *) skb->data; | |
1522 | /* Check that IP packet is at least 46 bytes, otherwise, | |
1523 | * there may be pad bytes included in the hardware checksum. | |
1524 | * This wouldn't happen if everyone padded with 0. | |
1525 | */ | |
1526 | if (ntohs(ih->tot_len) >= 46){ | |
1527 | /* don't worry about frags */ | |
09640e63 | 1528 | if (!(ih->frag_off & cpu_to_be16(IP_MF|IP_OFFSET))) { |
1da177e4 LT |
1529 | u32 inv = *(u32 *) &buf_addr[data_size - 16]; |
1530 | u32 *p = (u32 *) &buf_addr[data_size - 20]; | |
1531 | register u32 crc, p_r, p_r1; | |
1532 | ||
1533 | if (inv & 4) { | |
1534 | inv &= ~4; | |
1535 | --p; | |
1536 | } | |
1537 | p_r = *p; | |
1538 | p_r1 = *(p-1); | |
1539 | switch (inv) { | |
6aa20a22 | 1540 | case 0: |
1da177e4 LT |
1541 | crc = (p_r & 0xffff) + (p_r >> 16); |
1542 | break; | |
6aa20a22 | 1543 | case 1: |
1da177e4 | 1544 | crc = (p_r >> 16) + (p_r & 0xffff) |
6aa20a22 | 1545 | + (p_r1 >> 16 & 0xff00); |
1da177e4 | 1546 | break; |
6aa20a22 JG |
1547 | case 2: |
1548 | crc = p_r + (p_r1 >> 16); | |
1da177e4 | 1549 | break; |
6aa20a22 JG |
1550 | case 3: |
1551 | crc = p_r + (p_r1 & 0xff00) + (p_r1 >> 16); | |
1da177e4 LT |
1552 | break; |
1553 | default: /*NOTREACHED*/ crc = 0; | |
1554 | } | |
1555 | if (crc & 0xffff0000) { | |
1556 | crc &= 0xffff; | |
1557 | ++crc; | |
1558 | } | |
1559 | /* tcp/udp will add in pseudo */ | |
1560 | skb->csum = ntohs(pfck & 0xffff); | |
1561 | if (skb->csum > crc) | |
1562 | skb->csum -= crc; | |
1563 | else | |
1564 | skb->csum += (~crc & 0xffff); | |
1565 | /* | |
1566 | * could do the pseudo myself and return | |
1567 | * CHECKSUM_UNNECESSARY | |
1568 | */ | |
84fa7933 | 1569 | skb->ip_summed = CHECKSUM_COMPLETE; |
1da177e4 | 1570 | } |
6aa20a22 | 1571 | } |
1da177e4 LT |
1572 | } |
1573 | #endif /* RX_CHECKSUM */ | |
1574 | ||
1575 | netif_rx(skb); | |
0b9be50b | 1576 | dev->stats.rx_packets++; |
1da177e4 LT |
1577 | } |
1578 | entry = (++hmp->cur_rx) % RX_RING_SIZE; | |
1579 | } | |
1580 | ||
1581 | /* Refill the Rx ring buffers. */ | |
1582 | for (; hmp->cur_rx - hmp->dirty_rx > 0; hmp->dirty_rx++) { | |
1583 | struct hamachi_desc *desc; | |
1584 | ||
1585 | entry = hmp->dirty_rx % RX_RING_SIZE; | |
1586 | desc = &(hmp->rx_ring[entry]); | |
1587 | if (hmp->rx_skbuff[entry] == NULL) { | |
dae2e9f4 | 1588 | struct sk_buff *skb = netdev_alloc_skb(dev, hmp->rx_buf_sz + 2); |
1da177e4 LT |
1589 | |
1590 | hmp->rx_skbuff[entry] = skb; | |
1591 | if (skb == NULL) | |
1592 | break; /* Better luck next round. */ | |
1da177e4 | 1593 | skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */ |
6aa20a22 | 1594 | desc->addr = cpu_to_leXX(pci_map_single(hmp->pci_dev, |
689be439 | 1595 | skb->data, hmp->rx_buf_sz, PCI_DMA_FROMDEVICE)); |
1da177e4 LT |
1596 | } |
1597 | desc->status_n_length = cpu_to_le32(hmp->rx_buf_sz); | |
1598 | if (entry >= RX_RING_SIZE-1) | |
6aa20a22 | 1599 | desc->status_n_length |= cpu_to_le32(DescOwn | |
1da177e4 LT |
1600 | DescEndPacket | DescEndRing | DescIntr); |
1601 | else | |
6aa20a22 | 1602 | desc->status_n_length |= cpu_to_le32(DescOwn | |
1da177e4 LT |
1603 | DescEndPacket | DescIntr); |
1604 | } | |
1605 | ||
1606 | /* Restart Rx engine if stopped. */ | |
1607 | /* If we don't need to check status, don't. -KDU */ | |
1608 | if (readw(hmp->base + RxStatus) & 0x0002) | |
1609 | writew(0x0001, hmp->base + RxCmd); | |
1610 | ||
1611 | return 0; | |
1612 | } | |
1613 | ||
1614 | /* This is more properly named "uncommon interrupt events", as it covers more | |
1615 | than just errors. */ | |
1616 | static void hamachi_error(struct net_device *dev, int intr_status) | |
1617 | { | |
1618 | struct hamachi_private *hmp = netdev_priv(dev); | |
1619 | void __iomem *ioaddr = hmp->base; | |
1620 | ||
1621 | if (intr_status & (LinkChange|NegotiationChange)) { | |
1622 | if (hamachi_debug > 1) | |
1623 | printk(KERN_INFO "%s: Link changed: AutoNegotiation Ctrl" | |
1624 | " %4.4x, Status %4.4x %4.4x Intr status %4.4x.\n", | |
1625 | dev->name, readw(ioaddr + 0x0E0), readw(ioaddr + 0x0E2), | |
1626 | readw(ioaddr + ANLinkPartnerAbility), | |
1627 | readl(ioaddr + IntrStatus)); | |
1628 | if (readw(ioaddr + ANStatus) & 0x20) | |
1629 | writeb(0x01, ioaddr + LEDCtrl); | |
1630 | else | |
1631 | writeb(0x03, ioaddr + LEDCtrl); | |
1632 | } | |
1633 | if (intr_status & StatsMax) { | |
1634 | hamachi_get_stats(dev); | |
1635 | /* Read the overflow bits to clear. */ | |
1636 | readl(ioaddr + 0x370); | |
1637 | readl(ioaddr + 0x3F0); | |
1638 | } | |
8e95a202 JP |
1639 | if ((intr_status & ~(LinkChange|StatsMax|NegotiationChange|IntrRxDone|IntrTxDone)) && |
1640 | hamachi_debug) | |
1da177e4 | 1641 | printk(KERN_ERR "%s: Something Wicked happened! %4.4x.\n", |
8e95a202 | 1642 | dev->name, intr_status); |
1da177e4 LT |
1643 | /* Hmmmmm, it's not clear how to recover from PCI faults. */ |
1644 | if (intr_status & (IntrTxPCIErr | IntrTxPCIFault)) | |
0b9be50b | 1645 | dev->stats.tx_fifo_errors++; |
1da177e4 | 1646 | if (intr_status & (IntrRxPCIErr | IntrRxPCIFault)) |
0b9be50b | 1647 | dev->stats.rx_fifo_errors++; |
1da177e4 LT |
1648 | } |
1649 | ||
1650 | static int hamachi_close(struct net_device *dev) | |
1651 | { | |
1652 | struct hamachi_private *hmp = netdev_priv(dev); | |
1653 | void __iomem *ioaddr = hmp->base; | |
1654 | struct sk_buff *skb; | |
1655 | int i; | |
1656 | ||
1657 | netif_stop_queue(dev); | |
1658 | ||
1659 | if (hamachi_debug > 1) { | |
1660 | printk(KERN_DEBUG "%s: Shutting down ethercard, status was Tx %4.4x Rx %4.4x Int %2.2x.\n", | |
1661 | dev->name, readw(ioaddr + TxStatus), | |
1662 | readw(ioaddr + RxStatus), readl(ioaddr + IntrStatus)); | |
1663 | printk(KERN_DEBUG "%s: Queue pointers were Tx %d / %d, Rx %d / %d.\n", | |
1664 | dev->name, hmp->cur_tx, hmp->dirty_tx, hmp->cur_rx, hmp->dirty_rx); | |
1665 | } | |
1666 | ||
1667 | /* Disable interrupts by clearing the interrupt mask. */ | |
1668 | writel(0x0000, ioaddr + InterruptEnable); | |
1669 | ||
1670 | /* Stop the chip's Tx and Rx processes. */ | |
1671 | writel(2, ioaddr + RxCmd); | |
1672 | writew(2, ioaddr + TxCmd); | |
1673 | ||
1674 | #ifdef __i386__ | |
1675 | if (hamachi_debug > 2) { | |
ad361c98 | 1676 | printk(KERN_DEBUG " Tx ring at %8.8x:\n", |
1da177e4 LT |
1677 | (int)hmp->tx_ring_dma); |
1678 | for (i = 0; i < TX_RING_SIZE; i++) | |
ad361c98 | 1679 | printk(KERN_DEBUG " %c #%d desc. %8.8x %8.8x.\n", |
1da177e4 LT |
1680 | readl(ioaddr + TxCurPtr) == (long)&hmp->tx_ring[i] ? '>' : ' ', |
1681 | i, hmp->tx_ring[i].status_n_length, hmp->tx_ring[i].addr); | |
ad361c98 | 1682 | printk(KERN_DEBUG " Rx ring %8.8x:\n", |
1da177e4 LT |
1683 | (int)hmp->rx_ring_dma); |
1684 | for (i = 0; i < RX_RING_SIZE; i++) { | |
1685 | printk(KERN_DEBUG " %c #%d desc. %4.4x %8.8x\n", | |
1686 | readl(ioaddr + RxCurPtr) == (long)&hmp->rx_ring[i] ? '>' : ' ', | |
1687 | i, hmp->rx_ring[i].status_n_length, hmp->rx_ring[i].addr); | |
1688 | if (hamachi_debug > 6) { | |
689be439 | 1689 | if (*(u8*)hmp->rx_skbuff[i]->data != 0x69) { |
1da177e4 | 1690 | u16 *addr = (u16 *) |
689be439 | 1691 | hmp->rx_skbuff[i]->data; |
1da177e4 | 1692 | int j; |
ad361c98 | 1693 | printk(KERN_DEBUG "Addr: "); |
1da177e4 LT |
1694 | for (j = 0; j < 0x50; j++) |
1695 | printk(" %4.4x", addr[j]); | |
1696 | printk("\n"); | |
1697 | } | |
1698 | } | |
1699 | } | |
1700 | } | |
1701 | #endif /* __i386__ debugging only */ | |
1702 | ||
0ca0aa08 | 1703 | free_irq(hmp->pci_dev->irq, dev); |
1da177e4 LT |
1704 | |
1705 | del_timer_sync(&hmp->timer); | |
1706 | ||
1707 | /* Free all the skbuffs in the Rx queue. */ | |
1708 | for (i = 0; i < RX_RING_SIZE; i++) { | |
1709 | skb = hmp->rx_skbuff[i]; | |
1710 | hmp->rx_ring[i].status_n_length = 0; | |
1da177e4 | 1711 | if (skb) { |
6aa20a22 | 1712 | pci_unmap_single(hmp->pci_dev, |
8e985918 AV |
1713 | leXX_to_cpu(hmp->rx_ring[i].addr), |
1714 | hmp->rx_buf_sz, PCI_DMA_FROMDEVICE); | |
1da177e4 LT |
1715 | dev_kfree_skb(skb); |
1716 | hmp->rx_skbuff[i] = NULL; | |
1717 | } | |
8e985918 | 1718 | hmp->rx_ring[i].addr = cpu_to_leXX(0xBADF00D0); /* An invalid address. */ |
1da177e4 LT |
1719 | } |
1720 | for (i = 0; i < TX_RING_SIZE; i++) { | |
1721 | skb = hmp->tx_skbuff[i]; | |
1722 | if (skb) { | |
6aa20a22 | 1723 | pci_unmap_single(hmp->pci_dev, |
8e985918 AV |
1724 | leXX_to_cpu(hmp->tx_ring[i].addr), |
1725 | skb->len, PCI_DMA_TODEVICE); | |
1da177e4 LT |
1726 | dev_kfree_skb(skb); |
1727 | hmp->tx_skbuff[i] = NULL; | |
1728 | } | |
1729 | } | |
1730 | ||
1731 | writeb(0x00, ioaddr + LEDCtrl); | |
1732 | ||
1733 | return 0; | |
1734 | } | |
1735 | ||
1736 | static struct net_device_stats *hamachi_get_stats(struct net_device *dev) | |
1737 | { | |
1738 | struct hamachi_private *hmp = netdev_priv(dev); | |
1739 | void __iomem *ioaddr = hmp->base; | |
1740 | ||
1741 | /* We should lock this segment of code for SMP eventually, although | |
1742 | the vulnerability window is very small and statistics are | |
1743 | non-critical. */ | |
1744 | /* Ok, what goes here? This appears to be stuck at 21 packets | |
1745 | according to ifconfig. It does get incremented in hamachi_tx(), | |
1746 | so I think I'll comment it out here and see if better things | |
1747 | happen. | |
6aa20a22 | 1748 | */ |
0b9be50b KV |
1749 | /* dev->stats.tx_packets = readl(ioaddr + 0x000); */ |
1750 | ||
1751 | /* Total Uni+Brd+Multi */ | |
1752 | dev->stats.rx_bytes = readl(ioaddr + 0x330); | |
1753 | /* Total Uni+Brd+Multi */ | |
1754 | dev->stats.tx_bytes = readl(ioaddr + 0x3B0); | |
1755 | /* Multicast Rx */ | |
1756 | dev->stats.multicast = readl(ioaddr + 0x320); | |
1757 | ||
1758 | /* Over+Undersized */ | |
1759 | dev->stats.rx_length_errors = readl(ioaddr + 0x368); | |
1760 | /* Jabber */ | |
1761 | dev->stats.rx_over_errors = readl(ioaddr + 0x35C); | |
1762 | /* Jabber */ | |
1763 | dev->stats.rx_crc_errors = readl(ioaddr + 0x360); | |
1764 | /* Symbol Errs */ | |
1765 | dev->stats.rx_frame_errors = readl(ioaddr + 0x364); | |
1766 | /* Dropped */ | |
1767 | dev->stats.rx_missed_errors = readl(ioaddr + 0x36C); | |
1768 | ||
1769 | return &dev->stats; | |
1da177e4 LT |
1770 | } |
1771 | ||
1772 | static void set_rx_mode(struct net_device *dev) | |
1773 | { | |
1774 | struct hamachi_private *hmp = netdev_priv(dev); | |
1775 | void __iomem *ioaddr = hmp->base; | |
1776 | ||
1777 | if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */ | |
1da177e4 | 1778 | writew(0x000F, ioaddr + AddrMode); |
4cd24eaf | 1779 | } else if ((netdev_mc_count(dev) > 63) || (dev->flags & IFF_ALLMULTI)) { |
1da177e4 LT |
1780 | /* Too many to match, or accept all multicasts. */ |
1781 | writew(0x000B, ioaddr + AddrMode); | |
4cd24eaf | 1782 | } else if (!netdev_mc_empty(dev)) { /* Must use the CAM filter. */ |
22bedad3 | 1783 | struct netdev_hw_addr *ha; |
48e2f183 JP |
1784 | int i = 0; |
1785 | ||
22bedad3 JP |
1786 | netdev_for_each_mc_addr(ha, dev) { |
1787 | writel(*(u32 *)(ha->addr), ioaddr + 0x100 + i*8); | |
1788 | writel(0x20000 | (*(u16 *)&ha->addr[4]), | |
1da177e4 | 1789 | ioaddr + 0x104 + i*8); |
48e2f183 | 1790 | i++; |
1da177e4 LT |
1791 | } |
1792 | /* Clear remaining entries. */ | |
1793 | for (; i < 64; i++) | |
1794 | writel(0, ioaddr + 0x104 + i*8); | |
1795 | writew(0x0003, ioaddr + AddrMode); | |
1796 | } else { /* Normal, unicast/broadcast-only mode. */ | |
1797 | writew(0x0001, ioaddr + AddrMode); | |
1798 | } | |
1799 | } | |
1800 | ||
1801 | static int check_if_running(struct net_device *dev) | |
1802 | { | |
1803 | if (!netif_running(dev)) | |
1804 | return -EINVAL; | |
1805 | return 0; | |
1806 | } | |
1807 | ||
1808 | static void hamachi_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) | |
1809 | { | |
1810 | struct hamachi_private *np = netdev_priv(dev); | |
7826d43f JP |
1811 | |
1812 | strlcpy(info->driver, DRV_NAME, sizeof(info->driver)); | |
1813 | strlcpy(info->version, DRV_VERSION, sizeof(info->version)); | |
1814 | strlcpy(info->bus_info, pci_name(np->pci_dev), sizeof(info->bus_info)); | |
1da177e4 LT |
1815 | } |
1816 | ||
1817 | static int hamachi_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd) | |
1818 | { | |
1819 | struct hamachi_private *np = netdev_priv(dev); | |
1820 | spin_lock_irq(&np->lock); | |
1821 | mii_ethtool_gset(&np->mii_if, ecmd); | |
1822 | spin_unlock_irq(&np->lock); | |
1823 | return 0; | |
1824 | } | |
1825 | ||
1826 | static int hamachi_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd) | |
1827 | { | |
1828 | struct hamachi_private *np = netdev_priv(dev); | |
1829 | int res; | |
1830 | spin_lock_irq(&np->lock); | |
1831 | res = mii_ethtool_sset(&np->mii_if, ecmd); | |
1832 | spin_unlock_irq(&np->lock); | |
1833 | return res; | |
1834 | } | |
1835 | ||
1836 | static int hamachi_nway_reset(struct net_device *dev) | |
1837 | { | |
1838 | struct hamachi_private *np = netdev_priv(dev); | |
1839 | return mii_nway_restart(&np->mii_if); | |
1840 | } | |
1841 | ||
1842 | static u32 hamachi_get_link(struct net_device *dev) | |
1843 | { | |
1844 | struct hamachi_private *np = netdev_priv(dev); | |
1845 | return mii_link_ok(&np->mii_if); | |
1846 | } | |
1847 | ||
7282d491 | 1848 | static const struct ethtool_ops ethtool_ops = { |
1da177e4 LT |
1849 | .begin = check_if_running, |
1850 | .get_drvinfo = hamachi_get_drvinfo, | |
1851 | .get_settings = hamachi_get_settings, | |
1852 | .set_settings = hamachi_set_settings, | |
1853 | .nway_reset = hamachi_nway_reset, | |
1854 | .get_link = hamachi_get_link, | |
1855 | }; | |
1856 | ||
7282d491 | 1857 | static const struct ethtool_ops ethtool_ops_no_mii = { |
1da177e4 LT |
1858 | .begin = check_if_running, |
1859 | .get_drvinfo = hamachi_get_drvinfo, | |
1860 | }; | |
1861 | ||
1862 | static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) | |
1863 | { | |
1864 | struct hamachi_private *np = netdev_priv(dev); | |
1865 | struct mii_ioctl_data *data = if_mii(rq); | |
1866 | int rc; | |
1867 | ||
1868 | if (!netif_running(dev)) | |
1869 | return -EINVAL; | |
1870 | ||
1871 | if (cmd == (SIOCDEVPRIVATE+3)) { /* set rx,tx intr params */ | |
1872 | u32 *d = (u32 *)&rq->ifr_ifru; | |
1873 | /* Should add this check here or an ordinary user can do nasty | |
1874 | * things. -KDU | |
1875 | * | |
1876 | * TODO: Shut down the Rx and Tx engines while doing this. | |
1877 | */ | |
1878 | if (!capable(CAP_NET_ADMIN)) | |
1879 | return -EPERM; | |
1880 | writel(d[0], np->base + TxIntrCtrl); | |
1881 | writel(d[1], np->base + RxIntrCtrl); | |
1882 | printk(KERN_NOTICE "%s: tx %08x, rx %08x intr\n", dev->name, | |
1883 | (u32) readl(np->base + TxIntrCtrl), | |
1884 | (u32) readl(np->base + RxIntrCtrl)); | |
1885 | rc = 0; | |
1886 | } | |
1887 | ||
1888 | else { | |
1889 | spin_lock_irq(&np->lock); | |
1890 | rc = generic_mii_ioctl(&np->mii_if, data, cmd, NULL); | |
1891 | spin_unlock_irq(&np->lock); | |
1892 | } | |
1893 | ||
1894 | return rc; | |
1895 | } | |
1896 | ||
1897 | ||
134c1f15 | 1898 | static void hamachi_remove_one(struct pci_dev *pdev) |
1da177e4 LT |
1899 | { |
1900 | struct net_device *dev = pci_get_drvdata(pdev); | |
1901 | ||
1902 | if (dev) { | |
1903 | struct hamachi_private *hmp = netdev_priv(dev); | |
1904 | ||
6aa20a22 | 1905 | pci_free_consistent(pdev, RX_TOTAL_SIZE, hmp->rx_ring, |
1da177e4 | 1906 | hmp->rx_ring_dma); |
6aa20a22 | 1907 | pci_free_consistent(pdev, TX_TOTAL_SIZE, hmp->tx_ring, |
1da177e4 LT |
1908 | hmp->tx_ring_dma); |
1909 | unregister_netdev(dev); | |
1910 | iounmap(hmp->base); | |
1911 | free_netdev(dev); | |
1912 | pci_release_regions(pdev); | |
1913 | pci_set_drvdata(pdev, NULL); | |
1914 | } | |
1915 | } | |
1916 | ||
a3aa1884 | 1917 | static DEFINE_PCI_DEVICE_TABLE(hamachi_pci_tbl) = { |
1da177e4 LT |
1918 | { 0x1318, 0x0911, PCI_ANY_ID, PCI_ANY_ID, }, |
1919 | { 0, } | |
1920 | }; | |
1921 | MODULE_DEVICE_TABLE(pci, hamachi_pci_tbl); | |
1922 | ||
1923 | static struct pci_driver hamachi_driver = { | |
1924 | .name = DRV_NAME, | |
1925 | .id_table = hamachi_pci_tbl, | |
1926 | .probe = hamachi_init_one, | |
134c1f15 | 1927 | .remove = hamachi_remove_one, |
1da177e4 LT |
1928 | }; |
1929 | ||
1930 | static int __init hamachi_init (void) | |
1931 | { | |
1932 | /* when a module, this is printed whether or not devices are found in probe */ | |
1933 | #ifdef MODULE | |
1934 | printk(version); | |
1935 | #endif | |
1936 | return pci_register_driver(&hamachi_driver); | |
1937 | } | |
1938 | ||
1939 | static void __exit hamachi_exit (void) | |
1940 | { | |
1941 | pci_unregister_driver(&hamachi_driver); | |
1942 | } | |
1943 | ||
1944 | ||
1945 | module_init(hamachi_init); | |
1946 | module_exit(hamachi_exit); |