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net: ethernet: Add helper for MACs which support asym pause
[linux-block.git] / drivers / net / ethernet / microchip / lan743x_main.c
CommitLineData
23f0703c
BW		 1/* SPDX-License-Identifier: GPL-2.0+ */
2/* Copyright (C) 2018 Microchip Technology Inc. */
3
4#include <linux/module.h>
5#include <linux/pci.h>
6#include <linux/netdevice.h>
7#include <linux/etherdevice.h>
8#include <linux/crc32.h>
9#include <linux/microchipphy.h>
10#include <linux/net_tstamp.h>
11#include <linux/phy.h>
12#include <linux/rtnetlink.h>
13#include <linux/iopoll.h>
4d94282a 14#include <linux/crc16.h>
23f0703c 15#include "lan743x_main.h"
0cf63226 16#include "lan743x_ethtool.h"
23f0703c
BW		 17
18static void lan743x_pci_cleanup(struct lan743x_adapter *adapter)
19{
20 pci_release_selected_regions(adapter->pdev,
21 pci_select_bars(adapter->pdev,
22 IORESOURCE_MEM));
23 pci_disable_device(adapter->pdev);
24}
25
26static int lan743x_pci_init(struct lan743x_adapter *adapter,
27 struct pci_dev *pdev)
28{
29 unsigned long bars = 0;
30 int ret;
31
32 adapter->pdev = pdev;
33 ret = pci_enable_device_mem(pdev);
34 if (ret)
35 goto return_error;
36
37 netif_info(adapter, probe, adapter->netdev,
38 "PCI: Vendor ID = 0x%04X, Device ID = 0x%04X\n",
39 pdev->vendor, pdev->device);
40 bars = pci_select_bars(pdev, IORESOURCE_MEM);
41 if (!test_bit(0, &bars))
42 goto disable_device;
43
44 ret = pci_request_selected_regions(pdev, bars, DRIVER_NAME);
45 if (ret)
46 goto disable_device;
47
48 pci_set_master(pdev);
49 return 0;
50
51disable_device:
52 pci_disable_device(adapter->pdev);
53
54return_error:
55 return ret;
56}
57
8114e8a2 58u32 lan743x_csr_read(struct lan743x_adapter *adapter, int offset)
23f0703c
BW		 59{
60 return ioread32(&adapter->csr.csr_address[offset]);
61}
62
8114e8a2
BW		 63void lan743x_csr_write(struct lan743x_adapter *adapter, int offset,
64 u32 data)
23f0703c
BW		 65{
66 iowrite32(data, &adapter->csr.csr_address[offset]);
67}
68
69#define LAN743X_CSR_READ_OP(offset) lan743x_csr_read(adapter, offset)
70
71static int lan743x_csr_light_reset(struct lan743x_adapter *adapter)
72{
73 u32 data;
74
75 data = lan743x_csr_read(adapter, HW_CFG);
76 data |= HW_CFG_LRST_;
77 lan743x_csr_write(adapter, HW_CFG, data);
78
79 return readx_poll_timeout(LAN743X_CSR_READ_OP, HW_CFG, data,
80 !(data & HW_CFG_LRST_), 100000, 10000000);
81}
82
83static int lan743x_csr_wait_for_bit(struct lan743x_adapter *adapter,
84 int offset, u32 bit_mask,
85 int target_value, int usleep_min,
86 int usleep_max, int count)
87{
88 u32 data;
89
90 return readx_poll_timeout(LAN743X_CSR_READ_OP, offset, data,
91 target_value == ((data & bit_mask) ? 1 : 0),
92 usleep_max, usleep_min * count);
93}
94
95static int lan743x_csr_init(struct lan743x_adapter *adapter)
96{
97 struct lan743x_csr *csr = &adapter->csr;
98 resource_size_t bar_start, bar_length;
99 int result;
100
101 bar_start = pci_resource_start(adapter->pdev, 0);
102 bar_length = pci_resource_len(adapter->pdev, 0);
103 csr->csr_address = devm_ioremap(&adapter->pdev->dev,
104 bar_start, bar_length);
105 if (!csr->csr_address) {
106 result = -ENOMEM;
107 goto clean_up;
108 }
109
110 csr->id_rev = lan743x_csr_read(adapter, ID_REV);
111 csr->fpga_rev = lan743x_csr_read(adapter, FPGA_REV);
112 netif_info(adapter, probe, adapter->netdev,
113 "ID_REV = 0x%08X, FPGA_REV = %d.%d\n",
114 csr->id_rev, FPGA_REV_GET_MAJOR_(csr->fpga_rev),
115 FPGA_REV_GET_MINOR_(csr->fpga_rev));
116 if (!ID_REV_IS_VALID_CHIP_ID_(csr->id_rev)) {
117 result = -ENODEV;
118 goto clean_up;
119 }
120
121 csr->flags = LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR;
122 switch (csr->id_rev & ID_REV_CHIP_REV_MASK_) {
123 case ID_REV_CHIP_REV_A0_:
124 csr->flags |= LAN743X_CSR_FLAG_IS_A0;
125 csr->flags &= ~LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR;
126 break;
127 case ID_REV_CHIP_REV_B0_:
128 csr->flags |= LAN743X_CSR_FLAG_IS_B0;
129 break;
130 }
131
132 result = lan743x_csr_light_reset(adapter);
133 if (result)
134 goto clean_up;
135 return 0;
136clean_up:
137 return result;
138}
139
140static void lan743x_intr_software_isr(void *context)
141{
142 struct lan743x_adapter *adapter = context;
143 struct lan743x_intr *intr = &adapter->intr;
144 u32 int_sts;
145
146 int_sts = lan743x_csr_read(adapter, INT_STS);
147 if (int_sts & INT_BIT_SW_GP_) {
148 lan743x_csr_write(adapter, INT_STS, INT_BIT_SW_GP_);
149 intr->software_isr_flag = 1;
150 }
151}
152
153static void lan743x_tx_isr(void *context, u32 int_sts, u32 flags)
154{
155 struct lan743x_tx *tx = context;
156 struct lan743x_adapter *adapter = tx->adapter;
157 bool enable_flag = true;
158 u32 int_en = 0;
159
160 int_en = lan743x_csr_read(adapter, INT_EN_SET);
161 if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR) {
162 lan743x_csr_write(adapter, INT_EN_CLR,
163 INT_BIT_DMA_TX_(tx->channel_number));
164 }
165
166 if (int_sts & INT_BIT_DMA_TX_(tx->channel_number)) {
167 u32 ioc_bit = DMAC_INT_BIT_TX_IOC_(tx->channel_number);
168 u32 dmac_int_sts;
169 u32 dmac_int_en;
170
171 if (flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ)
172 dmac_int_sts = lan743x_csr_read(adapter, DMAC_INT_STS);
173 else
174 dmac_int_sts = ioc_bit;
175 if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK)
176 dmac_int_en = lan743x_csr_read(adapter,
177 DMAC_INT_EN_SET);
178 else
179 dmac_int_en = ioc_bit;
180
181 dmac_int_en &= ioc_bit;
182 dmac_int_sts &= dmac_int_en;
183 if (dmac_int_sts & ioc_bit) {
184 napi_schedule(&tx->napi);
185 enable_flag = false;/* poll func will enable later */
186 }
187 }
188
189 if (enable_flag)
190 /* enable isr */
191 lan743x_csr_write(adapter, INT_EN_SET,
192 INT_BIT_DMA_TX_(tx->channel_number));
193}
194
195static void lan743x_rx_isr(void *context, u32 int_sts, u32 flags)
196{
197 struct lan743x_rx *rx = context;
198 struct lan743x_adapter *adapter = rx->adapter;
199 bool enable_flag = true;
200
201 if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR) {
202 lan743x_csr_write(adapter, INT_EN_CLR,
203 INT_BIT_DMA_RX_(rx->channel_number));
204 }
205
206 if (int_sts & INT_BIT_DMA_RX_(rx->channel_number)) {
207 u32 rx_frame_bit = DMAC_INT_BIT_RXFRM_(rx->channel_number);
208 u32 dmac_int_sts;
209 u32 dmac_int_en;
210
211 if (flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ)
212 dmac_int_sts = lan743x_csr_read(adapter, DMAC_INT_STS);
213 else
214 dmac_int_sts = rx_frame_bit;
215 if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK)
216 dmac_int_en = lan743x_csr_read(adapter,
217 DMAC_INT_EN_SET);
218 else
219 dmac_int_en = rx_frame_bit;
220
221 dmac_int_en &= rx_frame_bit;
222 dmac_int_sts &= dmac_int_en;
223 if (dmac_int_sts & rx_frame_bit) {
224 napi_schedule(&rx->napi);
225 enable_flag = false;/* poll funct will enable later */
226 }
227 }
228
229 if (enable_flag) {
230 /* enable isr */
231 lan743x_csr_write(adapter, INT_EN_SET,
232 INT_BIT_DMA_RX_(rx->channel_number));
233 }
234}
235
236static void lan743x_intr_shared_isr(void *context, u32 int_sts, u32 flags)
237{
238 struct lan743x_adapter *adapter = context;
239 unsigned int channel;
240
241 if (int_sts & INT_BIT_ALL_RX_) {
242 for (channel = 0; channel < LAN743X_USED_RX_CHANNELS;
243 channel++) {
244 u32 int_bit = INT_BIT_DMA_RX_(channel);
245
246 if (int_sts & int_bit) {
247 lan743x_rx_isr(&adapter->rx[channel],
248 int_bit, flags);
249 int_sts &= ~int_bit;
250 }
251 }
252 }
253 if (int_sts & INT_BIT_ALL_TX_) {
254 for (channel = 0; channel < LAN743X_USED_TX_CHANNELS;
255 channel++) {
256 u32 int_bit = INT_BIT_DMA_TX_(channel);
257
258 if (int_sts & int_bit) {
259 lan743x_tx_isr(&adapter->tx[channel],
260 int_bit, flags);
261 int_sts &= ~int_bit;
262 }
263 }
264 }
265 if (int_sts & INT_BIT_ALL_OTHER_) {
266 if (int_sts & INT_BIT_SW_GP_) {
267 lan743x_intr_software_isr(adapter);
268 int_sts &= ~INT_BIT_SW_GP_;
269 }
07624df1
BW		 270 if (int_sts & INT_BIT_1588_) {
271 lan743x_ptp_isr(adapter);
272 int_sts &= ~INT_BIT_1588_;
273 }
23f0703c
BW		 274 }
275 if (int_sts)
276 lan743x_csr_write(adapter, INT_EN_CLR, int_sts);
277}
278
279static irqreturn_t lan743x_intr_entry_isr(int irq, void *ptr)
280{
281 struct lan743x_vector *vector = ptr;
282 struct lan743x_adapter *adapter = vector->adapter;
283 irqreturn_t result = IRQ_NONE;
284 u32 int_enables;
285 u32 int_sts;
286
287 if (vector->flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ) {
288 int_sts = lan743x_csr_read(adapter, INT_STS);
289 } else if (vector->flags &
290 (LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C |
291 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C)) {
292 int_sts = lan743x_csr_read(adapter, INT_STS_R2C);
293 } else {
294 /* use mask as implied status */
295 int_sts = vector->int_mask | INT_BIT_MAS_;
296 }
297
298 if (!(int_sts & INT_BIT_MAS_))
299 goto irq_done;
300
301 if (vector->flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR)
302 /* disable vector interrupt */
303 lan743x_csr_write(adapter,
304 INT_VEC_EN_CLR,
305 INT_VEC_EN_(vector->vector_index));
306
307 if (vector->flags & LAN743X_VECTOR_FLAG_MASTER_ENABLE_CLEAR)
308 /* disable master interrupt */
309 lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_MAS_);
310
311 if (vector->flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK) {
312 int_enables = lan743x_csr_read(adapter, INT_EN_SET);
313 } else {
314 /* use vector mask as implied enable mask */
315 int_enables = vector->int_mask;
316 }
317
318 int_sts &= int_enables;
319 int_sts &= vector->int_mask;
320 if (int_sts) {
321 if (vector->handler) {
322 vector->handler(vector->context,
323 int_sts, vector->flags);
324 } else {
325 /* disable interrupts on this vector */
326 lan743x_csr_write(adapter, INT_EN_CLR,
327 vector->int_mask);
328 }
329 result = IRQ_HANDLED;
330 }
331
332 if (vector->flags & LAN743X_VECTOR_FLAG_MASTER_ENABLE_SET)
333 /* enable master interrupt */
334 lan743x_csr_write(adapter, INT_EN_SET, INT_BIT_MAS_);
335
336 if (vector->flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET)
337 /* enable vector interrupt */
338 lan743x_csr_write(adapter,
339 INT_VEC_EN_SET,
340 INT_VEC_EN_(vector->vector_index));
341irq_done:
342 return result;
343}
344
345static int lan743x_intr_test_isr(struct lan743x_adapter *adapter)
346{
347 struct lan743x_intr *intr = &adapter->intr;
348 int result = -ENODEV;
349 int timeout = 10;
350
351 intr->software_isr_flag = 0;
352
353 /* enable interrupt */
354 lan743x_csr_write(adapter, INT_EN_SET, INT_BIT_SW_GP_);
355
356 /* activate interrupt here */
357 lan743x_csr_write(adapter, INT_SET, INT_BIT_SW_GP_);
358 while ((timeout > 0) && (!(intr->software_isr_flag))) {
359 usleep_range(1000, 20000);
360 timeout--;
361 }
362
363 if (intr->software_isr_flag)
364 result = 0;
365
366 /* disable interrupts */
367 lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_SW_GP_);
368 return result;
369}
370
371static int lan743x_intr_register_isr(struct lan743x_adapter *adapter,
372 int vector_index, u32 flags,
373 u32 int_mask,
374 lan743x_vector_handler handler,
375 void *context)
376{
377 struct lan743x_vector *vector = &adapter->intr.vector_list
378 [vector_index];
379 int ret;
380
381 vector->adapter = adapter;
382 vector->flags = flags;
383 vector->vector_index = vector_index;
384 vector->int_mask = int_mask;
385 vector->handler = handler;
386 vector->context = context;
387
388 ret = request_irq(vector->irq,
389 lan743x_intr_entry_isr,
390 (flags & LAN743X_VECTOR_FLAG_IRQ_SHARED) ?
391 IRQF_SHARED : 0, DRIVER_NAME, vector);
392 if (ret) {
393 vector->handler = NULL;
394 vector->context = NULL;
395 vector->int_mask = 0;
396 vector->flags = 0;
397 }
398 return ret;
399}
400
401static void lan743x_intr_unregister_isr(struct lan743x_adapter *adapter,
402 int vector_index)
403{
404 struct lan743x_vector *vector = &adapter->intr.vector_list
405 [vector_index];
406
407 free_irq(vector->irq, vector);
408 vector->handler = NULL;
409 vector->context = NULL;
410 vector->int_mask = 0;
411 vector->flags = 0;
412}
413
414static u32 lan743x_intr_get_vector_flags(struct lan743x_adapter *adapter,
415 u32 int_mask)
416{
417 int index;
418
419 for (index = 0; index < LAN743X_MAX_VECTOR_COUNT; index++) {
420 if (adapter->intr.vector_list[index].int_mask & int_mask)
421 return adapter->intr.vector_list[index].flags;
422 }
423 return 0;
424}
425
426static void lan743x_intr_close(struct lan743x_adapter *adapter)
427{
428 struct lan743x_intr *intr = &adapter->intr;
429 int index = 0;
430
431 lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_MAS_);
432 lan743x_csr_write(adapter, INT_VEC_EN_CLR, 0x000000FF);
433
434 for (index = 0; index < LAN743X_MAX_VECTOR_COUNT; index++) {
435 if (intr->flags & INTR_FLAG_IRQ_REQUESTED(index)) {
436 lan743x_intr_unregister_isr(adapter, index);
437 intr->flags &= ~INTR_FLAG_IRQ_REQUESTED(index);
438 }
439 }
440
441 if (intr->flags & INTR_FLAG_MSI_ENABLED) {
442 pci_disable_msi(adapter->pdev);
443 intr->flags &= ~INTR_FLAG_MSI_ENABLED;
444 }
445
446 if (intr->flags & INTR_FLAG_MSIX_ENABLED) {
447 pci_disable_msix(adapter->pdev);
448 intr->flags &= ~INTR_FLAG_MSIX_ENABLED;
449 }
450}
451
452static int lan743x_intr_open(struct lan743x_adapter *adapter)
453{
454 struct msix_entry msix_entries[LAN743X_MAX_VECTOR_COUNT];
455 struct lan743x_intr *intr = &adapter->intr;
456 u32 int_vec_en_auto_clr = 0;
457 u32 int_vec_map0 = 0;
458 u32 int_vec_map1 = 0;
459 int ret = -ENODEV;
460 int index = 0;
461 u32 flags = 0;
462
463 intr->number_of_vectors = 0;
464
465 /* Try to set up MSIX interrupts */
466 memset(&msix_entries[0], 0,
467 sizeof(struct msix_entry) * LAN743X_MAX_VECTOR_COUNT);
468 for (index = 0; index < LAN743X_MAX_VECTOR_COUNT; index++)
469 msix_entries[index].entry = index;
470 ret = pci_enable_msix_range(adapter->pdev,
471 msix_entries, 1,
472 1 + LAN743X_USED_TX_CHANNELS +
473 LAN743X_USED_RX_CHANNELS);
474
475 if (ret > 0) {
476 intr->flags |= INTR_FLAG_MSIX_ENABLED;
477 intr->number_of_vectors = ret;
478 intr->using_vectors = true;
479 for (index = 0; index < intr->number_of_vectors; index++)
480 intr->vector_list[index].irq = msix_entries
481 [index].vector;
482 netif_info(adapter, ifup, adapter->netdev,
483 "using MSIX interrupts, number of vectors = %d\n",
484 intr->number_of_vectors);
485 }
486
487 /* If MSIX failed try to setup using MSI interrupts */
488 if (!intr->number_of_vectors) {
489 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) {
490 if (!pci_enable_msi(adapter->pdev)) {
491 intr->flags |= INTR_FLAG_MSI_ENABLED;
492 intr->number_of_vectors = 1;
493 intr->using_vectors = true;
494 intr->vector_list[0].irq =
495 adapter->pdev->irq;
496 netif_info(adapter, ifup, adapter->netdev,
497 "using MSI interrupts, number of vectors = %d\n",
498 intr->number_of_vectors);
499 }
500 }
501 }
502
503 /* If MSIX, and MSI failed, setup using legacy interrupt */
504 if (!intr->number_of_vectors) {
505 intr->number_of_vectors = 1;
506 intr->using_vectors = false;
507 intr->vector_list[0].irq = intr->irq;
508 netif_info(adapter, ifup, adapter->netdev,
509 "using legacy interrupts\n");
510 }
511
512 /* At this point we must have at least one irq */
513 lan743x_csr_write(adapter, INT_VEC_EN_CLR, 0xFFFFFFFF);
514
515 /* map all interrupts to vector 0 */
516 lan743x_csr_write(adapter, INT_VEC_MAP0, 0x00000000);
517 lan743x_csr_write(adapter, INT_VEC_MAP1, 0x00000000);
518 lan743x_csr_write(adapter, INT_VEC_MAP2, 0x00000000);
519 flags = LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ |
520 LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C |
521 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK |
522 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR;
523
524 if (intr->using_vectors) {
525 flags |= LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR |
526 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET;
527 } else {
528 flags |= LAN743X_VECTOR_FLAG_MASTER_ENABLE_CLEAR |
529 LAN743X_VECTOR_FLAG_MASTER_ENABLE_SET |
530 LAN743X_VECTOR_FLAG_IRQ_SHARED;
531 }
532
533 if (adapter->csr.flags & LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR) {
534 flags &= ~LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ;
535 flags &= ~LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C;
536 flags &= ~LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR;
537 flags &= ~LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK;
538 flags |= LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C;
539 flags |= LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C;
540 }
541
542 ret = lan743x_intr_register_isr(adapter, 0, flags,
543 INT_BIT_ALL_RX_ | INT_BIT_ALL_TX_ |
544 INT_BIT_ALL_OTHER_,
545 lan743x_intr_shared_isr, adapter);
546 if (ret)
547 goto clean_up;
548 intr->flags |= INTR_FLAG_IRQ_REQUESTED(0);
549
550 if (intr->using_vectors)
551 lan743x_csr_write(adapter, INT_VEC_EN_SET,
552 INT_VEC_EN_(0));
553
554 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) {
555 lan743x_csr_write(adapter, INT_MOD_CFG0, LAN743X_INT_MOD);
556 lan743x_csr_write(adapter, INT_MOD_CFG1, LAN743X_INT_MOD);
557 lan743x_csr_write(adapter, INT_MOD_CFG2, LAN743X_INT_MOD);
558 lan743x_csr_write(adapter, INT_MOD_CFG3, LAN743X_INT_MOD);
559 lan743x_csr_write(adapter, INT_MOD_CFG4, LAN743X_INT_MOD);
560 lan743x_csr_write(adapter, INT_MOD_CFG5, LAN743X_INT_MOD);
561 lan743x_csr_write(adapter, INT_MOD_CFG6, LAN743X_INT_MOD);
562 lan743x_csr_write(adapter, INT_MOD_CFG7, LAN743X_INT_MOD);
563 lan743x_csr_write(adapter, INT_MOD_MAP0, 0x00005432);
564 lan743x_csr_write(adapter, INT_MOD_MAP1, 0x00000001);
565 lan743x_csr_write(adapter, INT_MOD_MAP2, 0x00FFFFFF);
566 }
567
568 /* enable interrupts */
569 lan743x_csr_write(adapter, INT_EN_SET, INT_BIT_MAS_);
570 ret = lan743x_intr_test_isr(adapter);
571 if (ret)
572 goto clean_up;
573
574 if (intr->number_of_vectors > 1) {
575 int number_of_tx_vectors = intr->number_of_vectors - 1;
576
577 if (number_of_tx_vectors > LAN743X_USED_TX_CHANNELS)
578 number_of_tx_vectors = LAN743X_USED_TX_CHANNELS;
579 flags = LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ |
580 LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C |
581 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK |
582 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR |
583 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR |
584 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET;
585
586 if (adapter->csr.flags &
587 LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR) {
588 flags = LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_CLEAR |
589 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET |
590 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET |
591 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR |
592 LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR;
593 }
594
595 for (index = 0; index < number_of_tx_vectors; index++) {
596 u32 int_bit = INT_BIT_DMA_TX_(index);
597 int vector = index + 1;
598
599 /* map TX interrupt to vector */
600 int_vec_map1 |= INT_VEC_MAP1_TX_VEC_(index, vector);
601 lan743x_csr_write(adapter, INT_VEC_MAP1, int_vec_map1);
602 if (flags &
603 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_CLEAR) {
604 int_vec_en_auto_clr |= INT_VEC_EN_(vector);
605 lan743x_csr_write(adapter, INT_VEC_EN_AUTO_CLR,
606 int_vec_en_auto_clr);
607 }
608
609 /* Remove TX interrupt from shared mask */
610 intr->vector_list[0].int_mask &= ~int_bit;
611 ret = lan743x_intr_register_isr(adapter, vector, flags,
612 int_bit, lan743x_tx_isr,
613 &adapter->tx[index]);
614 if (ret)
615 goto clean_up;
616 intr->flags |= INTR_FLAG_IRQ_REQUESTED(vector);
617 if (!(flags &
618 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET))
619 lan743x_csr_write(adapter, INT_VEC_EN_SET,
620 INT_VEC_EN_(vector));
621 }
622 }
623 if ((intr->number_of_vectors - LAN743X_USED_TX_CHANNELS) > 1) {
624 int number_of_rx_vectors = intr->number_of_vectors -
625 LAN743X_USED_TX_CHANNELS - 1;
626
627 if (number_of_rx_vectors > LAN743X_USED_RX_CHANNELS)
628 number_of_rx_vectors = LAN743X_USED_RX_CHANNELS;
629
630 flags = LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ |
631 LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C |
632 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK |
633 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR |
634 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR |
635 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET;
636
637 if (adapter->csr.flags &
638 LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR) {
639 flags = LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_CLEAR |
640 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET |
641 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET |
642 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR |
643 LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR;
644 }
645 for (index = 0; index < number_of_rx_vectors; index++) {
646 int vector = index + 1 + LAN743X_USED_TX_CHANNELS;
647 u32 int_bit = INT_BIT_DMA_RX_(index);
648
649 /* map RX interrupt to vector */
650 int_vec_map0 |= INT_VEC_MAP0_RX_VEC_(index, vector);
651 lan743x_csr_write(adapter, INT_VEC_MAP0, int_vec_map0);
652 if (flags &
653 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_CLEAR) {
654 int_vec_en_auto_clr |= INT_VEC_EN_(vector);
655 lan743x_csr_write(adapter, INT_VEC_EN_AUTO_CLR,
656 int_vec_en_auto_clr);
657 }
658
659 /* Remove RX interrupt from shared mask */
660 intr->vector_list[0].int_mask &= ~int_bit;
661 ret = lan743x_intr_register_isr(adapter, vector, flags,
662 int_bit, lan743x_rx_isr,
663 &adapter->rx[index]);
664 if (ret)
665 goto clean_up;
666 intr->flags |= INTR_FLAG_IRQ_REQUESTED(vector);
667
668 lan743x_csr_write(adapter, INT_VEC_EN_SET,
669 INT_VEC_EN_(vector));
670 }
671 }
672 return 0;
673
674clean_up:
675 lan743x_intr_close(adapter);
676 return ret;
677}
678
679static int lan743x_dp_write(struct lan743x_adapter *adapter,
680 u32 select, u32 addr, u32 length, u32 *buf)
681{
682 int ret = -EIO;
683 u32 dp_sel;
684 int i;
685
686 mutex_lock(&adapter->dp_lock);
687 if (lan743x_csr_wait_for_bit(adapter, DP_SEL, DP_SEL_DPRDY_,
688 1, 40, 100, 100))
689 goto unlock;
690 dp_sel = lan743x_csr_read(adapter, DP_SEL);
691 dp_sel &= ~DP_SEL_MASK_;
692 dp_sel |= select;
693 lan743x_csr_write(adapter, DP_SEL, dp_sel);
694
695 for (i = 0; i < length; i++) {
696 lan743x_csr_write(adapter, DP_ADDR, addr + i);
697 lan743x_csr_write(adapter, DP_DATA_0, buf[i]);
698 lan743x_csr_write(adapter, DP_CMD, DP_CMD_WRITE_);
699 if (lan743x_csr_wait_for_bit(adapter, DP_SEL, DP_SEL_DPRDY_,
700 1, 40, 100, 100))
701 goto unlock;
702 }
703 ret = 0;
704
705unlock:
706 mutex_unlock(&adapter->dp_lock);
707 return ret;
708}
709
710static u32 lan743x_mac_mii_access(u16 id, u16 index, int read)
711{
712 u32 ret;
713
714 ret = (id << MAC_MII_ACC_PHY_ADDR_SHIFT_) &
715 MAC_MII_ACC_PHY_ADDR_MASK_;
716 ret |= (index << MAC_MII_ACC_MIIRINDA_SHIFT_) &
717 MAC_MII_ACC_MIIRINDA_MASK_;
718
719 if (read)
720 ret |= MAC_MII_ACC_MII_READ_;
721 else
722 ret |= MAC_MII_ACC_MII_WRITE_;
723 ret |= MAC_MII_ACC_MII_BUSY_;
724
725 return ret;
726}
727
728static int lan743x_mac_mii_wait_till_not_busy(struct lan743x_adapter *adapter)
729{
730 u32 data;
731
732 return readx_poll_timeout(LAN743X_CSR_READ_OP, MAC_MII_ACC, data,
733 !(data & MAC_MII_ACC_MII_BUSY_), 0, 1000000);
734}
735
736static int lan743x_mdiobus_read(struct mii_bus *bus, int phy_id, int index)
737{
738 struct lan743x_adapter *adapter = bus->priv;
739 u32 val, mii_access;
740 int ret;
741
742 /* comfirm MII not busy */
743 ret = lan743x_mac_mii_wait_till_not_busy(adapter);
744 if (ret < 0)
745 return ret;
746
747 /* set the address, index & direction (read from PHY) */
748 mii_access = lan743x_mac_mii_access(phy_id, index, MAC_MII_READ);
749 lan743x_csr_write(adapter, MAC_MII_ACC, mii_access);
750 ret = lan743x_mac_mii_wait_till_not_busy(adapter);
751 if (ret < 0)
752 return ret;
753
754 val = lan743x_csr_read(adapter, MAC_MII_DATA);
755 return (int)(val & 0xFFFF);
756}
757
758static int lan743x_mdiobus_write(struct mii_bus *bus,
759 int phy_id, int index, u16 regval)
760{
761 struct lan743x_adapter *adapter = bus->priv;
762 u32 val, mii_access;
763 int ret;
764
765 /* confirm MII not busy */
766 ret = lan743x_mac_mii_wait_till_not_busy(adapter);
767 if (ret < 0)
768 return ret;
769 val = (u32)regval;
770 lan743x_csr_write(adapter, MAC_MII_DATA, val);
771
772 /* set the address, index & direction (write to PHY) */
773 mii_access = lan743x_mac_mii_access(phy_id, index, MAC_MII_WRITE);
774 lan743x_csr_write(adapter, MAC_MII_ACC, mii_access);
775 ret = lan743x_mac_mii_wait_till_not_busy(adapter);
776 return ret;
777}
778
779static void lan743x_mac_set_address(struct lan743x_adapter *adapter,
780 u8 *addr)
781{
782 u32 addr_lo, addr_hi;
783
784 addr_lo = addr[0] |
785 addr[1] << 8 |
786 addr[2] << 16 |
787 addr[3] << 24;
788 addr_hi = addr[4] |
789 addr[5] << 8;
790 lan743x_csr_write(adapter, MAC_RX_ADDRL, addr_lo);
791 lan743x_csr_write(adapter, MAC_RX_ADDRH, addr_hi);
792
793 ether_addr_copy(adapter->mac_address, addr);
794 netif_info(adapter, drv, adapter->netdev,
795 "MAC address set to %pM\n", addr);
796}
797
798static int lan743x_mac_init(struct lan743x_adapter *adapter)
799{
800 bool mac_address_valid = true;
801 struct net_device *netdev;
802 u32 mac_addr_hi = 0;
803 u32 mac_addr_lo = 0;
804 u32 data;
805 int ret;
806
807 netdev = adapter->netdev;
808 lan743x_csr_write(adapter, MAC_CR, MAC_CR_RST_);
809 ret = lan743x_csr_wait_for_bit(adapter, MAC_CR, MAC_CR_RST_,
810 0, 1000, 20000, 100);
811 if (ret)
812 return ret;
813
814 /* setup auto duplex, and speed detection */
815 data = lan743x_csr_read(adapter, MAC_CR);
816 data |= MAC_CR_ADD_ | MAC_CR_ASD_;
817 data |= MAC_CR_CNTR_RST_;
818 lan743x_csr_write(adapter, MAC_CR, data);
819
820 mac_addr_hi = lan743x_csr_read(adapter, MAC_RX_ADDRH);
821 mac_addr_lo = lan743x_csr_read(adapter, MAC_RX_ADDRL);
822 adapter->mac_address[0] = mac_addr_lo & 0xFF;
823 adapter->mac_address[1] = (mac_addr_lo >> 8) & 0xFF;
824 adapter->mac_address[2] = (mac_addr_lo >> 16) & 0xFF;
825 adapter->mac_address[3] = (mac_addr_lo >> 24) & 0xFF;
826 adapter->mac_address[4] = mac_addr_hi & 0xFF;
827 adapter->mac_address[5] = (mac_addr_hi >> 8) & 0xFF;
828
829 if (((mac_addr_hi & 0x0000FFFF) == 0x0000FFFF) &&
830 mac_addr_lo == 0xFFFFFFFF) {
831 mac_address_valid = false;
832 } else if (!is_valid_ether_addr(adapter->mac_address)) {
833 mac_address_valid = false;
834 }
835
836 if (!mac_address_valid)
6c1f0a1f 837 eth_random_addr(adapter->mac_address);
23f0703c
BW		 838 lan743x_mac_set_address(adapter, adapter->mac_address);
839 ether_addr_copy(netdev->dev_addr, adapter->mac_address);
840 return 0;
841}
842
843static int lan743x_mac_open(struct lan743x_adapter *adapter)
844{
845 int ret = 0;
846 u32 temp;
847
848 temp = lan743x_csr_read(adapter, MAC_RX);
849 lan743x_csr_write(adapter, MAC_RX, temp | MAC_RX_RXEN_);
850 temp = lan743x_csr_read(adapter, MAC_TX);
851 lan743x_csr_write(adapter, MAC_TX, temp | MAC_TX_TXEN_);
852 return ret;
853}
854
855static void lan743x_mac_close(struct lan743x_adapter *adapter)
856{
857 u32 temp;
858
859 temp = lan743x_csr_read(adapter, MAC_TX);
860 temp &= ~MAC_TX_TXEN_;
861 lan743x_csr_write(adapter, MAC_TX, temp);
862 lan743x_csr_wait_for_bit(adapter, MAC_TX, MAC_TX_TXD_,
863 1, 1000, 20000, 100);
864
865 temp = lan743x_csr_read(adapter, MAC_RX);
866 temp &= ~MAC_RX_RXEN_;
867 lan743x_csr_write(adapter, MAC_RX, temp);
868 lan743x_csr_wait_for_bit(adapter, MAC_RX, MAC_RX_RXD_,
869 1, 1000, 20000, 100);
870}
871
872static void lan743x_mac_flow_ctrl_set_enables(struct lan743x_adapter *adapter,
873 bool tx_enable, bool rx_enable)
874{
875 u32 flow_setting = 0;
876
877 /* set maximum pause time because when fifo space frees
878 * up a zero value pause frame will be sent to release the pause
879 */
880 flow_setting = MAC_FLOW_CR_FCPT_MASK_;
881 if (tx_enable)
882 flow_setting |= MAC_FLOW_CR_TX_FCEN_;
883 if (rx_enable)
884 flow_setting |= MAC_FLOW_CR_RX_FCEN_;
885 lan743x_csr_write(adapter, MAC_FLOW, flow_setting);
886}
887
888static int lan743x_mac_set_mtu(struct lan743x_adapter *adapter, int new_mtu)
889{
890 int enabled = 0;
891 u32 mac_rx = 0;
892
893 mac_rx = lan743x_csr_read(adapter, MAC_RX);
894 if (mac_rx & MAC_RX_RXEN_) {
895 enabled = 1;
896 if (mac_rx & MAC_RX_RXD_) {
897 lan743x_csr_write(adapter, MAC_RX, mac_rx);
898 mac_rx &= ~MAC_RX_RXD_;
899 }
900 mac_rx &= ~MAC_RX_RXEN_;
901 lan743x_csr_write(adapter, MAC_RX, mac_rx);
902 lan743x_csr_wait_for_bit(adapter, MAC_RX, MAC_RX_RXD_,
903 1, 1000, 20000, 100);
904 lan743x_csr_write(adapter, MAC_RX, mac_rx | MAC_RX_RXD_);
905 }
906
907 mac_rx &= ~(MAC_RX_MAX_SIZE_MASK_);
908 mac_rx |= (((new_mtu + ETH_HLEN + 4) << MAC_RX_MAX_SIZE_SHIFT_) &
909 MAC_RX_MAX_SIZE_MASK_);
910 lan743x_csr_write(adapter, MAC_RX, mac_rx);
911
912 if (enabled) {
913 mac_rx |= MAC_RX_RXEN_;
914 lan743x_csr_write(adapter, MAC_RX, mac_rx);
915 }
916 return 0;
917}
918
919/* PHY */
920static int lan743x_phy_reset(struct lan743x_adapter *adapter)
921{
922 u32 data;
923
924 /* Only called with in probe, and before mdiobus_register */
925
926 data = lan743x_csr_read(adapter, PMT_CTL);
927 data |= PMT_CTL_ETH_PHY_RST_;
928 lan743x_csr_write(adapter, PMT_CTL, data);
929
930 return readx_poll_timeout(LAN743X_CSR_READ_OP, PMT_CTL, data,
931 (!(data & PMT_CTL_ETH_PHY_RST_) &&
932 (data & PMT_CTL_READY_)),
933 50000, 1000000);
934}
935
936static void lan743x_phy_update_flowcontrol(struct lan743x_adapter *adapter,
937 u8 duplex, u16 local_adv,
938 u16 remote_adv)
939{
940 struct lan743x_phy *phy = &adapter->phy;
941 u8 cap;
942
943 if (phy->fc_autoneg)
944 cap = mii_resolve_flowctrl_fdx(local_adv, remote_adv);
945 else
946 cap = phy->fc_request_control;
947
948 lan743x_mac_flow_ctrl_set_enables(adapter,
949 cap & FLOW_CTRL_TX,
950 cap & FLOW_CTRL_RX);
951}
952
953static int lan743x_phy_init(struct lan743x_adapter *adapter)
954{
8e8af97a 955 return lan743x_phy_reset(adapter);
23f0703c
BW		 956}
957
958static void lan743x_phy_link_status_change(struct net_device *netdev)
959{
960 struct lan743x_adapter *adapter = netdev_priv(netdev);
961 struct phy_device *phydev = netdev->phydev;
962
963 phy_print_status(phydev);
964 if (phydev->state == PHY_RUNNING) {
965 struct ethtool_link_ksettings ksettings;
23f0703c
BW		 966 int remote_advertisement = 0;
967 int local_advertisement = 0;
968
23f0703c
BW		 969 memset(&ksettings, 0, sizeof(ksettings));
970 phy_ethtool_get_link_ksettings(netdev, &ksettings);
971 local_advertisement = phy_read(phydev, MII_ADVERTISE);
972 if (local_advertisement < 0)
973 return;
974
975 remote_advertisement = phy_read(phydev, MII_LPA);
976 if (remote_advertisement < 0)
977 return;
978
979 lan743x_phy_update_flowcontrol(adapter,
980 ksettings.base.duplex,
981 local_advertisement,
982 remote_advertisement);
07624df1 983 lan743x_ptp_update_latency(adapter, ksettings.base.speed);
23f0703c
BW		 984 }
985}
986
987static void lan743x_phy_close(struct lan743x_adapter *adapter)
988{
989 struct net_device *netdev = adapter->netdev;
990
991 phy_stop(netdev->phydev);
992 phy_disconnect(netdev->phydev);
993 netdev->phydev = NULL;
994}
995
996static int lan743x_phy_open(struct lan743x_adapter *adapter)
997{
998 struct lan743x_phy *phy = &adapter->phy;
999 struct phy_device *phydev;
1000 struct net_device *netdev;
1001 int ret = -EIO;
23f0703c
BW		 1002
1003 netdev = adapter->netdev;
1004 phydev = phy_find_first(adapter->mdiobus);
1005 if (!phydev)
1006 goto return_error;
1007
1008 ret = phy_connect_direct(netdev, phydev,
1009 lan743x_phy_link_status_change,
1010 PHY_INTERFACE_MODE_GMII);
1011 if (ret)
1012 goto return_error;
1013
1014 /* MAC doesn't support 1000T Half */
41124fa6 1015 phy_remove_link_mode(phydev, ETHTOOL_LINK_MODE_1000baseT_Half_BIT);
23f0703c
BW		 1016
1017 /* support both flow controls */
af8d9bb2 1018 phy_support_asym_pause(phydev);
23f0703c 1019 phy->fc_request_control = (FLOW_CTRL_RX | FLOW_CTRL_TX);
23f0703c
BW		 1020 phy->fc_autoneg = phydev->autoneg;
1021
1022 phy_start(phydev);
1023 phy_start_aneg(phydev);
1024 return 0;
1025
1026return_error:
1027 return ret;
1028}
1029
43e8fe9b
BW		 1030static void lan743x_rfe_open(struct lan743x_adapter *adapter)
1031{
1032 lan743x_csr_write(adapter, RFE_RSS_CFG,
1033 RFE_RSS_CFG_UDP_IPV6_EX_ |
1034 RFE_RSS_CFG_TCP_IPV6_EX_ |
1035 RFE_RSS_CFG_IPV6_EX_ |
1036 RFE_RSS_CFG_UDP_IPV6_ |
1037 RFE_RSS_CFG_TCP_IPV6_ |
1038 RFE_RSS_CFG_IPV6_ |
1039 RFE_RSS_CFG_UDP_IPV4_ |
1040 RFE_RSS_CFG_TCP_IPV4_ |
1041 RFE_RSS_CFG_IPV4_ |
1042 RFE_RSS_CFG_VALID_HASH_BITS_ |
1043 RFE_RSS_CFG_RSS_QUEUE_ENABLE_ |
1044 RFE_RSS_CFG_RSS_HASH_STORE_ |
1045 RFE_RSS_CFG_RSS_ENABLE_);
1046}
1047
23f0703c
BW		 1048static void lan743x_rfe_update_mac_address(struct lan743x_adapter *adapter)
1049{
1050 u8 *mac_addr;
1051 u32 mac_addr_hi = 0;
1052 u32 mac_addr_lo = 0;
1053
1054 /* Add mac address to perfect Filter */
1055 mac_addr = adapter->mac_address;
1056 mac_addr_lo = ((((u32)(mac_addr[0])) << 0) |
1057 (((u32)(mac_addr[1])) << 8) |
1058 (((u32)(mac_addr[2])) << 16) |
1059 (((u32)(mac_addr[3])) << 24));
1060 mac_addr_hi = ((((u32)(mac_addr[4])) << 0) |
1061 (((u32)(mac_addr[5])) << 8));
1062
1063 lan743x_csr_write(adapter, RFE_ADDR_FILT_LO(0), mac_addr_lo);
1064 lan743x_csr_write(adapter, RFE_ADDR_FILT_HI(0),
1065 mac_addr_hi | RFE_ADDR_FILT_HI_VALID_);
1066}
1067
1068static void lan743x_rfe_set_multicast(struct lan743x_adapter *adapter)
1069{
1070 struct net_device *netdev = adapter->netdev;
1071 u32 hash_table[DP_SEL_VHF_HASH_LEN];
1072 u32 rfctl;
1073 u32 data;
1074
1075 rfctl = lan743x_csr_read(adapter, RFE_CTL);
1076 rfctl &= ~(RFE_CTL_AU_ | RFE_CTL_AM_ |
1077 RFE_CTL_DA_PERFECT_ | RFE_CTL_MCAST_HASH_);
1078 rfctl |= RFE_CTL_AB_;
1079 if (netdev->flags & IFF_PROMISC) {
1080 rfctl |= RFE_CTL_AM_ | RFE_CTL_AU_;
1081 } else {
1082 if (netdev->flags & IFF_ALLMULTI)
1083 rfctl |= RFE_CTL_AM_;
1084 }
1085
1086 memset(hash_table, 0, DP_SEL_VHF_HASH_LEN * sizeof(u32));
1087 if (netdev_mc_count(netdev)) {
1088 struct netdev_hw_addr *ha;
1089 int i;
1090
1091 rfctl |= RFE_CTL_DA_PERFECT_;
1092 i = 1;
1093 netdev_for_each_mc_addr(ha, netdev) {
1094 /* set first 32 into Perfect Filter */
1095 if (i < 33) {
1096 lan743x_csr_write(adapter,
1097 RFE_ADDR_FILT_HI(i), 0);
1098 data = ha->addr[3];
1099 data = ha->addr[2] | (data << 8);
1100 data = ha->addr[1] | (data << 8);
1101 data = ha->addr[0] | (data << 8);
1102 lan743x_csr_write(adapter,
1103 RFE_ADDR_FILT_LO(i), data);
1104 data = ha->addr[5];
1105 data = ha->addr[4] | (data << 8);
1106 data |= RFE_ADDR_FILT_HI_VALID_;
1107 lan743x_csr_write(adapter,
1108 RFE_ADDR_FILT_HI(i), data);
1109 } else {
1110 u32 bitnum = (ether_crc(ETH_ALEN, ha->addr) >>
1111 23) & 0x1FF;
1112 hash_table[bitnum / 32] |= (1 << (bitnum % 32));
1113 rfctl |= RFE_CTL_MCAST_HASH_;
1114 }
1115 i++;
1116 }
1117 }
1118
1119 lan743x_dp_write(adapter, DP_SEL_RFE_RAM,
1120 DP_SEL_VHF_VLAN_LEN,
1121 DP_SEL_VHF_HASH_LEN, hash_table);
1122 lan743x_csr_write(adapter, RFE_CTL, rfctl);
1123}
1124
1125static int lan743x_dmac_init(struct lan743x_adapter *adapter)
1126{
1127 u32 data = 0;
1128
1129 lan743x_csr_write(adapter, DMAC_CMD, DMAC_CMD_SWR_);
1130 lan743x_csr_wait_for_bit(adapter, DMAC_CMD, DMAC_CMD_SWR_,
1131 0, 1000, 20000, 100);
1132 switch (DEFAULT_DMA_DESCRIPTOR_SPACING) {
1133 case DMA_DESCRIPTOR_SPACING_16:
1134 data = DMAC_CFG_MAX_DSPACE_16_;
1135 break;
1136 case DMA_DESCRIPTOR_SPACING_32:
1137 data = DMAC_CFG_MAX_DSPACE_32_;
1138 break;
1139 case DMA_DESCRIPTOR_SPACING_64:
1140 data = DMAC_CFG_MAX_DSPACE_64_;
1141 break;
1142 case DMA_DESCRIPTOR_SPACING_128:
1143 data = DMAC_CFG_MAX_DSPACE_128_;
1144 break;
1145 default:
1146 return -EPERM;
1147 }
1148 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0))
1149 data |= DMAC_CFG_COAL_EN_;
1150 data |= DMAC_CFG_CH_ARB_SEL_RX_HIGH_;
1151 data |= DMAC_CFG_MAX_READ_REQ_SET_(6);
1152 lan743x_csr_write(adapter, DMAC_CFG, data);
1153 data = DMAC_COAL_CFG_TIMER_LIMIT_SET_(1);
1154 data |= DMAC_COAL_CFG_TIMER_TX_START_;
1155 data |= DMAC_COAL_CFG_FLUSH_INTS_;
1156 data |= DMAC_COAL_CFG_INT_EXIT_COAL_;
1157 data |= DMAC_COAL_CFG_CSR_EXIT_COAL_;
1158 data |= DMAC_COAL_CFG_TX_THRES_SET_(0x0A);
1159 data |= DMAC_COAL_CFG_RX_THRES_SET_(0x0C);
1160 lan743x_csr_write(adapter, DMAC_COAL_CFG, data);
1161 data = DMAC_OBFF_TX_THRES_SET_(0x08);
1162 data |= DMAC_OBFF_RX_THRES_SET_(0x0A);
1163 lan743x_csr_write(adapter, DMAC_OBFF_CFG, data);
1164 return 0;
1165}
1166
1167static int lan743x_dmac_tx_get_state(struct lan743x_adapter *adapter,
1168 int tx_channel)
1169{
1170 u32 dmac_cmd = 0;
1171
1172 dmac_cmd = lan743x_csr_read(adapter, DMAC_CMD);
1173 return DMAC_CHANNEL_STATE_SET((dmac_cmd &
1174 DMAC_CMD_START_T_(tx_channel)),
1175 (dmac_cmd &
1176 DMAC_CMD_STOP_T_(tx_channel)));
1177}
1178
1179static int lan743x_dmac_tx_wait_till_stopped(struct lan743x_adapter *adapter,
1180 int tx_channel)
1181{
1182 int timeout = 100;
1183 int result = 0;
1184
1185 while (timeout &&
1186 ((result = lan743x_dmac_tx_get_state(adapter, tx_channel)) ==
1187 DMAC_CHANNEL_STATE_STOP_PENDING)) {
1188 usleep_range(1000, 20000);
1189 timeout--;
1190 }
1191 if (result == DMAC_CHANNEL_STATE_STOP_PENDING)
1192 result = -ENODEV;
1193 return result;
1194}
1195
1196static int lan743x_dmac_rx_get_state(struct lan743x_adapter *adapter,
1197 int rx_channel)
1198{
1199 u32 dmac_cmd = 0;
1200
1201 dmac_cmd = lan743x_csr_read(adapter, DMAC_CMD);
1202 return DMAC_CHANNEL_STATE_SET((dmac_cmd &
1203 DMAC_CMD_START_R_(rx_channel)),
1204 (dmac_cmd &
1205 DMAC_CMD_STOP_R_(rx_channel)));
1206}
1207
1208static int lan743x_dmac_rx_wait_till_stopped(struct lan743x_adapter *adapter,
1209 int rx_channel)
1210{
1211 int timeout = 100;
1212 int result = 0;
1213
1214 while (timeout &&
1215 ((result = lan743x_dmac_rx_get_state(adapter, rx_channel)) ==
1216 DMAC_CHANNEL_STATE_STOP_PENDING)) {
1217 usleep_range(1000, 20000);
1218 timeout--;
1219 }
1220 if (result == DMAC_CHANNEL_STATE_STOP_PENDING)
1221 result = -ENODEV;
1222 return result;
1223}
1224
1225static void lan743x_tx_release_desc(struct lan743x_tx *tx,
1226 int descriptor_index, bool cleanup)
1227{
1228 struct lan743x_tx_buffer_info *buffer_info = NULL;
1229 struct lan743x_tx_descriptor *descriptor = NULL;
1230 u32 descriptor_type = 0;
07624df1 1231 bool ignore_sync;
23f0703c
BW		 1232
1233 descriptor = &tx->ring_cpu_ptr[descriptor_index];
1234 buffer_info = &tx->buffer_info[descriptor_index];
1235 if (!(buffer_info->flags & TX_BUFFER_INFO_FLAG_ACTIVE))
1236 goto done;
1237
1238 descriptor_type = (descriptor->data0) &
1239 TX_DESC_DATA0_DTYPE_MASK_;
1240 if (descriptor_type == TX_DESC_DATA0_DTYPE_DATA_)
1241 goto clean_up_data_descriptor;
1242 else
1243 goto clear_active;
1244
1245clean_up_data_descriptor:
1246 if (buffer_info->dma_ptr) {
1247 if (buffer_info->flags &
1248 TX_BUFFER_INFO_FLAG_SKB_FRAGMENT) {
1249 dma_unmap_page(&tx->adapter->pdev->dev,
1250 buffer_info->dma_ptr,
1251 buffer_info->buffer_length,
1252 DMA_TO_DEVICE);
1253 } else {
1254 dma_unmap_single(&tx->adapter->pdev->dev,
1255 buffer_info->dma_ptr,
1256 buffer_info->buffer_length,
1257 DMA_TO_DEVICE);
1258 }
1259 buffer_info->dma_ptr = 0;
1260 buffer_info->buffer_length = 0;
1261 }
07624df1
BW		 1262 if (!buffer_info->skb)
1263 goto clear_active;
1264
1265 if (!(buffer_info->flags & TX_BUFFER_INFO_FLAG_TIMESTAMP_REQUESTED)) {
23f0703c 1266 dev_kfree_skb(buffer_info->skb);
07624df1
BW		 1267 goto clear_skb;
1268 }
1269
1270 if (cleanup) {
1271 lan743x_ptp_unrequest_tx_timestamp(tx->adapter);
1272 dev_kfree_skb(buffer_info->skb);
1273 } else {
1274 ignore_sync = (buffer_info->flags &
1275 TX_BUFFER_INFO_FLAG_IGNORE_SYNC) != 0;
1276 lan743x_ptp_tx_timestamp_skb(tx->adapter,
1277 buffer_info->skb, ignore_sync);
23f0703c
BW		 1278 }
1279
07624df1
BW		 1280clear_skb:
1281 buffer_info->skb = NULL;
1282
23f0703c
BW		 1283clear_active:
1284 buffer_info->flags &= ~TX_BUFFER_INFO_FLAG_ACTIVE;
1285
1286done:
1287 memset(buffer_info, 0, sizeof(*buffer_info));
1288 memset(descriptor, 0, sizeof(*descriptor));
1289}
1290
1291static int lan743x_tx_next_index(struct lan743x_tx *tx, int index)
1292{
1293 return ((++index) % tx->ring_size);
1294}
1295
1296static void lan743x_tx_release_completed_descriptors(struct lan743x_tx *tx)
1297{
1298 while ((*tx->head_cpu_ptr) != (tx->last_head)) {
1299 lan743x_tx_release_desc(tx, tx->last_head, false);
1300 tx->last_head = lan743x_tx_next_index(tx, tx->last_head);
1301 }
1302}
1303
1304static void lan743x_tx_release_all_descriptors(struct lan743x_tx *tx)
1305{
1306 u32 original_head = 0;
1307
1308 original_head = tx->last_head;
1309 do {
1310 lan743x_tx_release_desc(tx, tx->last_head, true);
1311 tx->last_head = lan743x_tx_next_index(tx, tx->last_head);
1312 } while (tx->last_head != original_head);
1313 memset(tx->ring_cpu_ptr, 0,
1314 sizeof(*tx->ring_cpu_ptr) * (tx->ring_size));
1315 memset(tx->buffer_info, 0,
1316 sizeof(*tx->buffer_info) * (tx->ring_size));
1317}
1318
1319static int lan743x_tx_get_desc_cnt(struct lan743x_tx *tx,
1320 struct sk_buff *skb)
1321{
1322 int result = 1; /* 1 for the main skb buffer */
1323 int nr_frags = 0;
1324
1325 if (skb_is_gso(skb))
1326 result++; /* requires an extension descriptor */
1327 nr_frags = skb_shinfo(skb)->nr_frags;
1328 result += nr_frags; /* 1 for each fragment buffer */
1329 return result;
1330}
1331
1332static int lan743x_tx_get_avail_desc(struct lan743x_tx *tx)
1333{
1334 int last_head = tx->last_head;
1335 int last_tail = tx->last_tail;
1336
1337 if (last_tail >= last_head)
1338 return tx->ring_size - last_tail + last_head - 1;
1339 else
1340 return last_head - last_tail - 1;
1341}
1342
07624df1
BW		 1343void lan743x_tx_set_timestamping_mode(struct lan743x_tx *tx,
1344 bool enable_timestamping,
1345 bool enable_onestep_sync)
1346{
1347 if (enable_timestamping)
1348 tx->ts_flags |= TX_TS_FLAG_TIMESTAMPING_ENABLED;
1349 else
1350 tx->ts_flags &= ~TX_TS_FLAG_TIMESTAMPING_ENABLED;
1351 if (enable_onestep_sync)
1352 tx->ts_flags |= TX_TS_FLAG_ONE_STEP_SYNC;
1353 else
1354 tx->ts_flags &= ~TX_TS_FLAG_ONE_STEP_SYNC;
1355}
1356
23f0703c
BW		 1357static int lan743x_tx_frame_start(struct lan743x_tx *tx,
1358 unsigned char *first_buffer,
1359 unsigned int first_buffer_length,
1360 unsigned int frame_length,
07624df1 1361 bool time_stamp,
23f0703c
BW		 1362 bool check_sum)
1363{
1364 /* called only from within lan743x_tx_xmit_frame.
1365 * assuming tx->ring_lock has already been acquired.
1366 */
1367 struct lan743x_tx_descriptor *tx_descriptor = NULL;
1368 struct lan743x_tx_buffer_info *buffer_info = NULL;
1369 struct lan743x_adapter *adapter = tx->adapter;
1370 struct device *dev = &adapter->pdev->dev;
1371 dma_addr_t dma_ptr;
1372
1373 tx->frame_flags |= TX_FRAME_FLAG_IN_PROGRESS;
1374 tx->frame_first = tx->last_tail;
1375 tx->frame_tail = tx->frame_first;
1376
1377 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail];
1378 buffer_info = &tx->buffer_info[tx->frame_tail];
1379 dma_ptr = dma_map_single(dev, first_buffer, first_buffer_length,
1380 DMA_TO_DEVICE);
1381 if (dma_mapping_error(dev, dma_ptr))
1382 return -ENOMEM;
1383
1384 tx_descriptor->data1 = DMA_ADDR_LOW32(dma_ptr);
1385 tx_descriptor->data2 = DMA_ADDR_HIGH32(dma_ptr);
1386 tx_descriptor->data3 = (frame_length << 16) &
1387 TX_DESC_DATA3_FRAME_LENGTH_MSS_MASK_;
1388
1389 buffer_info->skb = NULL;
1390 buffer_info->dma_ptr = dma_ptr;
1391 buffer_info->buffer_length = first_buffer_length;
1392 buffer_info->flags |= TX_BUFFER_INFO_FLAG_ACTIVE;
1393
1394 tx->frame_data0 = (first_buffer_length &
1395 TX_DESC_DATA0_BUF_LENGTH_MASK_) |
1396 TX_DESC_DATA0_DTYPE_DATA_ |
1397 TX_DESC_DATA0_FS_ |
1398 TX_DESC_DATA0_FCS_;
07624df1
BW		 1399 if (time_stamp)
1400 tx->frame_data0 |= TX_DESC_DATA0_TSE_;
23f0703c
BW		 1401
1402 if (check_sum)
1403 tx->frame_data0 |= TX_DESC_DATA0_ICE_ |
1404 TX_DESC_DATA0_IPE_ |
1405 TX_DESC_DATA0_TPE_;
1406
1407 /* data0 will be programmed in one of other frame assembler functions */
1408 return 0;
1409}
1410
1411static void lan743x_tx_frame_add_lso(struct lan743x_tx *tx,
1412 unsigned int frame_length)
1413{
1414 /* called only from within lan743x_tx_xmit_frame.
1415 * assuming tx->ring_lock has already been acquired.
1416 */
1417 struct lan743x_tx_descriptor *tx_descriptor = NULL;
1418 struct lan743x_tx_buffer_info *buffer_info = NULL;
1419
1420 /* wrap up previous descriptor */
1421 tx->frame_data0 |= TX_DESC_DATA0_EXT_;
1422 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail];
1423 tx_descriptor->data0 = tx->frame_data0;
1424
1425 /* move to next descriptor */
1426 tx->frame_tail = lan743x_tx_next_index(tx, tx->frame_tail);
1427 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail];
1428 buffer_info = &tx->buffer_info[tx->frame_tail];
1429
1430 /* add extension descriptor */
1431 tx_descriptor->data1 = 0;
1432 tx_descriptor->data2 = 0;
1433 tx_descriptor->data3 = 0;
1434
1435 buffer_info->skb = NULL;
1436 buffer_info->dma_ptr = 0;
1437 buffer_info->buffer_length = 0;
1438 buffer_info->flags |= TX_BUFFER_INFO_FLAG_ACTIVE;
1439
1440 tx->frame_data0 = (frame_length & TX_DESC_DATA0_EXT_PAY_LENGTH_MASK_) |
1441 TX_DESC_DATA0_DTYPE_EXT_ |
1442 TX_DESC_DATA0_EXT_LSO_;
1443
1444 /* data0 will be programmed in one of other frame assembler functions */
1445}
1446
1447static int lan743x_tx_frame_add_fragment(struct lan743x_tx *tx,
1448 const struct skb_frag_struct *fragment,
1449 unsigned int frame_length)
1450{
1451 /* called only from within lan743x_tx_xmit_frame
1452 * assuming tx->ring_lock has already been acquired
1453 */
1454 struct lan743x_tx_descriptor *tx_descriptor = NULL;
1455 struct lan743x_tx_buffer_info *buffer_info = NULL;
1456 struct lan743x_adapter *adapter = tx->adapter;
1457 struct device *dev = &adapter->pdev->dev;
1458 unsigned int fragment_length = 0;
1459 dma_addr_t dma_ptr;
1460
1461 fragment_length = skb_frag_size(fragment);
1462 if (!fragment_length)
1463 return 0;
1464
1465 /* wrap up previous descriptor */
1466 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail];
1467 tx_descriptor->data0 = tx->frame_data0;
1468
1469 /* move to next descriptor */
1470 tx->frame_tail = lan743x_tx_next_index(tx, tx->frame_tail);
1471 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail];
1472 buffer_info = &tx->buffer_info[tx->frame_tail];
1473 dma_ptr = skb_frag_dma_map(dev, fragment,
1474 0, fragment_length,
1475 DMA_TO_DEVICE);
1476 if (dma_mapping_error(dev, dma_ptr)) {
1477 int desc_index;
1478
1479 /* cleanup all previously setup descriptors */
1480 desc_index = tx->frame_first;
1481 while (desc_index != tx->frame_tail) {
1482 lan743x_tx_release_desc(tx, desc_index, true);
1483 desc_index = lan743x_tx_next_index(tx, desc_index);
1484 }
1485 dma_wmb();
1486 tx->frame_flags &= ~TX_FRAME_FLAG_IN_PROGRESS;
1487 tx->frame_first = 0;
1488 tx->frame_data0 = 0;
1489 tx->frame_tail = 0;
1490 return -ENOMEM;
1491 }
1492
1493 tx_descriptor->data1 = DMA_ADDR_LOW32(dma_ptr);
1494 tx_descriptor->data2 = DMA_ADDR_HIGH32(dma_ptr);
1495 tx_descriptor->data3 = (frame_length << 16) &
1496 TX_DESC_DATA3_FRAME_LENGTH_MSS_MASK_;
1497
1498 buffer_info->skb = NULL;
1499 buffer_info->dma_ptr = dma_ptr;
1500 buffer_info->buffer_length = fragment_length;
1501 buffer_info->flags |= TX_BUFFER_INFO_FLAG_ACTIVE;
1502 buffer_info->flags |= TX_BUFFER_INFO_FLAG_SKB_FRAGMENT;
1503
1504 tx->frame_data0 = (fragment_length & TX_DESC_DATA0_BUF_LENGTH_MASK_) |
1505 TX_DESC_DATA0_DTYPE_DATA_ |
1506 TX_DESC_DATA0_FCS_;
1507
1508 /* data0 will be programmed in one of other frame assembler functions */
1509 return 0;
1510}
1511
1512static void lan743x_tx_frame_end(struct lan743x_tx *tx,
1513 struct sk_buff *skb,
07624df1 1514 bool time_stamp,
23f0703c
BW		 1515 bool ignore_sync)
1516{
1517 /* called only from within lan743x_tx_xmit_frame
1518 * assuming tx->ring_lock has already been acquired
1519 */
1520 struct lan743x_tx_descriptor *tx_descriptor = NULL;
1521 struct lan743x_tx_buffer_info *buffer_info = NULL;
1522 struct lan743x_adapter *adapter = tx->adapter;
1523 u32 tx_tail_flags = 0;
1524
1525 /* wrap up previous descriptor */
1526 tx->frame_data0 |= TX_DESC_DATA0_LS_;
1527 tx->frame_data0 |= TX_DESC_DATA0_IOC_;
1528
1529 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail];
1530 buffer_info = &tx->buffer_info[tx->frame_tail];
1531 buffer_info->skb = skb;
07624df1
BW		 1532 if (time_stamp)
1533 buffer_info->flags |= TX_BUFFER_INFO_FLAG_TIMESTAMP_REQUESTED;
23f0703c
BW		 1534 if (ignore_sync)
1535 buffer_info->flags |= TX_BUFFER_INFO_FLAG_IGNORE_SYNC;
1536
1537 tx_descriptor->data0 = tx->frame_data0;
1538 tx->frame_tail = lan743x_tx_next_index(tx, tx->frame_tail);
1539 tx->last_tail = tx->frame_tail;
1540
1541 dma_wmb();
1542
1543 if (tx->vector_flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET)
1544 tx_tail_flags |= TX_TAIL_SET_TOP_INT_VEC_EN_;
1545 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET)
1546 tx_tail_flags |= TX_TAIL_SET_DMAC_INT_EN_ |
1547 TX_TAIL_SET_TOP_INT_EN_;
1548
1549 lan743x_csr_write(adapter, TX_TAIL(tx->channel_number),
1550 tx_tail_flags | tx->frame_tail);
1551 tx->frame_flags &= ~TX_FRAME_FLAG_IN_PROGRESS;
1552}
1553
1554static netdev_tx_t lan743x_tx_xmit_frame(struct lan743x_tx *tx,
1555 struct sk_buff *skb)
1556{
1557 int required_number_of_descriptors = 0;
1558 unsigned int start_frame_length = 0;
1559 unsigned int frame_length = 0;
1560 unsigned int head_length = 0;
1561 unsigned long irq_flags = 0;
07624df1 1562 bool do_timestamp = false;
23f0703c
BW		 1563 bool ignore_sync = false;
1564 int nr_frags = 0;
1565 bool gso = false;
1566 int j;
1567
1568 required_number_of_descriptors = lan743x_tx_get_desc_cnt(tx, skb);
1569
1570 spin_lock_irqsave(&tx->ring_lock, irq_flags);
1571 if (required_number_of_descriptors >
1572 lan743x_tx_get_avail_desc(tx)) {
1573 if (required_number_of_descriptors > (tx->ring_size - 1)) {
1574 dev_kfree_skb(skb);
1575 } else {
1576 /* save to overflow buffer */
1577 tx->overflow_skb = skb;
1578 netif_stop_queue(tx->adapter->netdev);
1579 }
1580 goto unlock;
1581 }
1582
1583 /* space available, transmit skb */
07624df1
BW		 1584 if ((skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
1585 (tx->ts_flags & TX_TS_FLAG_TIMESTAMPING_ENABLED) &&
1586 (lan743x_ptp_request_tx_timestamp(tx->adapter))) {
1587 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
1588 do_timestamp = true;
1589 if (tx->ts_flags & TX_TS_FLAG_ONE_STEP_SYNC)
1590 ignore_sync = true;
1591 }
23f0703c
BW		 1592 head_length = skb_headlen(skb);
1593 frame_length = skb_pagelen(skb);
1594 nr_frags = skb_shinfo(skb)->nr_frags;
1595 start_frame_length = frame_length;
1596 gso = skb_is_gso(skb);
1597 if (gso) {
1598 start_frame_length = max(skb_shinfo(skb)->gso_size,
1599 (unsigned short)8);
1600 }
1601
1602 if (lan743x_tx_frame_start(tx,
1603 skb->data, head_length,
1604 start_frame_length,
07624df1 1605 do_timestamp,
23f0703c
BW		 1606 skb->ip_summed == CHECKSUM_PARTIAL)) {
1607 dev_kfree_skb(skb);
1608 goto unlock;
1609 }
1610
1611 if (gso)
1612 lan743x_tx_frame_add_lso(tx, frame_length);
1613
1614 if (nr_frags <= 0)
1615 goto finish;
1616
1617 for (j = 0; j < nr_frags; j++) {
1618 const struct skb_frag_struct *frag;
1619
1620 frag = &(skb_shinfo(skb)->frags[j]);
1621 if (lan743x_tx_frame_add_fragment(tx, frag, frame_length)) {
1622 /* upon error no need to call
1623 * lan743x_tx_frame_end
1624 * frame assembler clean up was performed inside
1625 * lan743x_tx_frame_add_fragment
1626 */
1627 dev_kfree_skb(skb);
1628 goto unlock;
1629 }
1630 }
1631
1632finish:
07624df1 1633 lan743x_tx_frame_end(tx, skb, do_timestamp, ignore_sync);
23f0703c
BW		 1634
1635unlock:
1636 spin_unlock_irqrestore(&tx->ring_lock, irq_flags);
1637 return NETDEV_TX_OK;
1638}
1639
1640static int lan743x_tx_napi_poll(struct napi_struct *napi, int weight)
1641{
1642 struct lan743x_tx *tx = container_of(napi, struct lan743x_tx, napi);
1643 struct lan743x_adapter *adapter = tx->adapter;
1644 bool start_transmitter = false;
1645 unsigned long irq_flags = 0;
1646 u32 ioc_bit = 0;
1647 u32 int_sts = 0;
1648
23f0703c
BW		 1649 ioc_bit = DMAC_INT_BIT_TX_IOC_(tx->channel_number);
1650 int_sts = lan743x_csr_read(adapter, DMAC_INT_STS);
1651 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C)
1652 lan743x_csr_write(adapter, DMAC_INT_STS, ioc_bit);
1653 spin_lock_irqsave(&tx->ring_lock, irq_flags);
1654
1655 /* clean up tx ring */
1656 lan743x_tx_release_completed_descriptors(tx);
1657 if (netif_queue_stopped(adapter->netdev)) {
1658 if (tx->overflow_skb) {
1659 if (lan743x_tx_get_desc_cnt(tx, tx->overflow_skb) <=
1660 lan743x_tx_get_avail_desc(tx))
1661 start_transmitter = true;
1662 } else {
1663 netif_wake_queue(adapter->netdev);
1664 }
1665 }
1666 spin_unlock_irqrestore(&tx->ring_lock, irq_flags);
1667
1668 if (start_transmitter) {
1669 /* space is now available, transmit overflow skb */
1670 lan743x_tx_xmit_frame(tx, tx->overflow_skb);
1671 tx->overflow_skb = NULL;
1672 netif_wake_queue(adapter->netdev);
1673 }
1674
1675 if (!napi_complete_done(napi, weight))
1676 goto done;
1677
1678 /* enable isr */
1679 lan743x_csr_write(adapter, INT_EN_SET,
1680 INT_BIT_DMA_TX_(tx->channel_number));
1681 lan743x_csr_read(adapter, INT_STS);
1682
1683done:
1684 return weight;
1685}
1686
1687static void lan743x_tx_ring_cleanup(struct lan743x_tx *tx)
1688{
1689 if (tx->head_cpu_ptr) {
1690 pci_free_consistent(tx->adapter->pdev,
1691 sizeof(*tx->head_cpu_ptr),
1692 (void *)(tx->head_cpu_ptr),
1693 tx->head_dma_ptr);
1694 tx->head_cpu_ptr = NULL;
1695 tx->head_dma_ptr = 0;
1696 }
1697 kfree(tx->buffer_info);
1698 tx->buffer_info = NULL;
1699
1700 if (tx->ring_cpu_ptr) {
1701 pci_free_consistent(tx->adapter->pdev,
1702 tx->ring_allocation_size,
1703 tx->ring_cpu_ptr,
1704 tx->ring_dma_ptr);
1705 tx->ring_allocation_size = 0;
1706 tx->ring_cpu_ptr = NULL;
1707 tx->ring_dma_ptr = 0;
1708 }
1709 tx->ring_size = 0;
1710}
1711
1712static int lan743x_tx_ring_init(struct lan743x_tx *tx)
1713{
1714 size_t ring_allocation_size = 0;
1715 void *cpu_ptr = NULL;
1716 dma_addr_t dma_ptr;
1717 int ret = -ENOMEM;
1718
1719 tx->ring_size = LAN743X_TX_RING_SIZE;
1720 if (tx->ring_size & ~TX_CFG_B_TX_RING_LEN_MASK_) {
1721 ret = -EINVAL;
1722 goto cleanup;
1723 }
1724 ring_allocation_size = ALIGN(tx->ring_size *
1725 sizeof(struct lan743x_tx_descriptor),
1726 PAGE_SIZE);
1727 dma_ptr = 0;
1728 cpu_ptr = pci_zalloc_consistent(tx->adapter->pdev,
1729 ring_allocation_size, &dma_ptr);
1730 if (!cpu_ptr) {
1731 ret = -ENOMEM;
1732 goto cleanup;
1733 }
1734
1735 tx->ring_allocation_size = ring_allocation_size;
1736 tx->ring_cpu_ptr = (struct lan743x_tx_descriptor *)cpu_ptr;
1737 tx->ring_dma_ptr = dma_ptr;
1738
1739 cpu_ptr = kcalloc(tx->ring_size, sizeof(*tx->buffer_info), GFP_KERNEL);
1740 if (!cpu_ptr) {
1741 ret = -ENOMEM;
1742 goto cleanup;
1743 }
1744 tx->buffer_info = (struct lan743x_tx_buffer_info *)cpu_ptr;
1745 dma_ptr = 0;
1746 cpu_ptr = pci_zalloc_consistent(tx->adapter->pdev,
1747 sizeof(*tx->head_cpu_ptr), &dma_ptr);
1748 if (!cpu_ptr) {
1749 ret = -ENOMEM;
1750 goto cleanup;
1751 }
1752
1753 tx->head_cpu_ptr = cpu_ptr;
1754 tx->head_dma_ptr = dma_ptr;
1755 if (tx->head_dma_ptr & 0x3) {
1756 ret = -ENOMEM;
1757 goto cleanup;
1758 }
1759
1760 return 0;
1761
1762cleanup:
1763 lan743x_tx_ring_cleanup(tx);
1764 return ret;
1765}
1766
1767static void lan743x_tx_close(struct lan743x_tx *tx)
1768{
1769 struct lan743x_adapter *adapter = tx->adapter;
1770
1771 lan743x_csr_write(adapter,
1772 DMAC_CMD,
1773 DMAC_CMD_STOP_T_(tx->channel_number));
1774 lan743x_dmac_tx_wait_till_stopped(adapter, tx->channel_number);
1775
1776 lan743x_csr_write(adapter,
1777 DMAC_INT_EN_CLR,
1778 DMAC_INT_BIT_TX_IOC_(tx->channel_number));
1779 lan743x_csr_write(adapter, INT_EN_CLR,
1780 INT_BIT_DMA_TX_(tx->channel_number));
1781 napi_disable(&tx->napi);
1782 netif_napi_del(&tx->napi);
1783
1784 lan743x_csr_write(adapter, FCT_TX_CTL,
1785 FCT_TX_CTL_DIS_(tx->channel_number));
1786 lan743x_csr_wait_for_bit(adapter, FCT_TX_CTL,
1787 FCT_TX_CTL_EN_(tx->channel_number),
1788 0, 1000, 20000, 100);
1789
1790 lan743x_tx_release_all_descriptors(tx);
1791
1792 if (tx->overflow_skb) {
1793 dev_kfree_skb(tx->overflow_skb);
1794 tx->overflow_skb = NULL;
1795 }
1796
1797 lan743x_tx_ring_cleanup(tx);
1798}
1799
1800static int lan743x_tx_open(struct lan743x_tx *tx)
1801{
1802 struct lan743x_adapter *adapter = NULL;
1803 u32 data = 0;
1804 int ret;
1805
1806 adapter = tx->adapter;
1807 ret = lan743x_tx_ring_init(tx);
1808 if (ret)
1809 return ret;
1810
1811 /* initialize fifo */
1812 lan743x_csr_write(adapter, FCT_TX_CTL,
1813 FCT_TX_CTL_RESET_(tx->channel_number));
1814 lan743x_csr_wait_for_bit(adapter, FCT_TX_CTL,
1815 FCT_TX_CTL_RESET_(tx->channel_number),
1816 0, 1000, 20000, 100);
1817
1818 /* enable fifo */
1819 lan743x_csr_write(adapter, FCT_TX_CTL,
1820 FCT_TX_CTL_EN_(tx->channel_number));
1821
1822 /* reset tx channel */
1823 lan743x_csr_write(adapter, DMAC_CMD,
1824 DMAC_CMD_TX_SWR_(tx->channel_number));
1825 lan743x_csr_wait_for_bit(adapter, DMAC_CMD,
1826 DMAC_CMD_TX_SWR_(tx->channel_number),
1827 0, 1000, 20000, 100);
1828
1829 /* Write TX_BASE_ADDR */
1830 lan743x_csr_write(adapter,
1831 TX_BASE_ADDRH(tx->channel_number),
1832 DMA_ADDR_HIGH32(tx->ring_dma_ptr));
1833 lan743x_csr_write(adapter,
1834 TX_BASE_ADDRL(tx->channel_number),
1835 DMA_ADDR_LOW32(tx->ring_dma_ptr));
1836
1837 /* Write TX_CFG_B */
1838 data = lan743x_csr_read(adapter, TX_CFG_B(tx->channel_number));
1839 data &= ~TX_CFG_B_TX_RING_LEN_MASK_;
1840 data |= ((tx->ring_size) & TX_CFG_B_TX_RING_LEN_MASK_);
1841 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0))
1842 data |= TX_CFG_B_TDMABL_512_;
1843 lan743x_csr_write(adapter, TX_CFG_B(tx->channel_number), data);
1844
1845 /* Write TX_CFG_A */
1846 data = TX_CFG_A_TX_TMR_HPWB_SEL_IOC_ | TX_CFG_A_TX_HP_WB_EN_;
1847 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) {
1848 data |= TX_CFG_A_TX_HP_WB_ON_INT_TMR_;
1849 data |= TX_CFG_A_TX_PF_THRES_SET_(0x10);
1850 data |= TX_CFG_A_TX_PF_PRI_THRES_SET_(0x04);
1851 data |= TX_CFG_A_TX_HP_WB_THRES_SET_(0x07);
1852 }
1853 lan743x_csr_write(adapter, TX_CFG_A(tx->channel_number), data);
1854
1855 /* Write TX_HEAD_WRITEBACK_ADDR */
1856 lan743x_csr_write(adapter,
1857 TX_HEAD_WRITEBACK_ADDRH(tx->channel_number),
1858 DMA_ADDR_HIGH32(tx->head_dma_ptr));
1859 lan743x_csr_write(adapter,
1860 TX_HEAD_WRITEBACK_ADDRL(tx->channel_number),
1861 DMA_ADDR_LOW32(tx->head_dma_ptr));
1862
1863 /* set last head */
1864 tx->last_head = lan743x_csr_read(adapter, TX_HEAD(tx->channel_number));
1865
1866 /* write TX_TAIL */
1867 tx->last_tail = 0;
1868 lan743x_csr_write(adapter, TX_TAIL(tx->channel_number),
1869 (u32)(tx->last_tail));
1870 tx->vector_flags = lan743x_intr_get_vector_flags(adapter,
1871 INT_BIT_DMA_TX_
1872 (tx->channel_number));
1873 netif_napi_add(adapter->netdev,
1874 &tx->napi, lan743x_tx_napi_poll,
1875 tx->ring_size - 1);
1876 napi_enable(&tx->napi);
1877
1878 data = 0;
1879 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR)
1880 data |= TX_CFG_C_TX_TOP_INT_EN_AUTO_CLR_;
1881 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR)
1882 data |= TX_CFG_C_TX_DMA_INT_STS_AUTO_CLR_;
1883 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C)
1884 data |= TX_CFG_C_TX_INT_STS_R2C_MODE_MASK_;
1885 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C)
1886 data |= TX_CFG_C_TX_INT_EN_R2C_;
1887 lan743x_csr_write(adapter, TX_CFG_C(tx->channel_number), data);
1888
1889 if (!(tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET))
1890 lan743x_csr_write(adapter, INT_EN_SET,
1891 INT_BIT_DMA_TX_(tx->channel_number));
1892 lan743x_csr_write(adapter, DMAC_INT_EN_SET,
1893 DMAC_INT_BIT_TX_IOC_(tx->channel_number));
1894
1895 /* start dmac channel */
1896 lan743x_csr_write(adapter, DMAC_CMD,
1897 DMAC_CMD_START_T_(tx->channel_number));
1898 return 0;
1899}
1900
1901static int lan743x_rx_next_index(struct lan743x_rx *rx, int index)
1902{
1903 return ((++index) % rx->ring_size);
1904}
1905
1906static int lan743x_rx_allocate_ring_element(struct lan743x_rx *rx, int index)
1907{
1908 struct lan743x_rx_buffer_info *buffer_info;
1909 struct lan743x_rx_descriptor *descriptor;
1910 int length = 0;
1911
1912 length = (LAN743X_MAX_FRAME_SIZE + ETH_HLEN + 4 + RX_HEAD_PADDING);
1913 descriptor = &rx->ring_cpu_ptr[index];
1914 buffer_info = &rx->buffer_info[index];
1915 buffer_info->skb = __netdev_alloc_skb(rx->adapter->netdev,
1916 length,
1917 GFP_ATOMIC | GFP_DMA);
1918 if (!(buffer_info->skb))
1919 return -ENOMEM;
1920 buffer_info->dma_ptr = dma_map_single(&rx->adapter->pdev->dev,
1921 buffer_info->skb->data,
1922 length,
1923 DMA_FROM_DEVICE);
1924 if (dma_mapping_error(&rx->adapter->pdev->dev,
1925 buffer_info->dma_ptr)) {
1926 buffer_info->dma_ptr = 0;
1927 return -ENOMEM;
1928 }
1929
1930 buffer_info->buffer_length = length;
1931 descriptor->data1 = DMA_ADDR_LOW32(buffer_info->dma_ptr);
1932 descriptor->data2 = DMA_ADDR_HIGH32(buffer_info->dma_ptr);
1933 descriptor->data3 = 0;
1934 descriptor->data0 = (RX_DESC_DATA0_OWN_ |
1935 (length & RX_DESC_DATA0_BUF_LENGTH_MASK_));
1936 skb_reserve(buffer_info->skb, RX_HEAD_PADDING);
1937
1938 return 0;
1939}
1940
1941static void lan743x_rx_reuse_ring_element(struct lan743x_rx *rx, int index)
1942{
1943 struct lan743x_rx_buffer_info *buffer_info;
1944 struct lan743x_rx_descriptor *descriptor;
1945
1946 descriptor = &rx->ring_cpu_ptr[index];
1947 buffer_info = &rx->buffer_info[index];
1948
1949 descriptor->data1 = DMA_ADDR_LOW32(buffer_info->dma_ptr);
1950 descriptor->data2 = DMA_ADDR_HIGH32(buffer_info->dma_ptr);
1951 descriptor->data3 = 0;
1952 descriptor->data0 = (RX_DESC_DATA0_OWN_ |
1953 ((buffer_info->buffer_length) &
1954 RX_DESC_DATA0_BUF_LENGTH_MASK_));
1955}
1956
1957static void lan743x_rx_release_ring_element(struct lan743x_rx *rx, int index)
1958{
1959 struct lan743x_rx_buffer_info *buffer_info;
1960 struct lan743x_rx_descriptor *descriptor;
1961
1962 descriptor = &rx->ring_cpu_ptr[index];
1963 buffer_info = &rx->buffer_info[index];
1964
1965 memset(descriptor, 0, sizeof(*descriptor));
1966
1967 if (buffer_info->dma_ptr) {
1968 dma_unmap_single(&rx->adapter->pdev->dev,
1969 buffer_info->dma_ptr,
1970 buffer_info->buffer_length,
1971 DMA_FROM_DEVICE);
1972 buffer_info->dma_ptr = 0;
1973 }
1974
1975 if (buffer_info->skb) {
1976 dev_kfree_skb(buffer_info->skb);
1977 buffer_info->skb = NULL;
1978 }
1979
1980 memset(buffer_info, 0, sizeof(*buffer_info));
1981}
1982
1983static int lan743x_rx_process_packet(struct lan743x_rx *rx)
1984{
1985 struct skb_shared_hwtstamps *hwtstamps = NULL;
1986 int result = RX_PROCESS_RESULT_NOTHING_TO_DO;
1987 struct lan743x_rx_buffer_info *buffer_info;
1988 struct lan743x_rx_descriptor *descriptor;
1989 int current_head_index = -1;
1990 int extension_index = -1;
1991 int first_index = -1;
1992 int last_index = -1;
1993
1994 current_head_index = *rx->head_cpu_ptr;
1995 if (current_head_index < 0 || current_head_index >= rx->ring_size)
1996 goto done;
1997
1998 if (rx->last_head < 0 || rx->last_head >= rx->ring_size)
1999 goto done;
2000
2001 if (rx->last_head != current_head_index) {
2002 descriptor = &rx->ring_cpu_ptr[rx->last_head];
2003 if (descriptor->data0 & RX_DESC_DATA0_OWN_)
2004 goto done;
2005
2006 if (!(descriptor->data0 & RX_DESC_DATA0_FS_))
2007 goto done;
2008
2009 first_index = rx->last_head;
2010 if (descriptor->data0 & RX_DESC_DATA0_LS_) {
2011 last_index = rx->last_head;
2012 } else {
2013 int index;
2014
2015 index = lan743x_rx_next_index(rx, first_index);
2016 while (index != current_head_index) {
2017 descriptor = &rx->ring_cpu_ptr[index];
2018 if (descriptor->data0 & RX_DESC_DATA0_OWN_)
2019 goto done;
2020
2021 if (descriptor->data0 & RX_DESC_DATA0_LS_) {
2022 last_index = index;
2023 break;
2024 }
2025 index = lan743x_rx_next_index(rx, index);
2026 }
2027 }
2028 if (last_index >= 0) {
2029 descriptor = &rx->ring_cpu_ptr[last_index];
2030 if (descriptor->data0 & RX_DESC_DATA0_EXT_) {
2031 /* extension is expected to follow */
2032 int index = lan743x_rx_next_index(rx,
2033 last_index);
2034 if (index != current_head_index) {
2035 descriptor = &rx->ring_cpu_ptr[index];
2036 if (descriptor->data0 &
2037 RX_DESC_DATA0_OWN_) {
2038 goto done;
2039 }
2040 if (descriptor->data0 &
2041 RX_DESC_DATA0_EXT_) {
2042 extension_index = index;
2043 } else {
2044 goto done;
2045 }
2046 } else {
2047 /* extension is not yet available */
2048 /* prevent processing of this packet */
2049 first_index = -1;
2050 last_index = -1;
2051 }
2052 }
2053 }
2054 }
2055 if (first_index >= 0 && last_index >= 0) {
2056 int real_last_index = last_index;
2057 struct sk_buff *skb = NULL;
2058 u32 ts_sec = 0;
2059 u32 ts_nsec = 0;
2060
2061 /* packet is available */
2062 if (first_index == last_index) {
2063 /* single buffer packet */
2064 int packet_length;
2065
2066 buffer_info = &rx->buffer_info[first_index];
2067 skb = buffer_info->skb;
2068 descriptor = &rx->ring_cpu_ptr[first_index];
2069
2070 /* unmap from dma */
2071 if (buffer_info->dma_ptr) {
2072 dma_unmap_single(&rx->adapter->pdev->dev,
2073 buffer_info->dma_ptr,
2074 buffer_info->buffer_length,
2075 DMA_FROM_DEVICE);
2076 buffer_info->dma_ptr = 0;
2077 buffer_info->buffer_length = 0;
2078 }
2079 buffer_info->skb = NULL;
2080 packet_length = RX_DESC_DATA0_FRAME_LENGTH_GET_
2081 (descriptor->data0);
2082 skb_put(skb, packet_length - 4);
2083 skb->protocol = eth_type_trans(skb,
2084 rx->adapter->netdev);
2085 lan743x_rx_allocate_ring_element(rx, first_index);
2086 } else {
2087 int index = first_index;
2088
2089 /* multi buffer packet not supported */
2090 /* this should not happen since
2091 * buffers are allocated to be at least jumbo size
2092 */
2093
2094 /* clean up buffers */
2095 if (first_index <= last_index) {
2096 while ((index >= first_index) &&
2097 (index <= last_index)) {
2098 lan743x_rx_release_ring_element(rx,
2099 index);
2100 lan743x_rx_allocate_ring_element(rx,
2101 index);
2102 index = lan743x_rx_next_index(rx,
2103 index);
2104 }
2105 } else {
2106 while ((index >= first_index) ||
2107 (index <= last_index)) {
2108 lan743x_rx_release_ring_element(rx,
2109 index);
2110 lan743x_rx_allocate_ring_element(rx,
2111 index);
2112 index = lan743x_rx_next_index(rx,
2113 index);
2114 }
2115 }
2116 }
2117
2118 if (extension_index >= 0) {
2119 descriptor = &rx->ring_cpu_ptr[extension_index];
2120 buffer_info = &rx->buffer_info[extension_index];
2121
2122 ts_sec = descriptor->data1;
2123 ts_nsec = (descriptor->data2 &
2124 RX_DESC_DATA2_TS_NS_MASK_);
2125 lan743x_rx_reuse_ring_element(rx, extension_index);
2126 real_last_index = extension_index;
2127 }
2128
2129 if (!skb) {
2130 result = RX_PROCESS_RESULT_PACKET_DROPPED;
2131 goto move_forward;
2132 }
2133
2134 if (extension_index < 0)
2135 goto pass_packet_to_os;
2136 hwtstamps = skb_hwtstamps(skb);
2137 if (hwtstamps)
2138 hwtstamps->hwtstamp = ktime_set(ts_sec, ts_nsec);
2139
2140pass_packet_to_os:
2141 /* pass packet to OS */
2142 napi_gro_receive(&rx->napi, skb);
2143 result = RX_PROCESS_RESULT_PACKET_RECEIVED;
2144
2145move_forward:
2146 /* push tail and head forward */
2147 rx->last_tail = real_last_index;
2148 rx->last_head = lan743x_rx_next_index(rx, real_last_index);
2149 }
2150done:
2151 return result;
2152}
2153
2154static int lan743x_rx_napi_poll(struct napi_struct *napi, int weight)
2155{
2156 struct lan743x_rx *rx = container_of(napi, struct lan743x_rx, napi);
2157 struct lan743x_adapter *adapter = rx->adapter;
2158 u32 rx_tail_flags = 0;
2159 int count;
2160
2161 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C) {
2162 /* clear int status bit before reading packet */
2163 lan743x_csr_write(adapter, DMAC_INT_STS,
2164 DMAC_INT_BIT_RXFRM_(rx->channel_number));
2165 }
2166 count = 0;
2167 while (count < weight) {
2168 int rx_process_result = -1;
2169
2170 rx_process_result = lan743x_rx_process_packet(rx);
2171 if (rx_process_result == RX_PROCESS_RESULT_PACKET_RECEIVED) {
2172 count++;
2173 } else if (rx_process_result ==
2174 RX_PROCESS_RESULT_NOTHING_TO_DO) {
2175 break;
2176 } else if (rx_process_result ==
2177 RX_PROCESS_RESULT_PACKET_DROPPED) {
2178 continue;
2179 }
2180 }
2181 rx->frame_count += count;
2182 if (count == weight)
2183 goto done;
2184
2185 if (!napi_complete_done(napi, count))
2186 goto done;
2187
2188 if (rx->vector_flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET)
2189 rx_tail_flags |= RX_TAIL_SET_TOP_INT_VEC_EN_;
2190 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET) {
2191 rx_tail_flags |= RX_TAIL_SET_TOP_INT_EN_;
2192 } else {
2193 lan743x_csr_write(adapter, INT_EN_SET,
2194 INT_BIT_DMA_RX_(rx->channel_number));
2195 }
2196
2197 /* update RX_TAIL */
2198 lan743x_csr_write(adapter, RX_TAIL(rx->channel_number),
2199 rx_tail_flags | rx->last_tail);
2200done:
2201 return count;
2202}
2203
2204static void lan743x_rx_ring_cleanup(struct lan743x_rx *rx)
2205{
2206 if (rx->buffer_info && rx->ring_cpu_ptr) {
2207 int index;
2208
2209 for (index = 0; index < rx->ring_size; index++)
2210 lan743x_rx_release_ring_element(rx, index);
2211 }
2212
2213 if (rx->head_cpu_ptr) {
2214 pci_free_consistent(rx->adapter->pdev,
2215 sizeof(*rx->head_cpu_ptr),
2216 rx->head_cpu_ptr,
2217 rx->head_dma_ptr);
2218 rx->head_cpu_ptr = NULL;
2219 rx->head_dma_ptr = 0;
2220 }
2221
2222 kfree(rx->buffer_info);
2223 rx->buffer_info = NULL;
2224
2225 if (rx->ring_cpu_ptr) {
2226 pci_free_consistent(rx->adapter->pdev,
2227 rx->ring_allocation_size,
2228 rx->ring_cpu_ptr,
2229 rx->ring_dma_ptr);
2230 rx->ring_allocation_size = 0;
2231 rx->ring_cpu_ptr = NULL;
2232 rx->ring_dma_ptr = 0;
2233 }
2234
2235 rx->ring_size = 0;
2236 rx->last_head = 0;
2237}
2238
2239static int lan743x_rx_ring_init(struct lan743x_rx *rx)
2240{
2241 size_t ring_allocation_size = 0;
2242 dma_addr_t dma_ptr = 0;
2243 void *cpu_ptr = NULL;
2244 int ret = -ENOMEM;
2245 int index = 0;
2246
2247 rx->ring_size = LAN743X_RX_RING_SIZE;
2248 if (rx->ring_size <= 1) {
2249 ret = -EINVAL;
2250 goto cleanup;
2251 }
2252 if (rx->ring_size & ~RX_CFG_B_RX_RING_LEN_MASK_) {
2253 ret = -EINVAL;
2254 goto cleanup;
2255 }
2256 ring_allocation_size = ALIGN(rx->ring_size *
2257 sizeof(struct lan743x_rx_descriptor),
2258 PAGE_SIZE);
2259 dma_ptr = 0;
2260 cpu_ptr = pci_zalloc_consistent(rx->adapter->pdev,
2261 ring_allocation_size, &dma_ptr);
2262 if (!cpu_ptr) {
2263 ret = -ENOMEM;
2264 goto cleanup;
2265 }
2266 rx->ring_allocation_size = ring_allocation_size;
2267 rx->ring_cpu_ptr = (struct lan743x_rx_descriptor *)cpu_ptr;
2268 rx->ring_dma_ptr = dma_ptr;
2269
2270 cpu_ptr = kcalloc(rx->ring_size, sizeof(*rx->buffer_info),
2271 GFP_KERNEL);
2272 if (!cpu_ptr) {
2273 ret = -ENOMEM;
2274 goto cleanup;
2275 }
2276 rx->buffer_info = (struct lan743x_rx_buffer_info *)cpu_ptr;
2277 dma_ptr = 0;
2278 cpu_ptr = pci_zalloc_consistent(rx->adapter->pdev,
2279 sizeof(*rx->head_cpu_ptr), &dma_ptr);
2280 if (!cpu_ptr) {
2281 ret = -ENOMEM;
2282 goto cleanup;
2283 }
2284
2285 rx->head_cpu_ptr = cpu_ptr;
2286 rx->head_dma_ptr = dma_ptr;
2287 if (rx->head_dma_ptr & 0x3) {
2288 ret = -ENOMEM;
2289 goto cleanup;
2290 }
2291
2292 rx->last_head = 0;
2293 for (index = 0; index < rx->ring_size; index++) {
2294 ret = lan743x_rx_allocate_ring_element(rx, index);
2295 if (ret)
2296 goto cleanup;
2297 }
2298 return 0;
2299
2300cleanup:
2301 lan743x_rx_ring_cleanup(rx);
2302 return ret;
2303}
2304
2305static void lan743x_rx_close(struct lan743x_rx *rx)
2306{
2307 struct lan743x_adapter *adapter = rx->adapter;
2308
2309 lan743x_csr_write(adapter, FCT_RX_CTL,
2310 FCT_RX_CTL_DIS_(rx->channel_number));
2311 lan743x_csr_wait_for_bit(adapter, FCT_RX_CTL,
2312 FCT_RX_CTL_EN_(rx->channel_number),
2313 0, 1000, 20000, 100);
2314
2315 lan743x_csr_write(adapter, DMAC_CMD,
2316 DMAC_CMD_STOP_R_(rx->channel_number));
2317 lan743x_dmac_rx_wait_till_stopped(adapter, rx->channel_number);
2318
2319 lan743x_csr_write(adapter, DMAC_INT_EN_CLR,
2320 DMAC_INT_BIT_RXFRM_(rx->channel_number));
2321 lan743x_csr_write(adapter, INT_EN_CLR,
2322 INT_BIT_DMA_RX_(rx->channel_number));
2323 napi_disable(&rx->napi);
2324
2325 netif_napi_del(&rx->napi);
2326
2327 lan743x_rx_ring_cleanup(rx);
2328}
2329
2330static int lan743x_rx_open(struct lan743x_rx *rx)
2331{
2332 struct lan743x_adapter *adapter = rx->adapter;
2333 u32 data = 0;
2334 int ret;
2335
2336 rx->frame_count = 0;
2337 ret = lan743x_rx_ring_init(rx);
2338 if (ret)
2339 goto return_error;
2340
2341 netif_napi_add(adapter->netdev,
2342 &rx->napi, lan743x_rx_napi_poll,
2343 rx->ring_size - 1);
2344
2345 lan743x_csr_write(adapter, DMAC_CMD,
2346 DMAC_CMD_RX_SWR_(rx->channel_number));
2347 lan743x_csr_wait_for_bit(adapter, DMAC_CMD,
2348 DMAC_CMD_RX_SWR_(rx->channel_number),
2349 0, 1000, 20000, 100);
2350
2351 /* set ring base address */
2352 lan743x_csr_write(adapter,
2353 RX_BASE_ADDRH(rx->channel_number),
2354 DMA_ADDR_HIGH32(rx->ring_dma_ptr));
2355 lan743x_csr_write(adapter,
2356 RX_BASE_ADDRL(rx->channel_number),
2357 DMA_ADDR_LOW32(rx->ring_dma_ptr));
2358
2359 /* set rx write back address */
2360 lan743x_csr_write(adapter,
2361 RX_HEAD_WRITEBACK_ADDRH(rx->channel_number),
2362 DMA_ADDR_HIGH32(rx->head_dma_ptr));
2363 lan743x_csr_write(adapter,
2364 RX_HEAD_WRITEBACK_ADDRL(rx->channel_number),
2365 DMA_ADDR_LOW32(rx->head_dma_ptr));
2366 data = RX_CFG_A_RX_HP_WB_EN_;
2367 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) {
2368 data |= (RX_CFG_A_RX_WB_ON_INT_TMR_ |
2369 RX_CFG_A_RX_WB_THRES_SET_(0x7) |
2370 RX_CFG_A_RX_PF_THRES_SET_(16) |
2371 RX_CFG_A_RX_PF_PRI_THRES_SET_(4));
2372 }
2373
2374 /* set RX_CFG_A */
2375 lan743x_csr_write(adapter,
2376 RX_CFG_A(rx->channel_number), data);
2377
2378 /* set RX_CFG_B */
2379 data = lan743x_csr_read(adapter, RX_CFG_B(rx->channel_number));
2380 data &= ~RX_CFG_B_RX_PAD_MASK_;
2381 if (!RX_HEAD_PADDING)
2382 data |= RX_CFG_B_RX_PAD_0_;
2383 else
2384 data |= RX_CFG_B_RX_PAD_2_;
2385 data &= ~RX_CFG_B_RX_RING_LEN_MASK_;
2386 data |= ((rx->ring_size) & RX_CFG_B_RX_RING_LEN_MASK_);
2387 data |= RX_CFG_B_TS_ALL_RX_;
2388 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0))
2389 data |= RX_CFG_B_RDMABL_512_;
2390
2391 lan743x_csr_write(adapter, RX_CFG_B(rx->channel_number), data);
2392 rx->vector_flags = lan743x_intr_get_vector_flags(adapter,
2393 INT_BIT_DMA_RX_
2394 (rx->channel_number));
2395
2396 /* set RX_CFG_C */
2397 data = 0;
2398 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR)
2399 data |= RX_CFG_C_RX_TOP_INT_EN_AUTO_CLR_;
2400 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR)
2401 data |= RX_CFG_C_RX_DMA_INT_STS_AUTO_CLR_;
2402 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C)
2403 data |= RX_CFG_C_RX_INT_STS_R2C_MODE_MASK_;
2404 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C)
2405 data |= RX_CFG_C_RX_INT_EN_R2C_;
2406 lan743x_csr_write(adapter, RX_CFG_C(rx->channel_number), data);
2407
2408 rx->last_tail = ((u32)(rx->ring_size - 1));
2409 lan743x_csr_write(adapter, RX_TAIL(rx->channel_number),
2410 rx->last_tail);
2411 rx->last_head = lan743x_csr_read(adapter, RX_HEAD(rx->channel_number));
2412 if (rx->last_head) {
2413 ret = -EIO;
2414 goto napi_delete;
2415 }
2416
2417 napi_enable(&rx->napi);
2418
2419 lan743x_csr_write(adapter, INT_EN_SET,
2420 INT_BIT_DMA_RX_(rx->channel_number));
2421 lan743x_csr_write(adapter, DMAC_INT_STS,
2422 DMAC_INT_BIT_RXFRM_(rx->channel_number));
2423 lan743x_csr_write(adapter, DMAC_INT_EN_SET,
2424 DMAC_INT_BIT_RXFRM_(rx->channel_number));
2425 lan743x_csr_write(adapter, DMAC_CMD,
2426 DMAC_CMD_START_R_(rx->channel_number));
2427
2428 /* initialize fifo */
2429 lan743x_csr_write(adapter, FCT_RX_CTL,
2430 FCT_RX_CTL_RESET_(rx->channel_number));
2431 lan743x_csr_wait_for_bit(adapter, FCT_RX_CTL,
2432 FCT_RX_CTL_RESET_(rx->channel_number),
2433 0, 1000, 20000, 100);
2434 lan743x_csr_write(adapter, FCT_FLOW(rx->channel_number),
2435 FCT_FLOW_CTL_REQ_EN_ |
2436 FCT_FLOW_CTL_ON_THRESHOLD_SET_(0x2A) |
2437 FCT_FLOW_CTL_OFF_THRESHOLD_SET_(0xA));
2438
2439 /* enable fifo */
2440 lan743x_csr_write(adapter, FCT_RX_CTL,
2441 FCT_RX_CTL_EN_(rx->channel_number));
2442 return 0;
2443
2444napi_delete:
2445 netif_napi_del(&rx->napi);
2446 lan743x_rx_ring_cleanup(rx);
2447
2448return_error:
2449 return ret;
2450}
2451
2452static int lan743x_netdev_close(struct net_device *netdev)
2453{
2454 struct lan743x_adapter *adapter = netdev_priv(netdev);
2455 int index;
2456
2457 lan743x_tx_close(&adapter->tx[0]);
2458
2459 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++)
2460 lan743x_rx_close(&adapter->rx[index]);
2461
07624df1
BW		 2462 lan743x_ptp_close(adapter);
2463
23f0703c
BW		 2464 lan743x_phy_close(adapter);
2465
2466 lan743x_mac_close(adapter);
2467
2468 lan743x_intr_close(adapter);
2469
2470 return 0;
2471}
2472
2473static int lan743x_netdev_open(struct net_device *netdev)
2474{
2475 struct lan743x_adapter *adapter = netdev_priv(netdev);
2476 int index;
2477 int ret;
2478
2479 ret = lan743x_intr_open(adapter);
2480 if (ret)
2481 goto return_error;
2482
2483 ret = lan743x_mac_open(adapter);
2484 if (ret)
2485 goto close_intr;
2486
2487 ret = lan743x_phy_open(adapter);
2488 if (ret)
2489 goto close_mac;
2490
07624df1
BW		 2491 ret = lan743x_ptp_open(adapter);
2492 if (ret)
2493 goto close_phy;
2494
43e8fe9b
BW		 2495 lan743x_rfe_open(adapter);
2496
23f0703c
BW		 2497 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) {
2498 ret = lan743x_rx_open(&adapter->rx[index]);
2499 if (ret)
2500 goto close_rx;
2501 }
2502
2503 ret = lan743x_tx_open(&adapter->tx[0]);
2504 if (ret)
2505 goto close_rx;
2506
2507 return 0;
2508
2509close_rx:
2510 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) {
2511 if (adapter->rx[index].ring_cpu_ptr)
2512 lan743x_rx_close(&adapter->rx[index]);
2513 }
07624df1
BW		 2514 lan743x_ptp_close(adapter);
2515
2516close_phy:
23f0703c
BW		 2517 lan743x_phy_close(adapter);
2518
2519close_mac:
2520 lan743x_mac_close(adapter);
2521
2522close_intr:
2523 lan743x_intr_close(adapter);
2524
2525return_error:
2526 netif_warn(adapter, ifup, adapter->netdev,
2527 "Error opening LAN743x\n");
2528 return ret;
2529}
2530
2531static netdev_tx_t lan743x_netdev_xmit_frame(struct sk_buff *skb,
2532 struct net_device *netdev)
2533{
2534 struct lan743x_adapter *adapter = netdev_priv(netdev);
2535
2536 return lan743x_tx_xmit_frame(&adapter->tx[0], skb);
2537}
2538
2539static int lan743x_netdev_ioctl(struct net_device *netdev,
2540 struct ifreq *ifr, int cmd)
2541{
2542 if (!netif_running(netdev))
2543 return -EINVAL;
07624df1
BW		 2544 if (cmd == SIOCSHWTSTAMP)
2545 return lan743x_ptp_ioctl(netdev, ifr, cmd);
23f0703c
BW		 2546 return phy_mii_ioctl(netdev->phydev, ifr, cmd);
2547}
2548
2549static void lan743x_netdev_set_multicast(struct net_device *netdev)
2550{
2551 struct lan743x_adapter *adapter = netdev_priv(netdev);
2552
2553 lan743x_rfe_set_multicast(adapter);
2554}
2555
2556static int lan743x_netdev_change_mtu(struct net_device *netdev, int new_mtu)
2557{
2558 struct lan743x_adapter *adapter = netdev_priv(netdev);
2559 int ret = 0;
2560
2561 ret = lan743x_mac_set_mtu(adapter, new_mtu);
2562 if (!ret)
2563 netdev->mtu = new_mtu;
2564 return ret;
2565}
2566
2567static void lan743x_netdev_get_stats64(struct net_device *netdev,
2568 struct rtnl_link_stats64 *stats)
2569{
2570 struct lan743x_adapter *adapter = netdev_priv(netdev);
2571
2572 stats->rx_packets = lan743x_csr_read(adapter, STAT_RX_TOTAL_FRAMES);
2573 stats->tx_packets = lan743x_csr_read(adapter, STAT_TX_TOTAL_FRAMES);
2574 stats->rx_bytes = lan743x_csr_read(adapter,
2575 STAT_RX_UNICAST_BYTE_COUNT) +
2576 lan743x_csr_read(adapter,
2577 STAT_RX_BROADCAST_BYTE_COUNT) +
2578 lan743x_csr_read(adapter,
2579 STAT_RX_MULTICAST_BYTE_COUNT);
2580 stats->tx_bytes = lan743x_csr_read(adapter,
2581 STAT_TX_UNICAST_BYTE_COUNT) +
2582 lan743x_csr_read(adapter,
2583 STAT_TX_BROADCAST_BYTE_COUNT) +
2584 lan743x_csr_read(adapter,
2585 STAT_TX_MULTICAST_BYTE_COUNT);
2586 stats->rx_errors = lan743x_csr_read(adapter, STAT_RX_FCS_ERRORS) +
2587 lan743x_csr_read(adapter,
2588 STAT_RX_ALIGNMENT_ERRORS) +
2589 lan743x_csr_read(adapter, STAT_RX_JABBER_ERRORS) +
2590 lan743x_csr_read(adapter,
2591 STAT_RX_UNDERSIZE_FRAME_ERRORS) +
2592 lan743x_csr_read(adapter,
2593 STAT_RX_OVERSIZE_FRAME_ERRORS);
2594 stats->tx_errors = lan743x_csr_read(adapter, STAT_TX_FCS_ERRORS) +
2595 lan743x_csr_read(adapter,
2596 STAT_TX_EXCESS_DEFERRAL_ERRORS) +
2597 lan743x_csr_read(adapter, STAT_TX_CARRIER_ERRORS);
2598 stats->rx_dropped = lan743x_csr_read(adapter,
2599 STAT_RX_DROPPED_FRAMES);
2600 stats->tx_dropped = lan743x_csr_read(adapter,
2601 STAT_TX_EXCESSIVE_COLLISION);
2602 stats->multicast = lan743x_csr_read(adapter,
2603 STAT_RX_MULTICAST_FRAMES) +
2604 lan743x_csr_read(adapter,
2605 STAT_TX_MULTICAST_FRAMES);
2606 stats->collisions = lan743x_csr_read(adapter,
2607 STAT_TX_SINGLE_COLLISIONS) +
2608 lan743x_csr_read(adapter,
2609 STAT_TX_MULTIPLE_COLLISIONS) +
2610 lan743x_csr_read(adapter,
2611 STAT_TX_LATE_COLLISIONS);
2612}
2613
2614static int lan743x_netdev_set_mac_address(struct net_device *netdev,
2615 void *addr)
2616{
2617 struct lan743x_adapter *adapter = netdev_priv(netdev);
2618 struct sockaddr *sock_addr = addr;
2619 int ret;
2620
2621 ret = eth_prepare_mac_addr_change(netdev, sock_addr);
2622 if (ret)
2623 return ret;
2624 ether_addr_copy(netdev->dev_addr, sock_addr->sa_data);
2625 lan743x_mac_set_address(adapter, sock_addr->sa_data);
2626 lan743x_rfe_update_mac_address(adapter);
2627 return 0;
2628}
2629
2630static const struct net_device_ops lan743x_netdev_ops = {
2631 .ndo_open = lan743x_netdev_open,
2632 .ndo_stop = lan743x_netdev_close,
2633 .ndo_start_xmit = lan743x_netdev_xmit_frame,
2634 .ndo_do_ioctl = lan743x_netdev_ioctl,
2635 .ndo_set_rx_mode = lan743x_netdev_set_multicast,
2636 .ndo_change_mtu = lan743x_netdev_change_mtu,
2637 .ndo_get_stats64 = lan743x_netdev_get_stats64,
2638 .ndo_set_mac_address = lan743x_netdev_set_mac_address,
2639};
2640
2641static void lan743x_hardware_cleanup(struct lan743x_adapter *adapter)
2642{
2643 lan743x_csr_write(adapter, INT_EN_CLR, 0xFFFFFFFF);
2644}
2645
2646static void lan743x_mdiobus_cleanup(struct lan743x_adapter *adapter)
2647{
2648 mdiobus_unregister(adapter->mdiobus);
2649}
2650
2651static void lan743x_full_cleanup(struct lan743x_adapter *adapter)
2652{
2653 unregister_netdev(adapter->netdev);
2654
2655 lan743x_mdiobus_cleanup(adapter);
2656 lan743x_hardware_cleanup(adapter);
2657 lan743x_pci_cleanup(adapter);
2658}
2659
2660static int lan743x_hardware_init(struct lan743x_adapter *adapter,
2661 struct pci_dev *pdev)
2662{
2663 struct lan743x_tx *tx;
2664 int index;
2665 int ret;
2666
2667 adapter->intr.irq = adapter->pdev->irq;
2668 lan743x_csr_write(adapter, INT_EN_CLR, 0xFFFFFFFF);
2669 mutex_init(&adapter->dp_lock);
07624df1
BW		 2670
2671 ret = lan743x_gpio_init(adapter);
2672 if (ret)
2673 return ret;
2674
23f0703c
BW		 2675 ret = lan743x_mac_init(adapter);
2676 if (ret)
2677 return ret;
2678
2679 ret = lan743x_phy_init(adapter);
2680 if (ret)
2681 return ret;
2682
07624df1
BW		 2683 ret = lan743x_ptp_init(adapter);
2684 if (ret)
2685 return ret;
2686
23f0703c
BW		 2687 lan743x_rfe_update_mac_address(adapter);
2688
2689 ret = lan743x_dmac_init(adapter);
2690 if (ret)
2691 return ret;
2692
2693 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) {
2694 adapter->rx[index].adapter = adapter;
2695 adapter->rx[index].channel_number = index;
2696 }
2697
2698 tx = &adapter->tx[0];
2699 tx->adapter = adapter;
2700 tx->channel_number = 0;
2701 spin_lock_init(&tx->ring_lock);
2702 return 0;
2703}
2704
2705static int lan743x_mdiobus_init(struct lan743x_adapter *adapter)
2706{
2707 int ret;
2708
2709 adapter->mdiobus = devm_mdiobus_alloc(&adapter->pdev->dev);
2710 if (!(adapter->mdiobus)) {
2711 ret = -ENOMEM;
2712 goto return_error;
2713 }
2714
2715 adapter->mdiobus->priv = (void *)adapter;
2716 adapter->mdiobus->read = lan743x_mdiobus_read;
2717 adapter->mdiobus->write = lan743x_mdiobus_write;
2718 adapter->mdiobus->name = "lan743x-mdiobus";
2719 snprintf(adapter->mdiobus->id, MII_BUS_ID_SIZE,
2720 "pci-%s", pci_name(adapter->pdev));
2721
2722 /* set to internal PHY id */
2723 adapter->mdiobus->phy_mask = ~(u32)BIT(1);
2724
2725 /* register mdiobus */
2726 ret = mdiobus_register(adapter->mdiobus);
2727 if (ret < 0)
2728 goto return_error;
2729 return 0;
2730
2731return_error:
2732 return ret;
2733}
2734
2735/* lan743x_pcidev_probe - Device Initialization Routine
2736 * @pdev: PCI device information struct
2737 * @id: entry in lan743x_pci_tbl
2738 *
2739 * Returns 0 on success, negative on failure
2740 *
2741 * initializes an adapter identified by a pci_dev structure.
2742 * The OS initialization, configuring of the adapter private structure,
2743 * and a hardware reset occur.
2744 **/
2745static int lan743x_pcidev_probe(struct pci_dev *pdev,
2746 const struct pci_device_id *id)
2747{
2748 struct lan743x_adapter *adapter = NULL;
2749 struct net_device *netdev = NULL;
2750 int ret = -ENODEV;
2751
2752 netdev = devm_alloc_etherdev(&pdev->dev,
2753 sizeof(struct lan743x_adapter));
2754 if (!netdev)
2755 goto return_error;
2756
2757 SET_NETDEV_DEV(netdev, &pdev->dev);
2758 pci_set_drvdata(pdev, netdev);
2759 adapter = netdev_priv(netdev);
2760 adapter->netdev = netdev;
2761 adapter->msg_enable = NETIF_MSG_DRV | NETIF_MSG_PROBE |
2762 NETIF_MSG_LINK | NETIF_MSG_IFUP |
2763 NETIF_MSG_IFDOWN | NETIF_MSG_TX_QUEUED;
2764 netdev->max_mtu = LAN743X_MAX_FRAME_SIZE;
2765
2766 ret = lan743x_pci_init(adapter, pdev);
2767 if (ret)
2768 goto return_error;
2769
2770 ret = lan743x_csr_init(adapter);
2771 if (ret)
2772 goto cleanup_pci;
2773
2774 ret = lan743x_hardware_init(adapter, pdev);
2775 if (ret)
2776 goto cleanup_pci;
2777
2778 ret = lan743x_mdiobus_init(adapter);
2779 if (ret)
2780 goto cleanup_hardware;
2781
2782 adapter->netdev->netdev_ops = &lan743x_netdev_ops;
0cf63226 2783 adapter->netdev->ethtool_ops = &lan743x_ethtool_ops;
23f0703c
BW		 2784 adapter->netdev->features = NETIF_F_SG | NETIF_F_TSO | NETIF_F_HW_CSUM;
2785 adapter->netdev->hw_features = adapter->netdev->features;
2786
2787 /* carrier off reporting is important to ethtool even BEFORE open */
2788 netif_carrier_off(netdev);
2789
2790 ret = register_netdev(adapter->netdev);
2791 if (ret < 0)
2792 goto cleanup_mdiobus;
2793 return 0;
2794
2795cleanup_mdiobus:
2796 lan743x_mdiobus_cleanup(adapter);
2797
2798cleanup_hardware:
2799 lan743x_hardware_cleanup(adapter);
2800
2801cleanup_pci:
2802 lan743x_pci_cleanup(adapter);
2803
2804return_error:
2805 pr_warn("Initialization failed\n");
2806 return ret;
2807}
2808
2809/**
2810 * lan743x_pcidev_remove - Device Removal Routine
2811 * @pdev: PCI device information struct
2812 *
2813 * this is called by the PCI subsystem to alert the driver
2814 * that it should release a PCI device. This could be caused by a
2815 * Hot-Plug event, or because the driver is going to be removed from
2816 * memory.
2817 **/
2818static void lan743x_pcidev_remove(struct pci_dev *pdev)
2819{
2820 struct net_device *netdev = pci_get_drvdata(pdev);
2821 struct lan743x_adapter *adapter = netdev_priv(netdev);
2822
2823 lan743x_full_cleanup(adapter);
2824}
2825
2826static void lan743x_pcidev_shutdown(struct pci_dev *pdev)
2827{
2828 struct net_device *netdev = pci_get_drvdata(pdev);
2829 struct lan743x_adapter *adapter = netdev_priv(netdev);
2830
2831 rtnl_lock();
2832 netif_device_detach(netdev);
2833
2834 /* close netdev when netdev is at running state.
2835 * For instance, it is true when system goes to sleep by pm-suspend
2836 * However, it is false when system goes to sleep by suspend GUI menu
2837 */
2838 if (netif_running(netdev))
2839 lan743x_netdev_close(netdev);
2840 rtnl_unlock();
2841
4d94282a
BW		 2842#ifdef CONFIG_PM
2843 pci_save_state(pdev);
2844#endif
2845
23f0703c
BW		 2846 /* clean up lan743x portion */
2847 lan743x_hardware_cleanup(adapter);
2848}
2849
4d94282a
BW		 2850#ifdef CONFIG_PM
2851static u16 lan743x_pm_wakeframe_crc16(const u8 *buf, int len)
2852{
2853 return bitrev16(crc16(0xFFFF, buf, len));
2854}
2855
2856static void lan743x_pm_set_wol(struct lan743x_adapter *adapter)
2857{
2858 const u8 ipv4_multicast[3] = { 0x01, 0x00, 0x5E };
2859 const u8 ipv6_multicast[3] = { 0x33, 0x33 };
2860 const u8 arp_type[2] = { 0x08, 0x06 };
2861 int mask_index;
2862 u32 pmtctl;
2863 u32 wucsr;
2864 u32 macrx;
2865 u16 crc;
2866
2867 for (mask_index = 0; mask_index < MAC_NUM_OF_WUF_CFG; mask_index++)
2868 lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index), 0);
2869
2870 /* clear wake settings */
2871 pmtctl = lan743x_csr_read(adapter, PMT_CTL);
2872 pmtctl |= PMT_CTL_WUPS_MASK_;
2873 pmtctl &= ~(PMT_CTL_GPIO_WAKEUP_EN_ | PMT_CTL_EEE_WAKEUP_EN_ |
2874 PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_ |
2875 PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_ | PMT_CTL_ETH_PHY_WAKE_EN_);
2876
2877 macrx = lan743x_csr_read(adapter, MAC_RX);
2878
2879 wucsr = 0;
2880 mask_index = 0;
2881
2882 pmtctl |= PMT_CTL_ETH_PHY_D3_COLD_OVR_ | PMT_CTL_ETH_PHY_D3_OVR_;
2883
2884 if (adapter->wolopts & WAKE_PHY) {
2885 pmtctl |= PMT_CTL_ETH_PHY_EDPD_PLL_CTL_;
2886 pmtctl |= PMT_CTL_ETH_PHY_WAKE_EN_;
2887 }
2888 if (adapter->wolopts & WAKE_MAGIC) {
2889 wucsr |= MAC_WUCSR_MPEN_;
2890 macrx |= MAC_RX_RXEN_;
2891 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_;
2892 }
2893 if (adapter->wolopts & WAKE_UCAST) {
2894 wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_PFDA_EN_;
2895 macrx |= MAC_RX_RXEN_;
2896 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_;
2897 pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_;
2898 }
2899 if (adapter->wolopts & WAKE_BCAST) {
2900 wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_BCST_EN_;
2901 macrx |= MAC_RX_RXEN_;
2902 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_;
2903 pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_;
2904 }
2905 if (adapter->wolopts & WAKE_MCAST) {
2906 /* IPv4 multicast */
2907 crc = lan743x_pm_wakeframe_crc16(ipv4_multicast, 3);
2908 lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index),
2909 MAC_WUF_CFG_EN_ | MAC_WUF_CFG_TYPE_MCAST_ |
2910 (0 << MAC_WUF_CFG_OFFSET_SHIFT_) |
2911 (crc & MAC_WUF_CFG_CRC16_MASK_));
2912 lan743x_csr_write(adapter, MAC_WUF_MASK0(mask_index), 7);
2913 lan743x_csr_write(adapter, MAC_WUF_MASK1(mask_index), 0);
2914 lan743x_csr_write(adapter, MAC_WUF_MASK2(mask_index), 0);
2915 lan743x_csr_write(adapter, MAC_WUF_MASK3(mask_index), 0);
2916 mask_index++;
2917
2918 /* IPv6 multicast */
2919 crc = lan743x_pm_wakeframe_crc16(ipv6_multicast, 2);
2920 lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index),
2921 MAC_WUF_CFG_EN_ | MAC_WUF_CFG_TYPE_MCAST_ |
2922 (0 << MAC_WUF_CFG_OFFSET_SHIFT_) |
2923 (crc & MAC_WUF_CFG_CRC16_MASK_));
2924 lan743x_csr_write(adapter, MAC_WUF_MASK0(mask_index), 3);
2925 lan743x_csr_write(adapter, MAC_WUF_MASK1(mask_index), 0);
2926 lan743x_csr_write(adapter, MAC_WUF_MASK2(mask_index), 0);
2927 lan743x_csr_write(adapter, MAC_WUF_MASK3(mask_index), 0);
2928 mask_index++;
2929
2930 wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_WAKE_EN_;
2931 macrx |= MAC_RX_RXEN_;
2932 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_;
2933 pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_;
2934 }
2935 if (adapter->wolopts & WAKE_ARP) {
2936 /* set MAC_WUF_CFG & WUF_MASK
2937 * for packettype (offset 12,13) = ARP (0x0806)
2938 */
2939 crc = lan743x_pm_wakeframe_crc16(arp_type, 2);
2940 lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index),
2941 MAC_WUF_CFG_EN_ | MAC_WUF_CFG_TYPE_ALL_ |
2942 (0 << MAC_WUF_CFG_OFFSET_SHIFT_) |
2943 (crc & MAC_WUF_CFG_CRC16_MASK_));
2944 lan743x_csr_write(adapter, MAC_WUF_MASK0(mask_index), 0x3000);
2945 lan743x_csr_write(adapter, MAC_WUF_MASK1(mask_index), 0);
2946 lan743x_csr_write(adapter, MAC_WUF_MASK2(mask_index), 0);
2947 lan743x_csr_write(adapter, MAC_WUF_MASK3(mask_index), 0);
2948 mask_index++;
2949
2950 wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_WAKE_EN_;
2951 macrx |= MAC_RX_RXEN_;
2952 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_;
2953 pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_;
2954 }
2955
2956 lan743x_csr_write(adapter, MAC_WUCSR, wucsr);
2957 lan743x_csr_write(adapter, PMT_CTL, pmtctl);
2958 lan743x_csr_write(adapter, MAC_RX, macrx);
2959}
2960
2961static int lan743x_pm_suspend(struct device *dev)
2962{
2963 struct pci_dev *pdev = to_pci_dev(dev);
2964 struct net_device *netdev = pci_get_drvdata(pdev);
2965 struct lan743x_adapter *adapter = netdev_priv(netdev);
2966 int ret;
2967
2968 lan743x_pcidev_shutdown(pdev);
2969
2970 /* clear all wakes */
2971 lan743x_csr_write(adapter, MAC_WUCSR, 0);
2972 lan743x_csr_write(adapter, MAC_WUCSR2, 0);
2973 lan743x_csr_write(adapter, MAC_WK_SRC, 0xFFFFFFFF);
2974
2975 if (adapter->wolopts)
2976 lan743x_pm_set_wol(adapter);
2977
2978 /* Host sets PME_En, put D3hot */
2979 ret = pci_prepare_to_sleep(pdev);
2980
2981 return 0;
2982}
2983
2984static int lan743x_pm_resume(struct device *dev)
2985{
2986 struct pci_dev *pdev = to_pci_dev(dev);
2987 struct net_device *netdev = pci_get_drvdata(pdev);
2988 struct lan743x_adapter *adapter = netdev_priv(netdev);
2989 int ret;
2990
2991 pci_set_power_state(pdev, PCI_D0);
2992 pci_restore_state(pdev);
2993 pci_save_state(pdev);
2994
2995 ret = lan743x_hardware_init(adapter, pdev);
2996 if (ret) {
2997 netif_err(adapter, probe, adapter->netdev,
2998 "lan743x_hardware_init returned %d\n", ret);
2999 }
3000
3001 /* open netdev when netdev is at running state while resume.
3002 * For instance, it is true when system wakesup after pm-suspend
3003 * However, it is false when system wakes up after suspend GUI menu
3004 */
3005 if (netif_running(netdev))
3006 lan743x_netdev_open(netdev);
3007
3008 netif_device_attach(netdev);
3009
3010 return 0;
3011}
3012
41147bb1 3013static const struct dev_pm_ops lan743x_pm_ops = {
4d94282a
BW		 3014 SET_SYSTEM_SLEEP_PM_OPS(lan743x_pm_suspend, lan743x_pm_resume)
3015};
3016#endif /*CONFIG_PM */
3017
23f0703c
BW		 3018static const struct pci_device_id lan743x_pcidev_tbl[] = {
3019 { PCI_DEVICE(PCI_VENDOR_ID_SMSC, PCI_DEVICE_ID_SMSC_LAN7430) },
3020 { 0, }
3021};
3022
3023static struct pci_driver lan743x_pcidev_driver = {
3024 .name = DRIVER_NAME,
3025 .id_table = lan743x_pcidev_tbl,
3026 .probe = lan743x_pcidev_probe,
3027 .remove = lan743x_pcidev_remove,
4d94282a
BW		 3028#ifdef CONFIG_PM
3029 .driver.pm = &lan743x_pm_ops,
3030#endif
23f0703c
BW		 3031 .shutdown = lan743x_pcidev_shutdown,
3032};
3033
3034module_pci_driver(lan743x_pcidev_driver);
3035
3036MODULE_AUTHOR(DRIVER_AUTHOR);
3037MODULE_DESCRIPTION(DRIVER_DESC);
3038MODULE_LICENSE("GPL");
Linux 6.x block layer and io_uring tree(s)