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3396c782 | 1 | /* drivers/net/ethernet/micrel/ks8851.c |
3ba81f3e BD |
2 | * |
3 | * Copyright 2009 Simtec Electronics | |
4 | * http://www.simtec.co.uk/ | |
5 | * Ben Dooks <ben@simtec.co.uk> | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | */ | |
11 | ||
0dc7d2b3 JP |
12 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
13 | ||
3ba81f3e BD |
14 | #define DEBUG |
15 | ||
a6b7a407 | 16 | #include <linux/interrupt.h> |
3ba81f3e BD |
17 | #include <linux/module.h> |
18 | #include <linux/kernel.h> | |
19 | #include <linux/netdevice.h> | |
20 | #include <linux/etherdevice.h> | |
21 | #include <linux/ethtool.h> | |
22 | #include <linux/cache.h> | |
23 | #include <linux/crc32.h> | |
24 | #include <linux/mii.h> | |
51b7b1c3 | 25 | #include <linux/eeprom_93cx6.h> |
3ba81f3e BD |
26 | |
27 | #include <linux/spi/spi.h> | |
28 | ||
29 | #include "ks8851.h" | |
30 | ||
31 | /** | |
32 | * struct ks8851_rxctrl - KS8851 driver rx control | |
33 | * @mchash: Multicast hash-table data. | |
34 | * @rxcr1: KS_RXCR1 register setting | |
35 | * @rxcr2: KS_RXCR2 register setting | |
36 | * | |
37 | * Representation of the settings needs to control the receive filtering | |
38 | * such as the multicast hash-filter and the receive register settings. This | |
39 | * is used to make the job of working out if the receive settings change and | |
40 | * then issuing the new settings to the worker that will send the necessary | |
41 | * commands. | |
42 | */ | |
43 | struct ks8851_rxctrl { | |
44 | u16 mchash[4]; | |
45 | u16 rxcr1; | |
46 | u16 rxcr2; | |
47 | }; | |
48 | ||
49 | /** | |
50 | * union ks8851_tx_hdr - tx header data | |
51 | * @txb: The header as bytes | |
52 | * @txw: The header as 16bit, little-endian words | |
53 | * | |
54 | * A dual representation of the tx header data to allow | |
55 | * access to individual bytes, and to allow 16bit accesses | |
56 | * with 16bit alignment. | |
57 | */ | |
58 | union ks8851_tx_hdr { | |
59 | u8 txb[6]; | |
60 | __le16 txw[3]; | |
61 | }; | |
62 | ||
63 | /** | |
64 | * struct ks8851_net - KS8851 driver private data | |
65 | * @netdev: The network device we're bound to | |
66 | * @spidev: The spi device we're bound to. | |
67 | * @lock: Lock to ensure that the device is not accessed when busy. | |
68 | * @statelock: Lock on this structure for tx list. | |
69 | * @mii: The MII state information for the mii calls. | |
70 | * @rxctrl: RX settings for @rxctrl_work. | |
71 | * @tx_work: Work queue for tx packets | |
72 | * @irq_work: Work queue for servicing interrupts | |
73 | * @rxctrl_work: Work queue for updating RX mode and multicast lists | |
74 | * @txq: Queue of packets for transmission. | |
75 | * @spi_msg1: pre-setup SPI transfer with one message, @spi_xfer1. | |
76 | * @spi_msg2: pre-setup SPI transfer with two messages, @spi_xfer2. | |
77 | * @txh: Space for generating packet TX header in DMA-able data | |
78 | * @rxd: Space for receiving SPI data, in DMA-able space. | |
79 | * @txd: Space for transmitting SPI data, in DMA-able space. | |
80 | * @msg_enable: The message flags controlling driver output (see ethtool). | |
81 | * @fid: Incrementing frame id tag. | |
82 | * @rc_ier: Cached copy of KS_IER. | |
7d997466 | 83 | * @rc_ccr: Cached copy of KS_CCR. |
3ba81f3e | 84 | * @rc_rxqcr: Cached copy of KS_RXQCR. |
7d997466 | 85 | * @eeprom_size: Companion eeprom size in Bytes, 0 if no eeprom |
51b7b1c3 | 86 | * @eeprom: 93CX6 EEPROM state for accessing on-board EEPROM. |
3ba81f3e BD |
87 | * |
88 | * The @lock ensures that the chip is protected when certain operations are | |
89 | * in progress. When the read or write packet transfer is in progress, most | |
90 | * of the chip registers are not ccessible until the transfer is finished and | |
91 | * the DMA has been de-asserted. | |
92 | * | |
93 | * The @statelock is used to protect information in the structure which may | |
94 | * need to be accessed via several sources, such as the network driver layer | |
95 | * or one of the work queues. | |
96 | * | |
97 | * We align the buffers we may use for rx/tx to ensure that if the SPI driver | |
98 | * wants to DMA map them, it will not have any problems with data the driver | |
99 | * modifies. | |
100 | */ | |
101 | struct ks8851_net { | |
102 | struct net_device *netdev; | |
103 | struct spi_device *spidev; | |
104 | struct mutex lock; | |
105 | spinlock_t statelock; | |
106 | ||
107 | union ks8851_tx_hdr txh ____cacheline_aligned; | |
108 | u8 rxd[8]; | |
109 | u8 txd[8]; | |
110 | ||
111 | u32 msg_enable ____cacheline_aligned; | |
112 | u16 tx_space; | |
113 | u8 fid; | |
114 | ||
115 | u16 rc_ier; | |
116 | u16 rc_rxqcr; | |
7d997466 SJ |
117 | u16 rc_ccr; |
118 | u16 eeprom_size; | |
3ba81f3e BD |
119 | |
120 | struct mii_if_info mii; | |
121 | struct ks8851_rxctrl rxctrl; | |
122 | ||
123 | struct work_struct tx_work; | |
124 | struct work_struct irq_work; | |
125 | struct work_struct rxctrl_work; | |
126 | ||
127 | struct sk_buff_head txq; | |
128 | ||
129 | struct spi_message spi_msg1; | |
130 | struct spi_message spi_msg2; | |
131 | struct spi_transfer spi_xfer1; | |
132 | struct spi_transfer spi_xfer2[2]; | |
51b7b1c3 BD |
133 | |
134 | struct eeprom_93cx6 eeprom; | |
3ba81f3e BD |
135 | }; |
136 | ||
137 | static int msg_enable; | |
138 | ||
3ba81f3e BD |
139 | /* shift for byte-enable data */ |
140 | #define BYTE_EN(_x) ((_x) << 2) | |
141 | ||
142 | /* turn register number and byte-enable mask into data for start of packet */ | |
143 | #define MK_OP(_byteen, _reg) (BYTE_EN(_byteen) | (_reg) << (8+2) | (_reg) >> 6) | |
144 | ||
145 | /* SPI register read/write calls. | |
146 | * | |
147 | * All these calls issue SPI transactions to access the chip's registers. They | |
148 | * all require that the necessary lock is held to prevent accesses when the | |
25985edc | 149 | * chip is busy transferring packet data (RX/TX FIFO accesses). |
3ba81f3e BD |
150 | */ |
151 | ||
152 | /** | |
153 | * ks8851_wrreg16 - write 16bit register value to chip | |
154 | * @ks: The chip state | |
155 | * @reg: The register address | |
156 | * @val: The value to write | |
157 | * | |
158 | * Issue a write to put the value @val into the register specified in @reg. | |
159 | */ | |
160 | static void ks8851_wrreg16(struct ks8851_net *ks, unsigned reg, unsigned val) | |
161 | { | |
162 | struct spi_transfer *xfer = &ks->spi_xfer1; | |
163 | struct spi_message *msg = &ks->spi_msg1; | |
164 | __le16 txb[2]; | |
165 | int ret; | |
166 | ||
167 | txb[0] = cpu_to_le16(MK_OP(reg & 2 ? 0xC : 0x03, reg) | KS_SPIOP_WR); | |
168 | txb[1] = cpu_to_le16(val); | |
169 | ||
170 | xfer->tx_buf = txb; | |
171 | xfer->rx_buf = NULL; | |
172 | xfer->len = 4; | |
173 | ||
174 | ret = spi_sync(ks->spidev, msg); | |
175 | if (ret < 0) | |
0dc7d2b3 | 176 | netdev_err(ks->netdev, "spi_sync() failed\n"); |
3ba81f3e BD |
177 | } |
178 | ||
160d0fad BD |
179 | /** |
180 | * ks8851_wrreg8 - write 8bit register value to chip | |
181 | * @ks: The chip state | |
182 | * @reg: The register address | |
183 | * @val: The value to write | |
184 | * | |
185 | * Issue a write to put the value @val into the register specified in @reg. | |
186 | */ | |
187 | static void ks8851_wrreg8(struct ks8851_net *ks, unsigned reg, unsigned val) | |
188 | { | |
189 | struct spi_transfer *xfer = &ks->spi_xfer1; | |
190 | struct spi_message *msg = &ks->spi_msg1; | |
191 | __le16 txb[2]; | |
192 | int ret; | |
193 | int bit; | |
194 | ||
195 | bit = 1 << (reg & 3); | |
196 | ||
197 | txb[0] = cpu_to_le16(MK_OP(bit, reg) | KS_SPIOP_WR); | |
198 | txb[1] = val; | |
199 | ||
200 | xfer->tx_buf = txb; | |
201 | xfer->rx_buf = NULL; | |
202 | xfer->len = 3; | |
203 | ||
204 | ret = spi_sync(ks->spidev, msg); | |
205 | if (ret < 0) | |
0dc7d2b3 | 206 | netdev_err(ks->netdev, "spi_sync() failed\n"); |
160d0fad BD |
207 | } |
208 | ||
3ba81f3e BD |
209 | /** |
210 | * ks8851_rx_1msg - select whether to use one or two messages for spi read | |
211 | * @ks: The device structure | |
212 | * | |
213 | * Return whether to generate a single message with a tx and rx buffer | |
214 | * supplied to spi_sync(), or alternatively send the tx and rx buffers | |
215 | * as separate messages. | |
216 | * | |
217 | * Depending on the hardware in use, a single message may be more efficient | |
218 | * on interrupts or work done by the driver. | |
219 | * | |
220 | * This currently always returns true until we add some per-device data passed | |
221 | * from the platform code to specify which mode is better. | |
222 | */ | |
223 | static inline bool ks8851_rx_1msg(struct ks8851_net *ks) | |
224 | { | |
225 | return true; | |
226 | } | |
227 | ||
228 | /** | |
229 | * ks8851_rdreg - issue read register command and return the data | |
230 | * @ks: The device state | |
231 | * @op: The register address and byte enables in message format. | |
232 | * @rxb: The RX buffer to return the result into | |
233 | * @rxl: The length of data expected. | |
234 | * | |
235 | * This is the low level read call that issues the necessary spi message(s) | |
236 | * to read data from the register specified in @op. | |
237 | */ | |
238 | static void ks8851_rdreg(struct ks8851_net *ks, unsigned op, | |
239 | u8 *rxb, unsigned rxl) | |
240 | { | |
241 | struct spi_transfer *xfer; | |
242 | struct spi_message *msg; | |
243 | __le16 *txb = (__le16 *)ks->txd; | |
244 | u8 *trx = ks->rxd; | |
245 | int ret; | |
246 | ||
247 | txb[0] = cpu_to_le16(op | KS_SPIOP_RD); | |
248 | ||
249 | if (ks8851_rx_1msg(ks)) { | |
250 | msg = &ks->spi_msg1; | |
251 | xfer = &ks->spi_xfer1; | |
252 | ||
253 | xfer->tx_buf = txb; | |
254 | xfer->rx_buf = trx; | |
255 | xfer->len = rxl + 2; | |
256 | } else { | |
257 | msg = &ks->spi_msg2; | |
258 | xfer = ks->spi_xfer2; | |
259 | ||
260 | xfer->tx_buf = txb; | |
261 | xfer->rx_buf = NULL; | |
262 | xfer->len = 2; | |
263 | ||
264 | xfer++; | |
265 | xfer->tx_buf = NULL; | |
266 | xfer->rx_buf = trx; | |
267 | xfer->len = rxl; | |
268 | } | |
269 | ||
270 | ret = spi_sync(ks->spidev, msg); | |
271 | if (ret < 0) | |
0dc7d2b3 | 272 | netdev_err(ks->netdev, "read: spi_sync() failed\n"); |
3ba81f3e BD |
273 | else if (ks8851_rx_1msg(ks)) |
274 | memcpy(rxb, trx + 2, rxl); | |
275 | else | |
276 | memcpy(rxb, trx, rxl); | |
277 | } | |
278 | ||
279 | /** | |
280 | * ks8851_rdreg8 - read 8 bit register from device | |
281 | * @ks: The chip information | |
282 | * @reg: The register address | |
283 | * | |
284 | * Read a 8bit register from the chip, returning the result | |
285 | */ | |
286 | static unsigned ks8851_rdreg8(struct ks8851_net *ks, unsigned reg) | |
287 | { | |
288 | u8 rxb[1]; | |
289 | ||
290 | ks8851_rdreg(ks, MK_OP(1 << (reg & 3), reg), rxb, 1); | |
291 | return rxb[0]; | |
292 | } | |
293 | ||
294 | /** | |
295 | * ks8851_rdreg16 - read 16 bit register from device | |
296 | * @ks: The chip information | |
297 | * @reg: The register address | |
298 | * | |
299 | * Read a 16bit register from the chip, returning the result | |
300 | */ | |
301 | static unsigned ks8851_rdreg16(struct ks8851_net *ks, unsigned reg) | |
302 | { | |
303 | __le16 rx = 0; | |
304 | ||
305 | ks8851_rdreg(ks, MK_OP(reg & 2 ? 0xC : 0x3, reg), (u8 *)&rx, 2); | |
306 | return le16_to_cpu(rx); | |
307 | } | |
308 | ||
309 | /** | |
310 | * ks8851_rdreg32 - read 32 bit register from device | |
311 | * @ks: The chip information | |
312 | * @reg: The register address | |
313 | * | |
314 | * Read a 32bit register from the chip. | |
315 | * | |
316 | * Note, this read requires the address be aligned to 4 bytes. | |
317 | */ | |
318 | static unsigned ks8851_rdreg32(struct ks8851_net *ks, unsigned reg) | |
319 | { | |
320 | __le32 rx = 0; | |
321 | ||
322 | WARN_ON(reg & 3); | |
323 | ||
324 | ks8851_rdreg(ks, MK_OP(0xf, reg), (u8 *)&rx, 4); | |
325 | return le32_to_cpu(rx); | |
326 | } | |
327 | ||
328 | /** | |
329 | * ks8851_soft_reset - issue one of the soft reset to the device | |
330 | * @ks: The device state. | |
331 | * @op: The bit(s) to set in the GRR | |
332 | * | |
333 | * Issue the relevant soft-reset command to the device's GRR register | |
334 | * specified by @op. | |
335 | * | |
336 | * Note, the delays are in there as a caution to ensure that the reset | |
337 | * has time to take effect and then complete. Since the datasheet does | |
338 | * not currently specify the exact sequence, we have chosen something | |
339 | * that seems to work with our device. | |
340 | */ | |
341 | static void ks8851_soft_reset(struct ks8851_net *ks, unsigned op) | |
342 | { | |
343 | ks8851_wrreg16(ks, KS_GRR, op); | |
344 | mdelay(1); /* wait a short time to effect reset */ | |
345 | ks8851_wrreg16(ks, KS_GRR, 0); | |
346 | mdelay(1); /* wait for condition to clear */ | |
347 | } | |
348 | ||
32f160d9 TH |
349 | /** |
350 | * ks8851_set_powermode - set power mode of the device | |
351 | * @ks: The device state | |
352 | * @pwrmode: The power mode value to write to KS_PMECR. | |
353 | * | |
354 | * Change the power mode of the chip. | |
355 | */ | |
356 | static void ks8851_set_powermode(struct ks8851_net *ks, unsigned pwrmode) | |
357 | { | |
358 | unsigned pmecr; | |
359 | ||
360 | netif_dbg(ks, hw, ks->netdev, "setting power mode %d\n", pwrmode); | |
361 | ||
362 | pmecr = ks8851_rdreg16(ks, KS_PMECR); | |
363 | pmecr &= ~PMECR_PM_MASK; | |
364 | pmecr |= pwrmode; | |
365 | ||
366 | ks8851_wrreg16(ks, KS_PMECR, pmecr); | |
367 | } | |
368 | ||
3ba81f3e BD |
369 | /** |
370 | * ks8851_write_mac_addr - write mac address to device registers | |
371 | * @dev: The network device | |
372 | * | |
373 | * Update the KS8851 MAC address registers from the address in @dev. | |
374 | * | |
375 | * This call assumes that the chip is not running, so there is no need to | |
376 | * shutdown the RXQ process whilst setting this. | |
377 | */ | |
378 | static int ks8851_write_mac_addr(struct net_device *dev) | |
379 | { | |
380 | struct ks8851_net *ks = netdev_priv(dev); | |
160d0fad | 381 | int i; |
3ba81f3e BD |
382 | |
383 | mutex_lock(&ks->lock); | |
384 | ||
32f160d9 TH |
385 | /* |
386 | * Wake up chip in case it was powered off when stopped; otherwise, | |
387 | * the first write to the MAC address does not take effect. | |
388 | */ | |
389 | ks8851_set_powermode(ks, PMECR_PM_NORMAL); | |
160d0fad BD |
390 | for (i = 0; i < ETH_ALEN; i++) |
391 | ks8851_wrreg8(ks, KS_MAR(i), dev->dev_addr[i]); | |
32f160d9 TH |
392 | if (!netif_running(dev)) |
393 | ks8851_set_powermode(ks, PMECR_PM_SOFTDOWN); | |
3ba81f3e BD |
394 | |
395 | mutex_unlock(&ks->lock); | |
396 | ||
397 | return 0; | |
398 | } | |
399 | ||
a9a8de21 BD |
400 | /** |
401 | * ks8851_read_mac_addr - read mac address from device registers | |
402 | * @dev: The network device | |
403 | * | |
404 | * Update our copy of the KS8851 MAC address from the registers of @dev. | |
405 | */ | |
406 | static void ks8851_read_mac_addr(struct net_device *dev) | |
407 | { | |
408 | struct ks8851_net *ks = netdev_priv(dev); | |
409 | int i; | |
410 | ||
411 | mutex_lock(&ks->lock); | |
412 | ||
413 | for (i = 0; i < ETH_ALEN; i++) | |
414 | dev->dev_addr[i] = ks8851_rdreg8(ks, KS_MAR(i)); | |
415 | ||
416 | mutex_unlock(&ks->lock); | |
417 | } | |
418 | ||
3ba81f3e BD |
419 | /** |
420 | * ks8851_init_mac - initialise the mac address | |
421 | * @ks: The device structure | |
422 | * | |
423 | * Get or create the initial mac address for the device and then set that | |
a9a8de21 | 424 | * into the station address register. If there is an EEPROM present, then |
7efd26d0 | 425 | * we try that. If no valid mac address is found we use eth_random_addr() |
3ba81f3e | 426 | * to create a new one. |
3ba81f3e BD |
427 | */ |
428 | static void ks8851_init_mac(struct ks8851_net *ks) | |
429 | { | |
430 | struct net_device *dev = ks->netdev; | |
431 | ||
a9a8de21 BD |
432 | /* first, try reading what we've got already */ |
433 | if (ks->rc_ccr & CCR_EEPROM) { | |
434 | ks8851_read_mac_addr(dev); | |
435 | if (is_valid_ether_addr(dev->dev_addr)) | |
436 | return; | |
437 | ||
438 | netdev_err(ks->netdev, "invalid mac address read %pM\n", | |
439 | dev->dev_addr); | |
440 | } | |
441 | ||
7ce5d222 | 442 | eth_hw_addr_random(dev); |
3ba81f3e BD |
443 | ks8851_write_mac_addr(dev); |
444 | } | |
445 | ||
446 | /** | |
447 | * ks8851_irq - device interrupt handler | |
fafdbf84 | 448 | * @irq: Interrupt number passed from the IRQ handler. |
3ba81f3e BD |
449 | * @pw: The private word passed to register_irq(), our struct ks8851_net. |
450 | * | |
451 | * Disable the interrupt from happening again until we've processed the | |
452 | * current status by scheduling ks8851_irq_work(). | |
453 | */ | |
454 | static irqreturn_t ks8851_irq(int irq, void *pw) | |
455 | { | |
456 | struct ks8851_net *ks = pw; | |
457 | ||
458 | disable_irq_nosync(irq); | |
459 | schedule_work(&ks->irq_work); | |
460 | return IRQ_HANDLED; | |
461 | } | |
462 | ||
463 | /** | |
464 | * ks8851_rdfifo - read data from the receive fifo | |
465 | * @ks: The device state. | |
466 | * @buff: The buffer address | |
467 | * @len: The length of the data to read | |
468 | * | |
9ddc5b6f | 469 | * Issue an RXQ FIFO read command and read the @len amount of data from |
3ba81f3e BD |
470 | * the FIFO into the buffer specified by @buff. |
471 | */ | |
472 | static void ks8851_rdfifo(struct ks8851_net *ks, u8 *buff, unsigned len) | |
473 | { | |
474 | struct spi_transfer *xfer = ks->spi_xfer2; | |
475 | struct spi_message *msg = &ks->spi_msg2; | |
476 | u8 txb[1]; | |
477 | int ret; | |
478 | ||
0dc7d2b3 JP |
479 | netif_dbg(ks, rx_status, ks->netdev, |
480 | "%s: %d@%p\n", __func__, len, buff); | |
3ba81f3e BD |
481 | |
482 | /* set the operation we're issuing */ | |
483 | txb[0] = KS_SPIOP_RXFIFO; | |
484 | ||
485 | xfer->tx_buf = txb; | |
486 | xfer->rx_buf = NULL; | |
487 | xfer->len = 1; | |
488 | ||
489 | xfer++; | |
490 | xfer->rx_buf = buff; | |
491 | xfer->tx_buf = NULL; | |
492 | xfer->len = len; | |
493 | ||
494 | ret = spi_sync(ks->spidev, msg); | |
495 | if (ret < 0) | |
0dc7d2b3 | 496 | netdev_err(ks->netdev, "%s: spi_sync() failed\n", __func__); |
3ba81f3e BD |
497 | } |
498 | ||
499 | /** | |
500 | * ks8851_dbg_dumpkkt - dump initial packet contents to debug | |
501 | * @ks: The device state | |
502 | * @rxpkt: The data for the received packet | |
503 | * | |
504 | * Dump the initial data from the packet to dev_dbg(). | |
505 | */ | |
506 | static void ks8851_dbg_dumpkkt(struct ks8851_net *ks, u8 *rxpkt) | |
507 | { | |
0dc7d2b3 JP |
508 | netdev_dbg(ks->netdev, |
509 | "pkt %02x%02x%02x%02x %02x%02x%02x%02x %02x%02x%02x%02x\n", | |
510 | rxpkt[4], rxpkt[5], rxpkt[6], rxpkt[7], | |
511 | rxpkt[8], rxpkt[9], rxpkt[10], rxpkt[11], | |
512 | rxpkt[12], rxpkt[13], rxpkt[14], rxpkt[15]); | |
3ba81f3e BD |
513 | } |
514 | ||
515 | /** | |
516 | * ks8851_rx_pkts - receive packets from the host | |
517 | * @ks: The device information. | |
518 | * | |
519 | * This is called from the IRQ work queue when the system detects that there | |
520 | * are packets in the receive queue. Find out how many packets there are and | |
521 | * read them from the FIFO. | |
522 | */ | |
523 | static void ks8851_rx_pkts(struct ks8851_net *ks) | |
524 | { | |
525 | struct sk_buff *skb; | |
526 | unsigned rxfc; | |
527 | unsigned rxlen; | |
528 | unsigned rxstat; | |
529 | u32 rxh; | |
530 | u8 *rxpkt; | |
531 | ||
532 | rxfc = ks8851_rdreg8(ks, KS_RXFC); | |
533 | ||
0dc7d2b3 JP |
534 | netif_dbg(ks, rx_status, ks->netdev, |
535 | "%s: %d packets\n", __func__, rxfc); | |
3ba81f3e BD |
536 | |
537 | /* Currently we're issuing a read per packet, but we could possibly | |
538 | * improve the code by issuing a single read, getting the receive | |
539 | * header, allocating the packet and then reading the packet data | |
540 | * out in one go. | |
541 | * | |
542 | * This form of operation would require us to hold the SPI bus' | |
543 | * chipselect low during the entie transaction to avoid any | |
25985edc | 544 | * reset to the data stream coming from the chip. |
3ba81f3e BD |
545 | */ |
546 | ||
547 | for (; rxfc != 0; rxfc--) { | |
548 | rxh = ks8851_rdreg32(ks, KS_RXFHSR); | |
549 | rxstat = rxh & 0xffff; | |
550 | rxlen = rxh >> 16; | |
551 | ||
0dc7d2b3 JP |
552 | netif_dbg(ks, rx_status, ks->netdev, |
553 | "rx: stat 0x%04x, len 0x%04x\n", rxstat, rxlen); | |
3ba81f3e BD |
554 | |
555 | /* the length of the packet includes the 32bit CRC */ | |
556 | ||
557 | /* set dma read address */ | |
558 | ks8851_wrreg16(ks, KS_RXFDPR, RXFDPR_RXFPAI | 0x00); | |
559 | ||
560 | /* start the packet dma process, and set auto-dequeue rx */ | |
561 | ks8851_wrreg16(ks, KS_RXQCR, | |
562 | ks->rc_rxqcr | RXQCR_SDA | RXQCR_ADRFE); | |
563 | ||
972c40b5 ED |
564 | if (rxlen > 4) { |
565 | unsigned int rxalign; | |
566 | ||
567 | rxlen -= 4; | |
568 | rxalign = ALIGN(rxlen, 4); | |
569 | skb = netdev_alloc_skb_ip_align(ks->netdev, rxalign); | |
570 | if (skb) { | |
3ba81f3e | 571 | |
972c40b5 ED |
572 | /* 4 bytes of status header + 4 bytes of |
573 | * garbage: we put them before ethernet | |
574 | * header, so that they are copied, | |
575 | * but ignored. | |
576 | */ | |
3ba81f3e | 577 | |
972c40b5 | 578 | rxpkt = skb_put(skb, rxlen) - 8; |
3ba81f3e | 579 | |
972c40b5 | 580 | ks8851_rdfifo(ks, rxpkt, rxalign + 8); |
3ba81f3e | 581 | |
972c40b5 ED |
582 | if (netif_msg_pktdata(ks)) |
583 | ks8851_dbg_dumpkkt(ks, rxpkt); | |
3ba81f3e | 584 | |
972c40b5 | 585 | skb->protocol = eth_type_trans(skb, ks->netdev); |
fbcf88b8 | 586 | netif_rx_ni(skb); |
3ba81f3e | 587 | |
972c40b5 ED |
588 | ks->netdev->stats.rx_packets++; |
589 | ks->netdev->stats.rx_bytes += rxlen; | |
590 | } | |
3ba81f3e BD |
591 | } |
592 | ||
593 | ks8851_wrreg16(ks, KS_RXQCR, ks->rc_rxqcr); | |
594 | } | |
595 | } | |
596 | ||
597 | /** | |
598 | * ks8851_irq_work - work queue handler for dealing with interrupt requests | |
599 | * @work: The work structure that was scheduled by schedule_work() | |
600 | * | |
601 | * This is the handler invoked when the ks8851_irq() is called to find out | |
602 | * what happened, as we cannot allow ourselves to sleep whilst waiting for | |
603 | * anything other process has the chip's lock. | |
604 | * | |
605 | * Read the interrupt status, work out what needs to be done and then clear | |
606 | * any of the interrupts that are not needed. | |
607 | */ | |
608 | static void ks8851_irq_work(struct work_struct *work) | |
609 | { | |
610 | struct ks8851_net *ks = container_of(work, struct ks8851_net, irq_work); | |
611 | unsigned status; | |
612 | unsigned handled = 0; | |
613 | ||
614 | mutex_lock(&ks->lock); | |
615 | ||
616 | status = ks8851_rdreg16(ks, KS_ISR); | |
617 | ||
0dc7d2b3 JP |
618 | netif_dbg(ks, intr, ks->netdev, |
619 | "%s: status 0x%04x\n", __func__, status); | |
3ba81f3e | 620 | |
062e55e3 | 621 | if (status & IRQ_LCI) |
3ba81f3e | 622 | handled |= IRQ_LCI; |
3ba81f3e BD |
623 | |
624 | if (status & IRQ_LDI) { | |
625 | u16 pmecr = ks8851_rdreg16(ks, KS_PMECR); | |
626 | pmecr &= ~PMECR_WKEVT_MASK; | |
627 | ks8851_wrreg16(ks, KS_PMECR, pmecr | PMECR_WKEVT_LINK); | |
628 | ||
629 | handled |= IRQ_LDI; | |
630 | } | |
631 | ||
632 | if (status & IRQ_RXPSI) | |
633 | handled |= IRQ_RXPSI; | |
634 | ||
635 | if (status & IRQ_TXI) { | |
636 | handled |= IRQ_TXI; | |
637 | ||
638 | /* no lock here, tx queue should have been stopped */ | |
639 | ||
640 | /* update our idea of how much tx space is available to the | |
641 | * system */ | |
642 | ks->tx_space = ks8851_rdreg16(ks, KS_TXMIR); | |
643 | ||
0dc7d2b3 JP |
644 | netif_dbg(ks, intr, ks->netdev, |
645 | "%s: txspace %d\n", __func__, ks->tx_space); | |
3ba81f3e BD |
646 | } |
647 | ||
648 | if (status & IRQ_RXI) | |
649 | handled |= IRQ_RXI; | |
650 | ||
651 | if (status & IRQ_SPIBEI) { | |
652 | dev_err(&ks->spidev->dev, "%s: spi bus error\n", __func__); | |
653 | handled |= IRQ_SPIBEI; | |
654 | } | |
655 | ||
656 | ks8851_wrreg16(ks, KS_ISR, handled); | |
657 | ||
658 | if (status & IRQ_RXI) { | |
659 | /* the datasheet says to disable the rx interrupt during | |
660 | * packet read-out, however we're masking the interrupt | |
661 | * from the device so do not bother masking just the RX | |
662 | * from the device. */ | |
663 | ||
664 | ks8851_rx_pkts(ks); | |
665 | } | |
666 | ||
667 | /* if something stopped the rx process, probably due to wanting | |
668 | * to change the rx settings, then do something about restarting | |
669 | * it. */ | |
670 | if (status & IRQ_RXPSI) { | |
671 | struct ks8851_rxctrl *rxc = &ks->rxctrl; | |
672 | ||
673 | /* update the multicast hash table */ | |
674 | ks8851_wrreg16(ks, KS_MAHTR0, rxc->mchash[0]); | |
675 | ks8851_wrreg16(ks, KS_MAHTR1, rxc->mchash[1]); | |
676 | ks8851_wrreg16(ks, KS_MAHTR2, rxc->mchash[2]); | |
677 | ks8851_wrreg16(ks, KS_MAHTR3, rxc->mchash[3]); | |
678 | ||
679 | ks8851_wrreg16(ks, KS_RXCR2, rxc->rxcr2); | |
680 | ks8851_wrreg16(ks, KS_RXCR1, rxc->rxcr1); | |
681 | } | |
682 | ||
683 | mutex_unlock(&ks->lock); | |
684 | ||
062e55e3 SB |
685 | if (status & IRQ_LCI) |
686 | mii_check_link(&ks->mii); | |
687 | ||
3ba81f3e BD |
688 | if (status & IRQ_TXI) |
689 | netif_wake_queue(ks->netdev); | |
690 | ||
691 | enable_irq(ks->netdev->irq); | |
692 | } | |
693 | ||
694 | /** | |
695 | * calc_txlen - calculate size of message to send packet | |
25985edc | 696 | * @len: Length of data |
3ba81f3e BD |
697 | * |
698 | * Returns the size of the TXFIFO message needed to send | |
699 | * this packet. | |
700 | */ | |
701 | static inline unsigned calc_txlen(unsigned len) | |
702 | { | |
703 | return ALIGN(len + 4, 4); | |
704 | } | |
705 | ||
706 | /** | |
707 | * ks8851_wrpkt - write packet to TX FIFO | |
708 | * @ks: The device state. | |
709 | * @txp: The sk_buff to transmit. | |
710 | * @irq: IRQ on completion of the packet. | |
711 | * | |
712 | * Send the @txp to the chip. This means creating the relevant packet header | |
713 | * specifying the length of the packet and the other information the chip | |
714 | * needs, such as IRQ on completion. Send the header and the packet data to | |
715 | * the device. | |
716 | */ | |
717 | static void ks8851_wrpkt(struct ks8851_net *ks, struct sk_buff *txp, bool irq) | |
718 | { | |
719 | struct spi_transfer *xfer = ks->spi_xfer2; | |
720 | struct spi_message *msg = &ks->spi_msg2; | |
721 | unsigned fid = 0; | |
722 | int ret; | |
723 | ||
0dc7d2b3 JP |
724 | netif_dbg(ks, tx_queued, ks->netdev, "%s: skb %p, %d@%p, irq %d\n", |
725 | __func__, txp, txp->len, txp->data, irq); | |
3ba81f3e BD |
726 | |
727 | fid = ks->fid++; | |
728 | fid &= TXFR_TXFID_MASK; | |
729 | ||
730 | if (irq) | |
731 | fid |= TXFR_TXIC; /* irq on completion */ | |
732 | ||
733 | /* start header at txb[1] to align txw entries */ | |
734 | ks->txh.txb[1] = KS_SPIOP_TXFIFO; | |
735 | ks->txh.txw[1] = cpu_to_le16(fid); | |
736 | ks->txh.txw[2] = cpu_to_le16(txp->len); | |
737 | ||
738 | xfer->tx_buf = &ks->txh.txb[1]; | |
739 | xfer->rx_buf = NULL; | |
740 | xfer->len = 5; | |
741 | ||
742 | xfer++; | |
743 | xfer->tx_buf = txp->data; | |
744 | xfer->rx_buf = NULL; | |
745 | xfer->len = ALIGN(txp->len, 4); | |
746 | ||
747 | ret = spi_sync(ks->spidev, msg); | |
748 | if (ret < 0) | |
0dc7d2b3 | 749 | netdev_err(ks->netdev, "%s: spi_sync() failed\n", __func__); |
3ba81f3e BD |
750 | } |
751 | ||
752 | /** | |
753 | * ks8851_done_tx - update and then free skbuff after transmitting | |
754 | * @ks: The device state | |
755 | * @txb: The buffer transmitted | |
756 | */ | |
757 | static void ks8851_done_tx(struct ks8851_net *ks, struct sk_buff *txb) | |
758 | { | |
759 | struct net_device *dev = ks->netdev; | |
760 | ||
761 | dev->stats.tx_bytes += txb->len; | |
762 | dev->stats.tx_packets++; | |
763 | ||
764 | dev_kfree_skb(txb); | |
765 | } | |
766 | ||
767 | /** | |
768 | * ks8851_tx_work - process tx packet(s) | |
769 | * @work: The work strucutre what was scheduled. | |
770 | * | |
771 | * This is called when a number of packets have been scheduled for | |
772 | * transmission and need to be sent to the device. | |
773 | */ | |
774 | static void ks8851_tx_work(struct work_struct *work) | |
775 | { | |
776 | struct ks8851_net *ks = container_of(work, struct ks8851_net, tx_work); | |
777 | struct sk_buff *txb; | |
3320eae5 | 778 | bool last = skb_queue_empty(&ks->txq); |
3ba81f3e BD |
779 | |
780 | mutex_lock(&ks->lock); | |
781 | ||
782 | while (!last) { | |
783 | txb = skb_dequeue(&ks->txq); | |
784 | last = skb_queue_empty(&ks->txq); | |
785 | ||
761172fb AA |
786 | if (txb != NULL) { |
787 | ks8851_wrreg16(ks, KS_RXQCR, ks->rc_rxqcr | RXQCR_SDA); | |
788 | ks8851_wrpkt(ks, txb, last); | |
789 | ks8851_wrreg16(ks, KS_RXQCR, ks->rc_rxqcr); | |
790 | ks8851_wrreg16(ks, KS_TXQCR, TXQCR_METFE); | |
3ba81f3e | 791 | |
761172fb AA |
792 | ks8851_done_tx(ks, txb); |
793 | } | |
3ba81f3e BD |
794 | } |
795 | ||
796 | mutex_unlock(&ks->lock); | |
3ba81f3e BD |
797 | } |
798 | ||
799 | /** | |
800 | * ks8851_net_open - open network device | |
801 | * @dev: The network device being opened. | |
802 | * | |
803 | * Called when the network device is marked active, such as a user executing | |
804 | * 'ifconfig up' on the device. | |
805 | */ | |
806 | static int ks8851_net_open(struct net_device *dev) | |
807 | { | |
808 | struct ks8851_net *ks = netdev_priv(dev); | |
809 | ||
810 | /* lock the card, even if we may not actually be doing anything | |
811 | * else at the moment */ | |
812 | mutex_lock(&ks->lock); | |
813 | ||
0dc7d2b3 | 814 | netif_dbg(ks, ifup, ks->netdev, "opening\n"); |
3ba81f3e BD |
815 | |
816 | /* bring chip out of any power saving mode it was in */ | |
817 | ks8851_set_powermode(ks, PMECR_PM_NORMAL); | |
818 | ||
819 | /* issue a soft reset to the RX/TX QMU to put it into a known | |
820 | * state. */ | |
821 | ks8851_soft_reset(ks, GRR_QMU); | |
822 | ||
823 | /* setup transmission parameters */ | |
824 | ||
825 | ks8851_wrreg16(ks, KS_TXCR, (TXCR_TXE | /* enable transmit process */ | |
826 | TXCR_TXPE | /* pad to min length */ | |
827 | TXCR_TXCRC | /* add CRC */ | |
828 | TXCR_TXFCE)); /* enable flow control */ | |
829 | ||
830 | /* auto-increment tx data, reset tx pointer */ | |
831 | ks8851_wrreg16(ks, KS_TXFDPR, TXFDPR_TXFPAI); | |
832 | ||
833 | /* setup receiver control */ | |
834 | ||
835 | ks8851_wrreg16(ks, KS_RXCR1, (RXCR1_RXPAFMA | /* from mac filter */ | |
836 | RXCR1_RXFCE | /* enable flow control */ | |
837 | RXCR1_RXBE | /* broadcast enable */ | |
838 | RXCR1_RXUE | /* unicast enable */ | |
839 | RXCR1_RXE)); /* enable rx block */ | |
840 | ||
841 | /* transfer entire frames out in one go */ | |
842 | ks8851_wrreg16(ks, KS_RXCR2, RXCR2_SRDBL_FRAME); | |
843 | ||
844 | /* set receive counter timeouts */ | |
845 | ks8851_wrreg16(ks, KS_RXDTTR, 1000); /* 1ms after first frame to IRQ */ | |
846 | ks8851_wrreg16(ks, KS_RXDBCTR, 4096); /* >4Kbytes in buffer to IRQ */ | |
847 | ks8851_wrreg16(ks, KS_RXFCTR, 10); /* 10 frames to IRQ */ | |
848 | ||
849 | ks->rc_rxqcr = (RXQCR_RXFCTE | /* IRQ on frame count exceeded */ | |
850 | RXQCR_RXDBCTE | /* IRQ on byte count exceeded */ | |
851 | RXQCR_RXDTTE); /* IRQ on time exceeded */ | |
852 | ||
853 | ks8851_wrreg16(ks, KS_RXQCR, ks->rc_rxqcr); | |
854 | ||
855 | /* clear then enable interrupts */ | |
856 | ||
857 | #define STD_IRQ (IRQ_LCI | /* Link Change */ \ | |
858 | IRQ_TXI | /* TX done */ \ | |
859 | IRQ_RXI | /* RX done */ \ | |
860 | IRQ_SPIBEI | /* SPI bus error */ \ | |
861 | IRQ_TXPSI | /* TX process stop */ \ | |
862 | IRQ_RXPSI) /* RX process stop */ | |
863 | ||
864 | ks->rc_ier = STD_IRQ; | |
865 | ks8851_wrreg16(ks, KS_ISR, STD_IRQ); | |
866 | ks8851_wrreg16(ks, KS_IER, STD_IRQ); | |
867 | ||
868 | netif_start_queue(ks->netdev); | |
869 | ||
0dc7d2b3 | 870 | netif_dbg(ks, ifup, ks->netdev, "network device up\n"); |
3ba81f3e BD |
871 | |
872 | mutex_unlock(&ks->lock); | |
873 | return 0; | |
874 | } | |
875 | ||
876 | /** | |
877 | * ks8851_net_stop - close network device | |
878 | * @dev: The device being closed. | |
879 | * | |
880 | * Called to close down a network device which has been active. Cancell any | |
881 | * work, shutdown the RX and TX process and then place the chip into a low | |
882 | * power state whilst it is not being used. | |
883 | */ | |
884 | static int ks8851_net_stop(struct net_device *dev) | |
885 | { | |
886 | struct ks8851_net *ks = netdev_priv(dev); | |
887 | ||
0dc7d2b3 | 888 | netif_info(ks, ifdown, dev, "shutting down\n"); |
3ba81f3e BD |
889 | |
890 | netif_stop_queue(dev); | |
891 | ||
892 | mutex_lock(&ks->lock); | |
c5a99937 SB |
893 | /* turn off the IRQs and ack any outstanding */ |
894 | ks8851_wrreg16(ks, KS_IER, 0x0000); | |
895 | ks8851_wrreg16(ks, KS_ISR, 0xffff); | |
896 | mutex_unlock(&ks->lock); | |
3ba81f3e BD |
897 | |
898 | /* stop any outstanding work */ | |
899 | flush_work(&ks->irq_work); | |
900 | flush_work(&ks->tx_work); | |
901 | flush_work(&ks->rxctrl_work); | |
902 | ||
c5a99937 | 903 | mutex_lock(&ks->lock); |
3ba81f3e BD |
904 | /* shutdown RX process */ |
905 | ks8851_wrreg16(ks, KS_RXCR1, 0x0000); | |
906 | ||
907 | /* shutdown TX process */ | |
908 | ks8851_wrreg16(ks, KS_TXCR, 0x0000); | |
909 | ||
910 | /* set powermode to soft power down to save power */ | |
911 | ks8851_set_powermode(ks, PMECR_PM_SOFTDOWN); | |
c5a99937 | 912 | mutex_unlock(&ks->lock); |
3ba81f3e BD |
913 | |
914 | /* ensure any queued tx buffers are dumped */ | |
915 | while (!skb_queue_empty(&ks->txq)) { | |
916 | struct sk_buff *txb = skb_dequeue(&ks->txq); | |
917 | ||
0dc7d2b3 JP |
918 | netif_dbg(ks, ifdown, ks->netdev, |
919 | "%s: freeing txb %p\n", __func__, txb); | |
3ba81f3e BD |
920 | |
921 | dev_kfree_skb(txb); | |
922 | } | |
923 | ||
3ba81f3e BD |
924 | return 0; |
925 | } | |
926 | ||
927 | /** | |
928 | * ks8851_start_xmit - transmit packet | |
929 | * @skb: The buffer to transmit | |
930 | * @dev: The device used to transmit the packet. | |
931 | * | |
932 | * Called by the network layer to transmit the @skb. Queue the packet for | |
933 | * the device and schedule the necessary work to transmit the packet when | |
934 | * it is free. | |
935 | * | |
936 | * We do this to firstly avoid sleeping with the network device locked, | |
937 | * and secondly so we can round up more than one packet to transmit which | |
938 | * means we can try and avoid generating too many transmit done interrupts. | |
939 | */ | |
61357325 SH |
940 | static netdev_tx_t ks8851_start_xmit(struct sk_buff *skb, |
941 | struct net_device *dev) | |
3ba81f3e BD |
942 | { |
943 | struct ks8851_net *ks = netdev_priv(dev); | |
944 | unsigned needed = calc_txlen(skb->len); | |
61357325 | 945 | netdev_tx_t ret = NETDEV_TX_OK; |
3ba81f3e | 946 | |
0dc7d2b3 JP |
947 | netif_dbg(ks, tx_queued, ks->netdev, |
948 | "%s: skb %p, %d@%p\n", __func__, skb, skb->len, skb->data); | |
3ba81f3e BD |
949 | |
950 | spin_lock(&ks->statelock); | |
951 | ||
952 | if (needed > ks->tx_space) { | |
953 | netif_stop_queue(dev); | |
954 | ret = NETDEV_TX_BUSY; | |
955 | } else { | |
956 | ks->tx_space -= needed; | |
957 | skb_queue_tail(&ks->txq, skb); | |
958 | } | |
959 | ||
960 | spin_unlock(&ks->statelock); | |
961 | schedule_work(&ks->tx_work); | |
962 | ||
963 | return ret; | |
964 | } | |
965 | ||
966 | /** | |
967 | * ks8851_rxctrl_work - work handler to change rx mode | |
968 | * @work: The work structure this belongs to. | |
969 | * | |
970 | * Lock the device and issue the necessary changes to the receive mode from | |
971 | * the network device layer. This is done so that we can do this without | |
972 | * having to sleep whilst holding the network device lock. | |
973 | * | |
974 | * Since the recommendation from Micrel is that the RXQ is shutdown whilst the | |
975 | * receive parameters are programmed, we issue a write to disable the RXQ and | |
976 | * then wait for the interrupt handler to be triggered once the RXQ shutdown is | |
977 | * complete. The interrupt handler then writes the new values into the chip. | |
978 | */ | |
979 | static void ks8851_rxctrl_work(struct work_struct *work) | |
980 | { | |
981 | struct ks8851_net *ks = container_of(work, struct ks8851_net, rxctrl_work); | |
982 | ||
983 | mutex_lock(&ks->lock); | |
984 | ||
985 | /* need to shutdown RXQ before modifying filter parameters */ | |
986 | ks8851_wrreg16(ks, KS_RXCR1, 0x00); | |
987 | ||
988 | mutex_unlock(&ks->lock); | |
989 | } | |
990 | ||
991 | static void ks8851_set_rx_mode(struct net_device *dev) | |
992 | { | |
993 | struct ks8851_net *ks = netdev_priv(dev); | |
994 | struct ks8851_rxctrl rxctrl; | |
995 | ||
996 | memset(&rxctrl, 0, sizeof(rxctrl)); | |
997 | ||
998 | if (dev->flags & IFF_PROMISC) { | |
999 | /* interface to receive everything */ | |
1000 | ||
1001 | rxctrl.rxcr1 = RXCR1_RXAE | RXCR1_RXINVF; | |
1002 | } else if (dev->flags & IFF_ALLMULTI) { | |
1003 | /* accept all multicast packets */ | |
1004 | ||
1005 | rxctrl.rxcr1 = (RXCR1_RXME | RXCR1_RXAE | | |
1006 | RXCR1_RXPAFMA | RXCR1_RXMAFMA); | |
4cd24eaf | 1007 | } else if (dev->flags & IFF_MULTICAST && !netdev_mc_empty(dev)) { |
22bedad3 | 1008 | struct netdev_hw_addr *ha; |
3ba81f3e | 1009 | u32 crc; |
3ba81f3e BD |
1010 | |
1011 | /* accept some multicast */ | |
1012 | ||
22bedad3 JP |
1013 | netdev_for_each_mc_addr(ha, dev) { |
1014 | crc = ether_crc(ETH_ALEN, ha->addr); | |
3ba81f3e BD |
1015 | crc >>= (32 - 6); /* get top six bits */ |
1016 | ||
1017 | rxctrl.mchash[crc >> 4] |= (1 << (crc & 0xf)); | |
3ba81f3e BD |
1018 | } |
1019 | ||
b6a71bfa | 1020 | rxctrl.rxcr1 = RXCR1_RXME | RXCR1_RXPAFMA; |
3ba81f3e BD |
1021 | } else { |
1022 | /* just accept broadcast / unicast */ | |
1023 | rxctrl.rxcr1 = RXCR1_RXPAFMA; | |
1024 | } | |
1025 | ||
1026 | rxctrl.rxcr1 |= (RXCR1_RXUE | /* unicast enable */ | |
1027 | RXCR1_RXBE | /* broadcast enable */ | |
1028 | RXCR1_RXE | /* RX process enable */ | |
1029 | RXCR1_RXFCE); /* enable flow control */ | |
1030 | ||
1031 | rxctrl.rxcr2 |= RXCR2_SRDBL_FRAME; | |
1032 | ||
1033 | /* schedule work to do the actual set of the data if needed */ | |
1034 | ||
1035 | spin_lock(&ks->statelock); | |
1036 | ||
1037 | if (memcmp(&rxctrl, &ks->rxctrl, sizeof(rxctrl)) != 0) { | |
1038 | memcpy(&ks->rxctrl, &rxctrl, sizeof(ks->rxctrl)); | |
1039 | schedule_work(&ks->rxctrl_work); | |
1040 | } | |
1041 | ||
1042 | spin_unlock(&ks->statelock); | |
1043 | } | |
1044 | ||
1045 | static int ks8851_set_mac_address(struct net_device *dev, void *addr) | |
1046 | { | |
1047 | struct sockaddr *sa = addr; | |
1048 | ||
1049 | if (netif_running(dev)) | |
1050 | return -EBUSY; | |
1051 | ||
1052 | if (!is_valid_ether_addr(sa->sa_data)) | |
1053 | return -EADDRNOTAVAIL; | |
1054 | ||
7ce5d222 | 1055 | dev->addr_assign_type &= ~NET_ADDR_RANDOM; |
3ba81f3e BD |
1056 | memcpy(dev->dev_addr, sa->sa_data, ETH_ALEN); |
1057 | return ks8851_write_mac_addr(dev); | |
1058 | } | |
1059 | ||
1060 | static int ks8851_net_ioctl(struct net_device *dev, struct ifreq *req, int cmd) | |
1061 | { | |
1062 | struct ks8851_net *ks = netdev_priv(dev); | |
1063 | ||
1064 | if (!netif_running(dev)) | |
1065 | return -EINVAL; | |
1066 | ||
1067 | return generic_mii_ioctl(&ks->mii, if_mii(req), cmd, NULL); | |
1068 | } | |
1069 | ||
1070 | static const struct net_device_ops ks8851_netdev_ops = { | |
1071 | .ndo_open = ks8851_net_open, | |
1072 | .ndo_stop = ks8851_net_stop, | |
1073 | .ndo_do_ioctl = ks8851_net_ioctl, | |
1074 | .ndo_start_xmit = ks8851_start_xmit, | |
1075 | .ndo_set_mac_address = ks8851_set_mac_address, | |
1076 | .ndo_set_rx_mode = ks8851_set_rx_mode, | |
1077 | .ndo_change_mtu = eth_change_mtu, | |
1078 | .ndo_validate_addr = eth_validate_addr, | |
1079 | }; | |
1080 | ||
1081 | /* ethtool support */ | |
1082 | ||
1083 | static void ks8851_get_drvinfo(struct net_device *dev, | |
1084 | struct ethtool_drvinfo *di) | |
1085 | { | |
1086 | strlcpy(di->driver, "KS8851", sizeof(di->driver)); | |
1087 | strlcpy(di->version, "1.00", sizeof(di->version)); | |
1088 | strlcpy(di->bus_info, dev_name(dev->dev.parent), sizeof(di->bus_info)); | |
1089 | } | |
1090 | ||
1091 | static u32 ks8851_get_msglevel(struct net_device *dev) | |
1092 | { | |
1093 | struct ks8851_net *ks = netdev_priv(dev); | |
1094 | return ks->msg_enable; | |
1095 | } | |
1096 | ||
1097 | static void ks8851_set_msglevel(struct net_device *dev, u32 to) | |
1098 | { | |
1099 | struct ks8851_net *ks = netdev_priv(dev); | |
1100 | ks->msg_enable = to; | |
1101 | } | |
1102 | ||
1103 | static int ks8851_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) | |
1104 | { | |
1105 | struct ks8851_net *ks = netdev_priv(dev); | |
1106 | return mii_ethtool_gset(&ks->mii, cmd); | |
1107 | } | |
1108 | ||
1109 | static int ks8851_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) | |
1110 | { | |
1111 | struct ks8851_net *ks = netdev_priv(dev); | |
1112 | return mii_ethtool_sset(&ks->mii, cmd); | |
1113 | } | |
1114 | ||
1115 | static u32 ks8851_get_link(struct net_device *dev) | |
1116 | { | |
1117 | struct ks8851_net *ks = netdev_priv(dev); | |
1118 | return mii_link_ok(&ks->mii); | |
1119 | } | |
1120 | ||
1121 | static int ks8851_nway_reset(struct net_device *dev) | |
1122 | { | |
1123 | struct ks8851_net *ks = netdev_priv(dev); | |
1124 | return mii_nway_restart(&ks->mii); | |
1125 | } | |
1126 | ||
51b7b1c3 | 1127 | /* EEPROM support */ |
a84afa40 | 1128 | |
51b7b1c3 | 1129 | static void ks8851_eeprom_regread(struct eeprom_93cx6 *ee) |
a84afa40 | 1130 | { |
51b7b1c3 BD |
1131 | struct ks8851_net *ks = ee->data; |
1132 | unsigned val; | |
a84afa40 | 1133 | |
51b7b1c3 | 1134 | val = ks8851_rdreg16(ks, KS_EEPCR); |
a84afa40 | 1135 | |
51b7b1c3 BD |
1136 | ee->reg_data_out = (val & EEPCR_EESB) ? 1 : 0; |
1137 | ee->reg_data_clock = (val & EEPCR_EESCK) ? 1 : 0; | |
1138 | ee->reg_chip_select = (val & EEPCR_EECS) ? 1 : 0; | |
1139 | } | |
a84afa40 | 1140 | |
51b7b1c3 BD |
1141 | static void ks8851_eeprom_regwrite(struct eeprom_93cx6 *ee) |
1142 | { | |
1143 | struct ks8851_net *ks = ee->data; | |
1144 | unsigned val = EEPCR_EESA; /* default - eeprom access on */ | |
1145 | ||
1146 | if (ee->drive_data) | |
1147 | val |= EEPCR_EESRWA; | |
1148 | if (ee->reg_data_in) | |
1149 | val |= EEPCR_EEDO; | |
1150 | if (ee->reg_data_clock) | |
1151 | val |= EEPCR_EESCK; | |
1152 | if (ee->reg_chip_select) | |
1153 | val |= EEPCR_EECS; | |
1154 | ||
1155 | ks8851_wrreg16(ks, KS_EEPCR, val); | |
1156 | } | |
a84afa40 | 1157 | |
51b7b1c3 BD |
1158 | /** |
1159 | * ks8851_eeprom_claim - claim device EEPROM and activate the interface | |
1160 | * @ks: The network device state. | |
1161 | * | |
1162 | * Check for the presence of an EEPROM, and then activate software access | |
1163 | * to the device. | |
1164 | */ | |
1165 | static int ks8851_eeprom_claim(struct ks8851_net *ks) | |
1166 | { | |
1167 | if (!(ks->rc_ccr & CCR_EEPROM)) | |
1168 | return -ENOENT; | |
a84afa40 | 1169 | |
51b7b1c3 | 1170 | mutex_lock(&ks->lock); |
a84afa40 | 1171 | |
51b7b1c3 BD |
1172 | /* start with clock low, cs high */ |
1173 | ks8851_wrreg16(ks, KS_EEPCR, EEPCR_EESA | EEPCR_EECS); | |
1174 | return 0; | |
1175 | } | |
a84afa40 | 1176 | |
51b7b1c3 BD |
1177 | /** |
1178 | * ks8851_eeprom_release - release the EEPROM interface | |
1179 | * @ks: The device state | |
1180 | * | |
1181 | * Release the software access to the device EEPROM | |
1182 | */ | |
1183 | static void ks8851_eeprom_release(struct ks8851_net *ks) | |
1184 | { | |
1185 | unsigned val = ks8851_rdreg16(ks, KS_EEPCR); | |
a84afa40 | 1186 | |
51b7b1c3 BD |
1187 | ks8851_wrreg16(ks, KS_EEPCR, val & ~EEPCR_EESA); |
1188 | mutex_unlock(&ks->lock); | |
a84afa40 SJ |
1189 | } |
1190 | ||
51b7b1c3 BD |
1191 | #define KS_EEPROM_MAGIC (0x00008851) |
1192 | ||
a84afa40 | 1193 | static int ks8851_set_eeprom(struct net_device *dev, |
51b7b1c3 | 1194 | struct ethtool_eeprom *ee, u8 *data) |
a84afa40 SJ |
1195 | { |
1196 | struct ks8851_net *ks = netdev_priv(dev); | |
51b7b1c3 BD |
1197 | int offset = ee->offset; |
1198 | int len = ee->len; | |
1199 | u16 tmp; | |
1200 | ||
1201 | /* currently only support byte writing */ | |
1202 | if (len != 1) | |
a84afa40 SJ |
1203 | return -EINVAL; |
1204 | ||
51b7b1c3 BD |
1205 | if (ee->magic != KS_EEPROM_MAGIC) |
1206 | return -EINVAL; | |
a84afa40 | 1207 | |
51b7b1c3 BD |
1208 | if (ks8851_eeprom_claim(ks)) |
1209 | return -ENOENT; | |
1210 | ||
1211 | eeprom_93cx6_wren(&ks->eeprom, true); | |
1212 | ||
1213 | /* ethtool currently only supports writing bytes, which means | |
1214 | * we have to read/modify/write our 16bit EEPROMs */ | |
a84afa40 | 1215 | |
51b7b1c3 | 1216 | eeprom_93cx6_read(&ks->eeprom, offset/2, &tmp); |
a84afa40 | 1217 | |
51b7b1c3 BD |
1218 | if (offset & 1) { |
1219 | tmp &= 0xff; | |
1220 | tmp |= *data << 8; | |
1221 | } else { | |
1222 | tmp &= 0xff00; | |
1223 | tmp |= *data; | |
a84afa40 | 1224 | } |
a84afa40 | 1225 | |
51b7b1c3 BD |
1226 | eeprom_93cx6_write(&ks->eeprom, offset/2, tmp); |
1227 | eeprom_93cx6_wren(&ks->eeprom, false); | |
1228 | ||
1229 | ks8851_eeprom_release(ks); | |
1230 | ||
1231 | return 0; | |
1232 | } | |
a84afa40 | 1233 | |
51b7b1c3 BD |
1234 | static int ks8851_get_eeprom(struct net_device *dev, |
1235 | struct ethtool_eeprom *ee, u8 *data) | |
1236 | { | |
1237 | struct ks8851_net *ks = netdev_priv(dev); | |
1238 | int offset = ee->offset; | |
1239 | int len = ee->len; | |
a84afa40 | 1240 | |
51b7b1c3 BD |
1241 | /* must be 2 byte aligned */ |
1242 | if (len & 1 || offset & 1) | |
1243 | return -EINVAL; | |
a84afa40 | 1244 | |
51b7b1c3 BD |
1245 | if (ks8851_eeprom_claim(ks)) |
1246 | return -ENOENT; | |
a84afa40 | 1247 | |
51b7b1c3 | 1248 | ee->magic = KS_EEPROM_MAGIC; |
a84afa40 | 1249 | |
51b7b1c3 BD |
1250 | eeprom_93cx6_multiread(&ks->eeprom, offset/2, (__le16 *)data, len/2); |
1251 | ks8851_eeprom_release(ks); | |
a84afa40 | 1252 | |
51b7b1c3 BD |
1253 | return 0; |
1254 | } | |
a84afa40 | 1255 | |
51b7b1c3 BD |
1256 | static int ks8851_get_eeprom_len(struct net_device *dev) |
1257 | { | |
1258 | struct ks8851_net *ks = netdev_priv(dev); | |
1259 | ||
1260 | /* currently, we assume it is an 93C46 attached, so return 128 */ | |
1261 | return ks->rc_ccr & CCR_EEPROM ? 128 : 0; | |
a84afa40 SJ |
1262 | } |
1263 | ||
3ba81f3e BD |
1264 | static const struct ethtool_ops ks8851_ethtool_ops = { |
1265 | .get_drvinfo = ks8851_get_drvinfo, | |
1266 | .get_msglevel = ks8851_get_msglevel, | |
1267 | .set_msglevel = ks8851_set_msglevel, | |
1268 | .get_settings = ks8851_get_settings, | |
1269 | .set_settings = ks8851_set_settings, | |
1270 | .get_link = ks8851_get_link, | |
1271 | .nway_reset = ks8851_nway_reset, | |
a84afa40 SJ |
1272 | .get_eeprom_len = ks8851_get_eeprom_len, |
1273 | .get_eeprom = ks8851_get_eeprom, | |
1274 | .set_eeprom = ks8851_set_eeprom, | |
3ba81f3e BD |
1275 | }; |
1276 | ||
1277 | /* MII interface controls */ | |
1278 | ||
1279 | /** | |
1280 | * ks8851_phy_reg - convert MII register into a KS8851 register | |
1281 | * @reg: MII register number. | |
1282 | * | |
1283 | * Return the KS8851 register number for the corresponding MII PHY register | |
1284 | * if possible. Return zero if the MII register has no direct mapping to the | |
1285 | * KS8851 register set. | |
1286 | */ | |
1287 | static int ks8851_phy_reg(int reg) | |
1288 | { | |
1289 | switch (reg) { | |
1290 | case MII_BMCR: | |
1291 | return KS_P1MBCR; | |
1292 | case MII_BMSR: | |
1293 | return KS_P1MBSR; | |
1294 | case MII_PHYSID1: | |
1295 | return KS_PHY1ILR; | |
1296 | case MII_PHYSID2: | |
1297 | return KS_PHY1IHR; | |
1298 | case MII_ADVERTISE: | |
1299 | return KS_P1ANAR; | |
1300 | case MII_LPA: | |
1301 | return KS_P1ANLPR; | |
1302 | } | |
1303 | ||
1304 | return 0x0; | |
1305 | } | |
1306 | ||
1307 | /** | |
1308 | * ks8851_phy_read - MII interface PHY register read. | |
1309 | * @dev: The network device the PHY is on. | |
1310 | * @phy_addr: Address of PHY (ignored as we only have one) | |
1311 | * @reg: The register to read. | |
1312 | * | |
1313 | * This call reads data from the PHY register specified in @reg. Since the | |
25985edc | 1314 | * device does not support all the MII registers, the non-existent values |
3ba81f3e BD |
1315 | * are always returned as zero. |
1316 | * | |
1317 | * We return zero for unsupported registers as the MII code does not check | |
1318 | * the value returned for any error status, and simply returns it to the | |
1319 | * caller. The mii-tool that the driver was tested with takes any -ve error | |
1320 | * as real PHY capabilities, thus displaying incorrect data to the user. | |
1321 | */ | |
1322 | static int ks8851_phy_read(struct net_device *dev, int phy_addr, int reg) | |
1323 | { | |
1324 | struct ks8851_net *ks = netdev_priv(dev); | |
1325 | int ksreg; | |
1326 | int result; | |
1327 | ||
1328 | ksreg = ks8851_phy_reg(reg); | |
1329 | if (!ksreg) | |
1330 | return 0x0; /* no error return allowed, so use zero */ | |
1331 | ||
1332 | mutex_lock(&ks->lock); | |
1333 | result = ks8851_rdreg16(ks, ksreg); | |
1334 | mutex_unlock(&ks->lock); | |
1335 | ||
1336 | return result; | |
1337 | } | |
1338 | ||
1339 | static void ks8851_phy_write(struct net_device *dev, | |
1340 | int phy, int reg, int value) | |
1341 | { | |
1342 | struct ks8851_net *ks = netdev_priv(dev); | |
1343 | int ksreg; | |
1344 | ||
1345 | ksreg = ks8851_phy_reg(reg); | |
1346 | if (ksreg) { | |
1347 | mutex_lock(&ks->lock); | |
1348 | ks8851_wrreg16(ks, ksreg, value); | |
1349 | mutex_unlock(&ks->lock); | |
1350 | } | |
1351 | } | |
1352 | ||
1353 | /** | |
1354 | * ks8851_read_selftest - read the selftest memory info. | |
1355 | * @ks: The device state | |
1356 | * | |
1357 | * Read and check the TX/RX memory selftest information. | |
1358 | */ | |
1359 | static int ks8851_read_selftest(struct ks8851_net *ks) | |
1360 | { | |
1361 | unsigned both_done = MBIR_TXMBF | MBIR_RXMBF; | |
1362 | int ret = 0; | |
1363 | unsigned rd; | |
1364 | ||
1365 | rd = ks8851_rdreg16(ks, KS_MBIR); | |
1366 | ||
1367 | if ((rd & both_done) != both_done) { | |
0dc7d2b3 | 1368 | netdev_warn(ks->netdev, "Memory selftest not finished\n"); |
3ba81f3e BD |
1369 | return 0; |
1370 | } | |
1371 | ||
1372 | if (rd & MBIR_TXMBFA) { | |
0dc7d2b3 | 1373 | netdev_err(ks->netdev, "TX memory selftest fail\n"); |
3ba81f3e BD |
1374 | ret |= 1; |
1375 | } | |
1376 | ||
1377 | if (rd & MBIR_RXMBFA) { | |
0dc7d2b3 | 1378 | netdev_err(ks->netdev, "RX memory selftest fail\n"); |
3ba81f3e BD |
1379 | ret |= 2; |
1380 | } | |
1381 | ||
1382 | return 0; | |
1383 | } | |
1384 | ||
1385 | /* driver bus management functions */ | |
1386 | ||
1d5439b9 AA |
1387 | #ifdef CONFIG_PM |
1388 | static int ks8851_suspend(struct spi_device *spi, pm_message_t state) | |
1389 | { | |
1390 | struct ks8851_net *ks = dev_get_drvdata(&spi->dev); | |
1391 | struct net_device *dev = ks->netdev; | |
1392 | ||
1393 | if (netif_running(dev)) { | |
1394 | netif_device_detach(dev); | |
1395 | ks8851_net_stop(dev); | |
1396 | } | |
1397 | ||
1398 | return 0; | |
1399 | } | |
1400 | ||
1401 | static int ks8851_resume(struct spi_device *spi) | |
1402 | { | |
1403 | struct ks8851_net *ks = dev_get_drvdata(&spi->dev); | |
1404 | struct net_device *dev = ks->netdev; | |
1405 | ||
1406 | if (netif_running(dev)) { | |
1407 | ks8851_net_open(dev); | |
1408 | netif_device_attach(dev); | |
1409 | } | |
1410 | ||
1411 | return 0; | |
1412 | } | |
1413 | #else | |
1414 | #define ks8851_suspend NULL | |
1415 | #define ks8851_resume NULL | |
1416 | #endif | |
1417 | ||
654b8c5c | 1418 | static int ks8851_probe(struct spi_device *spi) |
3ba81f3e BD |
1419 | { |
1420 | struct net_device *ndev; | |
1421 | struct ks8851_net *ks; | |
1422 | int ret; | |
51c61a28 | 1423 | unsigned cider; |
3ba81f3e BD |
1424 | |
1425 | ndev = alloc_etherdev(sizeof(struct ks8851_net)); | |
41de8d4c | 1426 | if (!ndev) |
3ba81f3e | 1427 | return -ENOMEM; |
3ba81f3e BD |
1428 | |
1429 | spi->bits_per_word = 8; | |
1430 | ||
1431 | ks = netdev_priv(ndev); | |
1432 | ||
1433 | ks->netdev = ndev; | |
1434 | ks->spidev = spi; | |
1435 | ks->tx_space = 6144; | |
1436 | ||
1437 | mutex_init(&ks->lock); | |
1438 | spin_lock_init(&ks->statelock); | |
1439 | ||
1440 | INIT_WORK(&ks->tx_work, ks8851_tx_work); | |
1441 | INIT_WORK(&ks->irq_work, ks8851_irq_work); | |
1442 | INIT_WORK(&ks->rxctrl_work, ks8851_rxctrl_work); | |
1443 | ||
1444 | /* initialise pre-made spi transfer messages */ | |
1445 | ||
1446 | spi_message_init(&ks->spi_msg1); | |
1447 | spi_message_add_tail(&ks->spi_xfer1, &ks->spi_msg1); | |
1448 | ||
1449 | spi_message_init(&ks->spi_msg2); | |
1450 | spi_message_add_tail(&ks->spi_xfer2[0], &ks->spi_msg2); | |
1451 | spi_message_add_tail(&ks->spi_xfer2[1], &ks->spi_msg2); | |
1452 | ||
51b7b1c3 BD |
1453 | /* setup EEPROM state */ |
1454 | ||
1455 | ks->eeprom.data = ks; | |
1456 | ks->eeprom.width = PCI_EEPROM_WIDTH_93C46; | |
1457 | ks->eeprom.register_read = ks8851_eeprom_regread; | |
1458 | ks->eeprom.register_write = ks8851_eeprom_regwrite; | |
1459 | ||
3ba81f3e BD |
1460 | /* setup mii state */ |
1461 | ks->mii.dev = ndev; | |
1462 | ks->mii.phy_id = 1, | |
1463 | ks->mii.phy_id_mask = 1; | |
1464 | ks->mii.reg_num_mask = 0xf; | |
1465 | ks->mii.mdio_read = ks8851_phy_read; | |
1466 | ks->mii.mdio_write = ks8851_phy_write; | |
1467 | ||
1468 | dev_info(&spi->dev, "message enable is %d\n", msg_enable); | |
1469 | ||
1470 | /* set the default message enable */ | |
1471 | ks->msg_enable = netif_msg_init(msg_enable, (NETIF_MSG_DRV | | |
1472 | NETIF_MSG_PROBE | | |
1473 | NETIF_MSG_LINK)); | |
1474 | ||
1475 | skb_queue_head_init(&ks->txq); | |
1476 | ||
1477 | SET_ETHTOOL_OPS(ndev, &ks8851_ethtool_ops); | |
1478 | SET_NETDEV_DEV(ndev, &spi->dev); | |
1479 | ||
1480 | dev_set_drvdata(&spi->dev, ks); | |
1481 | ||
1482 | ndev->if_port = IF_PORT_100BASET; | |
1483 | ndev->netdev_ops = &ks8851_netdev_ops; | |
1484 | ndev->irq = spi->irq; | |
1485 | ||
57dada68 BD |
1486 | /* issue a global soft reset to reset the device. */ |
1487 | ks8851_soft_reset(ks, GRR_GSR); | |
1488 | ||
3ba81f3e | 1489 | /* simple check for a valid chip being connected to the bus */ |
51c61a28 MR |
1490 | cider = ks8851_rdreg16(ks, KS_CIDER); |
1491 | if ((cider & ~CIDER_REV_MASK) != CIDER_ID) { | |
3ba81f3e BD |
1492 | dev_err(&spi->dev, "failed to read device ID\n"); |
1493 | ret = -ENODEV; | |
1494 | goto err_id; | |
1495 | } | |
1496 | ||
7d997466 SJ |
1497 | /* cache the contents of the CCR register for EEPROM, etc. */ |
1498 | ks->rc_ccr = ks8851_rdreg16(ks, KS_CCR); | |
1499 | ||
1500 | if (ks->rc_ccr & CCR_EEPROM) | |
1501 | ks->eeprom_size = 128; | |
1502 | else | |
1503 | ks->eeprom_size = 0; | |
1504 | ||
3ba81f3e BD |
1505 | ks8851_read_selftest(ks); |
1506 | ks8851_init_mac(ks); | |
1507 | ||
1508 | ret = request_irq(spi->irq, ks8851_irq, IRQF_TRIGGER_LOW, | |
1509 | ndev->name, ks); | |
1510 | if (ret < 0) { | |
1511 | dev_err(&spi->dev, "failed to get irq\n"); | |
1512 | goto err_irq; | |
1513 | } | |
1514 | ||
1515 | ret = register_netdev(ndev); | |
1516 | if (ret) { | |
1517 | dev_err(&spi->dev, "failed to register network device\n"); | |
1518 | goto err_netdev; | |
1519 | } | |
1520 | ||
a9a8de21 | 1521 | netdev_info(ndev, "revision %d, MAC %pM, IRQ %d, %s EEPROM\n", |
51c61a28 | 1522 | CIDER_REV_GET(cider), ndev->dev_addr, ndev->irq, |
a9a8de21 | 1523 | ks->rc_ccr & CCR_EEPROM ? "has" : "no"); |
3ba81f3e BD |
1524 | |
1525 | return 0; | |
1526 | ||
1527 | ||
1528 | err_netdev: | |
e8195b24 | 1529 | free_irq(ndev->irq, ks); |
3ba81f3e BD |
1530 | |
1531 | err_id: | |
1532 | err_irq: | |
1533 | free_netdev(ndev); | |
1534 | return ret; | |
1535 | } | |
1536 | ||
654b8c5c | 1537 | static int ks8851_remove(struct spi_device *spi) |
3ba81f3e BD |
1538 | { |
1539 | struct ks8851_net *priv = dev_get_drvdata(&spi->dev); | |
1540 | ||
1541 | if (netif_msg_drv(priv)) | |
0dc7d2b3 | 1542 | dev_info(&spi->dev, "remove\n"); |
3ba81f3e BD |
1543 | |
1544 | unregister_netdev(priv->netdev); | |
1545 | free_irq(spi->irq, priv); | |
1546 | free_netdev(priv->netdev); | |
1547 | ||
1548 | return 0; | |
1549 | } | |
1550 | ||
1551 | static struct spi_driver ks8851_driver = { | |
1552 | .driver = { | |
1553 | .name = "ks8851", | |
1554 | .owner = THIS_MODULE, | |
1555 | }, | |
1556 | .probe = ks8851_probe, | |
654b8c5c | 1557 | .remove = ks8851_remove, |
1d5439b9 AA |
1558 | .suspend = ks8851_suspend, |
1559 | .resume = ks8851_resume, | |
3ba81f3e BD |
1560 | }; |
1561 | ||
1562 | static int __init ks8851_init(void) | |
1563 | { | |
1564 | return spi_register_driver(&ks8851_driver); | |
1565 | } | |
1566 | ||
1567 | static void __exit ks8851_exit(void) | |
1568 | { | |
1569 | spi_unregister_driver(&ks8851_driver); | |
1570 | } | |
1571 | ||
1572 | module_init(ks8851_init); | |
1573 | module_exit(ks8851_exit); | |
1574 | ||
1575 | MODULE_DESCRIPTION("KS8851 Network driver"); | |
1576 | MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>"); | |
1577 | MODULE_LICENSE("GPL"); | |
1578 | ||
1579 | module_param_named(message, msg_enable, int, 0); | |
1580 | MODULE_PARM_DESC(message, "Message verbosity level (0=none, 31=all)"); | |
e0626e38 | 1581 | MODULE_ALIAS("spi:ks8851"); |