eeprom_93cx6: Add write support
[linux-block.git] / drivers / net / ethernet / micrel / ks8851.c
CommitLineData
3320eae5 1/* drivers/net/ks8851.c
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2 *
3 * Copyright 2009 Simtec Electronics
4 * http://www.simtec.co.uk/
5 * Ben Dooks <ben@simtec.co.uk>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
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12#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
13
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14#define DEBUG
15
a6b7a407 16#include <linux/interrupt.h>
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17#include <linux/module.h>
18#include <linux/kernel.h>
19#include <linux/netdevice.h>
20#include <linux/etherdevice.h>
21#include <linux/ethtool.h>
22#include <linux/cache.h>
23#include <linux/crc32.h>
24#include <linux/mii.h>
25
26#include <linux/spi/spi.h>
27
28#include "ks8851.h"
29
30/**
31 * struct ks8851_rxctrl - KS8851 driver rx control
32 * @mchash: Multicast hash-table data.
33 * @rxcr1: KS_RXCR1 register setting
34 * @rxcr2: KS_RXCR2 register setting
35 *
36 * Representation of the settings needs to control the receive filtering
37 * such as the multicast hash-filter and the receive register settings. This
38 * is used to make the job of working out if the receive settings change and
39 * then issuing the new settings to the worker that will send the necessary
40 * commands.
41 */
42struct ks8851_rxctrl {
43 u16 mchash[4];
44 u16 rxcr1;
45 u16 rxcr2;
46};
47
48/**
49 * union ks8851_tx_hdr - tx header data
50 * @txb: The header as bytes
51 * @txw: The header as 16bit, little-endian words
52 *
53 * A dual representation of the tx header data to allow
54 * access to individual bytes, and to allow 16bit accesses
55 * with 16bit alignment.
56 */
57union ks8851_tx_hdr {
58 u8 txb[6];
59 __le16 txw[3];
60};
61
62/**
63 * struct ks8851_net - KS8851 driver private data
64 * @netdev: The network device we're bound to
65 * @spidev: The spi device we're bound to.
66 * @lock: Lock to ensure that the device is not accessed when busy.
67 * @statelock: Lock on this structure for tx list.
68 * @mii: The MII state information for the mii calls.
69 * @rxctrl: RX settings for @rxctrl_work.
70 * @tx_work: Work queue for tx packets
71 * @irq_work: Work queue for servicing interrupts
72 * @rxctrl_work: Work queue for updating RX mode and multicast lists
73 * @txq: Queue of packets for transmission.
74 * @spi_msg1: pre-setup SPI transfer with one message, @spi_xfer1.
75 * @spi_msg2: pre-setup SPI transfer with two messages, @spi_xfer2.
76 * @txh: Space for generating packet TX header in DMA-able data
77 * @rxd: Space for receiving SPI data, in DMA-able space.
78 * @txd: Space for transmitting SPI data, in DMA-able space.
79 * @msg_enable: The message flags controlling driver output (see ethtool).
80 * @fid: Incrementing frame id tag.
81 * @rc_ier: Cached copy of KS_IER.
7d997466 82 * @rc_ccr: Cached copy of KS_CCR.
3ba81f3e 83 * @rc_rxqcr: Cached copy of KS_RXQCR.
7d997466 84 * @eeprom_size: Companion eeprom size in Bytes, 0 if no eeprom
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85 *
86 * The @lock ensures that the chip is protected when certain operations are
87 * in progress. When the read or write packet transfer is in progress, most
88 * of the chip registers are not ccessible until the transfer is finished and
89 * the DMA has been de-asserted.
90 *
91 * The @statelock is used to protect information in the structure which may
92 * need to be accessed via several sources, such as the network driver layer
93 * or one of the work queues.
94 *
95 * We align the buffers we may use for rx/tx to ensure that if the SPI driver
96 * wants to DMA map them, it will not have any problems with data the driver
97 * modifies.
98 */
99struct ks8851_net {
100 struct net_device *netdev;
101 struct spi_device *spidev;
102 struct mutex lock;
103 spinlock_t statelock;
104
105 union ks8851_tx_hdr txh ____cacheline_aligned;
106 u8 rxd[8];
107 u8 txd[8];
108
109 u32 msg_enable ____cacheline_aligned;
110 u16 tx_space;
111 u8 fid;
112
113 u16 rc_ier;
114 u16 rc_rxqcr;
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115 u16 rc_ccr;
116 u16 eeprom_size;
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117
118 struct mii_if_info mii;
119 struct ks8851_rxctrl rxctrl;
120
121 struct work_struct tx_work;
122 struct work_struct irq_work;
123 struct work_struct rxctrl_work;
124
125 struct sk_buff_head txq;
126
127 struct spi_message spi_msg1;
128 struct spi_message spi_msg2;
129 struct spi_transfer spi_xfer1;
130 struct spi_transfer spi_xfer2[2];
131};
132
133static int msg_enable;
134
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135/* shift for byte-enable data */
136#define BYTE_EN(_x) ((_x) << 2)
137
138/* turn register number and byte-enable mask into data for start of packet */
139#define MK_OP(_byteen, _reg) (BYTE_EN(_byteen) | (_reg) << (8+2) | (_reg) >> 6)
140
141/* SPI register read/write calls.
142 *
143 * All these calls issue SPI transactions to access the chip's registers. They
144 * all require that the necessary lock is held to prevent accesses when the
25985edc 145 * chip is busy transferring packet data (RX/TX FIFO accesses).
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146 */
147
148/**
149 * ks8851_wrreg16 - write 16bit register value to chip
150 * @ks: The chip state
151 * @reg: The register address
152 * @val: The value to write
153 *
154 * Issue a write to put the value @val into the register specified in @reg.
155 */
156static void ks8851_wrreg16(struct ks8851_net *ks, unsigned reg, unsigned val)
157{
158 struct spi_transfer *xfer = &ks->spi_xfer1;
159 struct spi_message *msg = &ks->spi_msg1;
160 __le16 txb[2];
161 int ret;
162
163 txb[0] = cpu_to_le16(MK_OP(reg & 2 ? 0xC : 0x03, reg) | KS_SPIOP_WR);
164 txb[1] = cpu_to_le16(val);
165
166 xfer->tx_buf = txb;
167 xfer->rx_buf = NULL;
168 xfer->len = 4;
169
170 ret = spi_sync(ks->spidev, msg);
171 if (ret < 0)
0dc7d2b3 172 netdev_err(ks->netdev, "spi_sync() failed\n");
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173}
174
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175/**
176 * ks8851_wrreg8 - write 8bit register value to chip
177 * @ks: The chip state
178 * @reg: The register address
179 * @val: The value to write
180 *
181 * Issue a write to put the value @val into the register specified in @reg.
182 */
183static void ks8851_wrreg8(struct ks8851_net *ks, unsigned reg, unsigned val)
184{
185 struct spi_transfer *xfer = &ks->spi_xfer1;
186 struct spi_message *msg = &ks->spi_msg1;
187 __le16 txb[2];
188 int ret;
189 int bit;
190
191 bit = 1 << (reg & 3);
192
193 txb[0] = cpu_to_le16(MK_OP(bit, reg) | KS_SPIOP_WR);
194 txb[1] = val;
195
196 xfer->tx_buf = txb;
197 xfer->rx_buf = NULL;
198 xfer->len = 3;
199
200 ret = spi_sync(ks->spidev, msg);
201 if (ret < 0)
0dc7d2b3 202 netdev_err(ks->netdev, "spi_sync() failed\n");
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203}
204
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205/**
206 * ks8851_rx_1msg - select whether to use one or two messages for spi read
207 * @ks: The device structure
208 *
209 * Return whether to generate a single message with a tx and rx buffer
210 * supplied to spi_sync(), or alternatively send the tx and rx buffers
211 * as separate messages.
212 *
213 * Depending on the hardware in use, a single message may be more efficient
214 * on interrupts or work done by the driver.
215 *
216 * This currently always returns true until we add some per-device data passed
217 * from the platform code to specify which mode is better.
218 */
219static inline bool ks8851_rx_1msg(struct ks8851_net *ks)
220{
221 return true;
222}
223
224/**
225 * ks8851_rdreg - issue read register command and return the data
226 * @ks: The device state
227 * @op: The register address and byte enables in message format.
228 * @rxb: The RX buffer to return the result into
229 * @rxl: The length of data expected.
230 *
231 * This is the low level read call that issues the necessary spi message(s)
232 * to read data from the register specified in @op.
233 */
234static void ks8851_rdreg(struct ks8851_net *ks, unsigned op,
235 u8 *rxb, unsigned rxl)
236{
237 struct spi_transfer *xfer;
238 struct spi_message *msg;
239 __le16 *txb = (__le16 *)ks->txd;
240 u8 *trx = ks->rxd;
241 int ret;
242
243 txb[0] = cpu_to_le16(op | KS_SPIOP_RD);
244
245 if (ks8851_rx_1msg(ks)) {
246 msg = &ks->spi_msg1;
247 xfer = &ks->spi_xfer1;
248
249 xfer->tx_buf = txb;
250 xfer->rx_buf = trx;
251 xfer->len = rxl + 2;
252 } else {
253 msg = &ks->spi_msg2;
254 xfer = ks->spi_xfer2;
255
256 xfer->tx_buf = txb;
257 xfer->rx_buf = NULL;
258 xfer->len = 2;
259
260 xfer++;
261 xfer->tx_buf = NULL;
262 xfer->rx_buf = trx;
263 xfer->len = rxl;
264 }
265
266 ret = spi_sync(ks->spidev, msg);
267 if (ret < 0)
0dc7d2b3 268 netdev_err(ks->netdev, "read: spi_sync() failed\n");
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269 else if (ks8851_rx_1msg(ks))
270 memcpy(rxb, trx + 2, rxl);
271 else
272 memcpy(rxb, trx, rxl);
273}
274
275/**
276 * ks8851_rdreg8 - read 8 bit register from device
277 * @ks: The chip information
278 * @reg: The register address
279 *
280 * Read a 8bit register from the chip, returning the result
281*/
282static unsigned ks8851_rdreg8(struct ks8851_net *ks, unsigned reg)
283{
284 u8 rxb[1];
285
286 ks8851_rdreg(ks, MK_OP(1 << (reg & 3), reg), rxb, 1);
287 return rxb[0];
288}
289
290/**
291 * ks8851_rdreg16 - read 16 bit register from device
292 * @ks: The chip information
293 * @reg: The register address
294 *
295 * Read a 16bit register from the chip, returning the result
296*/
297static unsigned ks8851_rdreg16(struct ks8851_net *ks, unsigned reg)
298{
299 __le16 rx = 0;
300
301 ks8851_rdreg(ks, MK_OP(reg & 2 ? 0xC : 0x3, reg), (u8 *)&rx, 2);
302 return le16_to_cpu(rx);
303}
304
305/**
306 * ks8851_rdreg32 - read 32 bit register from device
307 * @ks: The chip information
308 * @reg: The register address
309 *
310 * Read a 32bit register from the chip.
311 *
312 * Note, this read requires the address be aligned to 4 bytes.
313*/
314static unsigned ks8851_rdreg32(struct ks8851_net *ks, unsigned reg)
315{
316 __le32 rx = 0;
317
318 WARN_ON(reg & 3);
319
320 ks8851_rdreg(ks, MK_OP(0xf, reg), (u8 *)&rx, 4);
321 return le32_to_cpu(rx);
322}
323
324/**
325 * ks8851_soft_reset - issue one of the soft reset to the device
326 * @ks: The device state.
327 * @op: The bit(s) to set in the GRR
328 *
329 * Issue the relevant soft-reset command to the device's GRR register
330 * specified by @op.
331 *
332 * Note, the delays are in there as a caution to ensure that the reset
333 * has time to take effect and then complete. Since the datasheet does
334 * not currently specify the exact sequence, we have chosen something
335 * that seems to work with our device.
336 */
337static void ks8851_soft_reset(struct ks8851_net *ks, unsigned op)
338{
339 ks8851_wrreg16(ks, KS_GRR, op);
340 mdelay(1); /* wait a short time to effect reset */
341 ks8851_wrreg16(ks, KS_GRR, 0);
342 mdelay(1); /* wait for condition to clear */
343}
344
345/**
346 * ks8851_write_mac_addr - write mac address to device registers
347 * @dev: The network device
348 *
349 * Update the KS8851 MAC address registers from the address in @dev.
350 *
351 * This call assumes that the chip is not running, so there is no need to
352 * shutdown the RXQ process whilst setting this.
353*/
354static int ks8851_write_mac_addr(struct net_device *dev)
355{
356 struct ks8851_net *ks = netdev_priv(dev);
160d0fad 357 int i;
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358
359 mutex_lock(&ks->lock);
360
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361 for (i = 0; i < ETH_ALEN; i++)
362 ks8851_wrreg8(ks, KS_MAR(i), dev->dev_addr[i]);
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363
364 mutex_unlock(&ks->lock);
365
366 return 0;
367}
368
369/**
370 * ks8851_init_mac - initialise the mac address
371 * @ks: The device structure
372 *
373 * Get or create the initial mac address for the device and then set that
374 * into the station address register. Currently we assume that the device
375 * does not have a valid mac address in it, and so we use random_ether_addr()
376 * to create a new one.
377 *
378 * In future, the driver should check to see if the device has an EEPROM
379 * attached and whether that has a valid ethernet address in it.
380 */
381static void ks8851_init_mac(struct ks8851_net *ks)
382{
383 struct net_device *dev = ks->netdev;
384
385 random_ether_addr(dev->dev_addr);
386 ks8851_write_mac_addr(dev);
387}
388
389/**
390 * ks8851_irq - device interrupt handler
391 * @irq: Interrupt number passed from the IRQ hnalder.
392 * @pw: The private word passed to register_irq(), our struct ks8851_net.
393 *
394 * Disable the interrupt from happening again until we've processed the
395 * current status by scheduling ks8851_irq_work().
396 */
397static irqreturn_t ks8851_irq(int irq, void *pw)
398{
399 struct ks8851_net *ks = pw;
400
401 disable_irq_nosync(irq);
402 schedule_work(&ks->irq_work);
403 return IRQ_HANDLED;
404}
405
406/**
407 * ks8851_rdfifo - read data from the receive fifo
408 * @ks: The device state.
409 * @buff: The buffer address
410 * @len: The length of the data to read
411 *
9ddc5b6f 412 * Issue an RXQ FIFO read command and read the @len amount of data from
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413 * the FIFO into the buffer specified by @buff.
414 */
415static void ks8851_rdfifo(struct ks8851_net *ks, u8 *buff, unsigned len)
416{
417 struct spi_transfer *xfer = ks->spi_xfer2;
418 struct spi_message *msg = &ks->spi_msg2;
419 u8 txb[1];
420 int ret;
421
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JP
422 netif_dbg(ks, rx_status, ks->netdev,
423 "%s: %d@%p\n", __func__, len, buff);
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424
425 /* set the operation we're issuing */
426 txb[0] = KS_SPIOP_RXFIFO;
427
428 xfer->tx_buf = txb;
429 xfer->rx_buf = NULL;
430 xfer->len = 1;
431
432 xfer++;
433 xfer->rx_buf = buff;
434 xfer->tx_buf = NULL;
435 xfer->len = len;
436
437 ret = spi_sync(ks->spidev, msg);
438 if (ret < 0)
0dc7d2b3 439 netdev_err(ks->netdev, "%s: spi_sync() failed\n", __func__);
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440}
441
442/**
443 * ks8851_dbg_dumpkkt - dump initial packet contents to debug
444 * @ks: The device state
445 * @rxpkt: The data for the received packet
446 *
447 * Dump the initial data from the packet to dev_dbg().
448*/
449static void ks8851_dbg_dumpkkt(struct ks8851_net *ks, u8 *rxpkt)
450{
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451 netdev_dbg(ks->netdev,
452 "pkt %02x%02x%02x%02x %02x%02x%02x%02x %02x%02x%02x%02x\n",
453 rxpkt[4], rxpkt[5], rxpkt[6], rxpkt[7],
454 rxpkt[8], rxpkt[9], rxpkt[10], rxpkt[11],
455 rxpkt[12], rxpkt[13], rxpkt[14], rxpkt[15]);
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456}
457
458/**
459 * ks8851_rx_pkts - receive packets from the host
460 * @ks: The device information.
461 *
462 * This is called from the IRQ work queue when the system detects that there
463 * are packets in the receive queue. Find out how many packets there are and
464 * read them from the FIFO.
465 */
466static void ks8851_rx_pkts(struct ks8851_net *ks)
467{
468 struct sk_buff *skb;
469 unsigned rxfc;
470 unsigned rxlen;
471 unsigned rxstat;
472 u32 rxh;
473 u8 *rxpkt;
474
475 rxfc = ks8851_rdreg8(ks, KS_RXFC);
476
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JP
477 netif_dbg(ks, rx_status, ks->netdev,
478 "%s: %d packets\n", __func__, rxfc);
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479
480 /* Currently we're issuing a read per packet, but we could possibly
481 * improve the code by issuing a single read, getting the receive
482 * header, allocating the packet and then reading the packet data
483 * out in one go.
484 *
485 * This form of operation would require us to hold the SPI bus'
486 * chipselect low during the entie transaction to avoid any
25985edc 487 * reset to the data stream coming from the chip.
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488 */
489
490 for (; rxfc != 0; rxfc--) {
491 rxh = ks8851_rdreg32(ks, KS_RXFHSR);
492 rxstat = rxh & 0xffff;
493 rxlen = rxh >> 16;
494
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JP
495 netif_dbg(ks, rx_status, ks->netdev,
496 "rx: stat 0x%04x, len 0x%04x\n", rxstat, rxlen);
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497
498 /* the length of the packet includes the 32bit CRC */
499
500 /* set dma read address */
501 ks8851_wrreg16(ks, KS_RXFDPR, RXFDPR_RXFPAI | 0x00);
502
503 /* start the packet dma process, and set auto-dequeue rx */
504 ks8851_wrreg16(ks, KS_RXQCR,
505 ks->rc_rxqcr | RXQCR_SDA | RXQCR_ADRFE);
506
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507 if (rxlen > 4) {
508 unsigned int rxalign;
509
510 rxlen -= 4;
511 rxalign = ALIGN(rxlen, 4);
512 skb = netdev_alloc_skb_ip_align(ks->netdev, rxalign);
513 if (skb) {
3ba81f3e 514
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515 /* 4 bytes of status header + 4 bytes of
516 * garbage: we put them before ethernet
517 * header, so that they are copied,
518 * but ignored.
519 */
3ba81f3e 520
972c40b5 521 rxpkt = skb_put(skb, rxlen) - 8;
3ba81f3e 522
972c40b5 523 ks8851_rdfifo(ks, rxpkt, rxalign + 8);
3ba81f3e 524
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ED
525 if (netif_msg_pktdata(ks))
526 ks8851_dbg_dumpkkt(ks, rxpkt);
3ba81f3e 527
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ED
528 skb->protocol = eth_type_trans(skb, ks->netdev);
529 netif_rx(skb);
3ba81f3e 530
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531 ks->netdev->stats.rx_packets++;
532 ks->netdev->stats.rx_bytes += rxlen;
533 }
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534 }
535
536 ks8851_wrreg16(ks, KS_RXQCR, ks->rc_rxqcr);
537 }
538}
539
540/**
541 * ks8851_irq_work - work queue handler for dealing with interrupt requests
542 * @work: The work structure that was scheduled by schedule_work()
543 *
544 * This is the handler invoked when the ks8851_irq() is called to find out
545 * what happened, as we cannot allow ourselves to sleep whilst waiting for
546 * anything other process has the chip's lock.
547 *
548 * Read the interrupt status, work out what needs to be done and then clear
549 * any of the interrupts that are not needed.
550 */
551static void ks8851_irq_work(struct work_struct *work)
552{
553 struct ks8851_net *ks = container_of(work, struct ks8851_net, irq_work);
554 unsigned status;
555 unsigned handled = 0;
556
557 mutex_lock(&ks->lock);
558
559 status = ks8851_rdreg16(ks, KS_ISR);
560
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561 netif_dbg(ks, intr, ks->netdev,
562 "%s: status 0x%04x\n", __func__, status);
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563
564 if (status & IRQ_LCI) {
565 /* should do something about checking link status */
566 handled |= IRQ_LCI;
567 }
568
569 if (status & IRQ_LDI) {
570 u16 pmecr = ks8851_rdreg16(ks, KS_PMECR);
571 pmecr &= ~PMECR_WKEVT_MASK;
572 ks8851_wrreg16(ks, KS_PMECR, pmecr | PMECR_WKEVT_LINK);
573
574 handled |= IRQ_LDI;
575 }
576
577 if (status & IRQ_RXPSI)
578 handled |= IRQ_RXPSI;
579
580 if (status & IRQ_TXI) {
581 handled |= IRQ_TXI;
582
583 /* no lock here, tx queue should have been stopped */
584
585 /* update our idea of how much tx space is available to the
586 * system */
587 ks->tx_space = ks8851_rdreg16(ks, KS_TXMIR);
588
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JP
589 netif_dbg(ks, intr, ks->netdev,
590 "%s: txspace %d\n", __func__, ks->tx_space);
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591 }
592
593 if (status & IRQ_RXI)
594 handled |= IRQ_RXI;
595
596 if (status & IRQ_SPIBEI) {
597 dev_err(&ks->spidev->dev, "%s: spi bus error\n", __func__);
598 handled |= IRQ_SPIBEI;
599 }
600
601 ks8851_wrreg16(ks, KS_ISR, handled);
602
603 if (status & IRQ_RXI) {
604 /* the datasheet says to disable the rx interrupt during
605 * packet read-out, however we're masking the interrupt
606 * from the device so do not bother masking just the RX
607 * from the device. */
608
609 ks8851_rx_pkts(ks);
610 }
611
612 /* if something stopped the rx process, probably due to wanting
613 * to change the rx settings, then do something about restarting
614 * it. */
615 if (status & IRQ_RXPSI) {
616 struct ks8851_rxctrl *rxc = &ks->rxctrl;
617
618 /* update the multicast hash table */
619 ks8851_wrreg16(ks, KS_MAHTR0, rxc->mchash[0]);
620 ks8851_wrreg16(ks, KS_MAHTR1, rxc->mchash[1]);
621 ks8851_wrreg16(ks, KS_MAHTR2, rxc->mchash[2]);
622 ks8851_wrreg16(ks, KS_MAHTR3, rxc->mchash[3]);
623
624 ks8851_wrreg16(ks, KS_RXCR2, rxc->rxcr2);
625 ks8851_wrreg16(ks, KS_RXCR1, rxc->rxcr1);
626 }
627
628 mutex_unlock(&ks->lock);
629
630 if (status & IRQ_TXI)
631 netif_wake_queue(ks->netdev);
632
633 enable_irq(ks->netdev->irq);
634}
635
636/**
637 * calc_txlen - calculate size of message to send packet
25985edc 638 * @len: Length of data
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639 *
640 * Returns the size of the TXFIFO message needed to send
641 * this packet.
642 */
643static inline unsigned calc_txlen(unsigned len)
644{
645 return ALIGN(len + 4, 4);
646}
647
648/**
649 * ks8851_wrpkt - write packet to TX FIFO
650 * @ks: The device state.
651 * @txp: The sk_buff to transmit.
652 * @irq: IRQ on completion of the packet.
653 *
654 * Send the @txp to the chip. This means creating the relevant packet header
655 * specifying the length of the packet and the other information the chip
656 * needs, such as IRQ on completion. Send the header and the packet data to
657 * the device.
658 */
659static void ks8851_wrpkt(struct ks8851_net *ks, struct sk_buff *txp, bool irq)
660{
661 struct spi_transfer *xfer = ks->spi_xfer2;
662 struct spi_message *msg = &ks->spi_msg2;
663 unsigned fid = 0;
664 int ret;
665
0dc7d2b3
JP
666 netif_dbg(ks, tx_queued, ks->netdev, "%s: skb %p, %d@%p, irq %d\n",
667 __func__, txp, txp->len, txp->data, irq);
3ba81f3e
BD
668
669 fid = ks->fid++;
670 fid &= TXFR_TXFID_MASK;
671
672 if (irq)
673 fid |= TXFR_TXIC; /* irq on completion */
674
675 /* start header at txb[1] to align txw entries */
676 ks->txh.txb[1] = KS_SPIOP_TXFIFO;
677 ks->txh.txw[1] = cpu_to_le16(fid);
678 ks->txh.txw[2] = cpu_to_le16(txp->len);
679
680 xfer->tx_buf = &ks->txh.txb[1];
681 xfer->rx_buf = NULL;
682 xfer->len = 5;
683
684 xfer++;
685 xfer->tx_buf = txp->data;
686 xfer->rx_buf = NULL;
687 xfer->len = ALIGN(txp->len, 4);
688
689 ret = spi_sync(ks->spidev, msg);
690 if (ret < 0)
0dc7d2b3 691 netdev_err(ks->netdev, "%s: spi_sync() failed\n", __func__);
3ba81f3e
BD
692}
693
694/**
695 * ks8851_done_tx - update and then free skbuff after transmitting
696 * @ks: The device state
697 * @txb: The buffer transmitted
698 */
699static void ks8851_done_tx(struct ks8851_net *ks, struct sk_buff *txb)
700{
701 struct net_device *dev = ks->netdev;
702
703 dev->stats.tx_bytes += txb->len;
704 dev->stats.tx_packets++;
705
706 dev_kfree_skb(txb);
707}
708
709/**
710 * ks8851_tx_work - process tx packet(s)
711 * @work: The work strucutre what was scheduled.
712 *
713 * This is called when a number of packets have been scheduled for
714 * transmission and need to be sent to the device.
715 */
716static void ks8851_tx_work(struct work_struct *work)
717{
718 struct ks8851_net *ks = container_of(work, struct ks8851_net, tx_work);
719 struct sk_buff *txb;
3320eae5 720 bool last = skb_queue_empty(&ks->txq);
3ba81f3e
BD
721
722 mutex_lock(&ks->lock);
723
724 while (!last) {
725 txb = skb_dequeue(&ks->txq);
726 last = skb_queue_empty(&ks->txq);
727
761172fb
AA
728 if (txb != NULL) {
729 ks8851_wrreg16(ks, KS_RXQCR, ks->rc_rxqcr | RXQCR_SDA);
730 ks8851_wrpkt(ks, txb, last);
731 ks8851_wrreg16(ks, KS_RXQCR, ks->rc_rxqcr);
732 ks8851_wrreg16(ks, KS_TXQCR, TXQCR_METFE);
3ba81f3e 733
761172fb
AA
734 ks8851_done_tx(ks, txb);
735 }
3ba81f3e
BD
736 }
737
738 mutex_unlock(&ks->lock);
739}
740
741/**
742 * ks8851_set_powermode - set power mode of the device
743 * @ks: The device state
744 * @pwrmode: The power mode value to write to KS_PMECR.
745 *
746 * Change the power mode of the chip.
747 */
748static void ks8851_set_powermode(struct ks8851_net *ks, unsigned pwrmode)
749{
750 unsigned pmecr;
751
0dc7d2b3 752 netif_dbg(ks, hw, ks->netdev, "setting power mode %d\n", pwrmode);
3ba81f3e
BD
753
754 pmecr = ks8851_rdreg16(ks, KS_PMECR);
755 pmecr &= ~PMECR_PM_MASK;
756 pmecr |= pwrmode;
757
758 ks8851_wrreg16(ks, KS_PMECR, pmecr);
759}
760
761/**
762 * ks8851_net_open - open network device
763 * @dev: The network device being opened.
764 *
765 * Called when the network device is marked active, such as a user executing
766 * 'ifconfig up' on the device.
767 */
768static int ks8851_net_open(struct net_device *dev)
769{
770 struct ks8851_net *ks = netdev_priv(dev);
771
772 /* lock the card, even if we may not actually be doing anything
773 * else at the moment */
774 mutex_lock(&ks->lock);
775
0dc7d2b3 776 netif_dbg(ks, ifup, ks->netdev, "opening\n");
3ba81f3e
BD
777
778 /* bring chip out of any power saving mode it was in */
779 ks8851_set_powermode(ks, PMECR_PM_NORMAL);
780
781 /* issue a soft reset to the RX/TX QMU to put it into a known
782 * state. */
783 ks8851_soft_reset(ks, GRR_QMU);
784
785 /* setup transmission parameters */
786
787 ks8851_wrreg16(ks, KS_TXCR, (TXCR_TXE | /* enable transmit process */
788 TXCR_TXPE | /* pad to min length */
789 TXCR_TXCRC | /* add CRC */
790 TXCR_TXFCE)); /* enable flow control */
791
792 /* auto-increment tx data, reset tx pointer */
793 ks8851_wrreg16(ks, KS_TXFDPR, TXFDPR_TXFPAI);
794
795 /* setup receiver control */
796
797 ks8851_wrreg16(ks, KS_RXCR1, (RXCR1_RXPAFMA | /* from mac filter */
798 RXCR1_RXFCE | /* enable flow control */
799 RXCR1_RXBE | /* broadcast enable */
800 RXCR1_RXUE | /* unicast enable */
801 RXCR1_RXE)); /* enable rx block */
802
803 /* transfer entire frames out in one go */
804 ks8851_wrreg16(ks, KS_RXCR2, RXCR2_SRDBL_FRAME);
805
806 /* set receive counter timeouts */
807 ks8851_wrreg16(ks, KS_RXDTTR, 1000); /* 1ms after first frame to IRQ */
808 ks8851_wrreg16(ks, KS_RXDBCTR, 4096); /* >4Kbytes in buffer to IRQ */
809 ks8851_wrreg16(ks, KS_RXFCTR, 10); /* 10 frames to IRQ */
810
811 ks->rc_rxqcr = (RXQCR_RXFCTE | /* IRQ on frame count exceeded */
812 RXQCR_RXDBCTE | /* IRQ on byte count exceeded */
813 RXQCR_RXDTTE); /* IRQ on time exceeded */
814
815 ks8851_wrreg16(ks, KS_RXQCR, ks->rc_rxqcr);
816
817 /* clear then enable interrupts */
818
819#define STD_IRQ (IRQ_LCI | /* Link Change */ \
820 IRQ_TXI | /* TX done */ \
821 IRQ_RXI | /* RX done */ \
822 IRQ_SPIBEI | /* SPI bus error */ \
823 IRQ_TXPSI | /* TX process stop */ \
824 IRQ_RXPSI) /* RX process stop */
825
826 ks->rc_ier = STD_IRQ;
827 ks8851_wrreg16(ks, KS_ISR, STD_IRQ);
828 ks8851_wrreg16(ks, KS_IER, STD_IRQ);
829
830 netif_start_queue(ks->netdev);
831
0dc7d2b3 832 netif_dbg(ks, ifup, ks->netdev, "network device up\n");
3ba81f3e
BD
833
834 mutex_unlock(&ks->lock);
835 return 0;
836}
837
838/**
839 * ks8851_net_stop - close network device
840 * @dev: The device being closed.
841 *
842 * Called to close down a network device which has been active. Cancell any
843 * work, shutdown the RX and TX process and then place the chip into a low
844 * power state whilst it is not being used.
845 */
846static int ks8851_net_stop(struct net_device *dev)
847{
848 struct ks8851_net *ks = netdev_priv(dev);
849
0dc7d2b3 850 netif_info(ks, ifdown, dev, "shutting down\n");
3ba81f3e
BD
851
852 netif_stop_queue(dev);
853
854 mutex_lock(&ks->lock);
855
856 /* stop any outstanding work */
857 flush_work(&ks->irq_work);
858 flush_work(&ks->tx_work);
859 flush_work(&ks->rxctrl_work);
860
861 /* turn off the IRQs and ack any outstanding */
862 ks8851_wrreg16(ks, KS_IER, 0x0000);
863 ks8851_wrreg16(ks, KS_ISR, 0xffff);
864
865 /* shutdown RX process */
866 ks8851_wrreg16(ks, KS_RXCR1, 0x0000);
867
868 /* shutdown TX process */
869 ks8851_wrreg16(ks, KS_TXCR, 0x0000);
870
871 /* set powermode to soft power down to save power */
872 ks8851_set_powermode(ks, PMECR_PM_SOFTDOWN);
873
874 /* ensure any queued tx buffers are dumped */
875 while (!skb_queue_empty(&ks->txq)) {
876 struct sk_buff *txb = skb_dequeue(&ks->txq);
877
0dc7d2b3
JP
878 netif_dbg(ks, ifdown, ks->netdev,
879 "%s: freeing txb %p\n", __func__, txb);
3ba81f3e
BD
880
881 dev_kfree_skb(txb);
882 }
883
884 mutex_unlock(&ks->lock);
885 return 0;
886}
887
888/**
889 * ks8851_start_xmit - transmit packet
890 * @skb: The buffer to transmit
891 * @dev: The device used to transmit the packet.
892 *
893 * Called by the network layer to transmit the @skb. Queue the packet for
894 * the device and schedule the necessary work to transmit the packet when
895 * it is free.
896 *
897 * We do this to firstly avoid sleeping with the network device locked,
898 * and secondly so we can round up more than one packet to transmit which
899 * means we can try and avoid generating too many transmit done interrupts.
900 */
61357325
SH
901static netdev_tx_t ks8851_start_xmit(struct sk_buff *skb,
902 struct net_device *dev)
3ba81f3e
BD
903{
904 struct ks8851_net *ks = netdev_priv(dev);
905 unsigned needed = calc_txlen(skb->len);
61357325 906 netdev_tx_t ret = NETDEV_TX_OK;
3ba81f3e 907
0dc7d2b3
JP
908 netif_dbg(ks, tx_queued, ks->netdev,
909 "%s: skb %p, %d@%p\n", __func__, skb, skb->len, skb->data);
3ba81f3e
BD
910
911 spin_lock(&ks->statelock);
912
913 if (needed > ks->tx_space) {
914 netif_stop_queue(dev);
915 ret = NETDEV_TX_BUSY;
916 } else {
917 ks->tx_space -= needed;
918 skb_queue_tail(&ks->txq, skb);
919 }
920
921 spin_unlock(&ks->statelock);
922 schedule_work(&ks->tx_work);
923
924 return ret;
925}
926
927/**
928 * ks8851_rxctrl_work - work handler to change rx mode
929 * @work: The work structure this belongs to.
930 *
931 * Lock the device and issue the necessary changes to the receive mode from
932 * the network device layer. This is done so that we can do this without
933 * having to sleep whilst holding the network device lock.
934 *
935 * Since the recommendation from Micrel is that the RXQ is shutdown whilst the
936 * receive parameters are programmed, we issue a write to disable the RXQ and
937 * then wait for the interrupt handler to be triggered once the RXQ shutdown is
938 * complete. The interrupt handler then writes the new values into the chip.
939 */
940static void ks8851_rxctrl_work(struct work_struct *work)
941{
942 struct ks8851_net *ks = container_of(work, struct ks8851_net, rxctrl_work);
943
944 mutex_lock(&ks->lock);
945
946 /* need to shutdown RXQ before modifying filter parameters */
947 ks8851_wrreg16(ks, KS_RXCR1, 0x00);
948
949 mutex_unlock(&ks->lock);
950}
951
952static void ks8851_set_rx_mode(struct net_device *dev)
953{
954 struct ks8851_net *ks = netdev_priv(dev);
955 struct ks8851_rxctrl rxctrl;
956
957 memset(&rxctrl, 0, sizeof(rxctrl));
958
959 if (dev->flags & IFF_PROMISC) {
960 /* interface to receive everything */
961
962 rxctrl.rxcr1 = RXCR1_RXAE | RXCR1_RXINVF;
963 } else if (dev->flags & IFF_ALLMULTI) {
964 /* accept all multicast packets */
965
966 rxctrl.rxcr1 = (RXCR1_RXME | RXCR1_RXAE |
967 RXCR1_RXPAFMA | RXCR1_RXMAFMA);
4cd24eaf 968 } else if (dev->flags & IFF_MULTICAST && !netdev_mc_empty(dev)) {
22bedad3 969 struct netdev_hw_addr *ha;
3ba81f3e 970 u32 crc;
3ba81f3e
BD
971
972 /* accept some multicast */
973
22bedad3
JP
974 netdev_for_each_mc_addr(ha, dev) {
975 crc = ether_crc(ETH_ALEN, ha->addr);
3ba81f3e
BD
976 crc >>= (32 - 6); /* get top six bits */
977
978 rxctrl.mchash[crc >> 4] |= (1 << (crc & 0xf));
3ba81f3e
BD
979 }
980
b6a71bfa 981 rxctrl.rxcr1 = RXCR1_RXME | RXCR1_RXPAFMA;
3ba81f3e
BD
982 } else {
983 /* just accept broadcast / unicast */
984 rxctrl.rxcr1 = RXCR1_RXPAFMA;
985 }
986
987 rxctrl.rxcr1 |= (RXCR1_RXUE | /* unicast enable */
988 RXCR1_RXBE | /* broadcast enable */
989 RXCR1_RXE | /* RX process enable */
990 RXCR1_RXFCE); /* enable flow control */
991
992 rxctrl.rxcr2 |= RXCR2_SRDBL_FRAME;
993
994 /* schedule work to do the actual set of the data if needed */
995
996 spin_lock(&ks->statelock);
997
998 if (memcmp(&rxctrl, &ks->rxctrl, sizeof(rxctrl)) != 0) {
999 memcpy(&ks->rxctrl, &rxctrl, sizeof(ks->rxctrl));
1000 schedule_work(&ks->rxctrl_work);
1001 }
1002
1003 spin_unlock(&ks->statelock);
1004}
1005
1006static int ks8851_set_mac_address(struct net_device *dev, void *addr)
1007{
1008 struct sockaddr *sa = addr;
1009
1010 if (netif_running(dev))
1011 return -EBUSY;
1012
1013 if (!is_valid_ether_addr(sa->sa_data))
1014 return -EADDRNOTAVAIL;
1015
1016 memcpy(dev->dev_addr, sa->sa_data, ETH_ALEN);
1017 return ks8851_write_mac_addr(dev);
1018}
1019
1020static int ks8851_net_ioctl(struct net_device *dev, struct ifreq *req, int cmd)
1021{
1022 struct ks8851_net *ks = netdev_priv(dev);
1023
1024 if (!netif_running(dev))
1025 return -EINVAL;
1026
1027 return generic_mii_ioctl(&ks->mii, if_mii(req), cmd, NULL);
1028}
1029
1030static const struct net_device_ops ks8851_netdev_ops = {
1031 .ndo_open = ks8851_net_open,
1032 .ndo_stop = ks8851_net_stop,
1033 .ndo_do_ioctl = ks8851_net_ioctl,
1034 .ndo_start_xmit = ks8851_start_xmit,
1035 .ndo_set_mac_address = ks8851_set_mac_address,
1036 .ndo_set_rx_mode = ks8851_set_rx_mode,
1037 .ndo_change_mtu = eth_change_mtu,
1038 .ndo_validate_addr = eth_validate_addr,
1039};
1040
a4bdfff7
SJ
1041/* Companion eeprom access */
1042
1043enum { /* EEPROM programming states */
1044 EEPROM_CONTROL,
1045 EEPROM_ADDRESS,
1046 EEPROM_DATA,
1047 EEPROM_COMPLETE
1048};
1049
1050/**
1051 * ks8851_eeprom_read - read a 16bits word in ks8851 companion EEPROM
1052 * @dev: The network device the PHY is on.
1053 * @addr: EEPROM address to read
1054 *
1055 * eeprom_size: used to define the data coding length. Can be changed
1056 * through debug-fs.
1057 *
1058 * Programs a read on the EEPROM using ks8851 EEPROM SW access feature.
1059 * Warning: The READ feature is not supported on ks8851 revision 0.
1060 *
1061 * Rough programming model:
1062 * - on period start: set clock high and read value on bus
1063 * - on period / 2: set clock low and program value on bus
1064 * - start on period / 2
1065 */
1066unsigned int ks8851_eeprom_read(struct net_device *dev, unsigned int addr)
1067{
1068 struct ks8851_net *ks = netdev_priv(dev);
1069 int eepcr;
1070 int ctrl = EEPROM_OP_READ;
1071 int state = EEPROM_CONTROL;
1072 int bit_count = EEPROM_OP_LEN - 1;
1073 unsigned int data = 0;
1074 int dummy;
1075 unsigned int addr_len;
1076
1077 addr_len = (ks->eeprom_size == 128) ? 6 : 8;
1078
1079 /* start transaction: chip select high, authorize write */
1080 mutex_lock(&ks->lock);
1081 eepcr = EEPCR_EESA | EEPCR_EESRWA;
1082 ks8851_wrreg16(ks, KS_EEPCR, eepcr);
1083 eepcr |= EEPCR_EECS;
1084 ks8851_wrreg16(ks, KS_EEPCR, eepcr);
1085 mutex_unlock(&ks->lock);
1086
1087 while (state != EEPROM_COMPLETE) {
1088 /* falling clock period starts... */
1089 /* set EED_IO pin for control and address */
1090 eepcr &= ~EEPCR_EEDO;
1091 switch (state) {
1092 case EEPROM_CONTROL:
1093 eepcr |= ((ctrl >> bit_count) & 1) << 2;
1094 if (bit_count-- <= 0) {
1095 bit_count = addr_len - 1;
1096 state = EEPROM_ADDRESS;
1097 }
1098 break;
1099 case EEPROM_ADDRESS:
1100 eepcr |= ((addr >> bit_count) & 1) << 2;
1101 bit_count--;
1102 break;
1103 case EEPROM_DATA:
1104 /* Change to receive mode */
1105 eepcr &= ~EEPCR_EESRWA;
1106 break;
1107 }
1108
1109 /* lower clock */
1110 eepcr &= ~EEPCR_EESCK;
1111
1112 mutex_lock(&ks->lock);
1113 ks8851_wrreg16(ks, KS_EEPCR, eepcr);
1114 mutex_unlock(&ks->lock);
1115
1116 /* waitread period / 2 */
1117 udelay(EEPROM_SK_PERIOD / 2);
1118
1119 /* rising clock period starts... */
1120
1121 /* raise clock */
1122 mutex_lock(&ks->lock);
1123 eepcr |= EEPCR_EESCK;
1124 ks8851_wrreg16(ks, KS_EEPCR, eepcr);
1125 mutex_unlock(&ks->lock);
1126
1127 /* Manage read */
1128 switch (state) {
1129 case EEPROM_ADDRESS:
1130 if (bit_count < 0) {
1131 bit_count = EEPROM_DATA_LEN - 1;
1132 state = EEPROM_DATA;
1133 }
1134 break;
1135 case EEPROM_DATA:
1136 mutex_lock(&ks->lock);
1137 dummy = ks8851_rdreg16(ks, KS_EEPCR);
1138 mutex_unlock(&ks->lock);
1139 data |= ((dummy >> EEPCR_EESB_OFFSET) & 1) << bit_count;
1140 if (bit_count-- <= 0)
1141 state = EEPROM_COMPLETE;
1142 break;
1143 }
1144
1145 /* wait period / 2 */
1146 udelay(EEPROM_SK_PERIOD / 2);
1147 }
1148
1149 /* close transaction */
1150 mutex_lock(&ks->lock);
1151 eepcr &= ~EEPCR_EECS;
1152 ks8851_wrreg16(ks, KS_EEPCR, eepcr);
1153 eepcr = 0;
1154 ks8851_wrreg16(ks, KS_EEPCR, eepcr);
1155 mutex_unlock(&ks->lock);
1156
1157 return data;
1158}
1159
1160/**
1161 * ks8851_eeprom_write - write a 16bits word in ks8851 companion EEPROM
1162 * @dev: The network device the PHY is on.
1163 * @op: operand (can be WRITE, EWEN, EWDS)
1164 * @addr: EEPROM address to write
1165 * @data: data to write
1166 *
1167 * eeprom_size: used to define the data coding length. Can be changed
1168 * through debug-fs.
1169 *
1170 * Programs a write on the EEPROM using ks8851 EEPROM SW access feature.
1171 *
1172 * Note that a write enable is required before writing data.
1173 *
1174 * Rough programming model:
1175 * - on period start: set clock high
1176 * - on period / 2: set clock low and program value on bus
1177 * - start on period / 2
1178 */
1179void ks8851_eeprom_write(struct net_device *dev, unsigned int op,
1180 unsigned int addr, unsigned int data)
1181{
1182 struct ks8851_net *ks = netdev_priv(dev);
1183 int eepcr;
1184 int state = EEPROM_CONTROL;
1185 int bit_count = EEPROM_OP_LEN - 1;
1186 unsigned int addr_len;
1187
1188 addr_len = (ks->eeprom_size == 128) ? 6 : 8;
1189
1190 switch (op) {
1191 case EEPROM_OP_EWEN:
1192 addr = 0x30;
1193 break;
1194 case EEPROM_OP_EWDS:
1195 addr = 0;
1196 break;
1197 }
1198
1199 /* start transaction: chip select high, authorize write */
1200 mutex_lock(&ks->lock);
1201 eepcr = EEPCR_EESA | EEPCR_EESRWA;
1202 ks8851_wrreg16(ks, KS_EEPCR, eepcr);
1203 eepcr |= EEPCR_EECS;
1204 ks8851_wrreg16(ks, KS_EEPCR, eepcr);
1205 mutex_unlock(&ks->lock);
1206
1207 while (state != EEPROM_COMPLETE) {
1208 /* falling clock period starts... */
1209 /* set EED_IO pin for control and address */
1210 eepcr &= ~EEPCR_EEDO;
1211 switch (state) {
1212 case EEPROM_CONTROL:
1213 eepcr |= ((op >> bit_count) & 1) << 2;
1214 if (bit_count-- <= 0) {
1215 bit_count = addr_len - 1;
1216 state = EEPROM_ADDRESS;
1217 }
1218 break;
1219 case EEPROM_ADDRESS:
1220 eepcr |= ((addr >> bit_count) & 1) << 2;
1221 if (bit_count-- <= 0) {
1222 if (op == EEPROM_OP_WRITE) {
1223 bit_count = EEPROM_DATA_LEN - 1;
1224 state = EEPROM_DATA;
1225 } else {
1226 state = EEPROM_COMPLETE;
1227 }
1228 }
1229 break;
1230 case EEPROM_DATA:
1231 eepcr |= ((data >> bit_count) & 1) << 2;
1232 if (bit_count-- <= 0)
1233 state = EEPROM_COMPLETE;
1234 break;
1235 }
1236
1237 /* lower clock */
1238 eepcr &= ~EEPCR_EESCK;
1239
1240 mutex_lock(&ks->lock);
1241 ks8851_wrreg16(ks, KS_EEPCR, eepcr);
1242 mutex_unlock(&ks->lock);
1243
1244 /* wait period / 2 */
1245 udelay(EEPROM_SK_PERIOD / 2);
1246
1247 /* rising clock period starts... */
1248
1249 /* raise clock */
1250 eepcr |= EEPCR_EESCK;
1251 mutex_lock(&ks->lock);
1252 ks8851_wrreg16(ks, KS_EEPCR, eepcr);
1253 mutex_unlock(&ks->lock);
1254
1255 /* wait period / 2 */
1256 udelay(EEPROM_SK_PERIOD / 2);
1257 }
1258
1259 /* close transaction */
1260 mutex_lock(&ks->lock);
1261 eepcr &= ~EEPCR_EECS;
1262 ks8851_wrreg16(ks, KS_EEPCR, eepcr);
1263 eepcr = 0;
1264 ks8851_wrreg16(ks, KS_EEPCR, eepcr);
1265 mutex_unlock(&ks->lock);
1266
1267}
1268
3ba81f3e
BD
1269/* ethtool support */
1270
1271static void ks8851_get_drvinfo(struct net_device *dev,
1272 struct ethtool_drvinfo *di)
1273{
1274 strlcpy(di->driver, "KS8851", sizeof(di->driver));
1275 strlcpy(di->version, "1.00", sizeof(di->version));
1276 strlcpy(di->bus_info, dev_name(dev->dev.parent), sizeof(di->bus_info));
1277}
1278
1279static u32 ks8851_get_msglevel(struct net_device *dev)
1280{
1281 struct ks8851_net *ks = netdev_priv(dev);
1282 return ks->msg_enable;
1283}
1284
1285static void ks8851_set_msglevel(struct net_device *dev, u32 to)
1286{
1287 struct ks8851_net *ks = netdev_priv(dev);
1288 ks->msg_enable = to;
1289}
1290
1291static int ks8851_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
1292{
1293 struct ks8851_net *ks = netdev_priv(dev);
1294 return mii_ethtool_gset(&ks->mii, cmd);
1295}
1296
1297static int ks8851_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
1298{
1299 struct ks8851_net *ks = netdev_priv(dev);
1300 return mii_ethtool_sset(&ks->mii, cmd);
1301}
1302
1303static u32 ks8851_get_link(struct net_device *dev)
1304{
1305 struct ks8851_net *ks = netdev_priv(dev);
1306 return mii_link_ok(&ks->mii);
1307}
1308
1309static int ks8851_nway_reset(struct net_device *dev)
1310{
1311 struct ks8851_net *ks = netdev_priv(dev);
1312 return mii_nway_restart(&ks->mii);
1313}
1314
a84afa40
SJ
1315static int ks8851_get_eeprom_len(struct net_device *dev)
1316{
1317 struct ks8851_net *ks = netdev_priv(dev);
1318 return ks->eeprom_size;
1319}
1320
1321static int ks8851_get_eeprom(struct net_device *dev,
1322 struct ethtool_eeprom *eeprom, u8 *bytes)
1323{
1324 struct ks8851_net *ks = netdev_priv(dev);
1325 u16 *eeprom_buff;
1326 int first_word;
1327 int last_word;
1328 int ret_val = 0;
1329 u16 i;
1330
1331 if (eeprom->len == 0)
1332 return -EINVAL;
1333
1334 if (eeprom->len > ks->eeprom_size)
1335 return -EINVAL;
1336
1337 eeprom->magic = ks8851_rdreg16(ks, KS_CIDER);
1338
1339 first_word = eeprom->offset >> 1;
1340 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
1341
1342 eeprom_buff = kmalloc(sizeof(u16) *
1343 (last_word - first_word + 1), GFP_KERNEL);
1344 if (!eeprom_buff)
1345 return -ENOMEM;
1346
1347 for (i = 0; i < last_word - first_word + 1; i++)
1348 eeprom_buff[i] = ks8851_eeprom_read(dev, first_word + 1);
1349
1350 /* Device's eeprom is little-endian, word addressable */
1351 for (i = 0; i < last_word - first_word + 1; i++)
1352 le16_to_cpus(&eeprom_buff[i]);
1353
1354 memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len);
1355 kfree(eeprom_buff);
1356
1357 return ret_val;
1358}
1359
1360static int ks8851_set_eeprom(struct net_device *dev,
1361 struct ethtool_eeprom *eeprom, u8 *bytes)
1362{
1363 struct ks8851_net *ks = netdev_priv(dev);
1364 u16 *eeprom_buff;
1365 void *ptr;
1366 int max_len;
1367 int first_word;
1368 int last_word;
1369 int ret_val = 0;
1370 u16 i;
1371
1372 if (eeprom->len == 0)
1373 return -EOPNOTSUPP;
1374
1375 if (eeprom->len > ks->eeprom_size)
1376 return -EINVAL;
1377
1378 if (eeprom->magic != ks8851_rdreg16(ks, KS_CIDER))
1379 return -EFAULT;
1380
1381 first_word = eeprom->offset >> 1;
1382 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
1383 max_len = (last_word - first_word + 1) * 2;
1384 eeprom_buff = kmalloc(max_len, GFP_KERNEL);
1385 if (!eeprom_buff)
1386 return -ENOMEM;
1387
1388 ptr = (void *)eeprom_buff;
1389
1390 if (eeprom->offset & 1) {
1391 /* need read/modify/write of first changed EEPROM word */
1392 /* only the second byte of the word is being modified */
1393 eeprom_buff[0] = ks8851_eeprom_read(dev, first_word);
1394 ptr++;
1395 }
1396 if ((eeprom->offset + eeprom->len) & 1)
1397 /* need read/modify/write of last changed EEPROM word */
1398 /* only the first byte of the word is being modified */
1399 eeprom_buff[last_word - first_word] =
1400 ks8851_eeprom_read(dev, last_word);
1401
1402
1403 /* Device's eeprom is little-endian, word addressable */
1404 le16_to_cpus(&eeprom_buff[0]);
1405 le16_to_cpus(&eeprom_buff[last_word - first_word]);
1406
1407 memcpy(ptr, bytes, eeprom->len);
1408
1409 for (i = 0; i < last_word - first_word + 1; i++)
1410 eeprom_buff[i] = cpu_to_le16(eeprom_buff[i]);
1411
1412 ks8851_eeprom_write(dev, EEPROM_OP_EWEN, 0, 0);
1413
1414 for (i = 0; i < last_word - first_word + 1; i++) {
1415 ks8851_eeprom_write(dev, EEPROM_OP_WRITE, first_word + i,
1416 eeprom_buff[i]);
1417 mdelay(EEPROM_WRITE_TIME);
1418 }
1419
1420 ks8851_eeprom_write(dev, EEPROM_OP_EWDS, 0, 0);
1421
1422 kfree(eeprom_buff);
1423 return ret_val;
1424}
1425
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BD
1426static const struct ethtool_ops ks8851_ethtool_ops = {
1427 .get_drvinfo = ks8851_get_drvinfo,
1428 .get_msglevel = ks8851_get_msglevel,
1429 .set_msglevel = ks8851_set_msglevel,
1430 .get_settings = ks8851_get_settings,
1431 .set_settings = ks8851_set_settings,
1432 .get_link = ks8851_get_link,
1433 .nway_reset = ks8851_nway_reset,
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SJ
1434 .get_eeprom_len = ks8851_get_eeprom_len,
1435 .get_eeprom = ks8851_get_eeprom,
1436 .set_eeprom = ks8851_set_eeprom,
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BD
1437};
1438
1439/* MII interface controls */
1440
1441/**
1442 * ks8851_phy_reg - convert MII register into a KS8851 register
1443 * @reg: MII register number.
1444 *
1445 * Return the KS8851 register number for the corresponding MII PHY register
1446 * if possible. Return zero if the MII register has no direct mapping to the
1447 * KS8851 register set.
1448 */
1449static int ks8851_phy_reg(int reg)
1450{
1451 switch (reg) {
1452 case MII_BMCR:
1453 return KS_P1MBCR;
1454 case MII_BMSR:
1455 return KS_P1MBSR;
1456 case MII_PHYSID1:
1457 return KS_PHY1ILR;
1458 case MII_PHYSID2:
1459 return KS_PHY1IHR;
1460 case MII_ADVERTISE:
1461 return KS_P1ANAR;
1462 case MII_LPA:
1463 return KS_P1ANLPR;
1464 }
1465
1466 return 0x0;
1467}
1468
1469/**
1470 * ks8851_phy_read - MII interface PHY register read.
1471 * @dev: The network device the PHY is on.
1472 * @phy_addr: Address of PHY (ignored as we only have one)
1473 * @reg: The register to read.
1474 *
1475 * This call reads data from the PHY register specified in @reg. Since the
25985edc 1476 * device does not support all the MII registers, the non-existent values
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BD
1477 * are always returned as zero.
1478 *
1479 * We return zero for unsupported registers as the MII code does not check
1480 * the value returned for any error status, and simply returns it to the
1481 * caller. The mii-tool that the driver was tested with takes any -ve error
1482 * as real PHY capabilities, thus displaying incorrect data to the user.
1483 */
1484static int ks8851_phy_read(struct net_device *dev, int phy_addr, int reg)
1485{
1486 struct ks8851_net *ks = netdev_priv(dev);
1487 int ksreg;
1488 int result;
1489
1490 ksreg = ks8851_phy_reg(reg);
1491 if (!ksreg)
1492 return 0x0; /* no error return allowed, so use zero */
1493
1494 mutex_lock(&ks->lock);
1495 result = ks8851_rdreg16(ks, ksreg);
1496 mutex_unlock(&ks->lock);
1497
1498 return result;
1499}
1500
1501static void ks8851_phy_write(struct net_device *dev,
1502 int phy, int reg, int value)
1503{
1504 struct ks8851_net *ks = netdev_priv(dev);
1505 int ksreg;
1506
1507 ksreg = ks8851_phy_reg(reg);
1508 if (ksreg) {
1509 mutex_lock(&ks->lock);
1510 ks8851_wrreg16(ks, ksreg, value);
1511 mutex_unlock(&ks->lock);
1512 }
1513}
1514
1515/**
1516 * ks8851_read_selftest - read the selftest memory info.
1517 * @ks: The device state
1518 *
1519 * Read and check the TX/RX memory selftest information.
1520 */
1521static int ks8851_read_selftest(struct ks8851_net *ks)
1522{
1523 unsigned both_done = MBIR_TXMBF | MBIR_RXMBF;
1524 int ret = 0;
1525 unsigned rd;
1526
1527 rd = ks8851_rdreg16(ks, KS_MBIR);
1528
1529 if ((rd & both_done) != both_done) {
0dc7d2b3 1530 netdev_warn(ks->netdev, "Memory selftest not finished\n");
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BD
1531 return 0;
1532 }
1533
1534 if (rd & MBIR_TXMBFA) {
0dc7d2b3 1535 netdev_err(ks->netdev, "TX memory selftest fail\n");
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BD
1536 ret |= 1;
1537 }
1538
1539 if (rd & MBIR_RXMBFA) {
0dc7d2b3 1540 netdev_err(ks->netdev, "RX memory selftest fail\n");
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BD
1541 ret |= 2;
1542 }
1543
1544 return 0;
1545}
1546
1547/* driver bus management functions */
1548
1d5439b9
AA
1549#ifdef CONFIG_PM
1550static int ks8851_suspend(struct spi_device *spi, pm_message_t state)
1551{
1552 struct ks8851_net *ks = dev_get_drvdata(&spi->dev);
1553 struct net_device *dev = ks->netdev;
1554
1555 if (netif_running(dev)) {
1556 netif_device_detach(dev);
1557 ks8851_net_stop(dev);
1558 }
1559
1560 return 0;
1561}
1562
1563static int ks8851_resume(struct spi_device *spi)
1564{
1565 struct ks8851_net *ks = dev_get_drvdata(&spi->dev);
1566 struct net_device *dev = ks->netdev;
1567
1568 if (netif_running(dev)) {
1569 ks8851_net_open(dev);
1570 netif_device_attach(dev);
1571 }
1572
1573 return 0;
1574}
1575#else
1576#define ks8851_suspend NULL
1577#define ks8851_resume NULL
1578#endif
1579
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BD
1580static int __devinit ks8851_probe(struct spi_device *spi)
1581{
1582 struct net_device *ndev;
1583 struct ks8851_net *ks;
1584 int ret;
1585
1586 ndev = alloc_etherdev(sizeof(struct ks8851_net));
1587 if (!ndev) {
1588 dev_err(&spi->dev, "failed to alloc ethernet device\n");
1589 return -ENOMEM;
1590 }
1591
1592 spi->bits_per_word = 8;
1593
1594 ks = netdev_priv(ndev);
1595
1596 ks->netdev = ndev;
1597 ks->spidev = spi;
1598 ks->tx_space = 6144;
1599
1600 mutex_init(&ks->lock);
1601 spin_lock_init(&ks->statelock);
1602
1603 INIT_WORK(&ks->tx_work, ks8851_tx_work);
1604 INIT_WORK(&ks->irq_work, ks8851_irq_work);
1605 INIT_WORK(&ks->rxctrl_work, ks8851_rxctrl_work);
1606
1607 /* initialise pre-made spi transfer messages */
1608
1609 spi_message_init(&ks->spi_msg1);
1610 spi_message_add_tail(&ks->spi_xfer1, &ks->spi_msg1);
1611
1612 spi_message_init(&ks->spi_msg2);
1613 spi_message_add_tail(&ks->spi_xfer2[0], &ks->spi_msg2);
1614 spi_message_add_tail(&ks->spi_xfer2[1], &ks->spi_msg2);
1615
1616 /* setup mii state */
1617 ks->mii.dev = ndev;
1618 ks->mii.phy_id = 1,
1619 ks->mii.phy_id_mask = 1;
1620 ks->mii.reg_num_mask = 0xf;
1621 ks->mii.mdio_read = ks8851_phy_read;
1622 ks->mii.mdio_write = ks8851_phy_write;
1623
1624 dev_info(&spi->dev, "message enable is %d\n", msg_enable);
1625
1626 /* set the default message enable */
1627 ks->msg_enable = netif_msg_init(msg_enable, (NETIF_MSG_DRV |
1628 NETIF_MSG_PROBE |
1629 NETIF_MSG_LINK));
1630
1631 skb_queue_head_init(&ks->txq);
1632
1633 SET_ETHTOOL_OPS(ndev, &ks8851_ethtool_ops);
1634 SET_NETDEV_DEV(ndev, &spi->dev);
1635
1636 dev_set_drvdata(&spi->dev, ks);
1637
1638 ndev->if_port = IF_PORT_100BASET;
1639 ndev->netdev_ops = &ks8851_netdev_ops;
1640 ndev->irq = spi->irq;
1641
57dada68
BD
1642 /* issue a global soft reset to reset the device. */
1643 ks8851_soft_reset(ks, GRR_GSR);
1644
3ba81f3e
BD
1645 /* simple check for a valid chip being connected to the bus */
1646
1647 if ((ks8851_rdreg16(ks, KS_CIDER) & ~CIDER_REV_MASK) != CIDER_ID) {
1648 dev_err(&spi->dev, "failed to read device ID\n");
1649 ret = -ENODEV;
1650 goto err_id;
1651 }
1652
7d997466
SJ
1653 /* cache the contents of the CCR register for EEPROM, etc. */
1654 ks->rc_ccr = ks8851_rdreg16(ks, KS_CCR);
1655
1656 if (ks->rc_ccr & CCR_EEPROM)
1657 ks->eeprom_size = 128;
1658 else
1659 ks->eeprom_size = 0;
1660
3ba81f3e
BD
1661 ks8851_read_selftest(ks);
1662 ks8851_init_mac(ks);
1663
1664 ret = request_irq(spi->irq, ks8851_irq, IRQF_TRIGGER_LOW,
1665 ndev->name, ks);
1666 if (ret < 0) {
1667 dev_err(&spi->dev, "failed to get irq\n");
1668 goto err_irq;
1669 }
1670
1671 ret = register_netdev(ndev);
1672 if (ret) {
1673 dev_err(&spi->dev, "failed to register network device\n");
1674 goto err_netdev;
1675 }
1676
0dc7d2b3
JP
1677 netdev_info(ndev, "revision %d, MAC %pM, IRQ %d\n",
1678 CIDER_REV_GET(ks8851_rdreg16(ks, KS_CIDER)),
1679 ndev->dev_addr, ndev->irq);
3ba81f3e
BD
1680
1681 return 0;
1682
1683
1684err_netdev:
1685 free_irq(ndev->irq, ndev);
1686
1687err_id:
1688err_irq:
1689 free_netdev(ndev);
1690 return ret;
1691}
1692
1693static int __devexit ks8851_remove(struct spi_device *spi)
1694{
1695 struct ks8851_net *priv = dev_get_drvdata(&spi->dev);
1696
1697 if (netif_msg_drv(priv))
0dc7d2b3 1698 dev_info(&spi->dev, "remove\n");
3ba81f3e
BD
1699
1700 unregister_netdev(priv->netdev);
1701 free_irq(spi->irq, priv);
1702 free_netdev(priv->netdev);
1703
1704 return 0;
1705}
1706
1707static struct spi_driver ks8851_driver = {
1708 .driver = {
1709 .name = "ks8851",
1710 .owner = THIS_MODULE,
1711 },
1712 .probe = ks8851_probe,
1713 .remove = __devexit_p(ks8851_remove),
1d5439b9
AA
1714 .suspend = ks8851_suspend,
1715 .resume = ks8851_resume,
3ba81f3e
BD
1716};
1717
1718static int __init ks8851_init(void)
1719{
1720 return spi_register_driver(&ks8851_driver);
1721}
1722
1723static void __exit ks8851_exit(void)
1724{
1725 spi_unregister_driver(&ks8851_driver);
1726}
1727
1728module_init(ks8851_init);
1729module_exit(ks8851_exit);
1730
1731MODULE_DESCRIPTION("KS8851 Network driver");
1732MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
1733MODULE_LICENSE("GPL");
1734
1735module_param_named(message, msg_enable, int, 0);
1736MODULE_PARM_DESC(message, "Message verbosity level (0=none, 31=all)");
e0626e38 1737MODULE_ALIAS("spi:ks8851");