mlxsw: Register physical ports as a devlink resource
[linux-2.6-block.git] / drivers / net / ethernet / mellanox / mlxsw / core.h
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1/* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */
2/* Copyright (c) 2015-2018 Mellanox Technologies. All rights reserved */
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3
4#ifndef _MLXSW_CORE_H
5#define _MLXSW_CORE_H
6
7#include <linux/module.h>
8#include <linux/device.h>
9#include <linux/slab.h>
10#include <linux/gfp.h>
11#include <linux/types.h>
12#include <linux/skbuff.h>
dd9bdb04 13#include <linux/workqueue.h>
053e92aa 14#include <linux/net_namespace.h>
932762b6 15#include <net/devlink.h>
93c1edb2 16
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17#include "trap.h"
18#include "reg.h"
93c1edb2 19#include "cmd.h"
c1a38311 20#include "resources.h"
93c1edb2 21
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22enum mlxsw_core_resource_id {
23 MLXSW_CORE_RESOURCE_PORTS = 1,
24 MLXSW_CORE_RESOURCE_MAX,
25};
26
93c1edb2 27struct mlxsw_core;
67963a33 28struct mlxsw_core_port;
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29struct mlxsw_driver;
30struct mlxsw_bus;
31struct mlxsw_bus_info;
762effaa 32struct mlxsw_fw_rev;
93c1edb2 33
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34unsigned int mlxsw_core_max_ports(const struct mlxsw_core *mlxsw_core);
35
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36void *mlxsw_core_driver_priv(struct mlxsw_core *mlxsw_core);
37
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38bool mlxsw_core_res_query_enabled(const struct mlxsw_core *mlxsw_core);
39
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40bool mlxsw_core_temp_warn_enabled(const struct mlxsw_core *mlxsw_core);
41
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42bool
43mlxsw_core_fw_rev_minor_subminor_validate(const struct mlxsw_fw_rev *rev,
44 const struct mlxsw_fw_rev *req_rev);
45
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46int mlxsw_core_driver_register(struct mlxsw_driver *mlxsw_driver);
47void mlxsw_core_driver_unregister(struct mlxsw_driver *mlxsw_driver);
48
49int mlxsw_core_bus_device_register(const struct mlxsw_bus_info *mlxsw_bus_info,
50 const struct mlxsw_bus *mlxsw_bus,
24cc68ad 51 void *bus_priv, bool reload,
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52 struct devlink *devlink,
53 struct netlink_ext_ack *extack);
24cc68ad 54void mlxsw_core_bus_device_unregister(struct mlxsw_core *mlxsw_core, bool reload);
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55
56struct mlxsw_tx_info {
57 u8 local_port;
58 bool is_emad;
59};
60
307c2431 61bool mlxsw_core_skb_transmit_busy(struct mlxsw_core *mlxsw_core,
d003462a 62 const struct mlxsw_tx_info *tx_info);
307c2431 63int mlxsw_core_skb_transmit(struct mlxsw_core *mlxsw_core, struct sk_buff *skb,
93c1edb2 64 const struct mlxsw_tx_info *tx_info);
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65void mlxsw_core_ptp_transmitted(struct mlxsw_core *mlxsw_core,
66 struct sk_buff *skb, u8 local_port);
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67
68struct mlxsw_rx_listener {
69 void (*func)(struct sk_buff *skb, u8 local_port, void *priv);
70 u8 local_port;
6a8c101e 71 u8 mirror_reason;
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72 u16 trap_id;
73};
74
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75struct mlxsw_event_listener {
76 void (*func)(const struct mlxsw_reg_info *reg,
77 char *payload, void *priv);
78 enum mlxsw_event_trap_id trap_id;
79};
80
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81struct mlxsw_listener {
82 u16 trap_id;
83 union {
84 struct mlxsw_rx_listener rx_listener;
85 struct mlxsw_event_listener event_listener;
8ec80a8b 86 };
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87 enum mlxsw_reg_hpkt_action en_action; /* Action when enabled */
88 enum mlxsw_reg_hpkt_action dis_action; /* Action when disabled */
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89 u8 en_trap_group; /* Trap group when enabled */
90 u8 dis_trap_group; /* Trap group when disabled */
0bb57112 91 u8 is_ctrl:1, /* should go via control buffer or not */
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92 is_event:1,
93 enabled_on_register:1; /* Trap should be enabled when listener
94 * is registered.
95 */
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96};
97
dbd1ddad 98#define __MLXSW_RXL(_func, _trap_id, _en_action, _is_ctrl, _en_trap_group, \
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99 _dis_action, _enabled_on_register, _dis_trap_group, \
100 _mirror_reason) \
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101 { \
102 .trap_id = MLXSW_TRAP_ID_##_trap_id, \
103 .rx_listener = \
104 { \
105 .func = _func, \
106 .local_port = MLXSW_PORT_DONT_CARE, \
6687e953 107 .mirror_reason = _mirror_reason, \
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108 .trap_id = MLXSW_TRAP_ID_##_trap_id, \
109 }, \
110 .en_action = MLXSW_REG_HPKT_ACTION_##_en_action, \
111 .dis_action = MLXSW_REG_HPKT_ACTION_##_dis_action, \
112 .en_trap_group = MLXSW_REG_HTGT_TRAP_GROUP_##_en_trap_group, \
113 .dis_trap_group = MLXSW_REG_HTGT_TRAP_GROUP_##_dis_trap_group, \
114 .is_ctrl = _is_ctrl, \
115 .enabled_on_register = _enabled_on_register, \
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116 }
117
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118#define MLXSW_RXL(_func, _trap_id, _en_action, _is_ctrl, _trap_group, \
119 _dis_action) \
120 __MLXSW_RXL(_func, _trap_id, _en_action, _is_ctrl, _trap_group, \
6687e953 121 _dis_action, true, _trap_group, 0)
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122
123#define MLXSW_RXL_DIS(_func, _trap_id, _en_action, _is_ctrl, _en_trap_group, \
124 _dis_action, _dis_trap_group) \
125 __MLXSW_RXL(_func, _trap_id, _en_action, _is_ctrl, _en_trap_group, \
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126 _dis_action, false, _dis_trap_group, 0)
127
128#define MLXSW_RXL_MIRROR(_func, _session_id, _trap_group, _mirror_reason) \
129 __MLXSW_RXL(_func, MIRROR_SESSION##_session_id, TRAP_TO_CPU, false, \
130 _trap_group, TRAP_TO_CPU, true, _trap_group, \
131 _mirror_reason)
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132
133#define MLXSW_EVENTL(_func, _trap_id, _trap_group) \
134 { \
135 .trap_id = MLXSW_TRAP_ID_##_trap_id, \
136 .event_listener = \
137 { \
138 .func = _func, \
139 .trap_id = MLXSW_TRAP_ID_##_trap_id, \
140 }, \
141 .en_action = MLXSW_REG_HPKT_ACTION_TRAP_TO_CPU, \
142 .en_trap_group = MLXSW_REG_HTGT_TRAP_GROUP_##_trap_group, \
143 .is_event = true, \
144 .enabled_on_register = true, \
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145 }
146
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147int mlxsw_core_rx_listener_register(struct mlxsw_core *mlxsw_core,
148 const struct mlxsw_rx_listener *rxl,
c83da292 149 void *priv, bool enabled);
93c1edb2 150void mlxsw_core_rx_listener_unregister(struct mlxsw_core *mlxsw_core,
d356b3e8 151 const struct mlxsw_rx_listener *rxl);
93c1edb2 152
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153int mlxsw_core_event_listener_register(struct mlxsw_core *mlxsw_core,
154 const struct mlxsw_event_listener *el,
155 void *priv);
156void mlxsw_core_event_listener_unregister(struct mlxsw_core *mlxsw_core,
d356b3e8 157 const struct mlxsw_event_listener *el);
4ec14b76 158
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159int mlxsw_core_trap_register(struct mlxsw_core *mlxsw_core,
160 const struct mlxsw_listener *listener,
161 void *priv);
162void mlxsw_core_trap_unregister(struct mlxsw_core *mlxsw_core,
163 const struct mlxsw_listener *listener,
164 void *priv);
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165int mlxsw_core_trap_state_set(struct mlxsw_core *mlxsw_core,
166 const struct mlxsw_listener *listener,
167 bool enabled);
0791051c 168
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169typedef void mlxsw_reg_trans_cb_t(struct mlxsw_core *mlxsw_core, char *payload,
170 size_t payload_len, unsigned long cb_priv);
171
172int mlxsw_reg_trans_query(struct mlxsw_core *mlxsw_core,
173 const struct mlxsw_reg_info *reg, char *payload,
174 struct list_head *bulk_list,
175 mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv);
176int mlxsw_reg_trans_write(struct mlxsw_core *mlxsw_core,
177 const struct mlxsw_reg_info *reg, char *payload,
178 struct list_head *bulk_list,
179 mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv);
180int mlxsw_reg_trans_bulk_wait(struct list_head *bulk_list);
181
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182int mlxsw_reg_query(struct mlxsw_core *mlxsw_core,
183 const struct mlxsw_reg_info *reg, char *payload);
184int mlxsw_reg_write(struct mlxsw_core *mlxsw_core,
185 const struct mlxsw_reg_info *reg, char *payload);
186
93c1edb2 187struct mlxsw_rx_info {
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188 bool is_lag;
189 union {
190 u16 sys_port;
191 u16 lag_id;
192 } u;
193 u8 lag_port_index;
eacc86ec 194 u8 mirror_reason;
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195 int trap_id;
196};
197
198void mlxsw_core_skb_receive(struct mlxsw_core *mlxsw_core, struct sk_buff *skb,
199 struct mlxsw_rx_info *rx_info);
200
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201void mlxsw_core_lag_mapping_set(struct mlxsw_core *mlxsw_core,
202 u16 lag_id, u8 port_index, u8 local_port);
203u8 mlxsw_core_lag_mapping_get(struct mlxsw_core *mlxsw_core,
204 u16 lag_id, u8 port_index);
205void mlxsw_core_lag_mapping_clear(struct mlxsw_core *mlxsw_core,
206 u16 lag_id, u8 local_port);
207
67963a33 208void *mlxsw_core_port_driver_priv(struct mlxsw_core_port *mlxsw_core_port);
e519418f 209int mlxsw_core_port_init(struct mlxsw_core *mlxsw_core, u8 local_port,
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210 u32 port_number, bool split, u32 split_port_subnumber,
211 bool splittable, u32 lanes,
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212 const unsigned char *switch_id,
213 unsigned char switch_id_len);
67963a33 214void mlxsw_core_port_fini(struct mlxsw_core *mlxsw_core, u8 local_port);
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215int mlxsw_core_cpu_port_init(struct mlxsw_core *mlxsw_core,
216 void *port_driver_priv,
217 const unsigned char *switch_id,
218 unsigned char switch_id_len);
219void mlxsw_core_cpu_port_fini(struct mlxsw_core *mlxsw_core);
d808c7e4 220void mlxsw_core_port_eth_set(struct mlxsw_core *mlxsw_core, u8 local_port,
e519418f 221 void *port_driver_priv, struct net_device *dev);
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222void mlxsw_core_port_ib_set(struct mlxsw_core *mlxsw_core, u8 local_port,
223 void *port_driver_priv);
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224void mlxsw_core_port_clear(struct mlxsw_core *mlxsw_core, u8 local_port,
225 void *port_driver_priv);
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226enum devlink_port_type mlxsw_core_port_type_get(struct mlxsw_core *mlxsw_core,
227 u8 local_port);
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228struct devlink_port *
229mlxsw_core_port_devlink_port_get(struct mlxsw_core *mlxsw_core,
230 u8 local_port);
50779c33 231bool mlxsw_core_port_is_xm(const struct mlxsw_core *mlxsw_core, u8 local_port);
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232struct mlxsw_env *mlxsw_core_env(const struct mlxsw_core *mlxsw_core);
233bool mlxsw_core_is_initialized(const struct mlxsw_core *mlxsw_core);
25911e1b 234int mlxsw_core_module_max_width(struct mlxsw_core *mlxsw_core, u8 module);
932762b6 235
dd9bdb04 236int mlxsw_core_schedule_dw(struct delayed_work *dwork, unsigned long delay);
a0e4761d 237bool mlxsw_core_schedule_work(struct work_struct *work);
a3832b31 238void mlxsw_core_flush_owq(void);
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239int mlxsw_core_resources_query(struct mlxsw_core *mlxsw_core, char *mbox,
240 struct mlxsw_res *res);
dd9bdb04 241
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242#define MLXSW_CONFIG_PROFILE_SWID_COUNT 8
243
244struct mlxsw_swid_config {
245 u8 used_type:1,
246 used_properties:1;
247 u8 type;
248 u8 properties;
249};
250
251struct mlxsw_config_profile {
252 u16 used_max_vepa_channels:1,
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253 used_max_mid:1,
254 used_max_pgt:1,
255 used_max_system_port:1,
256 used_max_vlan_groups:1,
257 used_max_regions:1,
258 used_flood_tables:1,
259 used_flood_mode:1,
260 used_max_ib_mc:1,
261 used_max_pkey:1,
262 used_ar_sec:1,
489107bd 263 used_adaptive_routing_group_cap:1,
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264 used_kvd_sizes:1,
265 used_kvh_xlt_cache_mode:1;
93c1edb2 266 u8 max_vepa_channels;
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267 u16 max_mid;
268 u16 max_pgt;
269 u16 max_system_port;
270 u16 max_vlan_groups;
271 u16 max_regions;
272 u8 max_flood_tables;
273 u8 max_vid_flood_tables;
274 u8 flood_mode;
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275 u8 max_fid_offset_flood_tables;
276 u16 fid_offset_flood_table_size;
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277 u8 max_fid_flood_tables;
278 u16 fid_flood_table_size;
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279 u16 max_ib_mc;
280 u16 max_pkey;
281 u8 ar_sec;
282 u16 adaptive_routing_group_cap;
283 u8 arn;
489107bd 284 u32 kvd_linear_size;
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285 u8 kvd_hash_single_parts;
286 u8 kvd_hash_double_parts;
dffd5661 287 u8 kvh_xlt_cache_mode;
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288 struct mlxsw_swid_config swid_config[MLXSW_CONFIG_PROFILE_SWID_COUNT];
289};
290
291struct mlxsw_driver {
292 struct list_head list;
293 const char *kind;
93c1edb2 294 size_t priv_size;
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295 const struct mlxsw_fw_rev *fw_req_rev;
296 const char *fw_filename;
b2f10571 297 int (*init)(struct mlxsw_core *mlxsw_core,
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298 const struct mlxsw_bus_info *mlxsw_bus_info,
299 struct netlink_ext_ack *extack);
b2f10571 300 void (*fini)(struct mlxsw_core *mlxsw_core);
9d87fcea 301 int (*basic_trap_groups_set)(struct mlxsw_core *mlxsw_core);
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302 int (*port_type_set)(struct mlxsw_core *mlxsw_core, u8 local_port,
303 enum devlink_port_type new_type);
b2f10571 304 int (*port_split)(struct mlxsw_core *mlxsw_core, u8 local_port,
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305 unsigned int count, struct netlink_ext_ack *extack);
306 int (*port_unsplit)(struct mlxsw_core *mlxsw_core, u8 local_port,
307 struct netlink_ext_ack *extack);
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308 int (*sb_pool_get)(struct mlxsw_core *mlxsw_core,
309 unsigned int sb_index, u16 pool_index,
310 struct devlink_sb_pool_info *pool_info);
311 int (*sb_pool_set)(struct mlxsw_core *mlxsw_core,
312 unsigned int sb_index, u16 pool_index, u32 size,
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313 enum devlink_sb_threshold_type threshold_type,
314 struct netlink_ext_ack *extack);
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315 int (*sb_port_pool_get)(struct mlxsw_core_port *mlxsw_core_port,
316 unsigned int sb_index, u16 pool_index,
317 u32 *p_threshold);
318 int (*sb_port_pool_set)(struct mlxsw_core_port *mlxsw_core_port,
319 unsigned int sb_index, u16 pool_index,
8f686206 320 u32 threshold, struct netlink_ext_ack *extack);
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321 int (*sb_tc_pool_bind_get)(struct mlxsw_core_port *mlxsw_core_port,
322 unsigned int sb_index, u16 tc_index,
323 enum devlink_sb_pool_type pool_type,
324 u16 *p_pool_index, u32 *p_threshold);
325 int (*sb_tc_pool_bind_set)(struct mlxsw_core_port *mlxsw_core_port,
326 unsigned int sb_index, u16 tc_index,
327 enum devlink_sb_pool_type pool_type,
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328 u16 pool_index, u32 threshold,
329 struct netlink_ext_ack *extack);
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330 int (*sb_occ_snapshot)(struct mlxsw_core *mlxsw_core,
331 unsigned int sb_index);
332 int (*sb_occ_max_clear)(struct mlxsw_core *mlxsw_core,
333 unsigned int sb_index);
334 int (*sb_occ_port_pool_get)(struct mlxsw_core_port *mlxsw_core_port,
335 unsigned int sb_index, u16 pool_index,
336 u32 *p_cur, u32 *p_max);
337 int (*sb_occ_tc_port_bind_get)(struct mlxsw_core_port *mlxsw_core_port,
338 unsigned int sb_index, u16 tc_index,
339 enum devlink_sb_pool_type pool_type,
340 u32 *p_cur, u32 *p_max);
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341 int (*trap_init)(struct mlxsw_core *mlxsw_core,
342 const struct devlink_trap *trap, void *trap_ctx);
343 void (*trap_fini)(struct mlxsw_core *mlxsw_core,
344 const struct devlink_trap *trap, void *trap_ctx);
345 int (*trap_action_set)(struct mlxsw_core *mlxsw_core,
346 const struct devlink_trap *trap,
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347 enum devlink_trap_action action,
348 struct netlink_ext_ack *extack);
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349 int (*trap_group_init)(struct mlxsw_core *mlxsw_core,
350 const struct devlink_trap_group *group);
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351 int (*trap_group_set)(struct mlxsw_core *mlxsw_core,
352 const struct devlink_trap_group *group,
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353 const struct devlink_trap_policer *policer,
354 struct netlink_ext_ack *extack);
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355 int (*trap_policer_init)(struct mlxsw_core *mlxsw_core,
356 const struct devlink_trap_policer *policer);
357 void (*trap_policer_fini)(struct mlxsw_core *mlxsw_core,
358 const struct devlink_trap_policer *policer);
359 int (*trap_policer_set)(struct mlxsw_core *mlxsw_core,
360 const struct devlink_trap_policer *policer,
361 u64 rate, u64 burst,
362 struct netlink_ext_ack *extack);
363 int (*trap_policer_counter_get)(struct mlxsw_core *mlxsw_core,
364 const struct devlink_trap_policer *policer,
365 u64 *p_drops);
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366 void (*txhdr_construct)(struct sk_buff *skb,
367 const struct mlxsw_tx_info *tx_info);
ef3116e5 368 int (*resources_register)(struct mlxsw_core *mlxsw_core);
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369 int (*kvd_sizes_get)(struct mlxsw_core *mlxsw_core,
370 const struct mlxsw_config_profile *profile,
371 u64 *p_single_size, u64 *p_double_size,
372 u64 *p_linear_size);
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373 int (*params_register)(struct mlxsw_core *mlxsw_core);
374 void (*params_unregister)(struct mlxsw_core *mlxsw_core);
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375
376 /* Notify a driver that a timestamped packet was transmitted. Driver
377 * is responsible for freeing the passed-in SKB.
378 */
379 void (*ptp_transmitted)(struct mlxsw_core *mlxsw_core,
380 struct sk_buff *skb, u8 local_port);
381
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382 u8 txhdr_len;
383 const struct mlxsw_config_profile *profile;
ad3f20b2 384 bool res_query_enabled;
7d83ee11 385 bool fw_fatal_enabled;
943585c9 386 bool temp_warn_enabled;
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387};
388
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389int mlxsw_core_kvd_sizes_get(struct mlxsw_core *mlxsw_core,
390 const struct mlxsw_config_profile *profile,
391 u64 *p_single_size, u64 *p_double_size,
392 u64 *p_linear_size);
393
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394u32 mlxsw_core_read_frc_h(struct mlxsw_core *mlxsw_core);
395u32 mlxsw_core_read_frc_l(struct mlxsw_core *mlxsw_core);
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396
397void mlxsw_core_emad_string_tlv_enable(struct mlxsw_core *mlxsw_core);
34dacb4d 398
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399bool mlxsw_core_res_valid(struct mlxsw_core *mlxsw_core,
400 enum mlxsw_res_id res_id);
403547d3 401
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402#define MLXSW_CORE_RES_VALID(mlxsw_core, short_res_id) \
403 mlxsw_core_res_valid(mlxsw_core, MLXSW_RES_ID_##short_res_id)
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404
405u64 mlxsw_core_res_get(struct mlxsw_core *mlxsw_core,
406 enum mlxsw_res_id res_id);
57d316ba 407
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408#define MLXSW_CORE_RES_GET(mlxsw_core, short_res_id) \
409 mlxsw_core_res_get(mlxsw_core, MLXSW_RES_ID_##short_res_id)
57d316ba 410
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411static inline struct net *mlxsw_core_net(struct mlxsw_core *mlxsw_core)
412{
413 return devlink_net(priv_to_devlink(mlxsw_core));
414}
415
c711e27a 416#define MLXSW_BUS_F_TXRX BIT(0)
f3a52c61 417#define MLXSW_BUS_F_RESET BIT(1)
c711e27a 418
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419struct mlxsw_bus {
420 const char *kind;
421 int (*init)(void *bus_priv, struct mlxsw_core *mlxsw_core,
57d316ba 422 const struct mlxsw_config_profile *profile,
c1a38311 423 struct mlxsw_res *res);
93c1edb2 424 void (*fini)(void *bus_priv);
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425 bool (*skb_transmit_busy)(void *bus_priv,
426 const struct mlxsw_tx_info *tx_info);
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427 int (*skb_transmit)(void *bus_priv, struct sk_buff *skb,
428 const struct mlxsw_tx_info *tx_info);
429 int (*cmd_exec)(void *bus_priv, u16 opcode, u8 opcode_mod,
430 u32 in_mod, bool out_mbox_direct,
431 char *in_mbox, size_t in_mbox_size,
432 char *out_mbox, size_t out_mbox_size,
433 u8 *p_status);
34dacb4d
ST
434 u32 (*read_frc_h)(void *bus_priv);
435 u32 (*read_frc_l)(void *bus_priv);
c711e27a 436 u8 features;
93c1edb2
JP
437};
438
c41d0075
YG
439struct mlxsw_fw_rev {
440 u16 major;
441 u16 minor;
442 u16 subminor;
c86d62cc 443 u16 can_reset_minor;
c41d0075
YG
444};
445
2ea3f4c7
JP
446#define MLXSW_BUS_INFO_XM_LOCAL_PORTS_MAX 4
447
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JP
448struct mlxsw_bus_info {
449 const char *device_kind;
450 const char *device_name;
451 struct device *dev;
c41d0075 452 struct mlxsw_fw_rev fw_rev;
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JP
453 u8 vsd[MLXSW_CMD_BOARDINFO_VSD_LEN];
454 u8 psid[MLXSW_CMD_BOARDINFO_PSID_LEN];
34dacb4d 455 u8 low_frequency:1,
2ea3f4c7
JP
456 read_frc_capable:1,
457 xm_exists:1;
458 u8 xm_local_ports_count;
459 u8 xm_local_ports[MLXSW_BUS_INFO_XM_LOCAL_PORTS_MAX];
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JP
460};
461
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JP
462struct mlxsw_hwmon;
463
464#ifdef CONFIG_MLXSW_CORE_HWMON
465
466int mlxsw_hwmon_init(struct mlxsw_core *mlxsw_core,
467 const struct mlxsw_bus_info *mlxsw_bus_info,
468 struct mlxsw_hwmon **p_hwmon);
469void mlxsw_hwmon_fini(struct mlxsw_hwmon *mlxsw_hwmon);
470
471#else
472
473static inline int mlxsw_hwmon_init(struct mlxsw_core *mlxsw_core,
474 const struct mlxsw_bus_info *mlxsw_bus_info,
475 struct mlxsw_hwmon **p_hwmon)
476{
477 return 0;
478}
479
9b3bc7db
IS
480static inline void mlxsw_hwmon_fini(struct mlxsw_hwmon *mlxsw_hwmon)
481{
482}
483
89309da3
JP
484#endif
485
a50c1e35
IV
486struct mlxsw_thermal;
487
488#ifdef CONFIG_MLXSW_CORE_THERMAL
489
490int mlxsw_thermal_init(struct mlxsw_core *mlxsw_core,
491 const struct mlxsw_bus_info *mlxsw_bus_info,
492 struct mlxsw_thermal **p_thermal);
493void mlxsw_thermal_fini(struct mlxsw_thermal *thermal);
494
495#else
496
497static inline int mlxsw_thermal_init(struct mlxsw_core *mlxsw_core,
498 const struct mlxsw_bus_info *mlxsw_bus_info,
499 struct mlxsw_thermal **p_thermal)
500{
501 return 0;
502}
503
504static inline void mlxsw_thermal_fini(struct mlxsw_thermal *thermal)
505{
506}
507
508#endif
509
98bbf70c
JP
510enum mlxsw_devlink_param_id {
511 MLXSW_DEVLINK_PARAM_ID_BASE = DEVLINK_PARAM_GENERIC_ID_MAX,
512 MLXSW_DEVLINK_PARAM_ID_ACL_REGION_REHASH_INTERVAL,
513};
514
d7cd206d 515struct mlxsw_skb_cb {
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JP
516 union {
517 struct mlxsw_tx_info tx_info;
518 u32 cookie_index; /* Only used during receive */
519 };
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PM
520};
521
522static inline struct mlxsw_skb_cb *mlxsw_skb_cb(struct sk_buff *skb)
523{
524 BUILD_BUG_ON(sizeof(mlxsw_skb_cb) > sizeof(skb->cb));
525 return (struct mlxsw_skb_cb *) skb->cb;
526}
527
93c1edb2 528#endif