[linux-2.6-block.git] / drivers / net / ethernet / mellanox / mlxsw / core.h

/* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */
/* Copyright (c) 2015-2018 Mellanox Technologies. All rights reserved */

#ifndef _MLXSW_CORE_H
#define _MLXSW_CORE_H

#include <linux/module.h>
#include <linux/device.h>
#include <linux/slab.h>
#include <linux/gfp.h>
#include <linux/types.h>
#include <linux/skbuff.h>
#include <linux/workqueue.h>
#include <net/devlink.h>

#include "trap.h"
#include "reg.h"
#include "cmd.h"
#include "resources.h"

struct mlxsw_core;
struct mlxsw_core_port;
struct mlxsw_driver;
struct mlxsw_bus;
struct mlxsw_bus_info;

unsigned int mlxsw_core_max_ports(const struct mlxsw_core *mlxsw_core);

void *mlxsw_core_driver_priv(struct mlxsw_core *mlxsw_core);

int mlxsw_core_driver_register(struct mlxsw_driver *mlxsw_driver);
void mlxsw_core_driver_unregister(struct mlxsw_driver *mlxsw_driver);

int mlxsw_core_bus_device_register(const struct mlxsw_bus_info *mlxsw_bus_info,
				   const struct mlxsw_bus *mlxsw_bus,
				   void *bus_priv, bool reload,
				   struct devlink *devlink);
void mlxsw_core_bus_device_unregister(struct mlxsw_core *mlxsw_core, bool reload);

struct mlxsw_tx_info {
	u8 local_port;
	bool is_emad;
};

bool mlxsw_core_skb_transmit_busy(struct mlxsw_core *mlxsw_core,
				  const struct mlxsw_tx_info *tx_info);
int mlxsw_core_skb_transmit(struct mlxsw_core *mlxsw_core, struct sk_buff *skb,
			    const struct mlxsw_tx_info *tx_info);

struct mlxsw_rx_listener {
	void (*func)(struct sk_buff *skb, u8 local_port, void *priv);
	u8 local_port;
	u16 trap_id;
	enum mlxsw_reg_hpkt_action action;
};

struct mlxsw_event_listener {
	void (*func)(const struct mlxsw_reg_info *reg,
		     char *payload, void *priv);
	enum mlxsw_event_trap_id trap_id;
};

struct mlxsw_listener {
	u16 trap_id;
	union {
		struct mlxsw_rx_listener rx_listener;
		struct mlxsw_event_listener event_listener;
	} u;
	enum mlxsw_reg_hpkt_action action;
	enum mlxsw_reg_hpkt_action unreg_action;
	u8 trap_group;
	bool is_ctrl; /* should go via control buffer or not */
	bool is_event;
};

#define MLXSW_RXL(_func, _trap_id, _action, _is_ctrl, _trap_group,	\
		  _unreg_action)					\
	{								\
		.trap_id = MLXSW_TRAP_ID_##_trap_id,			\
		.u.rx_listener =					\
		{							\
			.func = _func,					\
			.local_port = MLXSW_PORT_DONT_CARE,		\
			.trap_id = MLXSW_TRAP_ID_##_trap_id,		\
		},							\
		.action = MLXSW_REG_HPKT_ACTION_##_action,		\
		.unreg_action = MLXSW_REG_HPKT_ACTION_##_unreg_action,	\
		.trap_group = MLXSW_REG_HTGT_TRAP_GROUP_##_trap_group,	\
		.is_ctrl = _is_ctrl,					\
		.is_event = false,					\
	}

#define MLXSW_EVENTL(_func, _trap_id, _trap_group)			\
	{								\
		.trap_id = MLXSW_TRAP_ID_##_trap_id,			\
		.u.event_listener =					\
		{							\
			.func = _func,					\
			.trap_id = MLXSW_TRAP_ID_##_trap_id,		\
		},							\
		.action = MLXSW_REG_HPKT_ACTION_TRAP_TO_CPU,		\
		.trap_group = MLXSW_REG_HTGT_TRAP_GROUP_##_trap_group,	\
		.is_ctrl = false,					\
		.is_event = true,					\
	}

int mlxsw_core_rx_listener_register(struct mlxsw_core *mlxsw_core,
				    const struct mlxsw_rx_listener *rxl,
				    void *priv);
void mlxsw_core_rx_listener_unregister(struct mlxsw_core *mlxsw_core,
				       const struct mlxsw_rx_listener *rxl,
				       void *priv);

int mlxsw_core_event_listener_register(struct mlxsw_core *mlxsw_core,
				       const struct mlxsw_event_listener *el,
				       void *priv);
void mlxsw_core_event_listener_unregister(struct mlxsw_core *mlxsw_core,
					  const struct mlxsw_event_listener *el,
					  void *priv);

int mlxsw_core_trap_register(struct mlxsw_core *mlxsw_core,
			     const struct mlxsw_listener *listener,
			     void *priv);
void mlxsw_core_trap_unregister(struct mlxsw_core *mlxsw_core,
				const struct mlxsw_listener *listener,
				void *priv);

typedef void mlxsw_reg_trans_cb_t(struct mlxsw_core *mlxsw_core, char *payload,
				  size_t payload_len, unsigned long cb_priv);

int mlxsw_reg_trans_query(struct mlxsw_core *mlxsw_core,
			  const struct mlxsw_reg_info *reg, char *payload,
			  struct list_head *bulk_list,
			  mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv);
int mlxsw_reg_trans_write(struct mlxsw_core *mlxsw_core,
			  const struct mlxsw_reg_info *reg, char *payload,
			  struct list_head *bulk_list,
			  mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv);
int mlxsw_reg_trans_bulk_wait(struct list_head *bulk_list);

int mlxsw_reg_query(struct mlxsw_core *mlxsw_core,
		    const struct mlxsw_reg_info *reg, char *payload);
int mlxsw_reg_write(struct mlxsw_core *mlxsw_core,
		    const struct mlxsw_reg_info *reg, char *payload);

struct mlxsw_rx_info {
	bool is_lag;
	union {
		u16 sys_port;
		u16 lag_id;
	} u;
	u8 lag_port_index;
	int trap_id;
};

void mlxsw_core_skb_receive(struct mlxsw_core *mlxsw_core, struct sk_buff *skb,
			    struct mlxsw_rx_info *rx_info);

void mlxsw_core_lag_mapping_set(struct mlxsw_core *mlxsw_core,
				u16 lag_id, u8 port_index, u8 local_port);
u8 mlxsw_core_lag_mapping_get(struct mlxsw_core *mlxsw_core,
			      u16 lag_id, u8 port_index);
void mlxsw_core_lag_mapping_clear(struct mlxsw_core *mlxsw_core,
				  u16 lag_id, u8 local_port);

void *mlxsw_core_port_driver_priv(struct mlxsw_core_port *mlxsw_core_port);
int mlxsw_core_port_init(struct mlxsw_core *mlxsw_core, u8 local_port);
void mlxsw_core_port_fini(struct mlxsw_core *mlxsw_core, u8 local_port);
void mlxsw_core_port_eth_set(struct mlxsw_core *mlxsw_core, u8 local_port,
			     void *port_driver_priv, struct net_device *dev,
			     u32 port_number, bool split,
			     u32 split_port_subnumber);
void mlxsw_core_port_ib_set(struct mlxsw_core *mlxsw_core, u8 local_port,
			    void *port_driver_priv);
void mlxsw_core_port_clear(struct mlxsw_core *mlxsw_core, u8 local_port,
			   void *port_driver_priv);
enum devlink_port_type mlxsw_core_port_type_get(struct mlxsw_core *mlxsw_core,
						u8 local_port);
int mlxsw_core_port_get_phys_port_name(struct mlxsw_core *mlxsw_core,
				       u8 local_port, char *name, size_t len);

int mlxsw_core_schedule_dw(struct delayed_work *dwork, unsigned long delay);
bool mlxsw_core_schedule_work(struct work_struct *work);
void mlxsw_core_flush_owq(void);

#define MLXSW_CONFIG_PROFILE_SWID_COUNT 8

struct mlxsw_swid_config {
	u8	used_type:1,
		used_properties:1;
	u8	type;
	u8	properties;
};

struct mlxsw_config_profile {
	u16	used_max_vepa_channels:1,
		used_max_mid:1,
		used_max_pgt:1,
		used_max_system_port:1,
		used_max_vlan_groups:1,
		used_max_regions:1,
		used_flood_tables:1,
		used_flood_mode:1,
		used_max_ib_mc:1,
		used_max_pkey:1,
		used_ar_sec:1,
		used_adaptive_routing_group_cap:1,
		used_kvd_sizes:1;
	u8	max_vepa_channels;
	u16	max_mid;
	u16	max_pgt;
	u16	max_system_port;
	u16	max_vlan_groups;
	u16	max_regions;
	u8	max_flood_tables;
	u8	max_vid_flood_tables;
	u8	flood_mode;
	u8	max_fid_offset_flood_tables;
	u16	fid_offset_flood_table_size;
	u8	max_fid_flood_tables;
	u16	fid_flood_table_size;
	u16	max_ib_mc;
	u16	max_pkey;
	u8	ar_sec;
	u16	adaptive_routing_group_cap;
	u8	arn;
	u32	kvd_linear_size;
	u8	kvd_hash_single_parts;
	u8	kvd_hash_double_parts;
	struct mlxsw_swid_config swid_config[MLXSW_CONFIG_PROFILE_SWID_COUNT];
};

struct mlxsw_driver {
	struct list_head list;
	const char *kind;
	size_t priv_size;
	int (*init)(struct mlxsw_core *mlxsw_core,
		    const struct mlxsw_bus_info *mlxsw_bus_info);
	void (*fini)(struct mlxsw_core *mlxsw_core);
	int (*basic_trap_groups_set)(struct mlxsw_core *mlxsw_core);
	int (*port_type_set)(struct mlxsw_core *mlxsw_core, u8 local_port,
			     enum devlink_port_type new_type);
	int (*port_split)(struct mlxsw_core *mlxsw_core, u8 local_port,
			  unsigned int count, struct netlink_ext_ack *extack);
	int (*port_unsplit)(struct mlxsw_core *mlxsw_core, u8 local_port,
			    struct netlink_ext_ack *extack);
	int (*sb_pool_get)(struct mlxsw_core *mlxsw_core,
			   unsigned int sb_index, u16 pool_index,
			   struct devlink_sb_pool_info *pool_info);
	int (*sb_pool_set)(struct mlxsw_core *mlxsw_core,
			   unsigned int sb_index, u16 pool_index, u32 size,
			   enum devlink_sb_threshold_type threshold_type);
	int (*sb_port_pool_get)(struct mlxsw_core_port *mlxsw_core_port,
				unsigned int sb_index, u16 pool_index,
				u32 *p_threshold);
	int (*sb_port_pool_set)(struct mlxsw_core_port *mlxsw_core_port,
				unsigned int sb_index, u16 pool_index,
				u32 threshold);
	int (*sb_tc_pool_bind_get)(struct mlxsw_core_port *mlxsw_core_port,
				   unsigned int sb_index, u16 tc_index,
				   enum devlink_sb_pool_type pool_type,
				   u16 *p_pool_index, u32 *p_threshold);
	int (*sb_tc_pool_bind_set)(struct mlxsw_core_port *mlxsw_core_port,
				   unsigned int sb_index, u16 tc_index,
				   enum devlink_sb_pool_type pool_type,
				   u16 pool_index, u32 threshold);
	int (*sb_occ_snapshot)(struct mlxsw_core *mlxsw_core,
			       unsigned int sb_index);
	int (*sb_occ_max_clear)(struct mlxsw_core *mlxsw_core,
				unsigned int sb_index);
	int (*sb_occ_port_pool_get)(struct mlxsw_core_port *mlxsw_core_port,
				    unsigned int sb_index, u16 pool_index,
				    u32 *p_cur, u32 *p_max);
	int (*sb_occ_tc_port_bind_get)(struct mlxsw_core_port *mlxsw_core_port,
				       unsigned int sb_index, u16 tc_index,
				       enum devlink_sb_pool_type pool_type,
				       u32 *p_cur, u32 *p_max);
	void (*txhdr_construct)(struct sk_buff *skb,
				const struct mlxsw_tx_info *tx_info);
	int (*resources_register)(struct mlxsw_core *mlxsw_core);
	int (*kvd_sizes_get)(struct mlxsw_core *mlxsw_core,
			     const struct mlxsw_config_profile *profile,
			     u64 *p_single_size, u64 *p_double_size,
			     u64 *p_linear_size);
	u8 txhdr_len;
	const struct mlxsw_config_profile *profile;
	bool res_query_enabled;
};

int mlxsw_core_kvd_sizes_get(struct mlxsw_core *mlxsw_core,
			     const struct mlxsw_config_profile *profile,
			     u64 *p_single_size, u64 *p_double_size,
			     u64 *p_linear_size);

bool mlxsw_core_res_valid(struct mlxsw_core *mlxsw_core,
			  enum mlxsw_res_id res_id);

#define MLXSW_CORE_RES_VALID(mlxsw_core, short_res_id)			\
	mlxsw_core_res_valid(mlxsw_core, MLXSW_RES_ID_##short_res_id)

u64 mlxsw_core_res_get(struct mlxsw_core *mlxsw_core,
		       enum mlxsw_res_id res_id);

#define MLXSW_CORE_RES_GET(mlxsw_core, short_res_id)			\
	mlxsw_core_res_get(mlxsw_core, MLXSW_RES_ID_##short_res_id)

#define MLXSW_BUS_F_TXRX	BIT(0)
#define MLXSW_BUS_F_RESET	BIT(1)

struct mlxsw_bus {
	const char *kind;
	int (*init)(void *bus_priv, struct mlxsw_core *mlxsw_core,
		    const struct mlxsw_config_profile *profile,
		    struct mlxsw_res *res);
	void (*fini)(void *bus_priv);
	bool (*skb_transmit_busy)(void *bus_priv,
				  const struct mlxsw_tx_info *tx_info);
	int (*skb_transmit)(void *bus_priv, struct sk_buff *skb,
			    const struct mlxsw_tx_info *tx_info);
	int (*cmd_exec)(void *bus_priv, u16 opcode, u8 opcode_mod,
			u32 in_mod, bool out_mbox_direct,
			char *in_mbox, size_t in_mbox_size,
			char *out_mbox, size_t out_mbox_size,
			u8 *p_status);
	u8 features;
};

struct mlxsw_fw_rev {
	u16 major;
	u16 minor;
	u16 subminor;
	u16 can_reset_minor;
};

struct mlxsw_bus_info {
	const char *device_kind;
	const char *device_name;
	struct device *dev;
	struct mlxsw_fw_rev fw_rev;
	u8 vsd[MLXSW_CMD_BOARDINFO_VSD_LEN];
	u8 psid[MLXSW_CMD_BOARDINFO_PSID_LEN];
};

struct mlxsw_hwmon;

#ifdef CONFIG_MLXSW_CORE_HWMON

int mlxsw_hwmon_init(struct mlxsw_core *mlxsw_core,
		     const struct mlxsw_bus_info *mlxsw_bus_info,
		     struct mlxsw_hwmon **p_hwmon);
void mlxsw_hwmon_fini(struct mlxsw_hwmon *mlxsw_hwmon);

#else

static inline int mlxsw_hwmon_init(struct mlxsw_core *mlxsw_core,
				   const struct mlxsw_bus_info *mlxsw_bus_info,
				   struct mlxsw_hwmon **p_hwmon)
{
	return 0;
}

static inline void mlxsw_hwmon_fini(struct mlxsw_hwmon *mlxsw_hwmon)
{
}

#endif

struct mlxsw_thermal;

#ifdef CONFIG_MLXSW_CORE_THERMAL

int mlxsw_thermal_init(struct mlxsw_core *mlxsw_core,
		       const struct mlxsw_bus_info *mlxsw_bus_info,
		       struct mlxsw_thermal **p_thermal);
void mlxsw_thermal_fini(struct mlxsw_thermal *thermal);

#else

static inline int mlxsw_thermal_init(struct mlxsw_core *mlxsw_core,
				     const struct mlxsw_bus_info *mlxsw_bus_info,
				     struct mlxsw_thermal **p_thermal)
{
	return 0;
}

static inline void mlxsw_thermal_fini(struct mlxsw_thermal *thermal)
{
}

#endif

#endif
Commit	Line	Data
9948a064 JP	1	/* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */
9948a064 JP	2	/* Copyright (c) 2015-2018 Mellanox Technologies. All rights reserved */
93c1edb2 JP	3
	4	#ifndef _MLXSW_CORE_H
	5	#define _MLXSW_CORE_H
	6
	7	#include <linux/module.h>
	8	#include <linux/device.h>
	9	#include <linux/slab.h>
	10	#include <linux/gfp.h>
	11	#include <linux/types.h>
	12	#include <linux/skbuff.h>
dd9bdb04	13	#include <linux/workqueue.h>
932762b6	14	#include <net/devlink.h>
93c1edb2	15
4ec14b76 IS	16	#include "trap.h"
4ec14b76 IS	17	#include "reg.h"
93c1edb2	18	#include "cmd.h"
c1a38311	19	#include "resources.h"
93c1edb2	20
93c1edb2	21	struct mlxsw_core;
67963a33	22	struct mlxsw_core_port;
93c1edb2 JP	23	struct mlxsw_driver;
	24	struct mlxsw_bus;
	25	struct mlxsw_bus_info;
	26
5ec2ee7d IS	27	unsigned int mlxsw_core_max_ports(const struct mlxsw_core *mlxsw_core);
5ec2ee7d IS	28
b2f10571 JP	29	void mlxsw_core_driver_priv(struct mlxsw_core mlxsw_core);
b2f10571 JP	30
93c1edb2 JP	31	int mlxsw_core_driver_register(struct mlxsw_driver *mlxsw_driver);
	32	void mlxsw_core_driver_unregister(struct mlxsw_driver *mlxsw_driver);
	33
	34	int mlxsw_core_bus_device_register(const struct mlxsw_bus_info *mlxsw_bus_info,
	35	const struct mlxsw_bus *mlxsw_bus,
24cc68ad AS	36	void *bus_priv, bool reload,
	37	struct devlink *devlink);
	38	void mlxsw_core_bus_device_unregister(struct mlxsw_core *mlxsw_core, bool reload);
93c1edb2 JP	39
	40	struct mlxsw_tx_info {
	41	u8 local_port;
	42	bool is_emad;
	43	};
	44
307c2431	45	bool mlxsw_core_skb_transmit_busy(struct mlxsw_core *mlxsw_core,
d003462a	46	const struct mlxsw_tx_info *tx_info);
307c2431	47	int mlxsw_core_skb_transmit(struct mlxsw_core mlxsw_core, struct sk_buff skb,
93c1edb2 JP	48	const struct mlxsw_tx_info *tx_info);
	49
	50	struct mlxsw_rx_listener {
	51	void (func)(struct sk_buff skb, u8 local_port, void *priv);
	52	u8 local_port;
	53	u16 trap_id;
63a81141	54	enum mlxsw_reg_hpkt_action action;
93c1edb2 JP	55	};
93c1edb2 JP	56
4ec14b76 IS	57	struct mlxsw_event_listener {
	58	void (func)(const struct mlxsw_reg_info reg,
	59	char payload, void priv);
	60	enum mlxsw_event_trap_id trap_id;
	61	};
	62
0791051c NF	63	struct mlxsw_listener {
	64	u16 trap_id;
	65	union {
	66	struct mlxsw_rx_listener rx_listener;
	67	struct mlxsw_event_listener event_listener;
	68	} u;
	69	enum mlxsw_reg_hpkt_action action;
	70	enum mlxsw_reg_hpkt_action unreg_action;
d570b7ee NF	71	u8 trap_group;
d570b7ee NF	72	bool is_ctrl; /* should go via control buffer or not */
0791051c NF	73	bool is_event;
	74	};
	75
0fb78a4e NF	76	#define MLXSW_RXL(_func, _trap_id, _action, _is_ctrl, _trap_group, \
0fb78a4e NF	77	_unreg_action) \
b63da93d NF	78	{ \
	79	.trap_id = MLXSW_TRAP_ID_##_trap_id, \
	80	.u.rx_listener = \
	81	{ \
	82	.func = _func, \
	83	.local_port = MLXSW_PORT_DONT_CARE, \
	84	.trap_id = MLXSW_TRAP_ID_##_trap_id, \
	85	}, \
	86	.action = MLXSW_REG_HPKT_ACTION_##_action, \
	87	.unreg_action = MLXSW_REG_HPKT_ACTION_##_unreg_action, \
0fb78a4e	88	.trap_group = MLXSW_REG_HTGT_TRAP_GROUP_##_trap_group, \
d570b7ee	89	.is_ctrl = _is_ctrl, \
b63da93d NF	90	.is_event = false, \
	91	}
	92
0fb78a4e NF	93	#define MLXSW_EVENTL(_func, _trap_id, _trap_group) \
	94	{ \
	95	.trap_id = MLXSW_TRAP_ID_##_trap_id, \
	96	.u.event_listener = \
	97	{ \
	98	.func = _func, \
	99	.trap_id = MLXSW_TRAP_ID_##_trap_id, \
	100	}, \
	101	.action = MLXSW_REG_HPKT_ACTION_TRAP_TO_CPU, \
	102	.trap_group = MLXSW_REG_HTGT_TRAP_GROUP_##_trap_group, \
	103	.is_ctrl = false, \
	104	.is_event = true, \
fb9012d9 NF	105	}
fb9012d9 NF	106
93c1edb2 JP	107	int mlxsw_core_rx_listener_register(struct mlxsw_core *mlxsw_core,
	108	const struct mlxsw_rx_listener *rxl,
	109	void *priv);
	110	void mlxsw_core_rx_listener_unregister(struct mlxsw_core *mlxsw_core,
	111	const struct mlxsw_rx_listener *rxl,
	112	void *priv);
	113
4ec14b76 IS	114	int mlxsw_core_event_listener_register(struct mlxsw_core *mlxsw_core,
	115	const struct mlxsw_event_listener *el,
	116	void *priv);
	117	void mlxsw_core_event_listener_unregister(struct mlxsw_core *mlxsw_core,
	118	const struct mlxsw_event_listener *el,
	119	void *priv);
	120
0791051c NF	121	int mlxsw_core_trap_register(struct mlxsw_core *mlxsw_core,
	122	const struct mlxsw_listener *listener,
	123	void *priv);
	124	void mlxsw_core_trap_unregister(struct mlxsw_core *mlxsw_core,
	125	const struct mlxsw_listener *listener,
	126	void *priv);
	127
caf7297e JP	128	typedef void mlxsw_reg_trans_cb_t(struct mlxsw_core mlxsw_core, char payload,
	129	size_t payload_len, unsigned long cb_priv);
	130
	131	int mlxsw_reg_trans_query(struct mlxsw_core *mlxsw_core,
	132	const struct mlxsw_reg_info reg, char payload,
	133	struct list_head *bulk_list,
	134	mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv);
	135	int mlxsw_reg_trans_write(struct mlxsw_core *mlxsw_core,
	136	const struct mlxsw_reg_info reg, char payload,
	137	struct list_head *bulk_list,
	138	mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv);
	139	int mlxsw_reg_trans_bulk_wait(struct list_head *bulk_list);
	140
4ec14b76 IS	141	int mlxsw_reg_query(struct mlxsw_core *mlxsw_core,
	142	const struct mlxsw_reg_info reg, char payload);
	143	int mlxsw_reg_write(struct mlxsw_core *mlxsw_core,
	144	const struct mlxsw_reg_info reg, char payload);
	145
93c1edb2	146	struct mlxsw_rx_info {
8060646a JP	147	bool is_lag;
	148	union {
	149	u16 sys_port;
	150	u16 lag_id;
	151	} u;
	152	u8 lag_port_index;
93c1edb2 JP	153	int trap_id;
	154	};
	155
	156	void mlxsw_core_skb_receive(struct mlxsw_core mlxsw_core, struct sk_buff skb,
	157	struct mlxsw_rx_info *rx_info);
	158
8060646a JP	159	void mlxsw_core_lag_mapping_set(struct mlxsw_core *mlxsw_core,
	160	u16 lag_id, u8 port_index, u8 local_port);
	161	u8 mlxsw_core_lag_mapping_get(struct mlxsw_core *mlxsw_core,
	162	u16 lag_id, u8 port_index);
	163	void mlxsw_core_lag_mapping_clear(struct mlxsw_core *mlxsw_core,
	164	u16 lag_id, u8 local_port);
	165
67963a33 JP	166	void mlxsw_core_port_driver_priv(struct mlxsw_core_port mlxsw_core_port);
	167	int mlxsw_core_port_init(struct mlxsw_core *mlxsw_core, u8 local_port);
	168	void mlxsw_core_port_fini(struct mlxsw_core *mlxsw_core, u8 local_port);
d808c7e4 ER	169	void mlxsw_core_port_eth_set(struct mlxsw_core *mlxsw_core, u8 local_port,
d808c7e4 ER	170	void port_driver_priv, struct net_device dev,
b9ffcbaf JP	171	u32 port_number, bool split,
b9ffcbaf JP	172	u32 split_port_subnumber);
0c81ea5d ER	173	void mlxsw_core_port_ib_set(struct mlxsw_core *mlxsw_core, u8 local_port,
0c81ea5d ER	174	void *port_driver_priv);
67963a33 JP	175	void mlxsw_core_port_clear(struct mlxsw_core *mlxsw_core, u8 local_port,
67963a33 JP	176	void *port_driver_priv);
0c81ea5d ER	177	enum devlink_port_type mlxsw_core_port_type_get(struct mlxsw_core *mlxsw_core,
0c81ea5d ER	178	u8 local_port);
ec932fbd JP	179	int mlxsw_core_port_get_phys_port_name(struct mlxsw_core *mlxsw_core,
ec932fbd JP	180	u8 local_port, char *name, size_t len);
932762b6	181
dd9bdb04	182	int mlxsw_core_schedule_dw(struct delayed_work *dwork, unsigned long delay);
a0e4761d	183	bool mlxsw_core_schedule_work(struct work_struct *work);
a3832b31	184	void mlxsw_core_flush_owq(void);
dd9bdb04	185
93c1edb2 JP	186	#define MLXSW_CONFIG_PROFILE_SWID_COUNT 8
	187
	188	struct mlxsw_swid_config {
	189	u8 used_type:1,
	190	used_properties:1;
	191	u8 type;
	192	u8 properties;
	193	};
	194
	195	struct mlxsw_config_profile {
	196	u16 used_max_vepa_channels:1,
93c1edb2 JP	197	used_max_mid:1,
	198	used_max_pgt:1,
	199	used_max_system_port:1,
	200	used_max_vlan_groups:1,
	201	used_max_regions:1,
	202	used_flood_tables:1,
	203	used_flood_mode:1,
	204	used_max_ib_mc:1,
	205	used_max_pkey:1,
	206	used_ar_sec:1,
489107bd	207	used_adaptive_routing_group_cap:1,
110d2d21	208	used_kvd_sizes:1;
93c1edb2	209	u8 max_vepa_channels;
93c1edb2 JP	210	u16 max_mid;
	211	u16 max_pgt;
	212	u16 max_system_port;
	213	u16 max_vlan_groups;
	214	u16 max_regions;
	215	u8 max_flood_tables;
	216	u8 max_vid_flood_tables;
	217	u8 flood_mode;
12fd35ab IS	218	u8 max_fid_offset_flood_tables;
12fd35ab IS	219	u16 fid_offset_flood_table_size;
453b6a8d IS	220	u8 max_fid_flood_tables;
453b6a8d IS	221	u16 fid_flood_table_size;
93c1edb2 JP	222	u16 max_ib_mc;
	223	u16 max_pkey;
	224	u8 ar_sec;
	225	u16 adaptive_routing_group_cap;
	226	u8 arn;
489107bd	227	u32 kvd_linear_size;
403547d3 NF	228	u8 kvd_hash_single_parts;
403547d3 NF	229	u8 kvd_hash_double_parts;
93c1edb2 JP	230	struct mlxsw_swid_config swid_config[MLXSW_CONFIG_PROFILE_SWID_COUNT];
	231	};
	232
	233	struct mlxsw_driver {
	234	struct list_head list;
	235	const char *kind;
93c1edb2	236	size_t priv_size;
b2f10571	237	int (init)(struct mlxsw_core mlxsw_core,
93c1edb2	238	const struct mlxsw_bus_info *mlxsw_bus_info);
b2f10571	239	void (fini)(struct mlxsw_core mlxsw_core);
9d87fcea	240	int (basic_trap_groups_set)(struct mlxsw_core mlxsw_core);
0c81ea5d ER	241	int (port_type_set)(struct mlxsw_core mlxsw_core, u8 local_port,
0c81ea5d ER	242	enum devlink_port_type new_type);
b2f10571	243	int (port_split)(struct mlxsw_core mlxsw_core, u8 local_port,
3fcc773b DA	244	unsigned int count, struct netlink_ext_ack *extack);
	245	int (port_unsplit)(struct mlxsw_core mlxsw_core, u8 local_port,
	246	struct netlink_ext_ack *extack);
a6179bf0 JP	247	int (sb_pool_get)(struct mlxsw_core mlxsw_core,
	248	unsigned int sb_index, u16 pool_index,
	249	struct devlink_sb_pool_info *pool_info);
	250	int (sb_pool_set)(struct mlxsw_core mlxsw_core,
	251	unsigned int sb_index, u16 pool_index, u32 size,
	252	enum devlink_sb_threshold_type threshold_type);
	253	int (sb_port_pool_get)(struct mlxsw_core_port mlxsw_core_port,
	254	unsigned int sb_index, u16 pool_index,
	255	u32 *p_threshold);
	256	int (sb_port_pool_set)(struct mlxsw_core_port mlxsw_core_port,
	257	unsigned int sb_index, u16 pool_index,
	258	u32 threshold);
	259	int (sb_tc_pool_bind_get)(struct mlxsw_core_port mlxsw_core_port,
	260	unsigned int sb_index, u16 tc_index,
	261	enum devlink_sb_pool_type pool_type,
	262	u16 p_pool_index, u32 p_threshold);
	263	int (sb_tc_pool_bind_set)(struct mlxsw_core_port mlxsw_core_port,
	264	unsigned int sb_index, u16 tc_index,
	265	enum devlink_sb_pool_type pool_type,
	266	u16 pool_index, u32 threshold);
1ceecc88 JP	267	int (sb_occ_snapshot)(struct mlxsw_core mlxsw_core,
	268	unsigned int sb_index);
	269	int (sb_occ_max_clear)(struct mlxsw_core mlxsw_core,
	270	unsigned int sb_index);
	271	int (sb_occ_port_pool_get)(struct mlxsw_core_port mlxsw_core_port,
	272	unsigned int sb_index, u16 pool_index,
	273	u32 p_cur, u32 p_max);
	274	int (sb_occ_tc_port_bind_get)(struct mlxsw_core_port mlxsw_core_port,
	275	unsigned int sb_index, u16 tc_index,
	276	enum devlink_sb_pool_type pool_type,
	277	u32 p_cur, u32 p_max);
93c1edb2 JP	278	void (txhdr_construct)(struct sk_buff skb,
93c1edb2 JP	279	const struct mlxsw_tx_info *tx_info);
ef3116e5	280	int (resources_register)(struct mlxsw_core mlxsw_core);
e21d21ca AS	281	int (kvd_sizes_get)(struct mlxsw_core mlxsw_core,
	282	const struct mlxsw_config_profile *profile,
	283	u64 p_single_size, u64 p_double_size,
	284	u64 *p_linear_size);
93c1edb2 JP	285	u8 txhdr_len;
93c1edb2 JP	286	const struct mlxsw_config_profile *profile;
ad3f20b2	287	bool res_query_enabled;
93c1edb2 JP	288	};
93c1edb2 JP	289
e21d21ca AS	290	int mlxsw_core_kvd_sizes_get(struct mlxsw_core *mlxsw_core,
	291	const struct mlxsw_config_profile *profile,
	292	u64 p_single_size, u64 p_double_size,
	293	u64 *p_linear_size);
	294
c1a38311 JP	295	bool mlxsw_core_res_valid(struct mlxsw_core *mlxsw_core,
c1a38311 JP	296	enum mlxsw_res_id res_id);
403547d3	297
64f45888 JP	298	#define MLXSW_CORE_RES_VALID(mlxsw_core, short_res_id) \
64f45888 JP	299	mlxsw_core_res_valid(mlxsw_core, MLXSW_RES_ID_##short_res_id)
c1a38311 JP	300
	301	u64 mlxsw_core_res_get(struct mlxsw_core *mlxsw_core,
	302	enum mlxsw_res_id res_id);
57d316ba	303
64f45888 JP	304	#define MLXSW_CORE_RES_GET(mlxsw_core, short_res_id) \
64f45888 JP	305	mlxsw_core_res_get(mlxsw_core, MLXSW_RES_ID_##short_res_id)
57d316ba	306
c711e27a	307	#define MLXSW_BUS_F_TXRX BIT(0)
f3a52c61	308	#define MLXSW_BUS_F_RESET BIT(1)
c711e27a	309
93c1edb2 JP	310	struct mlxsw_bus {
	311	const char *kind;
	312	int (init)(void bus_priv, struct mlxsw_core *mlxsw_core,
57d316ba	313	const struct mlxsw_config_profile *profile,
c1a38311	314	struct mlxsw_res *res);
93c1edb2	315	void (fini)(void bus_priv);
d003462a IS	316	bool (skb_transmit_busy)(void bus_priv,
d003462a IS	317	const struct mlxsw_tx_info *tx_info);
93c1edb2 JP	318	int (skb_transmit)(void bus_priv, struct sk_buff *skb,
	319	const struct mlxsw_tx_info *tx_info);
	320	int (cmd_exec)(void bus_priv, u16 opcode, u8 opcode_mod,
	321	u32 in_mod, bool out_mbox_direct,
	322	char *in_mbox, size_t in_mbox_size,
	323	char *out_mbox, size_t out_mbox_size,
	324	u8 *p_status);
c711e27a	325	u8 features;
93c1edb2 JP	326	};
93c1edb2 JP	327
c41d0075 YG	328	struct mlxsw_fw_rev {
	329	u16 major;
	330	u16 minor;
	331	u16 subminor;
c86d62cc	332	u16 can_reset_minor;
c41d0075 YG	333	};
c41d0075 YG	334
93c1edb2 JP	335	struct mlxsw_bus_info {
	336	const char *device_kind;
	337	const char *device_name;
	338	struct device *dev;
c41d0075	339	struct mlxsw_fw_rev fw_rev;
93c1edb2 JP	340	u8 vsd[MLXSW_CMD_BOARDINFO_VSD_LEN];
	341	u8 psid[MLXSW_CMD_BOARDINFO_PSID_LEN];
	342	};
	343
89309da3 JP	344	struct mlxsw_hwmon;
	345
	346	#ifdef CONFIG_MLXSW_CORE_HWMON
	347
	348	int mlxsw_hwmon_init(struct mlxsw_core *mlxsw_core,
	349	const struct mlxsw_bus_info *mlxsw_bus_info,
	350	struct mlxsw_hwmon **p_hwmon);
	351	void mlxsw_hwmon_fini(struct mlxsw_hwmon *mlxsw_hwmon);
	352
	353	#else
	354
	355	static inline int mlxsw_hwmon_init(struct mlxsw_core *mlxsw_core,
	356	const struct mlxsw_bus_info *mlxsw_bus_info,
	357	struct mlxsw_hwmon **p_hwmon)
	358	{
	359	return 0;
	360	}
	361
9b3bc7db IS	362	static inline void mlxsw_hwmon_fini(struct mlxsw_hwmon *mlxsw_hwmon)
	363	{
	364	}
	365
89309da3 JP	366	#endif
89309da3 JP	367
a50c1e35 IV	368	struct mlxsw_thermal;
	369
	370	#ifdef CONFIG_MLXSW_CORE_THERMAL
	371
	372	int mlxsw_thermal_init(struct mlxsw_core *mlxsw_core,
	373	const struct mlxsw_bus_info *mlxsw_bus_info,
	374	struct mlxsw_thermal **p_thermal);
	375	void mlxsw_thermal_fini(struct mlxsw_thermal *thermal);
	376
	377	#else
	378
	379	static inline int mlxsw_thermal_init(struct mlxsw_core *mlxsw_core,
	380	const struct mlxsw_bus_info *mlxsw_bus_info,
	381	struct mlxsw_thermal **p_thermal)
	382	{
	383	return 0;
	384	}
	385
	386	static inline void mlxsw_thermal_fini(struct mlxsw_thermal *thermal)
	387	{
	388	}
	389
	390	#endif
	391
93c1edb2	392	#endif