[linux-2.6-block.git] / drivers / net / ethernet / mellanox / mlx5 / core / uar.c

/*
 * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved.
 *
 * This software is available to you under a choice of one of two
 * licenses.  You may choose to be licensed under the terms of the GNU
 * General Public License (GPL) Version 2, available from the file
 * COPYING in the main directory of this source tree, or the
 * OpenIB.org BSD license below:
 *
 *     Redistribution and use in source and binary forms, with or
 *     without modification, are permitted provided that the following
 *     conditions are met:
 *
 *      - Redistributions of source code must retain the above
 *        copyright notice, this list of conditions and the following
 *        disclaimer.
 *
 *      - Redistributions in binary form must reproduce the above
 *        copyright notice, this list of conditions and the following
 *        disclaimer in the documentation and/or other materials
 *        provided with the distribution.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 * SOFTWARE.
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/io-mapping.h>
#include <linux/mlx5/driver.h>
#include <linux/mlx5/cmd.h>
#include "mlx5_core.h"

enum {
	NUM_DRIVER_UARS		= 4,
	NUM_LOW_LAT_BFREGS	= 4,
};

int mlx5_cmd_alloc_uar(struct mlx5_core_dev *dev, u32 *uarn)
{
	u32 out[MLX5_ST_SZ_DW(alloc_uar_out)] = {0};
	u32 in[MLX5_ST_SZ_DW(alloc_uar_in)]   = {0};
	int err;

	MLX5_SET(alloc_uar_in, in, opcode, MLX5_CMD_OP_ALLOC_UAR);
	err = mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
	if (!err)
		*uarn = MLX5_GET(alloc_uar_out, out, uar);
	return err;
}
EXPORT_SYMBOL(mlx5_cmd_alloc_uar);

int mlx5_cmd_free_uar(struct mlx5_core_dev *dev, u32 uarn)
{
	u32 out[MLX5_ST_SZ_DW(dealloc_uar_out)] = {0};
	u32 in[MLX5_ST_SZ_DW(dealloc_uar_in)]   = {0};

	MLX5_SET(dealloc_uar_in, in, opcode, MLX5_CMD_OP_DEALLOC_UAR);
	MLX5_SET(dealloc_uar_in, in, uar, uarn);
	return mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
}
EXPORT_SYMBOL(mlx5_cmd_free_uar);

static int need_bfreg_lock(int bfregn)
{
	int tot_bfregs = NUM_DRIVER_UARS * MLX5_BFREGS_PER_UAR;

	if (bfregn == 0 || tot_bfregs - NUM_LOW_LAT_BFREGS)
		return 0;

	return 1;
}

int mlx5_alloc_bfregs(struct mlx5_core_dev *dev, struct mlx5_bfreg_info *bfregi)
{
	int tot_bfregs = NUM_DRIVER_UARS * MLX5_BFREGS_PER_UAR;
	struct mlx5_bf *bf;
	phys_addr_t addr;
	int err;
	int i;

	bfregi->num_uars = NUM_DRIVER_UARS;
	bfregi->num_low_latency_bfregs = NUM_LOW_LAT_BFREGS;

	mutex_init(&bfregi->lock);
	bfregi->uars = kcalloc(bfregi->num_uars, sizeof(*bfregi->uars), GFP_KERNEL);
	if (!bfregi->uars)
		return -ENOMEM;

	bfregi->bfs = kcalloc(tot_bfregs, sizeof(*bfregi->bfs), GFP_KERNEL);
	if (!bfregi->bfs) {
		err = -ENOMEM;
		goto out_uars;
	}

	bfregi->bitmap = kcalloc(BITS_TO_LONGS(tot_bfregs), sizeof(*bfregi->bitmap),
				GFP_KERNEL);
	if (!bfregi->bitmap) {
		err = -ENOMEM;
		goto out_bfs;
	}

	bfregi->count = kcalloc(tot_bfregs, sizeof(*bfregi->count), GFP_KERNEL);
	if (!bfregi->count) {
		err = -ENOMEM;
		goto out_bitmap;
	}

	for (i = 0; i < bfregi->num_uars; i++) {
		err = mlx5_cmd_alloc_uar(dev, &bfregi->uars[i].index);
		if (err)
			goto out_count;

		addr = dev->iseg_base + ((phys_addr_t)(bfregi->uars[i].index) << PAGE_SHIFT);
		bfregi->uars[i].map = ioremap(addr, PAGE_SIZE);
		if (!bfregi->uars[i].map) {
			mlx5_cmd_free_uar(dev, bfregi->uars[i].index);
			err = -ENOMEM;
			goto out_count;
		}
		mlx5_core_dbg(dev, "allocated uar index 0x%x, mmaped at %p\n",
			      bfregi->uars[i].index, bfregi->uars[i].map);
	}

	for (i = 0; i < tot_bfregs; i++) {
		bf = &bfregi->bfs[i];

		bf->buf_size = (1 << MLX5_CAP_GEN(dev, log_bf_reg_size)) / 2;
		bf->uar = &bfregi->uars[i / MLX5_BFREGS_PER_UAR];
		bf->regreg = bfregi->uars[i / MLX5_BFREGS_PER_UAR].map;
		bf->reg = NULL; /* Add WC support */
		bf->offset = (i % MLX5_BFREGS_PER_UAR) *
			     (1 << MLX5_CAP_GEN(dev, log_bf_reg_size)) +
			     MLX5_BF_OFFSET;
		bf->need_lock = need_bfreg_lock(i);
		spin_lock_init(&bf->lock);
		spin_lock_init(&bf->lock32);
		bf->bfregn = i;
	}

	return 0;

out_count:
	for (i--; i >= 0; i--) {
		iounmap(bfregi->uars[i].map);
		mlx5_cmd_free_uar(dev, bfregi->uars[i].index);
	}
	kfree(bfregi->count);

out_bitmap:
	kfree(bfregi->bitmap);

out_bfs:
	kfree(bfregi->bfs);

out_uars:
	kfree(bfregi->uars);
	return err;
}

int mlx5_free_bfregs(struct mlx5_core_dev *dev, struct mlx5_bfreg_info *bfregi)
{
	int i = bfregi->num_uars;

	for (i--; i >= 0; i--) {
		iounmap(bfregi->uars[i].map);
		mlx5_cmd_free_uar(dev, bfregi->uars[i].index);
	}

	kfree(bfregi->count);
	kfree(bfregi->bitmap);
	kfree(bfregi->bfs);
	kfree(bfregi->uars);

	return 0;
}

int mlx5_alloc_map_uar(struct mlx5_core_dev *mdev, struct mlx5_uar *uar,
		       bool map_wc)
{
	phys_addr_t pfn;
	phys_addr_t uar_bar_start;
	int err;

	err = mlx5_cmd_alloc_uar(mdev, &uar->index);
	if (err) {
		mlx5_core_warn(mdev, "mlx5_cmd_alloc_uar() failed, %d\n", err);
		return err;
	}

	uar_bar_start = pci_resource_start(mdev->pdev, 0);
	pfn           = (uar_bar_start >> PAGE_SHIFT) + uar->index;

	if (map_wc) {
		uar->bf_map = ioremap_wc(pfn << PAGE_SHIFT, PAGE_SIZE);
		if (!uar->bf_map) {
			mlx5_core_warn(mdev, "ioremap_wc() failed\n");
			uar->map = ioremap(pfn << PAGE_SHIFT, PAGE_SIZE);
			if (!uar->map)
				goto err_free_uar;
		}
	} else {
		uar->map = ioremap(pfn << PAGE_SHIFT, PAGE_SIZE);
		if (!uar->map)
			goto err_free_uar;
	}

	return 0;

err_free_uar:
	mlx5_core_warn(mdev, "ioremap() failed\n");
	err = -ENOMEM;
	mlx5_cmd_free_uar(mdev, uar->index);

	return err;
}
EXPORT_SYMBOL(mlx5_alloc_map_uar);

void mlx5_unmap_free_uar(struct mlx5_core_dev *mdev, struct mlx5_uar *uar)
{
	if (uar->map)
		iounmap(uar->map);
	else
		iounmap(uar->bf_map);
	mlx5_cmd_free_uar(mdev, uar->index);
}
EXPORT_SYMBOL(mlx5_unmap_free_uar);

static int uars_per_sys_page(struct mlx5_core_dev *mdev)
{
	if (MLX5_CAP_GEN(mdev, uar_4k))
		return MLX5_CAP_GEN(mdev, num_of_uars_per_page);

	return 1;
}

static u64 uar2pfn(struct mlx5_core_dev *mdev, u32 index)
{
	u32 system_page_index;

	if (MLX5_CAP_GEN(mdev, uar_4k))
		system_page_index = index >> (PAGE_SHIFT - MLX5_ADAPTER_PAGE_SHIFT);
	else
		system_page_index = index;

	return (pci_resource_start(mdev->pdev, 0) >> PAGE_SHIFT) + system_page_index;
}

static void up_rel_func(struct kref *kref)
{
	struct mlx5_uars_page *up = container_of(kref, struct mlx5_uars_page, ref_count);

	list_del(&up->list);
	if (mlx5_cmd_free_uar(up->mdev, up->index))
		mlx5_core_warn(up->mdev, "failed to free uar index %d\n", up->index);
	kfree(up->reg_bitmap);
	kfree(up->fp_bitmap);
	kfree(up);
}

static struct mlx5_uars_page *alloc_uars_page(struct mlx5_core_dev *mdev,
					      bool map_wc)
{
	struct mlx5_uars_page *up;
	int err = -ENOMEM;
	phys_addr_t pfn;
	int bfregs;
	int i;

	bfregs = uars_per_sys_page(mdev) * MLX5_BFREGS_PER_UAR;
	up = kzalloc(sizeof(*up), GFP_KERNEL);
	if (!up)
		return ERR_PTR(err);

	up->mdev = mdev;
	up->reg_bitmap = kcalloc(BITS_TO_LONGS(bfregs), sizeof(unsigned long), GFP_KERNEL);
	if (!up->reg_bitmap)
		goto error1;

	up->fp_bitmap = kcalloc(BITS_TO_LONGS(bfregs), sizeof(unsigned long), GFP_KERNEL);
	if (!up->fp_bitmap)
		goto error1;

	for (i = 0; i < bfregs; i++)
		if ((i % MLX5_BFREGS_PER_UAR) < MLX5_NON_FP_BFREGS_PER_UAR)
			set_bit(i, up->reg_bitmap);
		else
			set_bit(i, up->fp_bitmap);

	up->bfregs = bfregs;
	up->fp_avail = bfregs * MLX5_FP_BFREGS_PER_UAR / MLX5_BFREGS_PER_UAR;
	up->reg_avail = bfregs * MLX5_NON_FP_BFREGS_PER_UAR / MLX5_BFREGS_PER_UAR;

	err = mlx5_cmd_alloc_uar(mdev, &up->index);
	if (err) {
		mlx5_core_warn(mdev, "mlx5_cmd_alloc_uar() failed, %d\n", err);
		goto error1;
	}

	pfn = uar2pfn(mdev, up->index);
	if (map_wc) {
		up->map = ioremap_wc(pfn << PAGE_SHIFT, PAGE_SIZE);
		if (!up->map) {
			err = -EAGAIN;
			goto error2;
		}
	} else {
		up->map = ioremap(pfn << PAGE_SHIFT, PAGE_SIZE);
		if (!up->map) {
			err = -ENOMEM;
			goto error2;
		}
	}
	kref_init(&up->ref_count);
	mlx5_core_dbg(mdev, "allocated UAR page: index %d, total bfregs %d\n",
		      up->index, up->bfregs);
	return up;

error2:
	if (mlx5_cmd_free_uar(mdev, up->index))
		mlx5_core_warn(mdev, "failed to free uar index %d\n", up->index);
error1:
	kfree(up->fp_bitmap);
	kfree(up->reg_bitmap);
	kfree(up);
	return ERR_PTR(err);
}

static unsigned long map_offset(struct mlx5_core_dev *mdev, int dbi)
{
	/* return the offset in bytes from the start of the page to the
	 * blue flame area of the UAR
	 */
	return dbi / MLX5_BFREGS_PER_UAR * MLX5_ADAPTER_PAGE_SIZE +
	       (dbi % MLX5_BFREGS_PER_UAR) *
	       (1 << MLX5_CAP_GEN(mdev, log_bf_reg_size)) + MLX5_BF_OFFSET;
}

static int alloc_bfreg(struct mlx5_core_dev *mdev, struct mlx5_sq_bfreg *bfreg,
		       bool map_wc, bool fast_path)
{
	struct mlx5_bfreg_data *bfregs;
	struct mlx5_uars_page *up;
	struct list_head *head;
	unsigned long *bitmap;
	unsigned int *avail;
	struct mutex *lock;  /* pointer to right mutex */
	int dbi;

	bfregs = &mdev->priv.bfregs;
	if (map_wc) {
		head = &bfregs->wc_head.list;
		lock = &bfregs->wc_head.lock;
	} else {
		head = &bfregs->reg_head.list;
		lock = &bfregs->reg_head.lock;
	}
	mutex_lock(lock);
	if (list_empty(head)) {
		up = alloc_uars_page(mdev, map_wc);
		if (IS_ERR(up)) {
			mutex_unlock(lock);
			return PTR_ERR(up);
		}
		list_add(&up->list, head);
	} else {
		up = list_entry(head->next, struct mlx5_uars_page, list);
		kref_get(&up->ref_count);
	}
	if (fast_path) {
		bitmap = up->fp_bitmap;
		avail = &up->fp_avail;
	} else {
		bitmap = up->reg_bitmap;
		avail = &up->reg_avail;
	}
	dbi = find_first_bit(bitmap, up->bfregs);
	clear_bit(dbi, bitmap);
	(*avail)--;
	if (!(*avail))
		list_del(&up->list);

	bfreg->map = up->map + map_offset(mdev, dbi);
	bfreg->up = up;
	bfreg->wc = map_wc;
	bfreg->index = up->index + dbi / MLX5_BFREGS_PER_UAR;
	mutex_unlock(lock);

	return 0;
}

int mlx5_alloc_bfreg(struct mlx5_core_dev *mdev, struct mlx5_sq_bfreg *bfreg,
		     bool map_wc, bool fast_path)
{
	int err;

	err = alloc_bfreg(mdev, bfreg, map_wc, fast_path);
	if (!err)
		return 0;

	if (err == -EAGAIN && map_wc)
		return alloc_bfreg(mdev, bfreg, false, fast_path);

	return err;
}
EXPORT_SYMBOL(mlx5_alloc_bfreg);

static unsigned int addr_to_dbi_in_syspage(struct mlx5_core_dev *dev,
					   struct mlx5_uars_page *up,
					   struct mlx5_sq_bfreg *bfreg)
{
	unsigned int uar_idx;
	unsigned int bfreg_idx;
	unsigned int bf_reg_size;

	bf_reg_size = 1 << MLX5_CAP_GEN(dev, log_bf_reg_size);

	uar_idx = (bfreg->map - up->map) >> MLX5_ADAPTER_PAGE_SHIFT;
	bfreg_idx = (((uintptr_t)bfreg->map % MLX5_ADAPTER_PAGE_SIZE) - MLX5_BF_OFFSET) / bf_reg_size;

	return uar_idx * MLX5_BFREGS_PER_UAR + bfreg_idx;
}

void mlx5_free_bfreg(struct mlx5_core_dev *mdev, struct mlx5_sq_bfreg *bfreg)
{
	struct mlx5_bfreg_data *bfregs;
	struct mlx5_uars_page *up;
	struct mutex *lock; /* pointer to right mutex */
	unsigned int dbi;
	bool fp;
	unsigned int *avail;
	unsigned long *bitmap;
	struct list_head *head;

	bfregs = &mdev->priv.bfregs;
	if (bfreg->wc) {
		head = &bfregs->wc_head.list;
		lock = &bfregs->wc_head.lock;
	} else {
		head = &bfregs->reg_head.list;
		lock = &bfregs->reg_head.lock;
	}
	up = bfreg->up;
	dbi = addr_to_dbi_in_syspage(mdev, up, bfreg);
	fp = (dbi % MLX5_BFREGS_PER_UAR) >= MLX5_NON_FP_BFREGS_PER_UAR;
	if (fp) {
		avail = &up->fp_avail;
		bitmap = up->fp_bitmap;
	} else {
		avail = &up->reg_avail;
		bitmap = up->reg_bitmap;
	}
	mutex_lock(lock);
	(*avail)++;
	set_bit(dbi, bitmap);
	if (*avail == 1)
		list_add_tail(&up->list, head);

	kref_put(&up->ref_count, up_rel_func);
	mutex_unlock(lock);
}
EXPORT_SYMBOL(mlx5_free_bfreg);
Commit	Line	Data
e126ba97	1	/*
302bdf68	2	* Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved.
e126ba97 EC	3	*
	4	* This software is available to you under a choice of one of two
	5	* licenses. You may choose to be licensed under the terms of the GNU
	6	* General Public License (GPL) Version 2, available from the file
	7	* COPYING in the main directory of this source tree, or the
	8	* OpenIB.org BSD license below:
	9	*
	10	* Redistribution and use in source and binary forms, with or
	11	* without modification, are permitted provided that the following
	12	* conditions are met:
	13	*
	14	* - Redistributions of source code must retain the above
	15	* copyright notice, this list of conditions and the following
	16	* disclaimer.
	17	*
	18	* - Redistributions in binary form must reproduce the above
	19	* copyright notice, this list of conditions and the following
	20	* disclaimer in the documentation and/or other materials
	21	* provided with the distribution.
	22	*
	23	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
	24	* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
	25	* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
	26	* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
	27	* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
	28	* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
	29	* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
	30	* SOFTWARE.
	31	*/
	32
	33	#include <linux/kernel.h>
	34	#include <linux/module.h>
88a85f99	35	#include <linux/io-mapping.h>
e126ba97 EC	36	#include <linux/mlx5/driver.h>
	37	#include <linux/mlx5/cmd.h>
	38	#include "mlx5_core.h"
	39
	40	enum {
	41	NUM_DRIVER_UARS = 4,
2f5ff264	42	NUM_LOW_LAT_BFREGS = 4,
e126ba97 EC	43	};
e126ba97 EC	44
e126ba97 EC	45	int mlx5_cmd_alloc_uar(struct mlx5_core_dev dev, u32 uarn)
e126ba97 EC	46	{
732ef5ad SM	47	u32 out[MLX5_ST_SZ_DW(alloc_uar_out)] = {0};
732ef5ad SM	48	u32 in[MLX5_ST_SZ_DW(alloc_uar_in)] = {0};
e126ba97 EC	49	int err;
e126ba97 EC	50
732ef5ad SM	51	MLX5_SET(alloc_uar_in, in, opcode, MLX5_CMD_OP_ALLOC_UAR);
732ef5ad SM	52	err = mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
c4f287c4 SM	53	if (!err)
c4f287c4 SM	54	*uarn = MLX5_GET(alloc_uar_out, out, uar);
e126ba97 EC	55	return err;
	56	}
	57	EXPORT_SYMBOL(mlx5_cmd_alloc_uar);
	58
	59	int mlx5_cmd_free_uar(struct mlx5_core_dev *dev, u32 uarn)
	60	{
732ef5ad SM	61	u32 out[MLX5_ST_SZ_DW(dealloc_uar_out)] = {0};
732ef5ad SM	62	u32 in[MLX5_ST_SZ_DW(dealloc_uar_in)] = {0};
e126ba97	63
732ef5ad SM	64	MLX5_SET(dealloc_uar_in, in, opcode, MLX5_CMD_OP_DEALLOC_UAR);
732ef5ad SM	65	MLX5_SET(dealloc_uar_in, in, uar, uarn);
c4f287c4	66	return mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
e126ba97 EC	67	}
	68	EXPORT_SYMBOL(mlx5_cmd_free_uar);
	69
2f5ff264	70	static int need_bfreg_lock(int bfregn)
e126ba97	71	{
2f5ff264	72	int tot_bfregs = NUM_DRIVER_UARS * MLX5_BFREGS_PER_UAR;
e126ba97	73
2f5ff264	74	if (bfregn == 0 \|\| tot_bfregs - NUM_LOW_LAT_BFREGS)
e126ba97 EC	75	return 0;
	76
	77	return 1;
	78	}
	79
2f5ff264	80	int mlx5_alloc_bfregs(struct mlx5_core_dev dev, struct mlx5_bfreg_info bfregi)
e126ba97	81	{
2f5ff264	82	int tot_bfregs = NUM_DRIVER_UARS * MLX5_BFREGS_PER_UAR;
e126ba97 EC	83	struct mlx5_bf *bf;
	84	phys_addr_t addr;
	85	int err;
	86	int i;
	87
2f5ff264 EC	88	bfregi->num_uars = NUM_DRIVER_UARS;
2f5ff264 EC	89	bfregi->num_low_latency_bfregs = NUM_LOW_LAT_BFREGS;
e126ba97	90
2f5ff264 EC	91	mutex_init(&bfregi->lock);
	92	bfregi->uars = kcalloc(bfregi->num_uars, sizeof(*bfregi->uars), GFP_KERNEL);
	93	if (!bfregi->uars)
e126ba97 EC	94	return -ENOMEM;
e126ba97 EC	95
2f5ff264 EC	96	bfregi->bfs = kcalloc(tot_bfregs, sizeof(*bfregi->bfs), GFP_KERNEL);
2f5ff264 EC	97	if (!bfregi->bfs) {
e126ba97 EC	98	err = -ENOMEM;
	99	goto out_uars;
	100	}
	101
2f5ff264	102	bfregi->bitmap = kcalloc(BITS_TO_LONGS(tot_bfregs), sizeof(*bfregi->bitmap),
e126ba97	103	GFP_KERNEL);
2f5ff264	104	if (!bfregi->bitmap) {
e126ba97 EC	105	err = -ENOMEM;
	106	goto out_bfs;
	107	}
	108
2f5ff264 EC	109	bfregi->count = kcalloc(tot_bfregs, sizeof(*bfregi->count), GFP_KERNEL);
2f5ff264 EC	110	if (!bfregi->count) {
e126ba97 EC	111	err = -ENOMEM;
	112	goto out_bitmap;
	113	}
	114
2f5ff264 EC	115	for (i = 0; i < bfregi->num_uars; i++) {
2f5ff264 EC	116	err = mlx5_cmd_alloc_uar(dev, &bfregi->uars[i].index);
e126ba97 EC	117	if (err)
	118	goto out_count;
	119
2f5ff264 EC	120	addr = dev->iseg_base + ((phys_addr_t)(bfregi->uars[i].index) << PAGE_SHIFT);
	121	bfregi->uars[i].map = ioremap(addr, PAGE_SIZE);
	122	if (!bfregi->uars[i].map) {
	123	mlx5_cmd_free_uar(dev, bfregi->uars[i].index);
a661b43f	124	err = -ENOMEM;
e126ba97 EC	125	goto out_count;
	126	}
	127	mlx5_core_dbg(dev, "allocated uar index 0x%x, mmaped at %p\n",
2f5ff264	128	bfregi->uars[i].index, bfregi->uars[i].map);
e126ba97 EC	129	}
e126ba97 EC	130
2f5ff264 EC	131	for (i = 0; i < tot_bfregs; i++) {
2f5ff264 EC	132	bf = &bfregi->bfs[i];
e126ba97	133
938fe83c	134	bf->buf_size = (1 << MLX5_CAP_GEN(dev, log_bf_reg_size)) / 2;
2f5ff264 EC	135	bf->uar = &bfregi->uars[i / MLX5_BFREGS_PER_UAR];
2f5ff264 EC	136	bf->regreg = bfregi->uars[i / MLX5_BFREGS_PER_UAR].map;
e126ba97	137	bf->reg = NULL; /* Add WC support */
2f5ff264	138	bf->offset = (i % MLX5_BFREGS_PER_UAR) *
938fe83c SM	139	(1 << MLX5_CAP_GEN(dev, log_bf_reg_size)) +
938fe83c SM	140	MLX5_BF_OFFSET;
2f5ff264	141	bf->need_lock = need_bfreg_lock(i);
e126ba97 EC	142	spin_lock_init(&bf->lock);
e126ba97 EC	143	spin_lock_init(&bf->lock32);
2f5ff264	144	bf->bfregn = i;
e126ba97 EC	145	}
	146
	147	return 0;
	148
	149	out_count:
	150	for (i--; i >= 0; i--) {
2f5ff264 EC	151	iounmap(bfregi->uars[i].map);
2f5ff264 EC	152	mlx5_cmd_free_uar(dev, bfregi->uars[i].index);
e126ba97	153	}
2f5ff264	154	kfree(bfregi->count);
e126ba97 EC	155
e126ba97 EC	156	out_bitmap:
2f5ff264	157	kfree(bfregi->bitmap);
e126ba97 EC	158
e126ba97 EC	159	out_bfs:
2f5ff264	160	kfree(bfregi->bfs);
e126ba97 EC	161
e126ba97 EC	162	out_uars:
2f5ff264	163	kfree(bfregi->uars);
e126ba97 EC	164	return err;
	165	}
	166
2f5ff264	167	int mlx5_free_bfregs(struct mlx5_core_dev dev, struct mlx5_bfreg_info bfregi)
e126ba97	168	{
2f5ff264	169	int i = bfregi->num_uars;
e126ba97 EC	170
e126ba97 EC	171	for (i--; i >= 0; i--) {
2f5ff264 EC	172	iounmap(bfregi->uars[i].map);
2f5ff264 EC	173	mlx5_cmd_free_uar(dev, bfregi->uars[i].index);
e126ba97 EC	174	}
e126ba97 EC	175
2f5ff264 EC	176	kfree(bfregi->count);
	177	kfree(bfregi->bitmap);
	178	kfree(bfregi->bfs);
	179	kfree(bfregi->uars);
e126ba97 EC	180
	181	return 0;
	182	}
e281682b	183
0ba42241 ML	184	int mlx5_alloc_map_uar(struct mlx5_core_dev mdev, struct mlx5_uar uar,
0ba42241 ML	185	bool map_wc)
e281682b SM	186	{
	187	phys_addr_t pfn;
	188	phys_addr_t uar_bar_start;
	189	int err;
	190
	191	err = mlx5_cmd_alloc_uar(mdev, &uar->index);
	192	if (err) {
	193	mlx5_core_warn(mdev, "mlx5_cmd_alloc_uar() failed, %d\n", err);
	194	return err;
	195	}
	196
	197	uar_bar_start = pci_resource_start(mdev->pdev, 0);
	198	pfn = (uar_bar_start >> PAGE_SHIFT) + uar->index;
e281682b	199
0ba42241 ML	200	if (map_wc) {
	201	uar->bf_map = ioremap_wc(pfn << PAGE_SHIFT, PAGE_SIZE);
	202	if (!uar->bf_map) {
	203	mlx5_core_warn(mdev, "ioremap_wc() failed\n");
	204	uar->map = ioremap(pfn << PAGE_SHIFT, PAGE_SIZE);
	205	if (!uar->map)
	206	goto err_free_uar;
	207	}
	208	} else {
	209	uar->map = ioremap(pfn << PAGE_SHIFT, PAGE_SIZE);
	210	if (!uar->map)
	211	goto err_free_uar;
	212	}
88a85f99	213
e281682b SM	214	return 0;
	215
	216	err_free_uar:
0ba42241 ML	217	mlx5_core_warn(mdev, "ioremap() failed\n");
0ba42241 ML	218	err = -ENOMEM;
e281682b SM	219	mlx5_cmd_free_uar(mdev, uar->index);
	220
	221	return err;
	222	}
	223	EXPORT_SYMBOL(mlx5_alloc_map_uar);
	224
	225	void mlx5_unmap_free_uar(struct mlx5_core_dev mdev, struct mlx5_uar uar)
	226	{
5f8a02a4 GP	227	if (uar->map)
	228	iounmap(uar->map);
	229	else
	230	iounmap(uar->bf_map);
e281682b SM	231	mlx5_cmd_free_uar(mdev, uar->index);
	232	}
	233	EXPORT_SYMBOL(mlx5_unmap_free_uar);
a6d51b68 EC	234
	235	static int uars_per_sys_page(struct mlx5_core_dev *mdev)
	236	{
	237	if (MLX5_CAP_GEN(mdev, uar_4k))
	238	return MLX5_CAP_GEN(mdev, num_of_uars_per_page);
	239
	240	return 1;
	241	}
	242
	243	static u64 uar2pfn(struct mlx5_core_dev *mdev, u32 index)
	244	{
	245	u32 system_page_index;
	246
	247	if (MLX5_CAP_GEN(mdev, uar_4k))
	248	system_page_index = index >> (PAGE_SHIFT - MLX5_ADAPTER_PAGE_SHIFT);
	249	else
	250	system_page_index = index;
	251
	252	return (pci_resource_start(mdev->pdev, 0) >> PAGE_SHIFT) + system_page_index;
	253	}
	254
	255	static void up_rel_func(struct kref *kref)
	256	{
	257	struct mlx5_uars_page *up = container_of(kref, struct mlx5_uars_page, ref_count);
	258
	259	list_del(&up->list);
	260	if (mlx5_cmd_free_uar(up->mdev, up->index))
	261	mlx5_core_warn(up->mdev, "failed to free uar index %d\n", up->index);
	262	kfree(up->reg_bitmap);
	263	kfree(up->fp_bitmap);
	264	kfree(up);
	265	}
	266
	267	static struct mlx5_uars_page alloc_uars_page(struct mlx5_core_dev mdev,
	268	bool map_wc)
	269	{
	270	struct mlx5_uars_page *up;
	271	int err = -ENOMEM;
	272	phys_addr_t pfn;
	273	int bfregs;
	274	int i;
	275
	276	bfregs = uars_per_sys_page(mdev) * MLX5_BFREGS_PER_UAR;
	277	up = kzalloc(sizeof(*up), GFP_KERNEL);
	278	if (!up)
	279	return ERR_PTR(err);
	280
	281	up->mdev = mdev;
	282	up->reg_bitmap = kcalloc(BITS_TO_LONGS(bfregs), sizeof(unsigned long), GFP_KERNEL);
	283	if (!up->reg_bitmap)
	284	goto error1;
	285
	286	up->fp_bitmap = kcalloc(BITS_TO_LONGS(bfregs), sizeof(unsigned long), GFP_KERNEL);
	287	if (!up->fp_bitmap)
	288	goto error1;
	289
	290	for (i = 0; i < bfregs; i++)
	291	if ((i % MLX5_BFREGS_PER_UAR) < MLX5_NON_FP_BFREGS_PER_UAR)
	292	set_bit(i, up->reg_bitmap);
	293	else
	294	set_bit(i, up->fp_bitmap);
	295
	296	up->bfregs = bfregs;
	297	up->fp_avail = bfregs * MLX5_FP_BFREGS_PER_UAR / MLX5_BFREGS_PER_UAR;
298	up->reg_avail = bfregs * MLX5_NON_FP_BFREGS_PER_UAR / MLX5_BFREGS_PER_UAR;
299
300	err = mlx5_cmd_alloc_uar(mdev, &up->index);
301	if (err) {
302	mlx5_core_warn(mdev, "mlx5_cmd_alloc_uar() failed, %d\n", err);
303	goto error1;
304	}
305
306	pfn = uar2pfn(mdev, up->index);
307	if (map_wc) {
308	up->map = ioremap_wc(pfn << PAGE_SHIFT, PAGE_SIZE);
309	if (!up->map) {
310	err = -EAGAIN;
311	goto error2;
312	}
313	} else {
314	up->map = ioremap(pfn << PAGE_SHIFT, PAGE_SIZE);
315	if (!up->map) {
316	err = -ENOMEM;
317	goto error2;
318	}
319	}
320	kref_init(&up->ref_count);
321	mlx5_core_dbg(mdev, "allocated UAR page: index %d, total bfregs %d\n",
322	up->index, up->bfregs);
323	return up;
324
325	error2:
326	if (mlx5_cmd_free_uar(mdev, up->index))
327	mlx5_core_warn(mdev, "failed to free uar index %d\n", up->index);
328	error1:
329	kfree(up->fp_bitmap);
330	kfree(up->reg_bitmap);
331	kfree(up);
332	return ERR_PTR(err);
333	}
334
335	static unsigned long map_offset(struct mlx5_core_dev *mdev, int dbi)
336	{
337	/* return the offset in bytes from the start of the page to the
338	* blue flame area of the UAR
339	*/
340	return dbi / MLX5_BFREGS_PER_UAR * MLX5_ADAPTER_PAGE_SIZE +
341	(dbi % MLX5_BFREGS_PER_UAR) *
342	(1 << MLX5_CAP_GEN(mdev, log_bf_reg_size)) + MLX5_BF_OFFSET;
343	}
344
345	static int alloc_bfreg(struct mlx5_core_dev mdev, struct mlx5_sq_bfreg bfreg,
346	bool map_wc, bool fast_path)
347	{
348	struct mlx5_bfreg_data *bfregs;
349	struct mlx5_uars_page *up;
350	struct list_head *head;
351	unsigned long *bitmap;
352	unsigned int *avail;
353	struct mutex lock; / pointer to right mutex */
354	int dbi;
355
356	bfregs = &mdev->priv.bfregs;
357	if (map_wc) {
358	head = &bfregs->wc_head.list;
359	lock = &bfregs->wc_head.lock;
360	} else {
361	head = &bfregs->reg_head.list;
362	lock = &bfregs->reg_head.lock;
363	}
364	mutex_lock(lock);
365	if (list_empty(head)) {
366	up = alloc_uars_page(mdev, map_wc);
367	if (IS_ERR(up)) {
368	mutex_unlock(lock);
369	return PTR_ERR(up);
370	}
371	list_add(&up->list, head);
372	} else {
373	up = list_entry(head->next, struct mlx5_uars_page, list);
374	kref_get(&up->ref_count);
375	}
376	if (fast_path) {
377	bitmap = up->fp_bitmap;
378	avail = &up->fp_avail;
379	} else {
380	bitmap = up->reg_bitmap;
381	avail = &up->reg_avail;
382	}
383	dbi = find_first_bit(bitmap, up->bfregs);
384	clear_bit(dbi, bitmap);
385	(*avail)--;
386	if (!(*avail))
387	list_del(&up->list);
388
389	bfreg->map = up->map + map_offset(mdev, dbi);
390	bfreg->up = up;
391	bfreg->wc = map_wc;
392	bfreg->index = up->index + dbi / MLX5_BFREGS_PER_UAR;
393	mutex_unlock(lock);
394
395	return 0;
396	}
397
398	int mlx5_alloc_bfreg(struct mlx5_core_dev mdev, struct mlx5_sq_bfreg bfreg,
399	bool map_wc, bool fast_path)
400	{
401	int err;
402
403	err = alloc_bfreg(mdev, bfreg, map_wc, fast_path);
404	if (!err)
405	return 0;
406
407	if (err == -EAGAIN && map_wc)
408	return alloc_bfreg(mdev, bfreg, false, fast_path);
409
410	return err;
411	}
412	EXPORT_SYMBOL(mlx5_alloc_bfreg);
413
414	static unsigned int addr_to_dbi_in_syspage(struct mlx5_core_dev *dev,
415	struct mlx5_uars_page *up,
416	struct mlx5_sq_bfreg *bfreg)
417	{
418	unsigned int uar_idx;
419	unsigned int bfreg_idx;
420	unsigned int bf_reg_size;
421
422	bf_reg_size = 1 << MLX5_CAP_GEN(dev, log_bf_reg_size);
423
424	uar_idx = (bfreg->map - up->map) >> MLX5_ADAPTER_PAGE_SHIFT;
425	bfreg_idx = (((uintptr_t)bfreg->map % MLX5_ADAPTER_PAGE_SIZE) - MLX5_BF_OFFSET) / bf_reg_size;
426
427	return uar_idx * MLX5_BFREGS_PER_UAR + bfreg_idx;
428	}
429
430	void mlx5_free_bfreg(struct mlx5_core_dev mdev, struct mlx5_sq_bfreg bfreg)
431	{
432	struct mlx5_bfreg_data *bfregs;
433	struct mlx5_uars_page *up;
434	struct mutex lock; / pointer to right mutex */
435	unsigned int dbi;
436	bool fp;
437	unsigned int *avail;
438	unsigned long *bitmap;
439	struct list_head *head;
440
441	bfregs = &mdev->priv.bfregs;
442	if (bfreg->wc) {
443	head = &bfregs->wc_head.list;
444	lock = &bfregs->wc_head.lock;
445	} else {
446	head = &bfregs->reg_head.list;
447	lock = &bfregs->reg_head.lock;
448	}
449	up = bfreg->up;
450	dbi = addr_to_dbi_in_syspage(mdev, up, bfreg);
451	fp = (dbi % MLX5_BFREGS_PER_UAR) >= MLX5_NON_FP_BFREGS_PER_UAR;
452	if (fp) {
453	avail = &up->fp_avail;
454	bitmap = up->fp_bitmap;
455	} else {
456	avail = &up->reg_avail;
457	bitmap = up->reg_bitmap;
458	}
459	mutex_lock(lock);
460	(*avail)++;
461	set_bit(dbi, bitmap);
462	if (*avail == 1)
463	list_add_tail(&up->list, head);
464
465	kref_put(&up->ref_count, up_rel_func);
466	mutex_unlock(lock);
467	}
468	EXPORT_SYMBOL(mlx5_free_bfreg);