[linux-2.6-block.git] / drivers / net / ethernet / mellanox / mlx5 / core / mlx5_core.h

/*
 * Copyright (c) 2013-2015, Mellanox Technologies, Ltd.  All rights reserved.
 *
 * This software is available to you under a choice of one of two
 * licenses.  You may choose to be licensed under the terms of the GNU
 * General Public License (GPL) Version 2, available from the file
 * COPYING in the main directory of this source tree, or the
 * OpenIB.org BSD license below:
 *
 *     Redistribution and use in source and binary forms, with or
 *     without modification, are permitted provided that the following
 *     conditions are met:
 *
 *      - Redistributions of source code must retain the above
 *        copyright notice, this list of conditions and the following
 *        disclaimer.
 *
 *      - Redistributions in binary form must reproduce the above
 *        copyright notice, this list of conditions and the following
 *        disclaimer in the documentation and/or other materials
 *        provided with the distribution.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 * SOFTWARE.
 */

#ifndef __MLX5_CORE_H__
#define __MLX5_CORE_H__

#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/if_link.h>

#define DRIVER_NAME "mlx5_core"
#define DRIVER_VERSION "3.0-1"
#define DRIVER_RELDATE  "January 2015"

#define MLX5_TOTAL_VPORTS(mdev) (1 + pci_sriov_get_totalvfs(mdev->pdev))

extern int mlx5_core_debug_mask;

#define mlx5_core_dbg(__dev, format, ...)				\
	dev_dbg(&(__dev)->pdev->dev, "%s:%s:%d:(pid %d): " format,	\
		 (__dev)->priv.name, __func__, __LINE__, current->pid,	\
		 ##__VA_ARGS__)

#define mlx5_core_dbg_mask(__dev, mask, format, ...)			\
do {									\
	if ((mask) & mlx5_core_debug_mask)				\
		mlx5_core_dbg(__dev, format, ##__VA_ARGS__);		\
} while (0)

#define mlx5_core_err(__dev, format, ...)				\
	dev_err(&(__dev)->pdev->dev, "%s:%s:%d:(pid %d): " format,	\
	       (__dev)->priv.name, __func__, __LINE__, current->pid,	\
	       ##__VA_ARGS__)

#define mlx5_core_warn(__dev, format, ...)				\
	dev_warn(&(__dev)->pdev->dev, "%s:%s:%d:(pid %d): " format,	\
		(__dev)->priv.name, __func__, __LINE__, current->pid,	\
		##__VA_ARGS__)

#define mlx5_core_info(__dev, format, ...)				\
	dev_info(&(__dev)->pdev->dev, format, ##__VA_ARGS__)

enum {
	MLX5_CMD_DATA, /* print command payload only */
	MLX5_CMD_TIME, /* print command execution time */
};

static inline int mlx5_cmd_exec_check_status(struct mlx5_core_dev *dev, u32 *in,
					     int in_size, u32 *out,
					     int out_size)
{
	int err;

	err = mlx5_cmd_exec(dev, in, in_size, out, out_size);
	if (err)
		return err;

	return mlx5_cmd_status_to_err((struct mlx5_outbox_hdr *)out);
}

int mlx5_query_hca_caps(struct mlx5_core_dev *dev);
int mlx5_query_board_id(struct mlx5_core_dev *dev);
int mlx5_cmd_init_hca(struct mlx5_core_dev *dev);
int mlx5_cmd_teardown_hca(struct mlx5_core_dev *dev);
void mlx5_core_event(struct mlx5_core_dev *dev, enum mlx5_dev_event event,
		     unsigned long param);
void mlx5_enter_error_state(struct mlx5_core_dev *dev);
void mlx5_disable_device(struct mlx5_core_dev *dev);
int mlx5_core_sriov_configure(struct pci_dev *dev, int num_vfs);
int mlx5_core_enable_hca(struct mlx5_core_dev *dev, u16 func_id);
int mlx5_core_disable_hca(struct mlx5_core_dev *dev, u16 func_id);
int mlx5_wait_for_vf_pages(struct mlx5_core_dev *dev);
cycle_t mlx5_read_internal_timer(struct mlx5_core_dev *dev);
u32 mlx5_get_msix_vec(struct mlx5_core_dev *dev, int vecidx);

void mlx5e_init(void);
void mlx5e_cleanup(void);

#endif /* __MLX5_CORE_H__ */
Commit	Line	Data
e126ba97	1	/*
f62b8bb8	2	* Copyright (c) 2013-2015, Mellanox Technologies, Ltd. All rights reserved.
e126ba97 EC	3	*
	4	* This software is available to you under a choice of one of two
	5	* licenses. You may choose to be licensed under the terms of the GNU
	6	* General Public License (GPL) Version 2, available from the file
	7	* COPYING in the main directory of this source tree, or the
	8	* OpenIB.org BSD license below:
	9	*
	10	* Redistribution and use in source and binary forms, with or
	11	* without modification, are permitted provided that the following
	12	* conditions are met:
	13	*
	14	* - Redistributions of source code must retain the above
	15	* copyright notice, this list of conditions and the following
	16	* disclaimer.
	17	*
	18	* - Redistributions in binary form must reproduce the above
	19	* copyright notice, this list of conditions and the following
	20	* disclaimer in the documentation and/or other materials
	21	* provided with the distribution.
	22	*
	23	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
	24	* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
	25	* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
	26	* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
	27	* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
	28	* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
	29	* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
	30	* SOFTWARE.
	31	*/
	32
	33	#ifndef __MLX5_CORE_H__
	34	#define __MLX5_CORE_H__
	35
	36	#include <linux/types.h>
	37	#include <linux/kernel.h>
	38	#include <linux/sched.h>
81848731	39	#include <linux/if_link.h>
e126ba97	40
f62b8bb8 AV	41	#define DRIVER_NAME "mlx5_core"
	42	#define DRIVER_VERSION "3.0-1"
	43	#define DRIVER_RELDATE "January 2015"
	44
efdc810b MHY	45	#define MLX5_TOTAL_VPORTS(mdev) (1 + pci_sriov_get_totalvfs(mdev->pdev))
efdc810b MHY	46
e126ba97 EC	47	extern int mlx5_core_debug_mask;
e126ba97 EC	48
5a788398 EC	49	#define mlx5_core_dbg(__dev, format, ...) \
	50	dev_dbg(&(__dev)->pdev->dev, "%s:%s:%d:(pid %d): " format, \
	51	(__dev)->priv.name, __func__, __LINE__, current->pid, \
1a91de28	52	##__VA_ARGS__)
e126ba97	53
5a788398	54	#define mlx5_core_dbg_mask(__dev, mask, format, ...) \
1a91de28 JP	55	do { \
1a91de28 JP	56	if ((mask) & mlx5_core_debug_mask) \
5a788398	57	mlx5_core_dbg(__dev, format, ##__VA_ARGS__); \
e126ba97 EC	58	} while (0)
e126ba97 EC	59
5a788398 EC	60	#define mlx5_core_err(__dev, format, ...) \
	61	dev_err(&(__dev)->pdev->dev, "%s:%s:%d:(pid %d): " format, \
	62	(__dev)->priv.name, __func__, __LINE__, current->pid, \
1a91de28	63	##__VA_ARGS__)
e126ba97	64
5a788398 EC	65	#define mlx5_core_warn(__dev, format, ...) \
	66	dev_warn(&(__dev)->pdev->dev, "%s:%s:%d:(pid %d): " format, \
	67	(__dev)->priv.name, __func__, __LINE__, current->pid, \
1a91de28	68	##__VA_ARGS__)
e126ba97	69
108805fc SM	70	#define mlx5_core_info(__dev, format, ...) \
	71	dev_info(&(__dev)->pdev->dev, format, ##__VA_ARGS__)
	72
e126ba97 EC	73	enum {
	74	MLX5_CMD_DATA, /* print command payload only */
	75	MLX5_CMD_TIME, /* print command execution time */
	76	};
	77
938fe83c SM	78	static inline int mlx5_cmd_exec_check_status(struct mlx5_core_dev dev, u32 in,
	79	int in_size, u32 *out,
	80	int out_size)
	81	{
c928ed55 HA	82	int err;
	83
	84	err = mlx5_cmd_exec(dev, in, in_size, out, out_size);
	85	if (err)
	86	return err;
	87
938fe83c SM	88	return mlx5_cmd_status_to_err((struct mlx5_outbox_hdr *)out);
938fe83c SM	89	}
e126ba97	90
938fe83c	91	int mlx5_query_hca_caps(struct mlx5_core_dev *dev);
211e6c80	92	int mlx5_query_board_id(struct mlx5_core_dev *dev);
e126ba97 EC	93	int mlx5_cmd_init_hca(struct mlx5_core_dev *dev);
e126ba97 EC	94	int mlx5_cmd_teardown_hca(struct mlx5_core_dev *dev);
89d44f0a MD	95	void mlx5_core_event(struct mlx5_core_dev *dev, enum mlx5_dev_event event,
	96	unsigned long param);
	97	void mlx5_enter_error_state(struct mlx5_core_dev *dev);
	98	void mlx5_disable_device(struct mlx5_core_dev *dev);
fc50db98	99	int mlx5_core_sriov_configure(struct pci_dev *dev, int num_vfs);
0b107106 EC	100	int mlx5_core_enable_hca(struct mlx5_core_dev *dev, u16 func_id);
0b107106 EC	101	int mlx5_core_disable_hca(struct mlx5_core_dev *dev, u16 func_id);
fc50db98	102	int mlx5_wait_for_vf_pages(struct mlx5_core_dev *dev);
b0844444	103	cycle_t mlx5_read_internal_timer(struct mlx5_core_dev *dev);
daa21560	104	u32 mlx5_get_msix_vec(struct mlx5_core_dev *dev, int vecidx);
e126ba97	105
f62b8bb8 AV	106	void mlx5e_init(void);
	107	void mlx5e_cleanup(void);
	108
e126ba97	109	#endif /* __MLX5_CORE_H__ */