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e586b3b0 | 1 | /* |
98795158 | 2 | * Copyright (c) 2015-2016, Mellanox Technologies. All rights reserved. |
e586b3b0 AV |
3 | * |
4 | * This software is available to you under a choice of one of two | |
5 | * licenses. You may choose to be licensed under the terms of the GNU | |
6 | * General Public License (GPL) Version 2, available from the file | |
7 | * COPYING in the main directory of this source tree, or the | |
8 | * OpenIB.org BSD license below: | |
9 | * | |
10 | * Redistribution and use in source and binary forms, with or | |
11 | * without modification, are permitted provided that the following | |
12 | * conditions are met: | |
13 | * | |
14 | * - Redistributions of source code must retain the above | |
15 | * copyright notice, this list of conditions and the following | |
16 | * disclaimer. | |
17 | * | |
18 | * - Redistributions in binary form must reproduce the above | |
19 | * copyright notice, this list of conditions and the following | |
20 | * disclaimer in the documentation and/or other materials | |
21 | * provided with the distribution. | |
22 | * | |
23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
25 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
26 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | |
27 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | |
28 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | |
29 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | |
30 | * SOFTWARE. | |
31 | */ | |
32 | ||
33 | #include <linux/tcp.h> | |
34 | #include <linux/if_vlan.h> | |
e3cfc7e6 | 35 | #include <net/geneve.h> |
fbcb127e | 36 | #include <net/dsfield.h> |
e586b3b0 | 37 | #include "en.h" |
542578c6 | 38 | #include "en/txrx.h" |
4301ba7b | 39 | #include "ipoib/ipoib.h" |
bf239741 | 40 | #include "en_accel/en_accel.h" |
428ffea0 | 41 | #include "en_accel/ipsec_rxtx.h" |
9515978e | 42 | #include "en_accel/macsec.h" |
145e5637 | 43 | #include "en/ptp.h" |
de78960e | 44 | #include <net/ipv6.h> |
e586b3b0 | 45 | |
31391048 | 46 | static void mlx5e_dma_unmap_wqe_err(struct mlx5e_txqsq *sq, u8 num_dma) |
e586b3b0 | 47 | { |
d4e28cbd AS |
48 | int i; |
49 | ||
34802a42 | 50 | for (i = 0; i < num_dma; i++) { |
d4e28cbd AS |
51 | struct mlx5e_sq_dma *last_pushed_dma = |
52 | mlx5e_dma_get(sq, --sq->dma_fifo_pc); | |
53 | ||
54 | mlx5e_tx_dma_unmap(sq->pdev, last_pushed_dma); | |
55 | } | |
e586b3b0 AV |
56 | } |
57 | ||
ae76715d HHZ |
58 | static inline int mlx5e_skb_l2_header_offset(struct sk_buff *skb) |
59 | { | |
60 | #define MLX5E_MIN_INLINE (ETH_HLEN + VLAN_HLEN) | |
61 | ||
62 | return max(skb_network_offset(skb), MLX5E_MIN_INLINE); | |
63 | } | |
64 | ||
65 | static inline int mlx5e_skb_l3_header_offset(struct sk_buff *skb) | |
66 | { | |
ae76715d HHZ |
67 | if (skb_transport_header_was_set(skb)) |
68 | return skb_transport_offset(skb); | |
ae76715d HHZ |
69 | else |
70 | return mlx5e_skb_l2_header_offset(skb); | |
71 | } | |
72 | ||
6aace17e MS |
73 | static inline u16 mlx5e_calc_min_inline(enum mlx5_inline_modes mode, |
74 | struct sk_buff *skb) | |
ae76715d | 75 | { |
6aace17e | 76 | u16 hlen; |
ae76715d HHZ |
77 | |
78 | switch (mode) { | |
a6f402e4 SM |
79 | case MLX5_INLINE_MODE_NONE: |
80 | return 0; | |
ae76715d | 81 | case MLX5_INLINE_MODE_TCP_UDP: |
c43f1255 | 82 | hlen = eth_get_headlen(skb->dev, skb->data, skb_headlen(skb)); |
ae76715d HHZ |
83 | if (hlen == ETH_HLEN && !skb_vlan_tag_present(skb)) |
84 | hlen += VLAN_HLEN; | |
6aace17e | 85 | break; |
ae76715d | 86 | case MLX5_INLINE_MODE_IP: |
3517dfe6 MM |
87 | hlen = mlx5e_skb_l3_header_offset(skb); |
88 | break; | |
ae76715d HHZ |
89 | case MLX5_INLINE_MODE_L2: |
90 | default: | |
6aace17e | 91 | hlen = mlx5e_skb_l2_header_offset(skb); |
ae76715d | 92 | } |
f600c608 | 93 | return min_t(u16, hlen, skb_headlen(skb)); |
ae76715d HHZ |
94 | } |
95 | ||
de78960e ED |
96 | #define MLX5_UNSAFE_MEMCPY_DISCLAIMER \ |
97 | "This copy has been bounds-checked earlier in " \ | |
98 | "mlx5i_sq_calc_wqe_attr() and intentionally " \ | |
99 | "crosses a flex array boundary. Since it is " \ | |
100 | "performance sensitive, splitting the copy is " \ | |
101 | "undesirable." | |
102 | ||
5e7d77a9 | 103 | static inline void mlx5e_insert_vlan(void *start, struct sk_buff *skb, u16 ihs) |
e4cf27bd AS |
104 | { |
105 | struct vlan_ethhdr *vhdr = (struct vlan_ethhdr *)start; | |
106 | int cpy1_sz = 2 * ETH_ALEN; | |
3ea4891d | 107 | int cpy2_sz = ihs - cpy1_sz; |
e4cf27bd | 108 | |
6d5c900e | 109 | memcpy(&vhdr->addrs, skb->data, cpy1_sz); |
e4cf27bd AS |
110 | vhdr->h_vlan_proto = skb->vlan_proto; |
111 | vhdr->h_vlan_TCI = cpu_to_be16(skb_vlan_tag_get(skb)); | |
de78960e ED |
112 | unsafe_memcpy(&vhdr->h_vlan_encapsulated_proto, |
113 | skb->data + cpy1_sz, | |
114 | cpy2_sz, | |
115 | MLX5_UNSAFE_MEMCPY_DISCLAIMER); | |
e4cf27bd AS |
116 | } |
117 | ||
77bdf895 | 118 | static inline void |
b336e6b2 TT |
119 | mlx5e_txwqe_build_eseg_csum(struct mlx5e_txqsq *sq, struct sk_buff *skb, |
120 | struct mlx5e_accel_tx_state *accel, | |
121 | struct mlx5_wqe_eth_seg *eseg) | |
e586b3b0 | 122 | { |
428ffea0 | 123 | if (unlikely(mlx5e_ipsec_txwqe_build_eseg_csum(sq, skb, eseg))) |
1d000323 | 124 | return; |
1d000323 | 125 | |
98795158 MF |
126 | if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) { |
127 | eseg->cs_flags = MLX5_ETH_WQE_L3_CSUM; | |
89db09eb | 128 | if (skb->encapsulation) { |
98795158 MF |
129 | eseg->cs_flags |= MLX5_ETH_WQE_L3_INNER_CSUM | |
130 | MLX5_ETH_WQE_L4_INNER_CSUM; | |
05909bab | 131 | sq->stats->csum_partial_inner++; |
89db09eb | 132 | } else { |
98795158 | 133 | eseg->cs_flags |= MLX5_ETH_WQE_L4_CSUM; |
05909bab | 134 | sq->stats->csum_partial++; |
89db09eb | 135 | } |
b336e6b2 TT |
136 | #ifdef CONFIG_MLX5_EN_TLS |
137 | } else if (unlikely(accel && accel->tls.tls_tisn)) { | |
138 | eseg->cs_flags = MLX5_ETH_WQE_L3_CSUM | MLX5_ETH_WQE_L4_CSUM; | |
139 | sq->stats->csum_partial++; | |
140 | #endif | |
98795158 | 141 | } else |
05909bab | 142 | sq->stats->csum_none++; |
77bdf895 | 143 | } |
e586b3b0 | 144 | |
de78960e ED |
145 | /* Returns the number of header bytes that we plan |
146 | * to inline later in the transmit descriptor | |
147 | */ | |
77bdf895 | 148 | static inline u16 |
de78960e | 149 | mlx5e_tx_get_gso_ihs(struct mlx5e_txqsq *sq, struct sk_buff *skb, int *hopbyhop) |
77bdf895 | 150 | { |
05909bab | 151 | struct mlx5e_sq_stats *stats = sq->stats; |
77bdf895 | 152 | u16 ihs; |
98795158 | 153 | |
de78960e | 154 | *hopbyhop = 0; |
77bdf895 | 155 | if (skb->encapsulation) { |
ec082d31 | 156 | ihs = skb_inner_tcp_all_headers(skb); |
05909bab EBE |
157 | stats->tso_inner_packets++; |
158 | stats->tso_inner_bytes += skb->len - ihs; | |
e586b3b0 | 159 | } else { |
de78960e | 160 | if (skb_shinfo(skb)->gso_type & SKB_GSO_UDP_L4) { |
689adf0d | 161 | ihs = skb_transport_offset(skb) + sizeof(struct udphdr); |
de78960e | 162 | } else { |
504148fe | 163 | ihs = skb_tcp_all_headers(skb); |
de78960e ED |
164 | if (ipv6_has_hopopt_jumbo(skb)) { |
165 | *hopbyhop = sizeof(struct hop_jumbo_hdr); | |
166 | ihs -= sizeof(struct hop_jumbo_hdr); | |
167 | } | |
168 | } | |
05909bab | 169 | stats->tso_packets++; |
de78960e | 170 | stats->tso_bytes += skb->len - ihs - *hopbyhop; |
e586b3b0 AV |
171 | } |
172 | ||
77bdf895 SM |
173 | return ihs; |
174 | } | |
e586b3b0 | 175 | |
77bdf895 SM |
176 | static inline int |
177 | mlx5e_txwqe_build_dsegs(struct mlx5e_txqsq *sq, struct sk_buff *skb, | |
178 | unsigned char *skb_data, u16 headlen, | |
179 | struct mlx5_wqe_data_seg *dseg) | |
180 | { | |
181 | dma_addr_t dma_addr = 0; | |
182 | u8 num_dma = 0; | |
183 | int i; | |
e586b3b0 | 184 | |
e586b3b0 | 185 | if (headlen) { |
34802a42 | 186 | dma_addr = dma_map_single(sq->pdev, skb_data, headlen, |
e586b3b0 AV |
187 | DMA_TO_DEVICE); |
188 | if (unlikely(dma_mapping_error(sq->pdev, dma_addr))) | |
d9a96ec3 | 189 | goto dma_unmap_wqe_err; |
e586b3b0 AV |
190 | |
191 | dseg->addr = cpu_to_be64(dma_addr); | |
192 | dseg->lkey = sq->mkey_be; | |
193 | dseg->byte_count = cpu_to_be32(headlen); | |
194 | ||
d4e28cbd | 195 | mlx5e_dma_push(sq, dma_addr, headlen, MLX5E_DMA_MAP_SINGLE); |
77bdf895 | 196 | num_dma++; |
e586b3b0 AV |
197 | dseg++; |
198 | } | |
199 | ||
200 | for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { | |
d7840976 | 201 | skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; |
e586b3b0 AV |
202 | int fsz = skb_frag_size(frag); |
203 | ||
204 | dma_addr = skb_frag_dma_map(sq->pdev, frag, 0, fsz, | |
e53eef63 | 205 | DMA_TO_DEVICE); |
e586b3b0 | 206 | if (unlikely(dma_mapping_error(sq->pdev, dma_addr))) |
d9a96ec3 | 207 | goto dma_unmap_wqe_err; |
e586b3b0 AV |
208 | |
209 | dseg->addr = cpu_to_be64(dma_addr); | |
210 | dseg->lkey = sq->mkey_be; | |
211 | dseg->byte_count = cpu_to_be32(fsz); | |
212 | ||
d4e28cbd | 213 | mlx5e_dma_push(sq, dma_addr, fsz, MLX5E_DMA_MAP_PAGE); |
77bdf895 | 214 | num_dma++; |
e586b3b0 AV |
215 | dseg++; |
216 | } | |
217 | ||
77bdf895 | 218 | return num_dma; |
d9a96ec3 TT |
219 | |
220 | dma_unmap_wqe_err: | |
221 | mlx5e_dma_unmap_wqe_err(sq, num_dma); | |
222 | return -ENOMEM; | |
77bdf895 | 223 | } |
e586b3b0 | 224 | |
8e4b53f6 MM |
225 | struct mlx5e_tx_attr { |
226 | u32 num_bytes; | |
227 | u16 headlen; | |
228 | u16 ihs; | |
229 | __be16 mss; | |
5be01904 | 230 | u16 insz; |
8e4b53f6 | 231 | u8 opcode; |
de78960e | 232 | u8 hopbyhop; |
8e4b53f6 MM |
233 | }; |
234 | ||
235 | struct mlx5e_tx_wqe_attr { | |
236 | u16 ds_cnt; | |
237 | u16 ds_cnt_inl; | |
5be01904 | 238 | u16 ds_cnt_ids; |
8e4b53f6 MM |
239 | u8 num_wqebbs; |
240 | }; | |
d02dfcd5 MM |
241 | |
242 | static u8 | |
8e4b53f6 MM |
243 | mlx5e_tx_wqe_inline_mode(struct mlx5e_txqsq *sq, struct sk_buff *skb, |
244 | struct mlx5e_accel_tx_state *accel) | |
d02dfcd5 MM |
245 | { |
246 | u8 mode; | |
247 | ||
8e4b53f6 MM |
248 | #ifdef CONFIG_MLX5_EN_TLS |
249 | if (accel && accel->tls.tls_tisn) | |
d02dfcd5 | 250 | return MLX5_INLINE_MODE_TCP_UDP; |
8e4b53f6 | 251 | #endif |
d02dfcd5 MM |
252 | |
253 | mode = sq->min_inline_mode; | |
254 | ||
255 | if (skb_vlan_tag_present(skb) && | |
256 | test_bit(MLX5E_SQ_STATE_VLAN_NEED_L2_INLINE, &sq->state)) | |
257 | mode = max_t(u8, MLX5_INLINE_MODE_L2, mode); | |
258 | ||
259 | return mode; | |
260 | } | |
261 | ||
8e4b53f6 MM |
262 | static void mlx5e_sq_xmit_prepare(struct mlx5e_txqsq *sq, struct sk_buff *skb, |
263 | struct mlx5e_accel_tx_state *accel, | |
264 | struct mlx5e_tx_attr *attr) | |
265 | { | |
266 | struct mlx5e_sq_stats *stats = sq->stats; | |
267 | ||
268 | if (skb_is_gso(skb)) { | |
de78960e ED |
269 | int hopbyhop; |
270 | u16 ihs = mlx5e_tx_get_gso_ihs(sq, skb, &hopbyhop); | |
8e4b53f6 MM |
271 | |
272 | *attr = (struct mlx5e_tx_attr) { | |
273 | .opcode = MLX5_OPCODE_LSO, | |
274 | .mss = cpu_to_be16(skb_shinfo(skb)->gso_size), | |
275 | .ihs = ihs, | |
276 | .num_bytes = skb->len + (skb_shinfo(skb)->gso_segs - 1) * ihs, | |
de78960e ED |
277 | .headlen = skb_headlen(skb) - ihs - hopbyhop, |
278 | .hopbyhop = hopbyhop, | |
8e4b53f6 MM |
279 | }; |
280 | ||
281 | stats->packets += skb_shinfo(skb)->gso_segs; | |
282 | } else { | |
283 | u8 mode = mlx5e_tx_wqe_inline_mode(sq, skb, accel); | |
284 | u16 ihs = mlx5e_calc_min_inline(mode, skb); | |
285 | ||
286 | *attr = (struct mlx5e_tx_attr) { | |
287 | .opcode = MLX5_OPCODE_SEND, | |
288 | .mss = cpu_to_be16(0), | |
289 | .ihs = ihs, | |
290 | .num_bytes = max_t(unsigned int, skb->len, ETH_ZLEN), | |
291 | .headlen = skb_headlen(skb) - ihs, | |
292 | }; | |
293 | ||
294 | stats->packets++; | |
295 | } | |
296 | ||
5be01904 | 297 | attr->insz = mlx5e_accel_tx_ids_len(sq, accel); |
8e4b53f6 MM |
298 | stats->bytes += attr->num_bytes; |
299 | } | |
300 | ||
301 | static void mlx5e_sq_calc_wqe_attr(struct sk_buff *skb, const struct mlx5e_tx_attr *attr, | |
302 | struct mlx5e_tx_wqe_attr *wqe_attr) | |
303 | { | |
97e3afd6 | 304 | u16 ds_cnt = MLX5E_TX_WQE_EMPTY_DS_COUNT; |
8e4b53f6 | 305 | u16 ds_cnt_inl = 0; |
5be01904 | 306 | u16 ds_cnt_ids = 0; |
8e4b53f6 | 307 | |
f9c955b4 MM |
308 | /* Sync the calculation with MLX5E_MAX_TX_WQEBBS. */ |
309 | ||
5be01904 RS |
310 | if (attr->insz) |
311 | ds_cnt_ids = DIV_ROUND_UP(sizeof(struct mlx5_wqe_inline_seg) + attr->insz, | |
312 | MLX5_SEND_WQE_DS); | |
8e4b53f6 | 313 | |
5be01904 | 314 | ds_cnt += !!attr->headlen + skb_shinfo(skb)->nr_frags + ds_cnt_ids; |
8e4b53f6 MM |
315 | if (attr->ihs) { |
316 | u16 inl = attr->ihs - INL_HDR_START_SZ; | |
317 | ||
318 | if (skb_vlan_tag_present(skb)) | |
319 | inl += VLAN_HLEN; | |
320 | ||
321 | ds_cnt_inl = DIV_ROUND_UP(inl, MLX5_SEND_WQE_DS); | |
f9c955b4 MM |
322 | if (WARN_ON_ONCE(ds_cnt_inl > MLX5E_MAX_TX_INLINE_DS)) |
323 | netdev_warn(skb->dev, "ds_cnt_inl = %u > max %u\n", ds_cnt_inl, | |
324 | (u16)MLX5E_MAX_TX_INLINE_DS); | |
8e4b53f6 MM |
325 | ds_cnt += ds_cnt_inl; |
326 | } | |
327 | ||
328 | *wqe_attr = (struct mlx5e_tx_wqe_attr) { | |
329 | .ds_cnt = ds_cnt, | |
330 | .ds_cnt_inl = ds_cnt_inl, | |
5be01904 | 331 | .ds_cnt_ids = ds_cnt_ids, |
8e4b53f6 MM |
332 | .num_wqebbs = DIV_ROUND_UP(ds_cnt, MLX5_SEND_WQEBB_NUM_DS), |
333 | }; | |
334 | } | |
335 | ||
67044a88 MM |
336 | static void mlx5e_tx_skb_update_hwts_flags(struct sk_buff *skb) |
337 | { | |
338 | if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) | |
339 | skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; | |
340 | } | |
341 | ||
342 | static void mlx5e_tx_check_stop(struct mlx5e_txqsq *sq) | |
343 | { | |
344 | if (unlikely(!mlx5e_wqc_has_room_for(&sq->wq, sq->cc, sq->pc, sq->stop_room))) { | |
345 | netif_tx_stop_queue(sq->txq); | |
346 | sq->stats->stopped++; | |
347 | } | |
348 | } | |
349 | ||
5b759bf2 MM |
350 | static void mlx5e_tx_flush(struct mlx5e_txqsq *sq) |
351 | { | |
352 | struct mlx5e_tx_wqe_info *wi; | |
353 | struct mlx5e_tx_wqe *wqe; | |
354 | u16 pi; | |
355 | ||
356 | /* Must not be called when a MPWQE session is active but empty. */ | |
357 | mlx5e_tx_mpwqe_ensure_complete(sq); | |
358 | ||
359 | pi = mlx5_wq_cyc_ctr2ix(&sq->wq, sq->pc); | |
360 | wi = &sq->db.wqe_info[pi]; | |
361 | ||
362 | *wi = (struct mlx5e_tx_wqe_info) { | |
363 | .num_wqebbs = 1, | |
364 | }; | |
365 | ||
366 | wqe = mlx5e_post_nop(&sq->wq, sq->sqn, &sq->pc); | |
367 | mlx5e_notify_hw(&sq->wq, sq->pc, sq->uar_map, &wqe->ctrl); | |
368 | } | |
369 | ||
77bdf895 SM |
370 | static inline void |
371 | mlx5e_txwqe_complete(struct mlx5e_txqsq *sq, struct sk_buff *skb, | |
8e4b53f6 MM |
372 | const struct mlx5e_tx_attr *attr, |
373 | const struct mlx5e_tx_wqe_attr *wqe_attr, u8 num_dma, | |
3c31ff22 | 374 | struct mlx5e_tx_wqe_info *wi, struct mlx5_wqe_ctrl_seg *cseg, |
3178308a | 375 | struct mlx5_wqe_eth_seg *eseg, bool xmit_more) |
77bdf895 SM |
376 | { |
377 | struct mlx5_wq_cyc *wq = &sq->wq; | |
ca6c7df0 | 378 | bool send_doorbell; |
e586b3b0 | 379 | |
8ba6f183 MM |
380 | *wi = (struct mlx5e_tx_wqe_info) { |
381 | .skb = skb, | |
8e4b53f6 | 382 | .num_bytes = attr->num_bytes, |
8ba6f183 | 383 | .num_dma = num_dma, |
8e4b53f6 | 384 | .num_wqebbs = wqe_attr->num_wqebbs, |
338c46c6 | 385 | .num_fifo_pkts = 0, |
8ba6f183 | 386 | }; |
e586b3b0 | 387 | |
8e4b53f6 MM |
388 | cseg->opmod_idx_opcode = cpu_to_be32((sq->pc << 8) | attr->opcode); |
389 | cseg->qpn_ds = cpu_to_be32((sq->sqn << 8) | wqe_attr->ds_cnt); | |
77bdf895 | 390 | |
67044a88 | 391 | mlx5e_tx_skb_update_hwts_flags(skb); |
ef9814de | 392 | |
77bdf895 | 393 | sq->pc += wi->num_wqebbs; |
67044a88 MM |
394 | |
395 | mlx5e_tx_check_stop(sq); | |
e586b3b0 | 396 | |
3178308a RR |
397 | if (unlikely(sq->ptpsq && |
398 | (skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP))) { | |
399 | u8 metadata_index = be32_to_cpu(eseg->flow_table_metadata); | |
400 | ||
1880bc4e | 401 | mlx5e_skb_cb_hwtstamp_init(skb); |
3178308a RR |
402 | mlx5e_ptp_metadata_map_put(&sq->ptpsq->metadata_map, skb, |
403 | metadata_index); | |
b7cf0758 RR |
404 | /* ensure skb is put on metadata_map before tracking the index */ |
405 | wmb(); | |
7e3f3ba9 | 406 | mlx5e_ptpsq_track_metadata(sq->ptpsq, metadata_index); |
19b43a43 | 407 | if (!netif_tx_queue_stopped(sq->txq) && |
3178308a | 408 | mlx5e_ptpsq_metadata_freelist_empty(sq->ptpsq)) { |
19b43a43 AL |
409 | netif_tx_stop_queue(sq->txq); |
410 | sq->stats->stopped++; | |
411 | } | |
1880bc4e EBE |
412 | skb_get(skb); |
413 | } | |
414 | ||
8e4b53f6 | 415 | send_doorbell = __netdev_tx_sent_queue(sq->txq, attr->num_bytes, xmit_more); |
ca6c7df0 | 416 | if (send_doorbell) |
864b2d71 | 417 | mlx5e_notify_hw(wq, sq->pc, sq->uar_map, cseg); |
77bdf895 SM |
418 | } |
419 | ||
8e4b53f6 MM |
420 | static void |
421 | mlx5e_sq_xmit_wqe(struct mlx5e_txqsq *sq, struct sk_buff *skb, | |
422 | const struct mlx5e_tx_attr *attr, const struct mlx5e_tx_wqe_attr *wqe_attr, | |
423 | struct mlx5e_tx_wqe *wqe, u16 pi, bool xmit_more) | |
77bdf895 | 424 | { |
043dc78e TT |
425 | struct mlx5_wqe_ctrl_seg *cseg; |
426 | struct mlx5_wqe_eth_seg *eseg; | |
427 | struct mlx5_wqe_data_seg *dseg; | |
428 | struct mlx5e_tx_wqe_info *wi; | |
de78960e ED |
429 | u16 ihs = attr->ihs; |
430 | struct ipv6hdr *h6; | |
05909bab | 431 | struct mlx5e_sq_stats *stats = sq->stats; |
77bdf895 | 432 | int num_dma; |
043dc78e | 433 | |
299a1195 | 434 | stats->xmit_more += xmit_more; |
77bdf895 | 435 | |
043dc78e TT |
436 | /* fill wqe */ |
437 | wi = &sq->db.wqe_info[pi]; | |
438 | cseg = &wqe->ctrl; | |
439 | eseg = &wqe->eth; | |
440 | dseg = wqe->data; | |
441 | ||
8e4b53f6 | 442 | eseg->mss = attr->mss; |
043dc78e | 443 | |
de78960e ED |
444 | if (ihs) { |
445 | u8 *start = eseg->inline_hdr.start; | |
446 | ||
447 | if (unlikely(attr->hopbyhop)) { | |
448 | /* remove the HBH header. | |
449 | * Layout: [Ethernet header][IPv6 header][HBH][TCP header] | |
450 | */ | |
451 | if (skb_vlan_tag_present(skb)) { | |
452 | mlx5e_insert_vlan(start, skb, ETH_HLEN + sizeof(*h6)); | |
453 | ihs += VLAN_HLEN; | |
454 | h6 = (struct ipv6hdr *)(start + sizeof(struct vlan_ethhdr)); | |
455 | } else { | |
456 | unsafe_memcpy(start, skb->data, | |
457 | ETH_HLEN + sizeof(*h6), | |
458 | MLX5_UNSAFE_MEMCPY_DISCLAIMER); | |
459 | h6 = (struct ipv6hdr *)(start + ETH_HLEN); | |
460 | } | |
461 | h6->nexthdr = IPPROTO_TCP; | |
462 | /* Copy the TCP header after the IPv6 one */ | |
463 | memcpy(h6 + 1, | |
464 | skb->data + ETH_HLEN + sizeof(*h6) + | |
465 | sizeof(struct hop_jumbo_hdr), | |
466 | tcp_hdrlen(skb)); | |
467 | /* Leave ipv6 payload_len set to 0, as LSO v2 specs request. */ | |
468 | } else if (skb_vlan_tag_present(skb)) { | |
469 | mlx5e_insert_vlan(start, skb, ihs); | |
470 | ihs += VLAN_HLEN; | |
05909bab | 471 | stats->added_vlan_packets++; |
77bdf895 | 472 | } else { |
de78960e ED |
473 | unsafe_memcpy(eseg->inline_hdr.start, skb->data, |
474 | attr->ihs, | |
475 | MLX5_UNSAFE_MEMCPY_DISCLAIMER); | |
77bdf895 | 476 | } |
de78960e | 477 | eseg->inline_hdr.sz |= cpu_to_be16(ihs); |
8e4b53f6 | 478 | dseg += wqe_attr->ds_cnt_inl; |
77bdf895 SM |
479 | } else if (skb_vlan_tag_present(skb)) { |
480 | eseg->insert.type = cpu_to_be16(MLX5_ETH_WQE_INSERT_VLAN); | |
4382c7b9 GP |
481 | if (skb->vlan_proto == cpu_to_be16(ETH_P_8021AD)) |
482 | eseg->insert.type |= cpu_to_be16(MLX5_ETH_WQE_SVLAN); | |
77bdf895 | 483 | eseg->insert.vlan_tci = cpu_to_be16(skb_vlan_tag_get(skb)); |
05909bab | 484 | stats->added_vlan_packets++; |
77bdf895 SM |
485 | } |
486 | ||
5be01904 | 487 | dseg += wqe_attr->ds_cnt_ids; |
de78960e | 488 | num_dma = mlx5e_txwqe_build_dsegs(sq, skb, skb->data + attr->ihs + attr->hopbyhop, |
8e4b53f6 | 489 | attr->headlen, dseg); |
77bdf895 | 490 | if (unlikely(num_dma < 0)) |
d9a96ec3 | 491 | goto err_drop; |
77bdf895 | 492 | |
3178308a | 493 | mlx5e_txwqe_complete(sq, skb, attr, wqe_attr, num_dma, wi, cseg, eseg, xmit_more); |
12be4b21 | 494 | |
3df711db | 495 | return; |
e586b3b0 | 496 | |
d9a96ec3 | 497 | err_drop: |
05909bab | 498 | stats->dropped++; |
3178308a RR |
499 | if (unlikely(sq->ptpsq && (skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP))) |
500 | mlx5e_ptp_metadata_fifo_push(&sq->ptpsq->metadata_freelist, | |
501 | be32_to_cpu(eseg->flow_table_metadata)); | |
64f14d16 | 502 | dev_kfree_skb_any(skb); |
5b759bf2 | 503 | mlx5e_tx_flush(sq); |
e586b3b0 AV |
504 | } |
505 | ||
5af75c74 MM |
506 | static bool mlx5e_tx_skb_supports_mpwqe(struct sk_buff *skb, struct mlx5e_tx_attr *attr) |
507 | { | |
5be01904 | 508 | return !skb_is_nonlinear(skb) && !skb_vlan_tag_present(skb) && !attr->ihs && |
9515978e | 509 | !attr->insz && !mlx5e_macsec_skb_is_offload(skb); |
5af75c74 MM |
510 | } |
511 | ||
512 | static bool mlx5e_tx_mpwqe_same_eseg(struct mlx5e_txqsq *sq, struct mlx5_wqe_eth_seg *eseg) | |
513 | { | |
514 | struct mlx5e_tx_mpwqe *session = &sq->mpwqe; | |
515 | ||
516 | /* Assumes the session is already running and has at least one packet. */ | |
517 | return !memcmp(&session->wqe->eth, eseg, MLX5E_ACCEL_ESEG_LEN); | |
518 | } | |
519 | ||
520 | static void mlx5e_tx_mpwqe_session_start(struct mlx5e_txqsq *sq, | |
521 | struct mlx5_wqe_eth_seg *eseg) | |
522 | { | |
523 | struct mlx5e_tx_mpwqe *session = &sq->mpwqe; | |
524 | struct mlx5e_tx_wqe *wqe; | |
525 | u16 pi; | |
526 | ||
76c31e5f | 527 | pi = mlx5e_txqsq_get_next_pi(sq, sq->max_sq_mpw_wqebbs); |
5af75c74 | 528 | wqe = MLX5E_TX_FETCH_WQE(sq, pi); |
991b2654 | 529 | net_prefetchw(wqe->data); |
5af75c74 MM |
530 | |
531 | *session = (struct mlx5e_tx_mpwqe) { | |
532 | .wqe = wqe, | |
533 | .bytes_count = 0, | |
534 | .ds_count = MLX5E_TX_WQE_EMPTY_DS_COUNT, | |
535 | .pkt_count = 0, | |
536 | .inline_on = 0, | |
537 | }; | |
538 | ||
539 | memcpy(&session->wqe->eth, eseg, MLX5E_ACCEL_ESEG_LEN); | |
540 | ||
541 | sq->stats->mpwqe_blks++; | |
542 | } | |
543 | ||
544 | static bool mlx5e_tx_mpwqe_session_is_active(struct mlx5e_txqsq *sq) | |
545 | { | |
546 | return sq->mpwqe.wqe; | |
547 | } | |
548 | ||
549 | static void mlx5e_tx_mpwqe_add_dseg(struct mlx5e_txqsq *sq, struct mlx5e_xmit_data *txd) | |
550 | { | |
551 | struct mlx5e_tx_mpwqe *session = &sq->mpwqe; | |
552 | struct mlx5_wqe_data_seg *dseg; | |
553 | ||
554 | dseg = (struct mlx5_wqe_data_seg *)session->wqe + session->ds_count; | |
555 | ||
556 | session->pkt_count++; | |
557 | session->bytes_count += txd->len; | |
558 | ||
559 | dseg->addr = cpu_to_be64(txd->dma_addr); | |
560 | dseg->byte_count = cpu_to_be32(txd->len); | |
561 | dseg->lkey = sq->mkey_be; | |
562 | session->ds_count++; | |
563 | ||
564 | sq->stats->mpwqe_pkts++; | |
565 | } | |
566 | ||
567 | static struct mlx5_wqe_ctrl_seg *mlx5e_tx_mpwqe_session_complete(struct mlx5e_txqsq *sq) | |
568 | { | |
569 | struct mlx5e_tx_mpwqe *session = &sq->mpwqe; | |
570 | u8 ds_count = session->ds_count; | |
571 | struct mlx5_wqe_ctrl_seg *cseg; | |
572 | struct mlx5e_tx_wqe_info *wi; | |
573 | u16 pi; | |
574 | ||
575 | cseg = &session->wqe->ctrl; | |
576 | cseg->opmod_idx_opcode = cpu_to_be32((sq->pc << 8) | MLX5_OPCODE_ENHANCED_MPSW); | |
577 | cseg->qpn_ds = cpu_to_be32((sq->sqn << 8) | ds_count); | |
578 | ||
579 | pi = mlx5_wq_cyc_ctr2ix(&sq->wq, sq->pc); | |
580 | wi = &sq->db.wqe_info[pi]; | |
581 | *wi = (struct mlx5e_tx_wqe_info) { | |
582 | .skb = NULL, | |
583 | .num_bytes = session->bytes_count, | |
584 | .num_wqebbs = DIV_ROUND_UP(ds_count, MLX5_SEND_WQEBB_NUM_DS), | |
585 | .num_dma = session->pkt_count, | |
586 | .num_fifo_pkts = session->pkt_count, | |
587 | }; | |
588 | ||
589 | sq->pc += wi->num_wqebbs; | |
590 | ||
591 | session->wqe = NULL; | |
592 | ||
593 | mlx5e_tx_check_stop(sq); | |
594 | ||
595 | return cseg; | |
596 | } | |
597 | ||
598 | static void | |
599 | mlx5e_sq_xmit_mpwqe(struct mlx5e_txqsq *sq, struct sk_buff *skb, | |
600 | struct mlx5_wqe_eth_seg *eseg, bool xmit_more) | |
601 | { | |
602 | struct mlx5_wqe_ctrl_seg *cseg; | |
603 | struct mlx5e_xmit_data txd; | |
604 | ||
5b759bf2 MM |
605 | txd.data = skb->data; |
606 | txd.len = skb->len; | |
607 | ||
608 | txd.dma_addr = dma_map_single(sq->pdev, txd.data, txd.len, DMA_TO_DEVICE); | |
609 | if (unlikely(dma_mapping_error(sq->pdev, txd.dma_addr))) | |
610 | goto err_unmap; | |
611 | ||
5af75c74 MM |
612 | if (!mlx5e_tx_mpwqe_session_is_active(sq)) { |
613 | mlx5e_tx_mpwqe_session_start(sq, eseg); | |
614 | } else if (!mlx5e_tx_mpwqe_same_eseg(sq, eseg)) { | |
615 | mlx5e_tx_mpwqe_session_complete(sq); | |
616 | mlx5e_tx_mpwqe_session_start(sq, eseg); | |
617 | } | |
618 | ||
619 | sq->stats->xmit_more += xmit_more; | |
620 | ||
5af75c74 | 621 | mlx5e_dma_push(sq, txd.dma_addr, txd.len, MLX5E_DMA_MAP_SINGLE); |
0b676aae | 622 | mlx5e_skb_fifo_push(&sq->db.skb_fifo, skb); |
5af75c74 | 623 | mlx5e_tx_mpwqe_add_dseg(sq, &txd); |
5af75c74 MM |
624 | mlx5e_tx_skb_update_hwts_flags(skb); |
625 | ||
76c31e5f | 626 | if (unlikely(mlx5e_tx_mpwqe_is_full(&sq->mpwqe, sq->max_sq_mpw_wqebbs))) { |
5af75c74 MM |
627 | /* Might stop the queue and affect the retval of __netdev_tx_sent_queue. */ |
628 | cseg = mlx5e_tx_mpwqe_session_complete(sq); | |
629 | ||
630 | if (__netdev_tx_sent_queue(sq->txq, txd.len, xmit_more)) | |
631 | mlx5e_notify_hw(&sq->wq, sq->pc, sq->uar_map, cseg); | |
632 | } else if (__netdev_tx_sent_queue(sq->txq, txd.len, xmit_more)) { | |
633 | /* Might stop the queue, but we were asked to ring the doorbell anyway. */ | |
634 | cseg = mlx5e_tx_mpwqe_session_complete(sq); | |
635 | ||
636 | mlx5e_notify_hw(&sq->wq, sq->pc, sq->uar_map, cseg); | |
637 | } | |
638 | ||
639 | return; | |
640 | ||
641 | err_unmap: | |
642 | mlx5e_dma_unmap_wqe_err(sq, 1); | |
643 | sq->stats->dropped++; | |
644 | dev_kfree_skb_any(skb); | |
5b759bf2 | 645 | mlx5e_tx_flush(sq); |
5af75c74 MM |
646 | } |
647 | ||
648 | void mlx5e_tx_mpwqe_ensure_complete(struct mlx5e_txqsq *sq) | |
649 | { | |
650 | /* Unlikely in non-MPWQE workloads; not important in MPWQE workloads. */ | |
651 | if (unlikely(mlx5e_tx_mpwqe_session_is_active(sq))) | |
652 | mlx5e_tx_mpwqe_session_complete(sq); | |
653 | } | |
654 | ||
58a51894 AL |
655 | static void mlx5e_cqe_ts_id_eseg(struct mlx5e_ptpsq *ptpsq, struct sk_buff *skb, |
656 | struct mlx5_wqe_eth_seg *eseg) | |
657 | { | |
3178308a RR |
658 | if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) |
659 | eseg->flow_table_metadata = | |
660 | cpu_to_be32(mlx5e_ptp_metadata_fifo_pop(&ptpsq->metadata_freelist)); | |
58a51894 AL |
661 | } |
662 | ||
f68406ca | 663 | static void mlx5e_txwqe_build_eseg(struct mlx5e_priv *priv, struct mlx5e_txqsq *sq, |
b336e6b2 | 664 | struct sk_buff *skb, struct mlx5e_accel_tx_state *accel, |
b544011f | 665 | struct mlx5_wqe_eth_seg *eseg, u16 ihs) |
5af75c74 | 666 | { |
f68406ca | 667 | mlx5e_accel_tx_eseg(priv, skb, eseg, ihs); |
b336e6b2 | 668 | mlx5e_txwqe_build_eseg_csum(sq, skb, accel, eseg); |
58a51894 AL |
669 | if (unlikely(sq->ptpsq)) |
670 | mlx5e_cqe_ts_id_eseg(sq->ptpsq, skb, eseg); | |
5af75c74 MM |
671 | } |
672 | ||
e586b3b0 AV |
673 | netdev_tx_t mlx5e_xmit(struct sk_buff *skb, struct net_device *dev) |
674 | { | |
675 | struct mlx5e_priv *priv = netdev_priv(dev); | |
714c88a3 | 676 | struct mlx5e_accel_tx_state accel = {}; |
8e4b53f6 MM |
677 | struct mlx5e_tx_wqe_attr wqe_attr; |
678 | struct mlx5e_tx_attr attr; | |
bf239741 IL |
679 | struct mlx5e_tx_wqe *wqe; |
680 | struct mlx5e_txqsq *sq; | |
681 | u16 pi; | |
2ac9cfe7 | 682 | |
17c84cb4 MM |
683 | /* All changes to txq2sq are performed in sync with mlx5e_xmit, when the |
684 | * queue being changed is disabled, and smp_wmb guarantees that the | |
685 | * changes are visible before mlx5e_xmit tries to read from txq2sq. It | |
686 | * guarantees that the value of txq2sq[qid] doesn't change while | |
687 | * mlx5e_xmit is running on queue number qid. smb_wmb is paired with | |
688 | * HARD_TX_LOCK around ndo_start_xmit, which serves as an ACQUIRE. | |
689 | */ | |
bf239741 | 690 | sq = priv->txq2sq[skb_get_queue_mapping(skb)]; |
214baf22 | 691 | if (unlikely(!sq)) { |
17c84cb4 MM |
692 | /* Two cases when sq can be NULL: |
693 | * 1. The HTB node is registered, and mlx5e_select_queue | |
694 | * selected its queue ID, but the SQ itself is not yet created. | |
695 | * 2. HTB SQ creation failed. Similar to the previous case, but | |
696 | * the SQ won't be created. | |
697 | */ | |
214baf22 MM |
698 | dev_kfree_skb_any(skb); |
699 | return NETDEV_TX_OK; | |
700 | } | |
714c88a3 MM |
701 | |
702 | /* May send SKBs and WQEs. */ | |
703 | if (unlikely(!mlx5e_accel_tx_begin(dev, sq, skb, &accel))) | |
5af75c74 | 704 | return NETDEV_TX_OK; |
714c88a3 | 705 | |
8e4b53f6 | 706 | mlx5e_sq_xmit_prepare(sq, skb, &accel, &attr); |
5af75c74 MM |
707 | |
708 | if (test_bit(MLX5E_SQ_STATE_MPWQE, &sq->state)) { | |
709 | if (mlx5e_tx_skb_supports_mpwqe(skb, &attr)) { | |
710 | struct mlx5_wqe_eth_seg eseg = {}; | |
711 | ||
f68406ca | 712 | mlx5e_txwqe_build_eseg(priv, sq, skb, &accel, &eseg, attr.ihs); |
5af75c74 MM |
713 | mlx5e_sq_xmit_mpwqe(sq, skb, &eseg, netdev_xmit_more()); |
714 | return NETDEV_TX_OK; | |
715 | } | |
716 | ||
717 | mlx5e_tx_mpwqe_ensure_complete(sq); | |
718 | } | |
719 | ||
8e4b53f6 MM |
720 | mlx5e_sq_calc_wqe_attr(skb, &attr, &wqe_attr); |
721 | pi = mlx5e_txqsq_get_next_pi(sq, wqe_attr.num_wqebbs); | |
fed0c6cf | 722 | wqe = MLX5E_TX_FETCH_WQE(sq, pi); |
2ac9cfe7 | 723 | |
714c88a3 | 724 | /* May update the WQE, but may not post other WQEs. */ |
5be01904 RS |
725 | mlx5e_accel_tx_finish(sq, wqe, &accel, |
726 | (struct mlx5_wqe_inline_seg *)(wqe->data + wqe_attr.ds_cnt_inl)); | |
f68406ca | 727 | mlx5e_txwqe_build_eseg(priv, sq, skb, &accel, &wqe->eth, attr.ihs); |
8e4b53f6 | 728 | mlx5e_sq_xmit_wqe(sq, skb, &attr, &wqe_attr, wqe, pi, netdev_xmit_more()); |
689adf0d | 729 | |
3df711db | 730 | return NETDEV_TX_OK; |
e586b3b0 AV |
731 | } |
732 | ||
8e4b53f6 MM |
733 | static void mlx5e_tx_wi_dma_unmap(struct mlx5e_txqsq *sq, struct mlx5e_tx_wqe_info *wi, |
734 | u32 *dma_fifo_cc) | |
735 | { | |
736 | int i; | |
737 | ||
738 | for (i = 0; i < wi->num_dma; i++) { | |
739 | struct mlx5e_sq_dma *dma = mlx5e_dma_get(sq, (*dma_fifo_cc)++); | |
740 | ||
741 | mlx5e_tx_dma_unmap(sq->pdev, dma); | |
742 | } | |
743 | } | |
744 | ||
745 | static void mlx5e_consume_skb(struct mlx5e_txqsq *sq, struct sk_buff *skb, | |
746 | struct mlx5_cqe64 *cqe, int napi_budget) | |
747 | { | |
748 | if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) { | |
749 | struct skb_shared_hwtstamps hwts = {}; | |
750 | u64 ts = get_cqe_ts(cqe); | |
751 | ||
432119de | 752 | hwts.hwtstamp = mlx5e_cqe_ts_to_ns(sq->ptp_cyc2time, sq->clock, ts); |
1880bc4e EBE |
753 | if (sq->ptpsq) |
754 | mlx5e_skb_cb_hwtstamp_handler(skb, MLX5E_SKB_CB_CQE_HWTSTAMP, | |
755 | hwts.hwtstamp, sq->ptpsq->cq_stats); | |
756 | else | |
757 | skb_tstamp_tx(skb, &hwts); | |
8e4b53f6 MM |
758 | } |
759 | ||
760 | napi_consume_skb(skb, napi_budget); | |
761 | } | |
762 | ||
338c46c6 MM |
763 | static void mlx5e_tx_wi_consume_fifo_skbs(struct mlx5e_txqsq *sq, struct mlx5e_tx_wqe_info *wi, |
764 | struct mlx5_cqe64 *cqe, int napi_budget) | |
765 | { | |
766 | int i; | |
767 | ||
768 | for (i = 0; i < wi->num_fifo_pkts; i++) { | |
0b676aae | 769 | struct sk_buff *skb = mlx5e_skb_fifo_pop(&sq->db.skb_fifo); |
338c46c6 MM |
770 | |
771 | mlx5e_consume_skb(sq, skb, cqe, napi_budget); | |
772 | } | |
773 | } | |
774 | ||
7aa50380 RR |
775 | void mlx5e_txqsq_wake(struct mlx5e_txqsq *sq) |
776 | { | |
777 | if (netif_tx_queue_stopped(sq->txq) && | |
778 | mlx5e_wqc_has_room_for(&sq->wq, sq->cc, sq->pc, sq->stop_room) && | |
3178308a | 779 | !mlx5e_ptpsq_metadata_freelist_empty(sq->ptpsq) && |
7aa50380 RR |
780 | !test_bit(MLX5E_SQ_STATE_RECOVERING, &sq->state)) { |
781 | netif_tx_wake_queue(sq->txq); | |
782 | sq->stats->wake++; | |
783 | } | |
784 | } | |
785 | ||
8ec736e5 | 786 | bool mlx5e_poll_tx_cq(struct mlx5e_cq *cq, int napi_budget) |
e586b3b0 | 787 | { |
86155656 | 788 | struct mlx5e_sq_stats *stats; |
31391048 | 789 | struct mlx5e_txqsq *sq; |
4b7dfc99 | 790 | struct mlx5_cqe64 *cqe; |
e586b3b0 AV |
791 | u32 dma_fifo_cc; |
792 | u32 nbytes; | |
793 | u16 npkts; | |
794 | u16 sqcc; | |
795 | int i; | |
796 | ||
31391048 | 797 | sq = container_of(cq, struct mlx5e_txqsq, cq); |
e586b3b0 | 798 | |
0e5c04f6 | 799 | if (unlikely(!test_bit(MLX5E_SQ_STATE_ENABLED, &sq->state))) |
29429f33 DJ |
800 | return false; |
801 | ||
4b7dfc99 TT |
802 | cqe = mlx5_cqwq_get_cqe(&cq->wq); |
803 | if (!cqe) | |
804 | return false; | |
805 | ||
86155656 TT |
806 | stats = sq->stats; |
807 | ||
e586b3b0 AV |
808 | npkts = 0; |
809 | nbytes = 0; | |
810 | ||
811 | /* sq->cc must be updated only after mlx5_cqwq_update_db_record(), | |
812 | * otherwise a cq overrun may occur | |
813 | */ | |
814 | sqcc = sq->cc; | |
815 | ||
816 | /* avoid dirtying sq cache line every cqe */ | |
817 | dma_fifo_cc = sq->dma_fifo_cc; | |
818 | ||
4b7dfc99 TT |
819 | i = 0; |
820 | do { | |
b57e66ad | 821 | struct mlx5e_tx_wqe_info *wi; |
059ba072 AS |
822 | u16 wqe_counter; |
823 | bool last_wqe; | |
b57e66ad | 824 | u16 ci; |
e586b3b0 | 825 | |
a1f5a1a8 AS |
826 | mlx5_cqwq_pop(&cq->wq); |
827 | ||
059ba072 AS |
828 | wqe_counter = be16_to_cpu(cqe->wqe_counter); |
829 | ||
830 | do { | |
059ba072 AS |
831 | last_wqe = (sqcc == wqe_counter); |
832 | ||
ddf385e3 | 833 | ci = mlx5_wq_cyc_ctr2ix(&sq->wq, sqcc); |
31391048 | 834 | wi = &sq->db.wqe_info[ci]; |
e586b3b0 | 835 | |
8e4b53f6 MM |
836 | sqcc += wi->num_wqebbs; |
837 | ||
338c46c6 MM |
838 | if (likely(wi->skb)) { |
839 | mlx5e_tx_wi_dma_unmap(sq, wi, &dma_fifo_cc); | |
840 | mlx5e_consume_skb(sq, wi->skb, cqe, napi_budget); | |
841 | ||
842 | npkts++; | |
843 | nbytes += wi->num_bytes; | |
059ba072 AS |
844 | continue; |
845 | } | |
e586b3b0 | 846 | |
338c46c6 MM |
847 | if (unlikely(mlx5e_ktls_tx_try_handle_resync_dump_comp(sq, wi, |
848 | &dma_fifo_cc))) | |
849 | continue; | |
e586b3b0 | 850 | |
338c46c6 MM |
851 | if (wi->num_fifo_pkts) { |
852 | mlx5e_tx_wi_dma_unmap(sq, wi, &dma_fifo_cc); | |
853 | mlx5e_tx_wi_consume_fifo_skbs(sq, wi, cqe, napi_budget); | |
854 | ||
855 | npkts += wi->num_fifo_pkts; | |
856 | nbytes += wi->num_bytes; | |
857 | } | |
059ba072 | 858 | } while (!last_wqe); |
4b7dfc99 | 859 | |
b57e66ad TT |
860 | if (unlikely(get_cqe_opcode(cqe) == MLX5_CQE_REQ_ERR)) { |
861 | if (!test_and_set_bit(MLX5E_SQ_STATE_RECOVERING, | |
862 | &sq->state)) { | |
f1b95753 | 863 | mlx5e_dump_error_cqe(&sq->cq, sq->sqn, |
b57e66ad TT |
864 | (struct mlx5_err_cqe *)cqe); |
865 | mlx5_wq_cyc_wqe_dump(&sq->wq, ci, wi->num_wqebbs); | |
db52aa6d | 866 | queue_work(cq->workqueue, &sq->recover_work); |
b57e66ad TT |
867 | } |
868 | stats->cqe_err++; | |
869 | } | |
870 | ||
4b7dfc99 | 871 | } while ((++i < MLX5E_TX_CQ_POLL_BUDGET) && (cqe = mlx5_cqwq_get_cqe(&cq->wq))); |
e586b3b0 | 872 | |
86155656 TT |
873 | stats->cqes += i; |
874 | ||
e586b3b0 AV |
875 | mlx5_cqwq_update_db_record(&cq->wq); |
876 | ||
877 | /* ensure cq space is freed before enabling more cqes */ | |
878 | wmb(); | |
879 | ||
880 | sq->dma_fifo_cc = dma_fifo_cc; | |
881 | sq->cc = sqcc; | |
882 | ||
883 | netdev_tx_completed_queue(sq->txq, npkts, nbytes); | |
884 | ||
7aa50380 | 885 | mlx5e_txqsq_wake(sq); |
e586b3b0 | 886 | |
59a7c2fd | 887 | return (i == MLX5E_TX_CQ_POLL_BUDGET); |
e586b3b0 | 888 | } |
6e8dd6d6 | 889 | |
338c46c6 MM |
890 | static void mlx5e_tx_wi_kfree_fifo_skbs(struct mlx5e_txqsq *sq, struct mlx5e_tx_wqe_info *wi) |
891 | { | |
892 | int i; | |
893 | ||
894 | for (i = 0; i < wi->num_fifo_pkts; i++) | |
0b676aae | 895 | dev_kfree_skb_any(mlx5e_skb_fifo_pop(&sq->db.skb_fifo)); |
338c46c6 MM |
896 | } |
897 | ||
31391048 | 898 | void mlx5e_free_txqsq_descs(struct mlx5e_txqsq *sq) |
6e8dd6d6 SM |
899 | { |
900 | struct mlx5e_tx_wqe_info *wi; | |
5e911e2c MS |
901 | u32 dma_fifo_cc, nbytes = 0; |
902 | u16 ci, sqcc, npkts = 0; | |
6e8dd6d6 | 903 | |
2c559361 TT |
904 | sqcc = sq->cc; |
905 | dma_fifo_cc = sq->dma_fifo_cc; | |
906 | ||
907 | while (sqcc != sq->pc) { | |
908 | ci = mlx5_wq_cyc_ctr2ix(&sq->wq, sqcc); | |
31391048 | 909 | wi = &sq->db.wqe_info[ci]; |
6e8dd6d6 | 910 | |
8e4b53f6 MM |
911 | sqcc += wi->num_wqebbs; |
912 | ||
338c46c6 MM |
913 | if (likely(wi->skb)) { |
914 | mlx5e_tx_wi_dma_unmap(sq, wi, &dma_fifo_cc); | |
915 | dev_kfree_skb_any(wi->skb); | |
916 | ||
917 | npkts++; | |
918 | nbytes += wi->num_bytes; | |
6e8dd6d6 SM |
919 | continue; |
920 | } | |
921 | ||
338c46c6 MM |
922 | if (unlikely(mlx5e_ktls_tx_try_handle_resync_dump_comp(sq, wi, &dma_fifo_cc))) |
923 | continue; | |
8e4b53f6 | 924 | |
338c46c6 MM |
925 | if (wi->num_fifo_pkts) { |
926 | mlx5e_tx_wi_dma_unmap(sq, wi, &dma_fifo_cc); | |
927 | mlx5e_tx_wi_kfree_fifo_skbs(sq, wi); | |
928 | ||
929 | npkts += wi->num_fifo_pkts; | |
930 | nbytes += wi->num_bytes; | |
931 | } | |
6e8dd6d6 | 932 | } |
2c559361 TT |
933 | |
934 | sq->dma_fifo_cc = dma_fifo_cc; | |
935 | sq->cc = sqcc; | |
5e911e2c MS |
936 | |
937 | netdev_tx_completed_queue(sq->txq, npkts, nbytes); | |
6e8dd6d6 | 938 | } |
25854544 SM |
939 | |
940 | #ifdef CONFIG_MLX5_CORE_IPOIB | |
25854544 SM |
941 | static inline void |
942 | mlx5i_txwqe_build_datagram(struct mlx5_av *av, u32 dqpn, u32 dqkey, | |
943 | struct mlx5_wqe_datagram_seg *dseg) | |
944 | { | |
945 | memcpy(&dseg->av, av, sizeof(struct mlx5_av)); | |
946 | dseg->av.dqp_dct = cpu_to_be32(dqpn | MLX5_EXTENDED_UD_AV); | |
947 | dseg->av.key.qkey.qkey = cpu_to_be32(dqkey); | |
948 | } | |
949 | ||
8e4b53f6 MM |
950 | static void mlx5i_sq_calc_wqe_attr(struct sk_buff *skb, |
951 | const struct mlx5e_tx_attr *attr, | |
952 | struct mlx5e_tx_wqe_attr *wqe_attr) | |
953 | { | |
954 | u16 ds_cnt = sizeof(struct mlx5i_tx_wqe) / MLX5_SEND_WQE_DS; | |
955 | u16 ds_cnt_inl = 0; | |
956 | ||
957 | ds_cnt += !!attr->headlen + skb_shinfo(skb)->nr_frags; | |
958 | ||
959 | if (attr->ihs) { | |
960 | u16 inl = attr->ihs - INL_HDR_START_SZ; | |
961 | ||
962 | ds_cnt_inl = DIV_ROUND_UP(inl, MLX5_SEND_WQE_DS); | |
963 | ds_cnt += ds_cnt_inl; | |
964 | } | |
965 | ||
966 | *wqe_attr = (struct mlx5e_tx_wqe_attr) { | |
967 | .ds_cnt = ds_cnt, | |
968 | .ds_cnt_inl = ds_cnt_inl, | |
969 | .num_wqebbs = DIV_ROUND_UP(ds_cnt, MLX5_SEND_WQEBB_NUM_DS), | |
970 | }; | |
971 | } | |
972 | ||
3df711db MM |
973 | void mlx5i_sq_xmit(struct mlx5e_txqsq *sq, struct sk_buff *skb, |
974 | struct mlx5_av *av, u32 dqpn, u32 dqkey, bool xmit_more) | |
25854544 | 975 | { |
8e4b53f6 MM |
976 | struct mlx5e_tx_wqe_attr wqe_attr; |
977 | struct mlx5e_tx_attr attr; | |
043dc78e | 978 | struct mlx5i_tx_wqe *wqe; |
25854544 | 979 | |
043dc78e TT |
980 | struct mlx5_wqe_datagram_seg *datagram; |
981 | struct mlx5_wqe_ctrl_seg *cseg; | |
982 | struct mlx5_wqe_eth_seg *eseg; | |
983 | struct mlx5_wqe_data_seg *dseg; | |
984 | struct mlx5e_tx_wqe_info *wi; | |
25854544 | 985 | |
05909bab | 986 | struct mlx5e_sq_stats *stats = sq->stats; |
25854544 | 987 | int num_dma; |
8e4b53f6 | 988 | u16 pi; |
25854544 | 989 | |
8e4b53f6 MM |
990 | mlx5e_sq_xmit_prepare(sq, skb, NULL, &attr); |
991 | mlx5i_sq_calc_wqe_attr(skb, &attr, &wqe_attr); | |
b431302e | 992 | |
8e4b53f6 MM |
993 | pi = mlx5e_txqsq_get_next_pi(sq, wqe_attr.num_wqebbs); |
994 | wqe = MLX5I_SQ_FETCH_WQE(sq, pi); | |
25854544 | 995 | |
299a1195 | 996 | stats->xmit_more += xmit_more; |
4ec5cf78 | 997 | |
043dc78e TT |
998 | /* fill wqe */ |
999 | wi = &sq->db.wqe_info[pi]; | |
1000 | cseg = &wqe->ctrl; | |
1001 | datagram = &wqe->datagram; | |
1002 | eseg = &wqe->eth; | |
1003 | dseg = wqe->data; | |
1004 | ||
1005 | mlx5i_txwqe_build_datagram(av, dqpn, dqkey, datagram); | |
1006 | ||
b336e6b2 | 1007 | mlx5e_txwqe_build_eseg_csum(sq, skb, NULL, eseg); |
043dc78e | 1008 | |
8e4b53f6 | 1009 | eseg->mss = attr.mss; |
043dc78e | 1010 | |
8e4b53f6 | 1011 | if (attr.ihs) { |
de78960e ED |
1012 | if (unlikely(attr.hopbyhop)) { |
1013 | struct ipv6hdr *h6; | |
1014 | ||
1015 | /* remove the HBH header. | |
1016 | * Layout: [Ethernet header][IPv6 header][HBH][TCP header] | |
1017 | */ | |
1018 | unsafe_memcpy(eseg->inline_hdr.start, skb->data, | |
1019 | ETH_HLEN + sizeof(*h6), | |
1020 | MLX5_UNSAFE_MEMCPY_DISCLAIMER); | |
1021 | h6 = (struct ipv6hdr *)((char *)eseg->inline_hdr.start + ETH_HLEN); | |
1022 | h6->nexthdr = IPPROTO_TCP; | |
1023 | /* Copy the TCP header after the IPv6 one */ | |
1024 | unsafe_memcpy(h6 + 1, | |
1025 | skb->data + ETH_HLEN + sizeof(*h6) + | |
1026 | sizeof(struct hop_jumbo_hdr), | |
1027 | tcp_hdrlen(skb), | |
1028 | MLX5_UNSAFE_MEMCPY_DISCLAIMER); | |
1029 | /* Leave ipv6 payload_len set to 0, as LSO v2 specs request. */ | |
1030 | } else { | |
1031 | unsafe_memcpy(eseg->inline_hdr.start, skb->data, | |
1032 | attr.ihs, | |
1033 | MLX5_UNSAFE_MEMCPY_DISCLAIMER); | |
1034 | } | |
8e4b53f6 MM |
1035 | eseg->inline_hdr.sz = cpu_to_be16(attr.ihs); |
1036 | dseg += wqe_attr.ds_cnt_inl; | |
25854544 SM |
1037 | } |
1038 | ||
de78960e | 1039 | num_dma = mlx5e_txwqe_build_dsegs(sq, skb, skb->data + attr.ihs + attr.hopbyhop, |
8e4b53f6 | 1040 | attr.headlen, dseg); |
25854544 | 1041 | if (unlikely(num_dma < 0)) |
d9a96ec3 | 1042 | goto err_drop; |
25854544 | 1043 | |
3178308a | 1044 | mlx5e_txwqe_complete(sq, skb, &attr, &wqe_attr, num_dma, wi, cseg, eseg, xmit_more); |
25854544 | 1045 | |
3df711db | 1046 | return; |
25854544 | 1047 | |
d9a96ec3 | 1048 | err_drop: |
05909bab | 1049 | stats->dropped++; |
25854544 | 1050 | dev_kfree_skb_any(skb); |
5b759bf2 | 1051 | mlx5e_tx_flush(sq); |
25854544 | 1052 | } |
25854544 | 1053 | #endif |