[linux-2.6-block.git] / drivers / net / ethernet / mellanox / mlx5 / core / en_rx.c

/*
 * Copyright (c) 2015, Mellanox Technologies. All rights reserved.
 *
 * This software is available to you under a choice of one of two
 * licenses.  You may choose to be licensed under the terms of the GNU
 * General Public License (GPL) Version 2, available from the file
 * COPYING in the main directory of this source tree, or the
 * OpenIB.org BSD license below:
 *
 *     Redistribution and use in source and binary forms, with or
 *     without modification, are permitted provided that the following
 *     conditions are met:
 *
 *      - Redistributions of source code must retain the above
 *        copyright notice, this list of conditions and the following
 *        disclaimer.
 *
 *      - Redistributions in binary form must reproduce the above
 *        copyright notice, this list of conditions and the following
 *        disclaimer in the documentation and/or other materials
 *        provided with the distribution.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 * SOFTWARE.
 */

#include <linux/ip.h>
#include <linux/ipv6.h>
#include <linux/tcp.h>
#include "en.h"

static inline int mlx5e_alloc_rx_wqe(struct mlx5e_rq *rq,
				     struct mlx5e_rx_wqe *wqe, u16 ix)
{
	struct sk_buff *skb;
	dma_addr_t dma_addr;

	skb = netdev_alloc_skb(rq->netdev, rq->wqe_sz);
	if (unlikely(!skb))
		return -ENOMEM;

	dma_addr = dma_map_single(rq->pdev,
				  /* hw start padding */
				  skb->data,
				  /* hw end padding */
				  rq->wqe_sz,
				  DMA_FROM_DEVICE);

	if (unlikely(dma_mapping_error(rq->pdev, dma_addr)))
		goto err_free_skb;

	skb_reserve(skb, MLX5E_NET_IP_ALIGN);

	*((dma_addr_t *)skb->cb) = dma_addr;
	wqe->data.addr = cpu_to_be64(dma_addr + MLX5E_NET_IP_ALIGN);

	rq->skb[ix] = skb;

	return 0;

err_free_skb:
	dev_kfree_skb(skb);

	return -ENOMEM;
}

bool mlx5e_post_rx_wqes(struct mlx5e_rq *rq)
{
	struct mlx5_wq_ll *wq = &rq->wq;

	if (unlikely(!test_bit(MLX5E_RQ_STATE_POST_WQES_ENABLE, &rq->state)))
		return false;

	while (!mlx5_wq_ll_is_full(wq)) {
		struct mlx5e_rx_wqe *wqe = mlx5_wq_ll_get_wqe(wq, wq->head);

		if (unlikely(mlx5e_alloc_rx_wqe(rq, wqe, wq->head)))
			break;

		mlx5_wq_ll_push(wq, be16_to_cpu(wqe->next.next_wqe_index));
	}

	/* ensure wqes are visible to device before updating doorbell record */
	dma_wmb();

	mlx5_wq_ll_update_db_record(wq);

	return !mlx5_wq_ll_is_full(wq);
}

static void mlx5e_lro_update_hdr(struct sk_buff *skb, struct mlx5_cqe64 *cqe)
{
	struct ethhdr	*eth	= (struct ethhdr *)(skb->data);
	struct iphdr	*ipv4	= (struct iphdr *)(skb->data + ETH_HLEN);
	struct ipv6hdr	*ipv6	= (struct ipv6hdr *)(skb->data + ETH_HLEN);
	struct tcphdr	*tcp;

	u8 l4_hdr_type = get_cqe_l4_hdr_type(cqe);
	int tcp_ack = ((CQE_L4_HDR_TYPE_TCP_ACK_NO_DATA  == l4_hdr_type) ||
		       (CQE_L4_HDR_TYPE_TCP_ACK_AND_DATA == l4_hdr_type));

	u16 tot_len = be32_to_cpu(cqe->byte_cnt) - ETH_HLEN;

	if (eth->h_proto == htons(ETH_P_IP)) {
		tcp = (struct tcphdr *)(skb->data + ETH_HLEN +
					sizeof(struct iphdr));
		ipv6 = NULL;
		skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
	} else {
		tcp = (struct tcphdr *)(skb->data + ETH_HLEN +
					sizeof(struct ipv6hdr));
		ipv4 = NULL;
		skb_shinfo(skb)->gso_type = SKB_GSO_TCPV6;
	}

	if (get_cqe_lro_tcppsh(cqe))
		tcp->psh                = 1;

	if (tcp_ack) {
		tcp->ack                = 1;
		tcp->ack_seq            = cqe->lro_ack_seq_num;
		tcp->window             = cqe->lro_tcp_win;
	}

	if (ipv4) {
		ipv4->ttl               = cqe->lro_min_ttl;
		ipv4->tot_len           = cpu_to_be16(tot_len);
		ipv4->check             = 0;
		ipv4->check             = ip_fast_csum((unsigned char *)ipv4,
						       ipv4->ihl);
	} else {
		ipv6->hop_limit         = cqe->lro_min_ttl;
		ipv6->payload_len       = cpu_to_be16(tot_len -
						      sizeof(struct ipv6hdr));
	}
}

static inline void mlx5e_skb_set_hash(struct mlx5_cqe64 *cqe,
				      struct sk_buff *skb)
{
	u8 cht = cqe->rss_hash_type;
	int ht = (cht & CQE_RSS_HTYPE_L4) ? PKT_HASH_TYPE_L4 :
		 (cht & CQE_RSS_HTYPE_IP) ? PKT_HASH_TYPE_L3 :
					    PKT_HASH_TYPE_NONE;
	skb_set_hash(skb, be32_to_cpu(cqe->rss_hash_result), ht);
}

static inline bool is_first_ethertype_ip(struct sk_buff *skb)
{
	__be16 ethertype = ((struct ethhdr *)skb->data)->h_proto;

	return (ethertype == htons(ETH_P_IP) || ethertype == htons(ETH_P_IPV6));
}

static inline void mlx5e_handle_csum(struct net_device *netdev,
				     struct mlx5_cqe64 *cqe,
				     struct mlx5e_rq *rq,
				     struct sk_buff *skb)
{
	if (unlikely(!(netdev->features & NETIF_F_RXCSUM)))
		goto csum_none;

	if (likely(cqe->hds_ip_ext & CQE_L4_OK)) {
		skb->ip_summed = CHECKSUM_UNNECESSARY;
	} else if (is_first_ethertype_ip(skb)) {
		skb->ip_summed = CHECKSUM_COMPLETE;
		skb->csum = csum_unfold(cqe->check_sum);
		rq->stats.csum_sw++;
	} else {
		goto csum_none;
	}

	return;

csum_none:
	skb->ip_summed = CHECKSUM_NONE;
	rq->stats.csum_none++;
}

static inline void mlx5e_build_rx_skb(struct mlx5_cqe64 *cqe,
				      struct mlx5e_rq *rq,
				      struct sk_buff *skb)
{
	struct net_device *netdev = rq->netdev;
	u32 cqe_bcnt = be32_to_cpu(cqe->byte_cnt);
	int lro_num_seg;

	skb_put(skb, cqe_bcnt);

	lro_num_seg = be32_to_cpu(cqe->srqn) >> 24;
	if (lro_num_seg > 1) {
		mlx5e_lro_update_hdr(skb, cqe);
		skb_shinfo(skb)->gso_size = DIV_ROUND_UP(cqe_bcnt, lro_num_seg);
		rq->stats.lro_packets++;
		rq->stats.lro_bytes += cqe_bcnt;
	}

	mlx5e_handle_csum(netdev, cqe, rq, skb);

	skb->protocol = eth_type_trans(skb, netdev);

	skb_record_rx_queue(skb, rq->ix);

	if (likely(netdev->features & NETIF_F_RXHASH))
		mlx5e_skb_set_hash(cqe, skb);

	if (cqe_has_vlan(cqe))
		__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
				       be16_to_cpu(cqe->vlan_info));
}

bool mlx5e_poll_rx_cq(struct mlx5e_cq *cq, int budget)
{
	struct mlx5e_rq *rq = container_of(cq, struct mlx5e_rq, cq);
	int i;

	/* avoid accessing cq (dma coherent memory) if not needed */
	if (!test_and_clear_bit(MLX5E_CQ_HAS_CQES, &cq->flags))
		return false;

	for (i = 0; i < budget; i++) {
		struct mlx5e_rx_wqe *wqe;
		struct mlx5_cqe64 *cqe;
		struct sk_buff *skb;
		__be16 wqe_counter_be;
		u16 wqe_counter;

		cqe = mlx5e_get_cqe(cq);
		if (!cqe)
			break;

		mlx5_cqwq_pop(&cq->wq);

		wqe_counter_be = cqe->wqe_counter;
		wqe_counter    = be16_to_cpu(wqe_counter_be);
		wqe            = mlx5_wq_ll_get_wqe(&rq->wq, wqe_counter);
		skb            = rq->skb[wqe_counter];
		prefetch(skb->data);
		rq->skb[wqe_counter] = NULL;

		dma_unmap_single(rq->pdev,
				 *((dma_addr_t *)skb->cb),
				 rq->wqe_sz,
				 DMA_FROM_DEVICE);

		if (unlikely((cqe->op_own >> 4) != MLX5_CQE_RESP_SEND)) {
			rq->stats.wqe_err++;
			dev_kfree_skb(skb);
			goto wq_ll_pop;
		}

		mlx5e_build_rx_skb(cqe, rq, skb);
		rq->stats.packets++;
		napi_gro_receive(cq->napi, skb);

wq_ll_pop:
		mlx5_wq_ll_pop(&rq->wq, wqe_counter_be,
			       &wqe->next.next_wqe_index);
	}

	mlx5_cqwq_update_db_record(&cq->wq);

	/* ensure cq space is freed before enabling more cqes */
	wmb();

	if (i == budget) {
		set_bit(MLX5E_CQ_HAS_CQES, &cq->flags);
		return true;
	}

	return false;
}
Commit	Line	Data
e586b3b0 AV	1	/*
	2	* Copyright (c) 2015, Mellanox Technologies. All rights reserved.
	3	*
	4	* This software is available to you under a choice of one of two
	5	* licenses. You may choose to be licensed under the terms of the GNU
	6	* General Public License (GPL) Version 2, available from the file
	7	* COPYING in the main directory of this source tree, or the
	8	* OpenIB.org BSD license below:
	9	*
	10	* Redistribution and use in source and binary forms, with or
	11	* without modification, are permitted provided that the following
	12	* conditions are met:
	13	*
	14	* - Redistributions of source code must retain the above
	15	* copyright notice, this list of conditions and the following
	16	* disclaimer.
	17	*
	18	* - Redistributions in binary form must reproduce the above
	19	* copyright notice, this list of conditions and the following
	20	* disclaimer in the documentation and/or other materials
	21	* provided with the distribution.
	22	*
	23	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
	24	* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
	25	* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
	26	* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
	27	* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
	28	* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
	29	* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
	30	* SOFTWARE.
	31	*/
	32
	33	#include <linux/ip.h>
	34	#include <linux/ipv6.h>
	35	#include <linux/tcp.h>
	36	#include "en.h"
	37
	38	static inline int mlx5e_alloc_rx_wqe(struct mlx5e_rq *rq,
	39	struct mlx5e_rx_wqe *wqe, u16 ix)
	40	{
	41	struct sk_buff *skb;
	42	dma_addr_t dma_addr;
	43
	44	skb = netdev_alloc_skb(rq->netdev, rq->wqe_sz);
	45	if (unlikely(!skb))
	46	return -ENOMEM;
	47
e586b3b0 AV	48	dma_addr = dma_map_single(rq->pdev,
e586b3b0 AV	49	/* hw start padding */
fc11fbf9 SM	50	skb->data,
fc11fbf9 SM	51	/* hw end padding */
e586b3b0 AV	52	rq->wqe_sz,
	53	DMA_FROM_DEVICE);
	54
	55	if (unlikely(dma_mapping_error(rq->pdev, dma_addr)))
	56	goto err_free_skb;
	57
fc11fbf9 SM	58	skb_reserve(skb, MLX5E_NET_IP_ALIGN);
fc11fbf9 SM	59
e586b3b0 AV	60	((dma_addr_t )skb->cb) = dma_addr;
	61	wqe->data.addr = cpu_to_be64(dma_addr + MLX5E_NET_IP_ALIGN);
	62
	63	rq->skb[ix] = skb;
	64
	65	return 0;
	66
	67	err_free_skb:
	68	dev_kfree_skb(skb);
	69
	70	return -ENOMEM;
	71	}
	72
	73	bool mlx5e_post_rx_wqes(struct mlx5e_rq *rq)
	74	{
	75	struct mlx5_wq_ll *wq = &rq->wq;
	76
	77	if (unlikely(!test_bit(MLX5E_RQ_STATE_POST_WQES_ENABLE, &rq->state)))
	78	return false;
	79
	80	while (!mlx5_wq_ll_is_full(wq)) {
	81	struct mlx5e_rx_wqe *wqe = mlx5_wq_ll_get_wqe(wq, wq->head);
	82
	83	if (unlikely(mlx5e_alloc_rx_wqe(rq, wqe, wq->head)))
	84	break;
	85
	86	mlx5_wq_ll_push(wq, be16_to_cpu(wqe->next.next_wqe_index));
	87	}
	88
	89	/* ensure wqes are visible to device before updating doorbell record */
	90	dma_wmb();
	91
	92	mlx5_wq_ll_update_db_record(wq);
	93
	94	return !mlx5_wq_ll_is_full(wq);
	95	}
	96
	97	static void mlx5e_lro_update_hdr(struct sk_buff skb, struct mlx5_cqe64 cqe)
	98	{
	99	struct ethhdr eth = (struct ethhdr )(skb->data);
	100	struct iphdr ipv4 = (struct iphdr )(skb->data + ETH_HLEN);
	101	struct ipv6hdr ipv6 = (struct ipv6hdr )(skb->data + ETH_HLEN);
	102	struct tcphdr *tcp;
	103
	104	u8 l4_hdr_type = get_cqe_l4_hdr_type(cqe);
	105	int tcp_ack = ((CQE_L4_HDR_TYPE_TCP_ACK_NO_DATA == l4_hdr_type) \|\|
	106	(CQE_L4_HDR_TYPE_TCP_ACK_AND_DATA == l4_hdr_type));
	107
	108	u16 tot_len = be32_to_cpu(cqe->byte_cnt) - ETH_HLEN;
	109
	110	if (eth->h_proto == htons(ETH_P_IP)) {
	111	tcp = (struct tcphdr *)(skb->data + ETH_HLEN +
	112	sizeof(struct iphdr));
	113	ipv6 = NULL;
d9a40271	114	skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
e586b3b0 AV	115	} else {
	116	tcp = (struct tcphdr *)(skb->data + ETH_HLEN +
	117	sizeof(struct ipv6hdr));
	118	ipv4 = NULL;
d9a40271	119	skb_shinfo(skb)->gso_type = SKB_GSO_TCPV6;
e586b3b0 AV	120	}
	121
	122	if (get_cqe_lro_tcppsh(cqe))
	123	tcp->psh = 1;
	124
	125	if (tcp_ack) {
	126	tcp->ack = 1;
	127	tcp->ack_seq = cqe->lro_ack_seq_num;
	128	tcp->window = cqe->lro_tcp_win;
	129	}
	130
	131	if (ipv4) {
	132	ipv4->ttl = cqe->lro_min_ttl;
	133	ipv4->tot_len = cpu_to_be16(tot_len);
	134	ipv4->check = 0;
	135	ipv4->check = ip_fast_csum((unsigned char *)ipv4,
	136	ipv4->ihl);
	137	} else {
	138	ipv6->hop_limit = cqe->lro_min_ttl;
	139	ipv6->payload_len = cpu_to_be16(tot_len -
	140	sizeof(struct ipv6hdr));
	141	}
	142	}
	143
	144	static inline void mlx5e_skb_set_hash(struct mlx5_cqe64 *cqe,
	145	struct sk_buff *skb)
	146	{
	147	u8 cht = cqe->rss_hash_type;
	148	int ht = (cht & CQE_RSS_HTYPE_L4) ? PKT_HASH_TYPE_L4 :
	149	(cht & CQE_RSS_HTYPE_IP) ? PKT_HASH_TYPE_L3 :
	150	PKT_HASH_TYPE_NONE;
	151	skb_set_hash(skb, be32_to_cpu(cqe->rss_hash_result), ht);
	152	}
	153
bbceefce AS	154	static inline bool is_first_ethertype_ip(struct sk_buff *skb)
	155	{
	156	__be16 ethertype = ((struct ethhdr *)skb->data)->h_proto;
	157
	158	return (ethertype == htons(ETH_P_IP) \|\| ethertype == htons(ETH_P_IPV6));
	159	}
	160
	161	static inline void mlx5e_handle_csum(struct net_device *netdev,
	162	struct mlx5_cqe64 *cqe,
	163	struct mlx5e_rq *rq,
	164	struct sk_buff *skb)
	165	{
	166	if (unlikely(!(netdev->features & NETIF_F_RXCSUM)))
	167	goto csum_none;
	168
	169	if (likely(cqe->hds_ip_ext & CQE_L4_OK)) {
	170	skb->ip_summed = CHECKSUM_UNNECESSARY;
	171	} else if (is_first_ethertype_ip(skb)) {
	172	skb->ip_summed = CHECKSUM_COMPLETE;
	173	skb->csum = csum_unfold(cqe->check_sum);
	174	rq->stats.csum_sw++;
	175	} else {
	176	goto csum_none;
	177	}
	178
	179	return;
	180
	181	csum_none:
	182	skb->ip_summed = CHECKSUM_NONE;
	183	rq->stats.csum_none++;
	184	}
	185
e586b3b0 AV	186	static inline void mlx5e_build_rx_skb(struct mlx5_cqe64 *cqe,
	187	struct mlx5e_rq *rq,
	188	struct sk_buff *skb)
	189	{
	190	struct net_device *netdev = rq->netdev;
	191	u32 cqe_bcnt = be32_to_cpu(cqe->byte_cnt);
	192	int lro_num_seg;
	193
	194	skb_put(skb, cqe_bcnt);
	195
	196	lro_num_seg = be32_to_cpu(cqe->srqn) >> 24;
	197	if (lro_num_seg > 1) {
	198	mlx5e_lro_update_hdr(skb, cqe);
d9a40271	199	skb_shinfo(skb)->gso_size = DIV_ROUND_UP(cqe_bcnt, lro_num_seg);
e586b3b0 AV	200	rq->stats.lro_packets++;
	201	rq->stats.lro_bytes += cqe_bcnt;
	202	}
	203
bbceefce	204	mlx5e_handle_csum(netdev, cqe, rq, skb);
e586b3b0 AV	205
	206	skb->protocol = eth_type_trans(skb, netdev);
	207
	208	skb_record_rx_queue(skb, rq->ix);
	209
	210	if (likely(netdev->features & NETIF_F_RXHASH))
	211	mlx5e_skb_set_hash(cqe, skb);
	212
	213	if (cqe_has_vlan(cqe))
	214	__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
	215	be16_to_cpu(cqe->vlan_info));
	216	}
	217
	218	bool mlx5e_poll_rx_cq(struct mlx5e_cq *cq, int budget)
	219	{
e3391054	220	struct mlx5e_rq *rq = container_of(cq, struct mlx5e_rq, cq);
e586b3b0 AV	221	int i;
	222
	223	/* avoid accessing cq (dma coherent memory) if not needed */
	224	if (!test_and_clear_bit(MLX5E_CQ_HAS_CQES, &cq->flags))
	225	return false;
	226
	227	for (i = 0; i < budget; i++) {
	228	struct mlx5e_rx_wqe *wqe;
	229	struct mlx5_cqe64 *cqe;
	230	struct sk_buff *skb;
	231	__be16 wqe_counter_be;
	232	u16 wqe_counter;
	233
	234	cqe = mlx5e_get_cqe(cq);
	235	if (!cqe)
	236	break;
	237
a1f5a1a8 AS	238	mlx5_cqwq_pop(&cq->wq);
a1f5a1a8 AS	239
e586b3b0 AV	240	wqe_counter_be = cqe->wqe_counter;
	241	wqe_counter = be16_to_cpu(wqe_counter_be);
	242	wqe = mlx5_wq_ll_get_wqe(&rq->wq, wqe_counter);
	243	skb = rq->skb[wqe_counter];
99611ba1	244	prefetch(skb->data);
e586b3b0 AV	245	rq->skb[wqe_counter] = NULL;
	246
	247	dma_unmap_single(rq->pdev,
	248	((dma_addr_t )skb->cb),
fc11fbf9	249	rq->wqe_sz,
e586b3b0 AV	250	DMA_FROM_DEVICE);
	251
	252	if (unlikely((cqe->op_own >> 4) != MLX5_CQE_RESP_SEND)) {
	253	rq->stats.wqe_err++;
	254	dev_kfree_skb(skb);
	255	goto wq_ll_pop;
	256	}
	257
	258	mlx5e_build_rx_skb(cqe, rq, skb);
	259	rq->stats.packets++;
	260	napi_gro_receive(cq->napi, skb);
	261
	262	wq_ll_pop:
	263	mlx5_wq_ll_pop(&rq->wq, wqe_counter_be,
	264	&wqe->next.next_wqe_index);
	265	}
	266
	267	mlx5_cqwq_update_db_record(&cq->wq);
	268
	269	/* ensure cq space is freed before enabling more cqes */
	270	wmb();
	271
	272	if (i == budget) {
	273	set_bit(MLX5E_CQ_HAS_CQES, &cq->flags);
	274	return true;
	275	}
	276
	277	return false;
	278	}