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cb67b832 HHZ |
1 | /* |
2 | * Copyright (c) 2016, Mellanox Technologies. All rights reserved. | |
3 | * | |
4 | * This software is available to you under a choice of one of two | |
5 | * licenses. You may choose to be licensed under the terms of the GNU | |
6 | * General Public License (GPL) Version 2, available from the file | |
7 | * COPYING in the main directory of this source tree, or the | |
8 | * OpenIB.org BSD license below: | |
9 | * | |
10 | * Redistribution and use in source and binary forms, with or | |
11 | * without modification, are permitted provided that the following | |
12 | * conditions are met: | |
13 | * | |
14 | * - Redistributions of source code must retain the above | |
15 | * copyright notice, this list of conditions and the following | |
16 | * disclaimer. | |
17 | * | |
18 | * - Redistributions in binary form must reproduce the above | |
19 | * copyright notice, this list of conditions and the following | |
20 | * disclaimer in the documentation and/or other materials | |
21 | * provided with the distribution. | |
22 | * | |
23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
25 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
26 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | |
27 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | |
28 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | |
29 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | |
30 | * SOFTWARE. | |
31 | */ | |
32 | ||
33 | #include <generated/utsrelease.h> | |
34 | #include <linux/mlx5/fs.h> | |
35 | #include <net/switchdev.h> | |
d957b4e3 | 36 | #include <net/pkt_cls.h> |
717503b9 | 37 | #include <net/act_api.h> |
232c0013 HHZ |
38 | #include <net/netevent.h> |
39 | #include <net/arp.h> | |
cb67b832 HHZ |
40 | |
41 | #include "eswitch.h" | |
42 | #include "en.h" | |
1d447a39 | 43 | #include "en_rep.h" |
adb4c123 | 44 | #include "en_tc.h" |
f6dfb4c3 | 45 | #include "fs_core.h" |
cb67b832 HHZ |
46 | |
47 | static const char mlx5e_rep_driver_name[] = "mlx5e_rep"; | |
48 | ||
49 | static void mlx5e_rep_get_drvinfo(struct net_device *dev, | |
50 | struct ethtool_drvinfo *drvinfo) | |
51 | { | |
52 | strlcpy(drvinfo->driver, mlx5e_rep_driver_name, | |
53 | sizeof(drvinfo->driver)); | |
54 | strlcpy(drvinfo->version, UTS_RELEASE, sizeof(drvinfo->version)); | |
55 | } | |
56 | ||
57 | static const struct counter_desc sw_rep_stats_desc[] = { | |
58 | { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_packets) }, | |
59 | { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_bytes) }, | |
60 | { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_packets) }, | |
61 | { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_bytes) }, | |
62 | }; | |
63 | ||
64 | #define NUM_VPORT_REP_COUNTERS ARRAY_SIZE(sw_rep_stats_desc) | |
65 | ||
66 | static void mlx5e_rep_get_strings(struct net_device *dev, | |
67 | u32 stringset, uint8_t *data) | |
68 | { | |
69 | int i; | |
70 | ||
71 | switch (stringset) { | |
72 | case ETH_SS_STATS: | |
73 | for (i = 0; i < NUM_VPORT_REP_COUNTERS; i++) | |
74 | strcpy(data + (i * ETH_GSTRING_LEN), | |
75 | sw_rep_stats_desc[i].format); | |
76 | break; | |
77 | } | |
78 | } | |
79 | ||
370bad0f OG |
80 | static void mlx5e_rep_update_hw_counters(struct mlx5e_priv *priv) |
81 | { | |
82 | struct mlx5_eswitch *esw = priv->mdev->priv.eswitch; | |
1d447a39 SM |
83 | struct mlx5e_rep_priv *rpriv = priv->ppriv; |
84 | struct mlx5_eswitch_rep *rep = rpriv->rep; | |
370bad0f OG |
85 | struct rtnl_link_stats64 *vport_stats; |
86 | struct ifla_vf_stats vf_stats; | |
87 | int err; | |
88 | ||
89 | err = mlx5_eswitch_get_vport_stats(esw, rep->vport, &vf_stats); | |
90 | if (err) { | |
91 | pr_warn("vport %d error %d reading stats\n", rep->vport, err); | |
92 | return; | |
93 | } | |
94 | ||
95 | vport_stats = &priv->stats.vf_vport; | |
96 | /* flip tx/rx as we are reporting the counters for the switch vport */ | |
97 | vport_stats->rx_packets = vf_stats.tx_packets; | |
98 | vport_stats->rx_bytes = vf_stats.tx_bytes; | |
99 | vport_stats->tx_packets = vf_stats.rx_packets; | |
100 | vport_stats->tx_bytes = vf_stats.rx_bytes; | |
101 | } | |
102 | ||
103 | static void mlx5e_rep_update_sw_counters(struct mlx5e_priv *priv) | |
cb67b832 HHZ |
104 | { |
105 | struct mlx5e_sw_stats *s = &priv->stats.sw; | |
106 | struct mlx5e_rq_stats *rq_stats; | |
107 | struct mlx5e_sq_stats *sq_stats; | |
108 | int i, j; | |
109 | ||
110 | memset(s, 0, sizeof(*s)); | |
ff9c852f SM |
111 | for (i = 0; i < priv->channels.num; i++) { |
112 | struct mlx5e_channel *c = priv->channels.c[i]; | |
113 | ||
114 | rq_stats = &c->rq.stats; | |
cb67b832 HHZ |
115 | |
116 | s->rx_packets += rq_stats->packets; | |
117 | s->rx_bytes += rq_stats->bytes; | |
118 | ||
6a9764ef | 119 | for (j = 0; j < priv->channels.params.num_tc; j++) { |
ff9c852f | 120 | sq_stats = &c->sq[j].stats; |
cb67b832 HHZ |
121 | |
122 | s->tx_packets += sq_stats->packets; | |
123 | s->tx_bytes += sq_stats->bytes; | |
124 | } | |
125 | } | |
126 | } | |
127 | ||
370bad0f OG |
128 | static void mlx5e_rep_update_stats(struct mlx5e_priv *priv) |
129 | { | |
130 | mlx5e_rep_update_sw_counters(priv); | |
131 | mlx5e_rep_update_hw_counters(priv); | |
132 | } | |
133 | ||
cb67b832 HHZ |
134 | static void mlx5e_rep_get_ethtool_stats(struct net_device *dev, |
135 | struct ethtool_stats *stats, u64 *data) | |
136 | { | |
137 | struct mlx5e_priv *priv = netdev_priv(dev); | |
138 | int i; | |
139 | ||
140 | if (!data) | |
141 | return; | |
142 | ||
143 | mutex_lock(&priv->state_lock); | |
144 | if (test_bit(MLX5E_STATE_OPENED, &priv->state)) | |
370bad0f | 145 | mlx5e_rep_update_sw_counters(priv); |
cb67b832 HHZ |
146 | mutex_unlock(&priv->state_lock); |
147 | ||
148 | for (i = 0; i < NUM_VPORT_REP_COUNTERS; i++) | |
149 | data[i] = MLX5E_READ_CTR64_CPU(&priv->stats.sw, | |
150 | sw_rep_stats_desc, i); | |
151 | } | |
152 | ||
153 | static int mlx5e_rep_get_sset_count(struct net_device *dev, int sset) | |
154 | { | |
155 | switch (sset) { | |
156 | case ETH_SS_STATS: | |
157 | return NUM_VPORT_REP_COUNTERS; | |
158 | default: | |
159 | return -EOPNOTSUPP; | |
160 | } | |
161 | } | |
162 | ||
163 | static const struct ethtool_ops mlx5e_rep_ethtool_ops = { | |
164 | .get_drvinfo = mlx5e_rep_get_drvinfo, | |
165 | .get_link = ethtool_op_get_link, | |
166 | .get_strings = mlx5e_rep_get_strings, | |
167 | .get_sset_count = mlx5e_rep_get_sset_count, | |
168 | .get_ethtool_stats = mlx5e_rep_get_ethtool_stats, | |
169 | }; | |
170 | ||
171 | int mlx5e_attr_get(struct net_device *dev, struct switchdev_attr *attr) | |
172 | { | |
173 | struct mlx5e_priv *priv = netdev_priv(dev); | |
1d447a39 SM |
174 | struct mlx5e_rep_priv *rpriv = priv->ppriv; |
175 | struct mlx5_eswitch_rep *rep = rpriv->rep; | |
cb67b832 | 176 | struct mlx5_eswitch *esw = priv->mdev->priv.eswitch; |
cb67b832 HHZ |
177 | |
178 | if (esw->mode == SRIOV_NONE) | |
179 | return -EOPNOTSUPP; | |
180 | ||
181 | switch (attr->id) { | |
182 | case SWITCHDEV_ATTR_ID_PORT_PARENT_ID: | |
cb67b832 | 183 | attr->u.ppid.id_len = ETH_ALEN; |
dbe413e3 | 184 | ether_addr_copy(attr->u.ppid.id, rep->hw_id); |
cb67b832 HHZ |
185 | break; |
186 | default: | |
187 | return -EOPNOTSUPP; | |
188 | } | |
189 | ||
190 | return 0; | |
191 | } | |
192 | ||
193 | int mlx5e_add_sqs_fwd_rules(struct mlx5e_priv *priv) | |
cb67b832 HHZ |
194 | { |
195 | struct mlx5_eswitch *esw = priv->mdev->priv.eswitch; | |
1d447a39 SM |
196 | struct mlx5e_rep_priv *rpriv = priv->ppriv; |
197 | struct mlx5_eswitch_rep *rep = rpriv->rep; | |
cb67b832 | 198 | struct mlx5e_channel *c; |
9008ae07 SM |
199 | int n, tc, num_sqs = 0; |
200 | int err = -ENOMEM; | |
cb67b832 HHZ |
201 | u16 *sqs; |
202 | ||
6a9764ef | 203 | sqs = kcalloc(priv->channels.num * priv->channels.params.num_tc, sizeof(u16), GFP_KERNEL); |
cb67b832 | 204 | if (!sqs) |
9008ae07 | 205 | goto out; |
cb67b832 | 206 | |
ff9c852f SM |
207 | for (n = 0; n < priv->channels.num; n++) { |
208 | c = priv->channels.c[n]; | |
cb67b832 HHZ |
209 | for (tc = 0; tc < c->num_tc; tc++) |
210 | sqs[num_sqs++] = c->sq[tc].sqn; | |
211 | } | |
212 | ||
213 | err = mlx5_eswitch_sqs2vport_start(esw, rep, sqs, num_sqs); | |
cb67b832 | 214 | kfree(sqs); |
9008ae07 SM |
215 | |
216 | out: | |
217 | if (err) | |
218 | netdev_warn(priv->netdev, "Failed to add SQs FWD rules %d\n", err); | |
cb67b832 HHZ |
219 | return err; |
220 | } | |
221 | ||
cb67b832 HHZ |
222 | void mlx5e_remove_sqs_fwd_rules(struct mlx5e_priv *priv) |
223 | { | |
224 | struct mlx5_eswitch *esw = priv->mdev->priv.eswitch; | |
1d447a39 SM |
225 | struct mlx5e_rep_priv *rpriv = priv->ppriv; |
226 | struct mlx5_eswitch_rep *rep = rpriv->rep; | |
cb67b832 HHZ |
227 | |
228 | mlx5_eswitch_sqs2vport_stop(esw, rep); | |
229 | } | |
230 | ||
f6dfb4c3 HHZ |
231 | static void mlx5e_rep_neigh_update_init_interval(struct mlx5e_rep_priv *rpriv) |
232 | { | |
233 | #if IS_ENABLED(CONFIG_IPV6) | |
234 | unsigned long ipv6_interval = NEIGH_VAR(&ipv6_stub->nd_tbl->parms, | |
235 | DELAY_PROBE_TIME); | |
236 | #else | |
237 | unsigned long ipv6_interval = ~0UL; | |
238 | #endif | |
239 | unsigned long ipv4_interval = NEIGH_VAR(&arp_tbl.parms, | |
240 | DELAY_PROBE_TIME); | |
241 | struct net_device *netdev = rpriv->rep->netdev; | |
242 | struct mlx5e_priv *priv = netdev_priv(netdev); | |
243 | ||
244 | rpriv->neigh_update.min_interval = min_t(unsigned long, ipv6_interval, ipv4_interval); | |
245 | mlx5_fc_update_sampling_interval(priv->mdev, rpriv->neigh_update.min_interval); | |
246 | } | |
247 | ||
248 | void mlx5e_rep_queue_neigh_stats_work(struct mlx5e_priv *priv) | |
249 | { | |
250 | struct mlx5e_rep_priv *rpriv = priv->ppriv; | |
251 | struct mlx5e_neigh_update_table *neigh_update = &rpriv->neigh_update; | |
252 | ||
253 | mlx5_fc_queue_stats_work(priv->mdev, | |
254 | &neigh_update->neigh_stats_work, | |
255 | neigh_update->min_interval); | |
256 | } | |
257 | ||
258 | static void mlx5e_rep_neigh_stats_work(struct work_struct *work) | |
259 | { | |
260 | struct mlx5e_rep_priv *rpriv = container_of(work, struct mlx5e_rep_priv, | |
261 | neigh_update.neigh_stats_work.work); | |
262 | struct net_device *netdev = rpriv->rep->netdev; | |
263 | struct mlx5e_priv *priv = netdev_priv(netdev); | |
264 | struct mlx5e_neigh_hash_entry *nhe; | |
265 | ||
266 | rtnl_lock(); | |
267 | if (!list_empty(&rpriv->neigh_update.neigh_list)) | |
268 | mlx5e_rep_queue_neigh_stats_work(priv); | |
269 | ||
270 | list_for_each_entry(nhe, &rpriv->neigh_update.neigh_list, neigh_list) | |
271 | mlx5e_tc_update_neigh_used_value(nhe); | |
272 | ||
273 | rtnl_unlock(); | |
274 | } | |
275 | ||
232c0013 HHZ |
276 | static void mlx5e_rep_neigh_entry_hold(struct mlx5e_neigh_hash_entry *nhe) |
277 | { | |
278 | refcount_inc(&nhe->refcnt); | |
279 | } | |
280 | ||
281 | static void mlx5e_rep_neigh_entry_release(struct mlx5e_neigh_hash_entry *nhe) | |
282 | { | |
283 | if (refcount_dec_and_test(&nhe->refcnt)) | |
284 | kfree(nhe); | |
285 | } | |
286 | ||
287 | static void mlx5e_rep_update_flows(struct mlx5e_priv *priv, | |
288 | struct mlx5e_encap_entry *e, | |
289 | bool neigh_connected, | |
290 | unsigned char ha[ETH_ALEN]) | |
291 | { | |
292 | struct ethhdr *eth = (struct ethhdr *)e->encap_header; | |
293 | ||
294 | ASSERT_RTNL(); | |
295 | ||
296 | if ((!neigh_connected && (e->flags & MLX5_ENCAP_ENTRY_VALID)) || | |
297 | !ether_addr_equal(e->h_dest, ha)) | |
298 | mlx5e_tc_encap_flows_del(priv, e); | |
299 | ||
300 | if (neigh_connected && !(e->flags & MLX5_ENCAP_ENTRY_VALID)) { | |
301 | ether_addr_copy(e->h_dest, ha); | |
302 | ether_addr_copy(eth->h_dest, ha); | |
303 | ||
304 | mlx5e_tc_encap_flows_add(priv, e); | |
305 | } | |
306 | } | |
307 | ||
308 | static void mlx5e_rep_neigh_update(struct work_struct *work) | |
309 | { | |
310 | struct mlx5e_neigh_hash_entry *nhe = | |
311 | container_of(work, struct mlx5e_neigh_hash_entry, neigh_update_work); | |
312 | struct neighbour *n = nhe->n; | |
313 | struct mlx5e_encap_entry *e; | |
314 | unsigned char ha[ETH_ALEN]; | |
315 | struct mlx5e_priv *priv; | |
316 | bool neigh_connected; | |
317 | bool encap_connected; | |
318 | u8 nud_state, dead; | |
319 | ||
320 | rtnl_lock(); | |
321 | ||
322 | /* If these parameters are changed after we release the lock, | |
323 | * we'll receive another event letting us know about it. | |
324 | * We use this lock to avoid inconsistency between the neigh validity | |
325 | * and it's hw address. | |
326 | */ | |
327 | read_lock_bh(&n->lock); | |
328 | memcpy(ha, n->ha, ETH_ALEN); | |
329 | nud_state = n->nud_state; | |
330 | dead = n->dead; | |
331 | read_unlock_bh(&n->lock); | |
332 | ||
333 | neigh_connected = (nud_state & NUD_VALID) && !dead; | |
334 | ||
335 | list_for_each_entry(e, &nhe->encap_list, encap_list) { | |
336 | encap_connected = !!(e->flags & MLX5_ENCAP_ENTRY_VALID); | |
337 | priv = netdev_priv(e->out_dev); | |
338 | ||
339 | if (encap_connected != neigh_connected || | |
340 | !ether_addr_equal(e->h_dest, ha)) | |
341 | mlx5e_rep_update_flows(priv, e, neigh_connected, ha); | |
342 | } | |
343 | mlx5e_rep_neigh_entry_release(nhe); | |
344 | rtnl_unlock(); | |
345 | neigh_release(n); | |
346 | } | |
347 | ||
348 | static struct mlx5e_neigh_hash_entry * | |
349 | mlx5e_rep_neigh_entry_lookup(struct mlx5e_priv *priv, | |
350 | struct mlx5e_neigh *m_neigh); | |
351 | ||
352 | static int mlx5e_rep_netevent_event(struct notifier_block *nb, | |
353 | unsigned long event, void *ptr) | |
354 | { | |
355 | struct mlx5e_rep_priv *rpriv = container_of(nb, struct mlx5e_rep_priv, | |
356 | neigh_update.netevent_nb); | |
357 | struct mlx5e_neigh_update_table *neigh_update = &rpriv->neigh_update; | |
358 | struct net_device *netdev = rpriv->rep->netdev; | |
359 | struct mlx5e_priv *priv = netdev_priv(netdev); | |
360 | struct mlx5e_neigh_hash_entry *nhe = NULL; | |
361 | struct mlx5e_neigh m_neigh = {}; | |
a2fa1fe5 | 362 | struct neigh_parms *p; |
232c0013 | 363 | struct neighbour *n; |
a2fa1fe5 | 364 | bool found = false; |
232c0013 HHZ |
365 | |
366 | switch (event) { | |
367 | case NETEVENT_NEIGH_UPDATE: | |
368 | n = ptr; | |
369 | #if IS_ENABLED(CONFIG_IPV6) | |
370 | if (n->tbl != ipv6_stub->nd_tbl && n->tbl != &arp_tbl) | |
371 | #else | |
372 | if (n->tbl != &arp_tbl) | |
373 | #endif | |
374 | return NOTIFY_DONE; | |
375 | ||
376 | m_neigh.dev = n->dev; | |
f6dfb4c3 | 377 | m_neigh.family = n->ops->family; |
232c0013 HHZ |
378 | memcpy(&m_neigh.dst_ip, n->primary_key, n->tbl->key_len); |
379 | ||
380 | /* We are in atomic context and can't take RTNL mutex, so use | |
381 | * spin_lock_bh to lookup the neigh table. bh is used since | |
382 | * netevent can be called from a softirq context. | |
383 | */ | |
384 | spin_lock_bh(&neigh_update->encap_lock); | |
385 | nhe = mlx5e_rep_neigh_entry_lookup(priv, &m_neigh); | |
386 | if (!nhe) { | |
387 | spin_unlock_bh(&neigh_update->encap_lock); | |
388 | return NOTIFY_DONE; | |
389 | } | |
390 | ||
391 | /* This assignment is valid as long as the the neigh reference | |
392 | * is taken | |
393 | */ | |
394 | nhe->n = n; | |
395 | ||
396 | /* Take a reference to ensure the neighbour and mlx5 encap | |
397 | * entry won't be destructed until we drop the reference in | |
398 | * delayed work. | |
399 | */ | |
400 | neigh_hold(n); | |
401 | mlx5e_rep_neigh_entry_hold(nhe); | |
402 | ||
403 | if (!queue_work(priv->wq, &nhe->neigh_update_work)) { | |
404 | mlx5e_rep_neigh_entry_release(nhe); | |
405 | neigh_release(n); | |
406 | } | |
407 | spin_unlock_bh(&neigh_update->encap_lock); | |
408 | break; | |
a2fa1fe5 HHZ |
409 | |
410 | case NETEVENT_DELAY_PROBE_TIME_UPDATE: | |
411 | p = ptr; | |
412 | ||
413 | /* We check the device is present since we don't care about | |
414 | * changes in the default table, we only care about changes | |
415 | * done per device delay prob time parameter. | |
416 | */ | |
417 | #if IS_ENABLED(CONFIG_IPV6) | |
418 | if (!p->dev || (p->tbl != ipv6_stub->nd_tbl && p->tbl != &arp_tbl)) | |
419 | #else | |
420 | if (!p->dev || p->tbl != &arp_tbl) | |
421 | #endif | |
422 | return NOTIFY_DONE; | |
423 | ||
424 | /* We are in atomic context and can't take RTNL mutex, | |
425 | * so use spin_lock_bh to walk the neigh list and look for | |
426 | * the relevant device. bh is used since netevent can be | |
427 | * called from a softirq context. | |
428 | */ | |
429 | spin_lock_bh(&neigh_update->encap_lock); | |
430 | list_for_each_entry(nhe, &neigh_update->neigh_list, neigh_list) { | |
431 | if (p->dev == nhe->m_neigh.dev) { | |
432 | found = true; | |
433 | break; | |
434 | } | |
435 | } | |
436 | spin_unlock_bh(&neigh_update->encap_lock); | |
437 | if (!found) | |
438 | return NOTIFY_DONE; | |
439 | ||
440 | neigh_update->min_interval = min_t(unsigned long, | |
441 | NEIGH_VAR(p, DELAY_PROBE_TIME), | |
442 | neigh_update->min_interval); | |
443 | mlx5_fc_update_sampling_interval(priv->mdev, | |
444 | neigh_update->min_interval); | |
445 | break; | |
232c0013 HHZ |
446 | } |
447 | return NOTIFY_DONE; | |
448 | } | |
449 | ||
37b498ff HHZ |
450 | static const struct rhashtable_params mlx5e_neigh_ht_params = { |
451 | .head_offset = offsetof(struct mlx5e_neigh_hash_entry, rhash_node), | |
452 | .key_offset = offsetof(struct mlx5e_neigh_hash_entry, m_neigh), | |
453 | .key_len = sizeof(struct mlx5e_neigh), | |
454 | .automatic_shrinking = true, | |
455 | }; | |
456 | ||
457 | static int mlx5e_rep_neigh_init(struct mlx5e_rep_priv *rpriv) | |
458 | { | |
459 | struct mlx5e_neigh_update_table *neigh_update = &rpriv->neigh_update; | |
232c0013 HHZ |
460 | int err; |
461 | ||
462 | err = rhashtable_init(&neigh_update->neigh_ht, &mlx5e_neigh_ht_params); | |
463 | if (err) | |
464 | return err; | |
37b498ff HHZ |
465 | |
466 | INIT_LIST_HEAD(&neigh_update->neigh_list); | |
232c0013 | 467 | spin_lock_init(&neigh_update->encap_lock); |
f6dfb4c3 HHZ |
468 | INIT_DELAYED_WORK(&neigh_update->neigh_stats_work, |
469 | mlx5e_rep_neigh_stats_work); | |
470 | mlx5e_rep_neigh_update_init_interval(rpriv); | |
232c0013 HHZ |
471 | |
472 | rpriv->neigh_update.netevent_nb.notifier_call = mlx5e_rep_netevent_event; | |
473 | err = register_netevent_notifier(&rpriv->neigh_update.netevent_nb); | |
474 | if (err) | |
475 | goto out_err; | |
476 | return 0; | |
477 | ||
478 | out_err: | |
479 | rhashtable_destroy(&neigh_update->neigh_ht); | |
480 | return err; | |
37b498ff HHZ |
481 | } |
482 | ||
483 | static void mlx5e_rep_neigh_cleanup(struct mlx5e_rep_priv *rpriv) | |
484 | { | |
485 | struct mlx5e_neigh_update_table *neigh_update = &rpriv->neigh_update; | |
232c0013 HHZ |
486 | struct mlx5e_priv *priv = netdev_priv(rpriv->rep->netdev); |
487 | ||
488 | unregister_netevent_notifier(&neigh_update->netevent_nb); | |
489 | ||
490 | flush_workqueue(priv->wq); /* flush neigh update works */ | |
37b498ff | 491 | |
f6dfb4c3 HHZ |
492 | cancel_delayed_work_sync(&rpriv->neigh_update.neigh_stats_work); |
493 | ||
37b498ff HHZ |
494 | rhashtable_destroy(&neigh_update->neigh_ht); |
495 | } | |
496 | ||
497 | static int mlx5e_rep_neigh_entry_insert(struct mlx5e_priv *priv, | |
498 | struct mlx5e_neigh_hash_entry *nhe) | |
499 | { | |
500 | struct mlx5e_rep_priv *rpriv = priv->ppriv; | |
501 | int err; | |
502 | ||
503 | err = rhashtable_insert_fast(&rpriv->neigh_update.neigh_ht, | |
504 | &nhe->rhash_node, | |
505 | mlx5e_neigh_ht_params); | |
506 | if (err) | |
507 | return err; | |
508 | ||
509 | list_add(&nhe->neigh_list, &rpriv->neigh_update.neigh_list); | |
510 | ||
511 | return err; | |
512 | } | |
513 | ||
514 | static void mlx5e_rep_neigh_entry_remove(struct mlx5e_priv *priv, | |
515 | struct mlx5e_neigh_hash_entry *nhe) | |
516 | { | |
517 | struct mlx5e_rep_priv *rpriv = priv->ppriv; | |
518 | ||
232c0013 HHZ |
519 | spin_lock_bh(&rpriv->neigh_update.encap_lock); |
520 | ||
37b498ff HHZ |
521 | list_del(&nhe->neigh_list); |
522 | ||
523 | rhashtable_remove_fast(&rpriv->neigh_update.neigh_ht, | |
524 | &nhe->rhash_node, | |
525 | mlx5e_neigh_ht_params); | |
232c0013 | 526 | spin_unlock_bh(&rpriv->neigh_update.encap_lock); |
37b498ff HHZ |
527 | } |
528 | ||
232c0013 HHZ |
529 | /* This function must only be called under RTNL lock or under the |
530 | * representor's encap_lock in case RTNL mutex can't be held. | |
531 | */ | |
37b498ff HHZ |
532 | static struct mlx5e_neigh_hash_entry * |
533 | mlx5e_rep_neigh_entry_lookup(struct mlx5e_priv *priv, | |
534 | struct mlx5e_neigh *m_neigh) | |
535 | { | |
536 | struct mlx5e_rep_priv *rpriv = priv->ppriv; | |
537 | struct mlx5e_neigh_update_table *neigh_update = &rpriv->neigh_update; | |
538 | ||
539 | return rhashtable_lookup_fast(&neigh_update->neigh_ht, m_neigh, | |
540 | mlx5e_neigh_ht_params); | |
541 | } | |
542 | ||
232c0013 HHZ |
543 | static int mlx5e_rep_neigh_entry_create(struct mlx5e_priv *priv, |
544 | struct mlx5e_encap_entry *e, | |
545 | struct mlx5e_neigh_hash_entry **nhe) | |
546 | { | |
547 | int err; | |
548 | ||
549 | *nhe = kzalloc(sizeof(**nhe), GFP_KERNEL); | |
550 | if (!*nhe) | |
551 | return -ENOMEM; | |
552 | ||
553 | memcpy(&(*nhe)->m_neigh, &e->m_neigh, sizeof(e->m_neigh)); | |
554 | INIT_WORK(&(*nhe)->neigh_update_work, mlx5e_rep_neigh_update); | |
555 | INIT_LIST_HEAD(&(*nhe)->encap_list); | |
556 | refcount_set(&(*nhe)->refcnt, 1); | |
557 | ||
558 | err = mlx5e_rep_neigh_entry_insert(priv, *nhe); | |
559 | if (err) | |
560 | goto out_free; | |
561 | return 0; | |
562 | ||
563 | out_free: | |
564 | kfree(*nhe); | |
565 | return err; | |
566 | } | |
567 | ||
568 | static void mlx5e_rep_neigh_entry_destroy(struct mlx5e_priv *priv, | |
569 | struct mlx5e_neigh_hash_entry *nhe) | |
570 | { | |
571 | /* The neigh hash entry must be removed from the hash table regardless | |
572 | * of the reference count value, so it won't be found by the next | |
573 | * neigh notification call. The neigh hash entry reference count is | |
574 | * incremented only during creation and neigh notification calls and | |
575 | * protects from freeing the nhe struct. | |
576 | */ | |
577 | mlx5e_rep_neigh_entry_remove(priv, nhe); | |
578 | mlx5e_rep_neigh_entry_release(nhe); | |
579 | } | |
580 | ||
581 | int mlx5e_rep_encap_entry_attach(struct mlx5e_priv *priv, | |
582 | struct mlx5e_encap_entry *e) | |
583 | { | |
584 | struct mlx5e_neigh_hash_entry *nhe; | |
585 | int err; | |
586 | ||
587 | nhe = mlx5e_rep_neigh_entry_lookup(priv, &e->m_neigh); | |
588 | if (!nhe) { | |
589 | err = mlx5e_rep_neigh_entry_create(priv, e, &nhe); | |
590 | if (err) | |
591 | return err; | |
592 | } | |
593 | list_add(&e->encap_list, &nhe->encap_list); | |
594 | return 0; | |
595 | } | |
596 | ||
597 | void mlx5e_rep_encap_entry_detach(struct mlx5e_priv *priv, | |
598 | struct mlx5e_encap_entry *e) | |
599 | { | |
600 | struct mlx5e_neigh_hash_entry *nhe; | |
601 | ||
602 | list_del(&e->encap_list); | |
603 | nhe = mlx5e_rep_neigh_entry_lookup(priv, &e->m_neigh); | |
604 | ||
605 | if (list_empty(&nhe->encap_list)) | |
606 | mlx5e_rep_neigh_entry_destroy(priv, nhe); | |
607 | } | |
608 | ||
20a1ea67 OG |
609 | static int mlx5e_rep_open(struct net_device *dev) |
610 | { | |
611 | struct mlx5e_priv *priv = netdev_priv(dev); | |
1d447a39 SM |
612 | struct mlx5e_rep_priv *rpriv = priv->ppriv; |
613 | struct mlx5_eswitch_rep *rep = rpriv->rep; | |
20a1ea67 OG |
614 | struct mlx5_eswitch *esw = priv->mdev->priv.eswitch; |
615 | int err; | |
616 | ||
63bfd399 EBE |
617 | mutex_lock(&priv->state_lock); |
618 | err = mlx5e_open_locked(dev); | |
20a1ea67 | 619 | if (err) |
63bfd399 | 620 | goto unlock; |
20a1ea67 | 621 | |
63bfd399 EBE |
622 | if (!mlx5_eswitch_set_vport_state(esw, rep->vport, |
623 | MLX5_ESW_VPORT_ADMIN_STATE_UP)) | |
20a1ea67 OG |
624 | netif_carrier_on(dev); |
625 | ||
63bfd399 EBE |
626 | unlock: |
627 | mutex_unlock(&priv->state_lock); | |
628 | return err; | |
20a1ea67 OG |
629 | } |
630 | ||
631 | static int mlx5e_rep_close(struct net_device *dev) | |
632 | { | |
633 | struct mlx5e_priv *priv = netdev_priv(dev); | |
1d447a39 SM |
634 | struct mlx5e_rep_priv *rpriv = priv->ppriv; |
635 | struct mlx5_eswitch_rep *rep = rpriv->rep; | |
20a1ea67 | 636 | struct mlx5_eswitch *esw = priv->mdev->priv.eswitch; |
63bfd399 | 637 | int ret; |
20a1ea67 | 638 | |
63bfd399 | 639 | mutex_lock(&priv->state_lock); |
20a1ea67 | 640 | (void)mlx5_eswitch_set_vport_state(esw, rep->vport, MLX5_ESW_VPORT_ADMIN_STATE_DOWN); |
63bfd399 EBE |
641 | ret = mlx5e_close_locked(dev); |
642 | mutex_unlock(&priv->state_lock); | |
643 | return ret; | |
20a1ea67 OG |
644 | } |
645 | ||
cb67b832 HHZ |
646 | static int mlx5e_rep_get_phys_port_name(struct net_device *dev, |
647 | char *buf, size_t len) | |
648 | { | |
649 | struct mlx5e_priv *priv = netdev_priv(dev); | |
1d447a39 SM |
650 | struct mlx5e_rep_priv *rpriv = priv->ppriv; |
651 | struct mlx5_eswitch_rep *rep = rpriv->rep; | |
cb67b832 HHZ |
652 | int ret; |
653 | ||
654 | ret = snprintf(buf, len, "%d", rep->vport - 1); | |
655 | if (ret >= len) | |
656 | return -EOPNOTSUPP; | |
657 | ||
658 | return 0; | |
659 | } | |
660 | ||
de4784ca | 661 | static int |
855afa09 | 662 | mlx5e_rep_setup_tc_cls_flower(struct mlx5e_priv *priv, |
de4784ca | 663 | struct tc_cls_flower_offload *cls_flower) |
d957b4e3 | 664 | { |
855afa09 | 665 | if (cls_flower->common.chain_index) |
d957b4e3 OG |
666 | return -EOPNOTSUPP; |
667 | ||
8c818c27 JP |
668 | switch (cls_flower->command) { |
669 | case TC_CLSFLOWER_REPLACE: | |
5fd9fc4e | 670 | return mlx5e_configure_flower(priv, cls_flower); |
8c818c27 JP |
671 | case TC_CLSFLOWER_DESTROY: |
672 | return mlx5e_delete_flower(priv, cls_flower); | |
673 | case TC_CLSFLOWER_STATS: | |
674 | return mlx5e_stats_flower(priv, cls_flower); | |
675 | default: | |
a5fcf8a6 | 676 | return -EOPNOTSUPP; |
8c818c27 JP |
677 | } |
678 | } | |
a5fcf8a6 | 679 | |
855afa09 JP |
680 | static int mlx5e_rep_setup_tc_cb(enum tc_setup_type type, void *type_data, |
681 | void *cb_priv) | |
682 | { | |
683 | struct mlx5e_priv *priv = cb_priv; | |
684 | ||
44ae12a7 JP |
685 | if (!tc_can_offload(priv->netdev)) |
686 | return -EOPNOTSUPP; | |
687 | ||
855afa09 JP |
688 | switch (type) { |
689 | case TC_SETUP_CLSFLOWER: | |
690 | return mlx5e_rep_setup_tc_cls_flower(priv, type_data); | |
691 | default: | |
692 | return -EOPNOTSUPP; | |
693 | } | |
694 | } | |
695 | ||
696 | static int mlx5e_rep_setup_tc_block(struct net_device *dev, | |
697 | struct tc_block_offload *f) | |
698 | { | |
699 | struct mlx5e_priv *priv = netdev_priv(dev); | |
700 | ||
701 | if (f->binder_type != TCF_BLOCK_BINDER_TYPE_CLSACT_INGRESS) | |
702 | return -EOPNOTSUPP; | |
703 | ||
704 | switch (f->command) { | |
705 | case TC_BLOCK_BIND: | |
706 | return tcf_block_cb_register(f->block, mlx5e_rep_setup_tc_cb, | |
707 | priv, priv); | |
708 | case TC_BLOCK_UNBIND: | |
709 | tcf_block_cb_unregister(f->block, mlx5e_rep_setup_tc_cb, priv); | |
710 | return 0; | |
711 | default: | |
712 | return -EOPNOTSUPP; | |
713 | } | |
714 | } | |
715 | ||
8c818c27 | 716 | static int mlx5e_rep_setup_tc(struct net_device *dev, enum tc_setup_type type, |
de4784ca | 717 | void *type_data) |
8c818c27 | 718 | { |
2572ac53 | 719 | switch (type) { |
855afa09 JP |
720 | case TC_SETUP_BLOCK: |
721 | return mlx5e_rep_setup_tc_block(dev, type_data); | |
d957b4e3 OG |
722 | default: |
723 | return -EOPNOTSUPP; | |
724 | } | |
725 | } | |
726 | ||
370bad0f OG |
727 | bool mlx5e_is_uplink_rep(struct mlx5e_priv *priv) |
728 | { | |
370bad0f | 729 | struct mlx5_eswitch *esw = priv->mdev->priv.eswitch; |
1d447a39 SM |
730 | struct mlx5e_rep_priv *rpriv = priv->ppriv; |
731 | struct mlx5_eswitch_rep *rep; | |
732 | ||
733 | if (!MLX5_CAP_GEN(priv->mdev, vport_group_manager)) | |
734 | return false; | |
370bad0f | 735 | |
1d447a39 SM |
736 | rep = rpriv->rep; |
737 | if (esw->mode == SRIOV_OFFLOADS && | |
738 | rep && rep->vport == FDB_UPLINK_VPORT) | |
370bad0f OG |
739 | return true; |
740 | ||
741 | return false; | |
742 | } | |
743 | ||
20fd0c19 | 744 | static bool mlx5e_is_vf_vport_rep(struct mlx5e_priv *priv) |
370bad0f | 745 | { |
1d447a39 SM |
746 | struct mlx5e_rep_priv *rpriv = priv->ppriv; |
747 | struct mlx5_eswitch_rep *rep = rpriv->rep; | |
370bad0f OG |
748 | |
749 | if (rep && rep->vport != FDB_UPLINK_VPORT) | |
750 | return true; | |
751 | ||
752 | return false; | |
753 | } | |
754 | ||
755 | bool mlx5e_has_offload_stats(const struct net_device *dev, int attr_id) | |
756 | { | |
757 | struct mlx5e_priv *priv = netdev_priv(dev); | |
758 | ||
759 | switch (attr_id) { | |
760 | case IFLA_OFFLOAD_XSTATS_CPU_HIT: | |
761 | if (mlx5e_is_vf_vport_rep(priv) || mlx5e_is_uplink_rep(priv)) | |
762 | return true; | |
763 | } | |
764 | ||
765 | return false; | |
766 | } | |
767 | ||
768 | static int | |
769 | mlx5e_get_sw_stats64(const struct net_device *dev, | |
770 | struct rtnl_link_stats64 *stats) | |
771 | { | |
772 | struct mlx5e_priv *priv = netdev_priv(dev); | |
773 | struct mlx5e_sw_stats *sstats = &priv->stats.sw; | |
774 | ||
775 | stats->rx_packets = sstats->rx_packets; | |
776 | stats->rx_bytes = sstats->rx_bytes; | |
777 | stats->tx_packets = sstats->tx_packets; | |
778 | stats->tx_bytes = sstats->tx_bytes; | |
779 | ||
780 | stats->tx_dropped = sstats->tx_queue_dropped; | |
781 | ||
782 | return 0; | |
783 | } | |
784 | ||
785 | int mlx5e_get_offload_stats(int attr_id, const struct net_device *dev, | |
786 | void *sp) | |
787 | { | |
788 | switch (attr_id) { | |
789 | case IFLA_OFFLOAD_XSTATS_CPU_HIT: | |
790 | return mlx5e_get_sw_stats64(dev, sp); | |
791 | } | |
792 | ||
793 | return -EINVAL; | |
794 | } | |
795 | ||
bc1f4470 | 796 | static void |
370bad0f OG |
797 | mlx5e_rep_get_stats(struct net_device *dev, struct rtnl_link_stats64 *stats) |
798 | { | |
799 | struct mlx5e_priv *priv = netdev_priv(dev); | |
800 | ||
801 | memcpy(stats, &priv->stats.vf_vport, sizeof(*stats)); | |
370bad0f OG |
802 | } |
803 | ||
cb67b832 HHZ |
804 | static const struct switchdev_ops mlx5e_rep_switchdev_ops = { |
805 | .switchdev_port_attr_get = mlx5e_attr_get, | |
806 | }; | |
807 | ||
808 | static const struct net_device_ops mlx5e_netdev_ops_rep = { | |
20a1ea67 OG |
809 | .ndo_open = mlx5e_rep_open, |
810 | .ndo_stop = mlx5e_rep_close, | |
cb67b832 HHZ |
811 | .ndo_start_xmit = mlx5e_xmit, |
812 | .ndo_get_phys_port_name = mlx5e_rep_get_phys_port_name, | |
8c818c27 | 813 | .ndo_setup_tc = mlx5e_rep_setup_tc, |
370bad0f OG |
814 | .ndo_get_stats64 = mlx5e_rep_get_stats, |
815 | .ndo_has_offload_stats = mlx5e_has_offload_stats, | |
816 | .ndo_get_offload_stats = mlx5e_get_offload_stats, | |
cb67b832 HHZ |
817 | }; |
818 | ||
6a9764ef SM |
819 | static void mlx5e_build_rep_params(struct mlx5_core_dev *mdev, |
820 | struct mlx5e_params *params) | |
cb67b832 | 821 | { |
cb67b832 HHZ |
822 | u8 cq_period_mode = MLX5_CAP_GEN(mdev, cq_period_start_from_cqe) ? |
823 | MLX5_CQ_PERIOD_MODE_START_FROM_CQE : | |
824 | MLX5_CQ_PERIOD_MODE_START_FROM_EQE; | |
825 | ||
6a9764ef SM |
826 | params->log_sq_size = MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE; |
827 | params->rq_wq_type = MLX5_WQ_TYPE_LINKED_LIST; | |
828 | params->log_rq_size = MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE; | |
cb67b832 | 829 | |
6a9764ef SM |
830 | params->rx_am_enabled = MLX5_CAP_GEN(mdev, cq_moderation); |
831 | mlx5e_set_rx_cq_mode_params(params, cq_period_mode); | |
cb67b832 | 832 | |
6a9764ef SM |
833 | params->tx_max_inline = mlx5e_get_max_inline_cap(mdev); |
834 | params->num_tc = 1; | |
835 | params->lro_wqe_sz = MLX5E_PARAMS_DEFAULT_LRO_WQE_SZ; | |
5f195c2c CM |
836 | |
837 | mlx5_query_min_inline(mdev, ¶ms->tx_min_inline_mode); | |
cb67b832 HHZ |
838 | } |
839 | ||
840 | static void mlx5e_build_rep_netdev(struct net_device *netdev) | |
841 | { | |
842 | netdev->netdev_ops = &mlx5e_netdev_ops_rep; | |
843 | ||
844 | netdev->watchdog_timeo = 15 * HZ; | |
845 | ||
846 | netdev->ethtool_ops = &mlx5e_rep_ethtool_ops; | |
847 | ||
848 | #ifdef CONFIG_NET_SWITCHDEV | |
849 | netdev->switchdev_ops = &mlx5e_rep_switchdev_ops; | |
850 | #endif | |
851 | ||
abd32772 | 852 | netdev->features |= NETIF_F_VLAN_CHALLENGED | NETIF_F_HW_TC | NETIF_F_NETNS_LOCAL; |
d957b4e3 | 853 | netdev->hw_features |= NETIF_F_HW_TC; |
cb67b832 HHZ |
854 | |
855 | eth_hw_addr_random(netdev); | |
856 | } | |
857 | ||
858 | static void mlx5e_init_rep(struct mlx5_core_dev *mdev, | |
859 | struct net_device *netdev, | |
860 | const struct mlx5e_profile *profile, | |
861 | void *ppriv) | |
862 | { | |
6a9764ef SM |
863 | struct mlx5e_priv *priv = netdev_priv(netdev); |
864 | ||
865 | priv->mdev = mdev; | |
866 | priv->netdev = netdev; | |
867 | priv->profile = profile; | |
868 | priv->ppriv = ppriv; | |
869 | ||
870 | mutex_init(&priv->state_lock); | |
871 | ||
872 | INIT_DELAYED_WORK(&priv->update_stats_work, mlx5e_update_stats_work); | |
873 | ||
874 | priv->channels.params.num_channels = profile->max_nch(mdev); | |
c139dbfd ES |
875 | |
876 | priv->hard_mtu = MLX5E_ETH_HARD_MTU; | |
877 | ||
6a9764ef | 878 | mlx5e_build_rep_params(mdev, &priv->channels.params); |
cb67b832 | 879 | mlx5e_build_rep_netdev(netdev); |
237f258c FD |
880 | |
881 | mlx5e_timestamp_init(priv); | |
cb67b832 HHZ |
882 | } |
883 | ||
884 | static int mlx5e_init_rep_rx(struct mlx5e_priv *priv) | |
885 | { | |
886 | struct mlx5_eswitch *esw = priv->mdev->priv.eswitch; | |
1d447a39 SM |
887 | struct mlx5e_rep_priv *rpriv = priv->ppriv; |
888 | struct mlx5_eswitch_rep *rep = rpriv->rep; | |
74491de9 | 889 | struct mlx5_flow_handle *flow_rule; |
cb67b832 | 890 | int err; |
cb67b832 | 891 | |
2c3b5bee SM |
892 | mlx5e_init_l2_addr(priv); |
893 | ||
cb67b832 | 894 | err = mlx5e_create_direct_rqts(priv); |
8f493ffd | 895 | if (err) |
cb67b832 | 896 | return err; |
cb67b832 HHZ |
897 | |
898 | err = mlx5e_create_direct_tirs(priv); | |
8f493ffd | 899 | if (err) |
cb67b832 | 900 | goto err_destroy_direct_rqts; |
cb67b832 HHZ |
901 | |
902 | flow_rule = mlx5_eswitch_create_vport_rx_rule(esw, | |
903 | rep->vport, | |
904 | priv->direct_tir[0].tirn); | |
905 | if (IS_ERR(flow_rule)) { | |
906 | err = PTR_ERR(flow_rule); | |
907 | goto err_destroy_direct_tirs; | |
908 | } | |
909 | rep->vport_rx_rule = flow_rule; | |
910 | ||
d957b4e3 OG |
911 | err = mlx5e_tc_init(priv); |
912 | if (err) | |
913 | goto err_del_flow_rule; | |
914 | ||
cb67b832 HHZ |
915 | return 0; |
916 | ||
d957b4e3 | 917 | err_del_flow_rule: |
74491de9 | 918 | mlx5_del_flow_rules(rep->vport_rx_rule); |
cb67b832 HHZ |
919 | err_destroy_direct_tirs: |
920 | mlx5e_destroy_direct_tirs(priv); | |
921 | err_destroy_direct_rqts: | |
8f493ffd | 922 | mlx5e_destroy_direct_rqts(priv); |
cb67b832 HHZ |
923 | return err; |
924 | } | |
925 | ||
926 | static void mlx5e_cleanup_rep_rx(struct mlx5e_priv *priv) | |
927 | { | |
1d447a39 SM |
928 | struct mlx5e_rep_priv *rpriv = priv->ppriv; |
929 | struct mlx5_eswitch_rep *rep = rpriv->rep; | |
cb67b832 | 930 | |
d957b4e3 | 931 | mlx5e_tc_cleanup(priv); |
74491de9 | 932 | mlx5_del_flow_rules(rep->vport_rx_rule); |
cb67b832 | 933 | mlx5e_destroy_direct_tirs(priv); |
8f493ffd | 934 | mlx5e_destroy_direct_rqts(priv); |
cb67b832 HHZ |
935 | } |
936 | ||
937 | static int mlx5e_init_rep_tx(struct mlx5e_priv *priv) | |
938 | { | |
939 | int err; | |
940 | ||
941 | err = mlx5e_create_tises(priv); | |
942 | if (err) { | |
943 | mlx5_core_warn(priv->mdev, "create tises failed, %d\n", err); | |
944 | return err; | |
945 | } | |
946 | return 0; | |
947 | } | |
948 | ||
949 | static int mlx5e_get_rep_max_num_channels(struct mlx5_core_dev *mdev) | |
950 | { | |
951 | #define MLX5E_PORT_REPRESENTOR_NCH 1 | |
952 | return MLX5E_PORT_REPRESENTOR_NCH; | |
953 | } | |
954 | ||
39a7e589 | 955 | static const struct mlx5e_profile mlx5e_rep_profile = { |
cb67b832 HHZ |
956 | .init = mlx5e_init_rep, |
957 | .init_rx = mlx5e_init_rep_rx, | |
958 | .cleanup_rx = mlx5e_cleanup_rep_rx, | |
959 | .init_tx = mlx5e_init_rep_tx, | |
960 | .cleanup_tx = mlx5e_cleanup_nic_tx, | |
370bad0f | 961 | .update_stats = mlx5e_rep_update_stats, |
cb67b832 | 962 | .max_nch = mlx5e_get_rep_max_num_channels, |
7ca42c80 | 963 | .update_carrier = NULL, |
20fd0c19 SM |
964 | .rx_handlers.handle_rx_cqe = mlx5e_handle_rx_cqe_rep, |
965 | .rx_handlers.handle_rx_cqe_mpwqe = NULL /* Not supported */, | |
cb67b832 HHZ |
966 | .max_tc = 1, |
967 | }; | |
968 | ||
1d447a39 SM |
969 | /* e-Switch vport representors */ |
970 | ||
971 | static int | |
972 | mlx5e_nic_rep_load(struct mlx5_eswitch *esw, struct mlx5_eswitch_rep *rep) | |
973 | { | |
37b498ff HHZ |
974 | struct mlx5e_priv *priv = netdev_priv(rep->netdev); |
975 | struct mlx5e_rep_priv *rpriv = priv->ppriv; | |
976 | ||
977 | int err; | |
978 | ||
979 | if (test_bit(MLX5E_STATE_OPENED, &priv->state)) { | |
980 | err = mlx5e_add_sqs_fwd_rules(priv); | |
981 | if (err) | |
982 | return err; | |
983 | } | |
984 | ||
985 | err = mlx5e_rep_neigh_init(rpriv); | |
986 | if (err) | |
987 | goto err_remove_sqs; | |
1d447a39 | 988 | |
1d447a39 | 989 | return 0; |
37b498ff HHZ |
990 | |
991 | err_remove_sqs: | |
992 | mlx5e_remove_sqs_fwd_rules(priv); | |
993 | return err; | |
1d447a39 SM |
994 | } |
995 | ||
996 | static void | |
997 | mlx5e_nic_rep_unload(struct mlx5_eswitch *esw, struct mlx5_eswitch_rep *rep) | |
cb67b832 | 998 | { |
37b498ff HHZ |
999 | struct mlx5e_priv *priv = netdev_priv(rep->netdev); |
1000 | struct mlx5e_rep_priv *rpriv = priv->ppriv; | |
1d447a39 SM |
1001 | |
1002 | if (test_bit(MLX5E_STATE_OPENED, &priv->state)) | |
1003 | mlx5e_remove_sqs_fwd_rules(priv); | |
1004 | ||
1005 | /* clean (and re-init) existing uplink offloaded TC rules */ | |
1006 | mlx5e_tc_cleanup(priv); | |
1007 | mlx5e_tc_init(priv); | |
37b498ff HHZ |
1008 | |
1009 | mlx5e_rep_neigh_cleanup(rpriv); | |
1d447a39 SM |
1010 | } |
1011 | ||
1012 | static int | |
1013 | mlx5e_vport_rep_load(struct mlx5_eswitch *esw, struct mlx5_eswitch_rep *rep) | |
1014 | { | |
1015 | struct mlx5e_rep_priv *rpriv; | |
26e59d80 | 1016 | struct net_device *netdev; |
d6c862ba | 1017 | struct mlx5e_priv *upriv; |
26e59d80 MHY |
1018 | int err; |
1019 | ||
1d447a39 SM |
1020 | rpriv = kzalloc(sizeof(*rpriv), GFP_KERNEL); |
1021 | if (!rpriv) | |
1022 | return -ENOMEM; | |
1023 | ||
1024 | netdev = mlx5e_create_netdev(esw->dev, &mlx5e_rep_profile, rpriv); | |
26e59d80 MHY |
1025 | if (!netdev) { |
1026 | pr_warn("Failed to create representor netdev for vport %d\n", | |
1027 | rep->vport); | |
1d447a39 | 1028 | kfree(rpriv); |
cb67b832 HHZ |
1029 | return -EINVAL; |
1030 | } | |
26e59d80 | 1031 | |
726293f1 | 1032 | rep->netdev = netdev; |
1d447a39 | 1033 | rpriv->rep = rep; |
26e59d80 | 1034 | |
2c3b5bee | 1035 | err = mlx5e_attach_netdev(netdev_priv(netdev)); |
26e59d80 MHY |
1036 | if (err) { |
1037 | pr_warn("Failed to attach representor netdev for vport %d\n", | |
1038 | rep->vport); | |
1039 | goto err_destroy_netdev; | |
1040 | } | |
1041 | ||
37b498ff HHZ |
1042 | err = mlx5e_rep_neigh_init(rpriv); |
1043 | if (err) { | |
1044 | pr_warn("Failed to initialized neighbours handling for vport %d\n", | |
1045 | rep->vport); | |
1046 | goto err_detach_netdev; | |
1047 | } | |
1048 | ||
d6c862ba JP |
1049 | upriv = netdev_priv(mlx5_eswitch_get_uplink_netdev(esw)); |
1050 | err = tc_setup_cb_egdev_register(netdev, mlx5e_setup_tc_block_cb, | |
1051 | upriv); | |
717503b9 JP |
1052 | if (err) |
1053 | goto err_neigh_cleanup; | |
1054 | ||
26e59d80 MHY |
1055 | err = register_netdev(netdev); |
1056 | if (err) { | |
1057 | pr_warn("Failed to register representor netdev for vport %d\n", | |
1058 | rep->vport); | |
717503b9 | 1059 | goto err_egdev_cleanup; |
26e59d80 MHY |
1060 | } |
1061 | ||
cb67b832 | 1062 | return 0; |
26e59d80 | 1063 | |
717503b9 | 1064 | err_egdev_cleanup: |
d6c862ba JP |
1065 | tc_setup_cb_egdev_unregister(netdev, mlx5e_setup_tc_block_cb, |
1066 | upriv); | |
717503b9 | 1067 | |
37b498ff HHZ |
1068 | err_neigh_cleanup: |
1069 | mlx5e_rep_neigh_cleanup(rpriv); | |
1070 | ||
26e59d80 | 1071 | err_detach_netdev: |
2c3b5bee | 1072 | mlx5e_detach_netdev(netdev_priv(netdev)); |
26e59d80 MHY |
1073 | |
1074 | err_destroy_netdev: | |
2c3b5bee | 1075 | mlx5e_destroy_netdev(netdev_priv(netdev)); |
1d447a39 | 1076 | kfree(rpriv); |
26e59d80 | 1077 | return err; |
cb67b832 HHZ |
1078 | } |
1079 | ||
1d447a39 SM |
1080 | static void |
1081 | mlx5e_vport_rep_unload(struct mlx5_eswitch *esw, struct mlx5_eswitch_rep *rep) | |
cb67b832 | 1082 | { |
726293f1 | 1083 | struct net_device *netdev = rep->netdev; |
1d447a39 | 1084 | struct mlx5e_priv *priv = netdev_priv(netdev); |
37b498ff | 1085 | struct mlx5e_rep_priv *rpriv = priv->ppriv; |
1d447a39 | 1086 | void *ppriv = priv->ppriv; |
d6c862ba | 1087 | struct mlx5e_priv *upriv; |
cb67b832 | 1088 | |
37b498ff | 1089 | unregister_netdev(rep->netdev); |
d6c862ba JP |
1090 | upriv = netdev_priv(mlx5_eswitch_get_uplink_netdev(esw)); |
1091 | tc_setup_cb_egdev_unregister(netdev, mlx5e_setup_tc_block_cb, | |
1092 | upriv); | |
37b498ff | 1093 | mlx5e_rep_neigh_cleanup(rpriv); |
1d447a39 SM |
1094 | mlx5e_detach_netdev(priv); |
1095 | mlx5e_destroy_netdev(priv); | |
1096 | kfree(ppriv); /* mlx5e_rep_priv */ | |
1097 | } | |
1098 | ||
1099 | static void mlx5e_rep_register_vf_vports(struct mlx5e_priv *priv) | |
1100 | { | |
1101 | struct mlx5_core_dev *mdev = priv->mdev; | |
1102 | struct mlx5_eswitch *esw = mdev->priv.eswitch; | |
1103 | int total_vfs = MLX5_TOTAL_VPORTS(mdev); | |
1104 | int vport; | |
1105 | u8 mac[ETH_ALEN]; | |
1106 | ||
1107 | mlx5_query_nic_vport_mac_address(mdev, 0, mac); | |
1108 | ||
1109 | for (vport = 1; vport < total_vfs; vport++) { | |
1110 | struct mlx5_eswitch_rep rep; | |
1111 | ||
1112 | rep.load = mlx5e_vport_rep_load; | |
1113 | rep.unload = mlx5e_vport_rep_unload; | |
1114 | rep.vport = vport; | |
1115 | ether_addr_copy(rep.hw_id, mac); | |
1116 | mlx5_eswitch_register_vport_rep(esw, vport, &rep); | |
1117 | } | |
1118 | } | |
1119 | ||
1120 | static void mlx5e_rep_unregister_vf_vports(struct mlx5e_priv *priv) | |
1121 | { | |
1122 | struct mlx5_core_dev *mdev = priv->mdev; | |
1123 | struct mlx5_eswitch *esw = mdev->priv.eswitch; | |
1124 | int total_vfs = MLX5_TOTAL_VPORTS(mdev); | |
1125 | int vport; | |
1126 | ||
1127 | for (vport = 1; vport < total_vfs; vport++) | |
1128 | mlx5_eswitch_unregister_vport_rep(esw, vport); | |
1129 | } | |
1130 | ||
1131 | void mlx5e_register_vport_reps(struct mlx5e_priv *priv) | |
1132 | { | |
1133 | struct mlx5_core_dev *mdev = priv->mdev; | |
1134 | struct mlx5_eswitch *esw = mdev->priv.eswitch; | |
1135 | struct mlx5_eswitch_rep rep; | |
1136 | ||
1137 | mlx5_query_nic_vport_mac_address(mdev, 0, rep.hw_id); | |
1138 | rep.load = mlx5e_nic_rep_load; | |
1139 | rep.unload = mlx5e_nic_rep_unload; | |
1140 | rep.vport = FDB_UPLINK_VPORT; | |
1141 | rep.netdev = priv->netdev; | |
1142 | mlx5_eswitch_register_vport_rep(esw, 0, &rep); /* UPLINK PF vport*/ | |
1143 | ||
1144 | mlx5e_rep_register_vf_vports(priv); /* VFs vports */ | |
1145 | } | |
1146 | ||
1147 | void mlx5e_unregister_vport_reps(struct mlx5e_priv *priv) | |
1148 | { | |
1149 | struct mlx5_core_dev *mdev = priv->mdev; | |
1150 | struct mlx5_eswitch *esw = mdev->priv.eswitch; | |
1151 | ||
1152 | mlx5e_rep_unregister_vf_vports(priv); /* VFs vports */ | |
1153 | mlx5_eswitch_unregister_vport_rep(esw, 0); /* UPLINK PF*/ | |
cb67b832 | 1154 | } |
07c9f1e5 SM |
1155 | |
1156 | void *mlx5e_alloc_nic_rep_priv(struct mlx5_core_dev *mdev) | |
1157 | { | |
1158 | struct mlx5_eswitch *esw = mdev->priv.eswitch; | |
1159 | struct mlx5e_rep_priv *rpriv; | |
1160 | ||
1161 | rpriv = kzalloc(sizeof(*rpriv), GFP_KERNEL); | |
1162 | if (!rpriv) | |
1163 | return NULL; | |
1164 | ||
1165 | rpriv->rep = &esw->offloads.vport_reps[0]; | |
1166 | return rpriv; | |
1167 | } |