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fe6d86b3 SM |
1 | /* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */ |
2 | /* Copyright (c) 2018 Mellanox Technologies. */ | |
3 | ||
4 | #ifndef __MLX5E_FLOW_STEER_H__ | |
5 | #define __MLX5E_FLOW_STEER_H__ | |
6 | ||
44f68ae0 SM |
7 | enum { |
8 | MLX5E_TC_FT_LEVEL = 0, | |
9 | MLX5E_TC_TTC_FT_LEVEL, | |
10 | }; | |
11 | ||
12 | struct mlx5e_tc_table { | |
13 | struct mlx5_flow_table *t; | |
14 | ||
15 | struct rhashtable ht; | |
16 | ||
17 | DECLARE_HASHTABLE(mod_hdr_tbl, 8); | |
18 | DECLARE_HASHTABLE(hairpin_tbl, 8); | |
4d8fcf21 AH |
19 | |
20 | struct notifier_block netdevice_nb; | |
44f68ae0 SM |
21 | }; |
22 | ||
ec080045 SM |
23 | struct mlx5e_flow_table { |
24 | int num_groups; | |
25 | struct mlx5_flow_table *t; | |
26 | struct mlx5_flow_group **g; | |
27 | }; | |
28 | ||
44f68ae0 SM |
29 | struct mlx5e_l2_rule { |
30 | u8 addr[ETH_ALEN + 2]; | |
31 | struct mlx5_flow_handle *rule; | |
32 | }; | |
33 | ||
34 | #define MLX5E_L2_ADDR_HASH_SIZE BIT(BITS_PER_BYTE) | |
35 | ||
36 | struct mlx5e_vlan_table { | |
37 | struct mlx5e_flow_table ft; | |
38 | DECLARE_BITMAP(active_cvlans, VLAN_N_VID); | |
39 | DECLARE_BITMAP(active_svlans, VLAN_N_VID); | |
40 | struct mlx5_flow_handle *active_cvlans_rule[VLAN_N_VID]; | |
41 | struct mlx5_flow_handle *active_svlans_rule[VLAN_N_VID]; | |
42 | struct mlx5_flow_handle *untagged_rule; | |
43 | struct mlx5_flow_handle *any_cvlan_rule; | |
44 | struct mlx5_flow_handle *any_svlan_rule; | |
45 | bool cvlan_filter_disabled; | |
46 | }; | |
47 | ||
48 | struct mlx5e_l2_table { | |
49 | struct mlx5e_flow_table ft; | |
50 | struct hlist_head netdev_uc[MLX5E_L2_ADDR_HASH_SIZE]; | |
51 | struct hlist_head netdev_mc[MLX5E_L2_ADDR_HASH_SIZE]; | |
52 | struct mlx5e_l2_rule broadcast; | |
53 | struct mlx5e_l2_rule allmulti; | |
54 | struct mlx5e_l2_rule promisc; | |
55 | bool broadcast_enabled; | |
56 | bool allmulti_enabled; | |
57 | bool promisc_enabled; | |
58 | }; | |
59 | ||
60 | enum mlx5e_traffic_types { | |
61 | MLX5E_TT_IPV4_TCP, | |
62 | MLX5E_TT_IPV6_TCP, | |
63 | MLX5E_TT_IPV4_UDP, | |
64 | MLX5E_TT_IPV6_UDP, | |
65 | MLX5E_TT_IPV4_IPSEC_AH, | |
66 | MLX5E_TT_IPV6_IPSEC_AH, | |
67 | MLX5E_TT_IPV4_IPSEC_ESP, | |
68 | MLX5E_TT_IPV6_IPSEC_ESP, | |
69 | MLX5E_TT_IPV4, | |
70 | MLX5E_TT_IPV6, | |
71 | MLX5E_TT_ANY, | |
72 | MLX5E_NUM_TT, | |
73 | MLX5E_NUM_INDIR_TIRS = MLX5E_TT_ANY, | |
74 | }; | |
75 | ||
76 | enum mlx5e_tunnel_types { | |
77 | MLX5E_TT_IPV4_GRE, | |
78 | MLX5E_TT_IPV6_GRE, | |
79 | MLX5E_NUM_TUNNEL_TT, | |
80 | }; | |
81 | ||
82 | /* L3/L4 traffic type classifier */ | |
83 | struct mlx5e_ttc_table { | |
84 | struct mlx5e_flow_table ft; | |
85 | struct mlx5_flow_handle *rules[MLX5E_NUM_TT]; | |
86 | struct mlx5_flow_handle *tunnel_rules[MLX5E_NUM_TUNNEL_TT]; | |
87 | }; | |
88 | ||
89 | /* NIC prio FTS */ | |
90 | enum { | |
91 | MLX5E_VLAN_FT_LEVEL = 0, | |
92 | MLX5E_L2_FT_LEVEL, | |
93 | MLX5E_TTC_FT_LEVEL, | |
94 | MLX5E_INNER_TTC_FT_LEVEL, | |
95 | #ifdef CONFIG_MLX5_EN_ARFS | |
96 | MLX5E_ARFS_FT_LEVEL | |
97 | #endif | |
98 | }; | |
99 | ||
fe6d86b3 SM |
100 | #ifdef CONFIG_MLX5_EN_RXNFC |
101 | ||
102 | struct mlx5e_ethtool_table { | |
103 | struct mlx5_flow_table *ft; | |
104 | int num_rules; | |
105 | }; | |
106 | ||
107 | #define ETHTOOL_NUM_L3_L4_FTS 7 | |
108 | #define ETHTOOL_NUM_L2_FTS 4 | |
109 | ||
110 | struct mlx5e_ethtool_steering { | |
111 | struct mlx5e_ethtool_table l3_l4_ft[ETHTOOL_NUM_L3_L4_FTS]; | |
112 | struct mlx5e_ethtool_table l2_ft[ETHTOOL_NUM_L2_FTS]; | |
113 | struct list_head rules; | |
114 | int tot_num_rules; | |
115 | }; | |
116 | ||
117 | void mlx5e_ethtool_init_steering(struct mlx5e_priv *priv); | |
118 | void mlx5e_ethtool_cleanup_steering(struct mlx5e_priv *priv); | |
119 | int mlx5e_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd); | |
120 | int mlx5e_get_rxnfc(struct net_device *dev, | |
121 | struct ethtool_rxnfc *info, u32 *rule_locs); | |
122 | #else | |
123 | static inline void mlx5e_ethtool_init_steering(struct mlx5e_priv *priv) { } | |
124 | static inline void mlx5e_ethtool_cleanup_steering(struct mlx5e_priv *priv) { } | |
125 | #endif /* CONFIG_MLX5_EN_RXNFC */ | |
126 | ||
ec080045 SM |
127 | #ifdef CONFIG_MLX5_EN_ARFS |
128 | #define ARFS_HASH_SHIFT BITS_PER_BYTE | |
129 | #define ARFS_HASH_SIZE BIT(BITS_PER_BYTE) | |
130 | ||
131 | struct arfs_table { | |
132 | struct mlx5e_flow_table ft; | |
133 | struct mlx5_flow_handle *default_rule; | |
134 | struct hlist_head rules_hash[ARFS_HASH_SIZE]; | |
135 | }; | |
136 | ||
137 | enum arfs_type { | |
138 | ARFS_IPV4_TCP, | |
139 | ARFS_IPV6_TCP, | |
140 | ARFS_IPV4_UDP, | |
141 | ARFS_IPV6_UDP, | |
142 | ARFS_NUM_TYPES, | |
143 | }; | |
144 | ||
145 | struct mlx5e_arfs_tables { | |
146 | struct arfs_table arfs_tables[ARFS_NUM_TYPES]; | |
147 | /* Protect aRFS rules list */ | |
148 | spinlock_t arfs_lock; | |
149 | struct list_head rules; | |
150 | int last_filter_id; | |
151 | struct workqueue_struct *wq; | |
152 | }; | |
153 | ||
154 | int mlx5e_arfs_create_tables(struct mlx5e_priv *priv); | |
155 | void mlx5e_arfs_destroy_tables(struct mlx5e_priv *priv); | |
156 | int mlx5e_arfs_enable(struct mlx5e_priv *priv); | |
157 | int mlx5e_arfs_disable(struct mlx5e_priv *priv); | |
158 | int mlx5e_rx_flow_steer(struct net_device *dev, const struct sk_buff *skb, | |
159 | u16 rxq_index, u32 flow_id); | |
160 | #else | |
161 | static inline int mlx5e_arfs_create_tables(struct mlx5e_priv *priv) { return 0; } | |
162 | static inline void mlx5e_arfs_destroy_tables(struct mlx5e_priv *priv) {} | |
163 | static inline int mlx5e_arfs_enable(struct mlx5e_priv *priv) { return -EOPNOTSUPP; } | |
164 | static inline int mlx5e_arfs_disable(struct mlx5e_priv *priv) { return -EOPNOTSUPP; } | |
165 | #endif | |
166 | ||
44f68ae0 SM |
167 | struct mlx5e_flow_steering { |
168 | struct mlx5_flow_namespace *ns; | |
169 | #ifdef CONFIG_MLX5_EN_RXNFC | |
170 | struct mlx5e_ethtool_steering ethtool; | |
171 | #endif | |
172 | struct mlx5e_tc_table tc; | |
173 | struct mlx5e_vlan_table vlan; | |
174 | struct mlx5e_l2_table l2; | |
175 | struct mlx5e_ttc_table ttc; | |
176 | struct mlx5e_ttc_table inner_ttc; | |
177 | #ifdef CONFIG_MLX5_EN_ARFS | |
178 | struct mlx5e_arfs_tables arfs; | |
179 | #endif | |
180 | }; | |
181 | ||
182 | struct ttc_params { | |
183 | struct mlx5_flow_table_attr ft_attr; | |
184 | u32 any_tt_tirn; | |
185 | u32 indir_tirn[MLX5E_NUM_INDIR_TIRS]; | |
186 | struct mlx5e_ttc_table *inner_ttc; | |
187 | }; | |
188 | ||
189 | void mlx5e_set_ttc_basic_params(struct mlx5e_priv *priv, struct ttc_params *ttc_params); | |
190 | void mlx5e_set_ttc_ft_params(struct ttc_params *ttc_params); | |
191 | void mlx5e_set_inner_ttc_ft_params(struct ttc_params *ttc_params); | |
192 | ||
193 | int mlx5e_create_ttc_table(struct mlx5e_priv *priv, struct ttc_params *params, | |
194 | struct mlx5e_ttc_table *ttc); | |
195 | void mlx5e_destroy_ttc_table(struct mlx5e_priv *priv, | |
196 | struct mlx5e_ttc_table *ttc); | |
197 | ||
198 | int mlx5e_create_inner_ttc_table(struct mlx5e_priv *priv, struct ttc_params *params, | |
199 | struct mlx5e_ttc_table *ttc); | |
200 | void mlx5e_destroy_inner_ttc_table(struct mlx5e_priv *priv, | |
201 | struct mlx5e_ttc_table *ttc); | |
202 | ||
203 | void mlx5e_destroy_flow_table(struct mlx5e_flow_table *ft); | |
204 | ||
205 | void mlx5e_enable_cvlan_filter(struct mlx5e_priv *priv); | |
206 | void mlx5e_disable_cvlan_filter(struct mlx5e_priv *priv); | |
207 | ||
208 | int mlx5e_create_flow_steering(struct mlx5e_priv *priv); | |
209 | void mlx5e_destroy_flow_steering(struct mlx5e_priv *priv); | |
210 | ||
fe6d86b3 SM |
211 | #endif /* __MLX5E_FLOW_STEER_H__ */ |
212 |