[linux-2.6-block.git] / drivers / net / ethernet / mellanox / mlx4 / srq.c

/*
 * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
 * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
 *
 * This software is available to you under a choice of one of two
 * licenses.  You may choose to be licensed under the terms of the GNU
 * General Public License (GPL) Version 2, available from the file
 * COPYING in the main directory of this source tree, or the
 * OpenIB.org BSD license below:
 *
 *     Redistribution and use in source and binary forms, with or
 *     without modification, are permitted provided that the following
 *     conditions are met:
 *
 *      - Redistributions of source code must retain the above
 *        copyright notice, this list of conditions and the following
 *        disclaimer.
 *
 *      - Redistributions in binary form must reproduce the above
 *        copyright notice, this list of conditions and the following
 *        disclaimer in the documentation and/or other materials
 *        provided with the distribution.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 * SOFTWARE.
 */

#include <linux/init.h>

#include <linux/mlx4/cmd.h>
#include <linux/export.h>
#include <linux/gfp.h>

#include "mlx4.h"
#include "icm.h"

void mlx4_srq_event(struct mlx4_dev *dev, u32 srqn, int event_type)
{
	struct mlx4_srq_table *srq_table = &mlx4_priv(dev)->srq_table;
	struct mlx4_srq *srq;

	spin_lock(&srq_table->lock);

	srq = radix_tree_lookup(&srq_table->tree, srqn & (dev->caps.num_srqs - 1));
	if (srq)
		atomic_inc(&srq->refcount);

	spin_unlock(&srq_table->lock);

	if (!srq) {
		mlx4_warn(dev, "Async event for bogus SRQ %08x\n", srqn);
		return;
	}

	srq->event(srq, event_type);

	if (atomic_dec_and_test(&srq->refcount))
		complete(&srq->free);
}

static int mlx4_SW2HW_SRQ(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox,
			  int srq_num)
{
	return mlx4_cmd(dev, mailbox->dma, srq_num, 0,
			MLX4_CMD_SW2HW_SRQ, MLX4_CMD_TIME_CLASS_A,
			MLX4_CMD_WRAPPED);
}

static int mlx4_HW2SW_SRQ(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox,
			  int srq_num)
{
	return mlx4_cmd_box(dev, 0, mailbox ? mailbox->dma : 0, srq_num,
			    mailbox ? 0 : 1, MLX4_CMD_HW2SW_SRQ,
			    MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED);
}

static int mlx4_ARM_SRQ(struct mlx4_dev *dev, int srq_num, int limit_watermark)
{
	return mlx4_cmd(dev, limit_watermark, srq_num, 0, MLX4_CMD_ARM_SRQ,
			MLX4_CMD_TIME_CLASS_B, MLX4_CMD_WRAPPED);
}

static int mlx4_QUERY_SRQ(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox,
			  int srq_num)
{
	return mlx4_cmd_box(dev, 0, mailbox->dma, srq_num, 0, MLX4_CMD_QUERY_SRQ,
			    MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED);
}

int __mlx4_srq_alloc_icm(struct mlx4_dev *dev, int *srqn)
{
	struct mlx4_srq_table *srq_table = &mlx4_priv(dev)->srq_table;
	int err;


	*srqn = mlx4_bitmap_alloc(&srq_table->bitmap);
	if (*srqn == -1)
		return -ENOMEM;

	err = mlx4_table_get(dev, &srq_table->table, *srqn);
	if (err)
		goto err_out;

	err = mlx4_table_get(dev, &srq_table->cmpt_table, *srqn);
	if (err)
		goto err_put;
	return 0;

err_put:
	mlx4_table_put(dev, &srq_table->table, *srqn);

err_out:
	mlx4_bitmap_free(&srq_table->bitmap, *srqn);
	return err;
}

static int mlx4_srq_alloc_icm(struct mlx4_dev *dev, int *srqn)
{
	u64 out_param;
	int err;

	if (mlx4_is_mfunc(dev)) {
		err = mlx4_cmd_imm(dev, 0, &out_param, RES_SRQ,
				   RES_OP_RESERVE_AND_MAP,
				   MLX4_CMD_ALLOC_RES,
				   MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED);
		if (!err)
			*srqn = get_param_l(&out_param);

		return err;
	}
	return __mlx4_srq_alloc_icm(dev, srqn);
}

void __mlx4_srq_free_icm(struct mlx4_dev *dev, int srqn)
{
	struct mlx4_srq_table *srq_table = &mlx4_priv(dev)->srq_table;

	mlx4_table_put(dev, &srq_table->cmpt_table, srqn);
	mlx4_table_put(dev, &srq_table->table, srqn);
	mlx4_bitmap_free(&srq_table->bitmap, srqn);
}

static void mlx4_srq_free_icm(struct mlx4_dev *dev, int srqn)
{
	u64 in_param = 0;

	if (mlx4_is_mfunc(dev)) {
		set_param_l(&in_param, srqn);
		if (mlx4_cmd(dev, in_param, RES_SRQ, RES_OP_RESERVE_AND_MAP,
			     MLX4_CMD_FREE_RES,
			     MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED))
			mlx4_warn(dev, "Failed freeing cq:%d\n", srqn);
		return;
	}
	__mlx4_srq_free_icm(dev, srqn);
}

int mlx4_srq_alloc(struct mlx4_dev *dev, u32 pdn, u32 cqn, u16 xrcd,
		   struct mlx4_mtt *mtt, u64 db_rec, struct mlx4_srq *srq)
{
	struct mlx4_srq_table *srq_table = &mlx4_priv(dev)->srq_table;
	struct mlx4_cmd_mailbox *mailbox;
	struct mlx4_srq_context *srq_context;
	u64 mtt_addr;
	int err;

	err = mlx4_srq_alloc_icm(dev, &srq->srqn);
	if (err)
		return err;

	spin_lock_irq(&srq_table->lock);
	err = radix_tree_insert(&srq_table->tree, srq->srqn, srq);
	spin_unlock_irq(&srq_table->lock);
	if (err)
		goto err_icm;

	mailbox = mlx4_alloc_cmd_mailbox(dev);
	if (IS_ERR(mailbox)) {
		err = PTR_ERR(mailbox);
		goto err_radix;
	}

	srq_context = mailbox->buf;
	memset(srq_context, 0, sizeof *srq_context);

	srq_context->state_logsize_srqn = cpu_to_be32((ilog2(srq->max) << 24) |
						      srq->srqn);
	srq_context->logstride          = srq->wqe_shift - 4;
	srq_context->xrcd		= cpu_to_be16(xrcd);
	srq_context->pg_offset_cqn	= cpu_to_be32(cqn & 0xffffff);
	srq_context->log_page_size      = mtt->page_shift - MLX4_ICM_PAGE_SHIFT;

	mtt_addr = mlx4_mtt_addr(dev, mtt);
	srq_context->mtt_base_addr_h    = mtt_addr >> 32;
	srq_context->mtt_base_addr_l    = cpu_to_be32(mtt_addr & 0xffffffff);
	srq_context->pd			= cpu_to_be32(pdn);
	srq_context->db_rec_addr        = cpu_to_be64(db_rec);

	err = mlx4_SW2HW_SRQ(dev, mailbox, srq->srqn);
	mlx4_free_cmd_mailbox(dev, mailbox);
	if (err)
		goto err_radix;

	atomic_set(&srq->refcount, 1);
	init_completion(&srq->free);

	return 0;

err_radix:
	spin_lock_irq(&srq_table->lock);
	radix_tree_delete(&srq_table->tree, srq->srqn);
	spin_unlock_irq(&srq_table->lock);

err_icm:
	mlx4_srq_free_icm(dev, srq->srqn);
	return err;
}
EXPORT_SYMBOL_GPL(mlx4_srq_alloc);

void mlx4_srq_free(struct mlx4_dev *dev, struct mlx4_srq *srq)
{
	struct mlx4_srq_table *srq_table = &mlx4_priv(dev)->srq_table;
	int err;

	err = mlx4_HW2SW_SRQ(dev, NULL, srq->srqn);
	if (err)
		mlx4_warn(dev, "HW2SW_SRQ failed (%d) for SRQN %06x\n", err, srq->srqn);

	spin_lock_irq(&srq_table->lock);
	radix_tree_delete(&srq_table->tree, srq->srqn);
	spin_unlock_irq(&srq_table->lock);

	if (atomic_dec_and_test(&srq->refcount))
		complete(&srq->free);
	wait_for_completion(&srq->free);

	mlx4_srq_free_icm(dev, srq->srqn);
}
EXPORT_SYMBOL_GPL(mlx4_srq_free);

int mlx4_srq_arm(struct mlx4_dev *dev, struct mlx4_srq *srq, int limit_watermark)
{
	return mlx4_ARM_SRQ(dev, srq->srqn, limit_watermark);
}
EXPORT_SYMBOL_GPL(mlx4_srq_arm);

int mlx4_srq_query(struct mlx4_dev *dev, struct mlx4_srq *srq, int *limit_watermark)
{
	struct mlx4_cmd_mailbox *mailbox;
	struct mlx4_srq_context *srq_context;
	int err;

	mailbox = mlx4_alloc_cmd_mailbox(dev);
	if (IS_ERR(mailbox))
		return PTR_ERR(mailbox);

	srq_context = mailbox->buf;

	err = mlx4_QUERY_SRQ(dev, mailbox, srq->srqn);
	if (err)
		goto err_out;
	*limit_watermark = be16_to_cpu(srq_context->limit_watermark);

err_out:
	mlx4_free_cmd_mailbox(dev, mailbox);
	return err;
}
EXPORT_SYMBOL_GPL(mlx4_srq_query);

int mlx4_init_srq_table(struct mlx4_dev *dev)
{
	struct mlx4_srq_table *srq_table = &mlx4_priv(dev)->srq_table;
	int err;

	spin_lock_init(&srq_table->lock);
	INIT_RADIX_TREE(&srq_table->tree, GFP_ATOMIC);
	if (mlx4_is_slave(dev))
		return 0;

	err = mlx4_bitmap_init(&srq_table->bitmap, dev->caps.num_srqs,
			       dev->caps.num_srqs - 1, dev->caps.reserved_srqs, 0);
	if (err)
		return err;

	return 0;
}

void mlx4_cleanup_srq_table(struct mlx4_dev *dev)
{
	if (mlx4_is_slave(dev))
		return;
	mlx4_bitmap_cleanup(&mlx4_priv(dev)->srq_table.bitmap);
}
Commit	Line	Data
225c7b1f RD	1	/*
225c7b1f RD	2	* Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
51a379d0	3	* Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
225c7b1f RD	4	*
	5	* This software is available to you under a choice of one of two
	6	* licenses. You may choose to be licensed under the terms of the GNU
	7	* General Public License (GPL) Version 2, available from the file
	8	* COPYING in the main directory of this source tree, or the
	9	* OpenIB.org BSD license below:
	10	*
	11	* Redistribution and use in source and binary forms, with or
	12	* without modification, are permitted provided that the following
	13	* conditions are met:
	14	*
	15	* - Redistributions of source code must retain the above
	16	* copyright notice, this list of conditions and the following
	17	* disclaimer.
	18	*
	19	* - Redistributions in binary form must reproduce the above
	20	* copyright notice, this list of conditions and the following
	21	* disclaimer in the documentation and/or other materials
	22	* provided with the distribution.
	23	*
	24	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
	25	* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
	26	* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
	27	* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
	28	* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
	29	* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
	30	* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
	31	* SOFTWARE.
	32	*/
	33
3ec65b2b JM	34	#include <linux/init.h>
3ec65b2b JM	35
225c7b1f	36	#include <linux/mlx4/cmd.h>
ee40fa06	37	#include <linux/export.h>
5a0e3ad6	38	#include <linux/gfp.h>
225c7b1f RD	39
	40	#include "mlx4.h"
	41	#include "icm.h"
	42
225c7b1f RD	43	void mlx4_srq_event(struct mlx4_dev *dev, u32 srqn, int event_type)
	44	{
	45	struct mlx4_srq_table *srq_table = &mlx4_priv(dev)->srq_table;
	46	struct mlx4_srq *srq;
	47
	48	spin_lock(&srq_table->lock);
	49
	50	srq = radix_tree_lookup(&srq_table->tree, srqn & (dev->caps.num_srqs - 1));
	51	if (srq)
	52	atomic_inc(&srq->refcount);
	53
	54	spin_unlock(&srq_table->lock);
	55
	56	if (!srq) {
	57	mlx4_warn(dev, "Async event for bogus SRQ %08x\n", srqn);
	58	return;
	59	}
	60
	61	srq->event(srq, event_type);
	62
	63	if (atomic_dec_and_test(&srq->refcount))
	64	complete(&srq->free);
	65	}
	66
	67	static int mlx4_SW2HW_SRQ(struct mlx4_dev dev, struct mlx4_cmd_mailbox mailbox,
	68	int srq_num)
	69	{
eb41049f	70	return mlx4_cmd(dev, mailbox->dma, srq_num, 0,
3ec65b2b JM	71	MLX4_CMD_SW2HW_SRQ, MLX4_CMD_TIME_CLASS_A,
3ec65b2b JM	72	MLX4_CMD_WRAPPED);
225c7b1f RD	73	}
	74
	75	static int mlx4_HW2SW_SRQ(struct mlx4_dev dev, struct mlx4_cmd_mailbox mailbox,
	76	int srq_num)
	77	{
	78	return mlx4_cmd_box(dev, 0, mailbox ? mailbox->dma : 0, srq_num,
	79	mailbox ? 0 : 1, MLX4_CMD_HW2SW_SRQ,
f9baff50	80	MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED);
225c7b1f RD	81	}
	82
	83	static int mlx4_ARM_SRQ(struct mlx4_dev *dev, int srq_num, int limit_watermark)
	84	{
	85	return mlx4_cmd(dev, limit_watermark, srq_num, 0, MLX4_CMD_ARM_SRQ,
f9baff50	86	MLX4_CMD_TIME_CLASS_B, MLX4_CMD_WRAPPED);
225c7b1f RD	87	}
225c7b1f RD	88
65541cb7 JM	89	static int mlx4_QUERY_SRQ(struct mlx4_dev dev, struct mlx4_cmd_mailbox mailbox,
	90	int srq_num)
	91	{
	92	return mlx4_cmd_box(dev, 0, mailbox->dma, srq_num, 0, MLX4_CMD_QUERY_SRQ,
f9baff50	93	MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED);
65541cb7 JM	94	}
65541cb7 JM	95
c82e9aa0	96	int __mlx4_srq_alloc_icm(struct mlx4_dev dev, int srqn)
225c7b1f RD	97	{
225c7b1f RD	98	struct mlx4_srq_table *srq_table = &mlx4_priv(dev)->srq_table;
225c7b1f RD	99	int err;
225c7b1f RD	100
3ec65b2b JM	101
	102	*srqn = mlx4_bitmap_alloc(&srq_table->bitmap);
	103	if (*srqn == -1)
225c7b1f RD	104	return -ENOMEM;
225c7b1f RD	105
3ec65b2b	106	err = mlx4_table_get(dev, &srq_table->table, *srqn);
225c7b1f RD	107	if (err)
	108	goto err_out;
	109
3ec65b2b	110	err = mlx4_table_get(dev, &srq_table->cmpt_table, *srqn);
225c7b1f RD	111	if (err)
225c7b1f RD	112	goto err_put;
3ec65b2b JM	113	return 0;
	114
	115	err_put:
	116	mlx4_table_put(dev, &srq_table->table, *srqn);
	117
	118	err_out:
	119	mlx4_bitmap_free(&srq_table->bitmap, *srqn);
	120	return err;
	121	}
	122
	123	static int mlx4_srq_alloc_icm(struct mlx4_dev dev, int srqn)
	124	{
	125	u64 out_param;
	126	int err;
	127
	128	if (mlx4_is_mfunc(dev)) {
	129	err = mlx4_cmd_imm(dev, 0, &out_param, RES_SRQ,
	130	RES_OP_RESERVE_AND_MAP,
	131	MLX4_CMD_ALLOC_RES,
	132	MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED);
	133	if (!err)
	134	*srqn = get_param_l(&out_param);
	135
	136	return err;
	137	}
	138	return __mlx4_srq_alloc_icm(dev, srqn);
	139	}
	140
c82e9aa0	141	void __mlx4_srq_free_icm(struct mlx4_dev *dev, int srqn)
3ec65b2b JM	142	{
	143	struct mlx4_srq_table *srq_table = &mlx4_priv(dev)->srq_table;
	144
	145	mlx4_table_put(dev, &srq_table->cmpt_table, srqn);
	146	mlx4_table_put(dev, &srq_table->table, srqn);
	147	mlx4_bitmap_free(&srq_table->bitmap, srqn);
	148	}
	149
	150	static void mlx4_srq_free_icm(struct mlx4_dev *dev, int srqn)
	151	{
e7dbeba8	152	u64 in_param = 0;
3ec65b2b JM	153
	154	if (mlx4_is_mfunc(dev)) {
	155	set_param_l(&in_param, srqn);
	156	if (mlx4_cmd(dev, in_param, RES_SRQ, RES_OP_RESERVE_AND_MAP,
	157	MLX4_CMD_FREE_RES,
	158	MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED))
	159	mlx4_warn(dev, "Failed freeing cq:%d\n", srqn);
	160	return;
	161	}
	162	__mlx4_srq_free_icm(dev, srqn);
	163	}
	164
	165	int mlx4_srq_alloc(struct mlx4_dev *dev, u32 pdn, u32 cqn, u16 xrcd,
	166	struct mlx4_mtt mtt, u64 db_rec, struct mlx4_srq srq)
	167	{
	168	struct mlx4_srq_table *srq_table = &mlx4_priv(dev)->srq_table;
	169	struct mlx4_cmd_mailbox *mailbox;
	170	struct mlx4_srq_context *srq_context;
	171	u64 mtt_addr;
	172	int err;
	173
	174	err = mlx4_srq_alloc_icm(dev, &srq->srqn);
	175	if (err)
	176	return err;
225c7b1f RD	177
	178	spin_lock_irq(&srq_table->lock);
	179	err = radix_tree_insert(&srq_table->tree, srq->srqn, srq);
	180	spin_unlock_irq(&srq_table->lock);
	181	if (err)
3ec65b2b	182	goto err_icm;
225c7b1f RD	183
	184	mailbox = mlx4_alloc_cmd_mailbox(dev);
	185	if (IS_ERR(mailbox)) {
	186	err = PTR_ERR(mailbox);
	187	goto err_radix;
	188	}
	189
	190	srq_context = mailbox->buf;
	191	memset(srq_context, 0, sizeof *srq_context);
	192
	193	srq_context->state_logsize_srqn = cpu_to_be32((ilog2(srq->max) << 24) \|
	194	srq->srqn);
	195	srq_context->logstride = srq->wqe_shift - 4;
18abd5ea SH	196	srq_context->xrcd = cpu_to_be16(xrcd);
18abd5ea SH	197	srq_context->pg_offset_cqn = cpu_to_be32(cqn & 0xffffff);
225c7b1f RD	198	srq_context->log_page_size = mtt->page_shift - MLX4_ICM_PAGE_SHIFT;
	199
	200	mtt_addr = mlx4_mtt_addr(dev, mtt);
	201	srq_context->mtt_base_addr_h = mtt_addr >> 32;
	202	srq_context->mtt_base_addr_l = cpu_to_be32(mtt_addr & 0xffffffff);
	203	srq_context->pd = cpu_to_be32(pdn);
	204	srq_context->db_rec_addr = cpu_to_be64(db_rec);
	205
	206	err = mlx4_SW2HW_SRQ(dev, mailbox, srq->srqn);
	207	mlx4_free_cmd_mailbox(dev, mailbox);
	208	if (err)
	209	goto err_radix;
	210
	211	atomic_set(&srq->refcount, 1);
	212	init_completion(&srq->free);
	213
	214	return 0;
	215
	216	err_radix:
	217	spin_lock_irq(&srq_table->lock);
	218	radix_tree_delete(&srq_table->tree, srq->srqn);
	219	spin_unlock_irq(&srq_table->lock);
	220
3ec65b2b JM	221	err_icm:
3ec65b2b JM	222	mlx4_srq_free_icm(dev, srq->srqn);
225c7b1f RD	223	return err;
	224	}
	225	EXPORT_SYMBOL_GPL(mlx4_srq_alloc);
	226
	227	void mlx4_srq_free(struct mlx4_dev dev, struct mlx4_srq srq)
	228	{
	229	struct mlx4_srq_table *srq_table = &mlx4_priv(dev)->srq_table;
	230	int err;
	231
	232	err = mlx4_HW2SW_SRQ(dev, NULL, srq->srqn);
	233	if (err)
	234	mlx4_warn(dev, "HW2SW_SRQ failed (%d) for SRQN %06x\n", err, srq->srqn);
	235
	236	spin_lock_irq(&srq_table->lock);
	237	radix_tree_delete(&srq_table->tree, srq->srqn);
	238	spin_unlock_irq(&srq_table->lock);
	239
	240	if (atomic_dec_and_test(&srq->refcount))
	241	complete(&srq->free);
	242	wait_for_completion(&srq->free);
	243
3ec65b2b	244	mlx4_srq_free_icm(dev, srq->srqn);
225c7b1f RD	245	}
	246	EXPORT_SYMBOL_GPL(mlx4_srq_free);
	247
	248	int mlx4_srq_arm(struct mlx4_dev dev, struct mlx4_srq srq, int limit_watermark)
	249	{
	250	return mlx4_ARM_SRQ(dev, srq->srqn, limit_watermark);
	251	}
	252	EXPORT_SYMBOL_GPL(mlx4_srq_arm);
	253
65541cb7 JM	254	int mlx4_srq_query(struct mlx4_dev dev, struct mlx4_srq srq, int *limit_watermark)
	255	{
	256	struct mlx4_cmd_mailbox *mailbox;
	257	struct mlx4_srq_context *srq_context;
	258	int err;
	259
	260	mailbox = mlx4_alloc_cmd_mailbox(dev);
	261	if (IS_ERR(mailbox))
	262	return PTR_ERR(mailbox);
	263
	264	srq_context = mailbox->buf;
	265
	266	err = mlx4_QUERY_SRQ(dev, mailbox, srq->srqn);
	267	if (err)
	268	goto err_out;
d7dc3ccb	269	*limit_watermark = be16_to_cpu(srq_context->limit_watermark);
65541cb7 JM	270
	271	err_out:
	272	mlx4_free_cmd_mailbox(dev, mailbox);
	273	return err;
	274	}
	275	EXPORT_SYMBOL_GPL(mlx4_srq_query);
	276
3d73c288	277	int mlx4_init_srq_table(struct mlx4_dev *dev)
225c7b1f RD	278	{
	279	struct mlx4_srq_table *srq_table = &mlx4_priv(dev)->srq_table;
	280	int err;
	281
	282	spin_lock_init(&srq_table->lock);
	283	INIT_RADIX_TREE(&srq_table->tree, GFP_ATOMIC);
3ec65b2b JM	284	if (mlx4_is_slave(dev))
3ec65b2b JM	285	return 0;
225c7b1f RD	286
225c7b1f RD	287	err = mlx4_bitmap_init(&srq_table->bitmap, dev->caps.num_srqs,
93fc9e1b	288	dev->caps.num_srqs - 1, dev->caps.reserved_srqs, 0);
225c7b1f RD	289	if (err)
	290	return err;
	291
	292	return 0;
	293	}
	294
	295	void mlx4_cleanup_srq_table(struct mlx4_dev *dev)
	296	{
3ec65b2b JM	297	if (mlx4_is_slave(dev))
3ec65b2b JM	298	return;
225c7b1f RD	299	mlx4_bitmap_cleanup(&mlx4_priv(dev)->srq_table.bitmap);
225c7b1f RD	300	}