Commit | Line | Data |
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225c7b1f RD |
1 | /* |
2 | * Copyright (c) 2004 Topspin Communications. All rights reserved. | |
3 | * Copyright (c) 2005, 2006, 2007 Cisco Systems, Inc. All rights reserved. | |
51a379d0 | 4 | * Copyright (c) 2005, 2006, 2007, 2008 Mellanox Technologies. All rights reserved. |
225c7b1f RD |
5 | * Copyright (c) 2004 Voltaire, Inc. All rights reserved. |
6 | * | |
7 | * This software is available to you under a choice of one of two | |
8 | * licenses. You may choose to be licensed under the terms of the GNU | |
9 | * General Public License (GPL) Version 2, available from the file | |
10 | * COPYING in the main directory of this source tree, or the | |
11 | * OpenIB.org BSD license below: | |
12 | * | |
13 | * Redistribution and use in source and binary forms, with or | |
14 | * without modification, are permitted provided that the following | |
15 | * conditions are met: | |
16 | * | |
17 | * - Redistributions of source code must retain the above | |
18 | * copyright notice, this list of conditions and the following | |
19 | * disclaimer. | |
20 | * | |
21 | * - Redistributions in binary form must reproduce the above | |
22 | * copyright notice, this list of conditions and the following | |
23 | * disclaimer in the documentation and/or other materials | |
24 | * provided with the distribution. | |
25 | * | |
26 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
27 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
28 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
29 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | |
30 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | |
31 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | |
32 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | |
33 | * SOFTWARE. | |
34 | */ | |
35 | ||
5a0e3ad6 | 36 | #include <linux/gfp.h> |
ee40fa06 | 37 | #include <linux/export.h> |
fe9a2603 | 38 | |
225c7b1f RD |
39 | #include <linux/mlx4/cmd.h> |
40 | #include <linux/mlx4/qp.h> | |
41 | ||
42 | #include "mlx4.h" | |
43 | #include "icm.h" | |
44 | ||
45 | void mlx4_qp_event(struct mlx4_dev *dev, u32 qpn, int event_type) | |
46 | { | |
47 | struct mlx4_qp_table *qp_table = &mlx4_priv(dev)->qp_table; | |
48 | struct mlx4_qp *qp; | |
49 | ||
50 | spin_lock(&qp_table->lock); | |
51 | ||
52 | qp = __mlx4_qp_lookup(dev, qpn); | |
53 | if (qp) | |
54 | atomic_inc(&qp->refcount); | |
55 | ||
56 | spin_unlock(&qp_table->lock); | |
57 | ||
58 | if (!qp) { | |
fe9a2603 | 59 | mlx4_dbg(dev, "Async event for none existent QP %08x\n", qpn); |
225c7b1f RD |
60 | return; |
61 | } | |
62 | ||
63 | qp->event(qp, event_type); | |
64 | ||
65 | if (atomic_dec_and_test(&qp->refcount)) | |
66 | complete(&qp->free); | |
67 | } | |
68 | ||
980e9001 | 69 | /* used for INIT/CLOSE port logic */ |
47605df9 | 70 | static int is_master_qp0(struct mlx4_dev *dev, struct mlx4_qp *qp, int *real_qp0, int *proxy_qp0) |
fe9a2603 | 71 | { |
47605df9 | 72 | /* this procedure is called after we already know we are on the master */ |
980e9001 | 73 | /* qp0 is either the proxy qp0, or the real qp0 */ |
47605df9 JM |
74 | u32 pf_proxy_offset = dev->phys_caps.base_proxy_sqpn + 8 * mlx4_master_func_num(dev); |
75 | *proxy_qp0 = qp->qpn >= pf_proxy_offset && qp->qpn <= pf_proxy_offset + 1; | |
980e9001 | 76 | |
47605df9 JM |
77 | *real_qp0 = qp->qpn >= dev->phys_caps.base_sqpn && |
78 | qp->qpn <= dev->phys_caps.base_sqpn + 1; | |
980e9001 JM |
79 | |
80 | return *real_qp0 || *proxy_qp0; | |
fe9a2603 JM |
81 | } |
82 | ||
83 | static int __mlx4_qp_modify(struct mlx4_dev *dev, struct mlx4_mtt *mtt, | |
84 | enum mlx4_qp_state cur_state, enum mlx4_qp_state new_state, | |
85 | struct mlx4_qp_context *context, | |
86 | enum mlx4_qp_optpar optpar, | |
87 | int sqd_event, struct mlx4_qp *qp, int native) | |
225c7b1f RD |
88 | { |
89 | static const u16 op[MLX4_QP_NUM_STATE][MLX4_QP_NUM_STATE] = { | |
90 | [MLX4_QP_STATE_RST] = { | |
91 | [MLX4_QP_STATE_RST] = MLX4_CMD_2RST_QP, | |
92 | [MLX4_QP_STATE_ERR] = MLX4_CMD_2ERR_QP, | |
93 | [MLX4_QP_STATE_INIT] = MLX4_CMD_RST2INIT_QP, | |
94 | }, | |
95 | [MLX4_QP_STATE_INIT] = { | |
96 | [MLX4_QP_STATE_RST] = MLX4_CMD_2RST_QP, | |
97 | [MLX4_QP_STATE_ERR] = MLX4_CMD_2ERR_QP, | |
98 | [MLX4_QP_STATE_INIT] = MLX4_CMD_INIT2INIT_QP, | |
99 | [MLX4_QP_STATE_RTR] = MLX4_CMD_INIT2RTR_QP, | |
100 | }, | |
101 | [MLX4_QP_STATE_RTR] = { | |
102 | [MLX4_QP_STATE_RST] = MLX4_CMD_2RST_QP, | |
103 | [MLX4_QP_STATE_ERR] = MLX4_CMD_2ERR_QP, | |
104 | [MLX4_QP_STATE_RTS] = MLX4_CMD_RTR2RTS_QP, | |
105 | }, | |
106 | [MLX4_QP_STATE_RTS] = { | |
107 | [MLX4_QP_STATE_RST] = MLX4_CMD_2RST_QP, | |
108 | [MLX4_QP_STATE_ERR] = MLX4_CMD_2ERR_QP, | |
109 | [MLX4_QP_STATE_RTS] = MLX4_CMD_RTS2RTS_QP, | |
110 | [MLX4_QP_STATE_SQD] = MLX4_CMD_RTS2SQD_QP, | |
111 | }, | |
112 | [MLX4_QP_STATE_SQD] = { | |
113 | [MLX4_QP_STATE_RST] = MLX4_CMD_2RST_QP, | |
114 | [MLX4_QP_STATE_ERR] = MLX4_CMD_2ERR_QP, | |
115 | [MLX4_QP_STATE_RTS] = MLX4_CMD_SQD2RTS_QP, | |
116 | [MLX4_QP_STATE_SQD] = MLX4_CMD_SQD2SQD_QP, | |
117 | }, | |
118 | [MLX4_QP_STATE_SQER] = { | |
119 | [MLX4_QP_STATE_RST] = MLX4_CMD_2RST_QP, | |
120 | [MLX4_QP_STATE_ERR] = MLX4_CMD_2ERR_QP, | |
121 | [MLX4_QP_STATE_RTS] = MLX4_CMD_SQERR2RTS_QP, | |
122 | }, | |
123 | [MLX4_QP_STATE_ERR] = { | |
124 | [MLX4_QP_STATE_RST] = MLX4_CMD_2RST_QP, | |
125 | [MLX4_QP_STATE_ERR] = MLX4_CMD_2ERR_QP, | |
126 | } | |
127 | }; | |
128 | ||
fe9a2603 | 129 | struct mlx4_priv *priv = mlx4_priv(dev); |
225c7b1f RD |
130 | struct mlx4_cmd_mailbox *mailbox; |
131 | int ret = 0; | |
980e9001 JM |
132 | int real_qp0 = 0; |
133 | int proxy_qp0 = 0; | |
fe9a2603 | 134 | u8 port; |
225c7b1f | 135 | |
9ed87fd3 | 136 | if (cur_state >= MLX4_QP_NUM_STATE || new_state >= MLX4_QP_NUM_STATE || |
225c7b1f RD |
137 | !op[cur_state][new_state]) |
138 | return -EINVAL; | |
139 | ||
fe9a2603 JM |
140 | if (op[cur_state][new_state] == MLX4_CMD_2RST_QP) { |
141 | ret = mlx4_cmd(dev, 0, qp->qpn, 2, | |
142 | MLX4_CMD_2RST_QP, MLX4_CMD_TIME_CLASS_A, native); | |
143 | if (mlx4_is_master(dev) && cur_state != MLX4_QP_STATE_ERR && | |
144 | cur_state != MLX4_QP_STATE_RST && | |
47605df9 | 145 | is_master_qp0(dev, qp, &real_qp0, &proxy_qp0)) { |
fe9a2603 | 146 | port = (qp->qpn & 1) + 1; |
980e9001 JM |
147 | if (proxy_qp0) |
148 | priv->mfunc.master.qp0_state[port].proxy_qp0_active = 0; | |
149 | else | |
150 | priv->mfunc.master.qp0_state[port].qp0_active = 0; | |
fe9a2603 JM |
151 | } |
152 | return ret; | |
153 | } | |
225c7b1f RD |
154 | |
155 | mailbox = mlx4_alloc_cmd_mailbox(dev); | |
156 | if (IS_ERR(mailbox)) | |
157 | return PTR_ERR(mailbox); | |
158 | ||
159 | if (cur_state == MLX4_QP_STATE_RST && new_state == MLX4_QP_STATE_INIT) { | |
160 | u64 mtt_addr = mlx4_mtt_addr(dev, mtt); | |
161 | context->mtt_base_addr_h = mtt_addr >> 32; | |
162 | context->mtt_base_addr_l = cpu_to_be32(mtt_addr & 0xffffffff); | |
163 | context->log_page_size = mtt->page_shift - MLX4_ICM_PAGE_SHIFT; | |
164 | } | |
165 | ||
166 | *(__be32 *) mailbox->buf = cpu_to_be32(optpar); | |
167 | memcpy(mailbox->buf + 8, context, sizeof *context); | |
168 | ||
169 | ((struct mlx4_qp_context *) (mailbox->buf + 8))->local_qpn = | |
170 | cpu_to_be32(qp->qpn); | |
171 | ||
eb41049f | 172 | ret = mlx4_cmd(dev, mailbox->dma, |
fe9a2603 | 173 | qp->qpn | (!!sqd_event << 31), |
225c7b1f | 174 | new_state == MLX4_QP_STATE_RST ? 2 : 0, |
fe9a2603 | 175 | op[cur_state][new_state], MLX4_CMD_TIME_CLASS_C, native); |
225c7b1f | 176 | |
47605df9 | 177 | if (mlx4_is_master(dev) && is_master_qp0(dev, qp, &real_qp0, &proxy_qp0)) { |
980e9001 JM |
178 | port = (qp->qpn & 1) + 1; |
179 | if (cur_state != MLX4_QP_STATE_ERR && | |
180 | cur_state != MLX4_QP_STATE_RST && | |
181 | new_state == MLX4_QP_STATE_ERR) { | |
182 | if (proxy_qp0) | |
183 | priv->mfunc.master.qp0_state[port].proxy_qp0_active = 0; | |
184 | else | |
185 | priv->mfunc.master.qp0_state[port].qp0_active = 0; | |
186 | } else if (new_state == MLX4_QP_STATE_RTR) { | |
187 | if (proxy_qp0) | |
188 | priv->mfunc.master.qp0_state[port].proxy_qp0_active = 1; | |
189 | else | |
190 | priv->mfunc.master.qp0_state[port].qp0_active = 1; | |
191 | } | |
192 | } | |
193 | ||
225c7b1f RD |
194 | mlx4_free_cmd_mailbox(dev, mailbox); |
195 | return ret; | |
196 | } | |
fe9a2603 JM |
197 | |
198 | int mlx4_qp_modify(struct mlx4_dev *dev, struct mlx4_mtt *mtt, | |
199 | enum mlx4_qp_state cur_state, enum mlx4_qp_state new_state, | |
200 | struct mlx4_qp_context *context, | |
201 | enum mlx4_qp_optpar optpar, | |
202 | int sqd_event, struct mlx4_qp *qp) | |
203 | { | |
204 | return __mlx4_qp_modify(dev, mtt, cur_state, new_state, context, | |
205 | optpar, sqd_event, qp, 0); | |
206 | } | |
225c7b1f RD |
207 | EXPORT_SYMBOL_GPL(mlx4_qp_modify); |
208 | ||
c82e9aa0 | 209 | int __mlx4_qp_reserve_range(struct mlx4_dev *dev, int cnt, int align, |
fe9a2603 | 210 | int *base) |
a3cdcbfa YP |
211 | { |
212 | struct mlx4_priv *priv = mlx4_priv(dev); | |
213 | struct mlx4_qp_table *qp_table = &priv->qp_table; | |
a3cdcbfa | 214 | |
fe9a2603 JM |
215 | *base = mlx4_bitmap_alloc_range(&qp_table->bitmap, cnt, align); |
216 | if (*base == -1) | |
a3cdcbfa YP |
217 | return -ENOMEM; |
218 | ||
a3cdcbfa YP |
219 | return 0; |
220 | } | |
fe9a2603 JM |
221 | |
222 | int mlx4_qp_reserve_range(struct mlx4_dev *dev, int cnt, int align, int *base) | |
223 | { | |
e7dbeba8 | 224 | u64 in_param = 0; |
fe9a2603 JM |
225 | u64 out_param; |
226 | int err; | |
227 | ||
228 | if (mlx4_is_mfunc(dev)) { | |
229 | set_param_l(&in_param, cnt); | |
230 | set_param_h(&in_param, align); | |
231 | err = mlx4_cmd_imm(dev, in_param, &out_param, | |
232 | RES_QP, RES_OP_RESERVE, | |
233 | MLX4_CMD_ALLOC_RES, | |
234 | MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED); | |
235 | if (err) | |
236 | return err; | |
237 | ||
238 | *base = get_param_l(&out_param); | |
239 | return 0; | |
240 | } | |
241 | return __mlx4_qp_reserve_range(dev, cnt, align, base); | |
242 | } | |
a3cdcbfa YP |
243 | EXPORT_SYMBOL_GPL(mlx4_qp_reserve_range); |
244 | ||
c82e9aa0 | 245 | void __mlx4_qp_release_range(struct mlx4_dev *dev, int base_qpn, int cnt) |
a3cdcbfa YP |
246 | { |
247 | struct mlx4_priv *priv = mlx4_priv(dev); | |
248 | struct mlx4_qp_table *qp_table = &priv->qp_table; | |
a3cdcbfa | 249 | |
fe9a2603 JM |
250 | if (mlx4_is_qp_reserved(dev, (u32) base_qpn)) |
251 | return; | |
7c6d74d2 | 252 | mlx4_bitmap_free_range(&qp_table->bitmap, base_qpn, cnt, MLX4_USE_RR); |
a3cdcbfa | 253 | } |
fe9a2603 JM |
254 | |
255 | void mlx4_qp_release_range(struct mlx4_dev *dev, int base_qpn, int cnt) | |
256 | { | |
e7dbeba8 | 257 | u64 in_param = 0; |
fe9a2603 JM |
258 | int err; |
259 | ||
260 | if (mlx4_is_mfunc(dev)) { | |
261 | set_param_l(&in_param, base_qpn); | |
262 | set_param_h(&in_param, cnt); | |
263 | err = mlx4_cmd(dev, in_param, RES_QP, RES_OP_RESERVE, | |
264 | MLX4_CMD_FREE_RES, | |
265 | MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED); | |
266 | if (err) { | |
267 | mlx4_warn(dev, "Failed to release qp range" | |
268 | " base:%d cnt:%d\n", base_qpn, cnt); | |
269 | } | |
270 | } else | |
271 | __mlx4_qp_release_range(dev, base_qpn, cnt); | |
272 | } | |
a3cdcbfa YP |
273 | EXPORT_SYMBOL_GPL(mlx4_qp_release_range); |
274 | ||
c82e9aa0 | 275 | int __mlx4_qp_alloc_icm(struct mlx4_dev *dev, int qpn) |
225c7b1f RD |
276 | { |
277 | struct mlx4_priv *priv = mlx4_priv(dev); | |
278 | struct mlx4_qp_table *qp_table = &priv->qp_table; | |
279 | int err; | |
280 | ||
fe9a2603 | 281 | err = mlx4_table_get(dev, &qp_table->qp_table, qpn); |
225c7b1f RD |
282 | if (err) |
283 | goto err_out; | |
284 | ||
fe9a2603 | 285 | err = mlx4_table_get(dev, &qp_table->auxc_table, qpn); |
225c7b1f RD |
286 | if (err) |
287 | goto err_put_qp; | |
288 | ||
fe9a2603 | 289 | err = mlx4_table_get(dev, &qp_table->altc_table, qpn); |
225c7b1f RD |
290 | if (err) |
291 | goto err_put_auxc; | |
292 | ||
fe9a2603 | 293 | err = mlx4_table_get(dev, &qp_table->rdmarc_table, qpn); |
225c7b1f RD |
294 | if (err) |
295 | goto err_put_altc; | |
296 | ||
fe9a2603 | 297 | err = mlx4_table_get(dev, &qp_table->cmpt_table, qpn); |
225c7b1f RD |
298 | if (err) |
299 | goto err_put_rdmarc; | |
300 | ||
225c7b1f RD |
301 | return 0; |
302 | ||
225c7b1f | 303 | err_put_rdmarc: |
fe9a2603 | 304 | mlx4_table_put(dev, &qp_table->rdmarc_table, qpn); |
225c7b1f RD |
305 | |
306 | err_put_altc: | |
fe9a2603 | 307 | mlx4_table_put(dev, &qp_table->altc_table, qpn); |
225c7b1f RD |
308 | |
309 | err_put_auxc: | |
fe9a2603 | 310 | mlx4_table_put(dev, &qp_table->auxc_table, qpn); |
225c7b1f RD |
311 | |
312 | err_put_qp: | |
fe9a2603 | 313 | mlx4_table_put(dev, &qp_table->qp_table, qpn); |
225c7b1f RD |
314 | |
315 | err_out: | |
225c7b1f RD |
316 | return err; |
317 | } | |
fe9a2603 JM |
318 | |
319 | static int mlx4_qp_alloc_icm(struct mlx4_dev *dev, int qpn) | |
320 | { | |
e7dbeba8 | 321 | u64 param = 0; |
fe9a2603 JM |
322 | |
323 | if (mlx4_is_mfunc(dev)) { | |
324 | set_param_l(¶m, qpn); | |
325 | return mlx4_cmd_imm(dev, param, ¶m, RES_QP, RES_OP_MAP_ICM, | |
326 | MLX4_CMD_ALLOC_RES, MLX4_CMD_TIME_CLASS_A, | |
327 | MLX4_CMD_WRAPPED); | |
328 | } | |
329 | return __mlx4_qp_alloc_icm(dev, qpn); | |
330 | } | |
331 | ||
c82e9aa0 | 332 | void __mlx4_qp_free_icm(struct mlx4_dev *dev, int qpn) |
fe9a2603 JM |
333 | { |
334 | struct mlx4_priv *priv = mlx4_priv(dev); | |
335 | struct mlx4_qp_table *qp_table = &priv->qp_table; | |
336 | ||
337 | mlx4_table_put(dev, &qp_table->cmpt_table, qpn); | |
338 | mlx4_table_put(dev, &qp_table->rdmarc_table, qpn); | |
339 | mlx4_table_put(dev, &qp_table->altc_table, qpn); | |
340 | mlx4_table_put(dev, &qp_table->auxc_table, qpn); | |
341 | mlx4_table_put(dev, &qp_table->qp_table, qpn); | |
342 | } | |
343 | ||
344 | static void mlx4_qp_free_icm(struct mlx4_dev *dev, int qpn) | |
345 | { | |
e7dbeba8 | 346 | u64 in_param = 0; |
fe9a2603 JM |
347 | |
348 | if (mlx4_is_mfunc(dev)) { | |
349 | set_param_l(&in_param, qpn); | |
350 | if (mlx4_cmd(dev, in_param, RES_QP, RES_OP_MAP_ICM, | |
351 | MLX4_CMD_FREE_RES, MLX4_CMD_TIME_CLASS_A, | |
352 | MLX4_CMD_WRAPPED)) | |
353 | mlx4_warn(dev, "Failed to free icm of qp:%d\n", qpn); | |
354 | } else | |
355 | __mlx4_qp_free_icm(dev, qpn); | |
356 | } | |
357 | ||
358 | int mlx4_qp_alloc(struct mlx4_dev *dev, int qpn, struct mlx4_qp *qp) | |
359 | { | |
360 | struct mlx4_priv *priv = mlx4_priv(dev); | |
361 | struct mlx4_qp_table *qp_table = &priv->qp_table; | |
362 | int err; | |
363 | ||
364 | if (!qpn) | |
365 | return -EINVAL; | |
366 | ||
367 | qp->qpn = qpn; | |
368 | ||
369 | err = mlx4_qp_alloc_icm(dev, qpn); | |
370 | if (err) | |
371 | return err; | |
372 | ||
373 | spin_lock_irq(&qp_table->lock); | |
374 | err = radix_tree_insert(&dev->qp_table_tree, qp->qpn & | |
375 | (dev->caps.num_qps - 1), qp); | |
376 | spin_unlock_irq(&qp_table->lock); | |
377 | if (err) | |
378 | goto err_icm; | |
379 | ||
380 | atomic_set(&qp->refcount, 1); | |
381 | init_completion(&qp->free); | |
382 | ||
383 | return 0; | |
384 | ||
385 | err_icm: | |
386 | mlx4_qp_free_icm(dev, qpn); | |
387 | return err; | |
388 | } | |
389 | ||
225c7b1f RD |
390 | EXPORT_SYMBOL_GPL(mlx4_qp_alloc); |
391 | ||
392 | void mlx4_qp_remove(struct mlx4_dev *dev, struct mlx4_qp *qp) | |
393 | { | |
394 | struct mlx4_qp_table *qp_table = &mlx4_priv(dev)->qp_table; | |
395 | unsigned long flags; | |
396 | ||
397 | spin_lock_irqsave(&qp_table->lock, flags); | |
398 | radix_tree_delete(&dev->qp_table_tree, qp->qpn & (dev->caps.num_qps - 1)); | |
399 | spin_unlock_irqrestore(&qp_table->lock, flags); | |
400 | } | |
401 | EXPORT_SYMBOL_GPL(mlx4_qp_remove); | |
402 | ||
403 | void mlx4_qp_free(struct mlx4_dev *dev, struct mlx4_qp *qp) | |
404 | { | |
225c7b1f RD |
405 | if (atomic_dec_and_test(&qp->refcount)) |
406 | complete(&qp->free); | |
407 | wait_for_completion(&qp->free); | |
408 | ||
fe9a2603 | 409 | mlx4_qp_free_icm(dev, qp->qpn); |
225c7b1f RD |
410 | } |
411 | EXPORT_SYMBOL_GPL(mlx4_qp_free); | |
412 | ||
413 | static int mlx4_CONF_SPECIAL_QP(struct mlx4_dev *dev, u32 base_qpn) | |
414 | { | |
415 | return mlx4_cmd(dev, 0, base_qpn, 0, MLX4_CMD_CONF_SPECIAL_QP, | |
f9baff50 | 416 | MLX4_CMD_TIME_CLASS_B, MLX4_CMD_NATIVE); |
225c7b1f RD |
417 | } |
418 | ||
3d73c288 | 419 | int mlx4_init_qp_table(struct mlx4_dev *dev) |
225c7b1f RD |
420 | { |
421 | struct mlx4_qp_table *qp_table = &mlx4_priv(dev)->qp_table; | |
422 | int err; | |
93fc9e1b | 423 | int reserved_from_top = 0; |
47605df9 | 424 | int k; |
225c7b1f RD |
425 | |
426 | spin_lock_init(&qp_table->lock); | |
427 | INIT_RADIX_TREE(&dev->qp_table_tree, GFP_ATOMIC); | |
fe9a2603 JM |
428 | if (mlx4_is_slave(dev)) |
429 | return 0; | |
225c7b1f RD |
430 | |
431 | /* | |
432 | * We reserve 2 extra QPs per port for the special QPs. The | |
433 | * block of special QPs must be aligned to a multiple of 8, so | |
434 | * round up. | |
0a1405da SH |
435 | * |
436 | * We also reserve the MSB of the 24-bit QP number to indicate | |
437 | * that a QP is an XRC QP. | |
225c7b1f | 438 | */ |
47605df9 | 439 | dev->phys_caps.base_sqpn = |
93fc9e1b YP |
440 | ALIGN(dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW], 8); |
441 | ||
442 | { | |
443 | int sort[MLX4_NUM_QP_REGION]; | |
444 | int i, j, tmp; | |
445 | int last_base = dev->caps.num_qps; | |
446 | ||
447 | for (i = 1; i < MLX4_NUM_QP_REGION; ++i) | |
448 | sort[i] = i; | |
449 | ||
450 | for (i = MLX4_NUM_QP_REGION; i > 0; --i) { | |
451 | for (j = 2; j < i; ++j) { | |
452 | if (dev->caps.reserved_qps_cnt[sort[j]] > | |
453 | dev->caps.reserved_qps_cnt[sort[j - 1]]) { | |
454 | tmp = sort[j]; | |
455 | sort[j] = sort[j - 1]; | |
456 | sort[j - 1] = tmp; | |
457 | } | |
458 | } | |
459 | } | |
460 | ||
461 | for (i = 1; i < MLX4_NUM_QP_REGION; ++i) { | |
462 | last_base -= dev->caps.reserved_qps_cnt[sort[i]]; | |
463 | dev->caps.reserved_qps_base[sort[i]] = last_base; | |
464 | reserved_from_top += | |
465 | dev->caps.reserved_qps_cnt[sort[i]]; | |
466 | } | |
467 | ||
468 | } | |
469 | ||
e2c76824 JM |
470 | /* Reserve 8 real SQPs in both native and SRIOV modes. |
471 | * In addition, in SRIOV mode, reserve 8 proxy SQPs per function | |
472 | * (for all PFs and VFs), and 8 corresponding tunnel QPs. | |
473 | * Each proxy SQP works opposite its own tunnel QP. | |
474 | * | |
475 | * The QPs are arranged as follows: | |
476 | * a. 8 real SQPs | |
477 | * b. All the proxy SQPs (8 per function) | |
478 | * c. All the tunnel QPs (8 per function) | |
479 | */ | |
480 | ||
225c7b1f | 481 | err = mlx4_bitmap_init(&qp_table->bitmap, dev->caps.num_qps, |
5a0d0a61 | 482 | (1 << 23) - 1, mlx4_num_reserved_sqps(dev), |
93fc9e1b | 483 | reserved_from_top); |
47605df9 JM |
484 | if (err) |
485 | return err; | |
e2c76824 | 486 | |
e2c76824 | 487 | if (mlx4_is_mfunc(dev)) { |
47605df9 JM |
488 | /* for PPF use */ |
489 | dev->phys_caps.base_proxy_sqpn = dev->phys_caps.base_sqpn + 8; | |
490 | dev->phys_caps.base_tunnel_sqpn = dev->phys_caps.base_sqpn + 8 + 8 * MLX4_MFUNC_MAX; | |
491 | ||
492 | /* In mfunc, calculate proxy and tunnel qp offsets for the PF here, | |
493 | * since the PF does not call mlx4_slave_caps */ | |
494 | dev->caps.qp0_tunnel = kcalloc(dev->caps.num_ports, sizeof (u32), GFP_KERNEL); | |
495 | dev->caps.qp0_proxy = kcalloc(dev->caps.num_ports, sizeof (u32), GFP_KERNEL); | |
496 | dev->caps.qp1_tunnel = kcalloc(dev->caps.num_ports, sizeof (u32), GFP_KERNEL); | |
497 | dev->caps.qp1_proxy = kcalloc(dev->caps.num_ports, sizeof (u32), GFP_KERNEL); | |
498 | ||
499 | if (!dev->caps.qp0_tunnel || !dev->caps.qp0_proxy || | |
500 | !dev->caps.qp1_tunnel || !dev->caps.qp1_proxy) { | |
501 | err = -ENOMEM; | |
502 | goto err_mem; | |
503 | } | |
e2c76824 | 504 | |
47605df9 JM |
505 | for (k = 0; k < dev->caps.num_ports; k++) { |
506 | dev->caps.qp0_proxy[k] = dev->phys_caps.base_proxy_sqpn + | |
507 | 8 * mlx4_master_func_num(dev) + k; | |
508 | dev->caps.qp0_tunnel[k] = dev->caps.qp0_proxy[k] + 8 * MLX4_MFUNC_MAX; | |
509 | dev->caps.qp1_proxy[k] = dev->phys_caps.base_proxy_sqpn + | |
510 | 8 * mlx4_master_func_num(dev) + MLX4_MAX_PORTS + k; | |
511 | dev->caps.qp1_tunnel[k] = dev->caps.qp1_proxy[k] + 8 * MLX4_MFUNC_MAX; | |
512 | } | |
513 | } | |
514 | ||
515 | ||
516 | err = mlx4_CONF_SPECIAL_QP(dev, dev->phys_caps.base_sqpn); | |
225c7b1f | 517 | if (err) |
47605df9 JM |
518 | goto err_mem; |
519 | return 0; | |
225c7b1f | 520 | |
47605df9 JM |
521 | err_mem: |
522 | kfree(dev->caps.qp0_tunnel); | |
523 | kfree(dev->caps.qp0_proxy); | |
524 | kfree(dev->caps.qp1_tunnel); | |
525 | kfree(dev->caps.qp1_proxy); | |
526 | dev->caps.qp0_tunnel = dev->caps.qp0_proxy = | |
527 | dev->caps.qp1_tunnel = dev->caps.qp1_proxy = NULL; | |
528 | return err; | |
225c7b1f RD |
529 | } |
530 | ||
531 | void mlx4_cleanup_qp_table(struct mlx4_dev *dev) | |
532 | { | |
fe9a2603 JM |
533 | if (mlx4_is_slave(dev)) |
534 | return; | |
535 | ||
225c7b1f RD |
536 | mlx4_CONF_SPECIAL_QP(dev, 0); |
537 | mlx4_bitmap_cleanup(&mlx4_priv(dev)->qp_table.bitmap); | |
538 | } | |
6a775e2b JM |
539 | |
540 | int mlx4_qp_query(struct mlx4_dev *dev, struct mlx4_qp *qp, | |
541 | struct mlx4_qp_context *context) | |
542 | { | |
543 | struct mlx4_cmd_mailbox *mailbox; | |
544 | int err; | |
545 | ||
546 | mailbox = mlx4_alloc_cmd_mailbox(dev); | |
547 | if (IS_ERR(mailbox)) | |
548 | return PTR_ERR(mailbox); | |
549 | ||
550 | err = mlx4_cmd_box(dev, 0, mailbox->dma, qp->qpn, 0, | |
f9baff50 JM |
551 | MLX4_CMD_QUERY_QP, MLX4_CMD_TIME_CLASS_A, |
552 | MLX4_CMD_WRAPPED); | |
6a775e2b JM |
553 | if (!err) |
554 | memcpy(context, mailbox->buf + 8, sizeof *context); | |
555 | ||
556 | mlx4_free_cmd_mailbox(dev, mailbox); | |
557 | return err; | |
558 | } | |
559 | EXPORT_SYMBOL_GPL(mlx4_qp_query); | |
560 | ||
ed4d3c10 YP |
561 | int mlx4_qp_to_ready(struct mlx4_dev *dev, struct mlx4_mtt *mtt, |
562 | struct mlx4_qp_context *context, | |
563 | struct mlx4_qp *qp, enum mlx4_qp_state *qp_state) | |
564 | { | |
565 | int err; | |
566 | int i; | |
567 | enum mlx4_qp_state states[] = { | |
568 | MLX4_QP_STATE_RST, | |
569 | MLX4_QP_STATE_INIT, | |
570 | MLX4_QP_STATE_RTR, | |
571 | MLX4_QP_STATE_RTS | |
572 | }; | |
573 | ||
574 | for (i = 0; i < ARRAY_SIZE(states) - 1; i++) { | |
575 | context->flags &= cpu_to_be32(~(0xf << 28)); | |
576 | context->flags |= cpu_to_be32(states[i + 1] << 28); | |
577 | err = mlx4_qp_modify(dev, mtt, states[i], states[i + 1], | |
578 | context, 0, 0, qp); | |
579 | if (err) { | |
580 | mlx4_err(dev, "Failed to bring QP to state: " | |
581 | "%d with error: %d\n", | |
582 | states[i + 1], err); | |
583 | return err; | |
584 | } | |
585 | ||
586 | *qp_state = states[i + 1]; | |
587 | } | |
588 | ||
589 | return 0; | |
590 | } | |
591 | EXPORT_SYMBOL_GPL(mlx4_qp_to_ready); |