net/mlx4: off by one in parse_trans_rule()
[linux-2.6-block.git] / drivers / net / ethernet / mellanox / mlx4 / en_netdev.c
CommitLineData
c27a02cd
YP
1/*
2 * Copyright (c) 2007 Mellanox Technologies. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 *
32 */
33
34#include <linux/etherdevice.h>
35#include <linux/tcp.h>
36#include <linux/if_vlan.h>
37#include <linux/delay.h>
5a0e3ad6 38#include <linux/slab.h>
c27a02cd
YP
39
40#include <linux/mlx4/driver.h>
41#include <linux/mlx4/device.h>
42#include <linux/mlx4/cmd.h>
43#include <linux/mlx4/cq.h>
44
45#include "mlx4_en.h"
46#include "en_port.h"
47
897d7846
AV
48static int mlx4_en_setup_tc(struct net_device *dev, u8 up)
49{
bc6a4744
AV
50 struct mlx4_en_priv *priv = netdev_priv(dev);
51 int i;
52 unsigned int q, offset = 0;
53
54 if (up && up != MLX4_EN_NUM_UP)
897d7846
AV
55 return -EINVAL;
56
bc6a4744
AV
57 netdev_set_num_tc(dev, up);
58
59 /* Partition Tx queues evenly amongst UP's */
60 q = priv->tx_ring_num / up;
61 for (i = 0; i < up; i++) {
62 netdev_set_tc_queue(dev, i, q, offset);
63 offset += q;
64 }
65
897d7846
AV
66 return 0;
67}
68
8e586137 69static int mlx4_en_vlan_rx_add_vid(struct net_device *dev, unsigned short vid)
c27a02cd
YP
70{
71 struct mlx4_en_priv *priv = netdev_priv(dev);
72 struct mlx4_en_dev *mdev = priv->mdev;
73 int err;
4c3eb3ca 74 int idx;
c27a02cd 75
f1b553fb 76 en_dbg(HW, priv, "adding VLAN:%d\n", vid);
c27a02cd 77
f1b553fb 78 set_bit(vid, priv->active_vlans);
c27a02cd
YP
79
80 /* Add VID to port VLAN filter */
81 mutex_lock(&mdev->state_lock);
82 if (mdev->device_up && priv->port_up) {
f1b553fb 83 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
c27a02cd 84 if (err)
453a6082 85 en_err(priv, "Failed configuring VLAN filter\n");
c27a02cd 86 }
4c3eb3ca
EC
87 if (mlx4_register_vlan(mdev->dev, priv->port, vid, &idx))
88 en_err(priv, "failed adding vlan %d\n", vid);
c27a02cd 89 mutex_unlock(&mdev->state_lock);
4c3eb3ca 90
8e586137 91 return 0;
c27a02cd
YP
92}
93
8e586137 94static int mlx4_en_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
c27a02cd
YP
95{
96 struct mlx4_en_priv *priv = netdev_priv(dev);
97 struct mlx4_en_dev *mdev = priv->mdev;
98 int err;
4c3eb3ca 99 int idx;
c27a02cd 100
f1b553fb 101 en_dbg(HW, priv, "Killing VID:%d\n", vid);
c27a02cd 102
f1b553fb 103 clear_bit(vid, priv->active_vlans);
c27a02cd
YP
104
105 /* Remove VID from port VLAN filter */
106 mutex_lock(&mdev->state_lock);
4c3eb3ca
EC
107 if (!mlx4_find_cached_vlan(mdev->dev, priv->port, vid, &idx))
108 mlx4_unregister_vlan(mdev->dev, priv->port, idx);
109 else
110 en_err(priv, "could not find vid %d in cache\n", vid);
111
c27a02cd 112 if (mdev->device_up && priv->port_up) {
f1b553fb 113 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
c27a02cd 114 if (err)
453a6082 115 en_err(priv, "Failed configuring VLAN filter\n");
c27a02cd
YP
116 }
117 mutex_unlock(&mdev->state_lock);
8e586137
JP
118
119 return 0;
c27a02cd
YP
120}
121
e7c1c2c4 122u64 mlx4_en_mac_to_u64(u8 *addr)
c27a02cd
YP
123{
124 u64 mac = 0;
125 int i;
126
127 for (i = 0; i < ETH_ALEN; i++) {
128 mac <<= 8;
129 mac |= addr[i];
130 }
131 return mac;
132}
133
134static int mlx4_en_set_mac(struct net_device *dev, void *addr)
135{
136 struct mlx4_en_priv *priv = netdev_priv(dev);
137 struct mlx4_en_dev *mdev = priv->mdev;
138 struct sockaddr *saddr = addr;
139
140 if (!is_valid_ether_addr(saddr->sa_data))
141 return -EADDRNOTAVAIL;
142
143 memcpy(dev->dev_addr, saddr->sa_data, ETH_ALEN);
144 priv->mac = mlx4_en_mac_to_u64(dev->dev_addr);
145 queue_work(mdev->workqueue, &priv->mac_task);
146 return 0;
147}
148
149static void mlx4_en_do_set_mac(struct work_struct *work)
150{
151 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
152 mac_task);
153 struct mlx4_en_dev *mdev = priv->mdev;
154 int err = 0;
155
156 mutex_lock(&mdev->state_lock);
157 if (priv->port_up) {
158 /* Remove old MAC and insert the new one */
1679200f 159 err = mlx4_replace_mac(mdev->dev, priv->port,
ffe455ad 160 priv->base_qpn, priv->mac);
c27a02cd 161 if (err)
453a6082 162 en_err(priv, "Failed changing HW MAC address\n");
c27a02cd 163 } else
453a6082
YP
164 en_dbg(HW, priv, "Port is down while "
165 "registering mac, exiting...\n");
c27a02cd
YP
166
167 mutex_unlock(&mdev->state_lock);
168}
169
170static void mlx4_en_clear_list(struct net_device *dev)
171{
172 struct mlx4_en_priv *priv = netdev_priv(dev);
6d199937 173 struct mlx4_en_mc_list *tmp, *mc_to_del;
c27a02cd 174
6d199937
YP
175 list_for_each_entry_safe(mc_to_del, tmp, &priv->mc_list, list) {
176 list_del(&mc_to_del->list);
177 kfree(mc_to_del);
178 }
c27a02cd
YP
179}
180
181static void mlx4_en_cache_mclist(struct net_device *dev)
182{
183 struct mlx4_en_priv *priv = netdev_priv(dev);
22bedad3 184 struct netdev_hw_addr *ha;
6d199937 185 struct mlx4_en_mc_list *tmp;
ff6e2163 186
0e03567a 187 mlx4_en_clear_list(dev);
6d199937
YP
188 netdev_for_each_mc_addr(ha, dev) {
189 tmp = kzalloc(sizeof(struct mlx4_en_mc_list), GFP_ATOMIC);
190 if (!tmp) {
191 en_err(priv, "failed to allocate multicast list\n");
192 mlx4_en_clear_list(dev);
193 return;
194 }
195 memcpy(tmp->addr, ha->addr, ETH_ALEN);
196 list_add_tail(&tmp->list, &priv->mc_list);
197 }
c27a02cd
YP
198}
199
6d199937
YP
200static void update_mclist_flags(struct mlx4_en_priv *priv,
201 struct list_head *dst,
202 struct list_head *src)
203{
204 struct mlx4_en_mc_list *dst_tmp, *src_tmp, *new_mc;
205 bool found;
206
207 /* Find all the entries that should be removed from dst,
208 * These are the entries that are not found in src
209 */
210 list_for_each_entry(dst_tmp, dst, list) {
211 found = false;
212 list_for_each_entry(src_tmp, src, list) {
213 if (!memcmp(dst_tmp->addr, src_tmp->addr, ETH_ALEN)) {
214 found = true;
215 break;
216 }
217 }
218 if (!found)
219 dst_tmp->action = MCLIST_REM;
220 }
221
222 /* Add entries that exist in src but not in dst
223 * mark them as need to add
224 */
225 list_for_each_entry(src_tmp, src, list) {
226 found = false;
227 list_for_each_entry(dst_tmp, dst, list) {
228 if (!memcmp(dst_tmp->addr, src_tmp->addr, ETH_ALEN)) {
229 dst_tmp->action = MCLIST_NONE;
230 found = true;
231 break;
232 }
233 }
234 if (!found) {
235 new_mc = kmalloc(sizeof(struct mlx4_en_mc_list),
236 GFP_KERNEL);
237 if (!new_mc) {
238 en_err(priv, "Failed to allocate current multicast list\n");
239 return;
240 }
241 memcpy(new_mc, src_tmp,
242 sizeof(struct mlx4_en_mc_list));
243 new_mc->action = MCLIST_ADD;
244 list_add_tail(&new_mc->list, dst);
245 }
246 }
247}
c27a02cd
YP
248
249static void mlx4_en_set_multicast(struct net_device *dev)
250{
251 struct mlx4_en_priv *priv = netdev_priv(dev);
252
253 if (!priv->port_up)
254 return;
255
256 queue_work(priv->mdev->workqueue, &priv->mcast_task);
257}
258
259static void mlx4_en_do_set_multicast(struct work_struct *work)
260{
261 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
262 mcast_task);
263 struct mlx4_en_dev *mdev = priv->mdev;
264 struct net_device *dev = priv->dev;
6d199937 265 struct mlx4_en_mc_list *mclist, *tmp;
c27a02cd 266 u64 mcast_addr = 0;
1679200f 267 u8 mc_list[16] = {0};
c96d97f4 268 int err = 0;
c27a02cd
YP
269
270 mutex_lock(&mdev->state_lock);
271 if (!mdev->device_up) {
453a6082
YP
272 en_dbg(HW, priv, "Card is not up, "
273 "ignoring multicast change.\n");
c27a02cd
YP
274 goto out;
275 }
276 if (!priv->port_up) {
453a6082
YP
277 en_dbg(HW, priv, "Port is down, "
278 "ignoring multicast change.\n");
c27a02cd
YP
279 goto out;
280 }
281
ffe455ad
EE
282 if (!netif_carrier_ok(dev)) {
283 if (!mlx4_en_QUERY_PORT(mdev, priv->port)) {
284 if (priv->port_state.link_state) {
285 priv->last_link_state = MLX4_DEV_EVENT_PORT_UP;
286 netif_carrier_on(dev);
287 en_dbg(LINK, priv, "Link Up\n");
288 }
289 }
290 }
291
c27a02cd
YP
292 /*
293 * Promsicuous mode: disable all filters
294 */
295
296 if (dev->flags & IFF_PROMISC) {
297 if (!(priv->flags & MLX4_EN_FLAG_PROMISC)) {
298 if (netif_msg_rx_status(priv))
453a6082 299 en_warn(priv, "Entering promiscuous mode\n");
c27a02cd
YP
300 priv->flags |= MLX4_EN_FLAG_PROMISC;
301
302 /* Enable promiscouos mode */
c96d97f4 303 switch (mdev->dev->caps.steering_mode) {
592e49dd
HHZ
304 case MLX4_STEERING_MODE_DEVICE_MANAGED:
305 err = mlx4_flow_steer_promisc_add(mdev->dev,
306 priv->port,
307 priv->base_qpn,
308 MLX4_FS_PROMISC_UPLINK);
309 if (err)
310 en_err(priv, "Failed enabling promiscuous mode\n");
311 priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
312 break;
313
c96d97f4
HHZ
314 case MLX4_STEERING_MODE_B0:
315 err = mlx4_unicast_promisc_add(mdev->dev,
316 priv->base_qpn,
1679200f 317 priv->port);
c96d97f4
HHZ
318 if (err)
319 en_err(priv, "Failed enabling unicast promiscuous mode\n");
320
321 /* Add the default qp number as multicast
322 * promisc
323 */
324 if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) {
325 err = mlx4_multicast_promisc_add(mdev->dev,
326 priv->base_qpn,
327 priv->port);
328 if (err)
329 en_err(priv, "Failed enabling multicast promiscuous mode\n");
330 priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
331 }
332 break;
333
334 case MLX4_STEERING_MODE_A0:
335 err = mlx4_SET_PORT_qpn_calc(mdev->dev,
336 priv->port,
337 priv->base_qpn,
338 1);
339 if (err)
340 en_err(priv, "Failed enabling promiscuous mode\n");
341 break;
342 }
c27a02cd
YP
343
344 /* Disable port multicast filter (unconditionally) */
345 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
346 0, MLX4_MCAST_DISABLE);
347 if (err)
453a6082
YP
348 en_err(priv, "Failed disabling "
349 "multicast filter\n");
c27a02cd 350
f1b553fb
JP
351 /* Disable port VLAN filter */
352 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
353 if (err)
354 en_err(priv, "Failed disabling VLAN filter\n");
c27a02cd
YP
355 }
356 goto out;
357 }
358
359 /*
25985edc 360 * Not in promiscuous mode
c27a02cd
YP
361 */
362
363 if (priv->flags & MLX4_EN_FLAG_PROMISC) {
364 if (netif_msg_rx_status(priv))
453a6082 365 en_warn(priv, "Leaving promiscuous mode\n");
c27a02cd
YP
366 priv->flags &= ~MLX4_EN_FLAG_PROMISC;
367
368 /* Disable promiscouos mode */
c96d97f4 369 switch (mdev->dev->caps.steering_mode) {
592e49dd
HHZ
370 case MLX4_STEERING_MODE_DEVICE_MANAGED:
371 err = mlx4_flow_steer_promisc_remove(mdev->dev,
372 priv->port,
373 MLX4_FS_PROMISC_UPLINK);
374 if (err)
375 en_err(priv, "Failed disabling promiscuous mode\n");
376 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
377 break;
378
c96d97f4
HHZ
379 case MLX4_STEERING_MODE_B0:
380 err = mlx4_unicast_promisc_remove(mdev->dev,
381 priv->base_qpn,
1679200f 382 priv->port);
c96d97f4
HHZ
383 if (err)
384 en_err(priv, "Failed disabling unicast promiscuous mode\n");
385 /* Disable Multicast promisc */
386 if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
387 err = mlx4_multicast_promisc_remove(mdev->dev,
388 priv->base_qpn,
389 priv->port);
390 if (err)
391 en_err(priv, "Failed disabling multicast promiscuous mode\n");
392 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
393 }
394 break;
c27a02cd 395
c96d97f4
HHZ
396 case MLX4_STEERING_MODE_A0:
397 err = mlx4_SET_PORT_qpn_calc(mdev->dev,
398 priv->port,
399 priv->base_qpn, 0);
1679200f 400 if (err)
c96d97f4
HHZ
401 en_err(priv, "Failed disabling promiscuous mode\n");
402 break;
1679200f
YP
403 }
404
c27a02cd 405 /* Enable port VLAN filter */
f1b553fb 406 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
c27a02cd 407 if (err)
453a6082 408 en_err(priv, "Failed enabling VLAN filter\n");
c27a02cd
YP
409 }
410
411 /* Enable/disable the multicast filter according to IFF_ALLMULTI */
412 if (dev->flags & IFF_ALLMULTI) {
413 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
414 0, MLX4_MCAST_DISABLE);
415 if (err)
453a6082 416 en_err(priv, "Failed disabling multicast filter\n");
1679200f
YP
417
418 /* Add the default qp number as multicast promisc */
419 if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) {
c96d97f4 420 switch (mdev->dev->caps.steering_mode) {
592e49dd
HHZ
421 case MLX4_STEERING_MODE_DEVICE_MANAGED:
422 err = mlx4_flow_steer_promisc_add(mdev->dev,
423 priv->port,
424 priv->base_qpn,
425 MLX4_FS_PROMISC_ALL_MULTI);
426 break;
427
c96d97f4
HHZ
428 case MLX4_STEERING_MODE_B0:
429 err = mlx4_multicast_promisc_add(mdev->dev,
430 priv->base_qpn,
431 priv->port);
432 break;
433
434 case MLX4_STEERING_MODE_A0:
435 break;
436 }
1679200f
YP
437 if (err)
438 en_err(priv, "Failed entering multicast promisc mode\n");
439 priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
440 }
c27a02cd 441 } else {
1679200f
YP
442 /* Disable Multicast promisc */
443 if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
c96d97f4 444 switch (mdev->dev->caps.steering_mode) {
592e49dd
HHZ
445 case MLX4_STEERING_MODE_DEVICE_MANAGED:
446 err = mlx4_flow_steer_promisc_remove(mdev->dev,
447 priv->port,
448 MLX4_FS_PROMISC_ALL_MULTI);
449 break;
450
c96d97f4
HHZ
451 case MLX4_STEERING_MODE_B0:
452 err = mlx4_multicast_promisc_remove(mdev->dev,
453 priv->base_qpn,
454 priv->port);
455 break;
456
457 case MLX4_STEERING_MODE_A0:
458 break;
459 }
1679200f 460 if (err)
25985edc 461 en_err(priv, "Failed disabling multicast promiscuous mode\n");
1679200f
YP
462 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
463 }
ff6e2163 464
c27a02cd
YP
465 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
466 0, MLX4_MCAST_DISABLE);
467 if (err)
453a6082 468 en_err(priv, "Failed disabling multicast filter\n");
c27a02cd
YP
469
470 /* Flush mcast filter and init it with broadcast address */
471 mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, ETH_BCAST,
472 1, MLX4_MCAST_CONFIG);
473
474 /* Update multicast list - we cache all addresses so they won't
475 * change while HW is updated holding the command semaphor */
476 netif_tx_lock_bh(dev);
477 mlx4_en_cache_mclist(dev);
478 netif_tx_unlock_bh(dev);
6d199937
YP
479 list_for_each_entry(mclist, &priv->mc_list, list) {
480 mcast_addr = mlx4_en_mac_to_u64(mclist->addr);
c27a02cd
YP
481 mlx4_SET_MCAST_FLTR(mdev->dev, priv->port,
482 mcast_addr, 0, MLX4_MCAST_CONFIG);
483 }
484 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
485 0, MLX4_MCAST_ENABLE);
486 if (err)
453a6082 487 en_err(priv, "Failed enabling multicast filter\n");
6d199937
YP
488
489 update_mclist_flags(priv, &priv->curr_list, &priv->mc_list);
490 list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) {
491 if (mclist->action == MCLIST_REM) {
492 /* detach this address and delete from list */
493 memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
494 mc_list[5] = priv->port;
495 err = mlx4_multicast_detach(mdev->dev,
496 &priv->rss_map.indir_qp,
497 mc_list,
0ff1fb65
HHZ
498 MLX4_PROT_ETH,
499 mclist->reg_id);
6d199937
YP
500 if (err)
501 en_err(priv, "Fail to detach multicast address\n");
502
503 /* remove from list */
504 list_del(&mclist->list);
505 kfree(mclist);
506 }
507
508 if (mclist->action == MCLIST_ADD) {
509 /* attach the address */
510 memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
0ff1fb65 511 /* needed for B0 steering support */
6d199937
YP
512 mc_list[5] = priv->port;
513 err = mlx4_multicast_attach(mdev->dev,
514 &priv->rss_map.indir_qp,
0ff1fb65
HHZ
515 mc_list,
516 priv->port, 0,
517 MLX4_PROT_ETH,
518 &mclist->reg_id);
6d199937
YP
519 if (err)
520 en_err(priv, "Fail to attach multicast address\n");
521
522 }
523 }
c27a02cd
YP
524 }
525out:
526 mutex_unlock(&mdev->state_lock);
527}
528
529#ifdef CONFIG_NET_POLL_CONTROLLER
530static void mlx4_en_netpoll(struct net_device *dev)
531{
532 struct mlx4_en_priv *priv = netdev_priv(dev);
533 struct mlx4_en_cq *cq;
534 unsigned long flags;
535 int i;
536
537 for (i = 0; i < priv->rx_ring_num; i++) {
538 cq = &priv->rx_cq[i];
539 spin_lock_irqsave(&cq->lock, flags);
540 napi_synchronize(&cq->napi);
541 mlx4_en_process_rx_cq(dev, cq, 0);
542 spin_unlock_irqrestore(&cq->lock, flags);
543 }
544}
545#endif
546
547static void mlx4_en_tx_timeout(struct net_device *dev)
548{
549 struct mlx4_en_priv *priv = netdev_priv(dev);
550 struct mlx4_en_dev *mdev = priv->mdev;
551
552 if (netif_msg_timer(priv))
453a6082 553 en_warn(priv, "Tx timeout called on port:%d\n", priv->port);
c27a02cd 554
1e338db5 555 priv->port_stats.tx_timeout++;
453a6082 556 en_dbg(DRV, priv, "Scheduling watchdog\n");
1e338db5 557 queue_work(mdev->workqueue, &priv->watchdog_task);
c27a02cd
YP
558}
559
560
561static struct net_device_stats *mlx4_en_get_stats(struct net_device *dev)
562{
563 struct mlx4_en_priv *priv = netdev_priv(dev);
564
565 spin_lock_bh(&priv->stats_lock);
566 memcpy(&priv->ret_stats, &priv->stats, sizeof(priv->stats));
567 spin_unlock_bh(&priv->stats_lock);
568
569 return &priv->ret_stats;
570}
571
572static void mlx4_en_set_default_moderation(struct mlx4_en_priv *priv)
573{
c27a02cd
YP
574 struct mlx4_en_cq *cq;
575 int i;
576
577 /* If we haven't received a specific coalescing setting
98a1708d 578 * (module param), we set the moderation parameters as follows:
c27a02cd
YP
579 * - moder_cnt is set to the number of mtu sized packets to
580 * satisfy our coelsing target.
581 * - moder_time is set to a fixed value.
582 */
3db36fb2 583 priv->rx_frames = MLX4_EN_RX_COAL_TARGET;
60b9f9e5 584 priv->rx_usecs = MLX4_EN_RX_COAL_TIME;
a19a848a
YP
585 priv->tx_frames = MLX4_EN_TX_COAL_PKTS;
586 priv->tx_usecs = MLX4_EN_TX_COAL_TIME;
453a6082
YP
587 en_dbg(INTR, priv, "Default coalesing params for mtu:%d - "
588 "rx_frames:%d rx_usecs:%d\n",
c27a02cd
YP
589 priv->dev->mtu, priv->rx_frames, priv->rx_usecs);
590
591 /* Setup cq moderation params */
592 for (i = 0; i < priv->rx_ring_num; i++) {
593 cq = &priv->rx_cq[i];
594 cq->moder_cnt = priv->rx_frames;
595 cq->moder_time = priv->rx_usecs;
6b4d8d9f
AG
596 priv->last_moder_time[i] = MLX4_EN_AUTO_CONF;
597 priv->last_moder_packets[i] = 0;
598 priv->last_moder_bytes[i] = 0;
c27a02cd
YP
599 }
600
601 for (i = 0; i < priv->tx_ring_num; i++) {
602 cq = &priv->tx_cq[i];
a19a848a
YP
603 cq->moder_cnt = priv->tx_frames;
604 cq->moder_time = priv->tx_usecs;
c27a02cd
YP
605 }
606
607 /* Reset auto-moderation params */
608 priv->pkt_rate_low = MLX4_EN_RX_RATE_LOW;
609 priv->rx_usecs_low = MLX4_EN_RX_COAL_TIME_LOW;
610 priv->pkt_rate_high = MLX4_EN_RX_RATE_HIGH;
611 priv->rx_usecs_high = MLX4_EN_RX_COAL_TIME_HIGH;
612 priv->sample_interval = MLX4_EN_SAMPLE_INTERVAL;
60b9f9e5 613 priv->adaptive_rx_coal = 1;
c27a02cd 614 priv->last_moder_jiffies = 0;
c27a02cd 615 priv->last_moder_tx_packets = 0;
c27a02cd
YP
616}
617
618static void mlx4_en_auto_moderation(struct mlx4_en_priv *priv)
619{
620 unsigned long period = (unsigned long) (jiffies - priv->last_moder_jiffies);
c27a02cd
YP
621 struct mlx4_en_cq *cq;
622 unsigned long packets;
623 unsigned long rate;
624 unsigned long avg_pkt_size;
625 unsigned long rx_packets;
626 unsigned long rx_bytes;
c27a02cd
YP
627 unsigned long rx_pkt_diff;
628 int moder_time;
6b4d8d9f 629 int ring, err;
c27a02cd
YP
630
631 if (!priv->adaptive_rx_coal || period < priv->sample_interval * HZ)
632 return;
633
6b4d8d9f
AG
634 for (ring = 0; ring < priv->rx_ring_num; ring++) {
635 spin_lock_bh(&priv->stats_lock);
636 rx_packets = priv->rx_ring[ring].packets;
637 rx_bytes = priv->rx_ring[ring].bytes;
638 spin_unlock_bh(&priv->stats_lock);
639
640 rx_pkt_diff = ((unsigned long) (rx_packets -
641 priv->last_moder_packets[ring]));
642 packets = rx_pkt_diff;
643 rate = packets * HZ / period;
644 avg_pkt_size = packets ? ((unsigned long) (rx_bytes -
645 priv->last_moder_bytes[ring])) / packets : 0;
646
647 /* Apply auto-moderation only when packet rate
648 * exceeds a rate that it matters */
649 if (rate > (MLX4_EN_RX_RATE_THRESH / priv->rx_ring_num) &&
650 avg_pkt_size > MLX4_EN_AVG_PKT_SMALL) {
c27a02cd
YP
651 if (rate < priv->pkt_rate_low)
652 moder_time = priv->rx_usecs_low;
653 else if (rate > priv->pkt_rate_high)
654 moder_time = priv->rx_usecs_high;
655 else
656 moder_time = (rate - priv->pkt_rate_low) *
657 (priv->rx_usecs_high - priv->rx_usecs_low) /
658 (priv->pkt_rate_high - priv->pkt_rate_low) +
659 priv->rx_usecs_low;
6b4d8d9f
AG
660 } else {
661 moder_time = priv->rx_usecs_low;
c27a02cd 662 }
c27a02cd 663
6b4d8d9f
AG
664 if (moder_time != priv->last_moder_time[ring]) {
665 priv->last_moder_time[ring] = moder_time;
666 cq = &priv->rx_cq[ring];
c27a02cd
YP
667 cq->moder_time = moder_time;
668 err = mlx4_en_set_cq_moder(priv, cq);
6b4d8d9f
AG
669 if (err)
670 en_err(priv, "Failed modifying moderation "
671 "for cq:%d\n", ring);
c27a02cd 672 }
6b4d8d9f
AG
673 priv->last_moder_packets[ring] = rx_packets;
674 priv->last_moder_bytes[ring] = rx_bytes;
c27a02cd
YP
675 }
676
c27a02cd
YP
677 priv->last_moder_jiffies = jiffies;
678}
679
680static void mlx4_en_do_get_stats(struct work_struct *work)
681{
bf6aede7 682 struct delayed_work *delay = to_delayed_work(work);
c27a02cd
YP
683 struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv,
684 stats_task);
685 struct mlx4_en_dev *mdev = priv->mdev;
686 int err;
687
688 err = mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 0);
689 if (err)
2381a55c 690 en_dbg(HW, priv, "Could not update stats\n");
c27a02cd
YP
691
692 mutex_lock(&mdev->state_lock);
693 if (mdev->device_up) {
694 if (priv->port_up)
695 mlx4_en_auto_moderation(priv);
696
697 queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY);
698 }
d7e1a487
YP
699 if (mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port]) {
700 queue_work(mdev->workqueue, &priv->mac_task);
701 mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port] = 0;
702 }
c27a02cd
YP
703 mutex_unlock(&mdev->state_lock);
704}
705
706static void mlx4_en_linkstate(struct work_struct *work)
707{
708 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
709 linkstate_task);
710 struct mlx4_en_dev *mdev = priv->mdev;
711 int linkstate = priv->link_state;
712
713 mutex_lock(&mdev->state_lock);
714 /* If observable port state changed set carrier state and
715 * report to system log */
716 if (priv->last_link_state != linkstate) {
717 if (linkstate == MLX4_DEV_EVENT_PORT_DOWN) {
e5cc44b2 718 en_info(priv, "Link Down\n");
c27a02cd
YP
719 netif_carrier_off(priv->dev);
720 } else {
e5cc44b2 721 en_info(priv, "Link Up\n");
c27a02cd
YP
722 netif_carrier_on(priv->dev);
723 }
724 }
725 priv->last_link_state = linkstate;
726 mutex_unlock(&mdev->state_lock);
727}
728
729
18cc42a3 730int mlx4_en_start_port(struct net_device *dev)
c27a02cd
YP
731{
732 struct mlx4_en_priv *priv = netdev_priv(dev);
733 struct mlx4_en_dev *mdev = priv->mdev;
734 struct mlx4_en_cq *cq;
735 struct mlx4_en_tx_ring *tx_ring;
c27a02cd
YP
736 int rx_index = 0;
737 int tx_index = 0;
c27a02cd
YP
738 int err = 0;
739 int i;
740 int j;
1679200f 741 u8 mc_list[16] = {0};
c27a02cd
YP
742
743 if (priv->port_up) {
453a6082 744 en_dbg(DRV, priv, "start port called while port already up\n");
c27a02cd
YP
745 return 0;
746 }
747
6d199937
YP
748 INIT_LIST_HEAD(&priv->mc_list);
749 INIT_LIST_HEAD(&priv->curr_list);
750
c27a02cd
YP
751 /* Calculate Rx buf size */
752 dev->mtu = min(dev->mtu, priv->max_mtu);
753 mlx4_en_calc_rx_buf(dev);
453a6082 754 en_dbg(DRV, priv, "Rx buf size:%d\n", priv->rx_skb_size);
38aab07c 755
c27a02cd 756 /* Configure rx cq's and rings */
38aab07c
YP
757 err = mlx4_en_activate_rx_rings(priv);
758 if (err) {
453a6082 759 en_err(priv, "Failed to activate RX rings\n");
38aab07c
YP
760 return err;
761 }
c27a02cd
YP
762 for (i = 0; i < priv->rx_ring_num; i++) {
763 cq = &priv->rx_cq[i];
c27a02cd 764
76532d0c 765 err = mlx4_en_activate_cq(priv, cq, i);
c27a02cd 766 if (err) {
453a6082 767 en_err(priv, "Failed activating Rx CQ\n");
a4233304 768 goto cq_err;
c27a02cd
YP
769 }
770 for (j = 0; j < cq->size; j++)
771 cq->buf[j].owner_sr_opcode = MLX4_CQE_OWNER_MASK;
772 err = mlx4_en_set_cq_moder(priv, cq);
773 if (err) {
453a6082 774 en_err(priv, "Failed setting cq moderation parameters");
c27a02cd
YP
775 mlx4_en_deactivate_cq(priv, cq);
776 goto cq_err;
777 }
778 mlx4_en_arm_cq(priv, cq);
38aab07c 779 priv->rx_ring[i].cqn = cq->mcq.cqn;
c27a02cd
YP
780 ++rx_index;
781 }
782
ffe455ad
EE
783 /* Set qp number */
784 en_dbg(DRV, priv, "Getting qp number for port %d\n", priv->port);
785 err = mlx4_get_eth_qp(mdev->dev, priv->port,
786 priv->mac, &priv->base_qpn);
1679200f 787 if (err) {
ffe455ad 788 en_err(priv, "Failed getting eth qp\n");
1679200f
YP
789 goto cq_err;
790 }
791 mdev->mac_removed[priv->port] = 0;
792
c27a02cd
YP
793 err = mlx4_en_config_rss_steer(priv);
794 if (err) {
453a6082 795 en_err(priv, "Failed configuring rss steering\n");
1679200f 796 goto mac_err;
c27a02cd
YP
797 }
798
cabdc8ee
HHZ
799 err = mlx4_en_create_drop_qp(priv);
800 if (err)
801 goto rss_err;
802
c27a02cd
YP
803 /* Configure tx cq's and rings */
804 for (i = 0; i < priv->tx_ring_num; i++) {
805 /* Configure cq */
806 cq = &priv->tx_cq[i];
76532d0c 807 err = mlx4_en_activate_cq(priv, cq, i);
c27a02cd 808 if (err) {
453a6082 809 en_err(priv, "Failed allocating Tx CQ\n");
c27a02cd
YP
810 goto tx_err;
811 }
812 err = mlx4_en_set_cq_moder(priv, cq);
813 if (err) {
453a6082 814 en_err(priv, "Failed setting cq moderation parameters");
c27a02cd
YP
815 mlx4_en_deactivate_cq(priv, cq);
816 goto tx_err;
817 }
453a6082 818 en_dbg(DRV, priv, "Resetting index of collapsed CQ:%d to -1\n", i);
c27a02cd
YP
819 cq->buf->wqe_index = cpu_to_be16(0xffff);
820
821 /* Configure ring */
822 tx_ring = &priv->tx_ring[i];
0e98b523 823 err = mlx4_en_activate_tx_ring(priv, tx_ring, cq->mcq.cqn,
bc6a4744 824 i / priv->mdev->profile.num_tx_rings_p_up);
c27a02cd 825 if (err) {
453a6082 826 en_err(priv, "Failed allocating Tx ring\n");
c27a02cd
YP
827 mlx4_en_deactivate_cq(priv, cq);
828 goto tx_err;
829 }
5b263f53 830 tx_ring->tx_queue = netdev_get_tx_queue(dev, i);
e22979d9
YP
831
832 /* Arm CQ for TX completions */
833 mlx4_en_arm_cq(priv, cq);
834
c27a02cd
YP
835 /* Set initial ownership of all Tx TXBBs to SW (1) */
836 for (j = 0; j < tx_ring->buf_size; j += STAMP_STRIDE)
837 *((u32 *) (tx_ring->buf + j)) = 0xffffffff;
838 ++tx_index;
839 }
840
841 /* Configure port */
842 err = mlx4_SET_PORT_general(mdev->dev, priv->port,
843 priv->rx_skb_size + ETH_FCS_LEN,
d53b93f2
YP
844 priv->prof->tx_pause,
845 priv->prof->tx_ppp,
846 priv->prof->rx_pause,
847 priv->prof->rx_ppp);
c27a02cd 848 if (err) {
453a6082
YP
849 en_err(priv, "Failed setting port general configurations "
850 "for port %d, with error %d\n", priv->port, err);
c27a02cd
YP
851 goto tx_err;
852 }
853 /* Set default qp number */
854 err = mlx4_SET_PORT_qpn_calc(mdev->dev, priv->port, priv->base_qpn, 0);
855 if (err) {
453a6082 856 en_err(priv, "Failed setting default qp numbers\n");
c27a02cd
YP
857 goto tx_err;
858 }
c27a02cd
YP
859
860 /* Init port */
453a6082 861 en_dbg(HW, priv, "Initializing port\n");
c27a02cd
YP
862 err = mlx4_INIT_PORT(mdev->dev, priv->port);
863 if (err) {
453a6082 864 en_err(priv, "Failed Initializing port\n");
1679200f 865 goto tx_err;
c27a02cd
YP
866 }
867
1679200f
YP
868 /* Attach rx QP to bradcast address */
869 memset(&mc_list[10], 0xff, ETH_ALEN);
0ff1fb65 870 mc_list[5] = priv->port; /* needed for B0 steering support */
1679200f 871 if (mlx4_multicast_attach(mdev->dev, &priv->rss_map.indir_qp, mc_list,
0ff1fb65
HHZ
872 priv->port, 0, MLX4_PROT_ETH,
873 &priv->broadcast_id))
1679200f
YP
874 mlx4_warn(mdev, "Failed Attaching Broadcast\n");
875
b5845f98
HX
876 /* Must redo promiscuous mode setup. */
877 priv->flags &= ~(MLX4_EN_FLAG_PROMISC | MLX4_EN_FLAG_MC_PROMISC);
592e49dd
HHZ
878 if (mdev->dev->caps.steering_mode ==
879 MLX4_STEERING_MODE_DEVICE_MANAGED) {
880 mlx4_flow_steer_promisc_remove(mdev->dev,
881 priv->port,
882 MLX4_FS_PROMISC_UPLINK);
883 mlx4_flow_steer_promisc_remove(mdev->dev,
884 priv->port,
885 MLX4_FS_PROMISC_ALL_MULTI);
886 }
b5845f98 887
c27a02cd
YP
888 /* Schedule multicast task to populate multicast list */
889 queue_work(mdev->workqueue, &priv->mcast_task);
890
93ece0c1
EE
891 mlx4_set_stats_bitmap(mdev->dev, &priv->stats_bitmap);
892
c27a02cd 893 priv->port_up = true;
a11faac7 894 netif_tx_start_all_queues(dev);
c27a02cd
YP
895 return 0;
896
c27a02cd
YP
897tx_err:
898 while (tx_index--) {
899 mlx4_en_deactivate_tx_ring(priv, &priv->tx_ring[tx_index]);
900 mlx4_en_deactivate_cq(priv, &priv->tx_cq[tx_index]);
901 }
cabdc8ee
HHZ
902 mlx4_en_destroy_drop_qp(priv);
903rss_err:
c27a02cd 904 mlx4_en_release_rss_steer(priv);
1679200f 905mac_err:
ffe455ad 906 mlx4_put_eth_qp(mdev->dev, priv->port, priv->mac, priv->base_qpn);
c27a02cd
YP
907cq_err:
908 while (rx_index--)
909 mlx4_en_deactivate_cq(priv, &priv->rx_cq[rx_index]);
38aab07c
YP
910 for (i = 0; i < priv->rx_ring_num; i++)
911 mlx4_en_deactivate_rx_ring(priv, &priv->rx_ring[i]);
c27a02cd
YP
912
913 return err; /* need to close devices */
914}
915
916
18cc42a3 917void mlx4_en_stop_port(struct net_device *dev)
c27a02cd
YP
918{
919 struct mlx4_en_priv *priv = netdev_priv(dev);
920 struct mlx4_en_dev *mdev = priv->mdev;
6d199937 921 struct mlx4_en_mc_list *mclist, *tmp;
c27a02cd 922 int i;
1679200f 923 u8 mc_list[16] = {0};
c27a02cd
YP
924
925 if (!priv->port_up) {
453a6082 926 en_dbg(DRV, priv, "stop port called while port already down\n");
c27a02cd
YP
927 return;
928 }
c27a02cd
YP
929
930 /* Synchronize with tx routine */
931 netif_tx_lock_bh(dev);
3c05f5ef 932 netif_tx_stop_all_queues(dev);
c27a02cd
YP
933 netif_tx_unlock_bh(dev);
934
7c287380 935 /* Set port as not active */
3c05f5ef 936 priv->port_up = false;
c27a02cd 937
1679200f
YP
938 /* Detach All multicasts */
939 memset(&mc_list[10], 0xff, ETH_ALEN);
0ff1fb65 940 mc_list[5] = priv->port; /* needed for B0 steering support */
1679200f 941 mlx4_multicast_detach(mdev->dev, &priv->rss_map.indir_qp, mc_list,
0ff1fb65 942 MLX4_PROT_ETH, priv->broadcast_id);
6d199937
YP
943 list_for_each_entry(mclist, &priv->curr_list, list) {
944 memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
1679200f
YP
945 mc_list[5] = priv->port;
946 mlx4_multicast_detach(mdev->dev, &priv->rss_map.indir_qp,
0ff1fb65 947 mc_list, MLX4_PROT_ETH, mclist->reg_id);
1679200f
YP
948 }
949 mlx4_en_clear_list(dev);
6d199937
YP
950 list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) {
951 list_del(&mclist->list);
952 kfree(mclist);
953 }
954
1679200f
YP
955 /* Flush multicast filter */
956 mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 1, MLX4_MCAST_CONFIG);
957
cabdc8ee
HHZ
958 mlx4_en_destroy_drop_qp(priv);
959
c27a02cd
YP
960 /* Free TX Rings */
961 for (i = 0; i < priv->tx_ring_num; i++) {
962 mlx4_en_deactivate_tx_ring(priv, &priv->tx_ring[i]);
963 mlx4_en_deactivate_cq(priv, &priv->tx_cq[i]);
964 }
965 msleep(10);
966
967 for (i = 0; i < priv->tx_ring_num; i++)
968 mlx4_en_free_tx_buf(dev, &priv->tx_ring[i]);
969
970 /* Free RSS qps */
971 mlx4_en_release_rss_steer(priv);
972
ffe455ad
EE
973 /* Unregister Mac address for the port */
974 mlx4_put_eth_qp(mdev->dev, priv->port, priv->mac, priv->base_qpn);
975 mdev->mac_removed[priv->port] = 1;
976
c27a02cd
YP
977 /* Free RX Rings */
978 for (i = 0; i < priv->rx_ring_num; i++) {
979 mlx4_en_deactivate_rx_ring(priv, &priv->rx_ring[i]);
980 while (test_bit(NAPI_STATE_SCHED, &priv->rx_cq[i].napi.state))
981 msleep(1);
982 mlx4_en_deactivate_cq(priv, &priv->rx_cq[i]);
983 }
7c287380
YP
984
985 /* close port*/
986 mlx4_CLOSE_PORT(mdev->dev, priv->port);
c27a02cd
YP
987}
988
989static void mlx4_en_restart(struct work_struct *work)
990{
991 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
992 watchdog_task);
993 struct mlx4_en_dev *mdev = priv->mdev;
994 struct net_device *dev = priv->dev;
5b263f53 995 int i;
c27a02cd 996
453a6082 997 en_dbg(DRV, priv, "Watchdog task called for port %d\n", priv->port);
1e338db5
YP
998
999 mutex_lock(&mdev->state_lock);
1000 if (priv->port_up) {
1001 mlx4_en_stop_port(dev);
5b263f53
YP
1002 for (i = 0; i < priv->tx_ring_num; i++)
1003 netdev_tx_reset_queue(priv->tx_ring[i].tx_queue);
1e338db5 1004 if (mlx4_en_start_port(dev))
453a6082 1005 en_err(priv, "Failed restarting port %d\n", priv->port);
1e338db5
YP
1006 }
1007 mutex_unlock(&mdev->state_lock);
c27a02cd
YP
1008}
1009
b477ba62 1010static void mlx4_en_clear_stats(struct net_device *dev)
c27a02cd
YP
1011{
1012 struct mlx4_en_priv *priv = netdev_priv(dev);
1013 struct mlx4_en_dev *mdev = priv->mdev;
1014 int i;
c27a02cd 1015
c27a02cd 1016 if (mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 1))
453a6082 1017 en_dbg(HW, priv, "Failed dumping statistics\n");
c27a02cd
YP
1018
1019 memset(&priv->stats, 0, sizeof(priv->stats));
1020 memset(&priv->pstats, 0, sizeof(priv->pstats));
b477ba62
EE
1021 memset(&priv->pkstats, 0, sizeof(priv->pkstats));
1022 memset(&priv->port_stats, 0, sizeof(priv->port_stats));
c27a02cd
YP
1023
1024 for (i = 0; i < priv->tx_ring_num; i++) {
1025 priv->tx_ring[i].bytes = 0;
1026 priv->tx_ring[i].packets = 0;
b477ba62 1027 priv->tx_ring[i].tx_csum = 0;
c27a02cd
YP
1028 }
1029 for (i = 0; i < priv->rx_ring_num; i++) {
1030 priv->rx_ring[i].bytes = 0;
1031 priv->rx_ring[i].packets = 0;
b477ba62
EE
1032 priv->rx_ring[i].csum_ok = 0;
1033 priv->rx_ring[i].csum_none = 0;
c27a02cd 1034 }
b477ba62
EE
1035}
1036
1037static int mlx4_en_open(struct net_device *dev)
1038{
1039 struct mlx4_en_priv *priv = netdev_priv(dev);
1040 struct mlx4_en_dev *mdev = priv->mdev;
1041 int err = 0;
1042
1043 mutex_lock(&mdev->state_lock);
1044
1045 if (!mdev->device_up) {
1046 en_err(priv, "Cannot open - device down/disabled\n");
1047 err = -EBUSY;
1048 goto out;
1049 }
1050
1051 /* Reset HW statistics and SW counters */
1052 mlx4_en_clear_stats(dev);
c27a02cd 1053
c27a02cd
YP
1054 err = mlx4_en_start_port(dev);
1055 if (err)
453a6082 1056 en_err(priv, "Failed starting port:%d\n", priv->port);
c27a02cd
YP
1057
1058out:
1059 mutex_unlock(&mdev->state_lock);
1060 return err;
1061}
1062
1063
1064static int mlx4_en_close(struct net_device *dev)
1065{
1066 struct mlx4_en_priv *priv = netdev_priv(dev);
1067 struct mlx4_en_dev *mdev = priv->mdev;
1068
453a6082 1069 en_dbg(IFDOWN, priv, "Close port called\n");
c27a02cd
YP
1070
1071 mutex_lock(&mdev->state_lock);
1072
1073 mlx4_en_stop_port(dev);
1074 netif_carrier_off(dev);
1075
1076 mutex_unlock(&mdev->state_lock);
1077 return 0;
1078}
1079
fe0af03c 1080void mlx4_en_free_resources(struct mlx4_en_priv *priv)
c27a02cd
YP
1081{
1082 int i;
1083
1084 for (i = 0; i < priv->tx_ring_num; i++) {
1085 if (priv->tx_ring[i].tx_info)
1086 mlx4_en_destroy_tx_ring(priv, &priv->tx_ring[i]);
1087 if (priv->tx_cq[i].buf)
fe0af03c 1088 mlx4_en_destroy_cq(priv, &priv->tx_cq[i]);
c27a02cd
YP
1089 }
1090
1091 for (i = 0; i < priv->rx_ring_num; i++) {
1092 if (priv->rx_ring[i].rx_info)
68355f71
TLSC
1093 mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i],
1094 priv->prof->rx_ring_size, priv->stride);
c27a02cd 1095 if (priv->rx_cq[i].buf)
fe0af03c 1096 mlx4_en_destroy_cq(priv, &priv->rx_cq[i]);
c27a02cd 1097 }
044ca2a5
YP
1098
1099 if (priv->base_tx_qpn) {
1100 mlx4_qp_release_range(priv->mdev->dev, priv->base_tx_qpn, priv->tx_ring_num);
1101 priv->base_tx_qpn = 0;
1102 }
c27a02cd
YP
1103}
1104
18cc42a3 1105int mlx4_en_alloc_resources(struct mlx4_en_priv *priv)
c27a02cd 1106{
c27a02cd
YP
1107 struct mlx4_en_port_profile *prof = priv->prof;
1108 int i;
044ca2a5 1109 int err;
87a5c389 1110
044ca2a5 1111 err = mlx4_qp_reserve_range(priv->mdev->dev, priv->tx_ring_num, 256, &priv->base_tx_qpn);
87a5c389
YP
1112 if (err) {
1113 en_err(priv, "failed reserving range for TX rings\n");
1114 return err;
1115 }
c27a02cd
YP
1116
1117 /* Create tx Rings */
1118 for (i = 0; i < priv->tx_ring_num; i++) {
1119 if (mlx4_en_create_cq(priv, &priv->tx_cq[i],
1120 prof->tx_ring_size, i, TX))
1121 goto err;
1122
044ca2a5 1123 if (mlx4_en_create_tx_ring(priv, &priv->tx_ring[i], priv->base_tx_qpn + i,
c27a02cd
YP
1124 prof->tx_ring_size, TXBB_SIZE))
1125 goto err;
1126 }
1127
1128 /* Create rx Rings */
1129 for (i = 0; i < priv->rx_ring_num; i++) {
1130 if (mlx4_en_create_cq(priv, &priv->rx_cq[i],
1131 prof->rx_ring_size, i, RX))
1132 goto err;
1133
1134 if (mlx4_en_create_rx_ring(priv, &priv->rx_ring[i],
1135 prof->rx_ring_size, priv->stride))
1136 goto err;
1137 }
1138
1139 return 0;
1140
1141err:
453a6082 1142 en_err(priv, "Failed to allocate NIC resources\n");
c27a02cd
YP
1143 return -ENOMEM;
1144}
1145
1146
1147void mlx4_en_destroy_netdev(struct net_device *dev)
1148{
1149 struct mlx4_en_priv *priv = netdev_priv(dev);
1150 struct mlx4_en_dev *mdev = priv->mdev;
1151
453a6082 1152 en_dbg(DRV, priv, "Destroying netdev on port:%d\n", priv->port);
c27a02cd
YP
1153
1154 /* Unregister device - this will close the port if it was up */
1155 if (priv->registered)
1156 unregister_netdev(dev);
1157
1158 if (priv->allocated)
1159 mlx4_free_hwq_res(mdev->dev, &priv->res, MLX4_EN_PAGE_SIZE);
1160
1161 cancel_delayed_work(&priv->stats_task);
c27a02cd
YP
1162 /* flush any pending task for this netdev */
1163 flush_workqueue(mdev->workqueue);
1164
1165 /* Detach the netdev so tasks would not attempt to access it */
1166 mutex_lock(&mdev->state_lock);
1167 mdev->pndev[priv->port] = NULL;
1168 mutex_unlock(&mdev->state_lock);
1169
fe0af03c 1170 mlx4_en_free_resources(priv);
564c274c 1171
bc6a4744
AV
1172 kfree(priv->tx_ring);
1173 kfree(priv->tx_cq);
1174
c27a02cd
YP
1175 free_netdev(dev);
1176}
1177
1178static int mlx4_en_change_mtu(struct net_device *dev, int new_mtu)
1179{
1180 struct mlx4_en_priv *priv = netdev_priv(dev);
1181 struct mlx4_en_dev *mdev = priv->mdev;
1182 int err = 0;
1183
453a6082 1184 en_dbg(DRV, priv, "Change MTU called - current:%d new:%d\n",
c27a02cd
YP
1185 dev->mtu, new_mtu);
1186
1187 if ((new_mtu < MLX4_EN_MIN_MTU) || (new_mtu > priv->max_mtu)) {
453a6082 1188 en_err(priv, "Bad MTU size:%d.\n", new_mtu);
c27a02cd
YP
1189 return -EPERM;
1190 }
1191 dev->mtu = new_mtu;
1192
1193 if (netif_running(dev)) {
1194 mutex_lock(&mdev->state_lock);
1195 if (!mdev->device_up) {
1196 /* NIC is probably restarting - let watchdog task reset
1197 * the port */
453a6082 1198 en_dbg(DRV, priv, "Change MTU called with card down!?\n");
c27a02cd
YP
1199 } else {
1200 mlx4_en_stop_port(dev);
c27a02cd
YP
1201 err = mlx4_en_start_port(dev);
1202 if (err) {
453a6082 1203 en_err(priv, "Failed restarting port:%d\n",
c27a02cd
YP
1204 priv->port);
1205 queue_work(mdev->workqueue, &priv->watchdog_task);
1206 }
1207 }
1208 mutex_unlock(&mdev->state_lock);
1209 }
1210 return 0;
1211}
1212
60d6fe99
AV
1213static int mlx4_en_set_features(struct net_device *netdev,
1214 netdev_features_t features)
1215{
1216 struct mlx4_en_priv *priv = netdev_priv(netdev);
1217
1218 if (features & NETIF_F_LOOPBACK)
1219 priv->ctrl_flags |= cpu_to_be32(MLX4_WQE_CTRL_FORCE_LOOPBACK);
1220 else
1221 priv->ctrl_flags &=
1222 cpu_to_be32(~MLX4_WQE_CTRL_FORCE_LOOPBACK);
1223
1224 return 0;
1225
1226}
1227
3addc568
SH
1228static const struct net_device_ops mlx4_netdev_ops = {
1229 .ndo_open = mlx4_en_open,
1230 .ndo_stop = mlx4_en_close,
1231 .ndo_start_xmit = mlx4_en_xmit,
f813cad8 1232 .ndo_select_queue = mlx4_en_select_queue,
3addc568 1233 .ndo_get_stats = mlx4_en_get_stats,
afc4b13d 1234 .ndo_set_rx_mode = mlx4_en_set_multicast,
3addc568 1235 .ndo_set_mac_address = mlx4_en_set_mac,
52255bbe 1236 .ndo_validate_addr = eth_validate_addr,
3addc568
SH
1237 .ndo_change_mtu = mlx4_en_change_mtu,
1238 .ndo_tx_timeout = mlx4_en_tx_timeout,
3addc568
SH
1239 .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid,
1240 .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid,
1241#ifdef CONFIG_NET_POLL_CONTROLLER
1242 .ndo_poll_controller = mlx4_en_netpoll,
1243#endif
60d6fe99 1244 .ndo_set_features = mlx4_en_set_features,
897d7846 1245 .ndo_setup_tc = mlx4_en_setup_tc,
3addc568
SH
1246};
1247
c27a02cd
YP
1248int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port,
1249 struct mlx4_en_port_profile *prof)
1250{
1251 struct net_device *dev;
1252 struct mlx4_en_priv *priv;
1253 int i;
1254 int err;
1255
f1593d22
TH
1256 dev = alloc_etherdev_mqs(sizeof(struct mlx4_en_priv),
1257 prof->tx_ring_num, prof->rx_ring_num);
41de8d4c 1258 if (dev == NULL)
c27a02cd 1259 return -ENOMEM;
c27a02cd
YP
1260
1261 SET_NETDEV_DEV(dev, &mdev->dev->pdev->dev);
741a00be 1262 dev->dev_id = port - 1;
c27a02cd
YP
1263
1264 /*
1265 * Initialize driver private data
1266 */
1267
1268 priv = netdev_priv(dev);
1269 memset(priv, 0, sizeof(struct mlx4_en_priv));
1270 priv->dev = dev;
1271 priv->mdev = mdev;
ebf8c9aa 1272 priv->ddev = &mdev->pdev->dev;
c27a02cd
YP
1273 priv->prof = prof;
1274 priv->port = port;
1275 priv->port_up = false;
c27a02cd 1276 priv->flags = prof->flags;
60d6fe99
AV
1277 priv->ctrl_flags = cpu_to_be32(MLX4_WQE_CTRL_CQ_UPDATE |
1278 MLX4_WQE_CTRL_SOLICITED);
c27a02cd 1279 priv->tx_ring_num = prof->tx_ring_num;
bc6a4744
AV
1280 priv->tx_ring = kzalloc(sizeof(struct mlx4_en_tx_ring) *
1281 priv->tx_ring_num, GFP_KERNEL);
1282 if (!priv->tx_ring) {
1283 err = -ENOMEM;
1284 goto out;
1285 }
1286 priv->tx_cq = kzalloc(sizeof(struct mlx4_en_cq) * priv->tx_ring_num,
1287 GFP_KERNEL);
1288 if (!priv->tx_cq) {
1289 err = -ENOMEM;
1290 goto out;
1291 }
c27a02cd 1292 priv->rx_ring_num = prof->rx_ring_num;
c27a02cd
YP
1293 priv->mac_index = -1;
1294 priv->msg_enable = MLX4_EN_MSG_LEVEL;
1295 spin_lock_init(&priv->stats_lock);
1296 INIT_WORK(&priv->mcast_task, mlx4_en_do_set_multicast);
1297 INIT_WORK(&priv->mac_task, mlx4_en_do_set_mac);
c27a02cd
YP
1298 INIT_WORK(&priv->watchdog_task, mlx4_en_restart);
1299 INIT_WORK(&priv->linkstate_task, mlx4_en_linkstate);
1300 INIT_DELAYED_WORK(&priv->stats_task, mlx4_en_do_get_stats);
564c274c
AV
1301#ifdef CONFIG_MLX4_EN_DCB
1302 if (!mlx4_is_slave(priv->mdev->dev))
1303 dev->dcbnl_ops = &mlx4_en_dcbnl_ops;
1304#endif
c27a02cd
YP
1305
1306 /* Query for default mac and max mtu */
1307 priv->max_mtu = mdev->dev->caps.eth_mtu_cap[priv->port];
1308 priv->mac = mdev->dev->caps.def_mac[priv->port];
1309 if (ILLEGAL_MAC(priv->mac)) {
453a6082 1310 en_err(priv, "Port: %d, invalid mac burned: 0x%llx, quiting\n",
c27a02cd
YP
1311 priv->port, priv->mac);
1312 err = -EINVAL;
1313 goto out;
1314 }
1315
1316 priv->stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) +
1317 DS_SIZE * MLX4_EN_MAX_RX_FRAGS);
1318 err = mlx4_en_alloc_resources(priv);
1319 if (err)
1320 goto out;
1321
c27a02cd
YP
1322 /* Allocate page for receive rings */
1323 err = mlx4_alloc_hwq_res(mdev->dev, &priv->res,
1324 MLX4_EN_PAGE_SIZE, MLX4_EN_PAGE_SIZE);
1325 if (err) {
453a6082 1326 en_err(priv, "Failed to allocate page for rx qps\n");
c27a02cd
YP
1327 goto out;
1328 }
1329 priv->allocated = 1;
1330
c27a02cd
YP
1331 /*
1332 * Initialize netdev entry points
1333 */
3addc568 1334 dev->netdev_ops = &mlx4_netdev_ops;
c27a02cd 1335 dev->watchdog_timeo = MLX4_EN_WATCHDOG_TIMEOUT;
1eb63a28
BH
1336 netif_set_real_num_tx_queues(dev, priv->tx_ring_num);
1337 netif_set_real_num_rx_queues(dev, priv->rx_ring_num);
3addc568 1338
c27a02cd
YP
1339 SET_ETHTOOL_OPS(dev, &mlx4_en_ethtool_ops);
1340
1341 /* Set defualt MAC */
1342 dev->addr_len = ETH_ALEN;
8bf2e58f
YP
1343 for (i = 0; i < ETH_ALEN; i++) {
1344 dev->dev_addr[ETH_ALEN - 1 - i] = (u8) (priv->mac >> (8 * i));
1345 dev->perm_addr[ETH_ALEN - 1 - i] = (u8) (priv->mac >> (8 * i));
1346 }
c27a02cd
YP
1347
1348 /*
1349 * Set driver features
1350 */
c8c64cff
MM
1351 dev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
1352 if (mdev->LSO_support)
1353 dev->hw_features |= NETIF_F_TSO | NETIF_F_TSO6;
1354
1355 dev->vlan_features = dev->hw_features;
1356
ad86107f 1357 dev->hw_features |= NETIF_F_RXCSUM | NETIF_F_RXHASH;
c8c64cff
MM
1358 dev->features = dev->hw_features | NETIF_F_HIGHDMA |
1359 NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX |
1360 NETIF_F_HW_VLAN_FILTER;
60d6fe99 1361 dev->hw_features |= NETIF_F_LOOPBACK;
c27a02cd
YP
1362
1363 mdev->pndev[port] = dev;
1364
1365 netif_carrier_off(dev);
1366 err = register_netdev(dev);
1367 if (err) {
453a6082 1368 en_err(priv, "Netdev registration failed for port %d\n", port);
c27a02cd
YP
1369 goto out;
1370 }
4234144f 1371 priv->registered = 1;
453a6082
YP
1372
1373 en_warn(priv, "Using %d TX rings\n", prof->tx_ring_num);
1374 en_warn(priv, "Using %d RX rings\n", prof->rx_ring_num);
1375
90822265 1376 /* Configure port */
5c8e9046 1377 mlx4_en_calc_rx_buf(dev);
90822265 1378 err = mlx4_SET_PORT_general(mdev->dev, priv->port,
5c8e9046
YP
1379 priv->rx_skb_size + ETH_FCS_LEN,
1380 prof->tx_pause, prof->tx_ppp,
1381 prof->rx_pause, prof->rx_ppp);
90822265
YP
1382 if (err) {
1383 en_err(priv, "Failed setting port general configurations "
1384 "for port %d, with error %d\n", priv->port, err);
1385 goto out;
1386 }
1387
1388 /* Init port */
1389 en_warn(priv, "Initializing port\n");
1390 err = mlx4_INIT_PORT(mdev->dev, priv->port);
1391 if (err) {
1392 en_err(priv, "Failed Initializing port\n");
1393 goto out;
1394 }
39f17b44 1395 mlx4_en_set_default_moderation(priv);
c27a02cd
YP
1396 queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY);
1397 return 0;
1398
1399out:
1400 mlx4_en_destroy_netdev(dev);
1401 return err;
1402}
1403