net/mlx4_en: Ignore irrelevant hypervisor events
[linux-2.6-block.git] / drivers / net / ethernet / mellanox / mlx4 / en_main.c
CommitLineData
c27a02cd
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1/*
2 * Copyright (c) 2007 Mellanox Technologies. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 *
32 */
33
34#include <linux/cpumask.h>
35#include <linux/module.h>
36#include <linux/delay.h>
37#include <linux/netdevice.h>
5a0e3ad6 38#include <linux/slab.h>
c27a02cd
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39
40#include <linux/mlx4/driver.h>
41#include <linux/mlx4/device.h>
42#include <linux/mlx4/cmd.h>
43
44#include "mlx4_en.h"
45
46MODULE_AUTHOR("Liran Liss, Yevgeny Petrilin");
47MODULE_DESCRIPTION("Mellanox ConnectX HCA Ethernet driver");
48MODULE_LICENSE("Dual BSD/GPL");
49MODULE_VERSION(DRV_VERSION " ("DRV_RELDATE")");
50
51static const char mlx4_en_version[] =
52 DRV_NAME ": Mellanox ConnectX HCA Ethernet driver v"
53 DRV_VERSION " (" DRV_RELDATE ")\n";
54
a2b28737
YP
55#define MLX4_EN_PARM_INT(X, def_val, desc) \
56 static unsigned int X = def_val;\
57 module_param(X , uint, 0444); \
58 MODULE_PARM_DESC(X, desc);
59
60
61/*
62 * Device scope module parameters
63 */
64
0533943c
YP
65/* Enable RSS UDP traffic */
66MLX4_EN_PARM_INT(udp_rss, 1,
d82603c6 67 "Enable RSS for incoming UDP traffic or disabled (0)");
a2b28737 68
a2b28737
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69/* Priority pausing */
70MLX4_EN_PARM_INT(pfctx, 0, "Priority based Flow Control policy on TX[7:0]."
71 " Per priority bit mask");
72MLX4_EN_PARM_INT(pfcrx, 0, "Priority based Flow Control policy on RX[7:0]."
73 " Per priority bit mask");
74
0a645e80
JP
75int en_print(const char *level, const struct mlx4_en_priv *priv,
76 const char *format, ...)
77{
78 va_list args;
79 struct va_format vaf;
80 int i;
81
82 va_start(args, format);
83
84 vaf.fmt = format;
85 vaf.va = &args;
86 if (priv->registered)
87 i = printk("%s%s: %s: %pV",
88 level, DRV_NAME, priv->dev->name, &vaf);
89 else
90 i = printk("%s%s: %s: Port %d: %pV",
91 level, DRV_NAME, dev_name(&priv->mdev->pdev->dev),
92 priv->port, &vaf);
93 va_end(args);
94
95 return i;
96}
97
79aeaccd
YB
98void mlx4_en_update_loopback_state(struct net_device *dev,
99 netdev_features_t features)
100{
101 struct mlx4_en_priv *priv = netdev_priv(dev);
102
103 priv->flags &= ~(MLX4_EN_FLAG_RX_FILTER_NEEDED|
104 MLX4_EN_FLAG_ENABLE_HW_LOOPBACK);
105
106 /* Drop the packet if SRIOV is not enabled
107 * and not performing the selftest or flb disabled
108 */
109 if (mlx4_is_mfunc(priv->mdev->dev) &&
110 !(features & NETIF_F_LOOPBACK) && !priv->validate_loopback)
111 priv->flags |= MLX4_EN_FLAG_RX_FILTER_NEEDED;
112
113 /* Set dmac in Tx WQE if we are in SRIOV mode or if loopback selftest
114 * is requested
115 */
116 if (mlx4_is_mfunc(priv->mdev->dev) || priv->validate_loopback)
117 priv->flags |= MLX4_EN_FLAG_ENABLE_HW_LOOPBACK;
118}
119
a2b28737
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120static int mlx4_en_get_profile(struct mlx4_en_dev *mdev)
121{
122 struct mlx4_en_profile *params = &mdev->profile;
123 int i;
124
0533943c 125 params->udp_rss = udp_rss;
bc6a4744
AV
126 params->num_tx_rings_p_up = min_t(int, num_online_cpus(),
127 MLX4_EN_MAX_TX_RING_P_UP);
ccf86321
OG
128 if (params->udp_rss && !(mdev->dev->caps.flags
129 & MLX4_DEV_CAP_FLAG_UDP_RSS)) {
0533943c
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130 mlx4_warn(mdev, "UDP RSS is not supported on this device.\n");
131 params->udp_rss = 0;
132 }
a2b28737
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133 for (i = 1; i <= MLX4_MAX_PORTS; i++) {
134 params->prof[i].rx_pause = 1;
135 params->prof[i].rx_ppp = pfcrx;
136 params->prof[i].tx_pause = 1;
137 params->prof[i].tx_ppp = pfctx;
138 params->prof[i].tx_ring_size = MLX4_EN_DEF_TX_RING_SIZE;
139 params->prof[i].rx_ring_size = MLX4_EN_DEF_RX_RING_SIZE;
bc6a4744
AV
140 params->prof[i].tx_ring_num = params->num_tx_rings_p_up *
141 MLX4_EN_NUM_UP;
93d3e367 142 params->prof[i].rss_rings = 0;
a2b28737
YP
143 }
144
145 return 0;
146}
147
33c87f0a
EC
148static void *mlx4_en_get_netdev(struct mlx4_dev *dev, void *ctx, u8 port)
149{
150 struct mlx4_en_dev *endev = ctx;
151
152 return endev->pndev[port];
153}
154
c27a02cd 155static void mlx4_en_event(struct mlx4_dev *dev, void *endev_ptr,
00f5ce99 156 enum mlx4_dev_event event, unsigned long port)
c27a02cd
YP
157{
158 struct mlx4_en_dev *mdev = (struct mlx4_en_dev *) endev_ptr;
159 struct mlx4_en_priv *priv;
160
c27a02cd
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161 switch (event) {
162 case MLX4_DEV_EVENT_PORT_UP:
163 case MLX4_DEV_EVENT_PORT_DOWN:
13bf58b7
JM
164 if (!mdev->pndev[port])
165 return;
166 priv = netdev_priv(mdev->pndev[port]);
c27a02cd
YP
167 /* To prevent races, we poll the link state in a separate
168 task rather than changing it here */
169 priv->link_state = event;
170 queue_work(mdev->workqueue, &priv->linkstate_task);
171 break;
172
173 case MLX4_DEV_EVENT_CATASTROPHIC_ERROR:
174 mlx4_err(mdev, "Internal error detected, restarting device\n");
175 break;
176
e4b59a1c
EE
177 case MLX4_DEV_EVENT_SLAVE_INIT:
178 case MLX4_DEV_EVENT_SLAVE_SHUTDOWN:
179 break;
c27a02cd 180 default:
13bf58b7
JM
181 if (port < 1 || port > dev->caps.num_ports ||
182 !mdev->pndev[port])
183 return;
00f5ce99
JM
184 mlx4_warn(mdev, "Unhandled event %d for port %d\n", event,
185 (int) port);
c27a02cd
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186 }
187}
188
189static void mlx4_en_remove(struct mlx4_dev *dev, void *endev_ptr)
190{
191 struct mlx4_en_dev *mdev = endev_ptr;
192 int i;
193
194 mutex_lock(&mdev->state_lock);
195 mdev->device_up = false;
196 mutex_unlock(&mdev->state_lock);
197
198 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH)
199 if (mdev->pndev[i])
200 mlx4_en_destroy_netdev(mdev->pndev[i]);
201
202 flush_workqueue(mdev->workqueue);
203 destroy_workqueue(mdev->workqueue);
61083720 204 (void) mlx4_mr_free(dev, &mdev->mr);
7398af40 205 iounmap(mdev->uar_map);
c27a02cd
YP
206 mlx4_uar_free(dev, &mdev->priv_uar);
207 mlx4_pd_free(dev, mdev->priv_pdn);
208 kfree(mdev);
209}
210
211static void *mlx4_en_add(struct mlx4_dev *dev)
212{
c27a02cd
YP
213 struct mlx4_en_dev *mdev;
214 int i;
215 int err;
216
0a645e80 217 printk_once(KERN_INFO "%s", mlx4_en_version);
c27a02cd 218
b2adaca9 219 mdev = kzalloc(sizeof(*mdev), GFP_KERNEL);
c27a02cd 220 if (!mdev) {
c27a02cd
YP
221 err = -ENOMEM;
222 goto err_free_res;
223 }
224
225 if (mlx4_pd_alloc(dev, &mdev->priv_pdn))
226 goto err_free_dev;
227
228 if (mlx4_uar_alloc(dev, &mdev->priv_uar))
229 goto err_pd;
230
4979d18f
RD
231 mdev->uar_map = ioremap((phys_addr_t) mdev->priv_uar.pfn << PAGE_SHIFT,
232 PAGE_SIZE);
c27a02cd
YP
233 if (!mdev->uar_map)
234 goto err_uar;
235 spin_lock_init(&mdev->uar_lock);
236
237 mdev->dev = dev;
238 mdev->dma_device = &(dev->pdev->dev);
239 mdev->pdev = dev->pdev;
240 mdev->device_up = false;
241
242 mdev->LSO_support = !!(dev->caps.flags & (1 << 15));
243 if (!mdev->LSO_support)
244 mlx4_warn(mdev, "LSO not supported, please upgrade to later "
245 "FW version to enable LSO\n");
246
247 if (mlx4_mr_alloc(mdev->dev, mdev->priv_pdn, 0, ~0ull,
248 MLX4_PERM_LOCAL_WRITE | MLX4_PERM_LOCAL_READ,
249 0, 0, &mdev->mr)) {
250 mlx4_err(mdev, "Failed allocating memory region\n");
7398af40 251 goto err_map;
c27a02cd
YP
252 }
253 if (mlx4_mr_enable(mdev->dev, &mdev->mr)) {
254 mlx4_err(mdev, "Failed enabling memory region\n");
255 goto err_mr;
256 }
257
258 /* Build device profile according to supplied module parameters */
259 err = mlx4_en_get_profile(mdev);
260 if (err) {
261 mlx4_err(mdev, "Bad module parameters, aborting.\n");
262 goto err_mr;
263 }
264
25985edc 265 /* Configure which ports to start according to module parameters */
c27a02cd
YP
266 mdev->port_cnt = 0;
267 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH)
268 mdev->port_cnt++;
269
1ec4864b
AV
270 /* Initialize time stamp mechanism */
271 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)
272 mlx4_en_init_timestamp(mdev);
273
c27a02cd 274 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH) {
1fb9876e
YP
275 if (!dev->caps.comp_pool) {
276 mdev->profile.prof[i].rx_ring_num =
277 rounddown_pow_of_two(max_t(int, MIN_RX_RINGS,
278 min_t(int,
279 dev->caps.num_comp_vectors,
d317966b 280 DEF_RX_RINGS)));
1fb9876e
YP
281 } else {
282 mdev->profile.prof[i].rx_ring_num = rounddown_pow_of_two(
283 min_t(int, dev->caps.comp_pool/
284 dev->caps.num_ports - 1 , MAX_MSIX_P_PORT - 1));
285 }
c27a02cd
YP
286 }
287
288 /* Create our own workqueue for reset/multicast tasks
289 * Note: we cannot use the shared workqueue because of deadlocks caused
290 * by the rtnl lock */
291 mdev->workqueue = create_singlethread_workqueue("mlx4_en");
292 if (!mdev->workqueue) {
293 err = -ENOMEM;
1a44cc37 294 goto err_mr;
c27a02cd
YP
295 }
296
297 /* At this stage all non-port specific tasks are complete:
298 * mark the card state as up */
299 mutex_init(&mdev->state_lock);
300 mdev->device_up = true;
301
302 /* Setup ports */
303
304 /* Create a netdev for each port */
305 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH) {
306 mlx4_info(mdev, "Activating port:%d\n", i);
3c2fa83f 307 if (mlx4_en_init_netdev(mdev, i, &mdev->profile.prof[i]))
c27a02cd 308 mdev->pndev[i] = NULL;
c27a02cd 309 }
ec693d47 310
c27a02cd
YP
311 return mdev;
312
c27a02cd 313err_mr:
61083720 314 (void) mlx4_mr_free(dev, &mdev->mr);
7398af40 315err_map:
8850494a 316 if (mdev->uar_map)
7398af40 317 iounmap(mdev->uar_map);
c27a02cd
YP
318err_uar:
319 mlx4_uar_free(dev, &mdev->priv_uar);
320err_pd:
321 mlx4_pd_free(dev, mdev->priv_pdn);
322err_free_dev:
323 kfree(mdev);
324err_free_res:
325 return NULL;
326}
327
328static struct mlx4_interface mlx4_en_interface = {
33c87f0a
EC
329 .add = mlx4_en_add,
330 .remove = mlx4_en_remove,
331 .event = mlx4_en_event,
332 .get_dev = mlx4_en_get_netdev,
0345584e 333 .protocol = MLX4_PROT_ETH,
c27a02cd
YP
334};
335
336static int __init mlx4_en_init(void)
337{
338 return mlx4_register_interface(&mlx4_en_interface);
339}
340
341static void __exit mlx4_en_cleanup(void)
342{
343 mlx4_unregister_interface(&mlx4_en_interface);
344}
345
346module_init(mlx4_en_init);
347module_exit(mlx4_en_cleanup);
348