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51dce24b JK |
1 | // SPDX-License-Identifier: GPL-2.0 |
2 | /* Copyright(c) 1999 - 2018 Intel Corporation. */ | |
3047f90b GR |
3 | |
4 | #include "vf.h" | |
b5417bf8 | 5 | #include "ixgbevf.h" |
3047f90b | 6 | |
c6d45171 KS |
7 | /* On Hyper-V, to reset, we need to read from this offset |
8 | * from the PCI config space. This is the mechanism used on | |
9 | * Hyper-V to support PF/VF communication. | |
10 | */ | |
11 | #define IXGBE_HV_RESET_OFFSET 0x201 | |
12 | ||
6a11e52b TN |
13 | static inline s32 ixgbevf_write_msg_read_ack(struct ixgbe_hw *hw, u32 *msg, |
14 | u32 *retmsg, u16 size) | |
15 | { | |
16 | struct ixgbe_mbx_info *mbx = &hw->mbx; | |
17 | s32 retval = mbx->ops.write_posted(hw, msg, size); | |
18 | ||
19 | if (retval) | |
20 | return retval; | |
21 | ||
22 | return mbx->ops.read_posted(hw, retmsg, size); | |
23 | } | |
24 | ||
3047f90b GR |
25 | /** |
26 | * ixgbevf_start_hw_vf - Prepare hardware for Tx/Rx | |
27 | * @hw: pointer to hardware structure | |
28 | * | |
29 | * Starts the hardware by filling the bus info structure and media type, clears | |
30 | * all on chip counters, initializes receive address registers, multicast | |
31 | * table, VLAN filter table, calls routine to set up link and flow control | |
32 | * settings, and leaves transmit and receive units disabled and uninitialized | |
33 | **/ | |
34 | static s32 ixgbevf_start_hw_vf(struct ixgbe_hw *hw) | |
35 | { | |
36 | /* Clear adapter stopped flag */ | |
37 | hw->adapter_stopped = false; | |
38 | ||
39 | return 0; | |
40 | } | |
41 | ||
42 | /** | |
43 | * ixgbevf_init_hw_vf - virtual function hardware initialization | |
44 | * @hw: pointer to hardware structure | |
45 | * | |
46 | * Initialize the hardware by resetting the hardware and then starting | |
47 | * the hardware | |
48 | **/ | |
49 | static s32 ixgbevf_init_hw_vf(struct ixgbe_hw *hw) | |
50 | { | |
51 | s32 status = hw->mac.ops.start_hw(hw); | |
52 | ||
53 | hw->mac.ops.get_mac_addr(hw, hw->mac.addr); | |
54 | ||
55 | return status; | |
56 | } | |
57 | ||
58 | /** | |
59 | * ixgbevf_reset_hw_vf - Performs hardware reset | |
60 | * @hw: pointer to hardware structure | |
61 | * | |
dbedd44e | 62 | * Resets the hardware by resetting the transmit and receive units, masks and |
3047f90b GR |
63 | * clears all interrupts. |
64 | **/ | |
65 | static s32 ixgbevf_reset_hw_vf(struct ixgbe_hw *hw) | |
66 | { | |
67 | struct ixgbe_mbx_info *mbx = &hw->mbx; | |
68 | u32 timeout = IXGBE_VF_INIT_TIMEOUT; | |
69 | s32 ret_val = IXGBE_ERR_INVALID_MAC_ADDR; | |
70 | u32 msgbuf[IXGBE_VF_PERMADDR_MSG_LEN]; | |
71 | u8 *addr = (u8 *)(&msgbuf[1]); | |
72 | ||
73 | /* Call adapter stop to disable tx/rx and clear interrupts */ | |
74 | hw->mac.ops.stop_adapter(hw); | |
75 | ||
31186785 AD |
76 | /* reset the api version */ |
77 | hw->api_version = ixgbe_mbox_api_10; | |
78 | ||
3047f90b GR |
79 | IXGBE_WRITE_REG(hw, IXGBE_VFCTRL, IXGBE_CTRL_RST); |
80 | IXGBE_WRITE_FLUSH(hw); | |
81 | ||
82 | /* we cannot reset while the RSTI / RSTD bits are asserted */ | |
83 | while (!mbx->ops.check_for_rst(hw) && timeout) { | |
84 | timeout--; | |
85 | udelay(5); | |
86 | } | |
87 | ||
88 | if (!timeout) | |
89 | return IXGBE_ERR_RESET_FAILED; | |
90 | ||
91 | /* mailbox timeout can now become active */ | |
92 | mbx->timeout = IXGBE_VF_MBX_INIT_TIMEOUT; | |
93 | ||
94 | msgbuf[0] = IXGBE_VF_RESET; | |
95 | mbx->ops.write_posted(hw, msgbuf, 1); | |
96 | ||
012dc19a | 97 | mdelay(10); |
3047f90b | 98 | |
dec0d8e4 JK |
99 | /* set our "perm_addr" based on info provided by PF |
100 | * also set up the mc_filter_type which is piggy backed | |
101 | * on the mac address in word 3 | |
102 | */ | |
3047f90b GR |
103 | ret_val = mbx->ops.read_posted(hw, msgbuf, IXGBE_VF_PERMADDR_MSG_LEN); |
104 | if (ret_val) | |
105 | return ret_val; | |
106 | ||
e1941a74 GR |
107 | /* New versions of the PF may NACK the reset return message |
108 | * to indicate that no MAC address has yet been assigned for | |
109 | * the VF. | |
110 | */ | |
111 | if (msgbuf[0] != (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_ACK) && | |
112 | msgbuf[0] != (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_NACK)) | |
3047f90b GR |
113 | return IXGBE_ERR_INVALID_MAC_ADDR; |
114 | ||
465fc643 ET |
115 | if (msgbuf[0] == (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_ACK)) |
116 | ether_addr_copy(hw->mac.perm_addr, addr); | |
117 | ||
3047f90b GR |
118 | hw->mac.mc_filter_type = msgbuf[IXGBE_VF_MC_TYPE_WORD]; |
119 | ||
120 | return 0; | |
121 | } | |
122 | ||
c6d45171 KS |
123 | /** |
124 | * Hyper-V variant; the VF/PF communication is through the PCI | |
125 | * config space. | |
e23cf38f | 126 | * @hw: pointer to private hardware struct |
c6d45171 KS |
127 | */ |
128 | static s32 ixgbevf_hv_reset_hw_vf(struct ixgbe_hw *hw) | |
129 | { | |
130 | #if IS_ENABLED(CONFIG_PCI_MMCONFIG) | |
131 | struct ixgbevf_adapter *adapter = hw->back; | |
132 | int i; | |
133 | ||
134 | for (i = 0; i < 6; i++) | |
135 | pci_read_config_byte(adapter->pdev, | |
136 | (i + IXGBE_HV_RESET_OFFSET), | |
137 | &hw->mac.perm_addr[i]); | |
138 | return 0; | |
139 | #else | |
140 | pr_err("PCI_MMCONFIG needs to be enabled for Hyper-V\n"); | |
141 | return -EOPNOTSUPP; | |
142 | #endif | |
143 | } | |
144 | ||
3047f90b GR |
145 | /** |
146 | * ixgbevf_stop_hw_vf - Generic stop Tx/Rx units | |
147 | * @hw: pointer to hardware structure | |
148 | * | |
149 | * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts, | |
150 | * disables transmit and receive units. The adapter_stopped flag is used by | |
151 | * the shared code and drivers to determine if the adapter is in a stopped | |
152 | * state and should not touch the hardware. | |
153 | **/ | |
154 | static s32 ixgbevf_stop_hw_vf(struct ixgbe_hw *hw) | |
155 | { | |
156 | u32 number_of_queues; | |
157 | u32 reg_val; | |
158 | u16 i; | |
159 | ||
dec0d8e4 | 160 | /* Set the adapter_stopped flag so other driver functions stop touching |
3047f90b GR |
161 | * the hardware |
162 | */ | |
163 | hw->adapter_stopped = true; | |
164 | ||
165 | /* Disable the receive unit by stopped each queue */ | |
166 | number_of_queues = hw->mac.max_rx_queues; | |
167 | for (i = 0; i < number_of_queues; i++) { | |
168 | reg_val = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(i)); | |
169 | if (reg_val & IXGBE_RXDCTL_ENABLE) { | |
170 | reg_val &= ~IXGBE_RXDCTL_ENABLE; | |
171 | IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(i), reg_val); | |
172 | } | |
173 | } | |
174 | ||
175 | IXGBE_WRITE_FLUSH(hw); | |
176 | ||
177 | /* Clear interrupt mask to stop from interrupts being generated */ | |
178 | IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, IXGBE_VF_IRQ_CLEAR_MASK); | |
179 | ||
180 | /* Clear any pending interrupts */ | |
181 | IXGBE_READ_REG(hw, IXGBE_VTEICR); | |
182 | ||
183 | /* Disable the transmit unit. Each queue must be disabled. */ | |
184 | number_of_queues = hw->mac.max_tx_queues; | |
185 | for (i = 0; i < number_of_queues; i++) { | |
186 | reg_val = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(i)); | |
187 | if (reg_val & IXGBE_TXDCTL_ENABLE) { | |
188 | reg_val &= ~IXGBE_TXDCTL_ENABLE; | |
189 | IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(i), reg_val); | |
190 | } | |
191 | } | |
192 | ||
193 | return 0; | |
194 | } | |
195 | ||
196 | /** | |
197 | * ixgbevf_mta_vector - Determines bit-vector in multicast table to set | |
198 | * @hw: pointer to hardware structure | |
199 | * @mc_addr: the multicast address | |
200 | * | |
201 | * Extracts the 12 bits, from a multicast address, to determine which | |
202 | * bit-vector to set in the multicast table. The hardware uses 12 bits, from | |
dec0d8e4 | 203 | * incoming Rx multicast addresses, to determine the bit-vector to check in |
3047f90b GR |
204 | * the MTA. Which of the 4 combination, of 12-bits, the hardware uses is set |
205 | * by the MO field of the MCSTCTRL. The MO field is set during initialization | |
206 | * to mc_filter_type. | |
207 | **/ | |
208 | static s32 ixgbevf_mta_vector(struct ixgbe_hw *hw, u8 *mc_addr) | |
209 | { | |
210 | u32 vector = 0; | |
211 | ||
212 | switch (hw->mac.mc_filter_type) { | |
213 | case 0: /* use bits [47:36] of the address */ | |
214 | vector = ((mc_addr[4] >> 4) | (((u16)mc_addr[5]) << 4)); | |
215 | break; | |
216 | case 1: /* use bits [46:35] of the address */ | |
217 | vector = ((mc_addr[4] >> 3) | (((u16)mc_addr[5]) << 5)); | |
218 | break; | |
219 | case 2: /* use bits [45:34] of the address */ | |
220 | vector = ((mc_addr[4] >> 2) | (((u16)mc_addr[5]) << 6)); | |
221 | break; | |
222 | case 3: /* use bits [43:32] of the address */ | |
223 | vector = ((mc_addr[4]) | (((u16)mc_addr[5]) << 8)); | |
224 | break; | |
225 | default: /* Invalid mc_filter_type */ | |
226 | break; | |
227 | } | |
228 | ||
229 | /* vector can only be 12-bits or boundary will be exceeded */ | |
230 | vector &= 0xFFF; | |
231 | return vector; | |
232 | } | |
233 | ||
234 | /** | |
235 | * ixgbevf_get_mac_addr_vf - Read device MAC address | |
236 | * @hw: pointer to the HW structure | |
237 | * @mac_addr: pointer to storage for retrieved MAC address | |
238 | **/ | |
239 | static s32 ixgbevf_get_mac_addr_vf(struct ixgbe_hw *hw, u8 *mac_addr) | |
240 | { | |
0d8bb414 | 241 | ether_addr_copy(mac_addr, hw->mac.perm_addr); |
3047f90b GR |
242 | |
243 | return 0; | |
244 | } | |
245 | ||
46ec20ff GR |
246 | static s32 ixgbevf_set_uc_addr_vf(struct ixgbe_hw *hw, u32 index, u8 *addr) |
247 | { | |
fc355e07 | 248 | u32 msgbuf[3], msgbuf_chk; |
46ec20ff GR |
249 | u8 *msg_addr = (u8 *)(&msgbuf[1]); |
250 | s32 ret_val; | |
251 | ||
252 | memset(msgbuf, 0, sizeof(msgbuf)); | |
dec0d8e4 | 253 | /* If index is one then this is the start of a new list and needs |
46ec20ff GR |
254 | * indication to the PF so it can do it's own list management. |
255 | * If it is zero then that tells the PF to just clear all of | |
256 | * this VF's macvlans and there is no new list. | |
257 | */ | |
258 | msgbuf[0] |= index << IXGBE_VT_MSGINFO_SHIFT; | |
259 | msgbuf[0] |= IXGBE_VF_SET_MACVLAN; | |
fc355e07 ET |
260 | msgbuf_chk = msgbuf[0]; |
261 | ||
46ec20ff | 262 | if (addr) |
0d8bb414 | 263 | ether_addr_copy(msg_addr, addr); |
46ec20ff | 264 | |
c6426971 | 265 | ret_val = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, |
4078ea37 | 266 | ARRAY_SIZE(msgbuf)); |
fc355e07 ET |
267 | if (!ret_val) { |
268 | msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS; | |
46ec20ff | 269 | |
fc355e07 ET |
270 | if (msgbuf[0] == (msgbuf_chk | IXGBE_VT_MSGTYPE_NACK)) |
271 | return -ENOMEM; | |
272 | } | |
46ec20ff GR |
273 | |
274 | return ret_val; | |
275 | } | |
276 | ||
c6d45171 KS |
277 | static s32 ixgbevf_hv_set_uc_addr_vf(struct ixgbe_hw *hw, u32 index, u8 *addr) |
278 | { | |
279 | return -EOPNOTSUPP; | |
280 | } | |
281 | ||
94cf66f8 VZ |
282 | /** |
283 | * ixgbevf_get_reta_locked - get the RSS redirection table (RETA) contents. | |
e23cf38f | 284 | * @hw: pointer to hardware structure |
94cf66f8 VZ |
285 | * @reta: buffer to fill with RETA contents. |
286 | * @num_rx_queues: Number of Rx queues configured for this port | |
287 | * | |
288 | * The "reta" buffer should be big enough to contain 32 registers. | |
289 | * | |
290 | * Returns: 0 on success. | |
291 | * if API doesn't support this operation - (-EOPNOTSUPP). | |
292 | */ | |
293 | int ixgbevf_get_reta_locked(struct ixgbe_hw *hw, u32 *reta, int num_rx_queues) | |
294 | { | |
295 | int err, i, j; | |
296 | u32 msgbuf[IXGBE_VFMAILBOX_SIZE]; | |
297 | u32 *hw_reta = &msgbuf[1]; | |
298 | u32 mask = 0; | |
299 | ||
300 | /* We have to use a mailbox for 82599 and x540 devices only. | |
301 | * For these devices RETA has 128 entries. | |
302 | * Also these VFs support up to 4 RSS queues. Therefore PF will compress | |
303 | * 16 RETA entries in each DWORD giving 2 bits to each entry. | |
304 | */ | |
305 | int dwords = IXGBEVF_82599_RETA_SIZE / 16; | |
306 | ||
307 | /* We support the RSS querying for 82599 and x540 devices only. | |
308 | * Thus return an error if API doesn't support RETA querying or querying | |
309 | * is not supported for this device type. | |
310 | */ | |
41e544cd | 311 | switch (hw->api_version) { |
7f68d430 | 312 | case ixgbe_mbox_api_14: |
41e544cd DS |
313 | case ixgbe_mbox_api_13: |
314 | case ixgbe_mbox_api_12: | |
82fb670c | 315 | if (hw->mac.type < ixgbe_mac_X550_vf) |
41e544cd | 316 | break; |
80666035 | 317 | /* fall through */ |
41e544cd | 318 | default: |
94cf66f8 | 319 | return -EOPNOTSUPP; |
41e544cd | 320 | } |
94cf66f8 VZ |
321 | |
322 | msgbuf[0] = IXGBE_VF_GET_RETA; | |
323 | ||
324 | err = hw->mbx.ops.write_posted(hw, msgbuf, 1); | |
325 | ||
326 | if (err) | |
327 | return err; | |
328 | ||
329 | err = hw->mbx.ops.read_posted(hw, msgbuf, dwords + 1); | |
330 | ||
331 | if (err) | |
332 | return err; | |
333 | ||
334 | msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS; | |
335 | ||
336 | /* If the operation has been refused by a PF return -EPERM */ | |
337 | if (msgbuf[0] == (IXGBE_VF_GET_RETA | IXGBE_VT_MSGTYPE_NACK)) | |
338 | return -EPERM; | |
339 | ||
340 | /* If we didn't get an ACK there must have been | |
341 | * some sort of mailbox error so we should treat it | |
342 | * as such. | |
343 | */ | |
344 | if (msgbuf[0] != (IXGBE_VF_GET_RETA | IXGBE_VT_MSGTYPE_ACK)) | |
345 | return IXGBE_ERR_MBX; | |
346 | ||
347 | /* ixgbevf doesn't support more than 2 queues at the moment */ | |
348 | if (num_rx_queues > 1) | |
349 | mask = 0x1; | |
350 | ||
351 | for (i = 0; i < dwords; i++) | |
352 | for (j = 0; j < 16; j++) | |
353 | reta[i * 16 + j] = (hw_reta[i] >> (2 * j)) & mask; | |
354 | ||
355 | return 0; | |
356 | } | |
357 | ||
ad1431e2 VZ |
358 | /** |
359 | * ixgbevf_get_rss_key_locked - get the RSS Random Key | |
360 | * @hw: pointer to the HW structure | |
361 | * @rss_key: buffer to fill with RSS Hash Key contents. | |
362 | * | |
363 | * The "rss_key" buffer should be big enough to contain 10 registers. | |
364 | * | |
365 | * Returns: 0 on success. | |
366 | * if API doesn't support this operation - (-EOPNOTSUPP). | |
367 | */ | |
368 | int ixgbevf_get_rss_key_locked(struct ixgbe_hw *hw, u8 *rss_key) | |
369 | { | |
370 | int err; | |
371 | u32 msgbuf[IXGBE_VFMAILBOX_SIZE]; | |
372 | ||
373 | /* We currently support the RSS Random Key retrieval for 82599 and x540 | |
374 | * devices only. | |
375 | * | |
376 | * Thus return an error if API doesn't support RSS Random Key retrieval | |
377 | * or if the operation is not supported for this device type. | |
378 | */ | |
41e544cd | 379 | switch (hw->api_version) { |
7f68d430 | 380 | case ixgbe_mbox_api_14: |
41e544cd DS |
381 | case ixgbe_mbox_api_13: |
382 | case ixgbe_mbox_api_12: | |
82fb670c | 383 | if (hw->mac.type < ixgbe_mac_X550_vf) |
41e544cd | 384 | break; |
80666035 | 385 | /* fall through */ |
41e544cd | 386 | default: |
ad1431e2 | 387 | return -EOPNOTSUPP; |
41e544cd | 388 | } |
ad1431e2 VZ |
389 | |
390 | msgbuf[0] = IXGBE_VF_GET_RSS_KEY; | |
391 | err = hw->mbx.ops.write_posted(hw, msgbuf, 1); | |
392 | ||
393 | if (err) | |
394 | return err; | |
395 | ||
396 | err = hw->mbx.ops.read_posted(hw, msgbuf, 11); | |
397 | ||
398 | if (err) | |
399 | return err; | |
400 | ||
401 | msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS; | |
402 | ||
403 | /* If the operation has been refused by a PF return -EPERM */ | |
82fb670c | 404 | if (msgbuf[0] == (IXGBE_VF_GET_RSS_KEY | IXGBE_VT_MSGTYPE_NACK)) |
ad1431e2 VZ |
405 | return -EPERM; |
406 | ||
407 | /* If we didn't get an ACK there must have been | |
408 | * some sort of mailbox error so we should treat it | |
409 | * as such. | |
410 | */ | |
411 | if (msgbuf[0] != (IXGBE_VF_GET_RSS_KEY | IXGBE_VT_MSGTYPE_ACK)) | |
412 | return IXGBE_ERR_MBX; | |
413 | ||
414 | memcpy(rss_key, msgbuf + 1, IXGBEVF_RSS_HASH_KEY_SIZE); | |
415 | ||
416 | return 0; | |
417 | } | |
418 | ||
3047f90b GR |
419 | /** |
420 | * ixgbevf_set_rar_vf - set device MAC address | |
421 | * @hw: pointer to hardware structure | |
422 | * @index: Receive address register to write | |
423 | * @addr: Address to put into receive address register | |
424 | * @vmdq: Unused in this implementation | |
425 | **/ | |
426 | static s32 ixgbevf_set_rar_vf(struct ixgbe_hw *hw, u32 index, u8 *addr, | |
427 | u32 vmdq) | |
428 | { | |
3047f90b GR |
429 | u32 msgbuf[3]; |
430 | u8 *msg_addr = (u8 *)(&msgbuf[1]); | |
431 | s32 ret_val; | |
432 | ||
433 | memset(msgbuf, 0, sizeof(msgbuf)); | |
434 | msgbuf[0] = IXGBE_VF_SET_MAC_ADDR; | |
0d8bb414 | 435 | ether_addr_copy(msg_addr, addr); |
3047f90b | 436 | |
c6426971 | 437 | ret_val = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, |
4078ea37 | 438 | ARRAY_SIZE(msgbuf)); |
3047f90b GR |
439 | msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS; |
440 | ||
441 | /* if nacked the address was rejected, use "perm_addr" */ | |
442 | if (!ret_val && | |
32ca6868 | 443 | (msgbuf[0] == (IXGBE_VF_SET_MAC_ADDR | IXGBE_VT_MSGTYPE_NACK))) { |
3047f90b | 444 | ixgbevf_get_mac_addr_vf(hw, hw->mac.addr); |
32ca6868 ET |
445 | return IXGBE_ERR_MBX; |
446 | } | |
3047f90b GR |
447 | |
448 | return ret_val; | |
449 | } | |
450 | ||
c6d45171 KS |
451 | /** |
452 | * ixgbevf_hv_set_rar_vf - set device MAC address Hyper-V variant | |
453 | * @hw: pointer to hardware structure | |
454 | * @index: Receive address register to write | |
455 | * @addr: Address to put into receive address register | |
456 | * @vmdq: Unused in this implementation | |
457 | * | |
458 | * We don't really allow setting the device MAC address. However, | |
459 | * if the address being set is the permanent MAC address we will | |
460 | * permit that. | |
461 | **/ | |
462 | static s32 ixgbevf_hv_set_rar_vf(struct ixgbe_hw *hw, u32 index, u8 *addr, | |
463 | u32 vmdq) | |
464 | { | |
465 | if (ether_addr_equal(addr, hw->mac.perm_addr)) | |
466 | return 0; | |
467 | ||
468 | return -EOPNOTSUPP; | |
469 | } | |
470 | ||
3047f90b GR |
471 | /** |
472 | * ixgbevf_update_mc_addr_list_vf - Update Multicast addresses | |
473 | * @hw: pointer to the HW structure | |
5c58c47a | 474 | * @netdev: pointer to net device structure |
3047f90b GR |
475 | * |
476 | * Updates the Multicast Table Array. | |
477 | **/ | |
5c58c47a JP |
478 | static s32 ixgbevf_update_mc_addr_list_vf(struct ixgbe_hw *hw, |
479 | struct net_device *netdev) | |
3047f90b | 480 | { |
22bedad3 | 481 | struct netdev_hw_addr *ha; |
3047f90b GR |
482 | u32 msgbuf[IXGBE_VFMAILBOX_SIZE]; |
483 | u16 *vector_list = (u16 *)&msgbuf[1]; | |
3047f90b | 484 | u32 cnt, i; |
3047f90b GR |
485 | |
486 | /* Each entry in the list uses 1 16 bit word. We have 30 | |
487 | * 16 bit words available in our HW msg buffer (minus 1 for the | |
488 | * msg type). That's 30 hash values if we pack 'em right. If | |
489 | * there are more than 30 MC addresses to add then punt the | |
490 | * extras for now and then add code to handle more than 30 later. | |
491 | * It would be unusual for a server to request that many multi-cast | |
492 | * addresses except for in large enterprise network environments. | |
493 | */ | |
494 | ||
5c58c47a JP |
495 | cnt = netdev_mc_count(netdev); |
496 | if (cnt > 30) | |
497 | cnt = 30; | |
3047f90b GR |
498 | msgbuf[0] = IXGBE_VF_SET_MULTICAST; |
499 | msgbuf[0] |= cnt << IXGBE_VT_MSGINFO_SHIFT; | |
500 | ||
5c58c47a | 501 | i = 0; |
22bedad3 | 502 | netdev_for_each_mc_addr(ha, netdev) { |
5c58c47a JP |
503 | if (i == cnt) |
504 | break; | |
46acc460 | 505 | if (is_link_local_ether_addr(ha->addr)) |
b3343a2a JF |
506 | continue; |
507 | ||
22bedad3 | 508 | vector_list[i++] = ixgbevf_mta_vector(hw, ha->addr); |
3047f90b GR |
509 | } |
510 | ||
20d437ee KL |
511 | return ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, |
512 | IXGBE_VFMAILBOX_SIZE); | |
3047f90b GR |
513 | } |
514 | ||
c6d45171 KS |
515 | /** |
516 | * Hyper-V variant - just a stub. | |
e23cf38f TN |
517 | * @hw: unused |
518 | * @netdev: unused | |
c6d45171 KS |
519 | */ |
520 | static s32 ixgbevf_hv_update_mc_addr_list_vf(struct ixgbe_hw *hw, | |
521 | struct net_device *netdev) | |
522 | { | |
523 | return -EOPNOTSUPP; | |
524 | } | |
525 | ||
8443c1a4 HS |
526 | /** |
527 | * ixgbevf_update_xcast_mode - Update Multicast mode | |
528 | * @hw: pointer to the HW structure | |
8443c1a4 HS |
529 | * @xcast_mode: new multicast mode |
530 | * | |
531 | * Updates the Multicast Mode of VF. | |
532 | **/ | |
8b44a8a0 | 533 | static s32 ixgbevf_update_xcast_mode(struct ixgbe_hw *hw, int xcast_mode) |
8443c1a4 | 534 | { |
8443c1a4 HS |
535 | u32 msgbuf[2]; |
536 | s32 err; | |
537 | ||
538 | switch (hw->api_version) { | |
539 | case ixgbe_mbox_api_12: | |
41e544cd DS |
540 | /* promisc introduced in 1.3 version */ |
541 | if (xcast_mode == IXGBEVF_XCAST_MODE_PROMISC) | |
542 | return -EOPNOTSUPP; | |
543 | /* Fall threw */ | |
7f68d430 | 544 | case ixgbe_mbox_api_14: |
41e544cd | 545 | case ixgbe_mbox_api_13: |
8443c1a4 HS |
546 | break; |
547 | default: | |
548 | return -EOPNOTSUPP; | |
549 | } | |
550 | ||
551 | msgbuf[0] = IXGBE_VF_UPDATE_XCAST_MODE; | |
552 | msgbuf[1] = xcast_mode; | |
553 | ||
c6426971 | 554 | err = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, |
4078ea37 | 555 | ARRAY_SIZE(msgbuf)); |
8443c1a4 HS |
556 | if (err) |
557 | return err; | |
558 | ||
559 | msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS; | |
560 | if (msgbuf[0] == (IXGBE_VF_UPDATE_XCAST_MODE | IXGBE_VT_MSGTYPE_NACK)) | |
561 | return -EPERM; | |
562 | ||
563 | return 0; | |
564 | } | |
565 | ||
c6d45171 KS |
566 | /** |
567 | * Hyper-V variant - just a stub. | |
e23cf38f TN |
568 | * @hw: unused |
569 | * @xcast_mode: unused | |
c6d45171 | 570 | */ |
8b44a8a0 | 571 | static s32 ixgbevf_hv_update_xcast_mode(struct ixgbe_hw *hw, int xcast_mode) |
c6d45171 KS |
572 | { |
573 | return -EOPNOTSUPP; | |
574 | } | |
575 | ||
3047f90b | 576 | /** |
dec0d8e4 | 577 | * ixgbevf_set_vfta_vf - Set/Unset VLAN filter table address |
3047f90b GR |
578 | * @hw: pointer to the HW structure |
579 | * @vlan: 12 bit VLAN ID | |
580 | * @vind: unused by VF drivers | |
581 | * @vlan_on: if true then set bit, else clear bit | |
582 | **/ | |
583 | static s32 ixgbevf_set_vfta_vf(struct ixgbe_hw *hw, u32 vlan, u32 vind, | |
584 | bool vlan_on) | |
585 | { | |
3047f90b | 586 | u32 msgbuf[2]; |
2ddc7fe1 | 587 | s32 err; |
3047f90b GR |
588 | |
589 | msgbuf[0] = IXGBE_VF_SET_VLAN; | |
590 | msgbuf[1] = vlan; | |
591 | /* Setting the 8 bit field MSG INFO to TRUE indicates "add" */ | |
592 | msgbuf[0] |= vlan_on << IXGBE_VT_MSGINFO_SHIFT; | |
593 | ||
c6426971 | 594 | err = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, |
4078ea37 | 595 | ARRAY_SIZE(msgbuf)); |
2ddc7fe1 AD |
596 | if (err) |
597 | goto mbx_err; | |
598 | ||
599 | /* remove extra bits from the message */ | |
600 | msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS; | |
601 | msgbuf[0] &= ~(0xFF << IXGBE_VT_MSGINFO_SHIFT); | |
602 | ||
603 | if (msgbuf[0] != (IXGBE_VF_SET_VLAN | IXGBE_VT_MSGTYPE_ACK)) | |
604 | err = IXGBE_ERR_INVALID_ARGUMENT; | |
605 | ||
606 | mbx_err: | |
607 | return err; | |
3047f90b GR |
608 | } |
609 | ||
c6d45171 KS |
610 | /** |
611 | * Hyper-V variant - just a stub. | |
e23cf38f TN |
612 | * @hw: unused |
613 | * @vlan: unused | |
614 | * @vind: unused | |
615 | * @vlan_on: unused | |
c6d45171 KS |
616 | */ |
617 | static s32 ixgbevf_hv_set_vfta_vf(struct ixgbe_hw *hw, u32 vlan, u32 vind, | |
618 | bool vlan_on) | |
619 | { | |
620 | return -EOPNOTSUPP; | |
621 | } | |
622 | ||
3047f90b GR |
623 | /** |
624 | * ixgbevf_setup_mac_link_vf - Setup MAC link settings | |
625 | * @hw: pointer to hardware structure | |
626 | * @speed: Unused in this implementation | |
627 | * @autoneg: Unused in this implementation | |
628 | * @autoneg_wait_to_complete: Unused in this implementation | |
629 | * | |
630 | * Do nothing and return success. VF drivers are not allowed to change | |
631 | * global settings. Maintained for driver compatibility. | |
632 | **/ | |
633 | static s32 ixgbevf_setup_mac_link_vf(struct ixgbe_hw *hw, | |
634 | ixgbe_link_speed speed, bool autoneg, | |
635 | bool autoneg_wait_to_complete) | |
636 | { | |
637 | return 0; | |
638 | } | |
639 | ||
640 | /** | |
641 | * ixgbevf_check_mac_link_vf - Get link/speed status | |
642 | * @hw: pointer to hardware structure | |
643 | * @speed: pointer to link speed | |
644 | * @link_up: true is link is up, false otherwise | |
e23cf38f | 645 | * @autoneg_wait_to_complete: unused |
3047f90b GR |
646 | * |
647 | * Reads the links register to determine if link is up and the current speed | |
648 | **/ | |
649 | static s32 ixgbevf_check_mac_link_vf(struct ixgbe_hw *hw, | |
650 | ixgbe_link_speed *speed, | |
651 | bool *link_up, | |
652 | bool autoneg_wait_to_complete) | |
653 | { | |
4b2cd27f AD |
654 | struct ixgbe_mbx_info *mbx = &hw->mbx; |
655 | struct ixgbe_mac_info *mac = &hw->mac; | |
656 | s32 ret_val = 0; | |
3047f90b | 657 | u32 links_reg; |
4b2cd27f | 658 | u32 in_msg = 0; |
3047f90b | 659 | |
4b2cd27f AD |
660 | /* If we were hit with a reset drop the link */ |
661 | if (!mbx->ops.check_for_rst(hw) || !mbx->timeout) | |
662 | mac->get_link_status = true; | |
3047f90b | 663 | |
4b2cd27f AD |
664 | if (!mac->get_link_status) |
665 | goto out; | |
3047f90b | 666 | |
4b2cd27f AD |
667 | /* if link status is down no point in checking to see if pf is up */ |
668 | links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS); | |
669 | if (!(links_reg & IXGBE_LINKS_UP)) | |
670 | goto out; | |
3047f90b | 671 | |
b8a2ca19 ET |
672 | /* for SFP+ modules and DA cables on 82599 it can take up to 500usecs |
673 | * before the link status is correct | |
674 | */ | |
675 | if (mac->type == ixgbe_mac_82599_vf) { | |
676 | int i; | |
677 | ||
678 | for (i = 0; i < 5; i++) { | |
679 | udelay(100); | |
680 | links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS); | |
681 | ||
682 | if (!(links_reg & IXGBE_LINKS_UP)) | |
683 | goto out; | |
684 | } | |
685 | } | |
686 | ||
31a1b375 GR |
687 | switch (links_reg & IXGBE_LINKS_SPEED_82599) { |
688 | case IXGBE_LINKS_SPEED_10G_82599: | |
3047f90b | 689 | *speed = IXGBE_LINK_SPEED_10GB_FULL; |
31a1b375 GR |
690 | break; |
691 | case IXGBE_LINKS_SPEED_1G_82599: | |
3047f90b | 692 | *speed = IXGBE_LINK_SPEED_1GB_FULL; |
31a1b375 GR |
693 | break; |
694 | case IXGBE_LINKS_SPEED_100_82599: | |
695 | *speed = IXGBE_LINK_SPEED_100_FULL; | |
696 | break; | |
697 | } | |
3047f90b | 698 | |
4b2cd27f | 699 | /* if the read failed it could just be a mailbox collision, best wait |
dec0d8e4 JK |
700 | * until we are called again and don't report an error |
701 | */ | |
4b2cd27f AD |
702 | if (mbx->ops.read(hw, &in_msg, 1)) |
703 | goto out; | |
704 | ||
705 | if (!(in_msg & IXGBE_VT_MSGTYPE_CTS)) { | |
706 | /* msg is not CTS and is NACK we must have lost CTS status */ | |
707 | if (in_msg & IXGBE_VT_MSGTYPE_NACK) | |
708 | ret_val = -1; | |
709 | goto out; | |
710 | } | |
711 | ||
712 | /* the pf is talking, if we timed out in the past we reinit */ | |
713 | if (!mbx->timeout) { | |
714 | ret_val = -1; | |
715 | goto out; | |
716 | } | |
717 | ||
718 | /* if we passed all the tests above then the link is up and we no | |
dec0d8e4 JK |
719 | * longer need to check for link |
720 | */ | |
4b2cd27f AD |
721 | mac->get_link_status = false; |
722 | ||
723 | out: | |
724 | *link_up = !mac->get_link_status; | |
725 | return ret_val; | |
3047f90b GR |
726 | } |
727 | ||
c6d45171 KS |
728 | /** |
729 | * Hyper-V variant; there is no mailbox communication. | |
e23cf38f TN |
730 | * @hw: pointer to private hardware struct |
731 | * @speed: pointer to link speed | |
732 | * @link_up: true is link is up, false otherwise | |
733 | * @autoneg_wait_to_complete: unused | |
c6d45171 KS |
734 | */ |
735 | static s32 ixgbevf_hv_check_mac_link_vf(struct ixgbe_hw *hw, | |
736 | ixgbe_link_speed *speed, | |
737 | bool *link_up, | |
738 | bool autoneg_wait_to_complete) | |
739 | { | |
740 | struct ixgbe_mbx_info *mbx = &hw->mbx; | |
741 | struct ixgbe_mac_info *mac = &hw->mac; | |
742 | u32 links_reg; | |
743 | ||
744 | /* If we were hit with a reset drop the link */ | |
745 | if (!mbx->ops.check_for_rst(hw) || !mbx->timeout) | |
746 | mac->get_link_status = true; | |
747 | ||
748 | if (!mac->get_link_status) | |
749 | goto out; | |
750 | ||
751 | /* if link status is down no point in checking to see if pf is up */ | |
752 | links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS); | |
753 | if (!(links_reg & IXGBE_LINKS_UP)) | |
754 | goto out; | |
755 | ||
756 | /* for SFP+ modules and DA cables on 82599 it can take up to 500usecs | |
757 | * before the link status is correct | |
758 | */ | |
759 | if (mac->type == ixgbe_mac_82599_vf) { | |
760 | int i; | |
761 | ||
762 | for (i = 0; i < 5; i++) { | |
763 | udelay(100); | |
764 | links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS); | |
765 | ||
766 | if (!(links_reg & IXGBE_LINKS_UP)) | |
767 | goto out; | |
768 | } | |
769 | } | |
770 | ||
771 | switch (links_reg & IXGBE_LINKS_SPEED_82599) { | |
772 | case IXGBE_LINKS_SPEED_10G_82599: | |
773 | *speed = IXGBE_LINK_SPEED_10GB_FULL; | |
774 | break; | |
775 | case IXGBE_LINKS_SPEED_1G_82599: | |
776 | *speed = IXGBE_LINK_SPEED_1GB_FULL; | |
777 | break; | |
778 | case IXGBE_LINKS_SPEED_100_82599: | |
779 | *speed = IXGBE_LINK_SPEED_100_FULL; | |
780 | break; | |
781 | } | |
782 | ||
783 | /* if we passed all the tests above then the link is up and we no | |
784 | * longer need to check for link | |
785 | */ | |
786 | mac->get_link_status = false; | |
787 | ||
788 | out: | |
789 | *link_up = !mac->get_link_status; | |
790 | return 0; | |
791 | } | |
792 | ||
dd1fe113 | 793 | /** |
2f8214fe | 794 | * ixgbevf_set_rlpml_vf - Set the maximum receive packet length |
dd1fe113 AD |
795 | * @hw: pointer to the HW structure |
796 | * @max_size: value to assign to max frame size | |
797 | **/ | |
6a11e52b | 798 | static s32 ixgbevf_set_rlpml_vf(struct ixgbe_hw *hw, u16 max_size) |
dd1fe113 AD |
799 | { |
800 | u32 msgbuf[2]; | |
6a11e52b | 801 | s32 ret_val; |
dd1fe113 AD |
802 | |
803 | msgbuf[0] = IXGBE_VF_SET_LPE; | |
804 | msgbuf[1] = max_size; | |
6a11e52b | 805 | |
c6426971 | 806 | ret_val = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, |
4078ea37 | 807 | ARRAY_SIZE(msgbuf)); |
6a11e52b TN |
808 | if (ret_val) |
809 | return ret_val; | |
810 | if ((msgbuf[0] & IXGBE_VF_SET_LPE) && | |
811 | (msgbuf[0] & IXGBE_VT_MSGTYPE_NACK)) | |
812 | return IXGBE_ERR_MBX; | |
813 | ||
814 | return 0; | |
dd1fe113 AD |
815 | } |
816 | ||
c6d45171 | 817 | /** |
2f8214fe | 818 | * ixgbevf_hv_set_rlpml_vf - Set the maximum receive packet length |
c6d45171 KS |
819 | * @hw: pointer to the HW structure |
820 | * @max_size: value to assign to max frame size | |
821 | * Hyper-V variant. | |
822 | **/ | |
6a11e52b | 823 | static s32 ixgbevf_hv_set_rlpml_vf(struct ixgbe_hw *hw, u16 max_size) |
c6d45171 KS |
824 | { |
825 | u32 reg; | |
826 | ||
827 | /* If we are on Hyper-V, we implement this functionality | |
828 | * differently. | |
829 | */ | |
830 | reg = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(0)); | |
831 | /* CRC == 4 */ | |
832 | reg |= ((max_size + 4) | IXGBE_RXDCTL_RLPML_EN); | |
833 | IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(0), reg); | |
6a11e52b TN |
834 | |
835 | return 0; | |
c6d45171 KS |
836 | } |
837 | ||
31186785 | 838 | /** |
7921f4dc | 839 | * ixgbevf_negotiate_api_version_vf - Negotiate supported API version |
31186785 AD |
840 | * @hw: pointer to the HW structure |
841 | * @api: integer containing requested API version | |
842 | **/ | |
7921f4dc | 843 | static int ixgbevf_negotiate_api_version_vf(struct ixgbe_hw *hw, int api) |
31186785 AD |
844 | { |
845 | int err; | |
846 | u32 msg[3]; | |
847 | ||
848 | /* Negotiate the mailbox API version */ | |
849 | msg[0] = IXGBE_VF_API_NEGOTIATE; | |
850 | msg[1] = api; | |
851 | msg[2] = 0; | |
31186785 | 852 | |
4078ea37 | 853 | err = ixgbevf_write_msg_read_ack(hw, msg, msg, ARRAY_SIZE(msg)); |
31186785 AD |
854 | if (!err) { |
855 | msg[0] &= ~IXGBE_VT_MSGTYPE_CTS; | |
856 | ||
857 | /* Store value and return 0 on success */ | |
858 | if (msg[0] == (IXGBE_VF_API_NEGOTIATE | IXGBE_VT_MSGTYPE_ACK)) { | |
859 | hw->api_version = api; | |
860 | return 0; | |
861 | } | |
862 | ||
863 | err = IXGBE_ERR_INVALID_ARGUMENT; | |
864 | } | |
865 | ||
866 | return err; | |
867 | } | |
868 | ||
c6d45171 | 869 | /** |
2f8214fe | 870 | * ixgbevf_hv_negotiate_api_version_vf - Negotiate supported API version |
c6d45171 KS |
871 | * @hw: pointer to the HW structure |
872 | * @api: integer containing requested API version | |
873 | * Hyper-V version - only ixgbe_mbox_api_10 supported. | |
874 | **/ | |
2f8214fe | 875 | static int ixgbevf_hv_negotiate_api_version_vf(struct ixgbe_hw *hw, int api) |
c6d45171 KS |
876 | { |
877 | /* Hyper-V only supports api version ixgbe_mbox_api_10 */ | |
878 | if (api != ixgbe_mbox_api_10) | |
879 | return IXGBE_ERR_INVALID_ARGUMENT; | |
880 | ||
881 | return 0; | |
882 | } | |
883 | ||
56e94095 AD |
884 | int ixgbevf_get_queues(struct ixgbe_hw *hw, unsigned int *num_tcs, |
885 | unsigned int *default_tc) | |
886 | { | |
887 | int err; | |
888 | u32 msg[5]; | |
889 | ||
890 | /* do nothing if API doesn't support ixgbevf_get_queues */ | |
891 | switch (hw->api_version) { | |
892 | case ixgbe_mbox_api_11: | |
94cf66f8 | 893 | case ixgbe_mbox_api_12: |
41e544cd | 894 | case ixgbe_mbox_api_13: |
7f68d430 | 895 | case ixgbe_mbox_api_14: |
56e94095 AD |
896 | break; |
897 | default: | |
898 | return 0; | |
899 | } | |
900 | ||
901 | /* Fetch queue configuration from the PF */ | |
902 | msg[0] = IXGBE_VF_GET_QUEUE; | |
903 | msg[1] = msg[2] = msg[3] = msg[4] = 0; | |
56e94095 | 904 | |
4078ea37 | 905 | err = ixgbevf_write_msg_read_ack(hw, msg, msg, ARRAY_SIZE(msg)); |
56e94095 AD |
906 | if (!err) { |
907 | msg[0] &= ~IXGBE_VT_MSGTYPE_CTS; | |
908 | ||
dec0d8e4 | 909 | /* if we we didn't get an ACK there must have been |
56e94095 AD |
910 | * some sort of mailbox error so we should treat it |
911 | * as such | |
912 | */ | |
913 | if (msg[0] != (IXGBE_VF_GET_QUEUE | IXGBE_VT_MSGTYPE_ACK)) | |
914 | return IXGBE_ERR_MBX; | |
915 | ||
916 | /* record and validate values from message */ | |
917 | hw->mac.max_tx_queues = msg[IXGBE_VF_TX_QUEUES]; | |
918 | if (hw->mac.max_tx_queues == 0 || | |
919 | hw->mac.max_tx_queues > IXGBE_VF_MAX_TX_QUEUES) | |
920 | hw->mac.max_tx_queues = IXGBE_VF_MAX_TX_QUEUES; | |
921 | ||
922 | hw->mac.max_rx_queues = msg[IXGBE_VF_RX_QUEUES]; | |
923 | if (hw->mac.max_rx_queues == 0 || | |
924 | hw->mac.max_rx_queues > IXGBE_VF_MAX_RX_QUEUES) | |
925 | hw->mac.max_rx_queues = IXGBE_VF_MAX_RX_QUEUES; | |
926 | ||
927 | *num_tcs = msg[IXGBE_VF_TRANS_VLAN]; | |
928 | /* in case of unknown state assume we cannot tag frames */ | |
929 | if (*num_tcs > hw->mac.max_rx_queues) | |
930 | *num_tcs = 1; | |
931 | ||
932 | *default_tc = msg[IXGBE_VF_DEF_QUEUE]; | |
933 | /* default to queue 0 on out-of-bounds queue number */ | |
934 | if (*default_tc >= hw->mac.max_tx_queues) | |
935 | *default_tc = 0; | |
936 | } | |
937 | ||
938 | return err; | |
939 | } | |
940 | ||
3d8fe98f | 941 | static const struct ixgbe_mac_operations ixgbevf_mac_ops = { |
dec0d8e4 JK |
942 | .init_hw = ixgbevf_init_hw_vf, |
943 | .reset_hw = ixgbevf_reset_hw_vf, | |
944 | .start_hw = ixgbevf_start_hw_vf, | |
945 | .get_mac_addr = ixgbevf_get_mac_addr_vf, | |
946 | .stop_adapter = ixgbevf_stop_hw_vf, | |
947 | .setup_link = ixgbevf_setup_mac_link_vf, | |
948 | .check_link = ixgbevf_check_mac_link_vf, | |
7921f4dc | 949 | .negotiate_api_version = ixgbevf_negotiate_api_version_vf, |
dec0d8e4 JK |
950 | .set_rar = ixgbevf_set_rar_vf, |
951 | .update_mc_addr_list = ixgbevf_update_mc_addr_list_vf, | |
8443c1a4 | 952 | .update_xcast_mode = ixgbevf_update_xcast_mode, |
dec0d8e4 JK |
953 | .set_uc_addr = ixgbevf_set_uc_addr_vf, |
954 | .set_vfta = ixgbevf_set_vfta_vf, | |
2f8214fe | 955 | .set_rlpml = ixgbevf_set_rlpml_vf, |
3047f90b GR |
956 | }; |
957 | ||
c6d45171 KS |
958 | static const struct ixgbe_mac_operations ixgbevf_hv_mac_ops = { |
959 | .init_hw = ixgbevf_init_hw_vf, | |
960 | .reset_hw = ixgbevf_hv_reset_hw_vf, | |
961 | .start_hw = ixgbevf_start_hw_vf, | |
962 | .get_mac_addr = ixgbevf_get_mac_addr_vf, | |
963 | .stop_adapter = ixgbevf_stop_hw_vf, | |
964 | .setup_link = ixgbevf_setup_mac_link_vf, | |
965 | .check_link = ixgbevf_hv_check_mac_link_vf, | |
2f8214fe | 966 | .negotiate_api_version = ixgbevf_hv_negotiate_api_version_vf, |
c6d45171 KS |
967 | .set_rar = ixgbevf_hv_set_rar_vf, |
968 | .update_mc_addr_list = ixgbevf_hv_update_mc_addr_list_vf, | |
969 | .update_xcast_mode = ixgbevf_hv_update_xcast_mode, | |
970 | .set_uc_addr = ixgbevf_hv_set_uc_addr_vf, | |
971 | .set_vfta = ixgbevf_hv_set_vfta_vf, | |
2f8214fe | 972 | .set_rlpml = ixgbevf_hv_set_rlpml_vf, |
c6d45171 KS |
973 | }; |
974 | ||
3d8fe98f | 975 | const struct ixgbevf_info ixgbevf_82599_vf_info = { |
3047f90b GR |
976 | .mac = ixgbe_mac_82599_vf, |
977 | .mac_ops = &ixgbevf_mac_ops, | |
978 | }; | |
979 | ||
c6d45171 KS |
980 | const struct ixgbevf_info ixgbevf_82599_vf_hv_info = { |
981 | .mac = ixgbe_mac_82599_vf, | |
982 | .mac_ops = &ixgbevf_hv_mac_ops, | |
983 | }; | |
984 | ||
3d8fe98f | 985 | const struct ixgbevf_info ixgbevf_X540_vf_info = { |
2316aa2a GR |
986 | .mac = ixgbe_mac_X540_vf, |
987 | .mac_ops = &ixgbevf_mac_ops, | |
988 | }; | |
47068b0d | 989 | |
c6d45171 KS |
990 | const struct ixgbevf_info ixgbevf_X540_vf_hv_info = { |
991 | .mac = ixgbe_mac_X540_vf, | |
992 | .mac_ops = &ixgbevf_hv_mac_ops, | |
993 | }; | |
994 | ||
47068b0d ET |
995 | const struct ixgbevf_info ixgbevf_X550_vf_info = { |
996 | .mac = ixgbe_mac_X550_vf, | |
997 | .mac_ops = &ixgbevf_mac_ops, | |
998 | }; | |
999 | ||
c6d45171 KS |
1000 | const struct ixgbevf_info ixgbevf_X550_vf_hv_info = { |
1001 | .mac = ixgbe_mac_X550_vf, | |
1002 | .mac_ops = &ixgbevf_hv_mac_ops, | |
1003 | }; | |
1004 | ||
47068b0d ET |
1005 | const struct ixgbevf_info ixgbevf_X550EM_x_vf_info = { |
1006 | .mac = ixgbe_mac_X550EM_x_vf, | |
1007 | .mac_ops = &ixgbevf_mac_ops, | |
1008 | }; | |
c6d45171 KS |
1009 | |
1010 | const struct ixgbevf_info ixgbevf_X550EM_x_vf_hv_info = { | |
1011 | .mac = ixgbe_mac_X550EM_x_vf, | |
1012 | .mac_ops = &ixgbevf_hv_mac_ops, | |
1013 | }; | |
1d94f987 DS |
1014 | |
1015 | const struct ixgbevf_info ixgbevf_x550em_a_vf_info = { | |
1016 | .mac = ixgbe_mac_x550em_a_vf, | |
1017 | .mac_ops = &ixgbevf_mac_ops, | |
1018 | }; |