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Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm
[linux-block.git] / drivers / net / ethernet / intel / ixgbevf / ixgbevf_main.c
CommitLineData
51dce24b
JK		 1// SPDX-License-Identifier: GPL-2.0
2/* Copyright(c) 1999 - 2018 Intel Corporation. */
92915f71 3
92915f71
GR		 4/******************************************************************************
5 Copyright (c)2006 - 2007 Myricom, Inc. for some LRO specific code
6******************************************************************************/
dbd9636e
JK		 7
8#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
9
92915f71 10#include <linux/types.h>
dadcd65f 11#include <linux/bitops.h>
92915f71
GR		 12#include <linux/module.h>
13#include <linux/pci.h>
14#include <linux/netdevice.h>
15#include <linux/vmalloc.h>
16#include <linux/string.h>
17#include <linux/in.h>
18#include <linux/ip.h>
19#include <linux/tcp.h>
70a10e25 20#include <linux/sctp.h>
92915f71 21#include <linux/ipv6.h>
5a0e3ad6 22#include <linux/slab.h>
92915f71
GR		 23#include <net/checksum.h>
24#include <net/ip6_checksum.h>
25#include <linux/ethtool.h>
01789349 26#include <linux/if.h>
92915f71 27#include <linux/if_vlan.h>
70c71606 28#include <linux/prefetch.h>
2a20525b 29#include <net/mpls.h>
c7aec596
TN		 30#include <linux/bpf.h>
31#include <linux/bpf_trace.h>
32#include <linux/atomic.h>
8f6617ba 33#include <net/xfrm.h>
92915f71
GR		 34
35#include "ixgbevf.h"
36
3d8fe98f 37const char ixgbevf_driver_name[] = "ixgbevf";
92915f71 38static const char ixgbevf_driver_string[] =
422e05d1 39 "Intel(R) 10 Gigabit PCI Express Virtual Function Network Driver";
92915f71 40
66c87bd5 41static char ixgbevf_copyright[] =
7f68d430 42 "Copyright (c) 2009 - 2018 Intel Corporation.";
92915f71
GR		 43
44static const struct ixgbevf_info *ixgbevf_info_tbl[] = {
c6d45171
KS		 45 [board_82599_vf] = &ixgbevf_82599_vf_info,
46 [board_82599_vf_hv] = &ixgbevf_82599_vf_hv_info,
47 [board_X540_vf] = &ixgbevf_X540_vf_info,
48 [board_X540_vf_hv] = &ixgbevf_X540_vf_hv_info,
49 [board_X550_vf] = &ixgbevf_X550_vf_info,
50 [board_X550_vf_hv] = &ixgbevf_X550_vf_hv_info,
51 [board_X550EM_x_vf] = &ixgbevf_X550EM_x_vf_info,
52 [board_X550EM_x_vf_hv] = &ixgbevf_X550EM_x_vf_hv_info,
1d94f987 53 [board_x550em_a_vf] = &ixgbevf_x550em_a_vf_info,
92915f71
GR		 54};
55
56/* ixgbevf_pci_tbl - PCI Device ID Table
57 *
58 * Wildcard entries (PCI_ANY_ID) should come last
59 * Last entry must be all 0s
60 *
61 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
62 * Class, Class Mask, private data (not used) }
63 */
9baa3c34 64static const struct pci_device_id ixgbevf_pci_tbl[] = {
39ba22b4 65 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_VF), board_82599_vf },
c6d45171 66 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_VF_HV), board_82599_vf_hv },
39ba22b4 67 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540_VF), board_X540_vf },
c6d45171 68 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540_VF_HV), board_X540_vf_hv },
47068b0d 69 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550_VF), board_X550_vf },
c6d45171 70 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550_VF_HV), board_X550_vf_hv },
47068b0d 71 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_VF), board_X550EM_x_vf },
c6d45171 72 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_VF_HV), board_X550EM_x_vf_hv},
1d94f987 73 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_VF), board_x550em_a_vf },
92915f71
GR		 74 /* required last entry */
75 {0, }
76};
77MODULE_DEVICE_TABLE(pci, ixgbevf_pci_tbl);
78
b8ce18cd 79MODULE_DESCRIPTION("Intel(R) 10 Gigabit Virtual Function Network Driver");
98674ebe 80MODULE_LICENSE("GPL v2");
92915f71 81
b3f4d599 82#define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
83static int debug = -1;
84module_param(debug, int, 0);
85MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
92915f71 86
40a13e24
MR		 87static struct workqueue_struct *ixgbevf_wq;
88
9ac5c5cc
ET		 89static void ixgbevf_service_event_schedule(struct ixgbevf_adapter *adapter)
90{
91 if (!test_bit(__IXGBEVF_DOWN, &adapter->state) &&
92 !test_bit(__IXGBEVF_REMOVING, &adapter->state) &&
93 !test_and_set_bit(__IXGBEVF_SERVICE_SCHED, &adapter->state))
40a13e24 94 queue_work(ixgbevf_wq, &adapter->service_task);
9ac5c5cc
ET		 95}
96
97static void ixgbevf_service_event_complete(struct ixgbevf_adapter *adapter)
98{
99 BUG_ON(!test_bit(__IXGBEVF_SERVICE_SCHED, &adapter->state));
100
101 /* flush memory to make sure state is correct before next watchdog */
102 smp_mb__before_atomic();
103 clear_bit(__IXGBEVF_SERVICE_SCHED, &adapter->state);
104}
105
92915f71 106/* forward decls */
220fe050 107static void ixgbevf_queue_reset_subtask(struct ixgbevf_adapter *adapter);
fa71ae27 108static void ixgbevf_set_itr(struct ixgbevf_q_vector *q_vector);
56e94095 109static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter);
925f5690
ET		 110static bool ixgbevf_can_reuse_rx_page(struct ixgbevf_rx_buffer *rx_buffer);
111static void ixgbevf_reuse_rx_page(struct ixgbevf_ring *rx_ring,
112 struct ixgbevf_rx_buffer *old_buff);
92915f71 113
dbf8b0d8
MR		 114static void ixgbevf_remove_adapter(struct ixgbe_hw *hw)
115{
116 struct ixgbevf_adapter *adapter = hw->back;
117
118 if (!hw->hw_addr)
119 return;
120 hw->hw_addr = NULL;
121 dev_err(&adapter->pdev->dev, "Adapter removed\n");
9ac5c5cc
ET		 122 if (test_bit(__IXGBEVF_SERVICE_INITED, &adapter->state))
123 ixgbevf_service_event_schedule(adapter);
dbf8b0d8
MR		 124}
125
126static void ixgbevf_check_remove(struct ixgbe_hw *hw, u32 reg)
127{
128 u32 value;
129
130 /* The following check not only optimizes a bit by not
131 * performing a read on the status register when the
132 * register just read was a status register read that
133 * returned IXGBE_FAILED_READ_REG. It also blocks any
134 * potential recursion.
135 */
136 if (reg == IXGBE_VFSTATUS) {
137 ixgbevf_remove_adapter(hw);
138 return;
139 }
32c74949 140 value = ixgbevf_read_reg(hw, IXGBE_VFSTATUS);
dbf8b0d8
MR		 141 if (value == IXGBE_FAILED_READ_REG)
142 ixgbevf_remove_adapter(hw);
143}
144
32c74949 145u32 ixgbevf_read_reg(struct ixgbe_hw *hw, u32 reg)
dbf8b0d8 146{
6aa7de05 147 u8 __iomem *reg_addr = READ_ONCE(hw->hw_addr);
dbf8b0d8
MR		 148 u32 value;
149
150 if (IXGBE_REMOVED(reg_addr))
151 return IXGBE_FAILED_READ_REG;
152 value = readl(reg_addr + reg);
153 if (unlikely(value == IXGBE_FAILED_READ_REG))
154 ixgbevf_check_remove(hw, reg);
155 return value;
156}
157
49ce9c2c 158/**
65d676c8 159 * ixgbevf_set_ivar - set IVAR registers - maps interrupt causes to vectors
92915f71
GR		 160 * @adapter: pointer to adapter struct
161 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
162 * @queue: queue to map the corresponding interrupt to
163 * @msix_vector: the vector to map to the corresponding queue
dec0d8e4 164 **/
92915f71
GR		 165static void ixgbevf_set_ivar(struct ixgbevf_adapter *adapter, s8 direction,
166 u8 queue, u8 msix_vector)
167{
168 u32 ivar, index;
169 struct ixgbe_hw *hw = &adapter->hw;
dec0d8e4 170
92915f71
GR		 171 if (direction == -1) {
172 /* other causes */
173 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
174 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR_MISC);
175 ivar &= ~0xFF;
176 ivar |= msix_vector;
177 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR_MISC, ivar);
178 } else {
dec0d8e4 179 /* Tx or Rx causes */
92915f71
GR		 180 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
181 index = ((16 * (queue & 1)) + (8 * direction));
182 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR(queue >> 1));
183 ivar &= ~(0xFF << index);
184 ivar |= (msix_vector << index);
185 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR(queue >> 1), ivar);
186 }
187}
188
e08400b7
ET		 189static u64 ixgbevf_get_tx_completed(struct ixgbevf_ring *ring)
190{
191 return ring->stats.packets;
192}
92915f71 193
e08400b7
ET		 194static u32 ixgbevf_get_tx_pending(struct ixgbevf_ring *ring)
195{
196 struct ixgbevf_adapter *adapter = netdev_priv(ring->netdev);
197 struct ixgbe_hw *hw = &adapter->hw;
92915f71 198
e08400b7
ET		 199 u32 head = IXGBE_READ_REG(hw, IXGBE_VFTDH(ring->reg_idx));
200 u32 tail = IXGBE_READ_REG(hw, IXGBE_VFTDT(ring->reg_idx));
201
202 if (head != tail)
203 return (head < tail) ?
204 tail - head : (tail + ring->count - head);
205
206 return 0;
207}
208
209static inline bool ixgbevf_check_tx_hang(struct ixgbevf_ring *tx_ring)
210{
211 u32 tx_done = ixgbevf_get_tx_completed(tx_ring);
212 u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
213 u32 tx_pending = ixgbevf_get_tx_pending(tx_ring);
214
215 clear_check_for_tx_hang(tx_ring);
216
217 /* Check for a hung queue, but be thorough. This verifies
218 * that a transmit has been completed since the previous
219 * check AND there is at least one packet pending. The
220 * ARMED bit is set to indicate a potential hang.
221 */
222 if ((tx_done_old == tx_done) && tx_pending) {
223 /* make sure it is true for two checks in a row */
224 return test_and_set_bit(__IXGBEVF_HANG_CHECK_ARMED,
225 &tx_ring->state);
226 }
227 /* reset the countdown */
228 clear_bit(__IXGBEVF_HANG_CHECK_ARMED, &tx_ring->state);
229
230 /* update completed stats and continue */
231 tx_ring->tx_stats.tx_done_old = tx_done;
232
233 return false;
234}
235
9ac5c5cc
ET		 236static void ixgbevf_tx_timeout_reset(struct ixgbevf_adapter *adapter)
237{
238 /* Do the reset outside of interrupt context */
239 if (!test_bit(__IXGBEVF_DOWN, &adapter->state)) {
d5dd7c3f 240 set_bit(__IXGBEVF_RESET_REQUESTED, &adapter->state);
9ac5c5cc
ET		 241 ixgbevf_service_event_schedule(adapter);
242 }
243}
244
e08400b7
ET		 245/**
246 * ixgbevf_tx_timeout - Respond to a Tx Hang
247 * @netdev: network interface device structure
b50f7bca 248 * @txqueue: transmit queue hanging (unused)
e08400b7 249 **/
b50f7bca 250static void ixgbevf_tx_timeout(struct net_device *netdev, unsigned int __always_unused txqueue)
e08400b7
ET		 251{
252 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
253
9ac5c5cc 254 ixgbevf_tx_timeout_reset(adapter);
e08400b7 255}
92915f71
GR		 256
257/**
258 * ixgbevf_clean_tx_irq - Reclaim resources after transmit completes
fa71ae27 259 * @q_vector: board private structure
92915f71 260 * @tx_ring: tx ring to clean
8220bbc1 261 * @napi_budget: Used to determine if we are in netpoll
92915f71 262 **/
fa71ae27 263static bool ixgbevf_clean_tx_irq(struct ixgbevf_q_vector *q_vector,
8220bbc1 264 struct ixgbevf_ring *tx_ring, int napi_budget)
92915f71 265{
fa71ae27 266 struct ixgbevf_adapter *adapter = q_vector->adapter;
7ad1a093
ET		 267 struct ixgbevf_tx_buffer *tx_buffer;
268 union ixgbe_adv_tx_desc *tx_desc;
7f68d430 269 unsigned int total_bytes = 0, total_packets = 0, total_ipsec = 0;
7ad1a093
ET		 270 unsigned int budget = tx_ring->count / 2;
271 unsigned int i = tx_ring->next_to_clean;
92915f71 272
10cc1bdd
AD		 273 if (test_bit(__IXGBEVF_DOWN, &adapter->state))
274 return true;
275
7ad1a093
ET		 276 tx_buffer = &tx_ring->tx_buffer_info[i];
277 tx_desc = IXGBEVF_TX_DESC(tx_ring, i);
278 i -= tx_ring->count;
92915f71 279
e757e3e1 280 do {
7ad1a093 281 union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
e757e3e1
AD		 282
283 /* if next_to_watch is not set then there is no work pending */
284 if (!eop_desc)
285 break;
286
287 /* prevent any other reads prior to eop_desc */
ae0c585d 288 smp_rmb();
e757e3e1
AD		 289
290 /* if DD is not set pending work has not been completed */
291 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
292 break;
293
294 /* clear next_to_watch to prevent false hangs */
7ad1a093 295 tx_buffer->next_to_watch = NULL;
e757e3e1 296
7ad1a093
ET		 297 /* update the statistics for this packet */
298 total_bytes += tx_buffer->bytecount;
299 total_packets += tx_buffer->gso_segs;
7f68d430
SN		 300 if (tx_buffer->tx_flags & IXGBE_TX_FLAGS_IPSEC)
301 total_ipsec++;
92915f71 302
9bdfefd2 303 /* free the skb */
21092e9c
TN		 304 if (ring_is_xdp(tx_ring))
305 page_frag_free(tx_buffer->data);
306 else
307 napi_consume_skb(tx_buffer->skb, napi_budget);
9bdfefd2
ET		 308
309 /* unmap skb header data */
310 dma_unmap_single(tx_ring->dev,
311 dma_unmap_addr(tx_buffer, dma),
312 dma_unmap_len(tx_buffer, len),
313 DMA_TO_DEVICE);
314
7ad1a093 315 /* clear tx_buffer data */
9bdfefd2 316 dma_unmap_len_set(tx_buffer, len, 0);
92915f71 317
7ad1a093
ET		 318 /* unmap remaining buffers */
319 while (tx_desc != eop_desc) {
7ad1a093
ET		 320 tx_buffer++;
321 tx_desc++;
92915f71 322 i++;
7ad1a093
ET		 323 if (unlikely(!i)) {
324 i -= tx_ring->count;
325 tx_buffer = tx_ring->tx_buffer_info;
326 tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
327 }
e757e3e1 328
9bdfefd2
ET		 329 /* unmap any remaining paged data */
330 if (dma_unmap_len(tx_buffer, len)) {
331 dma_unmap_page(tx_ring->dev,
332 dma_unmap_addr(tx_buffer, dma),
333 dma_unmap_len(tx_buffer, len),
334 DMA_TO_DEVICE);
335 dma_unmap_len_set(tx_buffer, len, 0);
336 }
92915f71
GR		 337 }
338
7ad1a093
ET		 339 /* move us one more past the eop_desc for start of next pkt */
340 tx_buffer++;
341 tx_desc++;
342 i++;
343 if (unlikely(!i)) {
344 i -= tx_ring->count;
345 tx_buffer = tx_ring->tx_buffer_info;
346 tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
347 }
348
349 /* issue prefetch for next Tx descriptor */
350 prefetch(tx_desc);
351
352 /* update budget accounting */
353 budget--;
354 } while (likely(budget));
355
356 i += tx_ring->count;
92915f71 357 tx_ring->next_to_clean = i;
7ad1a093
ET		 358 u64_stats_update_begin(&tx_ring->syncp);
359 tx_ring->stats.bytes += total_bytes;
360 tx_ring->stats.packets += total_packets;
361 u64_stats_update_end(&tx_ring->syncp);
362 q_vector->tx.total_bytes += total_bytes;
363 q_vector->tx.total_packets += total_packets;
7f68d430 364 adapter->tx_ipsec += total_ipsec;
92915f71 365
e08400b7
ET		 366 if (check_for_tx_hang(tx_ring) && ixgbevf_check_tx_hang(tx_ring)) {
367 struct ixgbe_hw *hw = &adapter->hw;
368 union ixgbe_adv_tx_desc *eop_desc;
369
370 eop_desc = tx_ring->tx_buffer_info[i].next_to_watch;
371
21092e9c 372 pr_err("Detected Tx Unit Hang%s\n"
e08400b7
ET		 373 " Tx Queue <%d>\n"
374 " TDH, TDT <%x>, <%x>\n"
375 " next_to_use <%x>\n"
376 " next_to_clean <%x>\n"
377 "tx_buffer_info[next_to_clean]\n"
378 " next_to_watch <%p>\n"
379 " eop_desc->wb.status <%x>\n"
380 " time_stamp <%lx>\n"
381 " jiffies <%lx>\n",
21092e9c 382 ring_is_xdp(tx_ring) ? " XDP" : "",
e08400b7
ET		 383 tx_ring->queue_index,
384 IXGBE_READ_REG(hw, IXGBE_VFTDH(tx_ring->reg_idx)),
385 IXGBE_READ_REG(hw, IXGBE_VFTDT(tx_ring->reg_idx)),
386 tx_ring->next_to_use, i,
387 eop_desc, (eop_desc ? eop_desc->wb.status : 0),
388 tx_ring->tx_buffer_info[i].time_stamp, jiffies);
389
21092e9c
TN		 390 if (!ring_is_xdp(tx_ring))
391 netif_stop_subqueue(tx_ring->netdev,
392 tx_ring->queue_index);
e08400b7
ET		 393
394 /* schedule immediate reset if we believe we hung */
9ac5c5cc 395 ixgbevf_tx_timeout_reset(adapter);
e08400b7
ET		 396
397 return true;
398 }
399
21092e9c
TN		 400 if (ring_is_xdp(tx_ring))
401 return !!budget;
402
92915f71 403#define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
7ad1a093 404 if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
f880d07b 405 (ixgbevf_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
92915f71
GR		 406 /* Make sure that anybody stopping the queue after this
407 * sees the new next_to_clean.
408 */
409 smp_mb();
7ad1a093 410
fb40195c
AD		 411 if (__netif_subqueue_stopped(tx_ring->netdev,
412 tx_ring->queue_index) &&
92915f71 413 !test_bit(__IXGBEVF_DOWN, &adapter->state)) {
fb40195c
AD		 414 netif_wake_subqueue(tx_ring->netdev,
415 tx_ring->queue_index);
7ad1a093 416 ++tx_ring->tx_stats.restart_queue;
92915f71 417 }
92915f71
GR		 418 }
419
7ad1a093 420 return !!budget;
92915f71
GR		 421}
422
08681618
JK		 423/**
424 * ixgbevf_rx_skb - Helper function to determine proper Rx method
425 * @q_vector: structure containing interrupt and ring information
426 * @skb: packet to send up
08681618
JK		 427 **/
428static void ixgbevf_rx_skb(struct ixgbevf_q_vector *q_vector,
dff80520 429 struct sk_buff *skb)
08681618 430{
688ff32d 431 napi_gro_receive(&q_vector->napi, skb);
08681618
JK		 432}
433
1e1429d6
FD		 434#define IXGBE_RSS_L4_TYPES_MASK \
435 ((1ul << IXGBE_RXDADV_RSSTYPE_IPV4_TCP) | \
436 (1ul << IXGBE_RXDADV_RSSTYPE_IPV4_UDP) | \
437 (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_TCP) | \
438 (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_UDP))
439
440static inline void ixgbevf_rx_hash(struct ixgbevf_ring *ring,
441 union ixgbe_adv_rx_desc *rx_desc,
442 struct sk_buff *skb)
443{
444 u16 rss_type;
445
446 if (!(ring->netdev->features & NETIF_F_RXHASH))
447 return;
448
449 rss_type = le16_to_cpu(rx_desc->wb.lower.lo_dword.hs_rss.pkt_info) &
450 IXGBE_RXDADV_RSSTYPE_MASK;
451
452 if (!rss_type)
453 return;
454
455 skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
456 (IXGBE_RSS_L4_TYPES_MASK & (1ul << rss_type)) ?
457 PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3);
458}
459
dec0d8e4
JK		 460/**
461 * ixgbevf_rx_checksum - indicate in skb if hw indicated a good cksum
ec62fe26
ET		 462 * @ring: structure containig ring specific data
463 * @rx_desc: current Rx descriptor being processed
92915f71 464 * @skb: skb currently being received and modified
dec0d8e4 465 **/
55fb277c 466static inline void ixgbevf_rx_checksum(struct ixgbevf_ring *ring,
ec62fe26
ET		 467 union ixgbe_adv_rx_desc *rx_desc,
468 struct sk_buff *skb)
92915f71 469{
bc8acf2c 470 skb_checksum_none_assert(skb);
92915f71
GR		 471
472 /* Rx csum disabled */
fb40195c 473 if (!(ring->netdev->features & NETIF_F_RXCSUM))
92915f71
GR		 474 return;
475
476 /* if IP and error */
ec62fe26
ET		 477 if (ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
478 ixgbevf_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
095e2617 479 ring->rx_stats.csum_err++;
92915f71
GR		 480 return;
481 }
482
ec62fe26 483 if (!ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
92915f71
GR		 484 return;
485
ec62fe26 486 if (ixgbevf_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
095e2617 487 ring->rx_stats.csum_err++;
92915f71
GR		 488 return;
489 }
490
491 /* It must be a TCP or UDP packet with a valid checksum */
492 skb->ip_summed = CHECKSUM_UNNECESSARY;
92915f71
GR		 493}
494
dec0d8e4
JK		 495/**
496 * ixgbevf_process_skb_fields - Populate skb header fields from Rx descriptor
dff80520
ET		 497 * @rx_ring: rx descriptor ring packet is being transacted on
498 * @rx_desc: pointer to the EOP Rx descriptor
499 * @skb: pointer to current skb being populated
500 *
501 * This function checks the ring, descriptor, and packet information in
502 * order to populate the checksum, VLAN, protocol, and other fields within
503 * the skb.
dec0d8e4 504 **/
dff80520
ET		 505static void ixgbevf_process_skb_fields(struct ixgbevf_ring *rx_ring,
506 union ixgbe_adv_rx_desc *rx_desc,
507 struct sk_buff *skb)
508{
1e1429d6 509 ixgbevf_rx_hash(rx_ring, rx_desc, skb);
dff80520
ET		 510 ixgbevf_rx_checksum(rx_ring, rx_desc, skb);
511
512 if (ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
513 u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
514 unsigned long *active_vlans = netdev_priv(rx_ring->netdev);
515
516 if (test_bit(vid & VLAN_VID_MASK, active_vlans))
517 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
518 }
519
7f68d430
SN		 520 if (ixgbevf_test_staterr(rx_desc, IXGBE_RXDADV_STAT_SECP))
521 ixgbevf_ipsec_rx(rx_ring, rx_desc, skb);
522
dff80520
ET		 523 skb->protocol = eth_type_trans(skb, rx_ring->netdev);
524}
525
925f5690
ET		 526static
527struct ixgbevf_rx_buffer *ixgbevf_get_rx_buffer(struct ixgbevf_ring *rx_ring,
528 const unsigned int size)
529{
530 struct ixgbevf_rx_buffer *rx_buffer;
531
532 rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
533 prefetchw(rx_buffer->page);
534
535 /* we are reusing so sync this buffer for CPU use */
536 dma_sync_single_range_for_cpu(rx_ring->dev,
537 rx_buffer->dma,
538 rx_buffer->page_offset,
539 size,
540 DMA_FROM_DEVICE);
541
542 rx_buffer->pagecnt_bias--;
543
544 return rx_buffer;
545}
546
547static void ixgbevf_put_rx_buffer(struct ixgbevf_ring *rx_ring,
c7aec596
TN		 548 struct ixgbevf_rx_buffer *rx_buffer,
549 struct sk_buff *skb)
925f5690
ET		 550{
551 if (ixgbevf_can_reuse_rx_page(rx_buffer)) {
552 /* hand second half of page back to the ring */
553 ixgbevf_reuse_rx_page(rx_ring, rx_buffer);
554 } else {
c7aec596
TN		 555 if (IS_ERR(skb))
556 /* We are not reusing the buffer so unmap it and free
557 * any references we are holding to it
558 */
559 dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma,
560 ixgbevf_rx_pg_size(rx_ring),
561 DMA_FROM_DEVICE,
562 IXGBEVF_RX_DMA_ATTR);
925f5690
ET		 563 __page_frag_cache_drain(rx_buffer->page,
564 rx_buffer->pagecnt_bias);
565 }
566
567 /* clear contents of rx_buffer */
568 rx_buffer->page = NULL;
569}
570
4b95fe3d
ET		 571/**
572 * ixgbevf_is_non_eop - process handling of non-EOP buffers
573 * @rx_ring: Rx ring being processed
574 * @rx_desc: Rx descriptor for current buffer
4b95fe3d
ET		 575 *
576 * This function updates next to clean. If the buffer is an EOP buffer
577 * this function exits returning false, otherwise it will place the
578 * sk_buff in the next buffer to be chained and return true indicating
579 * that this is in fact a non-EOP buffer.
580 **/
581static bool ixgbevf_is_non_eop(struct ixgbevf_ring *rx_ring,
bad17234 582 union ixgbe_adv_rx_desc *rx_desc)
4b95fe3d
ET		 583{
584 u32 ntc = rx_ring->next_to_clean + 1;
585
586 /* fetch, update, and store next to clean */
587 ntc = (ntc < rx_ring->count) ? ntc : 0;
588 rx_ring->next_to_clean = ntc;
589
590 prefetch(IXGBEVF_RX_DESC(rx_ring, ntc));
591
592 if (likely(ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
593 return false;
594
595 return true;
596}
597
1ab37e12
ET		 598static inline unsigned int ixgbevf_rx_offset(struct ixgbevf_ring *rx_ring)
599{
600 return ring_uses_build_skb(rx_ring) ? IXGBEVF_SKB_PAD : 0;
601}
602
bad17234
ET		 603static bool ixgbevf_alloc_mapped_page(struct ixgbevf_ring *rx_ring,
604 struct ixgbevf_rx_buffer *bi)
bafa578f 605{
bad17234 606 struct page *page = bi->page;
93a6a37c 607 dma_addr_t dma;
bafa578f 608
bad17234
ET		 609 /* since we are recycling buffers we should seldom need to alloc */
610 if (likely(page))
bafa578f
ET		 611 return true;
612
bad17234 613 /* alloc new page for storage */
f15c5ba5 614 page = dev_alloc_pages(ixgbevf_rx_pg_order(rx_ring));
bad17234
ET		 615 if (unlikely(!page)) {
616 rx_ring->rx_stats.alloc_rx_page_failed++;
bafa578f
ET		 617 return false;
618 }
619
bad17234 620 /* map page for use */
f15c5ba5
ET		 621 dma = dma_map_page_attrs(rx_ring->dev, page, 0,
622 ixgbevf_rx_pg_size(rx_ring),
16b35949 623 DMA_FROM_DEVICE, IXGBEVF_RX_DMA_ATTR);
bafa578f
ET		 624
625 /* if mapping failed free memory back to system since
626 * there isn't much point in holding memory we can't use
627 */
628 if (dma_mapping_error(rx_ring->dev, dma)) {
f15c5ba5 629 __free_pages(page, ixgbevf_rx_pg_order(rx_ring));
bafa578f 630
2a35efe5 631 rx_ring->rx_stats.alloc_rx_page_failed++;
bafa578f
ET		 632 return false;
633 }
634
bafa578f 635 bi->dma = dma;
bad17234 636 bi->page = page;
1ab37e12 637 bi->page_offset = ixgbevf_rx_offset(rx_ring);
35074d69 638 bi->pagecnt_bias = 1;
2a35efe5 639 rx_ring->rx_stats.alloc_rx_page++;
bafa578f
ET		 640
641 return true;
642}
643
92915f71
GR		 644/**
645 * ixgbevf_alloc_rx_buffers - Replace used receive buffers; packet split
095e2617 646 * @rx_ring: rx descriptor ring (for a specific queue) to setup buffers on
bafa578f 647 * @cleaned_count: number of buffers to replace
92915f71 648 **/
095e2617 649static void ixgbevf_alloc_rx_buffers(struct ixgbevf_ring *rx_ring,
bafa578f 650 u16 cleaned_count)
92915f71 651{
92915f71
GR		 652 union ixgbe_adv_rx_desc *rx_desc;
653 struct ixgbevf_rx_buffer *bi;
fb40195c 654 unsigned int i = rx_ring->next_to_use;
92915f71 655
bafa578f
ET		 656 /* nothing to do or no valid netdev defined */
657 if (!cleaned_count || !rx_ring->netdev)
658 return;
b9dd245b 659
bafa578f
ET		 660 rx_desc = IXGBEVF_RX_DESC(rx_ring, i);
661 bi = &rx_ring->rx_buffer_info[i];
662 i -= rx_ring->count;
05d063aa 663
bafa578f 664 do {
bad17234 665 if (!ixgbevf_alloc_mapped_page(rx_ring, bi))
bafa578f 666 break;
b9dd245b 667
16b35949
ET		 668 /* sync the buffer for use by the device */
669 dma_sync_single_range_for_device(rx_ring->dev, bi->dma,
670 bi->page_offset,
f15c5ba5 671 ixgbevf_rx_bufsz(rx_ring),
16b35949
ET		 672 DMA_FROM_DEVICE);
673
bafa578f
ET		 674 /* Refresh the desc even if pkt_addr didn't change
675 * because each write-back erases this info.
676 */
bad17234 677 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
92915f71 678
bafa578f
ET		 679 rx_desc++;
680 bi++;
92915f71 681 i++;
bafa578f
ET		 682 if (unlikely(!i)) {
683 rx_desc = IXGBEVF_RX_DESC(rx_ring, 0);
684 bi = rx_ring->rx_buffer_info;
685 i -= rx_ring->count;
686 }
687
24bff091
ET		 688 /* clear the length for the next_to_use descriptor */
689 rx_desc->wb.upper.length = 0;
bafa578f
ET		 690
691 cleaned_count--;
692 } while (cleaned_count);
693
694 i += rx_ring->count;
92915f71 695
bafa578f
ET		 696 if (rx_ring->next_to_use != i) {
697 /* record the next descriptor to use */
698 rx_ring->next_to_use = i;
699
bad17234
ET		 700 /* update next to alloc since we have filled the ring */
701 rx_ring->next_to_alloc = i;
702
bafa578f
ET		 703 /* Force memory writes to complete before letting h/w
704 * know there are new descriptors to fetch. (Only
705 * applicable for weak-ordered memory model archs,
706 * such as IA-64).
707 */
708 wmb();
709 ixgbevf_write_tail(rx_ring, i);
710 }
92915f71
GR		 711}
712
dec0d8e4
JK		 713/**
714 * ixgbevf_cleanup_headers - Correct corrupted or empty headers
bad17234
ET		 715 * @rx_ring: rx descriptor ring packet is being transacted on
716 * @rx_desc: pointer to the EOP Rx descriptor
717 * @skb: pointer to current skb being fixed
718 *
719 * Check for corrupted packet headers caused by senders on the local L2
720 * embedded NIC switch not setting up their Tx Descriptors right. These
721 * should be very rare.
722 *
723 * Also address the case where we are pulling data in on pages only
724 * and as such no data is present in the skb header.
725 *
726 * In addition if skb is not at least 60 bytes we need to pad it so that
727 * it is large enough to qualify as a valid Ethernet frame.
728 *
729 * Returns true if an error was encountered and skb was freed.
dec0d8e4 730 **/
bad17234
ET		 731static bool ixgbevf_cleanup_headers(struct ixgbevf_ring *rx_ring,
732 union ixgbe_adv_rx_desc *rx_desc,
733 struct sk_buff *skb)
734{
c7aec596
TN		 735 /* XDP packets use error pointer so abort at this point */
736 if (IS_ERR(skb))
737 return true;
738
bad17234
ET		 739 /* verify that the packet does not have any known errors */
740 if (unlikely(ixgbevf_test_staterr(rx_desc,
741 IXGBE_RXDADV_ERR_FRAME_ERR_MASK))) {
742 struct net_device *netdev = rx_ring->netdev;
743
744 if (!(netdev->features & NETIF_F_RXALL)) {
745 dev_kfree_skb_any(skb);
746 return true;
747 }
748 }
749
a94d9e22
AD		 750 /* if eth_skb_pad returns an error the skb was freed */
751 if (eth_skb_pad(skb))
752 return true;
bad17234
ET		 753
754 return false;
755}
756
dec0d8e4
JK		 757/**
758 * ixgbevf_reuse_rx_page - page flip buffer and store it back on the ring
bad17234
ET		 759 * @rx_ring: rx descriptor ring to store buffers on
760 * @old_buff: donor buffer to have page reused
761 *
762 * Synchronizes page for reuse by the adapter
dec0d8e4 763 **/
bad17234
ET		 764static void ixgbevf_reuse_rx_page(struct ixgbevf_ring *rx_ring,
765 struct ixgbevf_rx_buffer *old_buff)
766{
767 struct ixgbevf_rx_buffer *new_buff;
768 u16 nta = rx_ring->next_to_alloc;
769
770 new_buff = &rx_ring->rx_buffer_info[nta];
771
772 /* update, and store next to alloc */
773 nta++;
774 rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
775
776 /* transfer page from old buffer to new buffer */
777 new_buff->page = old_buff->page;
778 new_buff->dma = old_buff->dma;
779 new_buff->page_offset = old_buff->page_offset;
35074d69 780 new_buff->pagecnt_bias = old_buff->pagecnt_bias;
bad17234
ET		 781}
782
925f5690 783static bool ixgbevf_can_reuse_rx_page(struct ixgbevf_rx_buffer *rx_buffer)
a355fd9a 784{
925f5690
ET		 785 unsigned int pagecnt_bias = rx_buffer->pagecnt_bias;
786 struct page *page = rx_buffer->page;
35074d69 787
a79afa78
AL		 788 /* avoid re-using remote and pfmemalloc pages */
789 if (!dev_page_is_reusable(page))
a355fd9a
ET		 790 return false;
791
792#if (PAGE_SIZE < 8192)
793 /* if we are only owner of page we can reuse it */
925f5690 794 if (unlikely((page_ref_count(page) - pagecnt_bias) > 1))
a355fd9a 795 return false;
a355fd9a 796#else
f15c5ba5
ET		 797#define IXGBEVF_LAST_OFFSET \
798 (SKB_WITH_OVERHEAD(PAGE_SIZE) - IXGBEVF_RXBUFFER_2048)
799
800 if (rx_buffer->page_offset > IXGBEVF_LAST_OFFSET)
a355fd9a
ET		 801 return false;
802
803#endif
35074d69
ET		 804
805 /* If we have drained the page fragment pool we need to update
806 * the pagecnt_bias and page count so that we fully restock the
807 * number of references the driver holds.
a355fd9a 808 */
925f5690 809 if (unlikely(!pagecnt_bias)) {
35074d69
ET		 810 page_ref_add(page, USHRT_MAX);
811 rx_buffer->pagecnt_bias = USHRT_MAX;
812 }
a355fd9a
ET		 813
814 return true;
815}
816
dec0d8e4
JK		 817/**
818 * ixgbevf_add_rx_frag - Add contents of Rx buffer to sk_buff
bad17234
ET		 819 * @rx_ring: rx descriptor ring to transact packets on
820 * @rx_buffer: buffer containing page to add
bad17234 821 * @skb: sk_buff to place the data into
925f5690 822 * @size: size of buffer to be added
bad17234
ET		 823 *
824 * This function will add the data contained in rx_buffer->page to the skb.
dec0d8e4 825 **/
925f5690 826static void ixgbevf_add_rx_frag(struct ixgbevf_ring *rx_ring,
bad17234 827 struct ixgbevf_rx_buffer *rx_buffer,
925f5690
ET		 828 struct sk_buff *skb,
829 unsigned int size)
bad17234 830{
bad17234 831#if (PAGE_SIZE < 8192)
f15c5ba5 832 unsigned int truesize = ixgbevf_rx_pg_size(rx_ring) / 2;
bad17234 833#else
1ab37e12
ET		 834 unsigned int truesize = ring_uses_build_skb(rx_ring) ?
835 SKB_DATA_ALIGN(IXGBEVF_SKB_PAD + size) :
836 SKB_DATA_ALIGN(size);
bad17234 837#endif
925f5690
ET		 838 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_buffer->page,
839 rx_buffer->page_offset, size, truesize);
840#if (PAGE_SIZE < 8192)
841 rx_buffer->page_offset ^= truesize;
842#else
843 rx_buffer->page_offset += truesize;
844#endif
bad17234
ET		 845}
846
925f5690
ET		 847static
848struct sk_buff *ixgbevf_construct_skb(struct ixgbevf_ring *rx_ring,
849 struct ixgbevf_rx_buffer *rx_buffer,
c7aec596
TN		 850 struct xdp_buff *xdp,
851 union ixgbe_adv_rx_desc *rx_desc)
bad17234 852{
c7aec596 853 unsigned int size = xdp->data_end - xdp->data;
925f5690
ET		 854#if (PAGE_SIZE < 8192)
855 unsigned int truesize = ixgbevf_rx_pg_size(rx_ring) / 2;
856#else
c7aec596
TN		 857 unsigned int truesize = SKB_DATA_ALIGN(xdp->data_end -
858 xdp->data_hard_start);
925f5690
ET		 859#endif
860 unsigned int headlen;
861 struct sk_buff *skb;
bad17234 862
925f5690 863 /* prefetch first cache line of first page */
f468f21b
TT		 864 net_prefetch(xdp->data);
865
be833332
TN		 866 /* Note, we get here by enabling legacy-rx via:
867 *
868 * ethtool --set-priv-flags <dev> legacy-rx on
869 *
870 * In this mode, we currently get 0 extra XDP headroom as
871 * opposed to having legacy-rx off, where we process XDP
872 * packets going to stack via ixgbevf_build_skb().
873 *
874 * For ixgbevf_construct_skb() mode it means that the
875 * xdp->data_meta will always point to xdp->data, since
876 * the helper cannot expand the head. Should this ever
877 * changed in future for legacy-rx mode on, then lets also
878 * add xdp->data_meta handling here.
879 */
bad17234 880
925f5690
ET		 881 /* allocate a skb to store the frags */
882 skb = napi_alloc_skb(&rx_ring->q_vector->napi, IXGBEVF_RX_HDR_SIZE);
883 if (unlikely(!skb))
884 return NULL;
bad17234 885
925f5690
ET		 886 /* Determine available headroom for copy */
887 headlen = size;
888 if (headlen > IXGBEVF_RX_HDR_SIZE)
c43f1255
SF		 889 headlen = eth_get_headlen(skb->dev, xdp->data,
890 IXGBEVF_RX_HDR_SIZE);
bad17234 891
925f5690 892 /* align pull length to size of long to optimize memcpy performance */
c7aec596
TN		 893 memcpy(__skb_put(skb, headlen), xdp->data,
894 ALIGN(headlen, sizeof(long)));
925f5690
ET		 895
896 /* update all of the pointers */
897 size -= headlen;
898 if (size) {
899 skb_add_rx_frag(skb, 0, rx_buffer->page,
c7aec596
TN		 900 (xdp->data + headlen) -
901 page_address(rx_buffer->page),
925f5690
ET		 902 size, truesize);
903#if (PAGE_SIZE < 8192)
904 rx_buffer->page_offset ^= truesize;
905#else
906 rx_buffer->page_offset += truesize;
907#endif
bad17234 908 } else {
925f5690 909 rx_buffer->pagecnt_bias++;
bad17234
ET		 910 }
911
bad17234
ET		 912 return skb;
913}
914
92915f71 915static inline void ixgbevf_irq_enable_queues(struct ixgbevf_adapter *adapter,
5f3600eb 916 u32 qmask)
92915f71 917{
92915f71
GR		 918 struct ixgbe_hw *hw = &adapter->hw;
919
5f3600eb 920 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, qmask);
92915f71
GR		 921}
922
6d9c0217
ET		 923static struct sk_buff *ixgbevf_build_skb(struct ixgbevf_ring *rx_ring,
924 struct ixgbevf_rx_buffer *rx_buffer,
c7aec596
TN		 925 struct xdp_buff *xdp,
926 union ixgbe_adv_rx_desc *rx_desc)
6d9c0217 927{
be833332 928 unsigned int metasize = xdp->data - xdp->data_meta;
6d9c0217
ET		 929#if (PAGE_SIZE < 8192)
930 unsigned int truesize = ixgbevf_rx_pg_size(rx_ring) / 2;
931#else
932 unsigned int truesize = SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) +
c7aec596
TN		 933 SKB_DATA_ALIGN(xdp->data_end -
934 xdp->data_hard_start);
6d9c0217
ET		 935#endif
936 struct sk_buff *skb;
937
be833332
TN		 938 /* Prefetch first cache line of first page. If xdp->data_meta
939 * is unused, this points to xdp->data, otherwise, we likely
940 * have a consumer accessing first few bytes of meta data,
941 * and then actual data.
942 */
f468f21b 943 net_prefetch(xdp->data_meta);
6d9c0217 944
c7aec596 945 /* build an skb around the page buffer */
c1550019 946 skb = napi_build_skb(xdp->data_hard_start, truesize);
6d9c0217
ET		 947 if (unlikely(!skb))
948 return NULL;
949
950 /* update pointers within the skb to store the data */
c7aec596
TN		 951 skb_reserve(skb, xdp->data - xdp->data_hard_start);
952 __skb_put(skb, xdp->data_end - xdp->data);
be833332
TN		 953 if (metasize)
954 skb_metadata_set(skb, metasize);
6d9c0217
ET		 955
956 /* update buffer offset */
957#if (PAGE_SIZE < 8192)
958 rx_buffer->page_offset ^= truesize;
959#else
960 rx_buffer->page_offset += truesize;
961#endif
962
963 return skb;
964}
c7aec596
TN		 965
966#define IXGBEVF_XDP_PASS 0
967#define IXGBEVF_XDP_CONSUMED 1
21092e9c
TN		 968#define IXGBEVF_XDP_TX 2
969
970static int ixgbevf_xmit_xdp_ring(struct ixgbevf_ring *ring,
971 struct xdp_buff *xdp)
972{
973 struct ixgbevf_tx_buffer *tx_buffer;
974 union ixgbe_adv_tx_desc *tx_desc;
975 u32 len, cmd_type;
976 dma_addr_t dma;
977 u16 i;
978
979 len = xdp->data_end - xdp->data;
c7aec596 980
21092e9c
TN		 981 if (unlikely(!ixgbevf_desc_unused(ring)))
982 return IXGBEVF_XDP_CONSUMED;
983
984 dma = dma_map_single(ring->dev, xdp->data, len, DMA_TO_DEVICE);
985 if (dma_mapping_error(ring->dev, dma))
986 return IXGBEVF_XDP_CONSUMED;
987
988 /* record the location of the first descriptor for this packet */
21092e9c 989 i = ring->next_to_use;
4be87727 990 tx_buffer = &ring->tx_buffer_info[i];
21092e9c
TN		 991
992 dma_unmap_len_set(tx_buffer, len, len);
993 dma_unmap_addr_set(tx_buffer, dma, dma);
994 tx_buffer->data = xdp->data;
4be87727
AD		 995 tx_buffer->bytecount = len;
996 tx_buffer->gso_segs = 1;
997 tx_buffer->protocol = 0;
998
999 /* Populate minimal context descriptor that will provide for the
1000 * fact that we are expected to process Ethernet frames.
1001 */
1002 if (!test_bit(__IXGBEVF_TX_XDP_RING_PRIMED, &ring->state)) {
1003 struct ixgbe_adv_tx_context_desc *context_desc;
1004
1005 set_bit(__IXGBEVF_TX_XDP_RING_PRIMED, &ring->state);
1006
1007 context_desc = IXGBEVF_TX_CTXTDESC(ring, 0);
1008 context_desc->vlan_macip_lens =
1009 cpu_to_le32(ETH_HLEN << IXGBE_ADVTXD_MACLEN_SHIFT);
7f68d430 1010 context_desc->fceof_saidx = 0;
4be87727
AD		 1011 context_desc->type_tucmd_mlhl =
1012 cpu_to_le32(IXGBE_TXD_CMD_DEXT |
1013 IXGBE_ADVTXD_DTYP_CTXT);
1014 context_desc->mss_l4len_idx = 0;
1015
1016 i = 1;
1017 }
21092e9c
TN		 1018
1019 /* put descriptor type bits */
1020 cmd_type = IXGBE_ADVTXD_DTYP_DATA |
1021 IXGBE_ADVTXD_DCMD_DEXT |
1022 IXGBE_ADVTXD_DCMD_IFCS;
1023 cmd_type |= len | IXGBE_TXD_CMD;
4be87727
AD		 1024
1025 tx_desc = IXGBEVF_TX_DESC(ring, i);
1026 tx_desc->read.buffer_addr = cpu_to_le64(dma);
1027
21092e9c
TN		 1028 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
1029 tx_desc->read.olinfo_status =
1030 cpu_to_le32((len << IXGBE_ADVTXD_PAYLEN_SHIFT) |
1031 IXGBE_ADVTXD_CC);
1032
efecfd5f
TN		 1033 /* Avoid any potential race with cleanup */
1034 smp_wmb();
21092e9c
TN		 1035
1036 /* set next_to_watch value indicating a packet is present */
1037 i++;
1038 if (i == ring->count)
1039 i = 0;
1040
1041 tx_buffer->next_to_watch = tx_desc;
1042 ring->next_to_use = i;
1043
21092e9c
TN		 1044 return IXGBEVF_XDP_TX;
1045}
1046
1047static struct sk_buff *ixgbevf_run_xdp(struct ixgbevf_adapter *adapter,
1048 struct ixgbevf_ring *rx_ring,
c7aec596
TN		 1049 struct xdp_buff *xdp)
1050{
1051 int result = IXGBEVF_XDP_PASS;
21092e9c 1052 struct ixgbevf_ring *xdp_ring;
c7aec596
TN		 1053 struct bpf_prog *xdp_prog;
1054 u32 act;
1055
c7aec596
TN		 1056 xdp_prog = READ_ONCE(rx_ring->xdp_prog);
1057
1058 if (!xdp_prog)
1059 goto xdp_out;
1060
1061 act = bpf_prog_run_xdp(xdp_prog, xdp);
1062 switch (act) {
1063 case XDP_PASS:
1064 break;
21092e9c
TN		 1065 case XDP_TX:
1066 xdp_ring = adapter->xdp_ring[rx_ring->queue_index];
1067 result = ixgbevf_xmit_xdp_ring(xdp_ring, xdp);
faae8142
MK		 1068 if (result == IXGBEVF_XDP_CONSUMED)
1069 goto out_failure;
21092e9c 1070 break;
c7aec596 1071 default:
c8064e5b 1072 bpf_warn_invalid_xdp_action(rx_ring->netdev, xdp_prog, act);
5463fce6 1073 fallthrough;
c7aec596 1074 case XDP_ABORTED:
faae8142 1075out_failure:
c7aec596 1076 trace_xdp_exception(rx_ring->netdev, xdp_prog, act);
5463fce6 1077 fallthrough; /* handle aborts by dropping packet */
c7aec596
TN		 1078 case XDP_DROP:
1079 result = IXGBEVF_XDP_CONSUMED;
1080 break;
1081 }
1082xdp_out:
c7aec596
TN		 1083 return ERR_PTR(-result);
1084}
1085
81f3c628
JDB		 1086static unsigned int ixgbevf_rx_frame_truesize(struct ixgbevf_ring *rx_ring,
1087 unsigned int size)
1088{
1089 unsigned int truesize;
1090
1091#if (PAGE_SIZE < 8192)
1092 truesize = ixgbevf_rx_pg_size(rx_ring) / 2; /* Must be power-of-2 */
1093#else
1094 truesize = ring_uses_build_skb(rx_ring) ?
1095 SKB_DATA_ALIGN(IXGBEVF_SKB_PAD + size) +
1096 SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) :
1097 SKB_DATA_ALIGN(size);
1098#endif
1099 return truesize;
1100}
1101
21092e9c
TN		 1102static void ixgbevf_rx_buffer_flip(struct ixgbevf_ring *rx_ring,
1103 struct ixgbevf_rx_buffer *rx_buffer,
1104 unsigned int size)
1105{
81f3c628 1106 unsigned int truesize = ixgbevf_rx_frame_truesize(rx_ring, size);
21092e9c 1107
81f3c628 1108#if (PAGE_SIZE < 8192)
21092e9c
TN		 1109 rx_buffer->page_offset ^= truesize;
1110#else
21092e9c
TN		 1111 rx_buffer->page_offset += truesize;
1112#endif
1113}
1114
08e50a20
JK		 1115static int ixgbevf_clean_rx_irq(struct ixgbevf_q_vector *q_vector,
1116 struct ixgbevf_ring *rx_ring,
1117 int budget)
92915f71 1118{
43b5169d 1119 unsigned int total_rx_bytes = 0, total_rx_packets = 0, frame_sz = 0;
21092e9c 1120 struct ixgbevf_adapter *adapter = q_vector->adapter;
bafa578f 1121 u16 cleaned_count = ixgbevf_desc_unused(rx_ring);
bad17234 1122 struct sk_buff *skb = rx_ring->skb;
efecfd5f 1123 bool xdp_xmit = false;
c7aec596
TN		 1124 struct xdp_buff xdp;
1125
81f3c628
JDB		 1126 /* Frame size depend on rx_ring setup when PAGE_SIZE=4K */
1127#if (PAGE_SIZE < 8192)
43b5169d 1128 frame_sz = ixgbevf_rx_frame_truesize(rx_ring, 0);
81f3c628 1129#endif
43b5169d 1130 xdp_init_buff(&xdp, frame_sz, &rx_ring->xdp_rxq);
81f3c628 1131
6622402a 1132 while (likely(total_rx_packets < budget)) {
925f5690 1133 struct ixgbevf_rx_buffer *rx_buffer;
c7aec596 1134 union ixgbe_adv_rx_desc *rx_desc;
925f5690 1135 unsigned int size;
b97fe3b1 1136
0579eefc
ET		 1137 /* return some buffers to hardware, one at a time is too slow */
1138 if (cleaned_count >= IXGBEVF_RX_BUFFER_WRITE) {
1139 ixgbevf_alloc_rx_buffers(rx_ring, cleaned_count);
1140 cleaned_count = 0;
1141 }
1142
bad17234 1143 rx_desc = IXGBEVF_RX_DESC(rx_ring, rx_ring->next_to_clean);
925f5690
ET		 1144 size = le16_to_cpu(rx_desc->wb.upper.length);
1145 if (!size)
92915f71 1146 break;
92915f71 1147
0579eefc
ET		 1148 /* This memory barrier is needed to keep us from reading
1149 * any other fields out of the rx_desc until we know the
1150 * RXD_STAT_DD bit is set
1151 */
1152 rmb();
ec62fe26 1153
925f5690
ET		 1154 rx_buffer = ixgbevf_get_rx_buffer(rx_ring, size);
1155
bad17234 1156 /* retrieve a buffer from the ring */
c7aec596 1157 if (!skb) {
be9df4af
LB		 1158 unsigned int offset = ixgbevf_rx_offset(rx_ring);
1159 unsigned char *hard_start;
1160
1161 hard_start = page_address(rx_buffer->page) +
1162 rx_buffer->page_offset - offset;
1163 xdp_prepare_buff(&xdp, hard_start, offset, size, true);
81f3c628
JDB		 1164#if (PAGE_SIZE > 4096)
1165 /* At larger PAGE_SIZE, frame_sz depend on len size */
1166 xdp.frame_sz = ixgbevf_rx_frame_truesize(rx_ring, size);
1167#endif
21092e9c 1168 skb = ixgbevf_run_xdp(adapter, rx_ring, &xdp);
c7aec596
TN		 1169 }
1170
1171 if (IS_ERR(skb)) {
efecfd5f
TN		 1172 if (PTR_ERR(skb) == -IXGBEVF_XDP_TX) {
1173 xdp_xmit = true;
21092e9c
TN		 1174 ixgbevf_rx_buffer_flip(rx_ring, rx_buffer,
1175 size);
efecfd5f 1176 } else {
21092e9c 1177 rx_buffer->pagecnt_bias++;
efecfd5f 1178 }
c7aec596
TN		 1179 total_rx_packets++;
1180 total_rx_bytes += size;
c7aec596 1181 } else if (skb) {
925f5690 1182 ixgbevf_add_rx_frag(rx_ring, rx_buffer, skb, size);
c7aec596 1183 } else if (ring_uses_build_skb(rx_ring)) {
6d9c0217 1184 skb = ixgbevf_build_skb(rx_ring, rx_buffer,
c7aec596
TN		 1185 &xdp, rx_desc);
1186 } else {
925f5690 1187 skb = ixgbevf_construct_skb(rx_ring, rx_buffer,
c7aec596
TN		 1188 &xdp, rx_desc);
1189 }
0579eefc 1190
bad17234 1191 /* exit if we failed to retrieve a buffer */
2a35efe5
ET		 1192 if (!skb) {
1193 rx_ring->rx_stats.alloc_rx_buff_failed++;
925f5690 1194 rx_buffer->pagecnt_bias++;
bad17234 1195 break;
2a35efe5 1196 }
92915f71 1197
c7aec596 1198 ixgbevf_put_rx_buffer(rx_ring, rx_buffer, skb);
b97fe3b1
ET		 1199 cleaned_count++;
1200
bad17234
ET		 1201 /* fetch next buffer in frame if non-eop */
1202 if (ixgbevf_is_non_eop(rx_ring, rx_desc))
0579eefc 1203 continue;
5c60f81a 1204
bad17234
ET		 1205 /* verify the packet layout is correct */
1206 if (ixgbevf_cleanup_headers(rx_ring, rx_desc, skb)) {
1207 skb = NULL;
0579eefc 1208 continue;
92915f71
GR		 1209 }
1210
92915f71
GR		 1211 /* probably a little skewed due to removing CRC */
1212 total_rx_bytes += skb->len;
92915f71 1213
815cccbf
JF		 1214 /* Workaround hardware that can't do proper VEPA multicast
1215 * source pruning.
1216 */
bd9d5592 1217 if ((skb->pkt_type == PACKET_BROADCAST ||
dec0d8e4 1218 skb->pkt_type == PACKET_MULTICAST) &&
095e2617 1219 ether_addr_equal(rx_ring->netdev->dev_addr,
7367d0b5 1220 eth_hdr(skb)->h_source)) {
815cccbf 1221 dev_kfree_skb_irq(skb);
0579eefc 1222 continue;
815cccbf
JF		 1223 }
1224
dff80520
ET		 1225 /* populate checksum, VLAN, and protocol */
1226 ixgbevf_process_skb_fields(rx_ring, rx_desc, skb);
1227
1228 ixgbevf_rx_skb(q_vector, skb);
92915f71 1229
bad17234
ET		 1230 /* reset skb pointer */
1231 skb = NULL;
1232
0579eefc 1233 /* update budget accounting */
6622402a
ET		 1234 total_rx_packets++;
1235 }
92915f71 1236
bad17234
ET		 1237 /* place incomplete frames back on ring for completion */
1238 rx_ring->skb = skb;
1239
efecfd5f
TN		 1240 if (xdp_xmit) {
1241 struct ixgbevf_ring *xdp_ring =
1242 adapter->xdp_ring[rx_ring->queue_index];
1243
1244 /* Force memory writes to complete before letting h/w
1245 * know there are new descriptors to fetch.
1246 */
1247 wmb();
1248 ixgbevf_write_tail(xdp_ring, xdp_ring->next_to_use);
1249 }
1250
4197aa7b 1251 u64_stats_update_begin(&rx_ring->syncp);
095e2617
ET		 1252 rx_ring->stats.packets += total_rx_packets;
1253 rx_ring->stats.bytes += total_rx_bytes;
4197aa7b 1254 u64_stats_update_end(&rx_ring->syncp);
ac6ed8f0
GR		 1255 q_vector->rx.total_packets += total_rx_packets;
1256 q_vector->rx.total_bytes += total_rx_bytes;
92915f71 1257
08e50a20 1258 return total_rx_packets;
92915f71
GR		 1259}
1260
1261/**
fa71ae27 1262 * ixgbevf_poll - NAPI polling calback
92915f71
GR		 1263 * @napi: napi struct with our devices info in it
1264 * @budget: amount of work driver is allowed to do this pass, in packets
1265 *
fa71ae27 1266 * This function will clean more than one or more rings associated with a
92915f71
GR		 1267 * q_vector.
1268 **/
fa71ae27 1269static int ixgbevf_poll(struct napi_struct *napi, int budget)
92915f71
GR		 1270{
1271 struct ixgbevf_q_vector *q_vector =
1272 container_of(napi, struct ixgbevf_q_vector, napi);
1273 struct ixgbevf_adapter *adapter = q_vector->adapter;
fa71ae27 1274 struct ixgbevf_ring *ring;
32b3e08f 1275 int per_ring_budget, work_done = 0;
fa71ae27
AD		 1276 bool clean_complete = true;
1277
8220bbc1
AD		 1278 ixgbevf_for_each_ring(ring, q_vector->tx) {
1279 if (!ixgbevf_clean_tx_irq(q_vector, ring, budget))
1280 clean_complete = false;
1281 }
92915f71 1282
d0f71aff
WD		 1283 if (budget <= 0)
1284 return budget;
c777cdfa 1285
92915f71 1286 /* attempt to distribute budget to each queue fairly, but don't allow
dec0d8e4
JK		 1287 * the budget to go below 1 because we'll exit polling
1288 */
fa71ae27
AD		 1289 if (q_vector->rx.count > 1)
1290 per_ring_budget = max(budget/q_vector->rx.count, 1);
1291 else
1292 per_ring_budget = budget;
1293
32b3e08f
JB		 1294 ixgbevf_for_each_ring(ring, q_vector->rx) {
1295 int cleaned = ixgbevf_clean_rx_irq(q_vector, ring,
1296 per_ring_budget);
1297 work_done += cleaned;
8220bbc1
AD		 1298 if (cleaned >= per_ring_budget)
1299 clean_complete = false;
32b3e08f 1300 }
fa71ae27
AD		 1301
1302 /* If all work not completed, return budget and keep polling */
1303 if (!clean_complete)
1304 return budget;
92915f71 1305
0bcd952f
JB		 1306 /* Exit the polling mode, but don't re-enable interrupts if stack might
1307 * poll us due to busy-polling
1308 */
1309 if (likely(napi_complete_done(napi, work_done))) {
1310 if (adapter->rx_itr_setting == 1)
1311 ixgbevf_set_itr(q_vector);
1312 if (!test_bit(__IXGBEVF_DOWN, &adapter->state) &&
1313 !test_bit(__IXGBEVF_REMOVING, &adapter->state))
1314 ixgbevf_irq_enable_queues(adapter,
1315 BIT(q_vector->v_idx));
1316 }
1317
1318 return min(work_done, budget - 1);
92915f71
GR		 1319}
1320
ce422606
GR		 1321/**
1322 * ixgbevf_write_eitr - write VTEITR register in hardware specific way
1323 * @q_vector: structure containing interrupt and ring information
dec0d8e4 1324 **/
3849623e 1325void ixgbevf_write_eitr(struct ixgbevf_q_vector *q_vector)
ce422606
GR		 1326{
1327 struct ixgbevf_adapter *adapter = q_vector->adapter;
1328 struct ixgbe_hw *hw = &adapter->hw;
1329 int v_idx = q_vector->v_idx;
1330 u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
1331
dec0d8e4 1332 /* set the WDIS bit to not clear the timer bits and cause an
ce422606
GR		 1333 * immediate assertion of the interrupt
1334 */
1335 itr_reg |= IXGBE_EITR_CNT_WDIS;
1336
1337 IXGBE_WRITE_REG(hw, IXGBE_VTEITR(v_idx), itr_reg);
1338}
92915f71
GR		 1339
1340/**
1341 * ixgbevf_configure_msix - Configure MSI-X hardware
1342 * @adapter: board private structure
1343 *
1344 * ixgbevf_configure_msix sets up the hardware to properly generate MSI-X
1345 * interrupts.
1346 **/
1347static void ixgbevf_configure_msix(struct ixgbevf_adapter *adapter)
1348{
1349 struct ixgbevf_q_vector *q_vector;
6b43c446 1350 int q_vectors, v_idx;
92915f71
GR		 1351
1352 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
5f3600eb 1353 adapter->eims_enable_mask = 0;
92915f71 1354
dec0d8e4 1355 /* Populate the IVAR table and set the ITR values to the
92915f71
GR		 1356 * corresponding register.
1357 */
1358 for (v_idx = 0; v_idx < q_vectors; v_idx++) {
6b43c446 1359 struct ixgbevf_ring *ring;
dec0d8e4 1360
92915f71 1361 q_vector = adapter->q_vector[v_idx];
6b43c446
AD		 1362
1363 ixgbevf_for_each_ring(ring, q_vector->rx)
1364 ixgbevf_set_ivar(adapter, 0, ring->reg_idx, v_idx);
1365
1366 ixgbevf_for_each_ring(ring, q_vector->tx)
1367 ixgbevf_set_ivar(adapter, 1, ring->reg_idx, v_idx);
92915f71 1368
5f3600eb 1369 if (q_vector->tx.ring && !q_vector->rx.ring) {
dec0d8e4 1370 /* Tx only vector */
5f3600eb 1371 if (adapter->tx_itr_setting == 1)
8a9ca110 1372 q_vector->itr = IXGBE_12K_ITR;
5f3600eb
AD		 1373 else
1374 q_vector->itr = adapter->tx_itr_setting;
1375 } else {
dec0d8e4 1376 /* Rx or Rx/Tx vector */
5f3600eb
AD		 1377 if (adapter->rx_itr_setting == 1)
1378 q_vector->itr = IXGBE_20K_ITR;
1379 else
1380 q_vector->itr = adapter->rx_itr_setting;
1381 }
1382
1383 /* add q_vector eims value to global eims_enable_mask */
8d055cc0 1384 adapter->eims_enable_mask |= BIT(v_idx);
92915f71 1385
5f3600eb 1386 ixgbevf_write_eitr(q_vector);
92915f71
GR		 1387 }
1388
1389 ixgbevf_set_ivar(adapter, -1, 1, v_idx);
5f3600eb 1390 /* setup eims_other and add value to global eims_enable_mask */
8d055cc0 1391 adapter->eims_other = BIT(v_idx);
5f3600eb 1392 adapter->eims_enable_mask |= adapter->eims_other;
92915f71
GR		 1393}
1394
1395enum latency_range {
1396 lowest_latency = 0,
1397 low_latency = 1,
1398 bulk_latency = 2,
1399 latency_invalid = 255
1400};
1401
1402/**
1403 * ixgbevf_update_itr - update the dynamic ITR value based on statistics
5f3600eb
AD		 1404 * @q_vector: structure containing interrupt and ring information
1405 * @ring_container: structure containing ring performance data
92915f71 1406 *
dec0d8e4
JK		 1407 * Stores a new ITR value based on packets and byte
1408 * counts during the last interrupt. The advantage of per interrupt
1409 * computation is faster updates and more accurate ITR for the current
1410 * traffic pattern. Constants in this function were computed
1411 * based on theoretical maximum wire speed and thresholds were set based
1412 * on testing data as well as attempting to minimize response time
1413 * while increasing bulk throughput.
92915f71 1414 **/
5f3600eb
AD		 1415static void ixgbevf_update_itr(struct ixgbevf_q_vector *q_vector,
1416 struct ixgbevf_ring_container *ring_container)
92915f71 1417{
5f3600eb
AD		 1418 int bytes = ring_container->total_bytes;
1419 int packets = ring_container->total_packets;
92915f71
GR		 1420 u32 timepassed_us;
1421 u64 bytes_perint;
5f3600eb 1422 u8 itr_setting = ring_container->itr;
92915f71
GR		 1423
1424 if (packets == 0)
5f3600eb 1425 return;
92915f71 1426
dec0d8e4 1427 /* simple throttle rate management
92915f71
GR		 1428 * 0-20MB/s lowest (100000 ints/s)
1429 * 20-100MB/s low (20000 ints/s)
8a9ca110 1430 * 100-1249MB/s bulk (12000 ints/s)
92915f71
GR		 1431 */
1432 /* what was last interrupt timeslice? */
5f3600eb 1433 timepassed_us = q_vector->itr >> 2;
e0f0be7d
YX		 1434 if (timepassed_us == 0)
1435 return;
1436
92915f71
GR		 1437 bytes_perint = bytes / timepassed_us; /* bytes/usec */
1438
1439 switch (itr_setting) {
1440 case lowest_latency:
e2c28ce7 1441 if (bytes_perint > 10)
5f3600eb 1442 itr_setting = low_latency;
92915f71
GR		 1443 break;
1444 case low_latency:
e2c28ce7 1445 if (bytes_perint > 20)
5f3600eb 1446 itr_setting = bulk_latency;
e2c28ce7 1447 else if (bytes_perint <= 10)
5f3600eb 1448 itr_setting = lowest_latency;
92915f71
GR		 1449 break;
1450 case bulk_latency:
e2c28ce7 1451 if (bytes_perint <= 20)
5f3600eb 1452 itr_setting = low_latency;
92915f71
GR		 1453 break;
1454 }
1455
5f3600eb
AD		 1456 /* clear work counters since we have the values we need */
1457 ring_container->total_bytes = 0;
1458 ring_container->total_packets = 0;
1459
1460 /* write updated itr to ring container */
1461 ring_container->itr = itr_setting;
92915f71
GR		 1462}
1463
fa71ae27 1464static void ixgbevf_set_itr(struct ixgbevf_q_vector *q_vector)
92915f71 1465{
5f3600eb
AD		 1466 u32 new_itr = q_vector->itr;
1467 u8 current_itr;
92915f71 1468
5f3600eb
AD		 1469 ixgbevf_update_itr(q_vector, &q_vector->tx);
1470 ixgbevf_update_itr(q_vector, &q_vector->rx);
92915f71 1471
6b43c446 1472 current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
92915f71
GR		 1473
1474 switch (current_itr) {
1475 /* counts and packets in update_itr are dependent on these numbers */
1476 case lowest_latency:
5f3600eb 1477 new_itr = IXGBE_100K_ITR;
92915f71
GR		 1478 break;
1479 case low_latency:
5f3600eb 1480 new_itr = IXGBE_20K_ITR;
92915f71
GR		 1481 break;
1482 case bulk_latency:
8a9ca110 1483 new_itr = IXGBE_12K_ITR;
92915f71 1484 break;
9ad3d6f7
ET		 1485 default:
1486 break;
92915f71
GR		 1487 }
1488
5f3600eb 1489 if (new_itr != q_vector->itr) {
92915f71 1490 /* do an exponential smoothing */
5f3600eb
AD		 1491 new_itr = (10 * new_itr * q_vector->itr) /
1492 ((9 * new_itr) + q_vector->itr);
1493
1494 /* save the algorithm value here */
1495 q_vector->itr = new_itr;
1496
1497 ixgbevf_write_eitr(q_vector);
92915f71 1498 }
92915f71
GR		 1499}
1500
4b2cd27f 1501static irqreturn_t ixgbevf_msix_other(int irq, void *data)
92915f71 1502{
fa71ae27 1503 struct ixgbevf_adapter *adapter = data;
92915f71 1504 struct ixgbe_hw *hw = &adapter->hw;
08259594 1505
4b2cd27f 1506 hw->mac.get_link_status = 1;
1e72bfc3 1507
9ac5c5cc 1508 ixgbevf_service_event_schedule(adapter);
3a2c4033 1509
5f3600eb
AD		 1510 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, adapter->eims_other);
1511
92915f71
GR		 1512 return IRQ_HANDLED;
1513}
1514
92915f71 1515/**
fa71ae27 1516 * ixgbevf_msix_clean_rings - single unshared vector rx clean (all queues)
92915f71
GR		 1517 * @irq: unused
1518 * @data: pointer to our q_vector struct for this interrupt vector
1519 **/
fa71ae27 1520static irqreturn_t ixgbevf_msix_clean_rings(int irq, void *data)
92915f71
GR		 1521{
1522 struct ixgbevf_q_vector *q_vector = data;
92915f71 1523
5f3600eb 1524 /* EIAM disabled interrupts (on this vector) for us */
fa71ae27 1525 if (q_vector->rx.ring || q_vector->tx.ring)
ef2662b2 1526 napi_schedule_irqoff(&q_vector->napi);
92915f71
GR		 1527
1528 return IRQ_HANDLED;
1529}
1530
92915f71
GR		 1531/**
1532 * ixgbevf_request_msix_irqs - Initialize MSI-X interrupts
1533 * @adapter: board private structure
1534 *
1535 * ixgbevf_request_msix_irqs allocates MSI-X vectors and requests
1536 * interrupts from the kernel.
1537 **/
1538static int ixgbevf_request_msix_irqs(struct ixgbevf_adapter *adapter)
1539{
1540 struct net_device *netdev = adapter->netdev;
fa71ae27 1541 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
31f5d9b1 1542 unsigned int ri = 0, ti = 0;
fa71ae27 1543 int vector, err;
92915f71 1544
92915f71 1545 for (vector = 0; vector < q_vectors; vector++) {
fa71ae27
AD		 1546 struct ixgbevf_q_vector *q_vector = adapter->q_vector[vector];
1547 struct msix_entry *entry = &adapter->msix_entries[vector];
1548
1549 if (q_vector->tx.ring && q_vector->rx.ring) {
31f5d9b1
TN		 1550 snprintf(q_vector->name, sizeof(q_vector->name),
1551 "%s-TxRx-%u", netdev->name, ri++);
fa71ae27
AD		 1552 ti++;
1553 } else if (q_vector->rx.ring) {
31f5d9b1
TN		 1554 snprintf(q_vector->name, sizeof(q_vector->name),
1555 "%s-rx-%u", netdev->name, ri++);
fa71ae27 1556 } else if (q_vector->tx.ring) {
31f5d9b1
TN		 1557 snprintf(q_vector->name, sizeof(q_vector->name),
1558 "%s-tx-%u", netdev->name, ti++);
92915f71
GR		 1559 } else {
1560 /* skip this unused q_vector */
1561 continue;
1562 }
fa71ae27
AD		 1563 err = request_irq(entry->vector, &ixgbevf_msix_clean_rings, 0,
1564 q_vector->name, q_vector);
92915f71
GR		 1565 if (err) {
1566 hw_dbg(&adapter->hw,
dec0d8e4
JK		 1567 "request_irq failed for MSIX interrupt Error: %d\n",
1568 err);
92915f71
GR		 1569 goto free_queue_irqs;
1570 }
1571 }
1572
92915f71 1573 err = request_irq(adapter->msix_entries[vector].vector,
4b2cd27f 1574 &ixgbevf_msix_other, 0, netdev->name, adapter);
92915f71 1575 if (err) {
dec0d8e4
JK		 1576 hw_dbg(&adapter->hw, "request_irq for msix_other failed: %d\n",
1577 err);
92915f71
GR		 1578 goto free_queue_irqs;
1579 }
1580
1581 return 0;
1582
1583free_queue_irqs:
fa71ae27
AD		 1584 while (vector) {
1585 vector--;
1586 free_irq(adapter->msix_entries[vector].vector,
1587 adapter->q_vector[vector]);
1588 }
a1f6c6b1 1589 /* This failure is non-recoverable - it indicates the system is
1590 * out of MSIX vector resources and the VF driver cannot run
1591 * without them. Set the number of msix vectors to zero
1592 * indicating that not enough can be allocated. The error
1593 * will be returned to the user indicating device open failed.
1594 * Any further attempts to force the driver to open will also
1595 * fail. The only way to recover is to unload the driver and
1596 * reload it again. If the system has recovered some MSIX
1597 * vectors then it may succeed.
1598 */
1599 adapter->num_msix_vectors = 0;
92915f71
GR		 1600 return err;
1601}
1602
92915f71
GR		 1603/**
1604 * ixgbevf_request_irq - initialize interrupts
1605 * @adapter: board private structure
1606 *
1607 * Attempts to configure interrupts using the best available
1608 * capabilities of the hardware and kernel.
1609 **/
1610static int ixgbevf_request_irq(struct ixgbevf_adapter *adapter)
1611{
50985b5f 1612 int err = ixgbevf_request_msix_irqs(adapter);
92915f71
GR		 1613
1614 if (err)
dec0d8e4 1615 hw_dbg(&adapter->hw, "request_irq failed, Error %d\n", err);
92915f71
GR		 1616
1617 return err;
1618}
1619
1620static void ixgbevf_free_irq(struct ixgbevf_adapter *adapter)
1621{
92915f71
GR		 1622 int i, q_vectors;
1623
eeffceee
MR		 1624 if (!adapter->msix_entries)
1625 return;
1626
92915f71 1627 q_vectors = adapter->num_msix_vectors;
92915f71
GR		 1628 i = q_vectors - 1;
1629
fa71ae27 1630 free_irq(adapter->msix_entries[i].vector, adapter);
92915f71
GR		 1631 i--;
1632
1633 for (; i >= 0; i--) {
fa71ae27
AD		 1634 /* free only the irqs that were actually requested */
1635 if (!adapter->q_vector[i]->rx.ring &&
1636 !adapter->q_vector[i]->tx.ring)
1637 continue;
1638
92915f71
GR		 1639 free_irq(adapter->msix_entries[i].vector,
1640 adapter->q_vector[i]);
1641 }
92915f71
GR		 1642}
1643
1644/**
1645 * ixgbevf_irq_disable - Mask off interrupt generation on the NIC
1646 * @adapter: board private structure
1647 **/
1648static inline void ixgbevf_irq_disable(struct ixgbevf_adapter *adapter)
1649{
92915f71 1650 struct ixgbe_hw *hw = &adapter->hw;
5f3600eb 1651 int i;
92915f71 1652
5f3600eb 1653 IXGBE_WRITE_REG(hw, IXGBE_VTEIAM, 0);
92915f71 1654 IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, ~0);
5f3600eb 1655 IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, 0);
92915f71
GR		 1656
1657 IXGBE_WRITE_FLUSH(hw);
1658
1659 for (i = 0; i < adapter->num_msix_vectors; i++)
1660 synchronize_irq(adapter->msix_entries[i].vector);
1661}
1662
1663/**
1664 * ixgbevf_irq_enable - Enable default interrupt generation settings
1665 * @adapter: board private structure
1666 **/
5f3600eb 1667static inline void ixgbevf_irq_enable(struct ixgbevf_adapter *adapter)
92915f71
GR		 1668{
1669 struct ixgbe_hw *hw = &adapter->hw;
92915f71 1670
5f3600eb
AD		 1671 IXGBE_WRITE_REG(hw, IXGBE_VTEIAM, adapter->eims_enable_mask);
1672 IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, adapter->eims_enable_mask);
1673 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, adapter->eims_enable_mask);
92915f71
GR		 1674}
1675
de02decb
DS		 1676/**
1677 * ixgbevf_configure_tx_ring - Configure 82599 VF Tx ring after Reset
1678 * @adapter: board private structure
1679 * @ring: structure containing ring specific data
1680 *
1681 * Configure the Tx descriptor ring after a reset.
1682 **/
1683static void ixgbevf_configure_tx_ring(struct ixgbevf_adapter *adapter,
1684 struct ixgbevf_ring *ring)
1685{
1686 struct ixgbe_hw *hw = &adapter->hw;
1687 u64 tdba = ring->dma;
1688 int wait_loop = 10;
1689 u32 txdctl = IXGBE_TXDCTL_ENABLE;
1690 u8 reg_idx = ring->reg_idx;
1691
1692 /* disable queue to avoid issues while updating state */
1693 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
1694 IXGBE_WRITE_FLUSH(hw);
1695
1696 IXGBE_WRITE_REG(hw, IXGBE_VFTDBAL(reg_idx), tdba & DMA_BIT_MASK(32));
1697 IXGBE_WRITE_REG(hw, IXGBE_VFTDBAH(reg_idx), tdba >> 32);
1698 IXGBE_WRITE_REG(hw, IXGBE_VFTDLEN(reg_idx),
1699 ring->count * sizeof(union ixgbe_adv_tx_desc));
1700
1701 /* disable head writeback */
1702 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAH(reg_idx), 0);
1703 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAL(reg_idx), 0);
1704
1705 /* enable relaxed ordering */
1706 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(reg_idx),
1707 (IXGBE_DCA_TXCTRL_DESC_RRO_EN |
1708 IXGBE_DCA_TXCTRL_DATA_RRO_EN));
1709
1710 /* reset head and tail pointers */
1711 IXGBE_WRITE_REG(hw, IXGBE_VFTDH(reg_idx), 0);
1712 IXGBE_WRITE_REG(hw, IXGBE_VFTDT(reg_idx), 0);
dbf8b0d8 1713 ring->tail = adapter->io_addr + IXGBE_VFTDT(reg_idx);
de02decb
DS		 1714
1715 /* reset ntu and ntc to place SW in sync with hardwdare */
1716 ring->next_to_clean = 0;
1717 ring->next_to_use = 0;
1718
1719 /* In order to avoid issues WTHRESH + PTHRESH should always be equal
1720 * to or less than the number of on chip descriptors, which is
1721 * currently 40.
1722 */
1723 txdctl |= (8 << 16); /* WTHRESH = 8 */
1724
1725 /* Setting PTHRESH to 32 both improves performance */
8d055cc0
JK		 1726 txdctl |= (1u << 8) | /* HTHRESH = 1 */
1727 32; /* PTHRESH = 32 */
de02decb 1728
865a4d98
ET		 1729 /* reinitialize tx_buffer_info */
1730 memset(ring->tx_buffer_info, 0,
1731 sizeof(struct ixgbevf_tx_buffer) * ring->count);
1732
e08400b7 1733 clear_bit(__IXGBEVF_HANG_CHECK_ARMED, &ring->state);
4be87727 1734 clear_bit(__IXGBEVF_TX_XDP_RING_PRIMED, &ring->state);
e08400b7 1735
de02decb
DS		 1736 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx), txdctl);
1737
1738 /* poll to verify queue is enabled */
1739 do {
1740 usleep_range(1000, 2000);
1741 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(reg_idx));
1742 } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
1743 if (!wait_loop)
ee95053f 1744 hw_dbg(hw, "Could not enable Tx Queue %d\n", reg_idx);
de02decb
DS		 1745}
1746
92915f71
GR		 1747/**
1748 * ixgbevf_configure_tx - Configure 82599 VF Transmit Unit after Reset
1749 * @adapter: board private structure
1750 *
1751 * Configure the Tx unit of the MAC after a reset.
1752 **/
1753static void ixgbevf_configure_tx(struct ixgbevf_adapter *adapter)
1754{
de02decb 1755 u32 i;
92915f71
GR		 1756
1757 /* Setup the HW Tx Head and Tail descriptor pointers */
de02decb
DS		 1758 for (i = 0; i < adapter->num_tx_queues; i++)
1759 ixgbevf_configure_tx_ring(adapter, adapter->tx_ring[i]);
21092e9c
TN		 1760 for (i = 0; i < adapter->num_xdp_queues; i++)
1761 ixgbevf_configure_tx_ring(adapter, adapter->xdp_ring[i]);
92915f71
GR		 1762}
1763
1764#define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
1765
f15c5ba5
ET		 1766static void ixgbevf_configure_srrctl(struct ixgbevf_adapter *adapter,
1767 struct ixgbevf_ring *ring, int index)
92915f71 1768{
92915f71
GR		 1769 struct ixgbe_hw *hw = &adapter->hw;
1770 u32 srrctl;
1771
92915f71
GR		 1772 srrctl = IXGBE_SRRCTL_DROP_EN;
1773
bad17234 1774 srrctl |= IXGBEVF_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
f15c5ba5
ET		 1775 if (ring_uses_large_buffer(ring))
1776 srrctl |= IXGBEVF_RXBUFFER_3072 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1777 else
1778 srrctl |= IXGBEVF_RXBUFFER_2048 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
77d5dfca 1779 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
92915f71 1780
92915f71
GR		 1781 IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(index), srrctl);
1782}
1783
1bb9c639
DS		 1784static void ixgbevf_setup_psrtype(struct ixgbevf_adapter *adapter)
1785{
1786 struct ixgbe_hw *hw = &adapter->hw;
1787
1788 /* PSRTYPE must be initialized in 82599 */
1789 u32 psrtype = IXGBE_PSRTYPE_TCPHDR | IXGBE_PSRTYPE_UDPHDR |
1790 IXGBE_PSRTYPE_IPV4HDR | IXGBE_PSRTYPE_IPV6HDR |
1791 IXGBE_PSRTYPE_L2HDR;
1792
1793 if (adapter->num_rx_queues > 1)
8d055cc0 1794 psrtype |= BIT(29);
1bb9c639
DS		 1795
1796 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, psrtype);
1797}
1798
de02decb
DS		 1799#define IXGBEVF_MAX_RX_DESC_POLL 10
1800static void ixgbevf_disable_rx_queue(struct ixgbevf_adapter *adapter,
1801 struct ixgbevf_ring *ring)
1802{
1803 struct ixgbe_hw *hw = &adapter->hw;
1804 int wait_loop = IXGBEVF_MAX_RX_DESC_POLL;
1805 u32 rxdctl;
1806 u8 reg_idx = ring->reg_idx;
1807
26597802
MR		 1808 if (IXGBE_REMOVED(hw->hw_addr))
1809 return;
de02decb
DS		 1810 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
1811 rxdctl &= ~IXGBE_RXDCTL_ENABLE;
1812
1813 /* write value back with RXDCTL.ENABLE bit cleared */
1814 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(reg_idx), rxdctl);
1815
dec0d8e4 1816 /* the hardware may take up to 100us to really disable the Rx queue */
de02decb
DS		 1817 do {
1818 udelay(10);
1819 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
1820 } while (--wait_loop && (rxdctl & IXGBE_RXDCTL_ENABLE));
1821
1822 if (!wait_loop)
1823 pr_err("RXDCTL.ENABLE queue %d not cleared while polling\n",
1824 reg_idx);
1825}
1826
1827static void ixgbevf_rx_desc_queue_enable(struct ixgbevf_adapter *adapter,
1828 struct ixgbevf_ring *ring)
1829{
1830 struct ixgbe_hw *hw = &adapter->hw;
1831 int wait_loop = IXGBEVF_MAX_RX_DESC_POLL;
1832 u32 rxdctl;
1833 u8 reg_idx = ring->reg_idx;
1834
26597802
MR		 1835 if (IXGBE_REMOVED(hw->hw_addr))
1836 return;
de02decb
DS		 1837 do {
1838 usleep_range(1000, 2000);
1839 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
1840 } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
1841
1842 if (!wait_loop)
1843 pr_err("RXDCTL.ENABLE queue %d not set while polling\n",
1844 reg_idx);
1845}
1846
e60ae003
TN		 1847/**
1848 * ixgbevf_init_rss_key - Initialize adapter RSS key
1849 * @adapter: device handle
1850 *
1851 * Allocates and initializes the RSS key if it is not allocated.
1852 **/
1853static inline int ixgbevf_init_rss_key(struct ixgbevf_adapter *adapter)
1854{
1855 u32 *rss_key;
1856
1857 if (!adapter->rss_key) {
1858 rss_key = kzalloc(IXGBEVF_RSS_HASH_KEY_SIZE, GFP_KERNEL);
1859 if (unlikely(!rss_key))
1860 return -ENOMEM;
1861
1862 netdev_rss_key_fill(rss_key, IXGBEVF_RSS_HASH_KEY_SIZE);
1863 adapter->rss_key = rss_key;
1864 }
1865
1866 return 0;
1867}
1868
9295edb4
ET		 1869static void ixgbevf_setup_vfmrqc(struct ixgbevf_adapter *adapter)
1870{
1871 struct ixgbe_hw *hw = &adapter->hw;
1872 u32 vfmrqc = 0, vfreta = 0;
9295edb4 1873 u16 rss_i = adapter->num_rx_queues;
9cba434f 1874 u8 i, j;
9295edb4
ET		 1875
1876 /* Fill out hash function seeds */
9cba434f 1877 for (i = 0; i < IXGBEVF_VFRSSRK_REGS; i++)
e60ae003 1878 IXGBE_WRITE_REG(hw, IXGBE_VFRSSRK(i), *(adapter->rss_key + i));
9295edb4 1879
9cba434f 1880 for (i = 0, j = 0; i < IXGBEVF_X550_VFRETA_SIZE; i++, j++) {
9295edb4
ET		 1881 if (j == rss_i)
1882 j = 0;
9cba434f
ET		 1883
1884 adapter->rss_indir_tbl[i] = j;
1885
1886 vfreta |= j << (i & 0x3) * 8;
1887 if ((i & 3) == 3) {
9295edb4 1888 IXGBE_WRITE_REG(hw, IXGBE_VFRETA(i >> 2), vfreta);
9cba434f
ET		 1889 vfreta = 0;
1890 }
9295edb4
ET		 1891 }
1892
1893 /* Perform hash on these packet types */
1894 vfmrqc |= IXGBE_VFMRQC_RSS_FIELD_IPV4 |
1895 IXGBE_VFMRQC_RSS_FIELD_IPV4_TCP |
1896 IXGBE_VFMRQC_RSS_FIELD_IPV6 |
1897 IXGBE_VFMRQC_RSS_FIELD_IPV6_TCP;
1898
1899 vfmrqc |= IXGBE_VFMRQC_RSSEN;
1900
1901 IXGBE_WRITE_REG(hw, IXGBE_VFMRQC, vfmrqc);
1902}
1903
de02decb
DS		 1904static void ixgbevf_configure_rx_ring(struct ixgbevf_adapter *adapter,
1905 struct ixgbevf_ring *ring)
1906{
1907 struct ixgbe_hw *hw = &adapter->hw;
24bff091 1908 union ixgbe_adv_rx_desc *rx_desc;
de02decb
DS		 1909 u64 rdba = ring->dma;
1910 u32 rxdctl;
1911 u8 reg_idx = ring->reg_idx;
1912
1913 /* disable queue to avoid issues while updating state */
1914 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
1915 ixgbevf_disable_rx_queue(adapter, ring);
1916
1917 IXGBE_WRITE_REG(hw, IXGBE_VFRDBAL(reg_idx), rdba & DMA_BIT_MASK(32));
1918 IXGBE_WRITE_REG(hw, IXGBE_VFRDBAH(reg_idx), rdba >> 32);
1919 IXGBE_WRITE_REG(hw, IXGBE_VFRDLEN(reg_idx),
1920 ring->count * sizeof(union ixgbe_adv_rx_desc));
1921
33b0eb15 1922#ifndef CONFIG_SPARC
de02decb
DS		 1923 /* enable relaxed ordering */
1924 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_RXCTRL(reg_idx),
1925 IXGBE_DCA_RXCTRL_DESC_RRO_EN);
33b0eb15
BM		 1926#else
1927 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_RXCTRL(reg_idx),
1928 IXGBE_DCA_RXCTRL_DESC_RRO_EN |
1929 IXGBE_DCA_RXCTRL_DATA_WRO_EN);
1930#endif
de02decb
DS		 1931
1932 /* reset head and tail pointers */
1933 IXGBE_WRITE_REG(hw, IXGBE_VFRDH(reg_idx), 0);
1934 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(reg_idx), 0);
dbf8b0d8 1935 ring->tail = adapter->io_addr + IXGBE_VFRDT(reg_idx);
de02decb 1936
40b8178b
ET		 1937 /* initialize rx_buffer_info */
1938 memset(ring->rx_buffer_info, 0,
1939 sizeof(struct ixgbevf_rx_buffer) * ring->count);
1940
24bff091
ET		 1941 /* initialize Rx descriptor 0 */
1942 rx_desc = IXGBEVF_RX_DESC(ring, 0);
1943 rx_desc->wb.upper.length = 0;
1944
de02decb
DS		 1945 /* reset ntu and ntc to place SW in sync with hardwdare */
1946 ring->next_to_clean = 0;
1947 ring->next_to_use = 0;
bad17234 1948 ring->next_to_alloc = 0;
de02decb 1949
f15c5ba5 1950 ixgbevf_configure_srrctl(adapter, ring, reg_idx);
de02decb 1951
1ab37e12
ET		 1952 /* RXDCTL.RLPML does not work on 82599 */
1953 if (adapter->hw.mac.type != ixgbe_mac_82599_vf) {
1954 rxdctl &= ~(IXGBE_RXDCTL_RLPMLMASK |
1955 IXGBE_RXDCTL_RLPML_EN);
1956
1957#if (PAGE_SIZE < 8192)
1958 /* Limit the maximum frame size so we don't overrun the skb */
1959 if (ring_uses_build_skb(ring) &&
1960 !ring_uses_large_buffer(ring))
1961 rxdctl |= IXGBEVF_MAX_FRAME_BUILD_SKB |
1962 IXGBE_RXDCTL_RLPML_EN;
1963#endif
1964 }
bad17234 1965
de02decb
DS		 1966 rxdctl |= IXGBE_RXDCTL_ENABLE | IXGBE_RXDCTL_VME;
1967 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(reg_idx), rxdctl);
1968
1969 ixgbevf_rx_desc_queue_enable(adapter, ring);
095e2617 1970 ixgbevf_alloc_rx_buffers(ring, ixgbevf_desc_unused(ring));
de02decb
DS		 1971}
1972
f15c5ba5
ET		 1973static void ixgbevf_set_rx_buffer_len(struct ixgbevf_adapter *adapter,
1974 struct ixgbevf_ring *rx_ring)
1975{
1976 struct net_device *netdev = adapter->netdev;
1977 unsigned int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1978
1979 /* set build_skb and buffer size flags */
1ab37e12 1980 clear_ring_build_skb_enabled(rx_ring);
f15c5ba5
ET		 1981 clear_ring_uses_large_buffer(rx_ring);
1982
1983 if (adapter->flags & IXGBEVF_FLAGS_LEGACY_RX)
1984 return;
1985
fe68195d
SMJ		 1986 if (PAGE_SIZE < 8192)
1987 if (max_frame > IXGBEVF_MAX_FRAME_BUILD_SKB)
1988 set_ring_uses_large_buffer(rx_ring);
1ab37e12 1989
fe68195d
SMJ		 1990 /* 82599 can't rely on RXDCTL.RLPML to restrict the size of the frame */
1991 if (adapter->hw.mac.type == ixgbe_mac_82599_vf && !ring_uses_large_buffer(rx_ring))
1992 return;
f15c5ba5 1993
fe68195d 1994 set_ring_build_skb_enabled(rx_ring);
f15c5ba5
ET		 1995}
1996
92915f71
GR		 1997/**
1998 * ixgbevf_configure_rx - Configure 82599 VF Receive Unit after Reset
1999 * @adapter: board private structure
2000 *
2001 * Configure the Rx unit of the MAC after a reset.
2002 **/
2003static void ixgbevf_configure_rx(struct ixgbevf_adapter *adapter)
2004{
bad17234
ET		 2005 struct ixgbe_hw *hw = &adapter->hw;
2006 struct net_device *netdev = adapter->netdev;
6a11e52b 2007 int i, ret;
92915f71 2008
1bb9c639 2009 ixgbevf_setup_psrtype(adapter);
9295edb4
ET		 2010 if (hw->mac.type >= ixgbe_mac_X550_vf)
2011 ixgbevf_setup_vfmrqc(adapter);
dd1fe113 2012
14b22cd9 2013 spin_lock_bh(&adapter->mbx_lock);
bad17234 2014 /* notify the PF of our intent to use this size of frame */
6a11e52b 2015 ret = hw->mac.ops.set_rlpml(hw, netdev->mtu + ETH_HLEN + ETH_FCS_LEN);
14b22cd9 2016 spin_unlock_bh(&adapter->mbx_lock);
6a11e52b
TN		 2017 if (ret)
2018 dev_err(&adapter->pdev->dev,
2019 "Failed to set MTU at %d\n", netdev->mtu);
92915f71 2020
92915f71 2021 /* Setup the HW Rx Head and Tail Descriptor Pointers and
dec0d8e4
JK		 2022 * the Base and Length of the Rx Descriptor Ring
2023 */
f15c5ba5
ET		 2024 for (i = 0; i < adapter->num_rx_queues; i++) {
2025 struct ixgbevf_ring *rx_ring = adapter->rx_ring[i];
2026
2027 ixgbevf_set_rx_buffer_len(adapter, rx_ring);
2028 ixgbevf_configure_rx_ring(adapter, rx_ring);
2029 }
92915f71
GR		 2030}
2031
80d5c368
PM		 2032static int ixgbevf_vlan_rx_add_vid(struct net_device *netdev,
2033 __be16 proto, u16 vid)
92915f71
GR		 2034{
2035 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2036 struct ixgbe_hw *hw = &adapter->hw;
2ddc7fe1
AD		 2037 int err;
2038
55fdd45b 2039 spin_lock_bh(&adapter->mbx_lock);
1c55ed76 2040
92915f71 2041 /* add VID to filter table */
2ddc7fe1 2042 err = hw->mac.ops.set_vfta(hw, vid, 0, true);
1c55ed76 2043
55fdd45b 2044 spin_unlock_bh(&adapter->mbx_lock);
1c55ed76 2045
eac0b680
JS		 2046 if (err) {
2047 netdev_err(netdev, "VF could not set VLAN %d\n", vid);
2048
2049 /* translate error return types so error makes sense */
2050 if (err == IXGBE_ERR_MBX)
2051 return -EIO;
2ddc7fe1 2052
eac0b680
JS		 2053 if (err == IXGBE_ERR_INVALID_ARGUMENT)
2054 return -EACCES;
2055 }
2ddc7fe1 2056
dadcd65f 2057 set_bit(vid, adapter->active_vlans);
8e586137 2058
2ddc7fe1 2059 return err;
92915f71
GR		 2060}
2061
80d5c368
PM		 2062static int ixgbevf_vlan_rx_kill_vid(struct net_device *netdev,
2063 __be16 proto, u16 vid)
92915f71
GR		 2064{
2065 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2066 struct ixgbe_hw *hw = &adapter->hw;
50985b5f 2067 int err;
92915f71 2068
55fdd45b 2069 spin_lock_bh(&adapter->mbx_lock);
1c55ed76 2070
92915f71 2071 /* remove VID from filter table */
92fe0bf7 2072 err = hw->mac.ops.set_vfta(hw, vid, 0, false);
1c55ed76 2073
55fdd45b 2074 spin_unlock_bh(&adapter->mbx_lock);
1c55ed76 2075
eac0b680
JS		 2076 if (err)
2077 netdev_err(netdev, "Could not remove VLAN %d\n", vid);
2078
dadcd65f 2079 clear_bit(vid, adapter->active_vlans);
8e586137 2080
2ddc7fe1 2081 return err;
92915f71
GR		 2082}
2083
2084static void ixgbevf_restore_vlan(struct ixgbevf_adapter *adapter)
2085{
dadcd65f 2086 u16 vid;
92915f71 2087
dadcd65f 2088 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
80d5c368
PM		 2089 ixgbevf_vlan_rx_add_vid(adapter->netdev,
2090 htons(ETH_P_8021Q), vid);
92915f71
GR		 2091}
2092
46ec20ff
GR		 2093static int ixgbevf_write_uc_addr_list(struct net_device *netdev)
2094{
2095 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2096 struct ixgbe_hw *hw = &adapter->hw;
2097 int count = 0;
2098
46ec20ff
GR		 2099 if (!netdev_uc_empty(netdev)) {
2100 struct netdev_hw_addr *ha;
dec0d8e4 2101
46ec20ff
GR		 2102 netdev_for_each_uc_addr(ha, netdev) {
2103 hw->mac.ops.set_uc_addr(hw, ++count, ha->addr);
2104 udelay(200);
2105 }
2106 } else {
dec0d8e4
JK		 2107 /* If the list is empty then send message to PF driver to
2108 * clear all MAC VLANs on this VF.
46ec20ff
GR		 2109 */
2110 hw->mac.ops.set_uc_addr(hw, 0, NULL);
2111 }
2112
2113 return count;
2114}
2115
92915f71 2116/**
dee847f5 2117 * ixgbevf_set_rx_mode - Multicast and unicast set
92915f71
GR		 2118 * @netdev: network interface device structure
2119 *
2120 * The set_rx_method entry point is called whenever the multicast address
dee847f5
GR		 2121 * list, unicast address list or the network interface flags are updated.
2122 * This routine is responsible for configuring the hardware for proper
2123 * multicast mode and configuring requested unicast filters.
92915f71
GR		 2124 **/
2125static void ixgbevf_set_rx_mode(struct net_device *netdev)
2126{
2127 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2128 struct ixgbe_hw *hw = &adapter->hw;
8443c1a4
HS		 2129 unsigned int flags = netdev->flags;
2130 int xcast_mode;
2131
41e544cd
DS		 2132 /* request the most inclusive mode we need */
2133 if (flags & IFF_PROMISC)
2134 xcast_mode = IXGBEVF_XCAST_MODE_PROMISC;
2135 else if (flags & IFF_ALLMULTI)
2136 xcast_mode = IXGBEVF_XCAST_MODE_ALLMULTI;
2137 else if (flags & (IFF_BROADCAST | IFF_MULTICAST))
2138 xcast_mode = IXGBEVF_XCAST_MODE_MULTI;
2139 else
2140 xcast_mode = IXGBEVF_XCAST_MODE_NONE;
2141
55fdd45b 2142 spin_lock_bh(&adapter->mbx_lock);
1c55ed76 2143
8b44a8a0 2144 hw->mac.ops.update_xcast_mode(hw, xcast_mode);
8443c1a4 2145
92915f71 2146 /* reprogram multicast list */
92fe0bf7 2147 hw->mac.ops.update_mc_addr_list(hw, netdev);
46ec20ff
GR		 2148
2149 ixgbevf_write_uc_addr_list(netdev);
1c55ed76 2150
55fdd45b 2151 spin_unlock_bh(&adapter->mbx_lock);
92915f71
GR		 2152}
2153
2154static void ixgbevf_napi_enable_all(struct ixgbevf_adapter *adapter)
2155{
2156 int q_idx;
2157 struct ixgbevf_q_vector *q_vector;
2158 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2159
2160 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
92915f71 2161 q_vector = adapter->q_vector[q_idx];
fa71ae27 2162 napi_enable(&q_vector->napi);
92915f71
GR		 2163 }
2164}
2165
2166static void ixgbevf_napi_disable_all(struct ixgbevf_adapter *adapter)
2167{
2168 int q_idx;
2169 struct ixgbevf_q_vector *q_vector;
2170 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2171
2172 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
2173 q_vector = adapter->q_vector[q_idx];
92915f71
GR		 2174 napi_disable(&q_vector->napi);
2175 }
2176}
2177
220fe050
DS		 2178static int ixgbevf_configure_dcb(struct ixgbevf_adapter *adapter)
2179{
2180 struct ixgbe_hw *hw = &adapter->hw;
2181 unsigned int def_q = 0;
2182 unsigned int num_tcs = 0;
2dc571aa
ET		 2183 unsigned int num_rx_queues = adapter->num_rx_queues;
2184 unsigned int num_tx_queues = adapter->num_tx_queues;
220fe050
DS		 2185 int err;
2186
2187 spin_lock_bh(&adapter->mbx_lock);
2188
2189 /* fetch queue configuration from the PF */
2190 err = ixgbevf_get_queues(hw, &num_tcs, &def_q);
2191
2192 spin_unlock_bh(&adapter->mbx_lock);
2193
2194 if (err)
2195 return err;
2196
2197 if (num_tcs > 1) {
2dc571aa
ET		 2198 /* we need only one Tx queue */
2199 num_tx_queues = 1;
2200
220fe050 2201 /* update default Tx ring register index */
87e70ab9 2202 adapter->tx_ring[0]->reg_idx = def_q;
220fe050
DS		 2203
2204 /* we need as many queues as traffic classes */
2205 num_rx_queues = num_tcs;
2206 }
2207
2208 /* if we have a bad config abort request queue reset */
2dc571aa
ET		 2209 if ((adapter->num_rx_queues != num_rx_queues) ||
2210 (adapter->num_tx_queues != num_tx_queues)) {
220fe050
DS		 2211 /* force mailbox timeout to prevent further messages */
2212 hw->mbx.timeout = 0;
2213
2214 /* wait for watchdog to come around and bail us out */
d5dd7c3f 2215 set_bit(__IXGBEVF_QUEUE_RESET_REQUESTED, &adapter->state);
220fe050
DS		 2216 }
2217
2218 return 0;
2219}
2220
92915f71
GR		 2221static void ixgbevf_configure(struct ixgbevf_adapter *adapter)
2222{
220fe050
DS		 2223 ixgbevf_configure_dcb(adapter);
2224
de02decb 2225 ixgbevf_set_rx_mode(adapter->netdev);
92915f71
GR		 2226
2227 ixgbevf_restore_vlan(adapter);
7f68d430 2228 ixgbevf_ipsec_restore(adapter);
92915f71
GR		 2229
2230 ixgbevf_configure_tx(adapter);
2231 ixgbevf_configure_rx(adapter);
92915f71
GR		 2232}
2233
33bd9f60
GR		 2234static void ixgbevf_save_reset_stats(struct ixgbevf_adapter *adapter)
2235{
2236 /* Only save pre-reset stats if there are some */
2237 if (adapter->stats.vfgprc || adapter->stats.vfgptc) {
2238 adapter->stats.saved_reset_vfgprc += adapter->stats.vfgprc -
2239 adapter->stats.base_vfgprc;
2240 adapter->stats.saved_reset_vfgptc += adapter->stats.vfgptc -
2241 adapter->stats.base_vfgptc;
2242 adapter->stats.saved_reset_vfgorc += adapter->stats.vfgorc -
2243 adapter->stats.base_vfgorc;
2244 adapter->stats.saved_reset_vfgotc += adapter->stats.vfgotc -
2245 adapter->stats.base_vfgotc;
2246 adapter->stats.saved_reset_vfmprc += adapter->stats.vfmprc -
2247 adapter->stats.base_vfmprc;
2248 }
2249}
2250
2251static void ixgbevf_init_last_counter_stats(struct ixgbevf_adapter *adapter)
2252{
2253 struct ixgbe_hw *hw = &adapter->hw;
2254
2255 adapter->stats.last_vfgprc = IXGBE_READ_REG(hw, IXGBE_VFGPRC);
2256 adapter->stats.last_vfgorc = IXGBE_READ_REG(hw, IXGBE_VFGORC_LSB);
2257 adapter->stats.last_vfgorc |=
2258 (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGORC_MSB))) << 32);
2259 adapter->stats.last_vfgptc = IXGBE_READ_REG(hw, IXGBE_VFGPTC);
2260 adapter->stats.last_vfgotc = IXGBE_READ_REG(hw, IXGBE_VFGOTC_LSB);
2261 adapter->stats.last_vfgotc |=
2262 (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGOTC_MSB))) << 32);
2263 adapter->stats.last_vfmprc = IXGBE_READ_REG(hw, IXGBE_VFMPRC);
2264
2265 adapter->stats.base_vfgprc = adapter->stats.last_vfgprc;
2266 adapter->stats.base_vfgorc = adapter->stats.last_vfgorc;
2267 adapter->stats.base_vfgptc = adapter->stats.last_vfgptc;
2268 adapter->stats.base_vfgotc = adapter->stats.last_vfgotc;
2269 adapter->stats.base_vfmprc = adapter->stats.last_vfmprc;
2270}
2271
31186785
AD		 2272static void ixgbevf_negotiate_api(struct ixgbevf_adapter *adapter)
2273{
2274 struct ixgbe_hw *hw = &adapter->hw;
64d8db7d 2275 static const int api[] = {
339f2896 2276 ixgbe_mbox_api_15,
64d8db7d
CIK		 2277 ixgbe_mbox_api_14,
2278 ixgbe_mbox_api_13,
2279 ixgbe_mbox_api_12,
2280 ixgbe_mbox_api_11,
2281 ixgbe_mbox_api_10,
2282 ixgbe_mbox_api_unknown
2283 };
50985b5f 2284 int err, idx = 0;
31186785 2285
55fdd45b 2286 spin_lock_bh(&adapter->mbx_lock);
31186785
AD		 2287
2288 while (api[idx] != ixgbe_mbox_api_unknown) {
2f8214fe 2289 err = hw->mac.ops.negotiate_api_version(hw, api[idx]);
31186785
AD		 2290 if (!err)
2291 break;
2292 idx++;
2293 }
2294
339f2896
RT		 2295 if (hw->api_version >= ixgbe_mbox_api_15) {
2296 hw->mbx.ops.init_params(hw);
2297 memcpy(&hw->mbx.ops, &ixgbevf_mbx_ops,
2298 sizeof(struct ixgbe_mbx_operations));
2299 }
2300
55fdd45b 2301 spin_unlock_bh(&adapter->mbx_lock);
31186785
AD		 2302}
2303
795180d8 2304static void ixgbevf_up_complete(struct ixgbevf_adapter *adapter)
92915f71
GR		 2305{
2306 struct net_device *netdev = adapter->netdev;
443ebdd6 2307 struct pci_dev *pdev = adapter->pdev;
92915f71 2308 struct ixgbe_hw *hw = &adapter->hw;
443ebdd6 2309 bool state;
92915f71
GR		 2310
2311 ixgbevf_configure_msix(adapter);
2312
55fdd45b 2313 spin_lock_bh(&adapter->mbx_lock);
1c55ed76 2314
92fe0bf7
GR		 2315 if (is_valid_ether_addr(hw->mac.addr))
2316 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0);
2317 else
2318 hw->mac.ops.set_rar(hw, 0, hw->mac.perm_addr, 0);
92915f71 2319
55fdd45b 2320 spin_unlock_bh(&adapter->mbx_lock);
1c55ed76 2321
443ebdd6
SM		 2322 state = adapter->link_state;
2323 hw->mac.ops.get_link_state(hw, &adapter->link_state);
2324 if (state && state != adapter->link_state)
2325 dev_info(&pdev->dev, "VF is administratively disabled\n");
2326
4e857c58 2327 smp_mb__before_atomic();
92915f71
GR		 2328 clear_bit(__IXGBEVF_DOWN, &adapter->state);
2329 ixgbevf_napi_enable_all(adapter);
2330
d9bdb57f
ET		 2331 /* clear any pending interrupts, may auto mask */
2332 IXGBE_READ_REG(hw, IXGBE_VTEICR);
2333 ixgbevf_irq_enable(adapter);
2334
92915f71
GR		 2335 /* enable transmits */
2336 netif_tx_start_all_queues(netdev);
2337
33bd9f60
GR		 2338 ixgbevf_save_reset_stats(adapter);
2339 ixgbevf_init_last_counter_stats(adapter);
2340
4b2cd27f 2341 hw->mac.get_link_status = 1;
9ac5c5cc 2342 mod_timer(&adapter->service_timer, jiffies);
92915f71
GR		 2343}
2344
795180d8 2345void ixgbevf_up(struct ixgbevf_adapter *adapter)
92915f71 2346{
92915f71
GR		 2347 ixgbevf_configure(adapter);
2348
795180d8 2349 ixgbevf_up_complete(adapter);
92915f71
GR		 2350}
2351
2352/**
2353 * ixgbevf_clean_rx_ring - Free Rx Buffers per Queue
92915f71
GR		 2354 * @rx_ring: ring to free buffers from
2355 **/
05d063aa 2356static void ixgbevf_clean_rx_ring(struct ixgbevf_ring *rx_ring)
92915f71 2357{
40b8178b 2358 u16 i = rx_ring->next_to_clean;
92915f71 2359
bad17234
ET		 2360 /* Free Rx ring sk_buff */
2361 if (rx_ring->skb) {
2362 dev_kfree_skb(rx_ring->skb);
2363 rx_ring->skb = NULL;
2364 }
2365
bad17234 2366 /* Free all the Rx ring pages */
40b8178b 2367 while (i != rx_ring->next_to_alloc) {
bad17234 2368 struct ixgbevf_rx_buffer *rx_buffer;
92915f71 2369
bad17234 2370 rx_buffer = &rx_ring->rx_buffer_info[i];
16b35949
ET		 2371
2372 /* Invalidate cache lines that may have been written to by
2373 * device so that we avoid corrupting memory.
2374 */
2375 dma_sync_single_range_for_cpu(rx_ring->dev,
2376 rx_buffer->dma,
2377 rx_buffer->page_offset,
f15c5ba5 2378 ixgbevf_rx_bufsz(rx_ring),
16b35949
ET		 2379 DMA_FROM_DEVICE);
2380
2381 /* free resources associated with mapping */
2382 dma_unmap_page_attrs(rx_ring->dev,
2383 rx_buffer->dma,
f15c5ba5 2384 ixgbevf_rx_pg_size(rx_ring),
16b35949
ET		 2385 DMA_FROM_DEVICE,
2386 IXGBEVF_RX_DMA_ATTR);
2387
35074d69
ET		 2388 __page_frag_cache_drain(rx_buffer->page,
2389 rx_buffer->pagecnt_bias);
2390
40b8178b
ET		 2391 i++;
2392 if (i == rx_ring->count)
2393 i = 0;
92915f71
GR		 2394 }
2395
40b8178b
ET		 2396 rx_ring->next_to_alloc = 0;
2397 rx_ring->next_to_clean = 0;
2398 rx_ring->next_to_use = 0;
92915f71
GR		 2399}
2400
2401/**
2402 * ixgbevf_clean_tx_ring - Free Tx Buffers
92915f71
GR		 2403 * @tx_ring: ring to be cleaned
2404 **/
05d063aa 2405static void ixgbevf_clean_tx_ring(struct ixgbevf_ring *tx_ring)
92915f71 2406{
865a4d98
ET		 2407 u16 i = tx_ring->next_to_clean;
2408 struct ixgbevf_tx_buffer *tx_buffer = &tx_ring->tx_buffer_info[i];
92915f71 2409
865a4d98
ET		 2410 while (i != tx_ring->next_to_use) {
2411 union ixgbe_adv_tx_desc *eop_desc, *tx_desc;
2412
2413 /* Free all the Tx ring sk_buffs */
21092e9c
TN		 2414 if (ring_is_xdp(tx_ring))
2415 page_frag_free(tx_buffer->data);
2416 else
2417 dev_kfree_skb_any(tx_buffer->skb);
865a4d98
ET		 2418
2419 /* unmap skb header data */
2420 dma_unmap_single(tx_ring->dev,
2421 dma_unmap_addr(tx_buffer, dma),
2422 dma_unmap_len(tx_buffer, len),
2423 DMA_TO_DEVICE);
2424
2425 /* check for eop_desc to determine the end of the packet */
2426 eop_desc = tx_buffer->next_to_watch;
2427 tx_desc = IXGBEVF_TX_DESC(tx_ring, i);
2428
2429 /* unmap remaining buffers */
2430 while (tx_desc != eop_desc) {
2431 tx_buffer++;
2432 tx_desc++;
2433 i++;
2434 if (unlikely(i == tx_ring->count)) {
2435 i = 0;
2436 tx_buffer = tx_ring->tx_buffer_info;
2437 tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
2438 }
c0456c23 2439
865a4d98
ET		 2440 /* unmap any remaining paged data */
2441 if (dma_unmap_len(tx_buffer, len))
2442 dma_unmap_page(tx_ring->dev,
2443 dma_unmap_addr(tx_buffer, dma),
2444 dma_unmap_len(tx_buffer, len),
2445 DMA_TO_DEVICE);
2446 }
2447
2448 /* move us one more past the eop_desc for start of next pkt */
2449 tx_buffer++;
2450 i++;
2451 if (unlikely(i == tx_ring->count)) {
2452 i = 0;
2453 tx_buffer = tx_ring->tx_buffer_info;
2454 }
92915f71
GR		 2455 }
2456
865a4d98
ET		 2457 /* reset next_to_use and next_to_clean */
2458 tx_ring->next_to_use = 0;
2459 tx_ring->next_to_clean = 0;
92915f71 2460
92915f71
GR		 2461}
2462
2463/**
2464 * ixgbevf_clean_all_rx_rings - Free Rx Buffers for all queues
2465 * @adapter: board private structure
2466 **/
2467static void ixgbevf_clean_all_rx_rings(struct ixgbevf_adapter *adapter)
2468{
2469 int i;
2470
2471 for (i = 0; i < adapter->num_rx_queues; i++)
05d063aa 2472 ixgbevf_clean_rx_ring(adapter->rx_ring[i]);
92915f71
GR		 2473}
2474
2475/**
2476 * ixgbevf_clean_all_tx_rings - Free Tx Buffers for all queues
2477 * @adapter: board private structure
2478 **/
2479static void ixgbevf_clean_all_tx_rings(struct ixgbevf_adapter *adapter)
2480{
2481 int i;
2482
2483 for (i = 0; i < adapter->num_tx_queues; i++)
05d063aa 2484 ixgbevf_clean_tx_ring(adapter->tx_ring[i]);
21092e9c
TN		 2485 for (i = 0; i < adapter->num_xdp_queues; i++)
2486 ixgbevf_clean_tx_ring(adapter->xdp_ring[i]);
92915f71
GR		 2487}
2488
2489void ixgbevf_down(struct ixgbevf_adapter *adapter)
2490{
2491 struct net_device *netdev = adapter->netdev;
2492 struct ixgbe_hw *hw = &adapter->hw;
de02decb 2493 int i;
92915f71
GR		 2494
2495 /* signal that we are down to the interrupt handler */
5b346dc9
MR		 2496 if (test_and_set_bit(__IXGBEVF_DOWN, &adapter->state))
2497 return; /* do nothing if already down */
858c3dda 2498
dec0d8e4 2499 /* disable all enabled Rx queues */
858c3dda 2500 for (i = 0; i < adapter->num_rx_queues; i++)
87e70ab9 2501 ixgbevf_disable_rx_queue(adapter, adapter->rx_ring[i]);
92915f71 2502
d9bdb57f 2503 usleep_range(10000, 20000);
92915f71
GR		 2504
2505 netif_tx_stop_all_queues(netdev);
2506
d9bdb57f
ET		 2507 /* call carrier off first to avoid false dev_watchdog timeouts */
2508 netif_carrier_off(netdev);
2509 netif_tx_disable(netdev);
2510
92915f71
GR		 2511 ixgbevf_irq_disable(adapter);
2512
2513 ixgbevf_napi_disable_all(adapter);
2514
9ac5c5cc 2515 del_timer_sync(&adapter->service_timer);
92915f71
GR		 2516
2517 /* disable transmits in the hardware now that interrupts are off */
2518 for (i = 0; i < adapter->num_tx_queues; i++) {
de02decb
DS		 2519 u8 reg_idx = adapter->tx_ring[i]->reg_idx;
2520
2521 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx),
2522 IXGBE_TXDCTL_SWFLSH);
92915f71
GR		 2523 }
2524
21092e9c
TN		 2525 for (i = 0; i < adapter->num_xdp_queues; i++) {
2526 u8 reg_idx = adapter->xdp_ring[i]->reg_idx;
2527
2528 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx),
2529 IXGBE_TXDCTL_SWFLSH);
2530 }
2531
92915f71
GR		 2532 if (!pci_channel_offline(adapter->pdev))
2533 ixgbevf_reset(adapter);
2534
2535 ixgbevf_clean_all_tx_rings(adapter);
2536 ixgbevf_clean_all_rx_rings(adapter);
2537}
2538
2539void ixgbevf_reinit_locked(struct ixgbevf_adapter *adapter)
2540{
92915f71
GR		 2541 while (test_and_set_bit(__IXGBEVF_RESETTING, &adapter->state))
2542 msleep(1);
2543
4b2cd27f 2544 ixgbevf_down(adapter);
d7cb9da1 2545 pci_set_master(adapter->pdev);
4b2cd27f 2546 ixgbevf_up(adapter);
92915f71
GR		 2547
2548 clear_bit(__IXGBEVF_RESETTING, &adapter->state);
2549}
2550
2551void ixgbevf_reset(struct ixgbevf_adapter *adapter)
2552{
2553 struct ixgbe_hw *hw = &adapter->hw;
2554 struct net_device *netdev = adapter->netdev;
2555
798e381a 2556 if (hw->mac.ops.reset_hw(hw)) {
92915f71 2557 hw_dbg(hw, "PF still resetting\n");
798e381a 2558 } else {
92915f71 2559 hw->mac.ops.init_hw(hw);
798e381a
DS		 2560 ixgbevf_negotiate_api(adapter);
2561 }
92915f71
GR		 2562
2563 if (is_valid_ether_addr(adapter->hw.mac.addr)) {
f3956ebb 2564 eth_hw_addr_set(netdev, adapter->hw.mac.addr);
91a76baa 2565 ether_addr_copy(netdev->perm_addr, adapter->hw.mac.addr);
92915f71 2566 }
e66c92ad
ET		 2567
2568 adapter->last_reset = jiffies;
92915f71
GR		 2569}
2570
e45dd5fe
JK		 2571static int ixgbevf_acquire_msix_vectors(struct ixgbevf_adapter *adapter,
2572 int vectors)
92915f71 2573{
a5f9337b 2574 int vector_threshold;
92915f71 2575
fa71ae27
AD		 2576 /* We'll want at least 2 (vector_threshold):
2577 * 1) TxQ[0] + RxQ[0] handler
2578 * 2) Other (Link Status Change, etc.)
92915f71
GR		 2579 */
2580 vector_threshold = MIN_MSIX_COUNT;
2581
2582 /* The more we get, the more we will assign to Tx/Rx Cleanup
2583 * for the separate queues...where Rx Cleanup >= Tx Cleanup.
2584 * Right now, we simply care about how many we'll get; we'll
2585 * set them up later while requesting irq's.
2586 */
5c1e3588
AG		 2587 vectors = pci_enable_msix_range(adapter->pdev, adapter->msix_entries,
2588 vector_threshold, vectors);
92915f71 2589
5c1e3588 2590 if (vectors < 0) {
e45dd5fe
JK		 2591 dev_err(&adapter->pdev->dev,
2592 "Unable to allocate MSI-X interrupts\n");
92915f71
GR		 2593 kfree(adapter->msix_entries);
2594 adapter->msix_entries = NULL;
5c1e3588 2595 return vectors;
92915f71 2596 }
dee847f5 2597
5c1e3588
AG		 2598 /* Adjust for only the vectors we'll use, which is minimum
2599 * of max_msix_q_vectors + NON_Q_VECTORS, or the number of
2600 * vectors we were allocated.
2601 */
2602 adapter->num_msix_vectors = vectors;
2603
2604 return 0;
92915f71
GR		 2605}
2606
49ce9c2c
BH		 2607/**
2608 * ixgbevf_set_num_queues - Allocate queues for device, feature dependent
92915f71
GR		 2609 * @adapter: board private structure to initialize
2610 *
2611 * This is the top level queue allocation routine. The order here is very
2612 * important, starting with the "most" number of features turned on at once,
2613 * and ending with the smallest set of features. This way large combinations
2614 * can be allocated if they're turned on, and smaller combinations are the
5463fce6 2615 * fall through conditions.
92915f71
GR		 2616 *
2617 **/
2618static void ixgbevf_set_num_queues(struct ixgbevf_adapter *adapter)
2619{
220fe050
DS		 2620 struct ixgbe_hw *hw = &adapter->hw;
2621 unsigned int def_q = 0;
2622 unsigned int num_tcs = 0;
2623 int err;
2624
92915f71
GR		 2625 /* Start with base case */
2626 adapter->num_rx_queues = 1;
2627 adapter->num_tx_queues = 1;
21092e9c 2628 adapter->num_xdp_queues = 0;
220fe050
DS		 2629
2630 spin_lock_bh(&adapter->mbx_lock);
2631
2632 /* fetch queue configuration from the PF */
2633 err = ixgbevf_get_queues(hw, &num_tcs, &def_q);
2634
2635 spin_unlock_bh(&adapter->mbx_lock);
2636
2637 if (err)
2638 return;
2639
2640 /* we need as many queues as traffic classes */
2dc571aa 2641 if (num_tcs > 1) {
220fe050 2642 adapter->num_rx_queues = num_tcs;
2dc571aa
ET		 2643 } else {
2644 u16 rss = min_t(u16, num_online_cpus(), IXGBEVF_MAX_RSS_QUEUES);
2645
2646 switch (hw->api_version) {
2647 case ixgbe_mbox_api_11:
94cf66f8 2648 case ixgbe_mbox_api_12:
41e544cd 2649 case ixgbe_mbox_api_13:
7f68d430 2650 case ixgbe_mbox_api_14:
339f2896 2651 case ixgbe_mbox_api_15:
21092e9c
TN		 2652 if (adapter->xdp_prog &&
2653 hw->mac.max_tx_queues == rss)
2654 rss = rss > 3 ? 2 : 1;
2655
2dc571aa
ET		 2656 adapter->num_rx_queues = rss;
2657 adapter->num_tx_queues = rss;
21092e9c 2658 adapter->num_xdp_queues = adapter->xdp_prog ? rss : 0;
d8f0c306 2659 break;
2dc571aa
ET		 2660 default:
2661 break;
2662 }
2663 }
92915f71
GR		 2664}
2665
2666/**
21c046e4
ET		 2667 * ixgbevf_set_interrupt_capability - set MSI-X or FAIL if not supported
2668 * @adapter: board private structure to initialize
2669 *
2670 * Attempt to configure the interrupts using the best available
2671 * capabilities of the hardware and the kernel.
2672 **/
2673static int ixgbevf_set_interrupt_capability(struct ixgbevf_adapter *adapter)
2674{
2675 int vector, v_budget;
2676
2677 /* It's easy to be greedy for MSI-X vectors, but it really
2678 * doesn't do us much good if we have a lot more vectors
2679 * than CPU's. So let's be conservative and only ask for
2680 * (roughly) the same number of vectors as there are CPU's.
2681 * The default is to use pairs of vectors.
2682 */
2683 v_budget = max(adapter->num_rx_queues, adapter->num_tx_queues);
2684 v_budget = min_t(int, v_budget, num_online_cpus());
2685 v_budget += NON_Q_VECTORS;
2686
2687 adapter->msix_entries = kcalloc(v_budget,
2688 sizeof(struct msix_entry), GFP_KERNEL);
2689 if (!adapter->msix_entries)
2690 return -ENOMEM;
2691
2692 for (vector = 0; vector < v_budget; vector++)
2693 adapter->msix_entries[vector].entry = vector;
2694
2695 /* A failure in MSI-X entry allocation isn't fatal, but the VF driver
2696 * does not support any other modes, so we will simply fail here. Note
2697 * that we clean up the msix_entries pointer else-where.
2698 */
2699 return ixgbevf_acquire_msix_vectors(adapter, v_budget);
2700}
2701
2702static void ixgbevf_add_ring(struct ixgbevf_ring *ring,
2703 struct ixgbevf_ring_container *head)
2704{
2705 ring->next = head->ring;
2706 head->ring = ring;
2707 head->count++;
2708}
2709
2710/**
2711 * ixgbevf_alloc_q_vector - Allocate memory for a single interrupt vector
92915f71 2712 * @adapter: board private structure to initialize
21c046e4
ET		 2713 * @v_idx: index of vector in adapter struct
2714 * @txr_count: number of Tx rings for q vector
2715 * @txr_idx: index of first Tx ring to assign
21092e9c
TN		 2716 * @xdp_count: total number of XDP rings to allocate
2717 * @xdp_idx: index of first XDP ring to allocate
21c046e4
ET		 2718 * @rxr_count: number of Rx rings for q vector
2719 * @rxr_idx: index of first Rx ring to assign
92915f71 2720 *
21c046e4 2721 * We allocate one q_vector. If allocation fails we return -ENOMEM.
92915f71 2722 **/
21c046e4
ET		 2723static int ixgbevf_alloc_q_vector(struct ixgbevf_adapter *adapter, int v_idx,
2724 int txr_count, int txr_idx,
21092e9c 2725 int xdp_count, int xdp_idx,
21c046e4 2726 int rxr_count, int rxr_idx)
92915f71 2727{
21c046e4 2728 struct ixgbevf_q_vector *q_vector;
21092e9c 2729 int reg_idx = txr_idx + xdp_idx;
87e70ab9 2730 struct ixgbevf_ring *ring;
21c046e4
ET		 2731 int ring_count, size;
2732
21092e9c 2733 ring_count = txr_count + xdp_count + rxr_count;
21c046e4
ET		 2734 size = sizeof(*q_vector) + (sizeof(*ring) * ring_count);
2735
2736 /* allocate q_vector and rings */
2737 q_vector = kzalloc(size, GFP_KERNEL);
2738 if (!q_vector)
2739 return -ENOMEM;
2740
2741 /* initialize NAPI */
b48b89f9 2742 netif_napi_add(adapter->netdev, &q_vector->napi, ixgbevf_poll);
21c046e4
ET		 2743
2744 /* tie q_vector and adapter together */
2745 adapter->q_vector[v_idx] = q_vector;
2746 q_vector->adapter = adapter;
2747 q_vector->v_idx = v_idx;
92915f71 2748
21c046e4
ET		 2749 /* initialize pointer to rings */
2750 ring = q_vector->ring;
92915f71 2751
21c046e4
ET		 2752 while (txr_count) {
2753 /* assign generic ring traits */
87e70ab9
DS		 2754 ring->dev = &adapter->pdev->dev;
2755 ring->netdev = adapter->netdev;
21c046e4
ET		 2756
2757 /* configure backlink on ring */
2758 ring->q_vector = q_vector;
2759
2760 /* update q_vector Tx values */
2761 ixgbevf_add_ring(ring, &q_vector->tx);
2762
2763 /* apply Tx specific ring traits */
87e70ab9 2764 ring->count = adapter->tx_ring_count;
21c046e4 2765 ring->queue_index = txr_idx;
21092e9c 2766 ring->reg_idx = reg_idx;
92915f71 2767
21c046e4 2768 /* assign ring to adapter */
c6fbfdcb 2769 adapter->tx_ring[txr_idx] = ring;
21c046e4
ET		 2770
2771 /* update count and index */
2772 txr_count--;
2773 txr_idx++;
21092e9c
TN		 2774 reg_idx++;
2775
2776 /* push pointer to next ring */
2777 ring++;
2778 }
2779
2780 while (xdp_count) {
2781 /* assign generic ring traits */
2782 ring->dev = &adapter->pdev->dev;
2783 ring->netdev = adapter->netdev;
2784
2785 /* configure backlink on ring */
2786 ring->q_vector = q_vector;
2787
2788 /* update q_vector Tx values */
2789 ixgbevf_add_ring(ring, &q_vector->tx);
2790
2791 /* apply Tx specific ring traits */
2792 ring->count = adapter->tx_ring_count;
2793 ring->queue_index = xdp_idx;
2794 ring->reg_idx = reg_idx;
2795 set_ring_xdp(ring);
2796
2797 /* assign ring to adapter */
2798 adapter->xdp_ring[xdp_idx] = ring;
2799
2800 /* update count and index */
2801 xdp_count--;
2802 xdp_idx++;
2803 reg_idx++;
92915f71 2804
21c046e4
ET		 2805 /* push pointer to next ring */
2806 ring++;
2807 }
87e70ab9 2808
21c046e4
ET		 2809 while (rxr_count) {
2810 /* assign generic ring traits */
87e70ab9
DS		 2811 ring->dev = &adapter->pdev->dev;
2812 ring->netdev = adapter->netdev;
2813
21c046e4
ET		 2814 /* configure backlink on ring */
2815 ring->q_vector = q_vector;
2816
2817 /* update q_vector Rx values */
2818 ixgbevf_add_ring(ring, &q_vector->rx);
2819
2820 /* apply Rx specific ring traits */
87e70ab9 2821 ring->count = adapter->rx_ring_count;
21c046e4
ET		 2822 ring->queue_index = rxr_idx;
2823 ring->reg_idx = rxr_idx;
87e70ab9 2824
21c046e4
ET		 2825 /* assign ring to adapter */
2826 adapter->rx_ring[rxr_idx] = ring;
92915f71 2827
21c046e4
ET		 2828 /* update count and index */
2829 rxr_count--;
2830 rxr_idx++;
92915f71 2831
21c046e4
ET		 2832 /* push pointer to next ring */
2833 ring++;
87e70ab9
DS		 2834 }
2835
21c046e4 2836 return 0;
92915f71
GR		 2837}
2838
2839/**
21c046e4 2840 * ixgbevf_free_q_vector - Free memory allocated for specific interrupt vector
92915f71 2841 * @adapter: board private structure to initialize
21c046e4 2842 * @v_idx: index of vector in adapter struct
92915f71 2843 *
21c046e4
ET		 2844 * This function frees the memory allocated to the q_vector. In addition if
2845 * NAPI is enabled it will delete any references to the NAPI struct prior
2846 * to freeing the q_vector.
92915f71 2847 **/
21c046e4 2848static void ixgbevf_free_q_vector(struct ixgbevf_adapter *adapter, int v_idx)
92915f71 2849{
21c046e4
ET		 2850 struct ixgbevf_q_vector *q_vector = adapter->q_vector[v_idx];
2851 struct ixgbevf_ring *ring;
92915f71 2852
21092e9c
TN		 2853 ixgbevf_for_each_ring(ring, q_vector->tx) {
2854 if (ring_is_xdp(ring))
2855 adapter->xdp_ring[ring->queue_index] = NULL;
2856 else
2857 adapter->tx_ring[ring->queue_index] = NULL;
2858 }
92915f71 2859
21c046e4
ET		 2860 ixgbevf_for_each_ring(ring, q_vector->rx)
2861 adapter->rx_ring[ring->queue_index] = NULL;
92915f71 2862
21c046e4
ET		 2863 adapter->q_vector[v_idx] = NULL;
2864 netif_napi_del(&q_vector->napi);
92915f71 2865
21c046e4
ET		 2866 /* ixgbevf_get_stats() might access the rings on this vector,
2867 * we must wait a grace period before freeing it.
2868 */
2869 kfree_rcu(q_vector, rcu);
92915f71
GR		 2870}
2871
2872/**
2873 * ixgbevf_alloc_q_vectors - Allocate memory for interrupt vectors
2874 * @adapter: board private structure to initialize
2875 *
2876 * We allocate one q_vector per queue interrupt. If allocation fails we
2877 * return -ENOMEM.
2878 **/
2879static int ixgbevf_alloc_q_vectors(struct ixgbevf_adapter *adapter)
2880{
21c046e4
ET		 2881 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2882 int rxr_remaining = adapter->num_rx_queues;
2883 int txr_remaining = adapter->num_tx_queues;
21092e9c
TN		 2884 int xdp_remaining = adapter->num_xdp_queues;
2885 int rxr_idx = 0, txr_idx = 0, xdp_idx = 0, v_idx = 0;
21c046e4
ET		 2886 int err;
2887
21092e9c 2888 if (q_vectors >= (rxr_remaining + txr_remaining + xdp_remaining)) {
21c046e4
ET		 2889 for (; rxr_remaining; v_idx++, q_vectors--) {
2890 int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors);
2891
2892 err = ixgbevf_alloc_q_vector(adapter, v_idx,
21092e9c 2893 0, 0, 0, 0, rqpv, rxr_idx);
21c046e4
ET		 2894 if (err)
2895 goto err_out;
2896
2897 /* update counts and index */
2898 rxr_remaining -= rqpv;
2899 rxr_idx += rqpv;
2900 }
2901 }
2902
2903 for (; q_vectors; v_idx++, q_vectors--) {
2904 int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors);
2905 int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors);
21092e9c 2906 int xqpv = DIV_ROUND_UP(xdp_remaining, q_vectors);
92915f71 2907
21c046e4
ET		 2908 err = ixgbevf_alloc_q_vector(adapter, v_idx,
2909 tqpv, txr_idx,
21092e9c 2910 xqpv, xdp_idx,
21c046e4 2911 rqpv, rxr_idx);
92915f71 2912
21c046e4 2913 if (err)
92915f71 2914 goto err_out;
21c046e4
ET		 2915
2916 /* update counts and index */
2917 rxr_remaining -= rqpv;
2918 rxr_idx += rqpv;
2919 txr_remaining -= tqpv;
2920 txr_idx += tqpv;
21092e9c
TN		 2921 xdp_remaining -= xqpv;
2922 xdp_idx += xqpv;
92915f71
GR		 2923 }
2924
2925 return 0;
2926
2927err_out:
21c046e4
ET		 2928 while (v_idx) {
2929 v_idx--;
2930 ixgbevf_free_q_vector(adapter, v_idx);
92915f71 2931 }
21c046e4 2932
92915f71
GR		 2933 return -ENOMEM;
2934}
2935
2936/**
2937 * ixgbevf_free_q_vectors - Free memory allocated for interrupt vectors
2938 * @adapter: board private structure to initialize
2939 *
2940 * This function frees the memory allocated to the q_vectors. In addition if
2941 * NAPI is enabled it will delete any references to the NAPI struct prior
2942 * to freeing the q_vector.
2943 **/
2944static void ixgbevf_free_q_vectors(struct ixgbevf_adapter *adapter)
2945{
21c046e4 2946 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
92915f71 2947
21c046e4
ET		 2948 while (q_vectors) {
2949 q_vectors--;
2950 ixgbevf_free_q_vector(adapter, q_vectors);
92915f71
GR		 2951 }
2952}
2953
2954/**
2955 * ixgbevf_reset_interrupt_capability - Reset MSIX setup
2956 * @adapter: board private structure
2957 *
2958 **/
2959static void ixgbevf_reset_interrupt_capability(struct ixgbevf_adapter *adapter)
2960{
eeffceee
MR		 2961 if (!adapter->msix_entries)
2962 return;
2963
92915f71
GR		 2964 pci_disable_msix(adapter->pdev);
2965 kfree(adapter->msix_entries);
2966 adapter->msix_entries = NULL;
92915f71
GR		 2967}
2968
2969/**
2970 * ixgbevf_init_interrupt_scheme - Determine if MSIX is supported and init
2971 * @adapter: board private structure to initialize
2972 *
2973 **/
2974static int ixgbevf_init_interrupt_scheme(struct ixgbevf_adapter *adapter)
2975{
2976 int err;
2977
2978 /* Number of supported queues */
2979 ixgbevf_set_num_queues(adapter);
2980
2981 err = ixgbevf_set_interrupt_capability(adapter);
2982 if (err) {
2983 hw_dbg(&adapter->hw,
2984 "Unable to setup interrupt capabilities\n");
2985 goto err_set_interrupt;
2986 }
2987
2988 err = ixgbevf_alloc_q_vectors(adapter);
2989 if (err) {
dec0d8e4 2990 hw_dbg(&adapter->hw, "Unable to allocate memory for queue vectors\n");
92915f71
GR		 2991 goto err_alloc_q_vectors;
2992 }
2993
21092e9c
TN		 2994 hw_dbg(&adapter->hw, "Multiqueue %s: Rx Queue count = %u, Tx Queue count = %u XDP Queue count %u\n",
2995 (adapter->num_rx_queues > 1) ? "Enabled" : "Disabled",
2996 adapter->num_rx_queues, adapter->num_tx_queues,
2997 adapter->num_xdp_queues);
92915f71
GR		 2998
2999 set_bit(__IXGBEVF_DOWN, &adapter->state);
3000
3001 return 0;
92915f71
GR		 3002err_alloc_q_vectors:
3003 ixgbevf_reset_interrupt_capability(adapter);
3004err_set_interrupt:
3005 return err;
3006}
3007
0ac1e8ce
AD		 3008/**
3009 * ixgbevf_clear_interrupt_scheme - Clear the current interrupt scheme settings
3010 * @adapter: board private structure to clear interrupt scheme on
3011 *
3012 * We go through and clear interrupt specific resources and reset the structure
3013 * to pre-load conditions
3014 **/
3015static void ixgbevf_clear_interrupt_scheme(struct ixgbevf_adapter *adapter)
3016{
3017 adapter->num_tx_queues = 0;
21092e9c 3018 adapter->num_xdp_queues = 0;
0ac1e8ce
AD		 3019 adapter->num_rx_queues = 0;
3020
3021 ixgbevf_free_q_vectors(adapter);
3022 ixgbevf_reset_interrupt_capability(adapter);
3023}
3024
92915f71
GR		 3025/**
3026 * ixgbevf_sw_init - Initialize general software structures
92915f71
GR		 3027 * @adapter: board private structure to initialize
3028 *
3029 * ixgbevf_sw_init initializes the Adapter private data structure.
3030 * Fields are initialized based on PCI device information and
3031 * OS network device settings (MTU size).
3032 **/
9f9a12f8 3033static int ixgbevf_sw_init(struct ixgbevf_adapter *adapter)
92915f71
GR		 3034{
3035 struct ixgbe_hw *hw = &adapter->hw;
3036 struct pci_dev *pdev = adapter->pdev;
e1941a74 3037 struct net_device *netdev = adapter->netdev;
92915f71
GR		 3038 int err;
3039
3040 /* PCI config space info */
92915f71
GR		 3041 hw->vendor_id = pdev->vendor;
3042 hw->device_id = pdev->device;
ff938e43 3043 hw->revision_id = pdev->revision;
92915f71
GR		 3044 hw->subsystem_vendor_id = pdev->subsystem_vendor;
3045 hw->subsystem_device_id = pdev->subsystem_device;
3046
3047 hw->mbx.ops.init_params(hw);
56e94095 3048
e60ae003
TN		 3049 if (hw->mac.type >= ixgbe_mac_X550_vf) {
3050 err = ixgbevf_init_rss_key(adapter);
3051 if (err)
3052 goto out;
3053 }
3054
56e94095
AD		 3055 /* assume legacy case in which PF would only give VF 2 queues */
3056 hw->mac.max_tx_queues = 2;
3057 hw->mac.max_rx_queues = 2;
3058
798e381a
DS		 3059 /* lock to protect mailbox accesses */
3060 spin_lock_init(&adapter->mbx_lock);
3061
92915f71
GR		 3062 err = hw->mac.ops.reset_hw(hw);
3063 if (err) {
3064 dev_info(&pdev->dev,
e1941a74 3065 "PF still in reset state. Is the PF interface up?\n");
92915f71
GR		 3066 } else {
3067 err = hw->mac.ops.init_hw(hw);
3068 if (err) {
dbd9636e 3069 pr_err("init_shared_code failed: %d\n", err);
92915f71
GR		 3070 goto out;
3071 }
798e381a 3072 ixgbevf_negotiate_api(adapter);
e1941a74
GR		 3073 err = hw->mac.ops.get_mac_addr(hw, hw->mac.addr);
3074 if (err)
3075 dev_info(&pdev->dev, "Error reading MAC address\n");
3076 else if (is_zero_ether_addr(adapter->hw.mac.addr))
3077 dev_info(&pdev->dev,
3078 "MAC address not assigned by administrator.\n");
f3956ebb 3079 eth_hw_addr_set(netdev, hw->mac.addr);
e1941a74
GR		 3080 }
3081
3082 if (!is_valid_ether_addr(netdev->dev_addr)) {
3083 dev_info(&pdev->dev, "Assigning random MAC address\n");
3084 eth_hw_addr_random(netdev);
91a76baa 3085 ether_addr_copy(hw->mac.addr, netdev->dev_addr);
465fc643 3086 ether_addr_copy(hw->mac.perm_addr, netdev->dev_addr);
92915f71
GR		 3087 }
3088
3089 /* Enable dynamic interrupt throttling rates */
5f3600eb
AD		 3090 adapter->rx_itr_setting = 1;
3091 adapter->tx_itr_setting = 1;
92915f71 3092
92915f71
GR		 3093 /* set default ring sizes */
3094 adapter->tx_ring_count = IXGBEVF_DEFAULT_TXD;
3095 adapter->rx_ring_count = IXGBEVF_DEFAULT_RXD;
3096
443ebdd6
SM		 3097 adapter->link_state = true;
3098
92915f71 3099 set_bit(__IXGBEVF_DOWN, &adapter->state);
1a0d6ae5 3100 return 0;
92915f71
GR		 3101
3102out:
3103 return err;
3104}
3105
92915f71
GR		 3106#define UPDATE_VF_COUNTER_32bit(reg, last_counter, counter) \
3107 { \
3108 u32 current_counter = IXGBE_READ_REG(hw, reg); \
3109 if (current_counter < last_counter) \
3110 counter += 0x100000000LL; \
3111 last_counter = current_counter; \
3112 counter &= 0xFFFFFFFF00000000LL; \
3113 counter |= current_counter; \
3114 }
3115
3116#define UPDATE_VF_COUNTER_36bit(reg_lsb, reg_msb, last_counter, counter) \
3117 { \
3118 u64 current_counter_lsb = IXGBE_READ_REG(hw, reg_lsb); \
3119 u64 current_counter_msb = IXGBE_READ_REG(hw, reg_msb); \
dec0d8e4
JK		 3120 u64 current_counter = (current_counter_msb << 32) | \
3121 current_counter_lsb; \
92915f71
GR		 3122 if (current_counter < last_counter) \
3123 counter += 0x1000000000LL; \
3124 last_counter = current_counter; \
3125 counter &= 0xFFFFFFF000000000LL; \
3126 counter |= current_counter; \
3127 }
3128/**
3129 * ixgbevf_update_stats - Update the board statistics counters.
3130 * @adapter: board private structure
3131 **/
3132void ixgbevf_update_stats(struct ixgbevf_adapter *adapter)
3133{
3134 struct ixgbe_hw *hw = &adapter->hw;
2a35efe5
ET		 3135 u64 alloc_rx_page_failed = 0, alloc_rx_buff_failed = 0;
3136 u64 alloc_rx_page = 0, hw_csum_rx_error = 0;
55fb277c 3137 int i;
92915f71 3138
e66c92ad
ET		 3139 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
3140 test_bit(__IXGBEVF_RESETTING, &adapter->state))
088245a3
GR		 3141 return;
3142
92915f71
GR		 3143 UPDATE_VF_COUNTER_32bit(IXGBE_VFGPRC, adapter->stats.last_vfgprc,
3144 adapter->stats.vfgprc);
3145 UPDATE_VF_COUNTER_32bit(IXGBE_VFGPTC, adapter->stats.last_vfgptc,
3146 adapter->stats.vfgptc);
3147 UPDATE_VF_COUNTER_36bit(IXGBE_VFGORC_LSB, IXGBE_VFGORC_MSB,
3148 adapter->stats.last_vfgorc,
3149 adapter->stats.vfgorc);
3150 UPDATE_VF_COUNTER_36bit(IXGBE_VFGOTC_LSB, IXGBE_VFGOTC_MSB,
3151 adapter->stats.last_vfgotc,
3152 adapter->stats.vfgotc);
3153 UPDATE_VF_COUNTER_32bit(IXGBE_VFMPRC, adapter->stats.last_vfmprc,
3154 adapter->stats.vfmprc);
55fb277c
GR		 3155
3156 for (i = 0; i < adapter->num_rx_queues; i++) {
2a35efe5
ET		 3157 struct ixgbevf_ring *rx_ring = adapter->rx_ring[i];
3158
3159 hw_csum_rx_error += rx_ring->rx_stats.csum_err;
3160 alloc_rx_page_failed += rx_ring->rx_stats.alloc_rx_page_failed;
3161 alloc_rx_buff_failed += rx_ring->rx_stats.alloc_rx_buff_failed;
3162 alloc_rx_page += rx_ring->rx_stats.alloc_rx_page;
55fb277c 3163 }
2a35efe5
ET		 3164
3165 adapter->hw_csum_rx_error = hw_csum_rx_error;
3166 adapter->alloc_rx_page_failed = alloc_rx_page_failed;
3167 adapter->alloc_rx_buff_failed = alloc_rx_buff_failed;
3168 adapter->alloc_rx_page = alloc_rx_page;
92915f71
GR		 3169}
3170
3171/**
9ac5c5cc 3172 * ixgbevf_service_timer - Timer Call-back
e23cf38f 3173 * @t: pointer to timer_list struct
92915f71 3174 **/
26566eae 3175static void ixgbevf_service_timer(struct timer_list *t)
92915f71 3176{
26566eae
KC		 3177 struct ixgbevf_adapter *adapter = from_timer(adapter, t,
3178 service_timer);
e66c92ad 3179
9ac5c5cc
ET		 3180 /* Reset the timer */
3181 mod_timer(&adapter->service_timer, (HZ * 2) + jiffies);
3182
3183 ixgbevf_service_event_schedule(adapter);
e66c92ad
ET		 3184}
3185
9ac5c5cc 3186static void ixgbevf_reset_subtask(struct ixgbevf_adapter *adapter)
e66c92ad 3187{
d5dd7c3f 3188 if (!test_and_clear_bit(__IXGBEVF_RESET_REQUESTED, &adapter->state))
9ac5c5cc 3189 return;
e66c92ad 3190
7d6446db 3191 rtnl_lock();
e66c92ad
ET		 3192 /* If we're already down or resetting, just bail */
3193 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
6e469ed0 3194 test_bit(__IXGBEVF_REMOVING, &adapter->state) ||
7d6446db
ET		 3195 test_bit(__IXGBEVF_RESETTING, &adapter->state)) {
3196 rtnl_unlock();
e66c92ad 3197 return;
7d6446db 3198 }
e66c92ad
ET		 3199
3200 adapter->tx_timeout_count++;
3201
3202 ixgbevf_reinit_locked(adapter);
8e8247ab 3203 rtnl_unlock();
e66c92ad
ET		 3204}
3205
dec0d8e4
JK		 3206/**
3207 * ixgbevf_check_hang_subtask - check for hung queues and dropped interrupts
3208 * @adapter: pointer to the device adapter structure
e66c92ad
ET		 3209 *
3210 * This function serves two purposes. First it strobes the interrupt lines
3211 * in order to make certain interrupts are occurring. Secondly it sets the
3212 * bits needed to check for TX hangs. As a result we should immediately
3213 * determine if a hang has occurred.
dec0d8e4 3214 **/
e66c92ad
ET		 3215static void ixgbevf_check_hang_subtask(struct ixgbevf_adapter *adapter)
3216{
92915f71 3217 struct ixgbe_hw *hw = &adapter->hw;
5f3600eb 3218 u32 eics = 0;
92915f71
GR		 3219 int i;
3220
e66c92ad
ET		 3221 /* If we're down or resetting, just bail */
3222 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
3223 test_bit(__IXGBEVF_RESETTING, &adapter->state))
3224 return;
92915f71 3225
e08400b7
ET		 3226 /* Force detection of hung controller */
3227 if (netif_carrier_ok(adapter->netdev)) {
3228 for (i = 0; i < adapter->num_tx_queues; i++)
3229 set_check_for_tx_hang(adapter->tx_ring[i]);
21092e9c
TN		 3230 for (i = 0; i < adapter->num_xdp_queues; i++)
3231 set_check_for_tx_hang(adapter->xdp_ring[i]);
e08400b7
ET		 3232 }
3233
dec0d8e4 3234 /* get one bit for every active Tx/Rx interrupt vector */
92915f71
GR		 3235 for (i = 0; i < adapter->num_msix_vectors - NON_Q_VECTORS; i++) {
3236 struct ixgbevf_q_vector *qv = adapter->q_vector[i];
9ac5c5cc 3237
6b43c446 3238 if (qv->rx.ring || qv->tx.ring)
8d055cc0 3239 eics |= BIT(i);
92915f71
GR		 3240 }
3241
e66c92ad 3242 /* Cause software interrupt to ensure rings are cleaned */
5f3600eb 3243 IXGBE_WRITE_REG(hw, IXGBE_VTEICS, eics);
e66c92ad 3244}
92915f71 3245
e66c92ad
ET		 3246/**
3247 * ixgbevf_watchdog_update_link - update the link status
dec0d8e4 3248 * @adapter: pointer to the device adapter structure
e66c92ad
ET		 3249 **/
3250static void ixgbevf_watchdog_update_link(struct ixgbevf_adapter *adapter)
3251{
3252 struct ixgbe_hw *hw = &adapter->hw;
3253 u32 link_speed = adapter->link_speed;
3254 bool link_up = adapter->link_up;
3255 s32 err;
3256
3257 spin_lock_bh(&adapter->mbx_lock);
3258
3259 err = hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
3260
3261 spin_unlock_bh(&adapter->mbx_lock);
3262
3263 /* if check for link returns error we will need to reset */
3264 if (err && time_after(jiffies, adapter->last_reset + (10 * HZ))) {
d5dd7c3f 3265 set_bit(__IXGBEVF_RESET_REQUESTED, &adapter->state);
e66c92ad
ET		 3266 link_up = false;
3267 }
3268
3269 adapter->link_up = link_up;
3270 adapter->link_speed = link_speed;
92915f71
GR		 3271}
3272
e66c92ad
ET		 3273/**
3274 * ixgbevf_watchdog_link_is_up - update netif_carrier status and
3275 * print link up message
dec0d8e4 3276 * @adapter: pointer to the device adapter structure
e66c92ad
ET		 3277 **/
3278static void ixgbevf_watchdog_link_is_up(struct ixgbevf_adapter *adapter)
92915f71 3279{
e66c92ad 3280 struct net_device *netdev = adapter->netdev;
92915f71 3281
e66c92ad
ET		 3282 /* only continue if link was previously down */
3283 if (netif_carrier_ok(netdev))
92915f71
GR		 3284 return;
3285
e66c92ad
ET		 3286 dev_info(&adapter->pdev->dev, "NIC Link is Up %s\n",
3287 (adapter->link_speed == IXGBE_LINK_SPEED_10GB_FULL) ?
3288 "10 Gbps" :
3289 (adapter->link_speed == IXGBE_LINK_SPEED_1GB_FULL) ?
3290 "1 Gbps" :
3291 (adapter->link_speed == IXGBE_LINK_SPEED_100_FULL) ?
3292 "100 Mbps" :
3293 "unknown speed");
92915f71 3294
e66c92ad
ET		 3295 netif_carrier_on(netdev);
3296}
3297
3298/**
3299 * ixgbevf_watchdog_link_is_down - update netif_carrier status and
3300 * print link down message
dec0d8e4 3301 * @adapter: pointer to the adapter structure
e66c92ad
ET		 3302 **/
3303static void ixgbevf_watchdog_link_is_down(struct ixgbevf_adapter *adapter)
3304{
3305 struct net_device *netdev = adapter->netdev;
3306
3307 adapter->link_speed = 0;
3308
3309 /* only continue if link was up previously */
3310 if (!netif_carrier_ok(netdev))
3311 return;
3312
3313 dev_info(&adapter->pdev->dev, "NIC Link is Down\n");
3314
3315 netif_carrier_off(netdev);
92915f71
GR		 3316}
3317
3318/**
9ac5c5cc 3319 * ixgbevf_watchdog_subtask - worker thread to bring link up
e23cf38f 3320 * @adapter: board private structure
9ac5c5cc
ET		 3321 **/
3322static void ixgbevf_watchdog_subtask(struct ixgbevf_adapter *adapter)
3323{
3324 /* if interface is down do nothing */
3325 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
3326 test_bit(__IXGBEVF_RESETTING, &adapter->state))
3327 return;
3328
3329 ixgbevf_watchdog_update_link(adapter);
3330
443ebdd6 3331 if (adapter->link_up && adapter->link_state)
9ac5c5cc
ET		 3332 ixgbevf_watchdog_link_is_up(adapter);
3333 else
3334 ixgbevf_watchdog_link_is_down(adapter);
3335
3336 ixgbevf_update_stats(adapter);
3337}
3338
3339/**
3340 * ixgbevf_service_task - manages and runs subtasks
92915f71
GR		 3341 * @work: pointer to work_struct containing our data
3342 **/
9ac5c5cc 3343static void ixgbevf_service_task(struct work_struct *work)
92915f71
GR		 3344{
3345 struct ixgbevf_adapter *adapter = container_of(work,
3346 struct ixgbevf_adapter,
9ac5c5cc 3347 service_task);
92915f71 3348 struct ixgbe_hw *hw = &adapter->hw;
92915f71 3349
26597802
MR		 3350 if (IXGBE_REMOVED(hw->hw_addr)) {
3351 if (!test_bit(__IXGBEVF_DOWN, &adapter->state)) {
3352 rtnl_lock();
3353 ixgbevf_down(adapter);
3354 rtnl_unlock();
3355 }
3356 return;
3357 }
e66c92ad 3358
220fe050 3359 ixgbevf_queue_reset_subtask(adapter);
9ac5c5cc
ET		 3360 ixgbevf_reset_subtask(adapter);
3361 ixgbevf_watchdog_subtask(adapter);
e66c92ad
ET		 3362 ixgbevf_check_hang_subtask(adapter);
3363
9ac5c5cc 3364 ixgbevf_service_event_complete(adapter);
92915f71
GR		 3365}
3366
3367/**
3368 * ixgbevf_free_tx_resources - Free Tx Resources per Queue
92915f71
GR		 3369 * @tx_ring: Tx descriptor ring for a specific queue
3370 *
3371 * Free all transmit software resources
3372 **/
05d063aa 3373void ixgbevf_free_tx_resources(struct ixgbevf_ring *tx_ring)
92915f71 3374{
05d063aa 3375 ixgbevf_clean_tx_ring(tx_ring);
92915f71
GR		 3376
3377 vfree(tx_ring->tx_buffer_info);
3378 tx_ring->tx_buffer_info = NULL;
3379
de02decb
DS		 3380 /* if not set, then don't free */
3381 if (!tx_ring->desc)
3382 return;
3383
05d063aa 3384 dma_free_coherent(tx_ring->dev, tx_ring->size, tx_ring->desc,
2a1f8794 3385 tx_ring->dma);
92915f71
GR		 3386
3387 tx_ring->desc = NULL;
3388}
3389
3390/**
3391 * ixgbevf_free_all_tx_resources - Free Tx Resources for All Queues
3392 * @adapter: board private structure
3393 *
3394 * Free all transmit software resources
3395 **/
3396static void ixgbevf_free_all_tx_resources(struct ixgbevf_adapter *adapter)
3397{
3398 int i;
3399
3400 for (i = 0; i < adapter->num_tx_queues; i++)
87e70ab9 3401 if (adapter->tx_ring[i]->desc)
05d063aa 3402 ixgbevf_free_tx_resources(adapter->tx_ring[i]);
21092e9c
TN		 3403 for (i = 0; i < adapter->num_xdp_queues; i++)
3404 if (adapter->xdp_ring[i]->desc)
3405 ixgbevf_free_tx_resources(adapter->xdp_ring[i]);
92915f71
GR		 3406}
3407
3408/**
3409 * ixgbevf_setup_tx_resources - allocate Tx resources (Descriptors)
dec0d8e4 3410 * @tx_ring: Tx descriptor ring (for a specific queue) to setup
92915f71
GR		 3411 *
3412 * Return 0 on success, negative on failure
3413 **/
05d063aa 3414int ixgbevf_setup_tx_resources(struct ixgbevf_ring *tx_ring)
92915f71 3415{
4ad6af02 3416 struct ixgbevf_adapter *adapter = netdev_priv(tx_ring->netdev);
92915f71
GR		 3417 int size;
3418
3419 size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count;
865a4d98 3420 tx_ring->tx_buffer_info = vmalloc(size);
92915f71
GR		 3421 if (!tx_ring->tx_buffer_info)
3422 goto err;
92915f71 3423
7c3a4626
FF		 3424 u64_stats_init(&tx_ring->syncp);
3425
92915f71
GR		 3426 /* round up to nearest 4K */
3427 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
3428 tx_ring->size = ALIGN(tx_ring->size, 4096);
3429
05d063aa 3430 tx_ring->desc = dma_alloc_coherent(tx_ring->dev, tx_ring->size,
2a1f8794 3431 &tx_ring->dma, GFP_KERNEL);
92915f71
GR		 3432 if (!tx_ring->desc)
3433 goto err;
3434
92915f71
GR		 3435 return 0;
3436
3437err:
3438 vfree(tx_ring->tx_buffer_info);
3439 tx_ring->tx_buffer_info = NULL;
dec0d8e4 3440 hw_dbg(&adapter->hw, "Unable to allocate memory for the transmit descriptor ring\n");
92915f71
GR		 3441 return -ENOMEM;
3442}
3443
3444/**
3445 * ixgbevf_setup_all_tx_resources - allocate all queues Tx resources
3446 * @adapter: board private structure
3447 *
3448 * If this function returns with an error, then it's possible one or
3449 * more of the rings is populated (while the rest are not). It is the
3450 * callers duty to clean those orphaned rings.
3451 *
3452 * Return 0 on success, negative on failure
3453 **/
3454static int ixgbevf_setup_all_tx_resources(struct ixgbevf_adapter *adapter)
3455{
21092e9c 3456 int i, j = 0, err = 0;
92915f71
GR		 3457
3458 for (i = 0; i < adapter->num_tx_queues; i++) {
05d063aa 3459 err = ixgbevf_setup_tx_resources(adapter->tx_ring[i]);
92915f71
GR		 3460 if (!err)
3461 continue;
dec0d8e4 3462 hw_dbg(&adapter->hw, "Allocation for Tx Queue %u failed\n", i);
f2d00eca 3463 goto err_setup_tx;
92915f71
GR		 3464 }
3465
21092e9c
TN		 3466 for (j = 0; j < adapter->num_xdp_queues; j++) {
3467 err = ixgbevf_setup_tx_resources(adapter->xdp_ring[j]);
3468 if (!err)
3469 continue;
3470 hw_dbg(&adapter->hw, "Allocation for XDP Queue %u failed\n", j);
39035bfd 3471 goto err_setup_tx;
21092e9c
TN		 3472 }
3473
f2d00eca
ET		 3474 return 0;
3475err_setup_tx:
3476 /* rewind the index freeing the rings as we go */
21092e9c
TN		 3477 while (j--)
3478 ixgbevf_free_tx_resources(adapter->xdp_ring[j]);
f2d00eca
ET		 3479 while (i--)
3480 ixgbevf_free_tx_resources(adapter->tx_ring[i]);
21092e9c 3481
92915f71
GR		 3482 return err;
3483}
3484
3485/**
3486 * ixgbevf_setup_rx_resources - allocate Rx resources (Descriptors)
c7aec596 3487 * @adapter: board private structure
dec0d8e4 3488 * @rx_ring: Rx descriptor ring (for a specific queue) to setup
92915f71
GR		 3489 *
3490 * Returns 0 on success, negative on failure
3491 **/
c7aec596
TN		 3492int ixgbevf_setup_rx_resources(struct ixgbevf_adapter *adapter,
3493 struct ixgbevf_ring *rx_ring)
92915f71 3494{
92915f71
GR		 3495 int size;
3496
3497 size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
40b8178b 3498 rx_ring->rx_buffer_info = vmalloc(size);
e404decb 3499 if (!rx_ring->rx_buffer_info)
05d063aa 3500 goto err;
92915f71 3501
7c3a4626
FF		 3502 u64_stats_init(&rx_ring->syncp);
3503
92915f71
GR		 3504 /* Round up to nearest 4K */
3505 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
3506 rx_ring->size = ALIGN(rx_ring->size, 4096);
3507
05d063aa 3508 rx_ring->desc = dma_alloc_coherent(rx_ring->dev, rx_ring->size,
2a1f8794 3509 &rx_ring->dma, GFP_KERNEL);
92915f71 3510
05d063aa
ET		 3511 if (!rx_ring->desc)
3512 goto err;
92915f71 3513
c7aec596
TN		 3514 /* XDP RX-queue info */
3515 if (xdp_rxq_info_reg(&rx_ring->xdp_rxq, adapter->netdev,
b02e5a0e 3516 rx_ring->queue_index, 0) < 0)
c7aec596
TN		 3517 goto err;
3518
3519 rx_ring->xdp_prog = adapter->xdp_prog;
3520
92915f71 3521 return 0;
05d063aa
ET		 3522err:
3523 vfree(rx_ring->rx_buffer_info);
3524 rx_ring->rx_buffer_info = NULL;
3525 dev_err(rx_ring->dev, "Unable to allocate memory for the Rx descriptor ring\n");
92915f71
GR		 3526 return -ENOMEM;
3527}
3528
3529/**
3530 * ixgbevf_setup_all_rx_resources - allocate all queues Rx resources
3531 * @adapter: board private structure
3532 *
3533 * If this function returns with an error, then it's possible one or
3534 * more of the rings is populated (while the rest are not). It is the
3535 * callers duty to clean those orphaned rings.
3536 *
3537 * Return 0 on success, negative on failure
3538 **/
3539static int ixgbevf_setup_all_rx_resources(struct ixgbevf_adapter *adapter)
3540{
3541 int i, err = 0;
3542
3543 for (i = 0; i < adapter->num_rx_queues; i++) {
c7aec596 3544 err = ixgbevf_setup_rx_resources(adapter, adapter->rx_ring[i]);
92915f71
GR		 3545 if (!err)
3546 continue;
dec0d8e4 3547 hw_dbg(&adapter->hw, "Allocation for Rx Queue %u failed\n", i);
f2d00eca 3548 goto err_setup_rx;
92915f71 3549 }
f2d00eca
ET		 3550
3551 return 0;
3552err_setup_rx:
3553 /* rewind the index freeing the rings as we go */
3554 while (i--)
3555 ixgbevf_free_rx_resources(adapter->rx_ring[i]);
92915f71
GR		 3556 return err;
3557}
3558
3559/**
3560 * ixgbevf_free_rx_resources - Free Rx Resources
92915f71
GR		 3561 * @rx_ring: ring to clean the resources from
3562 *
3563 * Free all receive software resources
3564 **/
05d063aa 3565void ixgbevf_free_rx_resources(struct ixgbevf_ring *rx_ring)
92915f71 3566{
05d063aa 3567 ixgbevf_clean_rx_ring(rx_ring);
92915f71 3568
c7aec596
TN		 3569 rx_ring->xdp_prog = NULL;
3570 xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
92915f71
GR		 3571 vfree(rx_ring->rx_buffer_info);
3572 rx_ring->rx_buffer_info = NULL;
3573
05d063aa 3574 dma_free_coherent(rx_ring->dev, rx_ring->size, rx_ring->desc,
2a1f8794 3575 rx_ring->dma);
92915f71
GR		 3576
3577 rx_ring->desc = NULL;
3578}
3579
3580/**
3581 * ixgbevf_free_all_rx_resources - Free Rx Resources for All Queues
3582 * @adapter: board private structure
3583 *
3584 * Free all receive software resources
3585 **/
3586static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter)
3587{
3588 int i;
3589
3590 for (i = 0; i < adapter->num_rx_queues; i++)
87e70ab9 3591 if (adapter->rx_ring[i]->desc)
05d063aa 3592 ixgbevf_free_rx_resources(adapter->rx_ring[i]);
92915f71
GR		 3593}
3594
3595/**
3596 * ixgbevf_open - Called when a network interface is made active
3597 * @netdev: network interface device structure
3598 *
3599 * Returns 0 on success, negative value on failure
3600 *
3601 * The open entry point is called when a network interface is made
3602 * active by the system (IFF_UP). At this point all resources needed
3603 * for transmit and receive operations are allocated, the interrupt
3604 * handler is registered with the OS, the watchdog timer is started,
3605 * and the stack is notified that the interface is ready.
3606 **/
324d0867 3607int ixgbevf_open(struct net_device *netdev)
92915f71
GR		 3608{
3609 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3610 struct ixgbe_hw *hw = &adapter->hw;
3611 int err;
3612
a1f6c6b1 3613 /* A previous failure to open the device because of a lack of
3614 * available MSIX vector resources may have reset the number
3615 * of msix vectors variable to zero. The only way to recover
3616 * is to unload/reload the driver and hope that the system has
3617 * been able to recover some MSIX vector resources.
3618 */
3619 if (!adapter->num_msix_vectors)
3620 return -ENOMEM;
3621
92915f71
GR		 3622 if (hw->adapter_stopped) {
3623 ixgbevf_reset(adapter);
3624 /* if adapter is still stopped then PF isn't up and
dec0d8e4
JK		 3625 * the VF can't start.
3626 */
92915f71
GR		 3627 if (hw->adapter_stopped) {
3628 err = IXGBE_ERR_MBX;
dec0d8e4 3629 pr_err("Unable to start - perhaps the PF Driver isn't up yet\n");
92915f71
GR		 3630 goto err_setup_reset;
3631 }
3632 }
3633
d9bdb57f
ET		 3634 /* disallow open during test */
3635 if (test_bit(__IXGBEVF_TESTING, &adapter->state))
3636 return -EBUSY;
3637
3638 netif_carrier_off(netdev);
3639
92915f71
GR		 3640 /* allocate transmit descriptors */
3641 err = ixgbevf_setup_all_tx_resources(adapter);
3642 if (err)
3643 goto err_setup_tx;
3644
3645 /* allocate receive descriptors */
3646 err = ixgbevf_setup_all_rx_resources(adapter);
3647 if (err)
3648 goto err_setup_rx;
3649
3650 ixgbevf_configure(adapter);
3651
92915f71
GR		 3652 err = ixgbevf_request_irq(adapter);
3653 if (err)
3654 goto err_req_irq;
3655
f2d00eca
ET		 3656 /* Notify the stack of the actual queue counts. */
3657 err = netif_set_real_num_tx_queues(netdev, adapter->num_tx_queues);
3658 if (err)
3659 goto err_set_queues;
3660
3661 err = netif_set_real_num_rx_queues(netdev, adapter->num_rx_queues);
3662 if (err)
3663 goto err_set_queues;
3664
d9bdb57f 3665 ixgbevf_up_complete(adapter);
92915f71
GR		 3666
3667 return 0;
3668
f2d00eca
ET		 3669err_set_queues:
3670 ixgbevf_free_irq(adapter);
92915f71 3671err_req_irq:
92915f71 3672 ixgbevf_free_all_rx_resources(adapter);
f2d00eca 3673err_setup_rx:
92915f71 3674 ixgbevf_free_all_tx_resources(adapter);
f2d00eca 3675err_setup_tx:
92915f71 3676 ixgbevf_reset(adapter);
92915f71
GR		 3677err_setup_reset:
3678
3679 return err;
3680}
3681
b19cf6ee
ET		 3682/**
3683 * ixgbevf_close_suspend - actions necessary to both suspend and close flows
3684 * @adapter: the private adapter struct
3685 *
3686 * This function should contain the necessary work common to both suspending
3687 * and closing of the device.
3688 */
3689static void ixgbevf_close_suspend(struct ixgbevf_adapter *adapter)
3690{
3691 ixgbevf_down(adapter);
3692 ixgbevf_free_irq(adapter);
3693 ixgbevf_free_all_tx_resources(adapter);
3694 ixgbevf_free_all_rx_resources(adapter);
3695}
3696
92915f71
GR		 3697/**
3698 * ixgbevf_close - Disables a network interface
3699 * @netdev: network interface device structure
3700 *
3701 * Returns 0, this is not allowed to fail
3702 *
3703 * The close entry point is called when an interface is de-activated
3704 * by the OS. The hardware is still under the drivers control, but
3705 * needs to be disabled. A global MAC reset is issued to stop the
3706 * hardware, and all transmit and receive resources are freed.
3707 **/
324d0867 3708int ixgbevf_close(struct net_device *netdev)
92915f71
GR		 3709{
3710 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3711
b19cf6ee
ET		 3712 if (netif_device_present(netdev))
3713 ixgbevf_close_suspend(adapter);
92915f71
GR		 3714
3715 return 0;
3716}
3717
220fe050
DS		 3718static void ixgbevf_queue_reset_subtask(struct ixgbevf_adapter *adapter)
3719{
3720 struct net_device *dev = adapter->netdev;
3721
d5dd7c3f
ET		 3722 if (!test_and_clear_bit(__IXGBEVF_QUEUE_RESET_REQUESTED,
3723 &adapter->state))
220fe050
DS		 3724 return;
3725
220fe050
DS		 3726 /* if interface is down do nothing */
3727 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
3728 test_bit(__IXGBEVF_RESETTING, &adapter->state))
3729 return;
3730
3731 /* Hardware has to reinitialize queues and interrupts to
3732 * match packet buffer alignment. Unfortunately, the
3733 * hardware is not flexible enough to do this dynamically.
3734 */
2dad7b27
ET		 3735 rtnl_lock();
3736
220fe050
DS		 3737 if (netif_running(dev))
3738 ixgbevf_close(dev);
3739
3740 ixgbevf_clear_interrupt_scheme(adapter);
3741 ixgbevf_init_interrupt_scheme(adapter);
3742
3743 if (netif_running(dev))
3744 ixgbevf_open(dev);
2dad7b27
ET		 3745
3746 rtnl_unlock();
220fe050
DS		 3747}
3748
70a10e25 3749static void ixgbevf_tx_ctxtdesc(struct ixgbevf_ring *tx_ring,
7f68d430
SN		 3750 u32 vlan_macip_lens, u32 fceof_saidx,
3751 u32 type_tucmd, u32 mss_l4len_idx)
92915f71
GR		 3752{
3753 struct ixgbe_adv_tx_context_desc *context_desc;
70a10e25 3754 u16 i = tx_ring->next_to_use;
92915f71 3755
70a10e25 3756 context_desc = IXGBEVF_TX_CTXTDESC(tx_ring, i);
92915f71 3757
70a10e25
AD		 3758 i++;
3759 tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
92915f71 3760
70a10e25
AD		 3761 /* set bits to identify this as an advanced context descriptor */
3762 type_tucmd |= IXGBE_TXD_CMD_DEXT | IXGBE_ADVTXD_DTYP_CTXT;
92915f71 3763
70a10e25 3764 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
7f68d430 3765 context_desc->fceof_saidx = cpu_to_le32(fceof_saidx);
70a10e25
AD		 3766 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd);
3767 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
3768}
3769
3770static int ixgbevf_tso(struct ixgbevf_ring *tx_ring,
7ad1a093 3771 struct ixgbevf_tx_buffer *first,
7f68d430
SN		 3772 u8 *hdr_len,
3773 struct ixgbevf_ipsec_tx_data *itd)
70a10e25 3774{
b83e3010 3775 u32 vlan_macip_lens, type_tucmd, mss_l4len_idx;
7ad1a093 3776 struct sk_buff *skb = first->skb;
b83e3010
AD		 3777 union {
3778 struct iphdr *v4;
3779 struct ipv6hdr *v6;
3780 unsigned char *hdr;
3781 } ip;
3782 union {
3783 struct tcphdr *tcp;
3784 unsigned char *hdr;
3785 } l4;
3786 u32 paylen, l4_offset;
7f68d430 3787 u32 fceof_saidx = 0;
8f12c034 3788 int err;
70a10e25 3789
01a545cf
ET		 3790 if (skb->ip_summed != CHECKSUM_PARTIAL)
3791 return 0;
3792
70a10e25
AD		 3793 if (!skb_is_gso(skb))
3794 return 0;
92915f71 3795
8f12c034
FR		 3796 err = skb_cow_head(skb, 0);
3797 if (err < 0)
3798 return err;
92915f71 3799
2a20525b
SP		 3800 if (eth_p_mpls(first->protocol))
3801 ip.hdr = skb_inner_network_header(skb);
3802 else
3803 ip.hdr = skb_network_header(skb);
b83e3010
AD		 3804 l4.hdr = skb_checksum_start(skb);
3805
70a10e25
AD		 3806 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
3807 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
3808
b83e3010
AD		 3809 /* initialize outer IP header fields */
3810 if (ip.v4->version == 4) {
c54cdc31
AD		 3811 unsigned char *csum_start = skb_checksum_start(skb);
3812 unsigned char *trans_start = ip.hdr + (ip.v4->ihl * 4);
7f68d430 3813 int len = csum_start - trans_start;
c54cdc31 3814
b83e3010 3815 /* IP header will have to cancel out any data that
7f68d430
SN		 3816 * is not a part of the outer IP header, so set to
3817 * a reverse csum if needed, else init check to 0.
b83e3010 3818 */
7f68d430
SN		 3819 ip.v4->check = (skb_shinfo(skb)->gso_type & SKB_GSO_PARTIAL) ?
3820 csum_fold(csum_partial(trans_start,
3821 len, 0)) : 0;
70a10e25 3822 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
b83e3010
AD		 3823
3824 ip.v4->tot_len = 0;
7ad1a093
ET		 3825 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
3826 IXGBE_TX_FLAGS_CSUM |
3827 IXGBE_TX_FLAGS_IPV4;
b83e3010
AD		 3828 } else {
3829 ip.v6->payload_len = 0;
7ad1a093
ET		 3830 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
3831 IXGBE_TX_FLAGS_CSUM;
70a10e25
AD		 3832 }
3833
b83e3010
AD		 3834 /* determine offset of inner transport header */
3835 l4_offset = l4.hdr - skb->data;
3836
3837 /* compute length of segmentation header */
3838 *hdr_len = (l4.tcp->doff * 4) + l4_offset;
70a10e25 3839
b83e3010
AD		 3840 /* remove payload length from inner checksum */
3841 paylen = skb->len - l4_offset;
de844713 3842 csum_replace_by_diff(&l4.tcp->check, (__force __wsum)htonl(paylen));
b83e3010
AD		 3843
3844 /* update gso size and bytecount with header size */
7ad1a093
ET		 3845 first->gso_segs = skb_shinfo(skb)->gso_segs;
3846 first->bytecount += (first->gso_segs - 1) * *hdr_len;
3847
70a10e25 3848 /* mss_l4len_id: use 1 as index for TSO */
b83e3010 3849 mss_l4len_idx = (*hdr_len - l4_offset) << IXGBE_ADVTXD_L4LEN_SHIFT;
70a10e25 3850 mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
8d055cc0 3851 mss_l4len_idx |= (1u << IXGBE_ADVTXD_IDX_SHIFT);
70a10e25 3852
7f68d430
SN		 3853 fceof_saidx |= itd->pfsa;
3854 type_tucmd |= itd->flags | itd->trailer_len;
3855
70a10e25 3856 /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
b83e3010
AD		 3857 vlan_macip_lens = l4.hdr - ip.hdr;
3858 vlan_macip_lens |= (ip.hdr - skb->data) << IXGBE_ADVTXD_MACLEN_SHIFT;
7ad1a093 3859 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
70a10e25 3860
7f68d430
SN		 3861 ixgbevf_tx_ctxtdesc(tx_ring, vlan_macip_lens, fceof_saidx, type_tucmd,
3862 mss_l4len_idx);
70a10e25
AD		 3863
3864 return 1;
92915f71
GR		 3865}
3866
7ad1a093 3867static void ixgbevf_tx_csum(struct ixgbevf_ring *tx_ring,
7f68d430
SN		 3868 struct ixgbevf_tx_buffer *first,
3869 struct ixgbevf_ipsec_tx_data *itd)
92915f71 3870{
7ad1a093 3871 struct sk_buff *skb = first->skb;
70a10e25 3872 u32 vlan_macip_lens = 0;
7f68d430 3873 u32 fceof_saidx = 0;
70a10e25 3874 u32 type_tucmd = 0;
92915f71 3875
cb2b3edb
AD		 3876 if (skb->ip_summed != CHECKSUM_PARTIAL)
3877 goto no_csum;
92915f71 3878
cb2b3edb
AD		 3879 switch (skb->csum_offset) {
3880 case offsetof(struct tcphdr, check):
3881 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
5463fce6 3882 fallthrough;
cb2b3edb
AD		 3883 case offsetof(struct udphdr, check):
3884 break;
3885 case offsetof(struct sctphdr, checksum):
3886 /* validate that this is actually an SCTP request */
fc186d0a 3887 if (skb_csum_is_sctp(skb)) {
cb2b3edb 3888 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_SCTP;
70a10e25 3889 break;
70a10e25 3890 }
5463fce6 3891 fallthrough;
cb2b3edb
AD		 3892 default:
3893 skb_checksum_help(skb);
3894 goto no_csum;
92915f71 3895 }
7fb94bd5
SB		 3896
3897 if (first->protocol == htons(ETH_P_IP))
3898 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
3899
cb2b3edb
AD		 3900 /* update TX checksum flag */
3901 first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
3902 vlan_macip_lens = skb_checksum_start_offset(skb) -
3903 skb_network_offset(skb);
d34a614a 3904no_csum:
70a10e25
AD		 3905 /* vlan_macip_lens: MACLEN, VLAN tag */
3906 vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
7ad1a093 3907 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
70a10e25 3908
7f68d430
SN		 3909 fceof_saidx |= itd->pfsa;
3910 type_tucmd |= itd->flags | itd->trailer_len;
3911
3912 ixgbevf_tx_ctxtdesc(tx_ring, vlan_macip_lens,
3913 fceof_saidx, type_tucmd, 0);
92915f71
GR		 3914}
3915
29d37fa1 3916static __le32 ixgbevf_tx_cmd_type(u32 tx_flags)
92915f71 3917{
29d37fa1
ET		 3918 /* set type for advanced descriptor with frame checksum insertion */
3919 __le32 cmd_type = cpu_to_le32(IXGBE_ADVTXD_DTYP_DATA |
3920 IXGBE_ADVTXD_DCMD_IFCS |
3921 IXGBE_ADVTXD_DCMD_DEXT);
92915f71 3922
dec0d8e4 3923 /* set HW VLAN bit if VLAN is present */
29d37fa1
ET		 3924 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3925 cmd_type |= cpu_to_le32(IXGBE_ADVTXD_DCMD_VLE);
92915f71 3926
29d37fa1
ET		 3927 /* set segmentation enable bits for TSO/FSO */
3928 if (tx_flags & IXGBE_TX_FLAGS_TSO)
3929 cmd_type |= cpu_to_le32(IXGBE_ADVTXD_DCMD_TSE);
92915f71 3930
29d37fa1
ET		 3931 return cmd_type;
3932}
92915f71 3933
29d37fa1
ET		 3934static void ixgbevf_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
3935 u32 tx_flags, unsigned int paylen)
3936{
3937 __le32 olinfo_status = cpu_to_le32(paylen << IXGBE_ADVTXD_PAYLEN_SHIFT);
9bdfefd2 3938
29d37fa1
ET		 3939 /* enable L4 checksum for TSO and TX checksum offload */
3940 if (tx_flags & IXGBE_TX_FLAGS_CSUM)
3941 olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_POPTS_TXSM);
92915f71 3942
29d37fa1
ET		 3943 /* enble IPv4 checksum for TSO */
3944 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
3945 olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_POPTS_IXSM);
92915f71 3946
7f68d430
SN		 3947 /* enable IPsec */
3948 if (tx_flags & IXGBE_TX_FLAGS_IPSEC)
3949 olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_POPTS_IPSEC);
3950
3951 /* use index 1 context for TSO/FSO/FCOE/IPSEC */
3952 if (tx_flags & (IXGBE_TX_FLAGS_TSO | IXGBE_TX_FLAGS_IPSEC))
8d055cc0 3953 olinfo_status |= cpu_to_le32(1u << IXGBE_ADVTXD_IDX_SHIFT);
92915f71 3954
29d37fa1
ET		 3955 /* Check Context must be set if Tx switch is enabled, which it
3956 * always is for case where virtual functions are running
3957 */
3958 olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_CC);
92915f71 3959
29d37fa1
ET		 3960 tx_desc->read.olinfo_status = olinfo_status;
3961}
92915f71 3962
29d37fa1
ET		 3963static void ixgbevf_tx_map(struct ixgbevf_ring *tx_ring,
3964 struct ixgbevf_tx_buffer *first,
3965 const u8 hdr_len)
3966{
29d37fa1
ET		 3967 struct sk_buff *skb = first->skb;
3968 struct ixgbevf_tx_buffer *tx_buffer;
3969 union ixgbe_adv_tx_desc *tx_desc;
d7840976 3970 skb_frag_t *frag;
6f355454
ET		 3971 dma_addr_t dma;
3972 unsigned int data_len, size;
29d37fa1 3973 u32 tx_flags = first->tx_flags;
6f355454 3974 __le32 cmd_type = ixgbevf_tx_cmd_type(tx_flags);
29d37fa1 3975 u16 i = tx_ring->next_to_use;
9bdfefd2 3976
29d37fa1 3977 tx_desc = IXGBEVF_TX_DESC(tx_ring, i);
92915f71 3978
6f355454
ET		 3979 ixgbevf_tx_olinfo_status(tx_desc, tx_flags, skb->len - hdr_len);
3980
3981 size = skb_headlen(skb);
3982 data_len = skb->data_len;
7ad1a093 3983
29d37fa1 3984 dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
92915f71 3985
6f355454 3986 tx_buffer = first;
92915f71 3987
6f355454
ET		 3988 for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
3989 if (dma_mapping_error(tx_ring->dev, dma))
3990 goto dma_error;
3991
3992 /* record length, and DMA address */
3993 dma_unmap_len_set(tx_buffer, len, size);
3994 dma_unmap_addr_set(tx_buffer, dma, dma);
3995
3996 tx_desc->read.buffer_addr = cpu_to_le64(dma);
92915f71 3997
29d37fa1
ET		 3998 while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
3999 tx_desc->read.cmd_type_len =
4000 cmd_type | cpu_to_le32(IXGBE_MAX_DATA_PER_TXD);
92915f71 4001
29d37fa1
ET		 4002 i++;
4003 tx_desc++;
4004 if (i == tx_ring->count) {
4005 tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
4006 i = 0;
4007 }
6f355454 4008 tx_desc->read.olinfo_status = 0;
92915f71 4009
29d37fa1
ET		 4010 dma += IXGBE_MAX_DATA_PER_TXD;
4011 size -= IXGBE_MAX_DATA_PER_TXD;
92915f71 4012
29d37fa1 4013 tx_desc->read.buffer_addr = cpu_to_le64(dma);
29d37fa1 4014 }
92915f71 4015
29d37fa1
ET		 4016 if (likely(!data_len))
4017 break;
92915f71 4018
29d37fa1 4019 tx_desc->read.cmd_type_len = cmd_type | cpu_to_le32(size);
92915f71 4020
29d37fa1
ET		 4021 i++;
4022 tx_desc++;
4023 if (i == tx_ring->count) {
4024 tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
4025 i = 0;
4026 }
6f355454 4027 tx_desc->read.olinfo_status = 0;
92915f71 4028
29d37fa1
ET		 4029 size = skb_frag_size(frag);
4030 data_len -= size;
92915f71 4031
29d37fa1
ET		 4032 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
4033 DMA_TO_DEVICE);
70a10e25 4034
29d37fa1 4035 tx_buffer = &tx_ring->tx_buffer_info[i];
70a10e25 4036 }
92915f71 4037
29d37fa1
ET		 4038 /* write last descriptor with RS and EOP bits */
4039 cmd_type |= cpu_to_le32(size) | cpu_to_le32(IXGBE_TXD_CMD);
4040 tx_desc->read.cmd_type_len = cmd_type;
4041
4042 /* set the timestamp */
4043 first->time_stamp = jiffies;
4044
9fc145fc
JK		 4045 skb_tx_timestamp(skb);
4046
29d37fa1
ET		 4047 /* Force memory writes to complete before letting h/w know there
4048 * are new descriptors to fetch. (Only applicable for weak-ordered
4049 * memory model archs, such as IA-64).
4050 *
4051 * We also need this memory barrier (wmb) to make certain all of the
4052 * status bits have been updated before next_to_watch is written.
70a10e25 4053 */
29d37fa1 4054 wmb();
92915f71 4055
29d37fa1
ET		 4056 /* set next_to_watch value indicating a packet is present */
4057 first->next_to_watch = tx_desc;
92915f71 4058
29d37fa1
ET		 4059 i++;
4060 if (i == tx_ring->count)
4061 i = 0;
9bdfefd2 4062
29d37fa1 4063 tx_ring->next_to_use = i;
92915f71 4064
29d37fa1 4065 /* notify HW of packet */
06380db6 4066 ixgbevf_write_tail(tx_ring, i);
29d37fa1
ET		 4067
4068 return;
4069dma_error:
4070 dev_err(tx_ring->dev, "TX DMA map failed\n");
865a4d98 4071 tx_buffer = &tx_ring->tx_buffer_info[i];
29d37fa1
ET		 4072
4073 /* clear dma mappings for failed tx_buffer_info map */
865a4d98
ET		 4074 while (tx_buffer != first) {
4075 if (dma_unmap_len(tx_buffer, len))
4076 dma_unmap_page(tx_ring->dev,
4077 dma_unmap_addr(tx_buffer, dma),
4078 dma_unmap_len(tx_buffer, len),
4079 DMA_TO_DEVICE);
4080 dma_unmap_len_set(tx_buffer, len, 0);
4081
4082 if (i-- == 0)
4083 i += tx_ring->count;
29d37fa1 4084 tx_buffer = &tx_ring->tx_buffer_info[i];
29d37fa1 4085 }
92915f71 4086
865a4d98
ET		 4087 if (dma_unmap_len(tx_buffer, len))
4088 dma_unmap_single(tx_ring->dev,
4089 dma_unmap_addr(tx_buffer, dma),
4090 dma_unmap_len(tx_buffer, len),
4091 DMA_TO_DEVICE);
4092 dma_unmap_len_set(tx_buffer, len, 0);
4093
4094 dev_kfree_skb_any(tx_buffer->skb);
4095 tx_buffer->skb = NULL;
4096
92915f71 4097 tx_ring->next_to_use = i;
92915f71
GR		 4098}
4099
fb40195c 4100static int __ixgbevf_maybe_stop_tx(struct ixgbevf_ring *tx_ring, int size)
92915f71 4101{
fb40195c 4102 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
92915f71
GR		 4103 /* Herbert's original patch had:
4104 * smp_mb__after_netif_stop_queue();
dec0d8e4
JK		 4105 * but since that doesn't exist yet, just open code it.
4106 */
92915f71
GR		 4107 smp_mb();
4108
4109 /* We need to check again in a case another CPU has just
dec0d8e4
JK		 4110 * made room available.
4111 */
f880d07b 4112 if (likely(ixgbevf_desc_unused(tx_ring) < size))
92915f71
GR		 4113 return -EBUSY;
4114
4115 /* A reprieve! - use start_queue because it doesn't call schedule */
fb40195c 4116 netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
095e2617
ET		 4117 ++tx_ring->tx_stats.restart_queue;
4118
92915f71
GR		 4119 return 0;
4120}
4121
fb40195c 4122static int ixgbevf_maybe_stop_tx(struct ixgbevf_ring *tx_ring, int size)
92915f71 4123{
f880d07b 4124 if (likely(ixgbevf_desc_unused(tx_ring) >= size))
92915f71 4125 return 0;
fb40195c 4126 return __ixgbevf_maybe_stop_tx(tx_ring, size);
92915f71
GR		 4127}
4128
5cc0f1c0
ET		 4129static int ixgbevf_xmit_frame_ring(struct sk_buff *skb,
4130 struct ixgbevf_ring *tx_ring)
92915f71 4131{
7ad1a093 4132 struct ixgbevf_tx_buffer *first;
7ad1a093
ET		 4133 int tso;
4134 u32 tx_flags = 0;
3595990a 4135 u16 count = TXD_USE_COUNT(skb_headlen(skb));
7f68d430 4136 struct ixgbevf_ipsec_tx_data ipsec_tx = { 0 };
3595990a
AD		 4137#if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
4138 unsigned short f;
4139#endif
7ad1a093 4140 u8 hdr_len = 0;
f9d08f16 4141 u8 *dst_mac = skb_header_pointer(skb, 0, 0, NULL);
7ad1a093 4142
46acc460 4143 if (!dst_mac || is_link_local_ether_addr(dst_mac)) {
e7fcd543 4144 dev_kfree_skb_any(skb);
f9d08f16
GR		 4145 return NETDEV_TX_OK;
4146 }
92915f71 4147
dec0d8e4 4148 /* need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
3595990a
AD		 4149 * + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
4150 * + 2 desc gap to keep tail from touching head,
4151 * + 1 desc for context descriptor,
4152 * otherwise try next time
4153 */
4154#if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
d601be97
QC		 4155 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++) {
4156 skb_frag_t *frag = &skb_shinfo(skb)->frags[f];
4157
4158 count += TXD_USE_COUNT(skb_frag_size(frag));
4159 }
3595990a
AD		 4160#else
4161 count += skb_shinfo(skb)->nr_frags;
4162#endif
fb40195c 4163 if (ixgbevf_maybe_stop_tx(tx_ring, count + 3)) {
095e2617 4164 tx_ring->tx_stats.tx_busy++;
3595990a
AD		 4165 return NETDEV_TX_BUSY;
4166 }
4167
7ad1a093
ET		 4168 /* record the location of the first descriptor for this packet */
4169 first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
4170 first->skb = skb;
4171 first->bytecount = skb->len;
4172 first->gso_segs = 1;
4173
df8a39de
JP		 4174 if (skb_vlan_tag_present(skb)) {
4175 tx_flags |= skb_vlan_tag_get(skb);
92915f71
GR		 4176 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
4177 tx_flags |= IXGBE_TX_FLAGS_VLAN;
4178 }
4179
7ad1a093
ET		 4180 /* record initial flags and protocol */
4181 first->tx_flags = tx_flags;
4182 first->protocol = vlan_get_protocol(skb);
92915f71 4183
48e01e00 4184#ifdef CONFIG_IXGBEVF_IPSEC
8f6617ba 4185 if (xfrm_offload(skb) && !ixgbevf_ipsec_tx(tx_ring, first, &ipsec_tx))
7f68d430
SN		 4186 goto out_drop;
4187#endif
4188 tso = ixgbevf_tso(tx_ring, first, &hdr_len, &ipsec_tx);
7ad1a093
ET		 4189 if (tso < 0)
4190 goto out_drop;
b5d217f3 4191 else if (!tso)
7f68d430 4192 ixgbevf_tx_csum(tx_ring, first, &ipsec_tx);
92915f71 4193
29d37fa1 4194 ixgbevf_tx_map(tx_ring, first, hdr_len);
70a10e25 4195
fb40195c 4196 ixgbevf_maybe_stop_tx(tx_ring, DESC_NEEDED);
92915f71 4197
7ad1a093
ET		 4198 return NETDEV_TX_OK;
4199
4200out_drop:
4201 dev_kfree_skb_any(first->skb);
4202 first->skb = NULL;
4203
92915f71
GR		 4204 return NETDEV_TX_OK;
4205}
4206
cf12aab6 4207static netdev_tx_t ixgbevf_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
5cc0f1c0
ET		 4208{
4209 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
4210 struct ixgbevf_ring *tx_ring;
4211
4212 if (skb->len <= 0) {
4213 dev_kfree_skb_any(skb);
4214 return NETDEV_TX_OK;
4215 }
4216
4217 /* The minimum packet size for olinfo paylen is 17 so pad the skb
4218 * in order to meet this minimum size requirement.
4219 */
4220 if (skb->len < 17) {
4221 if (skb_padto(skb, 17))
4222 return NETDEV_TX_OK;
4223 skb->len = 17;
4224 }
4225
4226 tx_ring = adapter->tx_ring[skb->queue_mapping];
4227 return ixgbevf_xmit_frame_ring(skb, tx_ring);
4228}
4229
92915f71
GR		 4230/**
4231 * ixgbevf_set_mac - Change the Ethernet Address of the NIC
4232 * @netdev: network interface device structure
4233 * @p: pointer to an address structure
4234 *
4235 * Returns 0 on success, negative on failure
4236 **/
4237static int ixgbevf_set_mac(struct net_device *netdev, void *p)
4238{
4239 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
4240 struct ixgbe_hw *hw = &adapter->hw;
4241 struct sockaddr *addr = p;
32ca6868 4242 int err;
92915f71
GR		 4243
4244 if (!is_valid_ether_addr(addr->sa_data))
4245 return -EADDRNOTAVAIL;
4246
55fdd45b 4247 spin_lock_bh(&adapter->mbx_lock);
1c55ed76 4248
32ca6868 4249 err = hw->mac.ops.set_rar(hw, 0, addr->sa_data, 0);
92915f71 4250
55fdd45b 4251 spin_unlock_bh(&adapter->mbx_lock);
1c55ed76 4252
32ca6868
ET		 4253 if (err)
4254 return -EPERM;
4255
4256 ether_addr_copy(hw->mac.addr, addr->sa_data);
6e7d0ba1 4257 ether_addr_copy(hw->mac.perm_addr, addr->sa_data);
f3956ebb 4258 eth_hw_addr_set(netdev, addr->sa_data);
32ca6868 4259
92915f71
GR		 4260 return 0;
4261}
4262
4263/**
4264 * ixgbevf_change_mtu - Change the Maximum Transfer Unit
4265 * @netdev: network interface device structure
4266 * @new_mtu: new value for maximum frame size
4267 *
4268 * Returns 0 on success, negative on failure
4269 **/
4270static int ixgbevf_change_mtu(struct net_device *netdev, int new_mtu)
4271{
4272 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
bad17234 4273 struct ixgbe_hw *hw = &adapter->hw;
92915f71 4274 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
6a11e52b 4275 int ret;
69bfbec4 4276
c7aec596
TN		 4277 /* prevent MTU being changed to a size unsupported by XDP */
4278 if (adapter->xdp_prog) {
4279 dev_warn(&adapter->pdev->dev, "MTU cannot be changed while XDP program is loaded\n");
4280 return -EPERM;
4281 }
4282
14b22cd9 4283 spin_lock_bh(&adapter->mbx_lock);
6a11e52b
TN		 4284 /* notify the PF of our intent to use this size of frame */
4285 ret = hw->mac.ops.set_rlpml(hw, max_frame);
14b22cd9 4286 spin_unlock_bh(&adapter->mbx_lock);
6a11e52b
TN		 4287 if (ret)
4288 return -EINVAL;
4289
bad17234 4290 hw_dbg(hw, "changing MTU from %d to %d\n",
92915f71 4291 netdev->mtu, new_mtu);
6a11e52b 4292
92915f71 4293 /* must set new MTU before calling down or up */
1eb2cded 4294 WRITE_ONCE(netdev->mtu, new_mtu);
92915f71 4295
1ab37e12
ET		 4296 if (netif_running(netdev))
4297 ixgbevf_reinit_locked(adapter);
4298
92915f71
GR		 4299 return 0;
4300}
4301
75a3f93b 4302static int ixgbevf_suspend(struct device *dev_d)
92915f71 4303{
bac66317 4304 struct net_device *netdev = dev_get_drvdata(dev_d);
92915f71
GR		 4305 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
4306
2dad7b27 4307 rtnl_lock();
92915f71
GR		 4308 netif_device_detach(netdev);
4309
b19cf6ee
ET		 4310 if (netif_running(netdev))
4311 ixgbevf_close_suspend(adapter);
4312
4313 ixgbevf_clear_interrupt_scheme(adapter);
2dad7b27 4314 rtnl_unlock();
92915f71 4315
0ac1e8ce
AD		 4316 return 0;
4317}
4318
75a3f93b 4319static int ixgbevf_resume(struct device *dev_d)
0ac1e8ce 4320{
bac66317 4321 struct pci_dev *pdev = to_pci_dev(dev_d);
27ae2967
WY		 4322 struct net_device *netdev = pci_get_drvdata(pdev);
4323 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
0ac1e8ce
AD		 4324 u32 err;
4325
26403b7f 4326 adapter->hw.hw_addr = adapter->io_addr;
4e857c58 4327 smp_mb__before_atomic();
bc0c7151 4328 clear_bit(__IXGBEVF_DISABLED, &adapter->state);
0ac1e8ce
AD		 4329 pci_set_master(pdev);
4330
798e381a
DS		 4331 ixgbevf_reset(adapter);
4332
0ac1e8ce
AD		 4333 rtnl_lock();
4334 err = ixgbevf_init_interrupt_scheme(adapter);
f2d00eca
ET		 4335 if (!err && netif_running(netdev))
4336 err = ixgbevf_open(netdev);
0ac1e8ce 4337 rtnl_unlock();
f2d00eca 4338 if (err)
0ac1e8ce 4339 return err;
0ac1e8ce
AD		 4340
4341 netif_device_attach(netdev);
4342
4343 return err;
4344}
4345
0ac1e8ce
AD		 4346static void ixgbevf_shutdown(struct pci_dev *pdev)
4347{
bac66317 4348 ixgbevf_suspend(&pdev->dev);
92915f71
GR		 4349}
4350
21092e9c
TN		 4351static void ixgbevf_get_tx_ring_stats(struct rtnl_link_stats64 *stats,
4352 const struct ixgbevf_ring *ring)
4353{
4354 u64 bytes, packets;
4355 unsigned int start;
4356
4357 if (ring) {
4358 do {
068c38ad 4359 start = u64_stats_fetch_begin(&ring->syncp);
21092e9c
TN		 4360 bytes = ring->stats.bytes;
4361 packets = ring->stats.packets;
068c38ad 4362 } while (u64_stats_fetch_retry(&ring->syncp, start));
21092e9c
TN		 4363 stats->tx_bytes += bytes;
4364 stats->tx_packets += packets;
4365 }
4366}
4367
bc1f4470 4368static void ixgbevf_get_stats(struct net_device *netdev,
4369 struct rtnl_link_stats64 *stats)
4197aa7b
ED		 4370{
4371 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
4372 unsigned int start;
4373 u64 bytes, packets;
4374 const struct ixgbevf_ring *ring;
4375 int i;
4376
4377 ixgbevf_update_stats(adapter);
4378
4379 stats->multicast = adapter->stats.vfmprc - adapter->stats.base_vfmprc;
4380
21c046e4 4381 rcu_read_lock();
4197aa7b 4382 for (i = 0; i < adapter->num_rx_queues; i++) {
87e70ab9 4383 ring = adapter->rx_ring[i];
4197aa7b 4384 do {
068c38ad 4385 start = u64_stats_fetch_begin(&ring->syncp);
095e2617
ET		 4386 bytes = ring->stats.bytes;
4387 packets = ring->stats.packets;
068c38ad 4388 } while (u64_stats_fetch_retry(&ring->syncp, start));
4197aa7b
ED		 4389 stats->rx_bytes += bytes;
4390 stats->rx_packets += packets;
4391 }
4392
4393 for (i = 0; i < adapter->num_tx_queues; i++) {
87e70ab9 4394 ring = adapter->tx_ring[i];
21092e9c
TN		 4395 ixgbevf_get_tx_ring_stats(stats, ring);
4396 }
4397
4398 for (i = 0; i < adapter->num_xdp_queues; i++) {
4399 ring = adapter->xdp_ring[i];
4400 ixgbevf_get_tx_ring_stats(stats, ring);
4197aa7b 4401 }
21c046e4 4402 rcu_read_unlock();
4197aa7b
ED		 4403}
4404
b83e3010
AD		 4405#define IXGBEVF_MAX_MAC_HDR_LEN 127
4406#define IXGBEVF_MAX_NETWORK_HDR_LEN 511
4407
4408static netdev_features_t
4409ixgbevf_features_check(struct sk_buff *skb, struct net_device *dev,
4410 netdev_features_t features)
4411{
4412 unsigned int network_hdr_len, mac_hdr_len;
4413
4414 /* Make certain the headers can be described by a context descriptor */
80bfab79 4415 mac_hdr_len = skb_network_offset(skb);
b83e3010
AD		 4416 if (unlikely(mac_hdr_len > IXGBEVF_MAX_MAC_HDR_LEN))
4417 return features & ~(NETIF_F_HW_CSUM |
4418 NETIF_F_SCTP_CRC |
4419 NETIF_F_HW_VLAN_CTAG_TX |
4420 NETIF_F_TSO |
4421 NETIF_F_TSO6);
4422
4423 network_hdr_len = skb_checksum_start(skb) - skb_network_header(skb);
4424 if (unlikely(network_hdr_len > IXGBEVF_MAX_NETWORK_HDR_LEN))
4425 return features & ~(NETIF_F_HW_CSUM |
4426 NETIF_F_SCTP_CRC |
4427 NETIF_F_TSO |
4428 NETIF_F_TSO6);
4429
4430 /* We can only support IPV4 TSO in tunnels if we can mangle the
4431 * inner IP ID field, so strip TSO if MANGLEID is not supported.
4432 */
4433 if (skb->encapsulation && !(features & NETIF_F_TSO_MANGLEID))
4434 features &= ~NETIF_F_TSO;
4435
4436 return features;
4437}
4438
c7aec596
TN		 4439static int ixgbevf_xdp_setup(struct net_device *dev, struct bpf_prog *prog)
4440{
4441 int i, frame_size = dev->mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
4442 struct ixgbevf_adapter *adapter = netdev_priv(dev);
4443 struct bpf_prog *old_prog;
4444
4445 /* verify ixgbevf ring attributes are sufficient for XDP */
4446 for (i = 0; i < adapter->num_rx_queues; i++) {
4447 struct ixgbevf_ring *ring = adapter->rx_ring[i];
4448
4449 if (frame_size > ixgbevf_rx_bufsz(ring))
4450 return -EINVAL;
4451 }
4452
4453 old_prog = xchg(&adapter->xdp_prog, prog);
21092e9c
TN		 4454
4455 /* If transitioning XDP modes reconfigure rings */
4456 if (!!prog != !!old_prog) {
4457 /* Hardware has to reinitialize queues and interrupts to
4458 * match packet buffer alignment. Unfortunately, the
4459 * hardware is not flexible enough to do this dynamically.
4460 */
4461 if (netif_running(dev))
4462 ixgbevf_close(dev);
4463
4464 ixgbevf_clear_interrupt_scheme(adapter);
4465 ixgbevf_init_interrupt_scheme(adapter);
4466
4467 if (netif_running(dev))
4468 ixgbevf_open(dev);
4469 } else {
4470 for (i = 0; i < adapter->num_rx_queues; i++)
4471 xchg(&adapter->rx_ring[i]->xdp_prog, adapter->xdp_prog);
4472 }
c7aec596
TN		 4473
4474 if (old_prog)
4475 bpf_prog_put(old_prog);
4476
4477 return 0;
4478}
4479
4480static int ixgbevf_xdp(struct net_device *dev, struct netdev_bpf *xdp)
4481{
c7aec596
TN		 4482 switch (xdp->command) {
4483 case XDP_SETUP_PROG:
4484 return ixgbevf_xdp_setup(dev, xdp->prog);
c7aec596
TN		 4485 default:
4486 return -EINVAL;
4487 }
4488}
4489
0ac1e8ce 4490static const struct net_device_ops ixgbevf_netdev_ops = {
c12db769
SH		 4491 .ndo_open = ixgbevf_open,
4492 .ndo_stop = ixgbevf_close,
4493 .ndo_start_xmit = ixgbevf_xmit_frame,
4494 .ndo_set_rx_mode = ixgbevf_set_rx_mode,
4197aa7b 4495 .ndo_get_stats64 = ixgbevf_get_stats,
92915f71 4496 .ndo_validate_addr = eth_validate_addr,
c12db769
SH		 4497 .ndo_set_mac_address = ixgbevf_set_mac,
4498 .ndo_change_mtu = ixgbevf_change_mtu,
4499 .ndo_tx_timeout = ixgbevf_tx_timeout,
c12db769
SH		 4500 .ndo_vlan_rx_add_vid = ixgbevf_vlan_rx_add_vid,
4501 .ndo_vlan_rx_kill_vid = ixgbevf_vlan_rx_kill_vid,
b83e3010 4502 .ndo_features_check = ixgbevf_features_check,
c7aec596 4503 .ndo_bpf = ixgbevf_xdp,
92915f71 4504};
92915f71
GR		 4505
4506static void ixgbevf_assign_netdev_ops(struct net_device *dev)
4507{
0ac1e8ce 4508 dev->netdev_ops = &ixgbevf_netdev_ops;
92915f71
GR		 4509 ixgbevf_set_ethtool_ops(dev);
4510 dev->watchdog_timeo = 5 * HZ;
4511}
4512
4513/**
4514 * ixgbevf_probe - Device Initialization Routine
4515 * @pdev: PCI device information struct
4516 * @ent: entry in ixgbevf_pci_tbl
4517 *
4518 * Returns 0 on success, negative on failure
4519 *
4520 * ixgbevf_probe initializes an adapter identified by a pci_dev structure.
4521 * The OS initialization, configuring of the adapter private structure,
4522 * and a hardware reset occur.
4523 **/
1dd06ae8 4524static int ixgbevf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
92915f71
GR		 4525{
4526 struct net_device *netdev;
4527 struct ixgbevf_adapter *adapter = NULL;
4528 struct ixgbe_hw *hw = NULL;
4529 const struct ixgbevf_info *ii = ixgbevf_info_tbl[ent->driver_data];
0333464f 4530 bool disable_dev = false;
90b83d01 4531 int err;
92915f71
GR		 4532
4533 err = pci_enable_device(pdev);
4534 if (err)
4535 return err;
4536
90b83d01
CJ		 4537 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
4538 if (err) {
4539 dev_err(&pdev->dev, "No usable DMA configuration, aborting\n");
4540 goto err_dma;
92915f71
GR		 4541 }
4542
4543 err = pci_request_regions(pdev, ixgbevf_driver_name);
4544 if (err) {
4545 dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err);
4546 goto err_pci_reg;
4547 }
4548
4549 pci_set_master(pdev);
4550
92915f71
GR		 4551 netdev = alloc_etherdev_mq(sizeof(struct ixgbevf_adapter),
4552 MAX_TX_QUEUES);
92915f71
GR		 4553 if (!netdev) {
4554 err = -ENOMEM;
4555 goto err_alloc_etherdev;
4556 }
4557
4558 SET_NETDEV_DEV(netdev, &pdev->dev);
4559
92915f71
GR		 4560 adapter = netdev_priv(netdev);
4561
4562 adapter->netdev = netdev;
4563 adapter->pdev = pdev;
4564 hw = &adapter->hw;
4565 hw->back = adapter;
b3f4d599 4566 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
92915f71 4567
dec0d8e4 4568 /* call save state here in standalone driver because it relies on
92915f71
GR		 4569 * adapter struct to exist, and needs to call netdev_priv
4570 */
4571 pci_save_state(pdev);
4572
4573 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
4574 pci_resource_len(pdev, 0));
dbf8b0d8 4575 adapter->io_addr = hw->hw_addr;
92915f71
GR		 4576 if (!hw->hw_addr) {
4577 err = -EIO;
4578 goto err_ioremap;
4579 }
4580
4581 ixgbevf_assign_netdev_ops(netdev);
4582
dec0d8e4 4583 /* Setup HW API */
92915f71
GR		 4584 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
4585 hw->mac.type = ii->mac;
4586
9c9463c2 4587 memcpy(&hw->mbx.ops, &ixgbevf_mbx_ops_legacy,
f416dfc0 4588 sizeof(struct ixgbe_mbx_operations));
92915f71 4589
92915f71
GR		 4590 /* setup the private structure */
4591 err = ixgbevf_sw_init(adapter);
1a0d6ae5
DK		 4592 if (err)
4593 goto err_sw_init;
4594
4595 /* The HW MAC address was set and/or determined in sw_init */
1a0d6ae5
DK		 4596 if (!is_valid_ether_addr(netdev->dev_addr)) {
4597 pr_err("invalid MAC address\n");
4598 err = -EIO;
4599 goto err_sw_init;
4600 }
92915f71 4601
471a76de 4602 netdev->hw_features = NETIF_F_SG |
dec0d8e4
JK		 4603 NETIF_F_TSO |
4604 NETIF_F_TSO6 |
cb2b3edb
AD		 4605 NETIF_F_RXCSUM |
4606 NETIF_F_HW_CSUM |
4607 NETIF_F_SCTP_CRC;
471a76de 4608
b83e3010
AD		 4609#define IXGBEVF_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \
4610 NETIF_F_GSO_GRE_CSUM | \
7e13318d 4611 NETIF_F_GSO_IPXIP4 | \
bf2d1df3 4612 NETIF_F_GSO_IPXIP6 | \
b83e3010
AD		 4613 NETIF_F_GSO_UDP_TUNNEL | \
4614 NETIF_F_GSO_UDP_TUNNEL_CSUM)
92915f71 4615
b83e3010
AD		 4616 netdev->gso_partial_features = IXGBEVF_GSO_PARTIAL_FEATURES;
4617 netdev->hw_features |= NETIF_F_GSO_PARTIAL |
4618 IXGBEVF_GSO_PARTIAL_FEATURES;
cb2b3edb 4619
90b83d01 4620 netdev->features = netdev->hw_features | NETIF_F_HIGHDMA;
92915f71 4621
b83e3010 4622 netdev->vlan_features |= netdev->features | NETIF_F_TSO_MANGLEID;
2a20525b
SP		 4623 netdev->mpls_features |= NETIF_F_SG |
4624 NETIF_F_TSO |
4625 NETIF_F_TSO6 |
4626 NETIF_F_HW_CSUM;
4627 netdev->mpls_features |= IXGBEVF_GSO_PARTIAL_FEATURES;
b83e3010
AD		 4628 netdev->hw_enc_features |= netdev->vlan_features;
4629
4630 /* set this bit last since it cannot be part of vlan_features */
4631 netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER |
4632 NETIF_F_HW_VLAN_CTAG_RX |
4633 NETIF_F_HW_VLAN_CTAG_TX;
4634
01789349 4635 netdev->priv_flags |= IFF_UNICAST_FLT;
66c0e13a 4636 netdev->xdp_features = NETDEV_XDP_ACT_BASIC;
01789349 4637
91c527a5
JW		 4638 /* MTU range: 68 - 1504 or 9710 */
4639 netdev->min_mtu = ETH_MIN_MTU;
4640 switch (adapter->hw.api_version) {
4641 case ixgbe_mbox_api_11:
4642 case ixgbe_mbox_api_12:
41e544cd 4643 case ixgbe_mbox_api_13:
7f68d430 4644 case ixgbe_mbox_api_14:
339f2896 4645 case ixgbe_mbox_api_15:
91c527a5
JW		 4646 netdev->max_mtu = IXGBE_MAX_JUMBO_FRAME_SIZE -
4647 (ETH_HLEN + ETH_FCS_LEN);
4648 break;
4649 default:
4650 if (adapter->hw.mac.type != ixgbe_mac_82599_vf)
4651 netdev->max_mtu = IXGBE_MAX_JUMBO_FRAME_SIZE -
4652 (ETH_HLEN + ETH_FCS_LEN);
4653 else
4654 netdev->max_mtu = ETH_DATA_LEN + ETH_FCS_LEN;
4655 break;
4656 }
4657
ea699569
MR		 4658 if (IXGBE_REMOVED(hw->hw_addr)) {
4659 err = -EIO;
4660 goto err_sw_init;
4661 }
9ac5c5cc 4662
26566eae 4663 timer_setup(&adapter->service_timer, ixgbevf_service_timer, 0);
9ac5c5cc
ET		 4664
4665 INIT_WORK(&adapter->service_task, ixgbevf_service_task);
4666 set_bit(__IXGBEVF_SERVICE_INITED, &adapter->state);
4667 clear_bit(__IXGBEVF_SERVICE_SCHED, &adapter->state);
92915f71
GR		 4668
4669 err = ixgbevf_init_interrupt_scheme(adapter);
4670 if (err)
4671 goto err_sw_init;
4672
92915f71
GR		 4673 strcpy(netdev->name, "eth%d");
4674
4675 err = register_netdev(netdev);
4676 if (err)
4677 goto err_register;
4678
0333464f 4679 pci_set_drvdata(pdev, netdev);
5d426ad1 4680 netif_carrier_off(netdev);
7f68d430 4681 ixgbevf_init_ipsec_offload(adapter);
5d426ad1 4682
33bd9f60
GR		 4683 ixgbevf_init_last_counter_stats(adapter);
4684
47068b0d
ET		 4685 /* print the VF info */
4686 dev_info(&pdev->dev, "%pM\n", netdev->dev_addr);
4687 dev_info(&pdev->dev, "MAC: %d\n", hw->mac.type);
92915f71 4688
47068b0d
ET		 4689 switch (hw->mac.type) {
4690 case ixgbe_mac_X550_vf:
4691 dev_info(&pdev->dev, "Intel(R) X550 Virtual Function\n");
4692 break;
4693 case ixgbe_mac_X540_vf:
4694 dev_info(&pdev->dev, "Intel(R) X540 Virtual Function\n");
4695 break;
4696 case ixgbe_mac_82599_vf:
4697 default:
4698 dev_info(&pdev->dev, "Intel(R) 82599 Virtual Function\n");
4699 break;
4700 }
92915f71 4701
92915f71
GR		 4702 return 0;
4703
4704err_register:
0ac1e8ce 4705 ixgbevf_clear_interrupt_scheme(adapter);
92915f71
GR		 4706err_sw_init:
4707 ixgbevf_reset_interrupt_capability(adapter);
dbf8b0d8 4708 iounmap(adapter->io_addr);
e60ae003 4709 kfree(adapter->rss_key);
92915f71 4710err_ioremap:
0333464f 4711 disable_dev = !test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state);
92915f71
GR		 4712 free_netdev(netdev);
4713err_alloc_etherdev:
4714 pci_release_regions(pdev);
4715err_pci_reg:
4716err_dma:
0333464f 4717 if (!adapter || disable_dev)
bc0c7151 4718 pci_disable_device(pdev);
92915f71
GR		 4719 return err;
4720}
4721
4722/**
4723 * ixgbevf_remove - Device Removal Routine
4724 * @pdev: PCI device information struct
4725 *
4726 * ixgbevf_remove is called by the PCI subsystem to alert the driver
4727 * that it should release a PCI device. The could be caused by a
4728 * Hot-Plug event, or because the driver is going to be removed from
4729 * memory.
4730 **/
9f9a12f8 4731static void ixgbevf_remove(struct pci_dev *pdev)
92915f71
GR		 4732{
4733 struct net_device *netdev = pci_get_drvdata(pdev);
0333464f
ET		 4734 struct ixgbevf_adapter *adapter;
4735 bool disable_dev;
4736
4737 if (!netdev)
4738 return;
4739
4740 adapter = netdev_priv(netdev);
92915f71 4741
2e7cfbdd 4742 set_bit(__IXGBEVF_REMOVING, &adapter->state);
9ac5c5cc 4743 cancel_work_sync(&adapter->service_task);
92915f71 4744
fd13a9ab 4745 if (netdev->reg_state == NETREG_REGISTERED)
92915f71 4746 unregister_netdev(netdev);
92915f71 4747
7f68d430 4748 ixgbevf_stop_ipsec_offload(adapter);
0ac1e8ce 4749 ixgbevf_clear_interrupt_scheme(adapter);
92915f71
GR		 4750 ixgbevf_reset_interrupt_capability(adapter);
4751
dbf8b0d8 4752 iounmap(adapter->io_addr);
92915f71
GR		 4753 pci_release_regions(pdev);
4754
4755 hw_dbg(&adapter->hw, "Remove complete\n");
4756
e60ae003 4757 kfree(adapter->rss_key);
0333464f 4758 disable_dev = !test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state);
92915f71
GR		 4759 free_netdev(netdev);
4760
0333464f 4761 if (disable_dev)
bc0c7151 4762 pci_disable_device(pdev);
92915f71
GR		 4763}
4764
9f19f31d
AD		 4765/**
4766 * ixgbevf_io_error_detected - called when PCI error is detected
4767 * @pdev: Pointer to PCI device
4768 * @state: The current pci connection state
4769 *
4770 * This function is called after a PCI bus error affecting
4771 * this device has been detected.
dec0d8e4 4772 **/
9f19f31d
AD		 4773static pci_ers_result_t ixgbevf_io_error_detected(struct pci_dev *pdev,
4774 pci_channel_state_t state)
4775{
4776 struct net_device *netdev = pci_get_drvdata(pdev);
4777 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
4778
9ac5c5cc 4779 if (!test_bit(__IXGBEVF_SERVICE_INITED, &adapter->state))
ea699569
MR		 4780 return PCI_ERS_RESULT_DISCONNECT;
4781
bc0c7151 4782 rtnl_lock();
9f19f31d
AD		 4783 netif_device_detach(netdev);
4784
b212d815
MR		 4785 if (netif_running(netdev))
4786 ixgbevf_close_suspend(adapter);
4787
bc0c7151
MR		 4788 if (state == pci_channel_io_perm_failure) {
4789 rtnl_unlock();
9f19f31d 4790 return PCI_ERS_RESULT_DISCONNECT;
bc0c7151 4791 }
9f19f31d 4792
bc0c7151
MR		 4793 if (!test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state))
4794 pci_disable_device(pdev);
4795 rtnl_unlock();
9f19f31d 4796
8bfb7869 4797 /* Request a slot reset. */
9f19f31d
AD		 4798 return PCI_ERS_RESULT_NEED_RESET;
4799}
4800
4801/**
4802 * ixgbevf_io_slot_reset - called after the pci bus has been reset.
4803 * @pdev: Pointer to PCI device
4804 *
4805 * Restart the card from scratch, as if from a cold-boot. Implementation
4806 * resembles the first-half of the ixgbevf_resume routine.
dec0d8e4 4807 **/
9f19f31d
AD		 4808static pci_ers_result_t ixgbevf_io_slot_reset(struct pci_dev *pdev)
4809{
4810 struct net_device *netdev = pci_get_drvdata(pdev);
4811 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
4812
4813 if (pci_enable_device_mem(pdev)) {
4814 dev_err(&pdev->dev,
4815 "Cannot re-enable PCI device after reset.\n");
4816 return PCI_ERS_RESULT_DISCONNECT;
4817 }
4818
26403b7f 4819 adapter->hw.hw_addr = adapter->io_addr;
4e857c58 4820 smp_mb__before_atomic();
bc0c7151 4821 clear_bit(__IXGBEVF_DISABLED, &adapter->state);
9f19f31d
AD		 4822 pci_set_master(pdev);
4823
4824 ixgbevf_reset(adapter);
4825
4826 return PCI_ERS_RESULT_RECOVERED;
4827}
4828
4829/**
4830 * ixgbevf_io_resume - called when traffic can start flowing again.
4831 * @pdev: Pointer to PCI device
4832 *
4833 * This callback is called when the error recovery driver tells us that
4834 * its OK to resume normal operation. Implementation resembles the
4835 * second-half of the ixgbevf_resume routine.
dec0d8e4 4836 **/
9f19f31d
AD		 4837static void ixgbevf_io_resume(struct pci_dev *pdev)
4838{
4839 struct net_device *netdev = pci_get_drvdata(pdev);
9f19f31d 4840
b19cf6ee 4841 rtnl_lock();
9f19f31d 4842 if (netif_running(netdev))
b19cf6ee 4843 ixgbevf_open(netdev);
9f19f31d
AD		 4844
4845 netif_device_attach(netdev);
b19cf6ee 4846 rtnl_unlock();
9f19f31d
AD		 4847}
4848
4849/* PCI Error Recovery (ERS) */
3646f0e5 4850static const struct pci_error_handlers ixgbevf_err_handler = {
9f19f31d
AD		 4851 .error_detected = ixgbevf_io_error_detected,
4852 .slot_reset = ixgbevf_io_slot_reset,
4853 .resume = ixgbevf_io_resume,
4854};
4855
75a3f93b 4856static DEFINE_SIMPLE_DEV_PM_OPS(ixgbevf_pm_ops, ixgbevf_suspend, ixgbevf_resume);
bac66317 4857
92915f71 4858static struct pci_driver ixgbevf_driver = {
dec0d8e4
JK		 4859 .name = ixgbevf_driver_name,
4860 .id_table = ixgbevf_pci_tbl,
4861 .probe = ixgbevf_probe,
4862 .remove = ixgbevf_remove,
bac66317 4863
0ac1e8ce 4864 /* Power Management Hooks */
75a3f93b 4865 .driver.pm = pm_sleep_ptr(&ixgbevf_pm_ops),
bac66317 4866
dec0d8e4
JK		 4867 .shutdown = ixgbevf_shutdown,
4868 .err_handler = &ixgbevf_err_handler
92915f71
GR		 4869};
4870
4871/**
65d676c8 4872 * ixgbevf_init_module - Driver Registration Routine
92915f71 4873 *
65d676c8 4874 * ixgbevf_init_module is the first routine called when the driver is
92915f71
GR		 4875 * loaded. All it does is register with the PCI subsystem.
4876 **/
4877static int __init ixgbevf_init_module(void)
4878{
8cfa238a
SX		 4879 int err;
4880
34a2a3b8 4881 pr_info("%s\n", ixgbevf_driver_string);
dbd9636e 4882 pr_info("%s\n", ixgbevf_copyright);
40a13e24
MR		 4883 ixgbevf_wq = create_singlethread_workqueue(ixgbevf_driver_name);
4884 if (!ixgbevf_wq) {
4885 pr_err("%s: Failed to create workqueue\n", ixgbevf_driver_name);
4886 return -ENOMEM;
4887 }
92915f71 4888
8cfa238a
SX		 4889 err = pci_register_driver(&ixgbevf_driver);
4890 if (err) {
4891 destroy_workqueue(ixgbevf_wq);
4892 return err;
4893 }
4894
4895 return 0;
92915f71
GR		 4896}
4897
4898module_init(ixgbevf_init_module);
4899
4900/**
65d676c8 4901 * ixgbevf_exit_module - Driver Exit Cleanup Routine
92915f71 4902 *
65d676c8 4903 * ixgbevf_exit_module is called just before the driver is removed
92915f71
GR		 4904 * from memory.
4905 **/
4906static void __exit ixgbevf_exit_module(void)
4907{
4908 pci_unregister_driver(&ixgbevf_driver);
40a13e24
MR		 4909 if (ixgbevf_wq) {
4910 destroy_workqueue(ixgbevf_wq);
4911 ixgbevf_wq = NULL;
4912 }
92915f71
GR		 4913}
4914
4915#ifdef DEBUG
4916/**
65d676c8 4917 * ixgbevf_get_hw_dev_name - return device name string
92915f71 4918 * used by hardware layer to print debugging information
e23cf38f 4919 * @hw: pointer to private hardware struct
92915f71
GR		 4920 **/
4921char *ixgbevf_get_hw_dev_name(struct ixgbe_hw *hw)
4922{
4923 struct ixgbevf_adapter *adapter = hw->back;
dec0d8e4 4924
92915f71
GR		 4925 return adapter->netdev->name;
4926}
4927
4928#endif
4929module_exit(ixgbevf_exit_module);
4930
4931/* ixgbevf_main.c */
Linux 6.x block layer and io_uring tree(s)