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ixgbe/ixgbevf: fix XFRM_ALGO dependency
[linux-2.6-block.git] / drivers / net / ethernet / intel / ixgbevf / ixgbevf_main.c
CommitLineData
51dce24b
JK		 1// SPDX-License-Identifier: GPL-2.0
2/* Copyright(c) 1999 - 2018 Intel Corporation. */
92915f71 3
92915f71
GR		 4/******************************************************************************
5 Copyright (c)2006 - 2007 Myricom, Inc. for some LRO specific code
6******************************************************************************/
dbd9636e
JK		 7
8#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
9
92915f71 10#include <linux/types.h>
dadcd65f 11#include <linux/bitops.h>
92915f71
GR		 12#include <linux/module.h>
13#include <linux/pci.h>
14#include <linux/netdevice.h>
15#include <linux/vmalloc.h>
16#include <linux/string.h>
17#include <linux/in.h>
18#include <linux/ip.h>
19#include <linux/tcp.h>
70a10e25 20#include <linux/sctp.h>
92915f71 21#include <linux/ipv6.h>
5a0e3ad6 22#include <linux/slab.h>
92915f71
GR		 23#include <net/checksum.h>
24#include <net/ip6_checksum.h>
25#include <linux/ethtool.h>
01789349 26#include <linux/if.h>
92915f71 27#include <linux/if_vlan.h>
70c71606 28#include <linux/prefetch.h>
2a20525b 29#include <net/mpls.h>
c7aec596
TN		 30#include <linux/bpf.h>
31#include <linux/bpf_trace.h>
32#include <linux/atomic.h>
92915f71
GR		 33
34#include "ixgbevf.h"
35
3d8fe98f 36const char ixgbevf_driver_name[] = "ixgbevf";
92915f71 37static const char ixgbevf_driver_string[] =
422e05d1 38 "Intel(R) 10 Gigabit PCI Express Virtual Function Network Driver";
92915f71 39
adc2c83e 40#define DRV_VERSION "4.1.0-k"
92915f71 41const char ixgbevf_driver_version[] = DRV_VERSION;
66c87bd5 42static char ixgbevf_copyright[] =
7f68d430 43 "Copyright (c) 2009 - 2018 Intel Corporation.";
92915f71
GR		 44
45static const struct ixgbevf_info *ixgbevf_info_tbl[] = {
c6d45171
KS		 46 [board_82599_vf] = &ixgbevf_82599_vf_info,
47 [board_82599_vf_hv] = &ixgbevf_82599_vf_hv_info,
48 [board_X540_vf] = &ixgbevf_X540_vf_info,
49 [board_X540_vf_hv] = &ixgbevf_X540_vf_hv_info,
50 [board_X550_vf] = &ixgbevf_X550_vf_info,
51 [board_X550_vf_hv] = &ixgbevf_X550_vf_hv_info,
52 [board_X550EM_x_vf] = &ixgbevf_X550EM_x_vf_info,
53 [board_X550EM_x_vf_hv] = &ixgbevf_X550EM_x_vf_hv_info,
1d94f987 54 [board_x550em_a_vf] = &ixgbevf_x550em_a_vf_info,
92915f71
GR		 55};
56
57/* ixgbevf_pci_tbl - PCI Device ID Table
58 *
59 * Wildcard entries (PCI_ANY_ID) should come last
60 * Last entry must be all 0s
61 *
62 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
63 * Class, Class Mask, private data (not used) }
64 */
9baa3c34 65static const struct pci_device_id ixgbevf_pci_tbl[] = {
39ba22b4 66 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_VF), board_82599_vf },
c6d45171 67 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_VF_HV), board_82599_vf_hv },
39ba22b4 68 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540_VF), board_X540_vf },
c6d45171 69 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540_VF_HV), board_X540_vf_hv },
47068b0d 70 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550_VF), board_X550_vf },
c6d45171 71 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550_VF_HV), board_X550_vf_hv },
47068b0d 72 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_VF), board_X550EM_x_vf },
c6d45171 73 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_VF_HV), board_X550EM_x_vf_hv},
1d94f987 74 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_VF), board_x550em_a_vf },
92915f71
GR		 75 /* required last entry */
76 {0, }
77};
78MODULE_DEVICE_TABLE(pci, ixgbevf_pci_tbl);
79
80MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
b8ce18cd 81MODULE_DESCRIPTION("Intel(R) 10 Gigabit Virtual Function Network Driver");
98674ebe 82MODULE_LICENSE("GPL v2");
92915f71
GR		 83MODULE_VERSION(DRV_VERSION);
84
b3f4d599 85#define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
86static int debug = -1;
87module_param(debug, int, 0);
88MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
92915f71 89
40a13e24
MR		 90static struct workqueue_struct *ixgbevf_wq;
91
9ac5c5cc
ET		 92static void ixgbevf_service_event_schedule(struct ixgbevf_adapter *adapter)
93{
94 if (!test_bit(__IXGBEVF_DOWN, &adapter->state) &&
95 !test_bit(__IXGBEVF_REMOVING, &adapter->state) &&
96 !test_and_set_bit(__IXGBEVF_SERVICE_SCHED, &adapter->state))
40a13e24 97 queue_work(ixgbevf_wq, &adapter->service_task);
9ac5c5cc
ET		 98}
99
100static void ixgbevf_service_event_complete(struct ixgbevf_adapter *adapter)
101{
102 BUG_ON(!test_bit(__IXGBEVF_SERVICE_SCHED, &adapter->state));
103
104 /* flush memory to make sure state is correct before next watchdog */
105 smp_mb__before_atomic();
106 clear_bit(__IXGBEVF_SERVICE_SCHED, &adapter->state);
107}
108
92915f71 109/* forward decls */
220fe050 110static void ixgbevf_queue_reset_subtask(struct ixgbevf_adapter *adapter);
fa71ae27 111static void ixgbevf_set_itr(struct ixgbevf_q_vector *q_vector);
56e94095 112static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter);
925f5690
ET		 113static bool ixgbevf_can_reuse_rx_page(struct ixgbevf_rx_buffer *rx_buffer);
114static void ixgbevf_reuse_rx_page(struct ixgbevf_ring *rx_ring,
115 struct ixgbevf_rx_buffer *old_buff);
92915f71 116
dbf8b0d8
MR		 117static void ixgbevf_remove_adapter(struct ixgbe_hw *hw)
118{
119 struct ixgbevf_adapter *adapter = hw->back;
120
121 if (!hw->hw_addr)
122 return;
123 hw->hw_addr = NULL;
124 dev_err(&adapter->pdev->dev, "Adapter removed\n");
9ac5c5cc
ET		 125 if (test_bit(__IXGBEVF_SERVICE_INITED, &adapter->state))
126 ixgbevf_service_event_schedule(adapter);
dbf8b0d8
MR		 127}
128
129static void ixgbevf_check_remove(struct ixgbe_hw *hw, u32 reg)
130{
131 u32 value;
132
133 /* The following check not only optimizes a bit by not
134 * performing a read on the status register when the
135 * register just read was a status register read that
136 * returned IXGBE_FAILED_READ_REG. It also blocks any
137 * potential recursion.
138 */
139 if (reg == IXGBE_VFSTATUS) {
140 ixgbevf_remove_adapter(hw);
141 return;
142 }
32c74949 143 value = ixgbevf_read_reg(hw, IXGBE_VFSTATUS);
dbf8b0d8
MR		 144 if (value == IXGBE_FAILED_READ_REG)
145 ixgbevf_remove_adapter(hw);
146}
147
32c74949 148u32 ixgbevf_read_reg(struct ixgbe_hw *hw, u32 reg)
dbf8b0d8 149{
6aa7de05 150 u8 __iomem *reg_addr = READ_ONCE(hw->hw_addr);
dbf8b0d8
MR		 151 u32 value;
152
153 if (IXGBE_REMOVED(reg_addr))
154 return IXGBE_FAILED_READ_REG;
155 value = readl(reg_addr + reg);
156 if (unlikely(value == IXGBE_FAILED_READ_REG))
157 ixgbevf_check_remove(hw, reg);
158 return value;
159}
160
49ce9c2c 161/**
65d676c8 162 * ixgbevf_set_ivar - set IVAR registers - maps interrupt causes to vectors
92915f71
GR		 163 * @adapter: pointer to adapter struct
164 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
165 * @queue: queue to map the corresponding interrupt to
166 * @msix_vector: the vector to map to the corresponding queue
dec0d8e4 167 **/
92915f71
GR		 168static void ixgbevf_set_ivar(struct ixgbevf_adapter *adapter, s8 direction,
169 u8 queue, u8 msix_vector)
170{
171 u32 ivar, index;
172 struct ixgbe_hw *hw = &adapter->hw;
dec0d8e4 173
92915f71
GR		 174 if (direction == -1) {
175 /* other causes */
176 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
177 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR_MISC);
178 ivar &= ~0xFF;
179 ivar |= msix_vector;
180 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR_MISC, ivar);
181 } else {
dec0d8e4 182 /* Tx or Rx causes */
92915f71
GR		 183 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
184 index = ((16 * (queue & 1)) + (8 * direction));
185 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR(queue >> 1));
186 ivar &= ~(0xFF << index);
187 ivar |= (msix_vector << index);
188 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR(queue >> 1), ivar);
189 }
190}
191
e08400b7
ET		 192static u64 ixgbevf_get_tx_completed(struct ixgbevf_ring *ring)
193{
194 return ring->stats.packets;
195}
92915f71 196
e08400b7
ET		 197static u32 ixgbevf_get_tx_pending(struct ixgbevf_ring *ring)
198{
199 struct ixgbevf_adapter *adapter = netdev_priv(ring->netdev);
200 struct ixgbe_hw *hw = &adapter->hw;
92915f71 201
e08400b7
ET		 202 u32 head = IXGBE_READ_REG(hw, IXGBE_VFTDH(ring->reg_idx));
203 u32 tail = IXGBE_READ_REG(hw, IXGBE_VFTDT(ring->reg_idx));
204
205 if (head != tail)
206 return (head < tail) ?
207 tail - head : (tail + ring->count - head);
208
209 return 0;
210}
211
212static inline bool ixgbevf_check_tx_hang(struct ixgbevf_ring *tx_ring)
213{
214 u32 tx_done = ixgbevf_get_tx_completed(tx_ring);
215 u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
216 u32 tx_pending = ixgbevf_get_tx_pending(tx_ring);
217
218 clear_check_for_tx_hang(tx_ring);
219
220 /* Check for a hung queue, but be thorough. This verifies
221 * that a transmit has been completed since the previous
222 * check AND there is at least one packet pending. The
223 * ARMED bit is set to indicate a potential hang.
224 */
225 if ((tx_done_old == tx_done) && tx_pending) {
226 /* make sure it is true for two checks in a row */
227 return test_and_set_bit(__IXGBEVF_HANG_CHECK_ARMED,
228 &tx_ring->state);
229 }
230 /* reset the countdown */
231 clear_bit(__IXGBEVF_HANG_CHECK_ARMED, &tx_ring->state);
232
233 /* update completed stats and continue */
234 tx_ring->tx_stats.tx_done_old = tx_done;
235
236 return false;
237}
238
9ac5c5cc
ET		 239static void ixgbevf_tx_timeout_reset(struct ixgbevf_adapter *adapter)
240{
241 /* Do the reset outside of interrupt context */
242 if (!test_bit(__IXGBEVF_DOWN, &adapter->state)) {
d5dd7c3f 243 set_bit(__IXGBEVF_RESET_REQUESTED, &adapter->state);
9ac5c5cc
ET		 244 ixgbevf_service_event_schedule(adapter);
245 }
246}
247
e08400b7
ET		 248/**
249 * ixgbevf_tx_timeout - Respond to a Tx Hang
250 * @netdev: network interface device structure
251 **/
252static void ixgbevf_tx_timeout(struct net_device *netdev)
253{
254 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
255
9ac5c5cc 256 ixgbevf_tx_timeout_reset(adapter);
e08400b7 257}
92915f71
GR		 258
259/**
260 * ixgbevf_clean_tx_irq - Reclaim resources after transmit completes
fa71ae27 261 * @q_vector: board private structure
92915f71 262 * @tx_ring: tx ring to clean
8220bbc1 263 * @napi_budget: Used to determine if we are in netpoll
92915f71 264 **/
fa71ae27 265static bool ixgbevf_clean_tx_irq(struct ixgbevf_q_vector *q_vector,
8220bbc1 266 struct ixgbevf_ring *tx_ring, int napi_budget)
92915f71 267{
fa71ae27 268 struct ixgbevf_adapter *adapter = q_vector->adapter;
7ad1a093
ET		 269 struct ixgbevf_tx_buffer *tx_buffer;
270 union ixgbe_adv_tx_desc *tx_desc;
7f68d430 271 unsigned int total_bytes = 0, total_packets = 0, total_ipsec = 0;
7ad1a093
ET		 272 unsigned int budget = tx_ring->count / 2;
273 unsigned int i = tx_ring->next_to_clean;
92915f71 274
10cc1bdd
AD		 275 if (test_bit(__IXGBEVF_DOWN, &adapter->state))
276 return true;
277
7ad1a093
ET		 278 tx_buffer = &tx_ring->tx_buffer_info[i];
279 tx_desc = IXGBEVF_TX_DESC(tx_ring, i);
280 i -= tx_ring->count;
92915f71 281
e757e3e1 282 do {
7ad1a093 283 union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
e757e3e1
AD		 284
285 /* if next_to_watch is not set then there is no work pending */
286 if (!eop_desc)
287 break;
288
289 /* prevent any other reads prior to eop_desc */
ae0c585d 290 smp_rmb();
e757e3e1
AD		 291
292 /* if DD is not set pending work has not been completed */
293 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
294 break;
295
296 /* clear next_to_watch to prevent false hangs */
7ad1a093 297 tx_buffer->next_to_watch = NULL;
e757e3e1 298
7ad1a093
ET		 299 /* update the statistics for this packet */
300 total_bytes += tx_buffer->bytecount;
301 total_packets += tx_buffer->gso_segs;
7f68d430
SN		 302 if (tx_buffer->tx_flags & IXGBE_TX_FLAGS_IPSEC)
303 total_ipsec++;
92915f71 304
9bdfefd2 305 /* free the skb */
21092e9c
TN		 306 if (ring_is_xdp(tx_ring))
307 page_frag_free(tx_buffer->data);
308 else
309 napi_consume_skb(tx_buffer->skb, napi_budget);
9bdfefd2
ET		 310
311 /* unmap skb header data */
312 dma_unmap_single(tx_ring->dev,
313 dma_unmap_addr(tx_buffer, dma),
314 dma_unmap_len(tx_buffer, len),
315 DMA_TO_DEVICE);
316
7ad1a093 317 /* clear tx_buffer data */
9bdfefd2 318 dma_unmap_len_set(tx_buffer, len, 0);
92915f71 319
7ad1a093
ET		 320 /* unmap remaining buffers */
321 while (tx_desc != eop_desc) {
7ad1a093
ET		 322 tx_buffer++;
323 tx_desc++;
92915f71 324 i++;
7ad1a093
ET		 325 if (unlikely(!i)) {
326 i -= tx_ring->count;
327 tx_buffer = tx_ring->tx_buffer_info;
328 tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
329 }
e757e3e1 330
9bdfefd2
ET		 331 /* unmap any remaining paged data */
332 if (dma_unmap_len(tx_buffer, len)) {
333 dma_unmap_page(tx_ring->dev,
334 dma_unmap_addr(tx_buffer, dma),
335 dma_unmap_len(tx_buffer, len),
336 DMA_TO_DEVICE);
337 dma_unmap_len_set(tx_buffer, len, 0);
338 }
92915f71
GR		 339 }
340
7ad1a093
ET		 341 /* move us one more past the eop_desc for start of next pkt */
342 tx_buffer++;
343 tx_desc++;
344 i++;
345 if (unlikely(!i)) {
346 i -= tx_ring->count;
347 tx_buffer = tx_ring->tx_buffer_info;
348 tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
349 }
350
351 /* issue prefetch for next Tx descriptor */
352 prefetch(tx_desc);
353
354 /* update budget accounting */
355 budget--;
356 } while (likely(budget));
357
358 i += tx_ring->count;
92915f71 359 tx_ring->next_to_clean = i;
7ad1a093
ET		 360 u64_stats_update_begin(&tx_ring->syncp);
361 tx_ring->stats.bytes += total_bytes;
362 tx_ring->stats.packets += total_packets;
363 u64_stats_update_end(&tx_ring->syncp);
364 q_vector->tx.total_bytes += total_bytes;
365 q_vector->tx.total_packets += total_packets;
7f68d430 366 adapter->tx_ipsec += total_ipsec;
92915f71 367
e08400b7
ET		 368 if (check_for_tx_hang(tx_ring) && ixgbevf_check_tx_hang(tx_ring)) {
369 struct ixgbe_hw *hw = &adapter->hw;
370 union ixgbe_adv_tx_desc *eop_desc;
371
372 eop_desc = tx_ring->tx_buffer_info[i].next_to_watch;
373
21092e9c 374 pr_err("Detected Tx Unit Hang%s\n"
e08400b7
ET		 375 " Tx Queue <%d>\n"
376 " TDH, TDT <%x>, <%x>\n"
377 " next_to_use <%x>\n"
378 " next_to_clean <%x>\n"
379 "tx_buffer_info[next_to_clean]\n"
380 " next_to_watch <%p>\n"
381 " eop_desc->wb.status <%x>\n"
382 " time_stamp <%lx>\n"
383 " jiffies <%lx>\n",
21092e9c 384 ring_is_xdp(tx_ring) ? " XDP" : "",
e08400b7
ET		 385 tx_ring->queue_index,
386 IXGBE_READ_REG(hw, IXGBE_VFTDH(tx_ring->reg_idx)),
387 IXGBE_READ_REG(hw, IXGBE_VFTDT(tx_ring->reg_idx)),
388 tx_ring->next_to_use, i,
389 eop_desc, (eop_desc ? eop_desc->wb.status : 0),
390 tx_ring->tx_buffer_info[i].time_stamp, jiffies);
391
21092e9c
TN		 392 if (!ring_is_xdp(tx_ring))
393 netif_stop_subqueue(tx_ring->netdev,
394 tx_ring->queue_index);
e08400b7
ET		 395
396 /* schedule immediate reset if we believe we hung */
9ac5c5cc 397 ixgbevf_tx_timeout_reset(adapter);
e08400b7
ET		 398
399 return true;
400 }
401
21092e9c
TN		 402 if (ring_is_xdp(tx_ring))
403 return !!budget;
404
92915f71 405#define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
7ad1a093 406 if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
f880d07b 407 (ixgbevf_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
92915f71
GR		 408 /* Make sure that anybody stopping the queue after this
409 * sees the new next_to_clean.
410 */
411 smp_mb();
7ad1a093 412
fb40195c
AD		 413 if (__netif_subqueue_stopped(tx_ring->netdev,
414 tx_ring->queue_index) &&
92915f71 415 !test_bit(__IXGBEVF_DOWN, &adapter->state)) {
fb40195c
AD		 416 netif_wake_subqueue(tx_ring->netdev,
417 tx_ring->queue_index);
7ad1a093 418 ++tx_ring->tx_stats.restart_queue;
92915f71 419 }
92915f71
GR		 420 }
421
7ad1a093 422 return !!budget;
92915f71
GR		 423}
424
08681618
JK		 425/**
426 * ixgbevf_rx_skb - Helper function to determine proper Rx method
427 * @q_vector: structure containing interrupt and ring information
428 * @skb: packet to send up
08681618
JK		 429 **/
430static void ixgbevf_rx_skb(struct ixgbevf_q_vector *q_vector,
dff80520 431 struct sk_buff *skb)
08681618 432{
688ff32d 433 napi_gro_receive(&q_vector->napi, skb);
08681618
JK		 434}
435
1e1429d6
FD		 436#define IXGBE_RSS_L4_TYPES_MASK \
437 ((1ul << IXGBE_RXDADV_RSSTYPE_IPV4_TCP) | \
438 (1ul << IXGBE_RXDADV_RSSTYPE_IPV4_UDP) | \
439 (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_TCP) | \
440 (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_UDP))
441
442static inline void ixgbevf_rx_hash(struct ixgbevf_ring *ring,
443 union ixgbe_adv_rx_desc *rx_desc,
444 struct sk_buff *skb)
445{
446 u16 rss_type;
447
448 if (!(ring->netdev->features & NETIF_F_RXHASH))
449 return;
450
451 rss_type = le16_to_cpu(rx_desc->wb.lower.lo_dword.hs_rss.pkt_info) &
452 IXGBE_RXDADV_RSSTYPE_MASK;
453
454 if (!rss_type)
455 return;
456
457 skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
458 (IXGBE_RSS_L4_TYPES_MASK & (1ul << rss_type)) ?
459 PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3);
460}
461
dec0d8e4
JK		 462/**
463 * ixgbevf_rx_checksum - indicate in skb if hw indicated a good cksum
ec62fe26
ET		 464 * @ring: structure containig ring specific data
465 * @rx_desc: current Rx descriptor being processed
92915f71 466 * @skb: skb currently being received and modified
dec0d8e4 467 **/
55fb277c 468static inline void ixgbevf_rx_checksum(struct ixgbevf_ring *ring,
ec62fe26
ET		 469 union ixgbe_adv_rx_desc *rx_desc,
470 struct sk_buff *skb)
92915f71 471{
bc8acf2c 472 skb_checksum_none_assert(skb);
92915f71
GR		 473
474 /* Rx csum disabled */
fb40195c 475 if (!(ring->netdev->features & NETIF_F_RXCSUM))
92915f71
GR		 476 return;
477
478 /* if IP and error */
ec62fe26
ET		 479 if (ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
480 ixgbevf_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
095e2617 481 ring->rx_stats.csum_err++;
92915f71
GR		 482 return;
483 }
484
ec62fe26 485 if (!ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
92915f71
GR		 486 return;
487
ec62fe26 488 if (ixgbevf_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
095e2617 489 ring->rx_stats.csum_err++;
92915f71
GR		 490 return;
491 }
492
493 /* It must be a TCP or UDP packet with a valid checksum */
494 skb->ip_summed = CHECKSUM_UNNECESSARY;
92915f71
GR		 495}
496
dec0d8e4
JK		 497/**
498 * ixgbevf_process_skb_fields - Populate skb header fields from Rx descriptor
dff80520
ET		 499 * @rx_ring: rx descriptor ring packet is being transacted on
500 * @rx_desc: pointer to the EOP Rx descriptor
501 * @skb: pointer to current skb being populated
502 *
503 * This function checks the ring, descriptor, and packet information in
504 * order to populate the checksum, VLAN, protocol, and other fields within
505 * the skb.
dec0d8e4 506 **/
dff80520
ET		 507static void ixgbevf_process_skb_fields(struct ixgbevf_ring *rx_ring,
508 union ixgbe_adv_rx_desc *rx_desc,
509 struct sk_buff *skb)
510{
1e1429d6 511 ixgbevf_rx_hash(rx_ring, rx_desc, skb);
dff80520
ET		 512 ixgbevf_rx_checksum(rx_ring, rx_desc, skb);
513
514 if (ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
515 u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
516 unsigned long *active_vlans = netdev_priv(rx_ring->netdev);
517
518 if (test_bit(vid & VLAN_VID_MASK, active_vlans))
519 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
520 }
521
7f68d430
SN		 522 if (ixgbevf_test_staterr(rx_desc, IXGBE_RXDADV_STAT_SECP))
523 ixgbevf_ipsec_rx(rx_ring, rx_desc, skb);
524
dff80520
ET		 525 skb->protocol = eth_type_trans(skb, rx_ring->netdev);
526}
527
925f5690
ET		 528static
529struct ixgbevf_rx_buffer *ixgbevf_get_rx_buffer(struct ixgbevf_ring *rx_ring,
530 const unsigned int size)
531{
532 struct ixgbevf_rx_buffer *rx_buffer;
533
534 rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
535 prefetchw(rx_buffer->page);
536
537 /* we are reusing so sync this buffer for CPU use */
538 dma_sync_single_range_for_cpu(rx_ring->dev,
539 rx_buffer->dma,
540 rx_buffer->page_offset,
541 size,
542 DMA_FROM_DEVICE);
543
544 rx_buffer->pagecnt_bias--;
545
546 return rx_buffer;
547}
548
549static void ixgbevf_put_rx_buffer(struct ixgbevf_ring *rx_ring,
c7aec596
TN		 550 struct ixgbevf_rx_buffer *rx_buffer,
551 struct sk_buff *skb)
925f5690
ET		 552{
553 if (ixgbevf_can_reuse_rx_page(rx_buffer)) {
554 /* hand second half of page back to the ring */
555 ixgbevf_reuse_rx_page(rx_ring, rx_buffer);
556 } else {
c7aec596
TN		 557 if (IS_ERR(skb))
558 /* We are not reusing the buffer so unmap it and free
559 * any references we are holding to it
560 */
561 dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma,
562 ixgbevf_rx_pg_size(rx_ring),
563 DMA_FROM_DEVICE,
564 IXGBEVF_RX_DMA_ATTR);
925f5690
ET		 565 __page_frag_cache_drain(rx_buffer->page,
566 rx_buffer->pagecnt_bias);
567 }
568
569 /* clear contents of rx_buffer */
570 rx_buffer->page = NULL;
571}
572
4b95fe3d
ET		 573/**
574 * ixgbevf_is_non_eop - process handling of non-EOP buffers
575 * @rx_ring: Rx ring being processed
576 * @rx_desc: Rx descriptor for current buffer
4b95fe3d
ET		 577 *
578 * This function updates next to clean. If the buffer is an EOP buffer
579 * this function exits returning false, otherwise it will place the
580 * sk_buff in the next buffer to be chained and return true indicating
581 * that this is in fact a non-EOP buffer.
582 **/
583static bool ixgbevf_is_non_eop(struct ixgbevf_ring *rx_ring,
bad17234 584 union ixgbe_adv_rx_desc *rx_desc)
4b95fe3d
ET		 585{
586 u32 ntc = rx_ring->next_to_clean + 1;
587
588 /* fetch, update, and store next to clean */
589 ntc = (ntc < rx_ring->count) ? ntc : 0;
590 rx_ring->next_to_clean = ntc;
591
592 prefetch(IXGBEVF_RX_DESC(rx_ring, ntc));
593
594 if (likely(ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
595 return false;
596
597 return true;
598}
599
1ab37e12
ET		 600static inline unsigned int ixgbevf_rx_offset(struct ixgbevf_ring *rx_ring)
601{
602 return ring_uses_build_skb(rx_ring) ? IXGBEVF_SKB_PAD : 0;
603}
604
bad17234
ET		 605static bool ixgbevf_alloc_mapped_page(struct ixgbevf_ring *rx_ring,
606 struct ixgbevf_rx_buffer *bi)
bafa578f 607{
bad17234 608 struct page *page = bi->page;
93a6a37c 609 dma_addr_t dma;
bafa578f 610
bad17234
ET		 611 /* since we are recycling buffers we should seldom need to alloc */
612 if (likely(page))
bafa578f
ET		 613 return true;
614
bad17234 615 /* alloc new page for storage */
f15c5ba5 616 page = dev_alloc_pages(ixgbevf_rx_pg_order(rx_ring));
bad17234
ET		 617 if (unlikely(!page)) {
618 rx_ring->rx_stats.alloc_rx_page_failed++;
bafa578f
ET		 619 return false;
620 }
621
bad17234 622 /* map page for use */
f15c5ba5
ET		 623 dma = dma_map_page_attrs(rx_ring->dev, page, 0,
624 ixgbevf_rx_pg_size(rx_ring),
16b35949 625 DMA_FROM_DEVICE, IXGBEVF_RX_DMA_ATTR);
bafa578f
ET		 626
627 /* if mapping failed free memory back to system since
628 * there isn't much point in holding memory we can't use
629 */
630 if (dma_mapping_error(rx_ring->dev, dma)) {
f15c5ba5 631 __free_pages(page, ixgbevf_rx_pg_order(rx_ring));
bafa578f 632
2a35efe5 633 rx_ring->rx_stats.alloc_rx_page_failed++;
bafa578f
ET		 634 return false;
635 }
636
bafa578f 637 bi->dma = dma;
bad17234 638 bi->page = page;
1ab37e12 639 bi->page_offset = ixgbevf_rx_offset(rx_ring);
35074d69 640 bi->pagecnt_bias = 1;
2a35efe5 641 rx_ring->rx_stats.alloc_rx_page++;
bafa578f
ET		 642
643 return true;
644}
645
92915f71
GR		 646/**
647 * ixgbevf_alloc_rx_buffers - Replace used receive buffers; packet split
095e2617 648 * @rx_ring: rx descriptor ring (for a specific queue) to setup buffers on
bafa578f 649 * @cleaned_count: number of buffers to replace
92915f71 650 **/
095e2617 651static void ixgbevf_alloc_rx_buffers(struct ixgbevf_ring *rx_ring,
bafa578f 652 u16 cleaned_count)
92915f71 653{
92915f71
GR		 654 union ixgbe_adv_rx_desc *rx_desc;
655 struct ixgbevf_rx_buffer *bi;
fb40195c 656 unsigned int i = rx_ring->next_to_use;
92915f71 657
bafa578f
ET		 658 /* nothing to do or no valid netdev defined */
659 if (!cleaned_count || !rx_ring->netdev)
660 return;
b9dd245b 661
bafa578f
ET		 662 rx_desc = IXGBEVF_RX_DESC(rx_ring, i);
663 bi = &rx_ring->rx_buffer_info[i];
664 i -= rx_ring->count;
05d063aa 665
bafa578f 666 do {
bad17234 667 if (!ixgbevf_alloc_mapped_page(rx_ring, bi))
bafa578f 668 break;
b9dd245b 669
16b35949
ET		 670 /* sync the buffer for use by the device */
671 dma_sync_single_range_for_device(rx_ring->dev, bi->dma,
672 bi->page_offset,
f15c5ba5 673 ixgbevf_rx_bufsz(rx_ring),
16b35949
ET		 674 DMA_FROM_DEVICE);
675
bafa578f
ET		 676 /* Refresh the desc even if pkt_addr didn't change
677 * because each write-back erases this info.
678 */
bad17234 679 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
92915f71 680
bafa578f
ET		 681 rx_desc++;
682 bi++;
92915f71 683 i++;
bafa578f
ET		 684 if (unlikely(!i)) {
685 rx_desc = IXGBEVF_RX_DESC(rx_ring, 0);
686 bi = rx_ring->rx_buffer_info;
687 i -= rx_ring->count;
688 }
689
24bff091
ET		 690 /* clear the length for the next_to_use descriptor */
691 rx_desc->wb.upper.length = 0;
bafa578f
ET		 692
693 cleaned_count--;
694 } while (cleaned_count);
695
696 i += rx_ring->count;
92915f71 697
bafa578f
ET		 698 if (rx_ring->next_to_use != i) {
699 /* record the next descriptor to use */
700 rx_ring->next_to_use = i;
701
bad17234
ET		 702 /* update next to alloc since we have filled the ring */
703 rx_ring->next_to_alloc = i;
704
bafa578f
ET		 705 /* Force memory writes to complete before letting h/w
706 * know there are new descriptors to fetch. (Only
707 * applicable for weak-ordered memory model archs,
708 * such as IA-64).
709 */
710 wmb();
711 ixgbevf_write_tail(rx_ring, i);
712 }
92915f71
GR		 713}
714
dec0d8e4
JK		 715/**
716 * ixgbevf_cleanup_headers - Correct corrupted or empty headers
bad17234
ET		 717 * @rx_ring: rx descriptor ring packet is being transacted on
718 * @rx_desc: pointer to the EOP Rx descriptor
719 * @skb: pointer to current skb being fixed
720 *
721 * Check for corrupted packet headers caused by senders on the local L2
722 * embedded NIC switch not setting up their Tx Descriptors right. These
723 * should be very rare.
724 *
725 * Also address the case where we are pulling data in on pages only
726 * and as such no data is present in the skb header.
727 *
728 * In addition if skb is not at least 60 bytes we need to pad it so that
729 * it is large enough to qualify as a valid Ethernet frame.
730 *
731 * Returns true if an error was encountered and skb was freed.
dec0d8e4 732 **/
bad17234
ET		 733static bool ixgbevf_cleanup_headers(struct ixgbevf_ring *rx_ring,
734 union ixgbe_adv_rx_desc *rx_desc,
735 struct sk_buff *skb)
736{
c7aec596
TN		 737 /* XDP packets use error pointer so abort at this point */
738 if (IS_ERR(skb))
739 return true;
740
bad17234
ET		 741 /* verify that the packet does not have any known errors */
742 if (unlikely(ixgbevf_test_staterr(rx_desc,
743 IXGBE_RXDADV_ERR_FRAME_ERR_MASK))) {
744 struct net_device *netdev = rx_ring->netdev;
745
746 if (!(netdev->features & NETIF_F_RXALL)) {
747 dev_kfree_skb_any(skb);
748 return true;
749 }
750 }
751
a94d9e22
AD		 752 /* if eth_skb_pad returns an error the skb was freed */
753 if (eth_skb_pad(skb))
754 return true;
bad17234
ET		 755
756 return false;
757}
758
dec0d8e4
JK		 759/**
760 * ixgbevf_reuse_rx_page - page flip buffer and store it back on the ring
bad17234
ET		 761 * @rx_ring: rx descriptor ring to store buffers on
762 * @old_buff: donor buffer to have page reused
763 *
764 * Synchronizes page for reuse by the adapter
dec0d8e4 765 **/
bad17234
ET		 766static void ixgbevf_reuse_rx_page(struct ixgbevf_ring *rx_ring,
767 struct ixgbevf_rx_buffer *old_buff)
768{
769 struct ixgbevf_rx_buffer *new_buff;
770 u16 nta = rx_ring->next_to_alloc;
771
772 new_buff = &rx_ring->rx_buffer_info[nta];
773
774 /* update, and store next to alloc */
775 nta++;
776 rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
777
778 /* transfer page from old buffer to new buffer */
779 new_buff->page = old_buff->page;
780 new_buff->dma = old_buff->dma;
781 new_buff->page_offset = old_buff->page_offset;
35074d69 782 new_buff->pagecnt_bias = old_buff->pagecnt_bias;
bad17234
ET		 783}
784
785static inline bool ixgbevf_page_is_reserved(struct page *page)
786{
2f064f34 787 return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
bad17234
ET		 788}
789
925f5690 790static bool ixgbevf_can_reuse_rx_page(struct ixgbevf_rx_buffer *rx_buffer)
a355fd9a 791{
925f5690
ET		 792 unsigned int pagecnt_bias = rx_buffer->pagecnt_bias;
793 struct page *page = rx_buffer->page;
35074d69 794
a355fd9a
ET		 795 /* avoid re-using remote pages */
796 if (unlikely(ixgbevf_page_is_reserved(page)))
797 return false;
798
799#if (PAGE_SIZE < 8192)
800 /* if we are only owner of page we can reuse it */
925f5690 801 if (unlikely((page_ref_count(page) - pagecnt_bias) > 1))
a355fd9a 802 return false;
a355fd9a 803#else
f15c5ba5
ET		 804#define IXGBEVF_LAST_OFFSET \
805 (SKB_WITH_OVERHEAD(PAGE_SIZE) - IXGBEVF_RXBUFFER_2048)
806
807 if (rx_buffer->page_offset > IXGBEVF_LAST_OFFSET)
a355fd9a
ET		 808 return false;
809
810#endif
35074d69
ET		 811
812 /* If we have drained the page fragment pool we need to update
813 * the pagecnt_bias and page count so that we fully restock the
814 * number of references the driver holds.
a355fd9a 815 */
925f5690 816 if (unlikely(!pagecnt_bias)) {
35074d69
ET		 817 page_ref_add(page, USHRT_MAX);
818 rx_buffer->pagecnt_bias = USHRT_MAX;
819 }
a355fd9a
ET		 820
821 return true;
822}
823
dec0d8e4
JK		 824/**
825 * ixgbevf_add_rx_frag - Add contents of Rx buffer to sk_buff
bad17234
ET		 826 * @rx_ring: rx descriptor ring to transact packets on
827 * @rx_buffer: buffer containing page to add
bad17234 828 * @skb: sk_buff to place the data into
925f5690 829 * @size: size of buffer to be added
bad17234
ET		 830 *
831 * This function will add the data contained in rx_buffer->page to the skb.
dec0d8e4 832 **/
925f5690 833static void ixgbevf_add_rx_frag(struct ixgbevf_ring *rx_ring,
bad17234 834 struct ixgbevf_rx_buffer *rx_buffer,
925f5690
ET		 835 struct sk_buff *skb,
836 unsigned int size)
bad17234 837{
bad17234 838#if (PAGE_SIZE < 8192)
f15c5ba5 839 unsigned int truesize = ixgbevf_rx_pg_size(rx_ring) / 2;
bad17234 840#else
1ab37e12
ET		 841 unsigned int truesize = ring_uses_build_skb(rx_ring) ?
842 SKB_DATA_ALIGN(IXGBEVF_SKB_PAD + size) :
843 SKB_DATA_ALIGN(size);
bad17234 844#endif
925f5690
ET		 845 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_buffer->page,
846 rx_buffer->page_offset, size, truesize);
847#if (PAGE_SIZE < 8192)
848 rx_buffer->page_offset ^= truesize;
849#else
850 rx_buffer->page_offset += truesize;
851#endif
bad17234
ET		 852}
853
925f5690
ET		 854static
855struct sk_buff *ixgbevf_construct_skb(struct ixgbevf_ring *rx_ring,
856 struct ixgbevf_rx_buffer *rx_buffer,
c7aec596
TN		 857 struct xdp_buff *xdp,
858 union ixgbe_adv_rx_desc *rx_desc)
bad17234 859{
c7aec596 860 unsigned int size = xdp->data_end - xdp->data;
925f5690
ET		 861#if (PAGE_SIZE < 8192)
862 unsigned int truesize = ixgbevf_rx_pg_size(rx_ring) / 2;
863#else
c7aec596
TN		 864 unsigned int truesize = SKB_DATA_ALIGN(xdp->data_end -
865 xdp->data_hard_start);
925f5690
ET		 866#endif
867 unsigned int headlen;
868 struct sk_buff *skb;
bad17234 869
925f5690 870 /* prefetch first cache line of first page */
c7aec596 871 prefetch(xdp->data);
bad17234 872#if L1_CACHE_BYTES < 128
c7aec596 873 prefetch(xdp->data + L1_CACHE_BYTES);
bad17234 874#endif
be833332
TN		 875 /* Note, we get here by enabling legacy-rx via:
876 *
877 * ethtool --set-priv-flags <dev> legacy-rx on
878 *
879 * In this mode, we currently get 0 extra XDP headroom as
880 * opposed to having legacy-rx off, where we process XDP
881 * packets going to stack via ixgbevf_build_skb().
882 *
883 * For ixgbevf_construct_skb() mode it means that the
884 * xdp->data_meta will always point to xdp->data, since
885 * the helper cannot expand the head. Should this ever
886 * changed in future for legacy-rx mode on, then lets also
887 * add xdp->data_meta handling here.
888 */
bad17234 889
925f5690
ET		 890 /* allocate a skb to store the frags */
891 skb = napi_alloc_skb(&rx_ring->q_vector->napi, IXGBEVF_RX_HDR_SIZE);
892 if (unlikely(!skb))
893 return NULL;
bad17234 894
925f5690
ET		 895 /* Determine available headroom for copy */
896 headlen = size;
897 if (headlen > IXGBEVF_RX_HDR_SIZE)
c7aec596 898 headlen = eth_get_headlen(xdp->data, IXGBEVF_RX_HDR_SIZE);
bad17234 899
925f5690 900 /* align pull length to size of long to optimize memcpy performance */
c7aec596
TN		 901 memcpy(__skb_put(skb, headlen), xdp->data,
902 ALIGN(headlen, sizeof(long)));
925f5690
ET		 903
904 /* update all of the pointers */
905 size -= headlen;
906 if (size) {
907 skb_add_rx_frag(skb, 0, rx_buffer->page,
c7aec596
TN		 908 (xdp->data + headlen) -
909 page_address(rx_buffer->page),
925f5690
ET		 910 size, truesize);
911#if (PAGE_SIZE < 8192)
912 rx_buffer->page_offset ^= truesize;
913#else
914 rx_buffer->page_offset += truesize;
915#endif
bad17234 916 } else {
925f5690 917 rx_buffer->pagecnt_bias++;
bad17234
ET		 918 }
919
bad17234
ET		 920 return skb;
921}
922
92915f71 923static inline void ixgbevf_irq_enable_queues(struct ixgbevf_adapter *adapter,
5f3600eb 924 u32 qmask)
92915f71 925{
92915f71
GR		 926 struct ixgbe_hw *hw = &adapter->hw;
927
5f3600eb 928 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, qmask);
92915f71
GR		 929}
930
6d9c0217
ET		 931static struct sk_buff *ixgbevf_build_skb(struct ixgbevf_ring *rx_ring,
932 struct ixgbevf_rx_buffer *rx_buffer,
c7aec596
TN		 933 struct xdp_buff *xdp,
934 union ixgbe_adv_rx_desc *rx_desc)
6d9c0217 935{
be833332 936 unsigned int metasize = xdp->data - xdp->data_meta;
6d9c0217
ET		 937#if (PAGE_SIZE < 8192)
938 unsigned int truesize = ixgbevf_rx_pg_size(rx_ring) / 2;
939#else
940 unsigned int truesize = SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) +
c7aec596
TN		 941 SKB_DATA_ALIGN(xdp->data_end -
942 xdp->data_hard_start);
6d9c0217
ET		 943#endif
944 struct sk_buff *skb;
945
be833332
TN		 946 /* Prefetch first cache line of first page. If xdp->data_meta
947 * is unused, this points to xdp->data, otherwise, we likely
948 * have a consumer accessing first few bytes of meta data,
949 * and then actual data.
950 */
951 prefetch(xdp->data_meta);
6d9c0217 952#if L1_CACHE_BYTES < 128
be833332 953 prefetch(xdp->data_meta + L1_CACHE_BYTES);
6d9c0217
ET		 954#endif
955
c7aec596
TN		 956 /* build an skb around the page buffer */
957 skb = build_skb(xdp->data_hard_start, truesize);
6d9c0217
ET		 958 if (unlikely(!skb))
959 return NULL;
960
961 /* update pointers within the skb to store the data */
c7aec596
TN		 962 skb_reserve(skb, xdp->data - xdp->data_hard_start);
963 __skb_put(skb, xdp->data_end - xdp->data);
be833332
TN		 964 if (metasize)
965 skb_metadata_set(skb, metasize);
6d9c0217
ET		 966
967 /* update buffer offset */
968#if (PAGE_SIZE < 8192)
969 rx_buffer->page_offset ^= truesize;
970#else
971 rx_buffer->page_offset += truesize;
972#endif
973
974 return skb;
975}
c7aec596
TN		 976
977#define IXGBEVF_XDP_PASS 0
978#define IXGBEVF_XDP_CONSUMED 1
21092e9c
TN		 979#define IXGBEVF_XDP_TX 2
980
981static int ixgbevf_xmit_xdp_ring(struct ixgbevf_ring *ring,
982 struct xdp_buff *xdp)
983{
984 struct ixgbevf_tx_buffer *tx_buffer;
985 union ixgbe_adv_tx_desc *tx_desc;
986 u32 len, cmd_type;
987 dma_addr_t dma;
988 u16 i;
989
990 len = xdp->data_end - xdp->data;
c7aec596 991
21092e9c
TN		 992 if (unlikely(!ixgbevf_desc_unused(ring)))
993 return IXGBEVF_XDP_CONSUMED;
994
995 dma = dma_map_single(ring->dev, xdp->data, len, DMA_TO_DEVICE);
996 if (dma_mapping_error(ring->dev, dma))
997 return IXGBEVF_XDP_CONSUMED;
998
999 /* record the location of the first descriptor for this packet */
21092e9c 1000 i = ring->next_to_use;
4be87727 1001 tx_buffer = &ring->tx_buffer_info[i];
21092e9c
TN		 1002
1003 dma_unmap_len_set(tx_buffer, len, len);
1004 dma_unmap_addr_set(tx_buffer, dma, dma);
1005 tx_buffer->data = xdp->data;
4be87727
AD		 1006 tx_buffer->bytecount = len;
1007 tx_buffer->gso_segs = 1;
1008 tx_buffer->protocol = 0;
1009
1010 /* Populate minimal context descriptor that will provide for the
1011 * fact that we are expected to process Ethernet frames.
1012 */
1013 if (!test_bit(__IXGBEVF_TX_XDP_RING_PRIMED, &ring->state)) {
1014 struct ixgbe_adv_tx_context_desc *context_desc;
1015
1016 set_bit(__IXGBEVF_TX_XDP_RING_PRIMED, &ring->state);
1017
1018 context_desc = IXGBEVF_TX_CTXTDESC(ring, 0);
1019 context_desc->vlan_macip_lens =
1020 cpu_to_le32(ETH_HLEN << IXGBE_ADVTXD_MACLEN_SHIFT);
7f68d430 1021 context_desc->fceof_saidx = 0;
4be87727
AD		 1022 context_desc->type_tucmd_mlhl =
1023 cpu_to_le32(IXGBE_TXD_CMD_DEXT |
1024 IXGBE_ADVTXD_DTYP_CTXT);
1025 context_desc->mss_l4len_idx = 0;
1026
1027 i = 1;
1028 }
21092e9c
TN		 1029
1030 /* put descriptor type bits */
1031 cmd_type = IXGBE_ADVTXD_DTYP_DATA |
1032 IXGBE_ADVTXD_DCMD_DEXT |
1033 IXGBE_ADVTXD_DCMD_IFCS;
1034 cmd_type |= len | IXGBE_TXD_CMD;
4be87727
AD		 1035
1036 tx_desc = IXGBEVF_TX_DESC(ring, i);
1037 tx_desc->read.buffer_addr = cpu_to_le64(dma);
1038
21092e9c
TN		 1039 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
1040 tx_desc->read.olinfo_status =
1041 cpu_to_le32((len << IXGBE_ADVTXD_PAYLEN_SHIFT) |
1042 IXGBE_ADVTXD_CC);
1043
efecfd5f
TN		 1044 /* Avoid any potential race with cleanup */
1045 smp_wmb();
21092e9c
TN		 1046
1047 /* set next_to_watch value indicating a packet is present */
1048 i++;
1049 if (i == ring->count)
1050 i = 0;
1051
1052 tx_buffer->next_to_watch = tx_desc;
1053 ring->next_to_use = i;
1054
21092e9c
TN		 1055 return IXGBEVF_XDP_TX;
1056}
1057
1058static struct sk_buff *ixgbevf_run_xdp(struct ixgbevf_adapter *adapter,
1059 struct ixgbevf_ring *rx_ring,
c7aec596
TN		 1060 struct xdp_buff *xdp)
1061{
1062 int result = IXGBEVF_XDP_PASS;
21092e9c 1063 struct ixgbevf_ring *xdp_ring;
c7aec596
TN		 1064 struct bpf_prog *xdp_prog;
1065 u32 act;
1066
1067 rcu_read_lock();
1068 xdp_prog = READ_ONCE(rx_ring->xdp_prog);
1069
1070 if (!xdp_prog)
1071 goto xdp_out;
1072
1073 act = bpf_prog_run_xdp(xdp_prog, xdp);
1074 switch (act) {
1075 case XDP_PASS:
1076 break;
21092e9c
TN		 1077 case XDP_TX:
1078 xdp_ring = adapter->xdp_ring[rx_ring->queue_index];
1079 result = ixgbevf_xmit_xdp_ring(xdp_ring, xdp);
1080 break;
c7aec596
TN		 1081 default:
1082 bpf_warn_invalid_xdp_action(act);
1083 /* fallthrough */
c7aec596
TN		 1084 case XDP_ABORTED:
1085 trace_xdp_exception(rx_ring->netdev, xdp_prog, act);
1086 /* fallthrough -- handle aborts by dropping packet */
1087 case XDP_DROP:
1088 result = IXGBEVF_XDP_CONSUMED;
1089 break;
1090 }
1091xdp_out:
1092 rcu_read_unlock();
1093 return ERR_PTR(-result);
1094}
1095
21092e9c
TN		 1096static void ixgbevf_rx_buffer_flip(struct ixgbevf_ring *rx_ring,
1097 struct ixgbevf_rx_buffer *rx_buffer,
1098 unsigned int size)
1099{
1100#if (PAGE_SIZE < 8192)
1101 unsigned int truesize = ixgbevf_rx_pg_size(rx_ring) / 2;
1102
1103 rx_buffer->page_offset ^= truesize;
1104#else
1105 unsigned int truesize = ring_uses_build_skb(rx_ring) ?
1106 SKB_DATA_ALIGN(IXGBEVF_SKB_PAD + size) :
1107 SKB_DATA_ALIGN(size);
1108
1109 rx_buffer->page_offset += truesize;
1110#endif
1111}
1112
08e50a20
JK		 1113static int ixgbevf_clean_rx_irq(struct ixgbevf_q_vector *q_vector,
1114 struct ixgbevf_ring *rx_ring,
1115 int budget)
92915f71 1116{
92915f71 1117 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
21092e9c 1118 struct ixgbevf_adapter *adapter = q_vector->adapter;
bafa578f 1119 u16 cleaned_count = ixgbevf_desc_unused(rx_ring);
bad17234 1120 struct sk_buff *skb = rx_ring->skb;
efecfd5f 1121 bool xdp_xmit = false;
c7aec596
TN		 1122 struct xdp_buff xdp;
1123
1124 xdp.rxq = &rx_ring->xdp_rxq;
92915f71 1125
6622402a 1126 while (likely(total_rx_packets < budget)) {
925f5690 1127 struct ixgbevf_rx_buffer *rx_buffer;
c7aec596 1128 union ixgbe_adv_rx_desc *rx_desc;
925f5690 1129 unsigned int size;
b97fe3b1 1130
0579eefc
ET		 1131 /* return some buffers to hardware, one at a time is too slow */
1132 if (cleaned_count >= IXGBEVF_RX_BUFFER_WRITE) {
1133 ixgbevf_alloc_rx_buffers(rx_ring, cleaned_count);
1134 cleaned_count = 0;
1135 }
1136
bad17234 1137 rx_desc = IXGBEVF_RX_DESC(rx_ring, rx_ring->next_to_clean);
925f5690
ET		 1138 size = le16_to_cpu(rx_desc->wb.upper.length);
1139 if (!size)
92915f71 1140 break;
92915f71 1141
0579eefc
ET		 1142 /* This memory barrier is needed to keep us from reading
1143 * any other fields out of the rx_desc until we know the
1144 * RXD_STAT_DD bit is set
1145 */
1146 rmb();
ec62fe26 1147
925f5690
ET		 1148 rx_buffer = ixgbevf_get_rx_buffer(rx_ring, size);
1149
bad17234 1150 /* retrieve a buffer from the ring */
c7aec596
TN		 1151 if (!skb) {
1152 xdp.data = page_address(rx_buffer->page) +
1153 rx_buffer->page_offset;
be833332 1154 xdp.data_meta = xdp.data;
c7aec596
TN		 1155 xdp.data_hard_start = xdp.data -
1156 ixgbevf_rx_offset(rx_ring);
1157 xdp.data_end = xdp.data + size;
1158
21092e9c 1159 skb = ixgbevf_run_xdp(adapter, rx_ring, &xdp);
c7aec596
TN		 1160 }
1161
1162 if (IS_ERR(skb)) {
efecfd5f
TN		 1163 if (PTR_ERR(skb) == -IXGBEVF_XDP_TX) {
1164 xdp_xmit = true;
21092e9c
TN		 1165 ixgbevf_rx_buffer_flip(rx_ring, rx_buffer,
1166 size);
efecfd5f 1167 } else {
21092e9c 1168 rx_buffer->pagecnt_bias++;
efecfd5f 1169 }
c7aec596
TN		 1170 total_rx_packets++;
1171 total_rx_bytes += size;
c7aec596 1172 } else if (skb) {
925f5690 1173 ixgbevf_add_rx_frag(rx_ring, rx_buffer, skb, size);
c7aec596 1174 } else if (ring_uses_build_skb(rx_ring)) {
6d9c0217 1175 skb = ixgbevf_build_skb(rx_ring, rx_buffer,
c7aec596
TN		 1176 &xdp, rx_desc);
1177 } else {
925f5690 1178 skb = ixgbevf_construct_skb(rx_ring, rx_buffer,
c7aec596
TN		 1179 &xdp, rx_desc);
1180 }
0579eefc 1181
bad17234 1182 /* exit if we failed to retrieve a buffer */
2a35efe5
ET		 1183 if (!skb) {
1184 rx_ring->rx_stats.alloc_rx_buff_failed++;
925f5690 1185 rx_buffer->pagecnt_bias++;
bad17234 1186 break;
2a35efe5 1187 }
92915f71 1188
c7aec596 1189 ixgbevf_put_rx_buffer(rx_ring, rx_buffer, skb);
b97fe3b1
ET		 1190 cleaned_count++;
1191
bad17234
ET		 1192 /* fetch next buffer in frame if non-eop */
1193 if (ixgbevf_is_non_eop(rx_ring, rx_desc))
0579eefc 1194 continue;
5c60f81a 1195
bad17234
ET		 1196 /* verify the packet layout is correct */
1197 if (ixgbevf_cleanup_headers(rx_ring, rx_desc, skb)) {
1198 skb = NULL;
0579eefc 1199 continue;
92915f71
GR		 1200 }
1201
92915f71
GR		 1202 /* probably a little skewed due to removing CRC */
1203 total_rx_bytes += skb->len;
92915f71 1204
815cccbf
JF		 1205 /* Workaround hardware that can't do proper VEPA multicast
1206 * source pruning.
1207 */
bd9d5592 1208 if ((skb->pkt_type == PACKET_BROADCAST ||
dec0d8e4 1209 skb->pkt_type == PACKET_MULTICAST) &&
095e2617 1210 ether_addr_equal(rx_ring->netdev->dev_addr,
7367d0b5 1211 eth_hdr(skb)->h_source)) {
815cccbf 1212 dev_kfree_skb_irq(skb);
0579eefc 1213 continue;
815cccbf
JF		 1214 }
1215
dff80520
ET		 1216 /* populate checksum, VLAN, and protocol */
1217 ixgbevf_process_skb_fields(rx_ring, rx_desc, skb);
1218
1219 ixgbevf_rx_skb(q_vector, skb);
92915f71 1220
bad17234
ET		 1221 /* reset skb pointer */
1222 skb = NULL;
1223
0579eefc 1224 /* update budget accounting */
6622402a
ET		 1225 total_rx_packets++;
1226 }
92915f71 1227
bad17234
ET		 1228 /* place incomplete frames back on ring for completion */
1229 rx_ring->skb = skb;
1230
efecfd5f
TN		 1231 if (xdp_xmit) {
1232 struct ixgbevf_ring *xdp_ring =
1233 adapter->xdp_ring[rx_ring->queue_index];
1234
1235 /* Force memory writes to complete before letting h/w
1236 * know there are new descriptors to fetch.
1237 */
1238 wmb();
1239 ixgbevf_write_tail(xdp_ring, xdp_ring->next_to_use);
1240 }
1241
4197aa7b 1242 u64_stats_update_begin(&rx_ring->syncp);
095e2617
ET		 1243 rx_ring->stats.packets += total_rx_packets;
1244 rx_ring->stats.bytes += total_rx_bytes;
4197aa7b 1245 u64_stats_update_end(&rx_ring->syncp);
ac6ed8f0
GR		 1246 q_vector->rx.total_packets += total_rx_packets;
1247 q_vector->rx.total_bytes += total_rx_bytes;
92915f71 1248
08e50a20 1249 return total_rx_packets;
92915f71
GR		 1250}
1251
1252/**
fa71ae27 1253 * ixgbevf_poll - NAPI polling calback
92915f71
GR		 1254 * @napi: napi struct with our devices info in it
1255 * @budget: amount of work driver is allowed to do this pass, in packets
1256 *
fa71ae27 1257 * This function will clean more than one or more rings associated with a
92915f71
GR		 1258 * q_vector.
1259 **/
fa71ae27 1260static int ixgbevf_poll(struct napi_struct *napi, int budget)
92915f71
GR		 1261{
1262 struct ixgbevf_q_vector *q_vector =
1263 container_of(napi, struct ixgbevf_q_vector, napi);
1264 struct ixgbevf_adapter *adapter = q_vector->adapter;
fa71ae27 1265 struct ixgbevf_ring *ring;
32b3e08f 1266 int per_ring_budget, work_done = 0;
fa71ae27
AD		 1267 bool clean_complete = true;
1268
8220bbc1
AD		 1269 ixgbevf_for_each_ring(ring, q_vector->tx) {
1270 if (!ixgbevf_clean_tx_irq(q_vector, ring, budget))
1271 clean_complete = false;
1272 }
92915f71 1273
d0f71aff
WD		 1274 if (budget <= 0)
1275 return budget;
c777cdfa 1276
92915f71 1277 /* attempt to distribute budget to each queue fairly, but don't allow
dec0d8e4
JK		 1278 * the budget to go below 1 because we'll exit polling
1279 */
fa71ae27
AD		 1280 if (q_vector->rx.count > 1)
1281 per_ring_budget = max(budget/q_vector->rx.count, 1);
1282 else
1283 per_ring_budget = budget;
1284
32b3e08f
JB		 1285 ixgbevf_for_each_ring(ring, q_vector->rx) {
1286 int cleaned = ixgbevf_clean_rx_irq(q_vector, ring,
1287 per_ring_budget);
1288 work_done += cleaned;
8220bbc1
AD		 1289 if (cleaned >= per_ring_budget)
1290 clean_complete = false;
32b3e08f 1291 }
fa71ae27
AD		 1292
1293 /* If all work not completed, return budget and keep polling */
1294 if (!clean_complete)
1295 return budget;
1296 /* all work done, exit the polling mode */
32b3e08f 1297 napi_complete_done(napi, work_done);
9ad3d6f7 1298 if (adapter->rx_itr_setting == 1)
fa71ae27 1299 ixgbevf_set_itr(q_vector);
2e7cfbdd
MR		 1300 if (!test_bit(__IXGBEVF_DOWN, &adapter->state) &&
1301 !test_bit(__IXGBEVF_REMOVING, &adapter->state))
fa71ae27 1302 ixgbevf_irq_enable_queues(adapter,
8d055cc0 1303 BIT(q_vector->v_idx));
92915f71 1304
fa71ae27 1305 return 0;
92915f71
GR		 1306}
1307
ce422606
GR		 1308/**
1309 * ixgbevf_write_eitr - write VTEITR register in hardware specific way
1310 * @q_vector: structure containing interrupt and ring information
dec0d8e4 1311 **/
3849623e 1312void ixgbevf_write_eitr(struct ixgbevf_q_vector *q_vector)
ce422606
GR		 1313{
1314 struct ixgbevf_adapter *adapter = q_vector->adapter;
1315 struct ixgbe_hw *hw = &adapter->hw;
1316 int v_idx = q_vector->v_idx;
1317 u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
1318
dec0d8e4 1319 /* set the WDIS bit to not clear the timer bits and cause an
ce422606
GR		 1320 * immediate assertion of the interrupt
1321 */
1322 itr_reg |= IXGBE_EITR_CNT_WDIS;
1323
1324 IXGBE_WRITE_REG(hw, IXGBE_VTEITR(v_idx), itr_reg);
1325}
92915f71
GR		 1326
1327/**
1328 * ixgbevf_configure_msix - Configure MSI-X hardware
1329 * @adapter: board private structure
1330 *
1331 * ixgbevf_configure_msix sets up the hardware to properly generate MSI-X
1332 * interrupts.
1333 **/
1334static void ixgbevf_configure_msix(struct ixgbevf_adapter *adapter)
1335{
1336 struct ixgbevf_q_vector *q_vector;
6b43c446 1337 int q_vectors, v_idx;
92915f71
GR		 1338
1339 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
5f3600eb 1340 adapter->eims_enable_mask = 0;
92915f71 1341
dec0d8e4 1342 /* Populate the IVAR table and set the ITR values to the
92915f71
GR		 1343 * corresponding register.
1344 */
1345 for (v_idx = 0; v_idx < q_vectors; v_idx++) {
6b43c446 1346 struct ixgbevf_ring *ring;
dec0d8e4 1347
92915f71 1348 q_vector = adapter->q_vector[v_idx];
6b43c446
AD		 1349
1350 ixgbevf_for_each_ring(ring, q_vector->rx)
1351 ixgbevf_set_ivar(adapter, 0, ring->reg_idx, v_idx);
1352
1353 ixgbevf_for_each_ring(ring, q_vector->tx)
1354 ixgbevf_set_ivar(adapter, 1, ring->reg_idx, v_idx);
92915f71 1355
5f3600eb 1356 if (q_vector->tx.ring && !q_vector->rx.ring) {
dec0d8e4 1357 /* Tx only vector */
5f3600eb 1358 if (adapter->tx_itr_setting == 1)
8a9ca110 1359 q_vector->itr = IXGBE_12K_ITR;
5f3600eb
AD		 1360 else
1361 q_vector->itr = adapter->tx_itr_setting;
1362 } else {
dec0d8e4 1363 /* Rx or Rx/Tx vector */
5f3600eb
AD		 1364 if (adapter->rx_itr_setting == 1)
1365 q_vector->itr = IXGBE_20K_ITR;
1366 else
1367 q_vector->itr = adapter->rx_itr_setting;
1368 }
1369
1370 /* add q_vector eims value to global eims_enable_mask */
8d055cc0 1371 adapter->eims_enable_mask |= BIT(v_idx);
92915f71 1372
5f3600eb 1373 ixgbevf_write_eitr(q_vector);
92915f71
GR		 1374 }
1375
1376 ixgbevf_set_ivar(adapter, -1, 1, v_idx);
5f3600eb 1377 /* setup eims_other and add value to global eims_enable_mask */
8d055cc0 1378 adapter->eims_other = BIT(v_idx);
5f3600eb 1379 adapter->eims_enable_mask |= adapter->eims_other;
92915f71
GR		 1380}
1381
1382enum latency_range {
1383 lowest_latency = 0,
1384 low_latency = 1,
1385 bulk_latency = 2,
1386 latency_invalid = 255
1387};
1388
1389/**
1390 * ixgbevf_update_itr - update the dynamic ITR value based on statistics
5f3600eb
AD		 1391 * @q_vector: structure containing interrupt and ring information
1392 * @ring_container: structure containing ring performance data
92915f71 1393 *
dec0d8e4
JK		 1394 * Stores a new ITR value based on packets and byte
1395 * counts during the last interrupt. The advantage of per interrupt
1396 * computation is faster updates and more accurate ITR for the current
1397 * traffic pattern. Constants in this function were computed
1398 * based on theoretical maximum wire speed and thresholds were set based
1399 * on testing data as well as attempting to minimize response time
1400 * while increasing bulk throughput.
92915f71 1401 **/
5f3600eb
AD		 1402static void ixgbevf_update_itr(struct ixgbevf_q_vector *q_vector,
1403 struct ixgbevf_ring_container *ring_container)
92915f71 1404{
5f3600eb
AD		 1405 int bytes = ring_container->total_bytes;
1406 int packets = ring_container->total_packets;
92915f71
GR		 1407 u32 timepassed_us;
1408 u64 bytes_perint;
5f3600eb 1409 u8 itr_setting = ring_container->itr;
92915f71
GR		 1410
1411 if (packets == 0)
5f3600eb 1412 return;
92915f71 1413
dec0d8e4 1414 /* simple throttle rate management
92915f71
GR		 1415 * 0-20MB/s lowest (100000 ints/s)
1416 * 20-100MB/s low (20000 ints/s)
8a9ca110 1417 * 100-1249MB/s bulk (12000 ints/s)
92915f71
GR		 1418 */
1419 /* what was last interrupt timeslice? */
5f3600eb 1420 timepassed_us = q_vector->itr >> 2;
92915f71
GR		 1421 bytes_perint = bytes / timepassed_us; /* bytes/usec */
1422
1423 switch (itr_setting) {
1424 case lowest_latency:
e2c28ce7 1425 if (bytes_perint > 10)
5f3600eb 1426 itr_setting = low_latency;
92915f71
GR		 1427 break;
1428 case low_latency:
e2c28ce7 1429 if (bytes_perint > 20)
5f3600eb 1430 itr_setting = bulk_latency;
e2c28ce7 1431 else if (bytes_perint <= 10)
5f3600eb 1432 itr_setting = lowest_latency;
92915f71
GR		 1433 break;
1434 case bulk_latency:
e2c28ce7 1435 if (bytes_perint <= 20)
5f3600eb 1436 itr_setting = low_latency;
92915f71
GR		 1437 break;
1438 }
1439
5f3600eb
AD		 1440 /* clear work counters since we have the values we need */
1441 ring_container->total_bytes = 0;
1442 ring_container->total_packets = 0;
1443
1444 /* write updated itr to ring container */
1445 ring_container->itr = itr_setting;
92915f71
GR		 1446}
1447
fa71ae27 1448static void ixgbevf_set_itr(struct ixgbevf_q_vector *q_vector)
92915f71 1449{
5f3600eb
AD		 1450 u32 new_itr = q_vector->itr;
1451 u8 current_itr;
92915f71 1452
5f3600eb
AD		 1453 ixgbevf_update_itr(q_vector, &q_vector->tx);
1454 ixgbevf_update_itr(q_vector, &q_vector->rx);
92915f71 1455
6b43c446 1456 current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
92915f71
GR		 1457
1458 switch (current_itr) {
1459 /* counts and packets in update_itr are dependent on these numbers */
1460 case lowest_latency:
5f3600eb 1461 new_itr = IXGBE_100K_ITR;
92915f71
GR		 1462 break;
1463 case low_latency:
5f3600eb 1464 new_itr = IXGBE_20K_ITR;
92915f71
GR		 1465 break;
1466 case bulk_latency:
8a9ca110 1467 new_itr = IXGBE_12K_ITR;
92915f71 1468 break;
9ad3d6f7
ET		 1469 default:
1470 break;
92915f71
GR		 1471 }
1472
5f3600eb 1473 if (new_itr != q_vector->itr) {
92915f71 1474 /* do an exponential smoothing */
5f3600eb
AD		 1475 new_itr = (10 * new_itr * q_vector->itr) /
1476 ((9 * new_itr) + q_vector->itr);
1477
1478 /* save the algorithm value here */
1479 q_vector->itr = new_itr;
1480
1481 ixgbevf_write_eitr(q_vector);
92915f71 1482 }
92915f71
GR		 1483}
1484
4b2cd27f 1485static irqreturn_t ixgbevf_msix_other(int irq, void *data)
92915f71 1486{
fa71ae27 1487 struct ixgbevf_adapter *adapter = data;
92915f71 1488 struct ixgbe_hw *hw = &adapter->hw;
08259594 1489
4b2cd27f 1490 hw->mac.get_link_status = 1;
1e72bfc3 1491
9ac5c5cc 1492 ixgbevf_service_event_schedule(adapter);
3a2c4033 1493
5f3600eb
AD		 1494 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, adapter->eims_other);
1495
92915f71
GR		 1496 return IRQ_HANDLED;
1497}
1498
92915f71 1499/**
fa71ae27 1500 * ixgbevf_msix_clean_rings - single unshared vector rx clean (all queues)
92915f71
GR		 1501 * @irq: unused
1502 * @data: pointer to our q_vector struct for this interrupt vector
1503 **/
fa71ae27 1504static irqreturn_t ixgbevf_msix_clean_rings(int irq, void *data)
92915f71
GR		 1505{
1506 struct ixgbevf_q_vector *q_vector = data;
92915f71 1507
5f3600eb 1508 /* EIAM disabled interrupts (on this vector) for us */
fa71ae27 1509 if (q_vector->rx.ring || q_vector->tx.ring)
ef2662b2 1510 napi_schedule_irqoff(&q_vector->napi);
92915f71
GR		 1511
1512 return IRQ_HANDLED;
1513}
1514
92915f71
GR		 1515/**
1516 * ixgbevf_request_msix_irqs - Initialize MSI-X interrupts
1517 * @adapter: board private structure
1518 *
1519 * ixgbevf_request_msix_irqs allocates MSI-X vectors and requests
1520 * interrupts from the kernel.
1521 **/
1522static int ixgbevf_request_msix_irqs(struct ixgbevf_adapter *adapter)
1523{
1524 struct net_device *netdev = adapter->netdev;
fa71ae27 1525 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
31f5d9b1 1526 unsigned int ri = 0, ti = 0;
fa71ae27 1527 int vector, err;
92915f71 1528
92915f71 1529 for (vector = 0; vector < q_vectors; vector++) {
fa71ae27
AD		 1530 struct ixgbevf_q_vector *q_vector = adapter->q_vector[vector];
1531 struct msix_entry *entry = &adapter->msix_entries[vector];
1532
1533 if (q_vector->tx.ring && q_vector->rx.ring) {
31f5d9b1
TN		 1534 snprintf(q_vector->name, sizeof(q_vector->name),
1535 "%s-TxRx-%u", netdev->name, ri++);
fa71ae27
AD		 1536 ti++;
1537 } else if (q_vector->rx.ring) {
31f5d9b1
TN		 1538 snprintf(q_vector->name, sizeof(q_vector->name),
1539 "%s-rx-%u", netdev->name, ri++);
fa71ae27 1540 } else if (q_vector->tx.ring) {
31f5d9b1
TN		 1541 snprintf(q_vector->name, sizeof(q_vector->name),
1542 "%s-tx-%u", netdev->name, ti++);
92915f71
GR		 1543 } else {
1544 /* skip this unused q_vector */
1545 continue;
1546 }
fa71ae27
AD		 1547 err = request_irq(entry->vector, &ixgbevf_msix_clean_rings, 0,
1548 q_vector->name, q_vector);
92915f71
GR		 1549 if (err) {
1550 hw_dbg(&adapter->hw,
dec0d8e4
JK		 1551 "request_irq failed for MSIX interrupt Error: %d\n",
1552 err);
92915f71
GR		 1553 goto free_queue_irqs;
1554 }
1555 }
1556
92915f71 1557 err = request_irq(adapter->msix_entries[vector].vector,
4b2cd27f 1558 &ixgbevf_msix_other, 0, netdev->name, adapter);
92915f71 1559 if (err) {
dec0d8e4
JK		 1560 hw_dbg(&adapter->hw, "request_irq for msix_other failed: %d\n",
1561 err);
92915f71
GR		 1562 goto free_queue_irqs;
1563 }
1564
1565 return 0;
1566
1567free_queue_irqs:
fa71ae27
AD		 1568 while (vector) {
1569 vector--;
1570 free_irq(adapter->msix_entries[vector].vector,
1571 adapter->q_vector[vector]);
1572 }
a1f6c6b1 1573 /* This failure is non-recoverable - it indicates the system is
1574 * out of MSIX vector resources and the VF driver cannot run
1575 * without them. Set the number of msix vectors to zero
1576 * indicating that not enough can be allocated. The error
1577 * will be returned to the user indicating device open failed.
1578 * Any further attempts to force the driver to open will also
1579 * fail. The only way to recover is to unload the driver and
1580 * reload it again. If the system has recovered some MSIX
1581 * vectors then it may succeed.
1582 */
1583 adapter->num_msix_vectors = 0;
92915f71
GR		 1584 return err;
1585}
1586
92915f71
GR		 1587/**
1588 * ixgbevf_request_irq - initialize interrupts
1589 * @adapter: board private structure
1590 *
1591 * Attempts to configure interrupts using the best available
1592 * capabilities of the hardware and kernel.
1593 **/
1594static int ixgbevf_request_irq(struct ixgbevf_adapter *adapter)
1595{
50985b5f 1596 int err = ixgbevf_request_msix_irqs(adapter);
92915f71
GR		 1597
1598 if (err)
dec0d8e4 1599 hw_dbg(&adapter->hw, "request_irq failed, Error %d\n", err);
92915f71
GR		 1600
1601 return err;
1602}
1603
1604static void ixgbevf_free_irq(struct ixgbevf_adapter *adapter)
1605{
92915f71
GR		 1606 int i, q_vectors;
1607
eeffceee
MR		 1608 if (!adapter->msix_entries)
1609 return;
1610
92915f71 1611 q_vectors = adapter->num_msix_vectors;
92915f71
GR		 1612 i = q_vectors - 1;
1613
fa71ae27 1614 free_irq(adapter->msix_entries[i].vector, adapter);
92915f71
GR		 1615 i--;
1616
1617 for (; i >= 0; i--) {
fa71ae27
AD		 1618 /* free only the irqs that were actually requested */
1619 if (!adapter->q_vector[i]->rx.ring &&
1620 !adapter->q_vector[i]->tx.ring)
1621 continue;
1622
92915f71
GR		 1623 free_irq(adapter->msix_entries[i].vector,
1624 adapter->q_vector[i]);
1625 }
92915f71
GR		 1626}
1627
1628/**
1629 * ixgbevf_irq_disable - Mask off interrupt generation on the NIC
1630 * @adapter: board private structure
1631 **/
1632static inline void ixgbevf_irq_disable(struct ixgbevf_adapter *adapter)
1633{
92915f71 1634 struct ixgbe_hw *hw = &adapter->hw;
5f3600eb 1635 int i;
92915f71 1636
5f3600eb 1637 IXGBE_WRITE_REG(hw, IXGBE_VTEIAM, 0);
92915f71 1638 IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, ~0);
5f3600eb 1639 IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, 0);
92915f71
GR		 1640
1641 IXGBE_WRITE_FLUSH(hw);
1642
1643 for (i = 0; i < adapter->num_msix_vectors; i++)
1644 synchronize_irq(adapter->msix_entries[i].vector);
1645}
1646
1647/**
1648 * ixgbevf_irq_enable - Enable default interrupt generation settings
1649 * @adapter: board private structure
1650 **/
5f3600eb 1651static inline void ixgbevf_irq_enable(struct ixgbevf_adapter *adapter)
92915f71
GR		 1652{
1653 struct ixgbe_hw *hw = &adapter->hw;
92915f71 1654
5f3600eb
AD		 1655 IXGBE_WRITE_REG(hw, IXGBE_VTEIAM, adapter->eims_enable_mask);
1656 IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, adapter->eims_enable_mask);
1657 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, adapter->eims_enable_mask);
92915f71
GR		 1658}
1659
de02decb
DS		 1660/**
1661 * ixgbevf_configure_tx_ring - Configure 82599 VF Tx ring after Reset
1662 * @adapter: board private structure
1663 * @ring: structure containing ring specific data
1664 *
1665 * Configure the Tx descriptor ring after a reset.
1666 **/
1667static void ixgbevf_configure_tx_ring(struct ixgbevf_adapter *adapter,
1668 struct ixgbevf_ring *ring)
1669{
1670 struct ixgbe_hw *hw = &adapter->hw;
1671 u64 tdba = ring->dma;
1672 int wait_loop = 10;
1673 u32 txdctl = IXGBE_TXDCTL_ENABLE;
1674 u8 reg_idx = ring->reg_idx;
1675
1676 /* disable queue to avoid issues while updating state */
1677 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
1678 IXGBE_WRITE_FLUSH(hw);
1679
1680 IXGBE_WRITE_REG(hw, IXGBE_VFTDBAL(reg_idx), tdba & DMA_BIT_MASK(32));
1681 IXGBE_WRITE_REG(hw, IXGBE_VFTDBAH(reg_idx), tdba >> 32);
1682 IXGBE_WRITE_REG(hw, IXGBE_VFTDLEN(reg_idx),
1683 ring->count * sizeof(union ixgbe_adv_tx_desc));
1684
1685 /* disable head writeback */
1686 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAH(reg_idx), 0);
1687 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAL(reg_idx), 0);
1688
1689 /* enable relaxed ordering */
1690 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(reg_idx),
1691 (IXGBE_DCA_TXCTRL_DESC_RRO_EN |
1692 IXGBE_DCA_TXCTRL_DATA_RRO_EN));
1693
1694 /* reset head and tail pointers */
1695 IXGBE_WRITE_REG(hw, IXGBE_VFTDH(reg_idx), 0);
1696 IXGBE_WRITE_REG(hw, IXGBE_VFTDT(reg_idx), 0);
dbf8b0d8 1697 ring->tail = adapter->io_addr + IXGBE_VFTDT(reg_idx);
de02decb
DS		 1698
1699 /* reset ntu and ntc to place SW in sync with hardwdare */
1700 ring->next_to_clean = 0;
1701 ring->next_to_use = 0;
1702
1703 /* In order to avoid issues WTHRESH + PTHRESH should always be equal
1704 * to or less than the number of on chip descriptors, which is
1705 * currently 40.
1706 */
1707 txdctl |= (8 << 16); /* WTHRESH = 8 */
1708
1709 /* Setting PTHRESH to 32 both improves performance */
8d055cc0
JK		 1710 txdctl |= (1u << 8) | /* HTHRESH = 1 */
1711 32; /* PTHRESH = 32 */
de02decb 1712
865a4d98
ET		 1713 /* reinitialize tx_buffer_info */
1714 memset(ring->tx_buffer_info, 0,
1715 sizeof(struct ixgbevf_tx_buffer) * ring->count);
1716
e08400b7 1717 clear_bit(__IXGBEVF_HANG_CHECK_ARMED, &ring->state);
4be87727 1718 clear_bit(__IXGBEVF_TX_XDP_RING_PRIMED, &ring->state);
e08400b7 1719
de02decb
DS		 1720 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx), txdctl);
1721
1722 /* poll to verify queue is enabled */
1723 do {
1724 usleep_range(1000, 2000);
1725 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(reg_idx));
1726 } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
1727 if (!wait_loop)
ee95053f 1728 hw_dbg(hw, "Could not enable Tx Queue %d\n", reg_idx);
de02decb
DS		 1729}
1730
92915f71
GR		 1731/**
1732 * ixgbevf_configure_tx - Configure 82599 VF Transmit Unit after Reset
1733 * @adapter: board private structure
1734 *
1735 * Configure the Tx unit of the MAC after a reset.
1736 **/
1737static void ixgbevf_configure_tx(struct ixgbevf_adapter *adapter)
1738{
de02decb 1739 u32 i;
92915f71
GR		 1740
1741 /* Setup the HW Tx Head and Tail descriptor pointers */
de02decb
DS		 1742 for (i = 0; i < adapter->num_tx_queues; i++)
1743 ixgbevf_configure_tx_ring(adapter, adapter->tx_ring[i]);
21092e9c
TN		 1744 for (i = 0; i < adapter->num_xdp_queues; i++)
1745 ixgbevf_configure_tx_ring(adapter, adapter->xdp_ring[i]);
92915f71
GR		 1746}
1747
1748#define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
1749
f15c5ba5
ET		 1750static void ixgbevf_configure_srrctl(struct ixgbevf_adapter *adapter,
1751 struct ixgbevf_ring *ring, int index)
92915f71 1752{
92915f71
GR		 1753 struct ixgbe_hw *hw = &adapter->hw;
1754 u32 srrctl;
1755
92915f71
GR		 1756 srrctl = IXGBE_SRRCTL_DROP_EN;
1757
bad17234 1758 srrctl |= IXGBEVF_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
f15c5ba5
ET		 1759 if (ring_uses_large_buffer(ring))
1760 srrctl |= IXGBEVF_RXBUFFER_3072 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1761 else
1762 srrctl |= IXGBEVF_RXBUFFER_2048 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
77d5dfca 1763 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
92915f71 1764
92915f71
GR		 1765 IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(index), srrctl);
1766}
1767
1bb9c639
DS		 1768static void ixgbevf_setup_psrtype(struct ixgbevf_adapter *adapter)
1769{
1770 struct ixgbe_hw *hw = &adapter->hw;
1771
1772 /* PSRTYPE must be initialized in 82599 */
1773 u32 psrtype = IXGBE_PSRTYPE_TCPHDR | IXGBE_PSRTYPE_UDPHDR |
1774 IXGBE_PSRTYPE_IPV4HDR | IXGBE_PSRTYPE_IPV6HDR |
1775 IXGBE_PSRTYPE_L2HDR;
1776
1777 if (adapter->num_rx_queues > 1)
8d055cc0 1778 psrtype |= BIT(29);
1bb9c639
DS		 1779
1780 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, psrtype);
1781}
1782
de02decb
DS		 1783#define IXGBEVF_MAX_RX_DESC_POLL 10
1784static void ixgbevf_disable_rx_queue(struct ixgbevf_adapter *adapter,
1785 struct ixgbevf_ring *ring)
1786{
1787 struct ixgbe_hw *hw = &adapter->hw;
1788 int wait_loop = IXGBEVF_MAX_RX_DESC_POLL;
1789 u32 rxdctl;
1790 u8 reg_idx = ring->reg_idx;
1791
26597802
MR		 1792 if (IXGBE_REMOVED(hw->hw_addr))
1793 return;
de02decb
DS		 1794 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
1795 rxdctl &= ~IXGBE_RXDCTL_ENABLE;
1796
1797 /* write value back with RXDCTL.ENABLE bit cleared */
1798 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(reg_idx), rxdctl);
1799
dec0d8e4 1800 /* the hardware may take up to 100us to really disable the Rx queue */
de02decb
DS		 1801 do {
1802 udelay(10);
1803 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
1804 } while (--wait_loop && (rxdctl & IXGBE_RXDCTL_ENABLE));
1805
1806 if (!wait_loop)
1807 pr_err("RXDCTL.ENABLE queue %d not cleared while polling\n",
1808 reg_idx);
1809}
1810
1811static void ixgbevf_rx_desc_queue_enable(struct ixgbevf_adapter *adapter,
1812 struct ixgbevf_ring *ring)
1813{
1814 struct ixgbe_hw *hw = &adapter->hw;
1815 int wait_loop = IXGBEVF_MAX_RX_DESC_POLL;
1816 u32 rxdctl;
1817 u8 reg_idx = ring->reg_idx;
1818
26597802
MR		 1819 if (IXGBE_REMOVED(hw->hw_addr))
1820 return;
de02decb
DS		 1821 do {
1822 usleep_range(1000, 2000);
1823 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
1824 } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
1825
1826 if (!wait_loop)
1827 pr_err("RXDCTL.ENABLE queue %d not set while polling\n",
1828 reg_idx);
1829}
1830
e60ae003
TN		 1831/**
1832 * ixgbevf_init_rss_key - Initialize adapter RSS key
1833 * @adapter: device handle
1834 *
1835 * Allocates and initializes the RSS key if it is not allocated.
1836 **/
1837static inline int ixgbevf_init_rss_key(struct ixgbevf_adapter *adapter)
1838{
1839 u32 *rss_key;
1840
1841 if (!adapter->rss_key) {
1842 rss_key = kzalloc(IXGBEVF_RSS_HASH_KEY_SIZE, GFP_KERNEL);
1843 if (unlikely(!rss_key))
1844 return -ENOMEM;
1845
1846 netdev_rss_key_fill(rss_key, IXGBEVF_RSS_HASH_KEY_SIZE);
1847 adapter->rss_key = rss_key;
1848 }
1849
1850 return 0;
1851}
1852
9295edb4
ET		 1853static void ixgbevf_setup_vfmrqc(struct ixgbevf_adapter *adapter)
1854{
1855 struct ixgbe_hw *hw = &adapter->hw;
1856 u32 vfmrqc = 0, vfreta = 0;
9295edb4 1857 u16 rss_i = adapter->num_rx_queues;
9cba434f 1858 u8 i, j;
9295edb4
ET		 1859
1860 /* Fill out hash function seeds */
9cba434f 1861 for (i = 0; i < IXGBEVF_VFRSSRK_REGS; i++)
e60ae003 1862 IXGBE_WRITE_REG(hw, IXGBE_VFRSSRK(i), *(adapter->rss_key + i));
9295edb4 1863
9cba434f 1864 for (i = 0, j = 0; i < IXGBEVF_X550_VFRETA_SIZE; i++, j++) {
9295edb4
ET		 1865 if (j == rss_i)
1866 j = 0;
9cba434f
ET		 1867
1868 adapter->rss_indir_tbl[i] = j;
1869
1870 vfreta |= j << (i & 0x3) * 8;
1871 if ((i & 3) == 3) {
9295edb4 1872 IXGBE_WRITE_REG(hw, IXGBE_VFRETA(i >> 2), vfreta);
9cba434f
ET		 1873 vfreta = 0;
1874 }
9295edb4
ET		 1875 }
1876
1877 /* Perform hash on these packet types */
1878 vfmrqc |= IXGBE_VFMRQC_RSS_FIELD_IPV4 |
1879 IXGBE_VFMRQC_RSS_FIELD_IPV4_TCP |
1880 IXGBE_VFMRQC_RSS_FIELD_IPV6 |
1881 IXGBE_VFMRQC_RSS_FIELD_IPV6_TCP;
1882
1883 vfmrqc |= IXGBE_VFMRQC_RSSEN;
1884
1885 IXGBE_WRITE_REG(hw, IXGBE_VFMRQC, vfmrqc);
1886}
1887
de02decb
DS		 1888static void ixgbevf_configure_rx_ring(struct ixgbevf_adapter *adapter,
1889 struct ixgbevf_ring *ring)
1890{
1891 struct ixgbe_hw *hw = &adapter->hw;
24bff091 1892 union ixgbe_adv_rx_desc *rx_desc;
de02decb
DS		 1893 u64 rdba = ring->dma;
1894 u32 rxdctl;
1895 u8 reg_idx = ring->reg_idx;
1896
1897 /* disable queue to avoid issues while updating state */
1898 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
1899 ixgbevf_disable_rx_queue(adapter, ring);
1900
1901 IXGBE_WRITE_REG(hw, IXGBE_VFRDBAL(reg_idx), rdba & DMA_BIT_MASK(32));
1902 IXGBE_WRITE_REG(hw, IXGBE_VFRDBAH(reg_idx), rdba >> 32);
1903 IXGBE_WRITE_REG(hw, IXGBE_VFRDLEN(reg_idx),
1904 ring->count * sizeof(union ixgbe_adv_rx_desc));
1905
33b0eb15 1906#ifndef CONFIG_SPARC
de02decb
DS		 1907 /* enable relaxed ordering */
1908 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_RXCTRL(reg_idx),
1909 IXGBE_DCA_RXCTRL_DESC_RRO_EN);
33b0eb15
BM		 1910#else
1911 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_RXCTRL(reg_idx),
1912 IXGBE_DCA_RXCTRL_DESC_RRO_EN |
1913 IXGBE_DCA_RXCTRL_DATA_WRO_EN);
1914#endif
de02decb
DS		 1915
1916 /* reset head and tail pointers */
1917 IXGBE_WRITE_REG(hw, IXGBE_VFRDH(reg_idx), 0);
1918 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(reg_idx), 0);
dbf8b0d8 1919 ring->tail = adapter->io_addr + IXGBE_VFRDT(reg_idx);
de02decb 1920
40b8178b
ET		 1921 /* initialize rx_buffer_info */
1922 memset(ring->rx_buffer_info, 0,
1923 sizeof(struct ixgbevf_rx_buffer) * ring->count);
1924
24bff091
ET		 1925 /* initialize Rx descriptor 0 */
1926 rx_desc = IXGBEVF_RX_DESC(ring, 0);
1927 rx_desc->wb.upper.length = 0;
1928
de02decb
DS		 1929 /* reset ntu and ntc to place SW in sync with hardwdare */
1930 ring->next_to_clean = 0;
1931 ring->next_to_use = 0;
bad17234 1932 ring->next_to_alloc = 0;
de02decb 1933
f15c5ba5 1934 ixgbevf_configure_srrctl(adapter, ring, reg_idx);
de02decb 1935
1ab37e12
ET		 1936 /* RXDCTL.RLPML does not work on 82599 */
1937 if (adapter->hw.mac.type != ixgbe_mac_82599_vf) {
1938 rxdctl &= ~(IXGBE_RXDCTL_RLPMLMASK |
1939 IXGBE_RXDCTL_RLPML_EN);
1940
1941#if (PAGE_SIZE < 8192)
1942 /* Limit the maximum frame size so we don't overrun the skb */
1943 if (ring_uses_build_skb(ring) &&
1944 !ring_uses_large_buffer(ring))
1945 rxdctl |= IXGBEVF_MAX_FRAME_BUILD_SKB |
1946 IXGBE_RXDCTL_RLPML_EN;
1947#endif
1948 }
bad17234 1949
de02decb
DS		 1950 rxdctl |= IXGBE_RXDCTL_ENABLE | IXGBE_RXDCTL_VME;
1951 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(reg_idx), rxdctl);
1952
1953 ixgbevf_rx_desc_queue_enable(adapter, ring);
095e2617 1954 ixgbevf_alloc_rx_buffers(ring, ixgbevf_desc_unused(ring));
de02decb
DS		 1955}
1956
f15c5ba5
ET		 1957static void ixgbevf_set_rx_buffer_len(struct ixgbevf_adapter *adapter,
1958 struct ixgbevf_ring *rx_ring)
1959{
1960 struct net_device *netdev = adapter->netdev;
1961 unsigned int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1962
1963 /* set build_skb and buffer size flags */
1ab37e12 1964 clear_ring_build_skb_enabled(rx_ring);
f15c5ba5
ET		 1965 clear_ring_uses_large_buffer(rx_ring);
1966
1967 if (adapter->flags & IXGBEVF_FLAGS_LEGACY_RX)
1968 return;
1969
1ab37e12
ET		 1970 set_ring_build_skb_enabled(rx_ring);
1971
954b54de
AB		 1972 if (PAGE_SIZE < 8192) {
1973 if (max_frame <= IXGBEVF_MAX_FRAME_BUILD_SKB)
1974 return;
f15c5ba5 1975
954b54de
AB		 1976 set_ring_uses_large_buffer(rx_ring);
1977 }
f15c5ba5
ET		 1978}
1979
92915f71
GR		 1980/**
1981 * ixgbevf_configure_rx - Configure 82599 VF Receive Unit after Reset
1982 * @adapter: board private structure
1983 *
1984 * Configure the Rx unit of the MAC after a reset.
1985 **/
1986static void ixgbevf_configure_rx(struct ixgbevf_adapter *adapter)
1987{
bad17234
ET		 1988 struct ixgbe_hw *hw = &adapter->hw;
1989 struct net_device *netdev = adapter->netdev;
6a11e52b 1990 int i, ret;
92915f71 1991
1bb9c639 1992 ixgbevf_setup_psrtype(adapter);
9295edb4
ET		 1993 if (hw->mac.type >= ixgbe_mac_X550_vf)
1994 ixgbevf_setup_vfmrqc(adapter);
dd1fe113 1995
14b22cd9 1996 spin_lock_bh(&adapter->mbx_lock);
bad17234 1997 /* notify the PF of our intent to use this size of frame */
6a11e52b 1998 ret = hw->mac.ops.set_rlpml(hw, netdev->mtu + ETH_HLEN + ETH_FCS_LEN);
14b22cd9 1999 spin_unlock_bh(&adapter->mbx_lock);
6a11e52b
TN		 2000 if (ret)
2001 dev_err(&adapter->pdev->dev,
2002 "Failed to set MTU at %d\n", netdev->mtu);
92915f71 2003
92915f71 2004 /* Setup the HW Rx Head and Tail Descriptor Pointers and
dec0d8e4
JK		 2005 * the Base and Length of the Rx Descriptor Ring
2006 */
f15c5ba5
ET		 2007 for (i = 0; i < adapter->num_rx_queues; i++) {
2008 struct ixgbevf_ring *rx_ring = adapter->rx_ring[i];
2009
2010 ixgbevf_set_rx_buffer_len(adapter, rx_ring);
2011 ixgbevf_configure_rx_ring(adapter, rx_ring);
2012 }
92915f71
GR		 2013}
2014
80d5c368
PM		 2015static int ixgbevf_vlan_rx_add_vid(struct net_device *netdev,
2016 __be16 proto, u16 vid)
92915f71
GR		 2017{
2018 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2019 struct ixgbe_hw *hw = &adapter->hw;
2ddc7fe1
AD		 2020 int err;
2021
55fdd45b 2022 spin_lock_bh(&adapter->mbx_lock);
1c55ed76 2023
92915f71 2024 /* add VID to filter table */
2ddc7fe1 2025 err = hw->mac.ops.set_vfta(hw, vid, 0, true);
1c55ed76 2026
55fdd45b 2027 spin_unlock_bh(&adapter->mbx_lock);
1c55ed76 2028
2ddc7fe1
AD		 2029 /* translate error return types so error makes sense */
2030 if (err == IXGBE_ERR_MBX)
2031 return -EIO;
2032
2033 if (err == IXGBE_ERR_INVALID_ARGUMENT)
2034 return -EACCES;
2035
dadcd65f 2036 set_bit(vid, adapter->active_vlans);
8e586137 2037
2ddc7fe1 2038 return err;
92915f71
GR		 2039}
2040
80d5c368
PM		 2041static int ixgbevf_vlan_rx_kill_vid(struct net_device *netdev,
2042 __be16 proto, u16 vid)
92915f71
GR		 2043{
2044 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2045 struct ixgbe_hw *hw = &adapter->hw;
50985b5f 2046 int err;
92915f71 2047
55fdd45b 2048 spin_lock_bh(&adapter->mbx_lock);
1c55ed76 2049
92915f71 2050 /* remove VID from filter table */
92fe0bf7 2051 err = hw->mac.ops.set_vfta(hw, vid, 0, false);
1c55ed76 2052
55fdd45b 2053 spin_unlock_bh(&adapter->mbx_lock);
1c55ed76 2054
dadcd65f 2055 clear_bit(vid, adapter->active_vlans);
8e586137 2056
2ddc7fe1 2057 return err;
92915f71
GR		 2058}
2059
2060static void ixgbevf_restore_vlan(struct ixgbevf_adapter *adapter)
2061{
dadcd65f 2062 u16 vid;
92915f71 2063
dadcd65f 2064 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
80d5c368
PM		 2065 ixgbevf_vlan_rx_add_vid(adapter->netdev,
2066 htons(ETH_P_8021Q), vid);
92915f71
GR		 2067}
2068
46ec20ff
GR		 2069static int ixgbevf_write_uc_addr_list(struct net_device *netdev)
2070{
2071 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2072 struct ixgbe_hw *hw = &adapter->hw;
2073 int count = 0;
2074
2075 if ((netdev_uc_count(netdev)) > 10) {
dbd9636e 2076 pr_err("Too many unicast filters - No Space\n");
46ec20ff
GR		 2077 return -ENOSPC;
2078 }
2079
2080 if (!netdev_uc_empty(netdev)) {
2081 struct netdev_hw_addr *ha;
dec0d8e4 2082
46ec20ff
GR		 2083 netdev_for_each_uc_addr(ha, netdev) {
2084 hw->mac.ops.set_uc_addr(hw, ++count, ha->addr);
2085 udelay(200);
2086 }
2087 } else {
dec0d8e4
JK		 2088 /* If the list is empty then send message to PF driver to
2089 * clear all MAC VLANs on this VF.
46ec20ff
GR		 2090 */
2091 hw->mac.ops.set_uc_addr(hw, 0, NULL);
2092 }
2093
2094 return count;
2095}
2096
92915f71 2097/**
dee847f5 2098 * ixgbevf_set_rx_mode - Multicast and unicast set
92915f71
GR		 2099 * @netdev: network interface device structure
2100 *
2101 * The set_rx_method entry point is called whenever the multicast address
dee847f5
GR		 2102 * list, unicast address list or the network interface flags are updated.
2103 * This routine is responsible for configuring the hardware for proper
2104 * multicast mode and configuring requested unicast filters.
92915f71
GR		 2105 **/
2106static void ixgbevf_set_rx_mode(struct net_device *netdev)
2107{
2108 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2109 struct ixgbe_hw *hw = &adapter->hw;
8443c1a4
HS		 2110 unsigned int flags = netdev->flags;
2111 int xcast_mode;
2112
41e544cd
DS		 2113 /* request the most inclusive mode we need */
2114 if (flags & IFF_PROMISC)
2115 xcast_mode = IXGBEVF_XCAST_MODE_PROMISC;
2116 else if (flags & IFF_ALLMULTI)
2117 xcast_mode = IXGBEVF_XCAST_MODE_ALLMULTI;
2118 else if (flags & (IFF_BROADCAST | IFF_MULTICAST))
2119 xcast_mode = IXGBEVF_XCAST_MODE_MULTI;
2120 else
2121 xcast_mode = IXGBEVF_XCAST_MODE_NONE;
2122
55fdd45b 2123 spin_lock_bh(&adapter->mbx_lock);
1c55ed76 2124
8b44a8a0 2125 hw->mac.ops.update_xcast_mode(hw, xcast_mode);
8443c1a4 2126
92915f71 2127 /* reprogram multicast list */
92fe0bf7 2128 hw->mac.ops.update_mc_addr_list(hw, netdev);
46ec20ff
GR		 2129
2130 ixgbevf_write_uc_addr_list(netdev);
1c55ed76 2131
55fdd45b 2132 spin_unlock_bh(&adapter->mbx_lock);
92915f71
GR		 2133}
2134
2135static void ixgbevf_napi_enable_all(struct ixgbevf_adapter *adapter)
2136{
2137 int q_idx;
2138 struct ixgbevf_q_vector *q_vector;
2139 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2140
2141 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
92915f71 2142 q_vector = adapter->q_vector[q_idx];
fa71ae27 2143 napi_enable(&q_vector->napi);
92915f71
GR		 2144 }
2145}
2146
2147static void ixgbevf_napi_disable_all(struct ixgbevf_adapter *adapter)
2148{
2149 int q_idx;
2150 struct ixgbevf_q_vector *q_vector;
2151 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2152
2153 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
2154 q_vector = adapter->q_vector[q_idx];
92915f71
GR		 2155 napi_disable(&q_vector->napi);
2156 }
2157}
2158
220fe050
DS		 2159static int ixgbevf_configure_dcb(struct ixgbevf_adapter *adapter)
2160{
2161 struct ixgbe_hw *hw = &adapter->hw;
2162 unsigned int def_q = 0;
2163 unsigned int num_tcs = 0;
2dc571aa
ET		 2164 unsigned int num_rx_queues = adapter->num_rx_queues;
2165 unsigned int num_tx_queues = adapter->num_tx_queues;
220fe050
DS		 2166 int err;
2167
2168 spin_lock_bh(&adapter->mbx_lock);
2169
2170 /* fetch queue configuration from the PF */
2171 err = ixgbevf_get_queues(hw, &num_tcs, &def_q);
2172
2173 spin_unlock_bh(&adapter->mbx_lock);
2174
2175 if (err)
2176 return err;
2177
2178 if (num_tcs > 1) {
2dc571aa
ET		 2179 /* we need only one Tx queue */
2180 num_tx_queues = 1;
2181
220fe050 2182 /* update default Tx ring register index */
87e70ab9 2183 adapter->tx_ring[0]->reg_idx = def_q;
220fe050
DS		 2184
2185 /* we need as many queues as traffic classes */
2186 num_rx_queues = num_tcs;
2187 }
2188
2189 /* if we have a bad config abort request queue reset */
2dc571aa
ET		 2190 if ((adapter->num_rx_queues != num_rx_queues) ||
2191 (adapter->num_tx_queues != num_tx_queues)) {
220fe050
DS		 2192 /* force mailbox timeout to prevent further messages */
2193 hw->mbx.timeout = 0;
2194
2195 /* wait for watchdog to come around and bail us out */
d5dd7c3f 2196 set_bit(__IXGBEVF_QUEUE_RESET_REQUESTED, &adapter->state);
220fe050
DS		 2197 }
2198
2199 return 0;
2200}
2201
92915f71
GR		 2202static void ixgbevf_configure(struct ixgbevf_adapter *adapter)
2203{
220fe050
DS		 2204 ixgbevf_configure_dcb(adapter);
2205
de02decb 2206 ixgbevf_set_rx_mode(adapter->netdev);
92915f71
GR		 2207
2208 ixgbevf_restore_vlan(adapter);
7f68d430 2209 ixgbevf_ipsec_restore(adapter);
92915f71
GR		 2210
2211 ixgbevf_configure_tx(adapter);
2212 ixgbevf_configure_rx(adapter);
92915f71
GR		 2213}
2214
33bd9f60
GR		 2215static void ixgbevf_save_reset_stats(struct ixgbevf_adapter *adapter)
2216{
2217 /* Only save pre-reset stats if there are some */
2218 if (adapter->stats.vfgprc || adapter->stats.vfgptc) {
2219 adapter->stats.saved_reset_vfgprc += adapter->stats.vfgprc -
2220 adapter->stats.base_vfgprc;
2221 adapter->stats.saved_reset_vfgptc += adapter->stats.vfgptc -
2222 adapter->stats.base_vfgptc;
2223 adapter->stats.saved_reset_vfgorc += adapter->stats.vfgorc -
2224 adapter->stats.base_vfgorc;
2225 adapter->stats.saved_reset_vfgotc += adapter->stats.vfgotc -
2226 adapter->stats.base_vfgotc;
2227 adapter->stats.saved_reset_vfmprc += adapter->stats.vfmprc -
2228 adapter->stats.base_vfmprc;
2229 }
2230}
2231
2232static void ixgbevf_init_last_counter_stats(struct ixgbevf_adapter *adapter)
2233{
2234 struct ixgbe_hw *hw = &adapter->hw;
2235
2236 adapter->stats.last_vfgprc = IXGBE_READ_REG(hw, IXGBE_VFGPRC);
2237 adapter->stats.last_vfgorc = IXGBE_READ_REG(hw, IXGBE_VFGORC_LSB);
2238 adapter->stats.last_vfgorc |=
2239 (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGORC_MSB))) << 32);
2240 adapter->stats.last_vfgptc = IXGBE_READ_REG(hw, IXGBE_VFGPTC);
2241 adapter->stats.last_vfgotc = IXGBE_READ_REG(hw, IXGBE_VFGOTC_LSB);
2242 adapter->stats.last_vfgotc |=
2243 (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGOTC_MSB))) << 32);
2244 adapter->stats.last_vfmprc = IXGBE_READ_REG(hw, IXGBE_VFMPRC);
2245
2246 adapter->stats.base_vfgprc = adapter->stats.last_vfgprc;
2247 adapter->stats.base_vfgorc = adapter->stats.last_vfgorc;
2248 adapter->stats.base_vfgptc = adapter->stats.last_vfgptc;
2249 adapter->stats.base_vfgotc = adapter->stats.last_vfgotc;
2250 adapter->stats.base_vfmprc = adapter->stats.last_vfmprc;
2251}
2252
31186785
AD		 2253static void ixgbevf_negotiate_api(struct ixgbevf_adapter *adapter)
2254{
2255 struct ixgbe_hw *hw = &adapter->hw;
7f68d430
SN		 2256 int api[] = { ixgbe_mbox_api_14,
2257 ixgbe_mbox_api_13,
41e544cd 2258 ixgbe_mbox_api_12,
94cf66f8 2259 ixgbe_mbox_api_11,
56e94095 2260 ixgbe_mbox_api_10,
31186785 2261 ixgbe_mbox_api_unknown };
50985b5f 2262 int err, idx = 0;
31186785 2263
55fdd45b 2264 spin_lock_bh(&adapter->mbx_lock);
31186785
AD		 2265
2266 while (api[idx] != ixgbe_mbox_api_unknown) {
2f8214fe 2267 err = hw->mac.ops.negotiate_api_version(hw, api[idx]);
31186785
AD		 2268 if (!err)
2269 break;
2270 idx++;
2271 }
2272
55fdd45b 2273 spin_unlock_bh(&adapter->mbx_lock);
31186785
AD		 2274}
2275
795180d8 2276static void ixgbevf_up_complete(struct ixgbevf_adapter *adapter)
92915f71
GR		 2277{
2278 struct net_device *netdev = adapter->netdev;
2279 struct ixgbe_hw *hw = &adapter->hw;
92915f71
GR		 2280
2281 ixgbevf_configure_msix(adapter);
2282
55fdd45b 2283 spin_lock_bh(&adapter->mbx_lock);
1c55ed76 2284
92fe0bf7
GR		 2285 if (is_valid_ether_addr(hw->mac.addr))
2286 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0);
2287 else
2288 hw->mac.ops.set_rar(hw, 0, hw->mac.perm_addr, 0);
92915f71 2289
55fdd45b 2290 spin_unlock_bh(&adapter->mbx_lock);
1c55ed76 2291
4e857c58 2292 smp_mb__before_atomic();
92915f71
GR		 2293 clear_bit(__IXGBEVF_DOWN, &adapter->state);
2294 ixgbevf_napi_enable_all(adapter);
2295
d9bdb57f
ET		 2296 /* clear any pending interrupts, may auto mask */
2297 IXGBE_READ_REG(hw, IXGBE_VTEICR);
2298 ixgbevf_irq_enable(adapter);
2299
92915f71
GR		 2300 /* enable transmits */
2301 netif_tx_start_all_queues(netdev);
2302
33bd9f60
GR		 2303 ixgbevf_save_reset_stats(adapter);
2304 ixgbevf_init_last_counter_stats(adapter);
2305
4b2cd27f 2306 hw->mac.get_link_status = 1;
9ac5c5cc 2307 mod_timer(&adapter->service_timer, jiffies);
92915f71
GR		 2308}
2309
795180d8 2310void ixgbevf_up(struct ixgbevf_adapter *adapter)
92915f71 2311{
92915f71
GR		 2312 ixgbevf_configure(adapter);
2313
795180d8 2314 ixgbevf_up_complete(adapter);
92915f71
GR		 2315}
2316
2317/**
2318 * ixgbevf_clean_rx_ring - Free Rx Buffers per Queue
92915f71
GR		 2319 * @rx_ring: ring to free buffers from
2320 **/
05d063aa 2321static void ixgbevf_clean_rx_ring(struct ixgbevf_ring *rx_ring)
92915f71 2322{
40b8178b 2323 u16 i = rx_ring->next_to_clean;
92915f71 2324
bad17234
ET		 2325 /* Free Rx ring sk_buff */
2326 if (rx_ring->skb) {
2327 dev_kfree_skb(rx_ring->skb);
2328 rx_ring->skb = NULL;
2329 }
2330
bad17234 2331 /* Free all the Rx ring pages */
40b8178b 2332 while (i != rx_ring->next_to_alloc) {
bad17234 2333 struct ixgbevf_rx_buffer *rx_buffer;
92915f71 2334
bad17234 2335 rx_buffer = &rx_ring->rx_buffer_info[i];
16b35949
ET		 2336
2337 /* Invalidate cache lines that may have been written to by
2338 * device so that we avoid corrupting memory.
2339 */
2340 dma_sync_single_range_for_cpu(rx_ring->dev,
2341 rx_buffer->dma,
2342 rx_buffer->page_offset,
f15c5ba5 2343 ixgbevf_rx_bufsz(rx_ring),
16b35949
ET		 2344 DMA_FROM_DEVICE);
2345
2346 /* free resources associated with mapping */
2347 dma_unmap_page_attrs(rx_ring->dev,
2348 rx_buffer->dma,
f15c5ba5 2349 ixgbevf_rx_pg_size(rx_ring),
16b35949
ET		 2350 DMA_FROM_DEVICE,
2351 IXGBEVF_RX_DMA_ATTR);
2352
35074d69
ET		 2353 __page_frag_cache_drain(rx_buffer->page,
2354 rx_buffer->pagecnt_bias);
2355
40b8178b
ET		 2356 i++;
2357 if (i == rx_ring->count)
2358 i = 0;
92915f71
GR		 2359 }
2360
40b8178b
ET		 2361 rx_ring->next_to_alloc = 0;
2362 rx_ring->next_to_clean = 0;
2363 rx_ring->next_to_use = 0;
92915f71
GR		 2364}
2365
2366/**
2367 * ixgbevf_clean_tx_ring - Free Tx Buffers
92915f71
GR		 2368 * @tx_ring: ring to be cleaned
2369 **/
05d063aa 2370static void ixgbevf_clean_tx_ring(struct ixgbevf_ring *tx_ring)
92915f71 2371{
865a4d98
ET		 2372 u16 i = tx_ring->next_to_clean;
2373 struct ixgbevf_tx_buffer *tx_buffer = &tx_ring->tx_buffer_info[i];
92915f71 2374
865a4d98
ET		 2375 while (i != tx_ring->next_to_use) {
2376 union ixgbe_adv_tx_desc *eop_desc, *tx_desc;
2377
2378 /* Free all the Tx ring sk_buffs */
21092e9c
TN		 2379 if (ring_is_xdp(tx_ring))
2380 page_frag_free(tx_buffer->data);
2381 else
2382 dev_kfree_skb_any(tx_buffer->skb);
865a4d98
ET		 2383
2384 /* unmap skb header data */
2385 dma_unmap_single(tx_ring->dev,
2386 dma_unmap_addr(tx_buffer, dma),
2387 dma_unmap_len(tx_buffer, len),
2388 DMA_TO_DEVICE);
2389
2390 /* check for eop_desc to determine the end of the packet */
2391 eop_desc = tx_buffer->next_to_watch;
2392 tx_desc = IXGBEVF_TX_DESC(tx_ring, i);
2393
2394 /* unmap remaining buffers */
2395 while (tx_desc != eop_desc) {
2396 tx_buffer++;
2397 tx_desc++;
2398 i++;
2399 if (unlikely(i == tx_ring->count)) {
2400 i = 0;
2401 tx_buffer = tx_ring->tx_buffer_info;
2402 tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
2403 }
c0456c23 2404
865a4d98
ET		 2405 /* unmap any remaining paged data */
2406 if (dma_unmap_len(tx_buffer, len))
2407 dma_unmap_page(tx_ring->dev,
2408 dma_unmap_addr(tx_buffer, dma),
2409 dma_unmap_len(tx_buffer, len),
2410 DMA_TO_DEVICE);
2411 }
2412
2413 /* move us one more past the eop_desc for start of next pkt */
2414 tx_buffer++;
2415 i++;
2416 if (unlikely(i == tx_ring->count)) {
2417 i = 0;
2418 tx_buffer = tx_ring->tx_buffer_info;
2419 }
92915f71
GR		 2420 }
2421
865a4d98
ET		 2422 /* reset next_to_use and next_to_clean */
2423 tx_ring->next_to_use = 0;
2424 tx_ring->next_to_clean = 0;
92915f71 2425
92915f71
GR		 2426}
2427
2428/**
2429 * ixgbevf_clean_all_rx_rings - Free Rx Buffers for all queues
2430 * @adapter: board private structure
2431 **/
2432static void ixgbevf_clean_all_rx_rings(struct ixgbevf_adapter *adapter)
2433{
2434 int i;
2435
2436 for (i = 0; i < adapter->num_rx_queues; i++)
05d063aa 2437 ixgbevf_clean_rx_ring(adapter->rx_ring[i]);
92915f71
GR		 2438}
2439
2440/**
2441 * ixgbevf_clean_all_tx_rings - Free Tx Buffers for all queues
2442 * @adapter: board private structure
2443 **/
2444static void ixgbevf_clean_all_tx_rings(struct ixgbevf_adapter *adapter)
2445{
2446 int i;
2447
2448 for (i = 0; i < adapter->num_tx_queues; i++)
05d063aa 2449 ixgbevf_clean_tx_ring(adapter->tx_ring[i]);
21092e9c
TN		 2450 for (i = 0; i < adapter->num_xdp_queues; i++)
2451 ixgbevf_clean_tx_ring(adapter->xdp_ring[i]);
92915f71
GR		 2452}
2453
2454void ixgbevf_down(struct ixgbevf_adapter *adapter)
2455{
2456 struct net_device *netdev = adapter->netdev;
2457 struct ixgbe_hw *hw = &adapter->hw;
de02decb 2458 int i;
92915f71
GR		 2459
2460 /* signal that we are down to the interrupt handler */
5b346dc9
MR		 2461 if (test_and_set_bit(__IXGBEVF_DOWN, &adapter->state))
2462 return; /* do nothing if already down */
858c3dda 2463
dec0d8e4 2464 /* disable all enabled Rx queues */
858c3dda 2465 for (i = 0; i < adapter->num_rx_queues; i++)
87e70ab9 2466 ixgbevf_disable_rx_queue(adapter, adapter->rx_ring[i]);
92915f71 2467
d9bdb57f 2468 usleep_range(10000, 20000);
92915f71
GR		 2469
2470 netif_tx_stop_all_queues(netdev);
2471
d9bdb57f
ET		 2472 /* call carrier off first to avoid false dev_watchdog timeouts */
2473 netif_carrier_off(netdev);
2474 netif_tx_disable(netdev);
2475
92915f71
GR		 2476 ixgbevf_irq_disable(adapter);
2477
2478 ixgbevf_napi_disable_all(adapter);
2479
9ac5c5cc 2480 del_timer_sync(&adapter->service_timer);
92915f71
GR		 2481
2482 /* disable transmits in the hardware now that interrupts are off */
2483 for (i = 0; i < adapter->num_tx_queues; i++) {
de02decb
DS		 2484 u8 reg_idx = adapter->tx_ring[i]->reg_idx;
2485
2486 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx),
2487 IXGBE_TXDCTL_SWFLSH);
92915f71
GR		 2488 }
2489
21092e9c
TN		 2490 for (i = 0; i < adapter->num_xdp_queues; i++) {
2491 u8 reg_idx = adapter->xdp_ring[i]->reg_idx;
2492
2493 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx),
2494 IXGBE_TXDCTL_SWFLSH);
2495 }
2496
92915f71
GR		 2497 if (!pci_channel_offline(adapter->pdev))
2498 ixgbevf_reset(adapter);
2499
2500 ixgbevf_clean_all_tx_rings(adapter);
2501 ixgbevf_clean_all_rx_rings(adapter);
2502}
2503
2504void ixgbevf_reinit_locked(struct ixgbevf_adapter *adapter)
2505{
2506 WARN_ON(in_interrupt());
c0456c23 2507
92915f71
GR		 2508 while (test_and_set_bit(__IXGBEVF_RESETTING, &adapter->state))
2509 msleep(1);
2510
4b2cd27f
AD		 2511 ixgbevf_down(adapter);
2512 ixgbevf_up(adapter);
92915f71
GR		 2513
2514 clear_bit(__IXGBEVF_RESETTING, &adapter->state);
2515}
2516
2517void ixgbevf_reset(struct ixgbevf_adapter *adapter)
2518{
2519 struct ixgbe_hw *hw = &adapter->hw;
2520 struct net_device *netdev = adapter->netdev;
2521
798e381a 2522 if (hw->mac.ops.reset_hw(hw)) {
92915f71 2523 hw_dbg(hw, "PF still resetting\n");
798e381a 2524 } else {
92915f71 2525 hw->mac.ops.init_hw(hw);
798e381a
DS		 2526 ixgbevf_negotiate_api(adapter);
2527 }
92915f71
GR		 2528
2529 if (is_valid_ether_addr(adapter->hw.mac.addr)) {
91a76baa
ET		 2530 ether_addr_copy(netdev->dev_addr, adapter->hw.mac.addr);
2531 ether_addr_copy(netdev->perm_addr, adapter->hw.mac.addr);
92915f71 2532 }
e66c92ad
ET		 2533
2534 adapter->last_reset = jiffies;
92915f71
GR		 2535}
2536
e45dd5fe
JK		 2537static int ixgbevf_acquire_msix_vectors(struct ixgbevf_adapter *adapter,
2538 int vectors)
92915f71 2539{
a5f9337b 2540 int vector_threshold;
92915f71 2541
fa71ae27
AD		 2542 /* We'll want at least 2 (vector_threshold):
2543 * 1) TxQ[0] + RxQ[0] handler
2544 * 2) Other (Link Status Change, etc.)
92915f71
GR		 2545 */
2546 vector_threshold = MIN_MSIX_COUNT;
2547
2548 /* The more we get, the more we will assign to Tx/Rx Cleanup
2549 * for the separate queues...where Rx Cleanup >= Tx Cleanup.
2550 * Right now, we simply care about how many we'll get; we'll
2551 * set them up later while requesting irq's.
2552 */
5c1e3588
AG		 2553 vectors = pci_enable_msix_range(adapter->pdev, adapter->msix_entries,
2554 vector_threshold, vectors);
92915f71 2555
5c1e3588 2556 if (vectors < 0) {
e45dd5fe
JK		 2557 dev_err(&adapter->pdev->dev,
2558 "Unable to allocate MSI-X interrupts\n");
92915f71
GR		 2559 kfree(adapter->msix_entries);
2560 adapter->msix_entries = NULL;
5c1e3588 2561 return vectors;
92915f71 2562 }
dee847f5 2563
5c1e3588
AG		 2564 /* Adjust for only the vectors we'll use, which is minimum
2565 * of max_msix_q_vectors + NON_Q_VECTORS, or the number of
2566 * vectors we were allocated.
2567 */
2568 adapter->num_msix_vectors = vectors;
2569
2570 return 0;
92915f71
GR		 2571}
2572
49ce9c2c
BH		 2573/**
2574 * ixgbevf_set_num_queues - Allocate queues for device, feature dependent
92915f71
GR		 2575 * @adapter: board private structure to initialize
2576 *
2577 * This is the top level queue allocation routine. The order here is very
2578 * important, starting with the "most" number of features turned on at once,
2579 * and ending with the smallest set of features. This way large combinations
2580 * can be allocated if they're turned on, and smaller combinations are the
2581 * fallthrough conditions.
2582 *
2583 **/
2584static void ixgbevf_set_num_queues(struct ixgbevf_adapter *adapter)
2585{
220fe050
DS		 2586 struct ixgbe_hw *hw = &adapter->hw;
2587 unsigned int def_q = 0;
2588 unsigned int num_tcs = 0;
2589 int err;
2590
92915f71
GR		 2591 /* Start with base case */
2592 adapter->num_rx_queues = 1;
2593 adapter->num_tx_queues = 1;
21092e9c 2594 adapter->num_xdp_queues = 0;
220fe050
DS		 2595
2596 spin_lock_bh(&adapter->mbx_lock);
2597
2598 /* fetch queue configuration from the PF */
2599 err = ixgbevf_get_queues(hw, &num_tcs, &def_q);
2600
2601 spin_unlock_bh(&adapter->mbx_lock);
2602
2603 if (err)
2604 return;
2605
2606 /* we need as many queues as traffic classes */
2dc571aa 2607 if (num_tcs > 1) {
220fe050 2608 adapter->num_rx_queues = num_tcs;
2dc571aa
ET		 2609 } else {
2610 u16 rss = min_t(u16, num_online_cpus(), IXGBEVF_MAX_RSS_QUEUES);
2611
2612 switch (hw->api_version) {
2613 case ixgbe_mbox_api_11:
94cf66f8 2614 case ixgbe_mbox_api_12:
41e544cd 2615 case ixgbe_mbox_api_13:
7f68d430 2616 case ixgbe_mbox_api_14:
21092e9c
TN		 2617 if (adapter->xdp_prog &&
2618 hw->mac.max_tx_queues == rss)
2619 rss = rss > 3 ? 2 : 1;
2620
2dc571aa
ET		 2621 adapter->num_rx_queues = rss;
2622 adapter->num_tx_queues = rss;
21092e9c 2623 adapter->num_xdp_queues = adapter->xdp_prog ? rss : 0;
2dc571aa
ET		 2624 default:
2625 break;
2626 }
2627 }
92915f71
GR		 2628}
2629
2630/**
21c046e4
ET		 2631 * ixgbevf_set_interrupt_capability - set MSI-X or FAIL if not supported
2632 * @adapter: board private structure to initialize
2633 *
2634 * Attempt to configure the interrupts using the best available
2635 * capabilities of the hardware and the kernel.
2636 **/
2637static int ixgbevf_set_interrupt_capability(struct ixgbevf_adapter *adapter)
2638{
2639 int vector, v_budget;
2640
2641 /* It's easy to be greedy for MSI-X vectors, but it really
2642 * doesn't do us much good if we have a lot more vectors
2643 * than CPU's. So let's be conservative and only ask for
2644 * (roughly) the same number of vectors as there are CPU's.
2645 * The default is to use pairs of vectors.
2646 */
2647 v_budget = max(adapter->num_rx_queues, adapter->num_tx_queues);
2648 v_budget = min_t(int, v_budget, num_online_cpus());
2649 v_budget += NON_Q_VECTORS;
2650
2651 adapter->msix_entries = kcalloc(v_budget,
2652 sizeof(struct msix_entry), GFP_KERNEL);
2653 if (!adapter->msix_entries)
2654 return -ENOMEM;
2655
2656 for (vector = 0; vector < v_budget; vector++)
2657 adapter->msix_entries[vector].entry = vector;
2658
2659 /* A failure in MSI-X entry allocation isn't fatal, but the VF driver
2660 * does not support any other modes, so we will simply fail here. Note
2661 * that we clean up the msix_entries pointer else-where.
2662 */
2663 return ixgbevf_acquire_msix_vectors(adapter, v_budget);
2664}
2665
2666static void ixgbevf_add_ring(struct ixgbevf_ring *ring,
2667 struct ixgbevf_ring_container *head)
2668{
2669 ring->next = head->ring;
2670 head->ring = ring;
2671 head->count++;
2672}
2673
2674/**
2675 * ixgbevf_alloc_q_vector - Allocate memory for a single interrupt vector
92915f71 2676 * @adapter: board private structure to initialize
21c046e4
ET		 2677 * @v_idx: index of vector in adapter struct
2678 * @txr_count: number of Tx rings for q vector
2679 * @txr_idx: index of first Tx ring to assign
21092e9c
TN		 2680 * @xdp_count: total number of XDP rings to allocate
2681 * @xdp_idx: index of first XDP ring to allocate
21c046e4
ET		 2682 * @rxr_count: number of Rx rings for q vector
2683 * @rxr_idx: index of first Rx ring to assign
92915f71 2684 *
21c046e4 2685 * We allocate one q_vector. If allocation fails we return -ENOMEM.
92915f71 2686 **/
21c046e4
ET		 2687static int ixgbevf_alloc_q_vector(struct ixgbevf_adapter *adapter, int v_idx,
2688 int txr_count, int txr_idx,
21092e9c 2689 int xdp_count, int xdp_idx,
21c046e4 2690 int rxr_count, int rxr_idx)
92915f71 2691{
21c046e4 2692 struct ixgbevf_q_vector *q_vector;
21092e9c 2693 int reg_idx = txr_idx + xdp_idx;
87e70ab9 2694 struct ixgbevf_ring *ring;
21c046e4
ET		 2695 int ring_count, size;
2696
21092e9c 2697 ring_count = txr_count + xdp_count + rxr_count;
21c046e4
ET		 2698 size = sizeof(*q_vector) + (sizeof(*ring) * ring_count);
2699
2700 /* allocate q_vector and rings */
2701 q_vector = kzalloc(size, GFP_KERNEL);
2702 if (!q_vector)
2703 return -ENOMEM;
2704
2705 /* initialize NAPI */
2706 netif_napi_add(adapter->netdev, &q_vector->napi, ixgbevf_poll, 64);
2707
2708 /* tie q_vector and adapter together */
2709 adapter->q_vector[v_idx] = q_vector;
2710 q_vector->adapter = adapter;
2711 q_vector->v_idx = v_idx;
92915f71 2712
21c046e4
ET		 2713 /* initialize pointer to rings */
2714 ring = q_vector->ring;
92915f71 2715
21c046e4
ET		 2716 while (txr_count) {
2717 /* assign generic ring traits */
87e70ab9
DS		 2718 ring->dev = &adapter->pdev->dev;
2719 ring->netdev = adapter->netdev;
21c046e4
ET		 2720
2721 /* configure backlink on ring */
2722 ring->q_vector = q_vector;
2723
2724 /* update q_vector Tx values */
2725 ixgbevf_add_ring(ring, &q_vector->tx);
2726
2727 /* apply Tx specific ring traits */
87e70ab9 2728 ring->count = adapter->tx_ring_count;
21c046e4 2729 ring->queue_index = txr_idx;
21092e9c 2730 ring->reg_idx = reg_idx;
92915f71 2731
21c046e4
ET		 2732 /* assign ring to adapter */
2733 adapter->tx_ring[txr_idx] = ring;
2734
2735 /* update count and index */
2736 txr_count--;
2737 txr_idx++;
21092e9c
TN		 2738 reg_idx++;
2739
2740 /* push pointer to next ring */
2741 ring++;
2742 }
2743
2744 while (xdp_count) {
2745 /* assign generic ring traits */
2746 ring->dev = &adapter->pdev->dev;
2747 ring->netdev = adapter->netdev;
2748
2749 /* configure backlink on ring */
2750 ring->q_vector = q_vector;
2751
2752 /* update q_vector Tx values */
2753 ixgbevf_add_ring(ring, &q_vector->tx);
2754
2755 /* apply Tx specific ring traits */
2756 ring->count = adapter->tx_ring_count;
2757 ring->queue_index = xdp_idx;
2758 ring->reg_idx = reg_idx;
2759 set_ring_xdp(ring);
2760
2761 /* assign ring to adapter */
2762 adapter->xdp_ring[xdp_idx] = ring;
2763
2764 /* update count and index */
2765 xdp_count--;
2766 xdp_idx++;
2767 reg_idx++;
92915f71 2768
21c046e4
ET		 2769 /* push pointer to next ring */
2770 ring++;
2771 }
87e70ab9 2772
21c046e4
ET		 2773 while (rxr_count) {
2774 /* assign generic ring traits */
87e70ab9
DS		 2775 ring->dev = &adapter->pdev->dev;
2776 ring->netdev = adapter->netdev;
2777
21c046e4
ET		 2778 /* configure backlink on ring */
2779 ring->q_vector = q_vector;
2780
2781 /* update q_vector Rx values */
2782 ixgbevf_add_ring(ring, &q_vector->rx);
2783
2784 /* apply Rx specific ring traits */
87e70ab9 2785 ring->count = adapter->rx_ring_count;
21c046e4
ET		 2786 ring->queue_index = rxr_idx;
2787 ring->reg_idx = rxr_idx;
87e70ab9 2788
21c046e4
ET		 2789 /* assign ring to adapter */
2790 adapter->rx_ring[rxr_idx] = ring;
92915f71 2791
21c046e4
ET		 2792 /* update count and index */
2793 rxr_count--;
2794 rxr_idx++;
92915f71 2795
21c046e4
ET		 2796 /* push pointer to next ring */
2797 ring++;
87e70ab9
DS		 2798 }
2799
21c046e4 2800 return 0;
92915f71
GR		 2801}
2802
2803/**
21c046e4 2804 * ixgbevf_free_q_vector - Free memory allocated for specific interrupt vector
92915f71 2805 * @adapter: board private structure to initialize
21c046e4 2806 * @v_idx: index of vector in adapter struct
92915f71 2807 *
21c046e4
ET		 2808 * This function frees the memory allocated to the q_vector. In addition if
2809 * NAPI is enabled it will delete any references to the NAPI struct prior
2810 * to freeing the q_vector.
92915f71 2811 **/
21c046e4 2812static void ixgbevf_free_q_vector(struct ixgbevf_adapter *adapter, int v_idx)
92915f71 2813{
21c046e4
ET		 2814 struct ixgbevf_q_vector *q_vector = adapter->q_vector[v_idx];
2815 struct ixgbevf_ring *ring;
92915f71 2816
21092e9c
TN		 2817 ixgbevf_for_each_ring(ring, q_vector->tx) {
2818 if (ring_is_xdp(ring))
2819 adapter->xdp_ring[ring->queue_index] = NULL;
2820 else
2821 adapter->tx_ring[ring->queue_index] = NULL;
2822 }
92915f71 2823
21c046e4
ET		 2824 ixgbevf_for_each_ring(ring, q_vector->rx)
2825 adapter->rx_ring[ring->queue_index] = NULL;
92915f71 2826
21c046e4
ET		 2827 adapter->q_vector[v_idx] = NULL;
2828 netif_napi_del(&q_vector->napi);
92915f71 2829
21c046e4
ET		 2830 /* ixgbevf_get_stats() might access the rings on this vector,
2831 * we must wait a grace period before freeing it.
2832 */
2833 kfree_rcu(q_vector, rcu);
92915f71
GR		 2834}
2835
2836/**
2837 * ixgbevf_alloc_q_vectors - Allocate memory for interrupt vectors
2838 * @adapter: board private structure to initialize
2839 *
2840 * We allocate one q_vector per queue interrupt. If allocation fails we
2841 * return -ENOMEM.
2842 **/
2843static int ixgbevf_alloc_q_vectors(struct ixgbevf_adapter *adapter)
2844{
21c046e4
ET		 2845 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2846 int rxr_remaining = adapter->num_rx_queues;
2847 int txr_remaining = adapter->num_tx_queues;
21092e9c
TN		 2848 int xdp_remaining = adapter->num_xdp_queues;
2849 int rxr_idx = 0, txr_idx = 0, xdp_idx = 0, v_idx = 0;
21c046e4
ET		 2850 int err;
2851
21092e9c 2852 if (q_vectors >= (rxr_remaining + txr_remaining + xdp_remaining)) {
21c046e4
ET		 2853 for (; rxr_remaining; v_idx++, q_vectors--) {
2854 int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors);
2855
2856 err = ixgbevf_alloc_q_vector(adapter, v_idx,
21092e9c 2857 0, 0, 0, 0, rqpv, rxr_idx);
21c046e4
ET		 2858 if (err)
2859 goto err_out;
2860
2861 /* update counts and index */
2862 rxr_remaining -= rqpv;
2863 rxr_idx += rqpv;
2864 }
2865 }
2866
2867 for (; q_vectors; v_idx++, q_vectors--) {
2868 int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors);
2869 int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors);
21092e9c 2870 int xqpv = DIV_ROUND_UP(xdp_remaining, q_vectors);
92915f71 2871
21c046e4
ET		 2872 err = ixgbevf_alloc_q_vector(adapter, v_idx,
2873 tqpv, txr_idx,
21092e9c 2874 xqpv, xdp_idx,
21c046e4 2875 rqpv, rxr_idx);
92915f71 2876
21c046e4 2877 if (err)
92915f71 2878 goto err_out;
21c046e4
ET		 2879
2880 /* update counts and index */
2881 rxr_remaining -= rqpv;
2882 rxr_idx += rqpv;
2883 txr_remaining -= tqpv;
2884 txr_idx += tqpv;
21092e9c
TN		 2885 xdp_remaining -= xqpv;
2886 xdp_idx += xqpv;
92915f71
GR		 2887 }
2888
2889 return 0;
2890
2891err_out:
21c046e4
ET		 2892 while (v_idx) {
2893 v_idx--;
2894 ixgbevf_free_q_vector(adapter, v_idx);
92915f71 2895 }
21c046e4 2896
92915f71
GR		 2897 return -ENOMEM;
2898}
2899
2900/**
2901 * ixgbevf_free_q_vectors - Free memory allocated for interrupt vectors
2902 * @adapter: board private structure to initialize
2903 *
2904 * This function frees the memory allocated to the q_vectors. In addition if
2905 * NAPI is enabled it will delete any references to the NAPI struct prior
2906 * to freeing the q_vector.
2907 **/
2908static void ixgbevf_free_q_vectors(struct ixgbevf_adapter *adapter)
2909{
21c046e4 2910 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
92915f71 2911
21c046e4
ET		 2912 while (q_vectors) {
2913 q_vectors--;
2914 ixgbevf_free_q_vector(adapter, q_vectors);
92915f71
GR		 2915 }
2916}
2917
2918/**
2919 * ixgbevf_reset_interrupt_capability - Reset MSIX setup
2920 * @adapter: board private structure
2921 *
2922 **/
2923static void ixgbevf_reset_interrupt_capability(struct ixgbevf_adapter *adapter)
2924{
eeffceee
MR		 2925 if (!adapter->msix_entries)
2926 return;
2927
92915f71
GR		 2928 pci_disable_msix(adapter->pdev);
2929 kfree(adapter->msix_entries);
2930 adapter->msix_entries = NULL;
92915f71
GR		 2931}
2932
2933/**
2934 * ixgbevf_init_interrupt_scheme - Determine if MSIX is supported and init
2935 * @adapter: board private structure to initialize
2936 *
2937 **/
2938static int ixgbevf_init_interrupt_scheme(struct ixgbevf_adapter *adapter)
2939{
2940 int err;
2941
2942 /* Number of supported queues */
2943 ixgbevf_set_num_queues(adapter);
2944
2945 err = ixgbevf_set_interrupt_capability(adapter);
2946 if (err) {
2947 hw_dbg(&adapter->hw,
2948 "Unable to setup interrupt capabilities\n");
2949 goto err_set_interrupt;
2950 }
2951
2952 err = ixgbevf_alloc_q_vectors(adapter);
2953 if (err) {
dec0d8e4 2954 hw_dbg(&adapter->hw, "Unable to allocate memory for queue vectors\n");
92915f71
GR		 2955 goto err_alloc_q_vectors;
2956 }
2957
21092e9c
TN		 2958 hw_dbg(&adapter->hw, "Multiqueue %s: Rx Queue count = %u, Tx Queue count = %u XDP Queue count %u\n",
2959 (adapter->num_rx_queues > 1) ? "Enabled" : "Disabled",
2960 adapter->num_rx_queues, adapter->num_tx_queues,
2961 adapter->num_xdp_queues);
92915f71
GR		 2962
2963 set_bit(__IXGBEVF_DOWN, &adapter->state);
2964
2965 return 0;
92915f71
GR		 2966err_alloc_q_vectors:
2967 ixgbevf_reset_interrupt_capability(adapter);
2968err_set_interrupt:
2969 return err;
2970}
2971
0ac1e8ce
AD		 2972/**
2973 * ixgbevf_clear_interrupt_scheme - Clear the current interrupt scheme settings
2974 * @adapter: board private structure to clear interrupt scheme on
2975 *
2976 * We go through and clear interrupt specific resources and reset the structure
2977 * to pre-load conditions
2978 **/
2979static void ixgbevf_clear_interrupt_scheme(struct ixgbevf_adapter *adapter)
2980{
2981 adapter->num_tx_queues = 0;
21092e9c 2982 adapter->num_xdp_queues = 0;
0ac1e8ce
AD		 2983 adapter->num_rx_queues = 0;
2984
2985 ixgbevf_free_q_vectors(adapter);
2986 ixgbevf_reset_interrupt_capability(adapter);
2987}
2988
92915f71
GR		 2989/**
2990 * ixgbevf_sw_init - Initialize general software structures
92915f71
GR		 2991 * @adapter: board private structure to initialize
2992 *
2993 * ixgbevf_sw_init initializes the Adapter private data structure.
2994 * Fields are initialized based on PCI device information and
2995 * OS network device settings (MTU size).
2996 **/
9f9a12f8 2997static int ixgbevf_sw_init(struct ixgbevf_adapter *adapter)
92915f71
GR		 2998{
2999 struct ixgbe_hw *hw = &adapter->hw;
3000 struct pci_dev *pdev = adapter->pdev;
e1941a74 3001 struct net_device *netdev = adapter->netdev;
92915f71
GR		 3002 int err;
3003
3004 /* PCI config space info */
92915f71
GR		 3005 hw->vendor_id = pdev->vendor;
3006 hw->device_id = pdev->device;
ff938e43 3007 hw->revision_id = pdev->revision;
92915f71
GR		 3008 hw->subsystem_vendor_id = pdev->subsystem_vendor;
3009 hw->subsystem_device_id = pdev->subsystem_device;
3010
3011 hw->mbx.ops.init_params(hw);
56e94095 3012
e60ae003
TN		 3013 if (hw->mac.type >= ixgbe_mac_X550_vf) {
3014 err = ixgbevf_init_rss_key(adapter);
3015 if (err)
3016 goto out;
3017 }
3018
56e94095
AD		 3019 /* assume legacy case in which PF would only give VF 2 queues */
3020 hw->mac.max_tx_queues = 2;
3021 hw->mac.max_rx_queues = 2;
3022
798e381a
DS		 3023 /* lock to protect mailbox accesses */
3024 spin_lock_init(&adapter->mbx_lock);
3025
92915f71
GR		 3026 err = hw->mac.ops.reset_hw(hw);
3027 if (err) {
3028 dev_info(&pdev->dev,
e1941a74 3029 "PF still in reset state. Is the PF interface up?\n");
92915f71
GR		 3030 } else {
3031 err = hw->mac.ops.init_hw(hw);
3032 if (err) {
dbd9636e 3033 pr_err("init_shared_code failed: %d\n", err);
92915f71
GR		 3034 goto out;
3035 }
798e381a 3036 ixgbevf_negotiate_api(adapter);
e1941a74
GR		 3037 err = hw->mac.ops.get_mac_addr(hw, hw->mac.addr);
3038 if (err)
3039 dev_info(&pdev->dev, "Error reading MAC address\n");
3040 else if (is_zero_ether_addr(adapter->hw.mac.addr))
3041 dev_info(&pdev->dev,
3042 "MAC address not assigned by administrator.\n");
91a76baa 3043 ether_addr_copy(netdev->dev_addr, hw->mac.addr);
e1941a74
GR		 3044 }
3045
3046 if (!is_valid_ether_addr(netdev->dev_addr)) {
3047 dev_info(&pdev->dev, "Assigning random MAC address\n");
3048 eth_hw_addr_random(netdev);
91a76baa 3049 ether_addr_copy(hw->mac.addr, netdev->dev_addr);
465fc643 3050 ether_addr_copy(hw->mac.perm_addr, netdev->dev_addr);
92915f71
GR		 3051 }
3052
3053 /* Enable dynamic interrupt throttling rates */
5f3600eb
AD		 3054 adapter->rx_itr_setting = 1;
3055 adapter->tx_itr_setting = 1;
92915f71 3056
92915f71
GR		 3057 /* set default ring sizes */
3058 adapter->tx_ring_count = IXGBEVF_DEFAULT_TXD;
3059 adapter->rx_ring_count = IXGBEVF_DEFAULT_RXD;
3060
92915f71 3061 set_bit(__IXGBEVF_DOWN, &adapter->state);
1a0d6ae5 3062 return 0;
92915f71
GR		 3063
3064out:
3065 return err;
3066}
3067
92915f71
GR		 3068#define UPDATE_VF_COUNTER_32bit(reg, last_counter, counter) \
3069 { \
3070 u32 current_counter = IXGBE_READ_REG(hw, reg); \
3071 if (current_counter < last_counter) \
3072 counter += 0x100000000LL; \
3073 last_counter = current_counter; \
3074 counter &= 0xFFFFFFFF00000000LL; \
3075 counter |= current_counter; \
3076 }
3077
3078#define UPDATE_VF_COUNTER_36bit(reg_lsb, reg_msb, last_counter, counter) \
3079 { \
3080 u64 current_counter_lsb = IXGBE_READ_REG(hw, reg_lsb); \
3081 u64 current_counter_msb = IXGBE_READ_REG(hw, reg_msb); \
dec0d8e4
JK		 3082 u64 current_counter = (current_counter_msb << 32) | \
3083 current_counter_lsb; \
92915f71
GR		 3084 if (current_counter < last_counter) \
3085 counter += 0x1000000000LL; \
3086 last_counter = current_counter; \
3087 counter &= 0xFFFFFFF000000000LL; \
3088 counter |= current_counter; \
3089 }
3090/**
3091 * ixgbevf_update_stats - Update the board statistics counters.
3092 * @adapter: board private structure
3093 **/
3094void ixgbevf_update_stats(struct ixgbevf_adapter *adapter)
3095{
3096 struct ixgbe_hw *hw = &adapter->hw;
2a35efe5
ET		 3097 u64 alloc_rx_page_failed = 0, alloc_rx_buff_failed = 0;
3098 u64 alloc_rx_page = 0, hw_csum_rx_error = 0;
55fb277c 3099 int i;
92915f71 3100
e66c92ad
ET		 3101 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
3102 test_bit(__IXGBEVF_RESETTING, &adapter->state))
088245a3
GR		 3103 return;
3104
92915f71
GR		 3105 UPDATE_VF_COUNTER_32bit(IXGBE_VFGPRC, adapter->stats.last_vfgprc,
3106 adapter->stats.vfgprc);
3107 UPDATE_VF_COUNTER_32bit(IXGBE_VFGPTC, adapter->stats.last_vfgptc,
3108 adapter->stats.vfgptc);
3109 UPDATE_VF_COUNTER_36bit(IXGBE_VFGORC_LSB, IXGBE_VFGORC_MSB,
3110 adapter->stats.last_vfgorc,
3111 adapter->stats.vfgorc);
3112 UPDATE_VF_COUNTER_36bit(IXGBE_VFGOTC_LSB, IXGBE_VFGOTC_MSB,
3113 adapter->stats.last_vfgotc,
3114 adapter->stats.vfgotc);
3115 UPDATE_VF_COUNTER_32bit(IXGBE_VFMPRC, adapter->stats.last_vfmprc,
3116 adapter->stats.vfmprc);
55fb277c
GR		 3117
3118 for (i = 0; i < adapter->num_rx_queues; i++) {
2a35efe5
ET		 3119 struct ixgbevf_ring *rx_ring = adapter->rx_ring[i];
3120
3121 hw_csum_rx_error += rx_ring->rx_stats.csum_err;
3122 alloc_rx_page_failed += rx_ring->rx_stats.alloc_rx_page_failed;
3123 alloc_rx_buff_failed += rx_ring->rx_stats.alloc_rx_buff_failed;
3124 alloc_rx_page += rx_ring->rx_stats.alloc_rx_page;
55fb277c 3125 }
2a35efe5
ET		 3126
3127 adapter->hw_csum_rx_error = hw_csum_rx_error;
3128 adapter->alloc_rx_page_failed = alloc_rx_page_failed;
3129 adapter->alloc_rx_buff_failed = alloc_rx_buff_failed;
3130 adapter->alloc_rx_page = alloc_rx_page;
92915f71
GR		 3131}
3132
3133/**
9ac5c5cc 3134 * ixgbevf_service_timer - Timer Call-back
e23cf38f 3135 * @t: pointer to timer_list struct
92915f71 3136 **/
26566eae 3137static void ixgbevf_service_timer(struct timer_list *t)
92915f71 3138{
26566eae
KC		 3139 struct ixgbevf_adapter *adapter = from_timer(adapter, t,
3140 service_timer);
e66c92ad 3141
9ac5c5cc
ET		 3142 /* Reset the timer */
3143 mod_timer(&adapter->service_timer, (HZ * 2) + jiffies);
3144
3145 ixgbevf_service_event_schedule(adapter);
e66c92ad
ET		 3146}
3147
9ac5c5cc 3148static void ixgbevf_reset_subtask(struct ixgbevf_adapter *adapter)
e66c92ad 3149{
d5dd7c3f 3150 if (!test_and_clear_bit(__IXGBEVF_RESET_REQUESTED, &adapter->state))
9ac5c5cc 3151 return;
e66c92ad 3152
7d6446db 3153 rtnl_lock();
e66c92ad
ET		 3154 /* If we're already down or resetting, just bail */
3155 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
6e469ed0 3156 test_bit(__IXGBEVF_REMOVING, &adapter->state) ||
7d6446db
ET		 3157 test_bit(__IXGBEVF_RESETTING, &adapter->state)) {
3158 rtnl_unlock();
e66c92ad 3159 return;
7d6446db 3160 }
e66c92ad
ET		 3161
3162 adapter->tx_timeout_count++;
3163
3164 ixgbevf_reinit_locked(adapter);
8e8247ab 3165 rtnl_unlock();
e66c92ad
ET		 3166}
3167
dec0d8e4
JK		 3168/**
3169 * ixgbevf_check_hang_subtask - check for hung queues and dropped interrupts
3170 * @adapter: pointer to the device adapter structure
e66c92ad
ET		 3171 *
3172 * This function serves two purposes. First it strobes the interrupt lines
3173 * in order to make certain interrupts are occurring. Secondly it sets the
3174 * bits needed to check for TX hangs. As a result we should immediately
3175 * determine if a hang has occurred.
dec0d8e4 3176 **/
e66c92ad
ET		 3177static void ixgbevf_check_hang_subtask(struct ixgbevf_adapter *adapter)
3178{
92915f71 3179 struct ixgbe_hw *hw = &adapter->hw;
5f3600eb 3180 u32 eics = 0;
92915f71
GR		 3181 int i;
3182
e66c92ad
ET		 3183 /* If we're down or resetting, just bail */
3184 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
3185 test_bit(__IXGBEVF_RESETTING, &adapter->state))
3186 return;
92915f71 3187
e08400b7
ET		 3188 /* Force detection of hung controller */
3189 if (netif_carrier_ok(adapter->netdev)) {
3190 for (i = 0; i < adapter->num_tx_queues; i++)
3191 set_check_for_tx_hang(adapter->tx_ring[i]);
21092e9c
TN		 3192 for (i = 0; i < adapter->num_xdp_queues; i++)
3193 set_check_for_tx_hang(adapter->xdp_ring[i]);
e08400b7
ET		 3194 }
3195
dec0d8e4 3196 /* get one bit for every active Tx/Rx interrupt vector */
92915f71
GR		 3197 for (i = 0; i < adapter->num_msix_vectors - NON_Q_VECTORS; i++) {
3198 struct ixgbevf_q_vector *qv = adapter->q_vector[i];
9ac5c5cc 3199
6b43c446 3200 if (qv->rx.ring || qv->tx.ring)
8d055cc0 3201 eics |= BIT(i);
92915f71
GR		 3202 }
3203
e66c92ad 3204 /* Cause software interrupt to ensure rings are cleaned */
5f3600eb 3205 IXGBE_WRITE_REG(hw, IXGBE_VTEICS, eics);
e66c92ad 3206}
92915f71 3207
e66c92ad
ET		 3208/**
3209 * ixgbevf_watchdog_update_link - update the link status
dec0d8e4 3210 * @adapter: pointer to the device adapter structure
e66c92ad
ET		 3211 **/
3212static void ixgbevf_watchdog_update_link(struct ixgbevf_adapter *adapter)
3213{
3214 struct ixgbe_hw *hw = &adapter->hw;
3215 u32 link_speed = adapter->link_speed;
3216 bool link_up = adapter->link_up;
3217 s32 err;
3218
3219 spin_lock_bh(&adapter->mbx_lock);
3220
3221 err = hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
3222
3223 spin_unlock_bh(&adapter->mbx_lock);
3224
3225 /* if check for link returns error we will need to reset */
3226 if (err && time_after(jiffies, adapter->last_reset + (10 * HZ))) {
d5dd7c3f 3227 set_bit(__IXGBEVF_RESET_REQUESTED, &adapter->state);
e66c92ad
ET		 3228 link_up = false;
3229 }
3230
3231 adapter->link_up = link_up;
3232 adapter->link_speed = link_speed;
92915f71
GR		 3233}
3234
e66c92ad
ET		 3235/**
3236 * ixgbevf_watchdog_link_is_up - update netif_carrier status and
3237 * print link up message
dec0d8e4 3238 * @adapter: pointer to the device adapter structure
e66c92ad
ET		 3239 **/
3240static void ixgbevf_watchdog_link_is_up(struct ixgbevf_adapter *adapter)
92915f71 3241{
e66c92ad 3242 struct net_device *netdev = adapter->netdev;
92915f71 3243
e66c92ad
ET		 3244 /* only continue if link was previously down */
3245 if (netif_carrier_ok(netdev))
92915f71
GR		 3246 return;
3247
e66c92ad
ET		 3248 dev_info(&adapter->pdev->dev, "NIC Link is Up %s\n",
3249 (adapter->link_speed == IXGBE_LINK_SPEED_10GB_FULL) ?
3250 "10 Gbps" :
3251 (adapter->link_speed == IXGBE_LINK_SPEED_1GB_FULL) ?
3252 "1 Gbps" :
3253 (adapter->link_speed == IXGBE_LINK_SPEED_100_FULL) ?
3254 "100 Mbps" :
3255 "unknown speed");
92915f71 3256
e66c92ad
ET		 3257 netif_carrier_on(netdev);
3258}
3259
3260/**
3261 * ixgbevf_watchdog_link_is_down - update netif_carrier status and
3262 * print link down message
dec0d8e4 3263 * @adapter: pointer to the adapter structure
e66c92ad
ET		 3264 **/
3265static void ixgbevf_watchdog_link_is_down(struct ixgbevf_adapter *adapter)
3266{
3267 struct net_device *netdev = adapter->netdev;
3268
3269 adapter->link_speed = 0;
3270
3271 /* only continue if link was up previously */
3272 if (!netif_carrier_ok(netdev))
3273 return;
3274
3275 dev_info(&adapter->pdev->dev, "NIC Link is Down\n");
3276
3277 netif_carrier_off(netdev);
92915f71
GR		 3278}
3279
3280/**
9ac5c5cc 3281 * ixgbevf_watchdog_subtask - worker thread to bring link up
e23cf38f 3282 * @adapter: board private structure
9ac5c5cc
ET		 3283 **/
3284static void ixgbevf_watchdog_subtask(struct ixgbevf_adapter *adapter)
3285{
3286 /* if interface is down do nothing */
3287 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
3288 test_bit(__IXGBEVF_RESETTING, &adapter->state))
3289 return;
3290
3291 ixgbevf_watchdog_update_link(adapter);
3292
3293 if (adapter->link_up)
3294 ixgbevf_watchdog_link_is_up(adapter);
3295 else
3296 ixgbevf_watchdog_link_is_down(adapter);
3297
3298 ixgbevf_update_stats(adapter);
3299}
3300
3301/**
3302 * ixgbevf_service_task - manages and runs subtasks
92915f71
GR		 3303 * @work: pointer to work_struct containing our data
3304 **/
9ac5c5cc 3305static void ixgbevf_service_task(struct work_struct *work)
92915f71
GR		 3306{
3307 struct ixgbevf_adapter *adapter = container_of(work,
3308 struct ixgbevf_adapter,
9ac5c5cc 3309 service_task);
92915f71 3310 struct ixgbe_hw *hw = &adapter->hw;
92915f71 3311
26597802
MR		 3312 if (IXGBE_REMOVED(hw->hw_addr)) {
3313 if (!test_bit(__IXGBEVF_DOWN, &adapter->state)) {
3314 rtnl_lock();
3315 ixgbevf_down(adapter);
3316 rtnl_unlock();
3317 }
3318 return;
3319 }
e66c92ad 3320
220fe050 3321 ixgbevf_queue_reset_subtask(adapter);
9ac5c5cc
ET		 3322 ixgbevf_reset_subtask(adapter);
3323 ixgbevf_watchdog_subtask(adapter);
e66c92ad
ET		 3324 ixgbevf_check_hang_subtask(adapter);
3325
9ac5c5cc 3326 ixgbevf_service_event_complete(adapter);
92915f71
GR		 3327}
3328
3329/**
3330 * ixgbevf_free_tx_resources - Free Tx Resources per Queue
92915f71
GR		 3331 * @tx_ring: Tx descriptor ring for a specific queue
3332 *
3333 * Free all transmit software resources
3334 **/
05d063aa 3335void ixgbevf_free_tx_resources(struct ixgbevf_ring *tx_ring)
92915f71 3336{
05d063aa 3337 ixgbevf_clean_tx_ring(tx_ring);
92915f71
GR		 3338
3339 vfree(tx_ring->tx_buffer_info);
3340 tx_ring->tx_buffer_info = NULL;
3341
de02decb
DS		 3342 /* if not set, then don't free */
3343 if (!tx_ring->desc)
3344 return;
3345
05d063aa 3346 dma_free_coherent(tx_ring->dev, tx_ring->size, tx_ring->desc,
2a1f8794 3347 tx_ring->dma);
92915f71
GR		 3348
3349 tx_ring->desc = NULL;
3350}
3351
3352/**
3353 * ixgbevf_free_all_tx_resources - Free Tx Resources for All Queues
3354 * @adapter: board private structure
3355 *
3356 * Free all transmit software resources
3357 **/
3358static void ixgbevf_free_all_tx_resources(struct ixgbevf_adapter *adapter)
3359{
3360 int i;
3361
3362 for (i = 0; i < adapter->num_tx_queues; i++)
87e70ab9 3363 if (adapter->tx_ring[i]->desc)
05d063aa 3364 ixgbevf_free_tx_resources(adapter->tx_ring[i]);
21092e9c
TN		 3365 for (i = 0; i < adapter->num_xdp_queues; i++)
3366 if (adapter->xdp_ring[i]->desc)
3367 ixgbevf_free_tx_resources(adapter->xdp_ring[i]);
92915f71
GR		 3368}
3369
3370/**
3371 * ixgbevf_setup_tx_resources - allocate Tx resources (Descriptors)
dec0d8e4 3372 * @tx_ring: Tx descriptor ring (for a specific queue) to setup
92915f71
GR		 3373 *
3374 * Return 0 on success, negative on failure
3375 **/
05d063aa 3376int ixgbevf_setup_tx_resources(struct ixgbevf_ring *tx_ring)
92915f71 3377{
4ad6af02 3378 struct ixgbevf_adapter *adapter = netdev_priv(tx_ring->netdev);
92915f71
GR		 3379 int size;
3380
3381 size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count;
865a4d98 3382 tx_ring->tx_buffer_info = vmalloc(size);
92915f71
GR		 3383 if (!tx_ring->tx_buffer_info)
3384 goto err;
92915f71 3385
7c3a4626
FF		 3386 u64_stats_init(&tx_ring->syncp);
3387
92915f71
GR		 3388 /* round up to nearest 4K */
3389 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
3390 tx_ring->size = ALIGN(tx_ring->size, 4096);
3391
05d063aa 3392 tx_ring->desc = dma_alloc_coherent(tx_ring->dev, tx_ring->size,
2a1f8794 3393 &tx_ring->dma, GFP_KERNEL);
92915f71
GR		 3394 if (!tx_ring->desc)
3395 goto err;
3396
92915f71
GR		 3397 return 0;
3398
3399err:
3400 vfree(tx_ring->tx_buffer_info);
3401 tx_ring->tx_buffer_info = NULL;
dec0d8e4 3402 hw_dbg(&adapter->hw, "Unable to allocate memory for the transmit descriptor ring\n");
92915f71
GR		 3403 return -ENOMEM;
3404}
3405
3406/**
3407 * ixgbevf_setup_all_tx_resources - allocate all queues Tx resources
3408 * @adapter: board private structure
3409 *
3410 * If this function returns with an error, then it's possible one or
3411 * more of the rings is populated (while the rest are not). It is the
3412 * callers duty to clean those orphaned rings.
3413 *
3414 * Return 0 on success, negative on failure
3415 **/
3416static int ixgbevf_setup_all_tx_resources(struct ixgbevf_adapter *adapter)
3417{
21092e9c 3418 int i, j = 0, err = 0;
92915f71
GR		 3419
3420 for (i = 0; i < adapter->num_tx_queues; i++) {
05d063aa 3421 err = ixgbevf_setup_tx_resources(adapter->tx_ring[i]);
92915f71
GR		 3422 if (!err)
3423 continue;
dec0d8e4 3424 hw_dbg(&adapter->hw, "Allocation for Tx Queue %u failed\n", i);
f2d00eca 3425 goto err_setup_tx;
92915f71
GR		 3426 }
3427
21092e9c
TN		 3428 for (j = 0; j < adapter->num_xdp_queues; j++) {
3429 err = ixgbevf_setup_tx_resources(adapter->xdp_ring[j]);
3430 if (!err)
3431 continue;
3432 hw_dbg(&adapter->hw, "Allocation for XDP Queue %u failed\n", j);
39035bfd 3433 goto err_setup_tx;
21092e9c
TN		 3434 }
3435
f2d00eca
ET		 3436 return 0;
3437err_setup_tx:
3438 /* rewind the index freeing the rings as we go */
21092e9c
TN		 3439 while (j--)
3440 ixgbevf_free_tx_resources(adapter->xdp_ring[j]);
f2d00eca
ET		 3441 while (i--)
3442 ixgbevf_free_tx_resources(adapter->tx_ring[i]);
21092e9c 3443
92915f71
GR		 3444 return err;
3445}
3446
3447/**
3448 * ixgbevf_setup_rx_resources - allocate Rx resources (Descriptors)
c7aec596 3449 * @adapter: board private structure
dec0d8e4 3450 * @rx_ring: Rx descriptor ring (for a specific queue) to setup
92915f71
GR		 3451 *
3452 * Returns 0 on success, negative on failure
3453 **/
c7aec596
TN		 3454int ixgbevf_setup_rx_resources(struct ixgbevf_adapter *adapter,
3455 struct ixgbevf_ring *rx_ring)
92915f71 3456{
92915f71
GR		 3457 int size;
3458
3459 size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
40b8178b 3460 rx_ring->rx_buffer_info = vmalloc(size);
e404decb 3461 if (!rx_ring->rx_buffer_info)
05d063aa 3462 goto err;
92915f71 3463
7c3a4626
FF		 3464 u64_stats_init(&rx_ring->syncp);
3465
92915f71
GR		 3466 /* Round up to nearest 4K */
3467 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
3468 rx_ring->size = ALIGN(rx_ring->size, 4096);
3469
05d063aa 3470 rx_ring->desc = dma_alloc_coherent(rx_ring->dev, rx_ring->size,
2a1f8794 3471 &rx_ring->dma, GFP_KERNEL);
92915f71 3472
05d063aa
ET		 3473 if (!rx_ring->desc)
3474 goto err;
92915f71 3475
c7aec596
TN		 3476 /* XDP RX-queue info */
3477 if (xdp_rxq_info_reg(&rx_ring->xdp_rxq, adapter->netdev,
3478 rx_ring->queue_index) < 0)
3479 goto err;
3480
3481 rx_ring->xdp_prog = adapter->xdp_prog;
3482
92915f71 3483 return 0;
05d063aa
ET		 3484err:
3485 vfree(rx_ring->rx_buffer_info);
3486 rx_ring->rx_buffer_info = NULL;
3487 dev_err(rx_ring->dev, "Unable to allocate memory for the Rx descriptor ring\n");
92915f71
GR		 3488 return -ENOMEM;
3489}
3490
3491/**
3492 * ixgbevf_setup_all_rx_resources - allocate all queues Rx resources
3493 * @adapter: board private structure
3494 *
3495 * If this function returns with an error, then it's possible one or
3496 * more of the rings is populated (while the rest are not). It is the
3497 * callers duty to clean those orphaned rings.
3498 *
3499 * Return 0 on success, negative on failure
3500 **/
3501static int ixgbevf_setup_all_rx_resources(struct ixgbevf_adapter *adapter)
3502{
3503 int i, err = 0;
3504
3505 for (i = 0; i < adapter->num_rx_queues; i++) {
c7aec596 3506 err = ixgbevf_setup_rx_resources(adapter, adapter->rx_ring[i]);
92915f71
GR		 3507 if (!err)
3508 continue;
dec0d8e4 3509 hw_dbg(&adapter->hw, "Allocation for Rx Queue %u failed\n", i);
f2d00eca 3510 goto err_setup_rx;
92915f71 3511 }
f2d00eca
ET		 3512
3513 return 0;
3514err_setup_rx:
3515 /* rewind the index freeing the rings as we go */
3516 while (i--)
3517 ixgbevf_free_rx_resources(adapter->rx_ring[i]);
92915f71
GR		 3518 return err;
3519}
3520
3521/**
3522 * ixgbevf_free_rx_resources - Free Rx Resources
92915f71
GR		 3523 * @rx_ring: ring to clean the resources from
3524 *
3525 * Free all receive software resources
3526 **/
05d063aa 3527void ixgbevf_free_rx_resources(struct ixgbevf_ring *rx_ring)
92915f71 3528{
05d063aa 3529 ixgbevf_clean_rx_ring(rx_ring);
92915f71 3530
c7aec596
TN		 3531 rx_ring->xdp_prog = NULL;
3532 xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
92915f71
GR		 3533 vfree(rx_ring->rx_buffer_info);
3534 rx_ring->rx_buffer_info = NULL;
3535
05d063aa 3536 dma_free_coherent(rx_ring->dev, rx_ring->size, rx_ring->desc,
2a1f8794 3537 rx_ring->dma);
92915f71
GR		 3538
3539 rx_ring->desc = NULL;
3540}
3541
3542/**
3543 * ixgbevf_free_all_rx_resources - Free Rx Resources for All Queues
3544 * @adapter: board private structure
3545 *
3546 * Free all receive software resources
3547 **/
3548static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter)
3549{
3550 int i;
3551
3552 for (i = 0; i < adapter->num_rx_queues; i++)
87e70ab9 3553 if (adapter->rx_ring[i]->desc)
05d063aa 3554 ixgbevf_free_rx_resources(adapter->rx_ring[i]);
92915f71
GR		 3555}
3556
3557/**
3558 * ixgbevf_open - Called when a network interface is made active
3559 * @netdev: network interface device structure
3560 *
3561 * Returns 0 on success, negative value on failure
3562 *
3563 * The open entry point is called when a network interface is made
3564 * active by the system (IFF_UP). At this point all resources needed
3565 * for transmit and receive operations are allocated, the interrupt
3566 * handler is registered with the OS, the watchdog timer is started,
3567 * and the stack is notified that the interface is ready.
3568 **/
324d0867 3569int ixgbevf_open(struct net_device *netdev)
92915f71
GR		 3570{
3571 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3572 struct ixgbe_hw *hw = &adapter->hw;
3573 int err;
3574
a1f6c6b1 3575 /* A previous failure to open the device because of a lack of
3576 * available MSIX vector resources may have reset the number
3577 * of msix vectors variable to zero. The only way to recover
3578 * is to unload/reload the driver and hope that the system has
3579 * been able to recover some MSIX vector resources.
3580 */
3581 if (!adapter->num_msix_vectors)
3582 return -ENOMEM;
3583
92915f71
GR		 3584 if (hw->adapter_stopped) {
3585 ixgbevf_reset(adapter);
3586 /* if adapter is still stopped then PF isn't up and
dec0d8e4
JK		 3587 * the VF can't start.
3588 */
92915f71
GR		 3589 if (hw->adapter_stopped) {
3590 err = IXGBE_ERR_MBX;
dec0d8e4 3591 pr_err("Unable to start - perhaps the PF Driver isn't up yet\n");
92915f71
GR		 3592 goto err_setup_reset;
3593 }
3594 }
3595
d9bdb57f
ET		 3596 /* disallow open during test */
3597 if (test_bit(__IXGBEVF_TESTING, &adapter->state))
3598 return -EBUSY;
3599
3600 netif_carrier_off(netdev);
3601
92915f71
GR		 3602 /* allocate transmit descriptors */
3603 err = ixgbevf_setup_all_tx_resources(adapter);
3604 if (err)
3605 goto err_setup_tx;
3606
3607 /* allocate receive descriptors */
3608 err = ixgbevf_setup_all_rx_resources(adapter);
3609 if (err)
3610 goto err_setup_rx;
3611
3612 ixgbevf_configure(adapter);
3613
92915f71
GR		 3614 err = ixgbevf_request_irq(adapter);
3615 if (err)
3616 goto err_req_irq;
3617
f2d00eca
ET		 3618 /* Notify the stack of the actual queue counts. */
3619 err = netif_set_real_num_tx_queues(netdev, adapter->num_tx_queues);
3620 if (err)
3621 goto err_set_queues;
3622
3623 err = netif_set_real_num_rx_queues(netdev, adapter->num_rx_queues);
3624 if (err)
3625 goto err_set_queues;
3626
d9bdb57f 3627 ixgbevf_up_complete(adapter);
92915f71
GR		 3628
3629 return 0;
3630
f2d00eca
ET		 3631err_set_queues:
3632 ixgbevf_free_irq(adapter);
92915f71 3633err_req_irq:
92915f71 3634 ixgbevf_free_all_rx_resources(adapter);
f2d00eca 3635err_setup_rx:
92915f71 3636 ixgbevf_free_all_tx_resources(adapter);
f2d00eca 3637err_setup_tx:
92915f71 3638 ixgbevf_reset(adapter);
92915f71
GR		 3639err_setup_reset:
3640
3641 return err;
3642}
3643
b19cf6ee
ET		 3644/**
3645 * ixgbevf_close_suspend - actions necessary to both suspend and close flows
3646 * @adapter: the private adapter struct
3647 *
3648 * This function should contain the necessary work common to both suspending
3649 * and closing of the device.
3650 */
3651static void ixgbevf_close_suspend(struct ixgbevf_adapter *adapter)
3652{
3653 ixgbevf_down(adapter);
3654 ixgbevf_free_irq(adapter);
3655 ixgbevf_free_all_tx_resources(adapter);
3656 ixgbevf_free_all_rx_resources(adapter);
3657}
3658
92915f71
GR		 3659/**
3660 * ixgbevf_close - Disables a network interface
3661 * @netdev: network interface device structure
3662 *
3663 * Returns 0, this is not allowed to fail
3664 *
3665 * The close entry point is called when an interface is de-activated
3666 * by the OS. The hardware is still under the drivers control, but
3667 * needs to be disabled. A global MAC reset is issued to stop the
3668 * hardware, and all transmit and receive resources are freed.
3669 **/
324d0867 3670int ixgbevf_close(struct net_device *netdev)
92915f71
GR		 3671{
3672 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3673
b19cf6ee
ET		 3674 if (netif_device_present(netdev))
3675 ixgbevf_close_suspend(adapter);
92915f71
GR		 3676
3677 return 0;
3678}
3679
220fe050
DS		 3680static void ixgbevf_queue_reset_subtask(struct ixgbevf_adapter *adapter)
3681{
3682 struct net_device *dev = adapter->netdev;
3683
d5dd7c3f
ET		 3684 if (!test_and_clear_bit(__IXGBEVF_QUEUE_RESET_REQUESTED,
3685 &adapter->state))
220fe050
DS		 3686 return;
3687
220fe050
DS		 3688 /* if interface is down do nothing */
3689 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
3690 test_bit(__IXGBEVF_RESETTING, &adapter->state))
3691 return;
3692
3693 /* Hardware has to reinitialize queues and interrupts to
3694 * match packet buffer alignment. Unfortunately, the
3695 * hardware is not flexible enough to do this dynamically.
3696 */
2dad7b27
ET		 3697 rtnl_lock();
3698
220fe050
DS		 3699 if (netif_running(dev))
3700 ixgbevf_close(dev);
3701
3702 ixgbevf_clear_interrupt_scheme(adapter);
3703 ixgbevf_init_interrupt_scheme(adapter);
3704
3705 if (netif_running(dev))
3706 ixgbevf_open(dev);
2dad7b27
ET		 3707
3708 rtnl_unlock();
220fe050
DS		 3709}
3710
70a10e25 3711static void ixgbevf_tx_ctxtdesc(struct ixgbevf_ring *tx_ring,
7f68d430
SN		 3712 u32 vlan_macip_lens, u32 fceof_saidx,
3713 u32 type_tucmd, u32 mss_l4len_idx)
92915f71
GR		 3714{
3715 struct ixgbe_adv_tx_context_desc *context_desc;
70a10e25 3716 u16 i = tx_ring->next_to_use;
92915f71 3717
70a10e25 3718 context_desc = IXGBEVF_TX_CTXTDESC(tx_ring, i);
92915f71 3719
70a10e25
AD		 3720 i++;
3721 tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
92915f71 3722
70a10e25
AD		 3723 /* set bits to identify this as an advanced context descriptor */
3724 type_tucmd |= IXGBE_TXD_CMD_DEXT | IXGBE_ADVTXD_DTYP_CTXT;
92915f71 3725
70a10e25 3726 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
7f68d430 3727 context_desc->fceof_saidx = cpu_to_le32(fceof_saidx);
70a10e25
AD		 3728 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd);
3729 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
3730}
3731
3732static int ixgbevf_tso(struct ixgbevf_ring *tx_ring,
7ad1a093 3733 struct ixgbevf_tx_buffer *first,
7f68d430
SN		 3734 u8 *hdr_len,
3735 struct ixgbevf_ipsec_tx_data *itd)
70a10e25 3736{
b83e3010 3737 u32 vlan_macip_lens, type_tucmd, mss_l4len_idx;
7ad1a093 3738 struct sk_buff *skb = first->skb;
b83e3010
AD		 3739 union {
3740 struct iphdr *v4;
3741 struct ipv6hdr *v6;
3742 unsigned char *hdr;
3743 } ip;
3744 union {
3745 struct tcphdr *tcp;
3746 unsigned char *hdr;
3747 } l4;
3748 u32 paylen, l4_offset;
7f68d430 3749 u32 fceof_saidx = 0;
8f12c034 3750 int err;
70a10e25 3751
01a545cf
ET		 3752 if (skb->ip_summed != CHECKSUM_PARTIAL)
3753 return 0;
3754
70a10e25
AD		 3755 if (!skb_is_gso(skb))
3756 return 0;
92915f71 3757
8f12c034
FR		 3758 err = skb_cow_head(skb, 0);
3759 if (err < 0)
3760 return err;
92915f71 3761
2a20525b
SP		 3762 if (eth_p_mpls(first->protocol))
3763 ip.hdr = skb_inner_network_header(skb);
3764 else
3765 ip.hdr = skb_network_header(skb);
b83e3010
AD		 3766 l4.hdr = skb_checksum_start(skb);
3767
70a10e25
AD		 3768 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
3769 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
3770
b83e3010
AD		 3771 /* initialize outer IP header fields */
3772 if (ip.v4->version == 4) {
c54cdc31
AD		 3773 unsigned char *csum_start = skb_checksum_start(skb);
3774 unsigned char *trans_start = ip.hdr + (ip.v4->ihl * 4);
7f68d430 3775 int len = csum_start - trans_start;
c54cdc31 3776
b83e3010 3777 /* IP header will have to cancel out any data that
7f68d430
SN		 3778 * is not a part of the outer IP header, so set to
3779 * a reverse csum if needed, else init check to 0.
b83e3010 3780 */
7f68d430
SN		 3781 ip.v4->check = (skb_shinfo(skb)->gso_type & SKB_GSO_PARTIAL) ?
3782 csum_fold(csum_partial(trans_start,
3783 len, 0)) : 0;
70a10e25 3784 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
b83e3010
AD		 3785
3786 ip.v4->tot_len = 0;
7ad1a093
ET		 3787 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
3788 IXGBE_TX_FLAGS_CSUM |
3789 IXGBE_TX_FLAGS_IPV4;
b83e3010
AD		 3790 } else {
3791 ip.v6->payload_len = 0;
7ad1a093
ET		 3792 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
3793 IXGBE_TX_FLAGS_CSUM;
70a10e25
AD		 3794 }
3795
b83e3010
AD		 3796 /* determine offset of inner transport header */
3797 l4_offset = l4.hdr - skb->data;
3798
3799 /* compute length of segmentation header */
3800 *hdr_len = (l4.tcp->doff * 4) + l4_offset;
70a10e25 3801
b83e3010
AD		 3802 /* remove payload length from inner checksum */
3803 paylen = skb->len - l4_offset;
3804 csum_replace_by_diff(&l4.tcp->check, htonl(paylen));
3805
3806 /* update gso size and bytecount with header size */
7ad1a093
ET		 3807 first->gso_segs = skb_shinfo(skb)->gso_segs;
3808 first->bytecount += (first->gso_segs - 1) * *hdr_len;
3809
70a10e25 3810 /* mss_l4len_id: use 1 as index for TSO */
b83e3010 3811 mss_l4len_idx = (*hdr_len - l4_offset) << IXGBE_ADVTXD_L4LEN_SHIFT;
70a10e25 3812 mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
8d055cc0 3813 mss_l4len_idx |= (1u << IXGBE_ADVTXD_IDX_SHIFT);
70a10e25 3814
7f68d430
SN		 3815 fceof_saidx |= itd->pfsa;
3816 type_tucmd |= itd->flags | itd->trailer_len;
3817
70a10e25 3818 /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
b83e3010
AD		 3819 vlan_macip_lens = l4.hdr - ip.hdr;
3820 vlan_macip_lens |= (ip.hdr - skb->data) << IXGBE_ADVTXD_MACLEN_SHIFT;
7ad1a093 3821 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
70a10e25 3822
7f68d430
SN		 3823 ixgbevf_tx_ctxtdesc(tx_ring, vlan_macip_lens, fceof_saidx, type_tucmd,
3824 mss_l4len_idx);
70a10e25
AD		 3825
3826 return 1;
92915f71
GR		 3827}
3828
cb2b3edb
AD		 3829static inline bool ixgbevf_ipv6_csum_is_sctp(struct sk_buff *skb)
3830{
3831 unsigned int offset = 0;
3832
3833 ipv6_find_hdr(skb, &offset, IPPROTO_SCTP, NULL, NULL);
3834
3835 return offset == skb_checksum_start_offset(skb);
3836}
3837
7ad1a093 3838static void ixgbevf_tx_csum(struct ixgbevf_ring *tx_ring,
7f68d430
SN		 3839 struct ixgbevf_tx_buffer *first,
3840 struct ixgbevf_ipsec_tx_data *itd)
92915f71 3841{
7ad1a093 3842 struct sk_buff *skb = first->skb;
70a10e25 3843 u32 vlan_macip_lens = 0;
7f68d430 3844 u32 fceof_saidx = 0;
70a10e25 3845 u32 type_tucmd = 0;
92915f71 3846
cb2b3edb
AD		 3847 if (skb->ip_summed != CHECKSUM_PARTIAL)
3848 goto no_csum;
92915f71 3849
cb2b3edb
AD		 3850 switch (skb->csum_offset) {
3851 case offsetof(struct tcphdr, check):
3852 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
3853 /* fall through */
3854 case offsetof(struct udphdr, check):
3855 break;
3856 case offsetof(struct sctphdr, checksum):
3857 /* validate that this is actually an SCTP request */
3858 if (((first->protocol == htons(ETH_P_IP)) &&
3859 (ip_hdr(skb)->protocol == IPPROTO_SCTP)) ||
3860 ((first->protocol == htons(ETH_P_IPV6)) &&
3861 ixgbevf_ipv6_csum_is_sctp(skb))) {
3862 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_SCTP;
70a10e25 3863 break;
70a10e25 3864 }
cb2b3edb
AD		 3865 /* fall through */
3866 default:
3867 skb_checksum_help(skb);
3868 goto no_csum;
92915f71 3869 }
7fb94bd5
SB		 3870
3871 if (first->protocol == htons(ETH_P_IP))
3872 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
3873
cb2b3edb
AD		 3874 /* update TX checksum flag */
3875 first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
3876 vlan_macip_lens = skb_checksum_start_offset(skb) -
3877 skb_network_offset(skb);
d34a614a 3878no_csum:
70a10e25
AD		 3879 /* vlan_macip_lens: MACLEN, VLAN tag */
3880 vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
7ad1a093 3881 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
70a10e25 3882
7f68d430
SN		 3883 fceof_saidx |= itd->pfsa;
3884 type_tucmd |= itd->flags | itd->trailer_len;
3885
3886 ixgbevf_tx_ctxtdesc(tx_ring, vlan_macip_lens,
3887 fceof_saidx, type_tucmd, 0);
92915f71
GR		 3888}
3889
29d37fa1 3890static __le32 ixgbevf_tx_cmd_type(u32 tx_flags)
92915f71 3891{
29d37fa1
ET		 3892 /* set type for advanced descriptor with frame checksum insertion */
3893 __le32 cmd_type = cpu_to_le32(IXGBE_ADVTXD_DTYP_DATA |
3894 IXGBE_ADVTXD_DCMD_IFCS |
3895 IXGBE_ADVTXD_DCMD_DEXT);
92915f71 3896
dec0d8e4 3897 /* set HW VLAN bit if VLAN is present */
29d37fa1
ET		 3898 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3899 cmd_type |= cpu_to_le32(IXGBE_ADVTXD_DCMD_VLE);
92915f71 3900
29d37fa1
ET		 3901 /* set segmentation enable bits for TSO/FSO */
3902 if (tx_flags & IXGBE_TX_FLAGS_TSO)
3903 cmd_type |= cpu_to_le32(IXGBE_ADVTXD_DCMD_TSE);
92915f71 3904
29d37fa1
ET		 3905 return cmd_type;
3906}
92915f71 3907
29d37fa1
ET		 3908static void ixgbevf_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
3909 u32 tx_flags, unsigned int paylen)
3910{
3911 __le32 olinfo_status = cpu_to_le32(paylen << IXGBE_ADVTXD_PAYLEN_SHIFT);
9bdfefd2 3912
29d37fa1
ET		 3913 /* enable L4 checksum for TSO and TX checksum offload */
3914 if (tx_flags & IXGBE_TX_FLAGS_CSUM)
3915 olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_POPTS_TXSM);
92915f71 3916
29d37fa1
ET		 3917 /* enble IPv4 checksum for TSO */
3918 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
3919 olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_POPTS_IXSM);
92915f71 3920
7f68d430
SN		 3921 /* enable IPsec */
3922 if (tx_flags & IXGBE_TX_FLAGS_IPSEC)
3923 olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_POPTS_IPSEC);
3924
3925 /* use index 1 context for TSO/FSO/FCOE/IPSEC */
3926 if (tx_flags & (IXGBE_TX_FLAGS_TSO | IXGBE_TX_FLAGS_IPSEC))
8d055cc0 3927 olinfo_status |= cpu_to_le32(1u << IXGBE_ADVTXD_IDX_SHIFT);
92915f71 3928
29d37fa1
ET		 3929 /* Check Context must be set if Tx switch is enabled, which it
3930 * always is for case where virtual functions are running
3931 */
3932 olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_CC);
92915f71 3933
29d37fa1
ET		 3934 tx_desc->read.olinfo_status = olinfo_status;
3935}
92915f71 3936
29d37fa1
ET		 3937static void ixgbevf_tx_map(struct ixgbevf_ring *tx_ring,
3938 struct ixgbevf_tx_buffer *first,
3939 const u8 hdr_len)
3940{
29d37fa1
ET		 3941 struct sk_buff *skb = first->skb;
3942 struct ixgbevf_tx_buffer *tx_buffer;
3943 union ixgbe_adv_tx_desc *tx_desc;
6f355454
ET		 3944 struct skb_frag_struct *frag;
3945 dma_addr_t dma;
3946 unsigned int data_len, size;
29d37fa1 3947 u32 tx_flags = first->tx_flags;
6f355454 3948 __le32 cmd_type = ixgbevf_tx_cmd_type(tx_flags);
29d37fa1 3949 u16 i = tx_ring->next_to_use;
9bdfefd2 3950
29d37fa1 3951 tx_desc = IXGBEVF_TX_DESC(tx_ring, i);
92915f71 3952
6f355454
ET		 3953 ixgbevf_tx_olinfo_status(tx_desc, tx_flags, skb->len - hdr_len);
3954
3955 size = skb_headlen(skb);
3956 data_len = skb->data_len;
7ad1a093 3957
29d37fa1 3958 dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
92915f71 3959
6f355454 3960 tx_buffer = first;
92915f71 3961
6f355454
ET		 3962 for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
3963 if (dma_mapping_error(tx_ring->dev, dma))
3964 goto dma_error;
3965
3966 /* record length, and DMA address */
3967 dma_unmap_len_set(tx_buffer, len, size);
3968 dma_unmap_addr_set(tx_buffer, dma, dma);
3969
3970 tx_desc->read.buffer_addr = cpu_to_le64(dma);
92915f71 3971
29d37fa1
ET		 3972 while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
3973 tx_desc->read.cmd_type_len =
3974 cmd_type | cpu_to_le32(IXGBE_MAX_DATA_PER_TXD);
92915f71 3975
29d37fa1
ET		 3976 i++;
3977 tx_desc++;
3978 if (i == tx_ring->count) {
3979 tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
3980 i = 0;
3981 }
6f355454 3982 tx_desc->read.olinfo_status = 0;
92915f71 3983
29d37fa1
ET		 3984 dma += IXGBE_MAX_DATA_PER_TXD;
3985 size -= IXGBE_MAX_DATA_PER_TXD;
92915f71 3986
29d37fa1 3987 tx_desc->read.buffer_addr = cpu_to_le64(dma);
29d37fa1 3988 }
92915f71 3989
29d37fa1
ET		 3990 if (likely(!data_len))
3991 break;
92915f71 3992
29d37fa1 3993 tx_desc->read.cmd_type_len = cmd_type | cpu_to_le32(size);
92915f71 3994
29d37fa1
ET		 3995 i++;
3996 tx_desc++;
3997 if (i == tx_ring->count) {
3998 tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
3999 i = 0;
4000 }
6f355454 4001 tx_desc->read.olinfo_status = 0;
92915f71 4002
29d37fa1
ET		 4003 size = skb_frag_size(frag);
4004 data_len -= size;
92915f71 4005
29d37fa1
ET		 4006 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
4007 DMA_TO_DEVICE);
70a10e25 4008
29d37fa1 4009 tx_buffer = &tx_ring->tx_buffer_info[i];
70a10e25 4010 }
92915f71 4011
29d37fa1
ET		 4012 /* write last descriptor with RS and EOP bits */
4013 cmd_type |= cpu_to_le32(size) | cpu_to_le32(IXGBE_TXD_CMD);
4014 tx_desc->read.cmd_type_len = cmd_type;
4015
4016 /* set the timestamp */
4017 first->time_stamp = jiffies;
4018
4019 /* Force memory writes to complete before letting h/w know there
4020 * are new descriptors to fetch. (Only applicable for weak-ordered
4021 * memory model archs, such as IA-64).
4022 *
4023 * We also need this memory barrier (wmb) to make certain all of the
4024 * status bits have been updated before next_to_watch is written.
70a10e25 4025 */
29d37fa1 4026 wmb();
92915f71 4027
29d37fa1
ET		 4028 /* set next_to_watch value indicating a packet is present */
4029 first->next_to_watch = tx_desc;
92915f71 4030
29d37fa1
ET		 4031 i++;
4032 if (i == tx_ring->count)
4033 i = 0;
9bdfefd2 4034
29d37fa1 4035 tx_ring->next_to_use = i;
92915f71 4036
29d37fa1 4037 /* notify HW of packet */
06380db6 4038 ixgbevf_write_tail(tx_ring, i);
29d37fa1
ET		 4039
4040 return;
4041dma_error:
4042 dev_err(tx_ring->dev, "TX DMA map failed\n");
865a4d98 4043 tx_buffer = &tx_ring->tx_buffer_info[i];
29d37fa1
ET		 4044
4045 /* clear dma mappings for failed tx_buffer_info map */
865a4d98
ET		 4046 while (tx_buffer != first) {
4047 if (dma_unmap_len(tx_buffer, len))
4048 dma_unmap_page(tx_ring->dev,
4049 dma_unmap_addr(tx_buffer, dma),
4050 dma_unmap_len(tx_buffer, len),
4051 DMA_TO_DEVICE);
4052 dma_unmap_len_set(tx_buffer, len, 0);
4053
4054 if (i-- == 0)
4055 i += tx_ring->count;
29d37fa1 4056 tx_buffer = &tx_ring->tx_buffer_info[i];
29d37fa1 4057 }
92915f71 4058
865a4d98
ET		 4059 if (dma_unmap_len(tx_buffer, len))
4060 dma_unmap_single(tx_ring->dev,
4061 dma_unmap_addr(tx_buffer, dma),
4062 dma_unmap_len(tx_buffer, len),
4063 DMA_TO_DEVICE);
4064 dma_unmap_len_set(tx_buffer, len, 0);
4065
4066 dev_kfree_skb_any(tx_buffer->skb);
4067 tx_buffer->skb = NULL;
4068
92915f71 4069 tx_ring->next_to_use = i;
92915f71
GR		 4070}
4071
fb40195c 4072static int __ixgbevf_maybe_stop_tx(struct ixgbevf_ring *tx_ring, int size)
92915f71 4073{
fb40195c 4074 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
92915f71
GR		 4075 /* Herbert's original patch had:
4076 * smp_mb__after_netif_stop_queue();
dec0d8e4
JK		 4077 * but since that doesn't exist yet, just open code it.
4078 */
92915f71
GR		 4079 smp_mb();
4080
4081 /* We need to check again in a case another CPU has just
dec0d8e4
JK		 4082 * made room available.
4083 */
f880d07b 4084 if (likely(ixgbevf_desc_unused(tx_ring) < size))
92915f71
GR		 4085 return -EBUSY;
4086
4087 /* A reprieve! - use start_queue because it doesn't call schedule */
fb40195c 4088 netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
095e2617
ET		 4089 ++tx_ring->tx_stats.restart_queue;
4090
92915f71
GR		 4091 return 0;
4092}
4093
fb40195c 4094static int ixgbevf_maybe_stop_tx(struct ixgbevf_ring *tx_ring, int size)
92915f71 4095{
f880d07b 4096 if (likely(ixgbevf_desc_unused(tx_ring) >= size))
92915f71 4097 return 0;
fb40195c 4098 return __ixgbevf_maybe_stop_tx(tx_ring, size);
92915f71
GR		 4099}
4100
5cc0f1c0
ET		 4101static int ixgbevf_xmit_frame_ring(struct sk_buff *skb,
4102 struct ixgbevf_ring *tx_ring)
92915f71 4103{
7ad1a093 4104 struct ixgbevf_tx_buffer *first;
7ad1a093
ET		 4105 int tso;
4106 u32 tx_flags = 0;
3595990a 4107 u16 count = TXD_USE_COUNT(skb_headlen(skb));
7f68d430 4108 struct ixgbevf_ipsec_tx_data ipsec_tx = { 0 };
3595990a
AD		 4109#if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
4110 unsigned short f;
4111#endif
7ad1a093 4112 u8 hdr_len = 0;
f9d08f16 4113 u8 *dst_mac = skb_header_pointer(skb, 0, 0, NULL);
7ad1a093 4114
46acc460 4115 if (!dst_mac || is_link_local_ether_addr(dst_mac)) {
e7fcd543 4116 dev_kfree_skb_any(skb);
f9d08f16
GR		 4117 return NETDEV_TX_OK;
4118 }
92915f71 4119
dec0d8e4 4120 /* need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
3595990a
AD		 4121 * + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
4122 * + 2 desc gap to keep tail from touching head,
4123 * + 1 desc for context descriptor,
4124 * otherwise try next time
4125 */
4126#if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
4127 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
4128 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
4129#else
4130 count += skb_shinfo(skb)->nr_frags;
4131#endif
fb40195c 4132 if (ixgbevf_maybe_stop_tx(tx_ring, count + 3)) {
095e2617 4133 tx_ring->tx_stats.tx_busy++;
3595990a
AD		 4134 return NETDEV_TX_BUSY;
4135 }
4136
7ad1a093
ET		 4137 /* record the location of the first descriptor for this packet */
4138 first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
4139 first->skb = skb;
4140 first->bytecount = skb->len;
4141 first->gso_segs = 1;
4142
df8a39de
JP		 4143 if (skb_vlan_tag_present(skb)) {
4144 tx_flags |= skb_vlan_tag_get(skb);
92915f71
GR		 4145 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
4146 tx_flags |= IXGBE_TX_FLAGS_VLAN;
4147 }
4148
7ad1a093
ET		 4149 /* record initial flags and protocol */
4150 first->tx_flags = tx_flags;
4151 first->protocol = vlan_get_protocol(skb);
92915f71 4152
48e01e00 4153#ifdef CONFIG_IXGBEVF_IPSEC
7f68d430
SN		 4154 if (skb->sp && !ixgbevf_ipsec_tx(tx_ring, first, &ipsec_tx))
4155 goto out_drop;
4156#endif
4157 tso = ixgbevf_tso(tx_ring, first, &hdr_len, &ipsec_tx);
7ad1a093
ET		 4158 if (tso < 0)
4159 goto out_drop;
b5d217f3 4160 else if (!tso)
7f68d430 4161 ixgbevf_tx_csum(tx_ring, first, &ipsec_tx);
92915f71 4162
29d37fa1 4163 ixgbevf_tx_map(tx_ring, first, hdr_len);
70a10e25 4164
fb40195c 4165 ixgbevf_maybe_stop_tx(tx_ring, DESC_NEEDED);
92915f71 4166
7ad1a093
ET		 4167 return NETDEV_TX_OK;
4168
4169out_drop:
4170 dev_kfree_skb_any(first->skb);
4171 first->skb = NULL;
4172
92915f71
GR		 4173 return NETDEV_TX_OK;
4174}
4175
cf12aab6 4176static netdev_tx_t ixgbevf_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
5cc0f1c0
ET		 4177{
4178 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
4179 struct ixgbevf_ring *tx_ring;
4180
4181 if (skb->len <= 0) {
4182 dev_kfree_skb_any(skb);
4183 return NETDEV_TX_OK;
4184 }
4185
4186 /* The minimum packet size for olinfo paylen is 17 so pad the skb
4187 * in order to meet this minimum size requirement.
4188 */
4189 if (skb->len < 17) {
4190 if (skb_padto(skb, 17))
4191 return NETDEV_TX_OK;
4192 skb->len = 17;
4193 }
4194
4195 tx_ring = adapter->tx_ring[skb->queue_mapping];
4196 return ixgbevf_xmit_frame_ring(skb, tx_ring);
4197}
4198
92915f71
GR		 4199/**
4200 * ixgbevf_set_mac - Change the Ethernet Address of the NIC
4201 * @netdev: network interface device structure
4202 * @p: pointer to an address structure
4203 *
4204 * Returns 0 on success, negative on failure
4205 **/
4206static int ixgbevf_set_mac(struct net_device *netdev, void *p)
4207{
4208 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
4209 struct ixgbe_hw *hw = &adapter->hw;
4210 struct sockaddr *addr = p;
32ca6868 4211 int err;
92915f71
GR		 4212
4213 if (!is_valid_ether_addr(addr->sa_data))
4214 return -EADDRNOTAVAIL;
4215
55fdd45b 4216 spin_lock_bh(&adapter->mbx_lock);
1c55ed76 4217
32ca6868 4218 err = hw->mac.ops.set_rar(hw, 0, addr->sa_data, 0);
92915f71 4219
55fdd45b 4220 spin_unlock_bh(&adapter->mbx_lock);
1c55ed76 4221
32ca6868
ET		 4222 if (err)
4223 return -EPERM;
4224
4225 ether_addr_copy(hw->mac.addr, addr->sa_data);
6e7d0ba1 4226 ether_addr_copy(hw->mac.perm_addr, addr->sa_data);
32ca6868
ET		 4227 ether_addr_copy(netdev->dev_addr, addr->sa_data);
4228
92915f71
GR		 4229 return 0;
4230}
4231
4232/**
4233 * ixgbevf_change_mtu - Change the Maximum Transfer Unit
4234 * @netdev: network interface device structure
4235 * @new_mtu: new value for maximum frame size
4236 *
4237 * Returns 0 on success, negative on failure
4238 **/
4239static int ixgbevf_change_mtu(struct net_device *netdev, int new_mtu)
4240{
4241 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
bad17234 4242 struct ixgbe_hw *hw = &adapter->hw;
92915f71 4243 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
6a11e52b 4244 int ret;
69bfbec4 4245
c7aec596
TN		 4246 /* prevent MTU being changed to a size unsupported by XDP */
4247 if (adapter->xdp_prog) {
4248 dev_warn(&adapter->pdev->dev, "MTU cannot be changed while XDP program is loaded\n");
4249 return -EPERM;
4250 }
4251
14b22cd9 4252 spin_lock_bh(&adapter->mbx_lock);
6a11e52b
TN		 4253 /* notify the PF of our intent to use this size of frame */
4254 ret = hw->mac.ops.set_rlpml(hw, max_frame);
14b22cd9 4255 spin_unlock_bh(&adapter->mbx_lock);
6a11e52b
TN		 4256 if (ret)
4257 return -EINVAL;
4258
bad17234 4259 hw_dbg(hw, "changing MTU from %d to %d\n",
92915f71 4260 netdev->mtu, new_mtu);
6a11e52b 4261
92915f71
GR		 4262 /* must set new MTU before calling down or up */
4263 netdev->mtu = new_mtu;
4264
1ab37e12
ET		 4265 if (netif_running(netdev))
4266 ixgbevf_reinit_locked(adapter);
4267
92915f71
GR		 4268 return 0;
4269}
4270
0ac1e8ce 4271static int ixgbevf_suspend(struct pci_dev *pdev, pm_message_t state)
92915f71
GR		 4272{
4273 struct net_device *netdev = pci_get_drvdata(pdev);
4274 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
0ac1e8ce
AD		 4275#ifdef CONFIG_PM
4276 int retval = 0;
4277#endif
92915f71 4278
2dad7b27 4279 rtnl_lock();
92915f71
GR		 4280 netif_device_detach(netdev);
4281
b19cf6ee
ET		 4282 if (netif_running(netdev))
4283 ixgbevf_close_suspend(adapter);
4284
4285 ixgbevf_clear_interrupt_scheme(adapter);
2dad7b27 4286 rtnl_unlock();
92915f71 4287
0ac1e8ce
AD		 4288#ifdef CONFIG_PM
4289 retval = pci_save_state(pdev);
4290 if (retval)
4291 return retval;
92915f71 4292
0ac1e8ce 4293#endif
bc0c7151
MR		 4294 if (!test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state))
4295 pci_disable_device(pdev);
0ac1e8ce
AD		 4296
4297 return 0;
4298}
4299
4300#ifdef CONFIG_PM
4301static int ixgbevf_resume(struct pci_dev *pdev)
4302{
27ae2967
WY		 4303 struct net_device *netdev = pci_get_drvdata(pdev);
4304 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
0ac1e8ce
AD		 4305 u32 err;
4306
0ac1e8ce 4307 pci_restore_state(pdev);
dec0d8e4 4308 /* pci_restore_state clears dev->state_saved so call
0ac1e8ce
AD		 4309 * pci_save_state to restore it.
4310 */
4311 pci_save_state(pdev);
4312
4313 err = pci_enable_device_mem(pdev);
4314 if (err) {
4315 dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n");
4316 return err;
4317 }
26403b7f
ET		 4318
4319 adapter->hw.hw_addr = adapter->io_addr;
4e857c58 4320 smp_mb__before_atomic();
bc0c7151 4321 clear_bit(__IXGBEVF_DISABLED, &adapter->state);
0ac1e8ce
AD		 4322 pci_set_master(pdev);
4323
798e381a
DS		 4324 ixgbevf_reset(adapter);
4325
0ac1e8ce
AD		 4326 rtnl_lock();
4327 err = ixgbevf_init_interrupt_scheme(adapter);
f2d00eca
ET		 4328 if (!err && netif_running(netdev))
4329 err = ixgbevf_open(netdev);
0ac1e8ce 4330 rtnl_unlock();
f2d00eca 4331 if (err)
0ac1e8ce 4332 return err;
0ac1e8ce
AD		 4333
4334 netif_device_attach(netdev);
4335
4336 return err;
4337}
4338
4339#endif /* CONFIG_PM */
4340static void ixgbevf_shutdown(struct pci_dev *pdev)
4341{
4342 ixgbevf_suspend(pdev, PMSG_SUSPEND);
92915f71
GR		 4343}
4344
21092e9c
TN		 4345static void ixgbevf_get_tx_ring_stats(struct rtnl_link_stats64 *stats,
4346 const struct ixgbevf_ring *ring)
4347{
4348 u64 bytes, packets;
4349 unsigned int start;
4350
4351 if (ring) {
4352 do {
4353 start = u64_stats_fetch_begin_irq(&ring->syncp);
4354 bytes = ring->stats.bytes;
4355 packets = ring->stats.packets;
4356 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
4357 stats->tx_bytes += bytes;
4358 stats->tx_packets += packets;
4359 }
4360}
4361
bc1f4470 4362static void ixgbevf_get_stats(struct net_device *netdev,
4363 struct rtnl_link_stats64 *stats)
4197aa7b
ED		 4364{
4365 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
4366 unsigned int start;
4367 u64 bytes, packets;
4368 const struct ixgbevf_ring *ring;
4369 int i;
4370
4371 ixgbevf_update_stats(adapter);
4372
4373 stats->multicast = adapter->stats.vfmprc - adapter->stats.base_vfmprc;
4374
21c046e4 4375 rcu_read_lock();
4197aa7b 4376 for (i = 0; i < adapter->num_rx_queues; i++) {
87e70ab9 4377 ring = adapter->rx_ring[i];
4197aa7b 4378 do {
57a7744e 4379 start = u64_stats_fetch_begin_irq(&ring->syncp);
095e2617
ET		 4380 bytes = ring->stats.bytes;
4381 packets = ring->stats.packets;
57a7744e 4382 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
4197aa7b
ED		 4383 stats->rx_bytes += bytes;
4384 stats->rx_packets += packets;
4385 }
4386
4387 for (i = 0; i < adapter->num_tx_queues; i++) {
87e70ab9 4388 ring = adapter->tx_ring[i];
21092e9c
TN		 4389 ixgbevf_get_tx_ring_stats(stats, ring);
4390 }
4391
4392 for (i = 0; i < adapter->num_xdp_queues; i++) {
4393 ring = adapter->xdp_ring[i];
4394 ixgbevf_get_tx_ring_stats(stats, ring);
4197aa7b 4395 }
21c046e4 4396 rcu_read_unlock();
4197aa7b
ED		 4397}
4398
b83e3010
AD		 4399#define IXGBEVF_MAX_MAC_HDR_LEN 127
4400#define IXGBEVF_MAX_NETWORK_HDR_LEN 511
4401
4402static netdev_features_t
4403ixgbevf_features_check(struct sk_buff *skb, struct net_device *dev,
4404 netdev_features_t features)
4405{
4406 unsigned int network_hdr_len, mac_hdr_len;
4407
4408 /* Make certain the headers can be described by a context descriptor */
4409 mac_hdr_len = skb_network_header(skb) - skb->data;
4410 if (unlikely(mac_hdr_len > IXGBEVF_MAX_MAC_HDR_LEN))
4411 return features & ~(NETIF_F_HW_CSUM |
4412 NETIF_F_SCTP_CRC |
4413 NETIF_F_HW_VLAN_CTAG_TX |
4414 NETIF_F_TSO |
4415 NETIF_F_TSO6);
4416
4417 network_hdr_len = skb_checksum_start(skb) - skb_network_header(skb);
4418 if (unlikely(network_hdr_len > IXGBEVF_MAX_NETWORK_HDR_LEN))
4419 return features & ~(NETIF_F_HW_CSUM |
4420 NETIF_F_SCTP_CRC |
4421 NETIF_F_TSO |
4422 NETIF_F_TSO6);
4423
4424 /* We can only support IPV4 TSO in tunnels if we can mangle the
4425 * inner IP ID field, so strip TSO if MANGLEID is not supported.
4426 */
4427 if (skb->encapsulation && !(features & NETIF_F_TSO_MANGLEID))
4428 features &= ~NETIF_F_TSO;
4429
4430 return features;
4431}
4432
c7aec596
TN		 4433static int ixgbevf_xdp_setup(struct net_device *dev, struct bpf_prog *prog)
4434{
4435 int i, frame_size = dev->mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
4436 struct ixgbevf_adapter *adapter = netdev_priv(dev);
4437 struct bpf_prog *old_prog;
4438
4439 /* verify ixgbevf ring attributes are sufficient for XDP */
4440 for (i = 0; i < adapter->num_rx_queues; i++) {
4441 struct ixgbevf_ring *ring = adapter->rx_ring[i];
4442
4443 if (frame_size > ixgbevf_rx_bufsz(ring))
4444 return -EINVAL;
4445 }
4446
4447 old_prog = xchg(&adapter->xdp_prog, prog);
21092e9c
TN		 4448
4449 /* If transitioning XDP modes reconfigure rings */
4450 if (!!prog != !!old_prog) {
4451 /* Hardware has to reinitialize queues and interrupts to
4452 * match packet buffer alignment. Unfortunately, the
4453 * hardware is not flexible enough to do this dynamically.
4454 */
4455 if (netif_running(dev))
4456 ixgbevf_close(dev);
4457
4458 ixgbevf_clear_interrupt_scheme(adapter);
4459 ixgbevf_init_interrupt_scheme(adapter);
4460
4461 if (netif_running(dev))
4462 ixgbevf_open(dev);
4463 } else {
4464 for (i = 0; i < adapter->num_rx_queues; i++)
4465 xchg(&adapter->rx_ring[i]->xdp_prog, adapter->xdp_prog);
4466 }
c7aec596
TN		 4467
4468 if (old_prog)
4469 bpf_prog_put(old_prog);
4470
4471 return 0;
4472}
4473
4474static int ixgbevf_xdp(struct net_device *dev, struct netdev_bpf *xdp)
4475{
4476 struct ixgbevf_adapter *adapter = netdev_priv(dev);
4477
4478 switch (xdp->command) {
4479 case XDP_SETUP_PROG:
4480 return ixgbevf_xdp_setup(dev, xdp->prog);
4481 case XDP_QUERY_PROG:
c7aec596
TN		 4482 xdp->prog_id = adapter->xdp_prog ?
4483 adapter->xdp_prog->aux->id : 0;
4484 return 0;
4485 default:
4486 return -EINVAL;
4487 }
4488}
4489
0ac1e8ce 4490static const struct net_device_ops ixgbevf_netdev_ops = {
c12db769
SH		 4491 .ndo_open = ixgbevf_open,
4492 .ndo_stop = ixgbevf_close,
4493 .ndo_start_xmit = ixgbevf_xmit_frame,
4494 .ndo_set_rx_mode = ixgbevf_set_rx_mode,
4197aa7b 4495 .ndo_get_stats64 = ixgbevf_get_stats,
92915f71 4496 .ndo_validate_addr = eth_validate_addr,
c12db769
SH		 4497 .ndo_set_mac_address = ixgbevf_set_mac,
4498 .ndo_change_mtu = ixgbevf_change_mtu,
4499 .ndo_tx_timeout = ixgbevf_tx_timeout,
c12db769
SH		 4500 .ndo_vlan_rx_add_vid = ixgbevf_vlan_rx_add_vid,
4501 .ndo_vlan_rx_kill_vid = ixgbevf_vlan_rx_kill_vid,
b83e3010 4502 .ndo_features_check = ixgbevf_features_check,
c7aec596 4503 .ndo_bpf = ixgbevf_xdp,
92915f71 4504};
92915f71
GR		 4505
4506static void ixgbevf_assign_netdev_ops(struct net_device *dev)
4507{
0ac1e8ce 4508 dev->netdev_ops = &ixgbevf_netdev_ops;
92915f71
GR		 4509 ixgbevf_set_ethtool_ops(dev);
4510 dev->watchdog_timeo = 5 * HZ;
4511}
4512
4513/**
4514 * ixgbevf_probe - Device Initialization Routine
4515 * @pdev: PCI device information struct
4516 * @ent: entry in ixgbevf_pci_tbl
4517 *
4518 * Returns 0 on success, negative on failure
4519 *
4520 * ixgbevf_probe initializes an adapter identified by a pci_dev structure.
4521 * The OS initialization, configuring of the adapter private structure,
4522 * and a hardware reset occur.
4523 **/
1dd06ae8 4524static int ixgbevf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
92915f71
GR		 4525{
4526 struct net_device *netdev;
4527 struct ixgbevf_adapter *adapter = NULL;
4528 struct ixgbe_hw *hw = NULL;
4529 const struct ixgbevf_info *ii = ixgbevf_info_tbl[ent->driver_data];
92915f71 4530 int err, pci_using_dac;
0333464f 4531 bool disable_dev = false;
92915f71
GR		 4532
4533 err = pci_enable_device(pdev);
4534 if (err)
4535 return err;
4536
53567aa4 4537 if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
92915f71
GR		 4538 pci_using_dac = 1;
4539 } else {
53567aa4 4540 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
92915f71 4541 if (err) {
dec0d8e4 4542 dev_err(&pdev->dev, "No usable DMA configuration, aborting\n");
53567aa4 4543 goto err_dma;
92915f71
GR		 4544 }
4545 pci_using_dac = 0;
4546 }
4547
4548 err = pci_request_regions(pdev, ixgbevf_driver_name);
4549 if (err) {
4550 dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err);
4551 goto err_pci_reg;
4552 }
4553
4554 pci_set_master(pdev);
4555
92915f71
GR		 4556 netdev = alloc_etherdev_mq(sizeof(struct ixgbevf_adapter),
4557 MAX_TX_QUEUES);
92915f71
GR		 4558 if (!netdev) {
4559 err = -ENOMEM;
4560 goto err_alloc_etherdev;
4561 }
4562
4563 SET_NETDEV_DEV(netdev, &pdev->dev);
4564
92915f71
GR		 4565 adapter = netdev_priv(netdev);
4566
4567 adapter->netdev = netdev;
4568 adapter->pdev = pdev;
4569 hw = &adapter->hw;
4570 hw->back = adapter;
b3f4d599 4571 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
92915f71 4572
dec0d8e4 4573 /* call save state here in standalone driver because it relies on
92915f71
GR		 4574 * adapter struct to exist, and needs to call netdev_priv
4575 */
4576 pci_save_state(pdev);
4577
4578 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
4579 pci_resource_len(pdev, 0));
dbf8b0d8 4580 adapter->io_addr = hw->hw_addr;
92915f71
GR		 4581 if (!hw->hw_addr) {
4582 err = -EIO;
4583 goto err_ioremap;
4584 }
4585
4586 ixgbevf_assign_netdev_ops(netdev);
4587
dec0d8e4 4588 /* Setup HW API */
92915f71
GR		 4589 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
4590 hw->mac.type = ii->mac;
4591
4592 memcpy(&hw->mbx.ops, &ixgbevf_mbx_ops,
f416dfc0 4593 sizeof(struct ixgbe_mbx_operations));
92915f71 4594
92915f71
GR		 4595 /* setup the private structure */
4596 err = ixgbevf_sw_init(adapter);
1a0d6ae5
DK		 4597 if (err)
4598 goto err_sw_init;
4599
4600 /* The HW MAC address was set and/or determined in sw_init */
1a0d6ae5
DK		 4601 if (!is_valid_ether_addr(netdev->dev_addr)) {
4602 pr_err("invalid MAC address\n");
4603 err = -EIO;
4604 goto err_sw_init;
4605 }
92915f71 4606
471a76de 4607 netdev->hw_features = NETIF_F_SG |
dec0d8e4
JK		 4608 NETIF_F_TSO |
4609 NETIF_F_TSO6 |
cb2b3edb
AD		 4610 NETIF_F_RXCSUM |
4611 NETIF_F_HW_CSUM |
4612 NETIF_F_SCTP_CRC;
471a76de 4613
b83e3010
AD		 4614#define IXGBEVF_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \
4615 NETIF_F_GSO_GRE_CSUM | \
7e13318d 4616 NETIF_F_GSO_IPXIP4 | \
bf2d1df3 4617 NETIF_F_GSO_IPXIP6 | \
b83e3010
AD		 4618 NETIF_F_GSO_UDP_TUNNEL | \
4619 NETIF_F_GSO_UDP_TUNNEL_CSUM)
92915f71 4620
b83e3010
AD		 4621 netdev->gso_partial_features = IXGBEVF_GSO_PARTIAL_FEATURES;
4622 netdev->hw_features |= NETIF_F_GSO_PARTIAL |
4623 IXGBEVF_GSO_PARTIAL_FEATURES;
cb2b3edb 4624
b83e3010 4625 netdev->features = netdev->hw_features;
92915f71
GR		 4626
4627 if (pci_using_dac)
4628 netdev->features |= NETIF_F_HIGHDMA;
4629
b83e3010 4630 netdev->vlan_features |= netdev->features | NETIF_F_TSO_MANGLEID;
2a20525b
SP		 4631 netdev->mpls_features |= NETIF_F_SG |
4632 NETIF_F_TSO |
4633 NETIF_F_TSO6 |
4634 NETIF_F_HW_CSUM;
4635 netdev->mpls_features |= IXGBEVF_GSO_PARTIAL_FEATURES;
b83e3010
AD		 4636 netdev->hw_enc_features |= netdev->vlan_features;
4637
4638 /* set this bit last since it cannot be part of vlan_features */
4639 netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER |
4640 NETIF_F_HW_VLAN_CTAG_RX |
4641 NETIF_F_HW_VLAN_CTAG_TX;
4642
01789349
JP		 4643 netdev->priv_flags |= IFF_UNICAST_FLT;
4644
91c527a5
JW		 4645 /* MTU range: 68 - 1504 or 9710 */
4646 netdev->min_mtu = ETH_MIN_MTU;
4647 switch (adapter->hw.api_version) {
4648 case ixgbe_mbox_api_11:
4649 case ixgbe_mbox_api_12:
41e544cd 4650 case ixgbe_mbox_api_13:
7f68d430 4651 case ixgbe_mbox_api_14:
91c527a5
JW		 4652 netdev->max_mtu = IXGBE_MAX_JUMBO_FRAME_SIZE -
4653 (ETH_HLEN + ETH_FCS_LEN);
4654 break;
4655 default:
4656 if (adapter->hw.mac.type != ixgbe_mac_82599_vf)
4657 netdev->max_mtu = IXGBE_MAX_JUMBO_FRAME_SIZE -
4658 (ETH_HLEN + ETH_FCS_LEN);
4659 else
4660 netdev->max_mtu = ETH_DATA_LEN + ETH_FCS_LEN;
4661 break;
4662 }
4663
ea699569
MR		 4664 if (IXGBE_REMOVED(hw->hw_addr)) {
4665 err = -EIO;
4666 goto err_sw_init;
4667 }
9ac5c5cc 4668
26566eae 4669 timer_setup(&adapter->service_timer, ixgbevf_service_timer, 0);
9ac5c5cc
ET		 4670
4671 INIT_WORK(&adapter->service_task, ixgbevf_service_task);
4672 set_bit(__IXGBEVF_SERVICE_INITED, &adapter->state);
4673 clear_bit(__IXGBEVF_SERVICE_SCHED, &adapter->state);
92915f71
GR		 4674
4675 err = ixgbevf_init_interrupt_scheme(adapter);
4676 if (err)
4677 goto err_sw_init;
4678
92915f71
GR		 4679 strcpy(netdev->name, "eth%d");
4680
4681 err = register_netdev(netdev);
4682 if (err)
4683 goto err_register;
4684
0333464f 4685 pci_set_drvdata(pdev, netdev);
5d426ad1 4686 netif_carrier_off(netdev);
7f68d430 4687 ixgbevf_init_ipsec_offload(adapter);
5d426ad1 4688
33bd9f60
GR		 4689 ixgbevf_init_last_counter_stats(adapter);
4690
47068b0d
ET		 4691 /* print the VF info */
4692 dev_info(&pdev->dev, "%pM\n", netdev->dev_addr);
4693 dev_info(&pdev->dev, "MAC: %d\n", hw->mac.type);
92915f71 4694
47068b0d
ET		 4695 switch (hw->mac.type) {
4696 case ixgbe_mac_X550_vf:
4697 dev_info(&pdev->dev, "Intel(R) X550 Virtual Function\n");
4698 break;
4699 case ixgbe_mac_X540_vf:
4700 dev_info(&pdev->dev, "Intel(R) X540 Virtual Function\n");
4701 break;
4702 case ixgbe_mac_82599_vf:
4703 default:
4704 dev_info(&pdev->dev, "Intel(R) 82599 Virtual Function\n");
4705 break;
4706 }
92915f71 4707
92915f71
GR		 4708 return 0;
4709
4710err_register:
0ac1e8ce 4711 ixgbevf_clear_interrupt_scheme(adapter);
92915f71
GR		 4712err_sw_init:
4713 ixgbevf_reset_interrupt_capability(adapter);
dbf8b0d8 4714 iounmap(adapter->io_addr);
e60ae003 4715 kfree(adapter->rss_key);
92915f71 4716err_ioremap:
0333464f 4717 disable_dev = !test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state);
92915f71
GR		 4718 free_netdev(netdev);
4719err_alloc_etherdev:
4720 pci_release_regions(pdev);
4721err_pci_reg:
4722err_dma:
0333464f 4723 if (!adapter || disable_dev)
bc0c7151 4724 pci_disable_device(pdev);
92915f71
GR		 4725 return err;
4726}
4727
4728/**
4729 * ixgbevf_remove - Device Removal Routine
4730 * @pdev: PCI device information struct
4731 *
4732 * ixgbevf_remove is called by the PCI subsystem to alert the driver
4733 * that it should release a PCI device. The could be caused by a
4734 * Hot-Plug event, or because the driver is going to be removed from
4735 * memory.
4736 **/
9f9a12f8 4737static void ixgbevf_remove(struct pci_dev *pdev)
92915f71
GR		 4738{
4739 struct net_device *netdev = pci_get_drvdata(pdev);
0333464f
ET		 4740 struct ixgbevf_adapter *adapter;
4741 bool disable_dev;
4742
4743 if (!netdev)
4744 return;
4745
4746 adapter = netdev_priv(netdev);
92915f71 4747
2e7cfbdd 4748 set_bit(__IXGBEVF_REMOVING, &adapter->state);
9ac5c5cc 4749 cancel_work_sync(&adapter->service_task);
92915f71 4750
fd13a9ab 4751 if (netdev->reg_state == NETREG_REGISTERED)
92915f71 4752 unregister_netdev(netdev);
92915f71 4753
7f68d430 4754 ixgbevf_stop_ipsec_offload(adapter);
0ac1e8ce 4755 ixgbevf_clear_interrupt_scheme(adapter);
92915f71
GR		 4756 ixgbevf_reset_interrupt_capability(adapter);
4757
dbf8b0d8 4758 iounmap(adapter->io_addr);
92915f71
GR		 4759 pci_release_regions(pdev);
4760
4761 hw_dbg(&adapter->hw, "Remove complete\n");
4762
e60ae003 4763 kfree(adapter->rss_key);
0333464f 4764 disable_dev = !test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state);
92915f71
GR		 4765 free_netdev(netdev);
4766
0333464f 4767 if (disable_dev)
bc0c7151 4768 pci_disable_device(pdev);
92915f71
GR		 4769}
4770
9f19f31d
AD		 4771/**
4772 * ixgbevf_io_error_detected - called when PCI error is detected
4773 * @pdev: Pointer to PCI device
4774 * @state: The current pci connection state
4775 *
4776 * This function is called after a PCI bus error affecting
4777 * this device has been detected.
dec0d8e4 4778 **/
9f19f31d
AD		 4779static pci_ers_result_t ixgbevf_io_error_detected(struct pci_dev *pdev,
4780 pci_channel_state_t state)
4781{
4782 struct net_device *netdev = pci_get_drvdata(pdev);
4783 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
4784
9ac5c5cc 4785 if (!test_bit(__IXGBEVF_SERVICE_INITED, &adapter->state))
ea699569
MR		 4786 return PCI_ERS_RESULT_DISCONNECT;
4787
bc0c7151 4788 rtnl_lock();
9f19f31d
AD		 4789 netif_device_detach(netdev);
4790
b212d815
MR		 4791 if (netif_running(netdev))
4792 ixgbevf_close_suspend(adapter);
4793
bc0c7151
MR		 4794 if (state == pci_channel_io_perm_failure) {
4795 rtnl_unlock();
9f19f31d 4796 return PCI_ERS_RESULT_DISCONNECT;
bc0c7151 4797 }
9f19f31d 4798
bc0c7151
MR		 4799 if (!test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state))
4800 pci_disable_device(pdev);
4801 rtnl_unlock();
9f19f31d
AD		 4802
4803 /* Request a slot slot reset. */
4804 return PCI_ERS_RESULT_NEED_RESET;
4805}
4806
4807/**
4808 * ixgbevf_io_slot_reset - called after the pci bus has been reset.
4809 * @pdev: Pointer to PCI device
4810 *
4811 * Restart the card from scratch, as if from a cold-boot. Implementation
4812 * resembles the first-half of the ixgbevf_resume routine.
dec0d8e4 4813 **/
9f19f31d
AD		 4814static pci_ers_result_t ixgbevf_io_slot_reset(struct pci_dev *pdev)
4815{
4816 struct net_device *netdev = pci_get_drvdata(pdev);
4817 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
4818
4819 if (pci_enable_device_mem(pdev)) {
4820 dev_err(&pdev->dev,
4821 "Cannot re-enable PCI device after reset.\n");
4822 return PCI_ERS_RESULT_DISCONNECT;
4823 }
4824
26403b7f 4825 adapter->hw.hw_addr = adapter->io_addr;
4e857c58 4826 smp_mb__before_atomic();
bc0c7151 4827 clear_bit(__IXGBEVF_DISABLED, &adapter->state);
9f19f31d
AD		 4828 pci_set_master(pdev);
4829
4830 ixgbevf_reset(adapter);
4831
4832 return PCI_ERS_RESULT_RECOVERED;
4833}
4834
4835/**
4836 * ixgbevf_io_resume - called when traffic can start flowing again.
4837 * @pdev: Pointer to PCI device
4838 *
4839 * This callback is called when the error recovery driver tells us that
4840 * its OK to resume normal operation. Implementation resembles the
4841 * second-half of the ixgbevf_resume routine.
dec0d8e4 4842 **/
9f19f31d
AD		 4843static void ixgbevf_io_resume(struct pci_dev *pdev)
4844{
4845 struct net_device *netdev = pci_get_drvdata(pdev);
9f19f31d 4846
b19cf6ee 4847 rtnl_lock();
9f19f31d 4848 if (netif_running(netdev))
b19cf6ee 4849 ixgbevf_open(netdev);
9f19f31d
AD		 4850
4851 netif_device_attach(netdev);
b19cf6ee 4852 rtnl_unlock();
9f19f31d
AD		 4853}
4854
4855/* PCI Error Recovery (ERS) */
3646f0e5 4856static const struct pci_error_handlers ixgbevf_err_handler = {
9f19f31d
AD		 4857 .error_detected = ixgbevf_io_error_detected,
4858 .slot_reset = ixgbevf_io_slot_reset,
4859 .resume = ixgbevf_io_resume,
4860};
4861
92915f71 4862static struct pci_driver ixgbevf_driver = {
dec0d8e4
JK		 4863 .name = ixgbevf_driver_name,
4864 .id_table = ixgbevf_pci_tbl,
4865 .probe = ixgbevf_probe,
4866 .remove = ixgbevf_remove,
0ac1e8ce
AD		 4867#ifdef CONFIG_PM
4868 /* Power Management Hooks */
dec0d8e4
JK		 4869 .suspend = ixgbevf_suspend,
4870 .resume = ixgbevf_resume,
0ac1e8ce 4871#endif
dec0d8e4
JK		 4872 .shutdown = ixgbevf_shutdown,
4873 .err_handler = &ixgbevf_err_handler
92915f71
GR		 4874};
4875
4876/**
65d676c8 4877 * ixgbevf_init_module - Driver Registration Routine
92915f71 4878 *
65d676c8 4879 * ixgbevf_init_module is the first routine called when the driver is
92915f71
GR		 4880 * loaded. All it does is register with the PCI subsystem.
4881 **/
4882static int __init ixgbevf_init_module(void)
4883{
dbd9636e
JK		 4884 pr_info("%s - version %s\n", ixgbevf_driver_string,
4885 ixgbevf_driver_version);
92915f71 4886
dbd9636e 4887 pr_info("%s\n", ixgbevf_copyright);
40a13e24
MR		 4888 ixgbevf_wq = create_singlethread_workqueue(ixgbevf_driver_name);
4889 if (!ixgbevf_wq) {
4890 pr_err("%s: Failed to create workqueue\n", ixgbevf_driver_name);
4891 return -ENOMEM;
4892 }
92915f71 4893
50985b5f 4894 return pci_register_driver(&ixgbevf_driver);
92915f71
GR		 4895}
4896
4897module_init(ixgbevf_init_module);
4898
4899/**
65d676c8 4900 * ixgbevf_exit_module - Driver Exit Cleanup Routine
92915f71 4901 *
65d676c8 4902 * ixgbevf_exit_module is called just before the driver is removed
92915f71
GR		 4903 * from memory.
4904 **/
4905static void __exit ixgbevf_exit_module(void)
4906{
4907 pci_unregister_driver(&ixgbevf_driver);
40a13e24
MR		 4908 if (ixgbevf_wq) {
4909 destroy_workqueue(ixgbevf_wq);
4910 ixgbevf_wq = NULL;
4911 }
92915f71
GR		 4912}
4913
4914#ifdef DEBUG
4915/**
65d676c8 4916 * ixgbevf_get_hw_dev_name - return device name string
92915f71 4917 * used by hardware layer to print debugging information
e23cf38f 4918 * @hw: pointer to private hardware struct
92915f71
GR		 4919 **/
4920char *ixgbevf_get_hw_dev_name(struct ixgbe_hw *hw)
4921{
4922 struct ixgbevf_adapter *adapter = hw->back;
dec0d8e4 4923
92915f71
GR		 4924 return adapter->netdev->name;
4925}
4926
4927#endif
4928module_exit(ixgbevf_exit_module);
4929
4930/* ixgbevf_main.c */
Linux 6.x block layer and io_uring tree(s)