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17367270 GR |
1 | /******************************************************************************* |
2 | ||
3 | Intel 10 Gigabit PCI Express Linux driver | |
988d1307 | 4 | Copyright(c) 1999 - 2015 Intel Corporation. |
17367270 GR |
5 | |
6 | This program is free software; you can redistribute it and/or modify it | |
7 | under the terms and conditions of the GNU General Public License, | |
8 | version 2, as published by the Free Software Foundation. | |
9 | ||
10 | This program is distributed in the hope it will be useful, but WITHOUT | |
11 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
12 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
13 | more details. | |
14 | ||
15 | You should have received a copy of the GNU General Public License along with | |
16 | this program; if not, write to the Free Software Foundation, Inc., | |
17 | 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. | |
18 | ||
19 | The full GNU General Public License is included in this distribution in | |
20 | the file called "COPYING". | |
21 | ||
22 | Contact Information: | |
b89aae71 | 23 | Linux NICS <linux.nics@intel.com> |
17367270 GR |
24 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> |
25 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
26 | ||
27 | *******************************************************************************/ | |
28 | ||
17367270 GR |
29 | #include <linux/types.h> |
30 | #include <linux/module.h> | |
31 | #include <linux/pci.h> | |
32 | #include <linux/netdevice.h> | |
33 | #include <linux/vmalloc.h> | |
34 | #include <linux/string.h> | |
35 | #include <linux/in.h> | |
36 | #include <linux/ip.h> | |
37 | #include <linux/tcp.h> | |
38 | #include <linux/ipv6.h> | |
aa2bacb6 | 39 | #include <linux/if_bridge.h> |
f646968f | 40 | #ifdef NETIF_F_HW_VLAN_CTAG_TX |
17367270 GR |
41 | #include <linux/if_vlan.h> |
42 | #endif | |
43 | ||
44 | #include "ixgbe.h" | |
c6bda30a | 45 | #include "ixgbe_type.h" |
17367270 GR |
46 | #include "ixgbe_sriov.h" |
47 | ||
c6bda30a | 48 | #ifdef CONFIG_PCI_IOV |
66dcfd75 | 49 | static int __ixgbe_enable_sriov(struct ixgbe_adapter *adapter) |
c6bda30a GR |
50 | { |
51 | struct ixgbe_hw *hw = &adapter->hw; | |
c6bda30a GR |
52 | int num_vf_macvlans, i; |
53 | struct vf_macvlans *mv_list; | |
c6bda30a | 54 | |
73079ea0 | 55 | adapter->flags |= IXGBE_FLAG_SRIOV_ENABLED; |
c6bda30a GR |
56 | e_info(probe, "SR-IOV enabled with %d VFs\n", adapter->num_vfs); |
57 | ||
73079ea0 AD |
58 | /* Enable VMDq flag so device will be set in VM mode */ |
59 | adapter->flags |= IXGBE_FLAG_VMDQ_ENABLED; | |
60 | if (!adapter->ring_feature[RING_F_VMDQ].limit) | |
61 | adapter->ring_feature[RING_F_VMDQ].limit = 1; | |
62 | adapter->ring_feature[RING_F_VMDQ].offset = adapter->num_vfs; | |
63 | ||
c6bda30a GR |
64 | num_vf_macvlans = hw->mac.num_rar_entries - |
65 | (IXGBE_MAX_PF_MACVLANS + 1 + adapter->num_vfs); | |
66 | ||
67 | adapter->mv_list = mv_list = kcalloc(num_vf_macvlans, | |
68 | sizeof(struct vf_macvlans), | |
69 | GFP_KERNEL); | |
70 | if (mv_list) { | |
71 | /* Initialize list of VF macvlans */ | |
72 | INIT_LIST_HEAD(&adapter->vf_mvs.l); | |
73 | for (i = 0; i < num_vf_macvlans; i++) { | |
74 | mv_list->vf = -1; | |
75 | mv_list->free = true; | |
c6bda30a GR |
76 | list_add(&mv_list->l, &adapter->vf_mvs.l); |
77 | mv_list++; | |
78 | } | |
79 | } | |
80 | ||
815cccbf JF |
81 | /* Initialize default switching mode VEB */ |
82 | IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN); | |
aa2bacb6 | 83 | adapter->bridge_mode = BRIDGE_MODE_VEB; |
815cccbf | 84 | |
c6bda30a GR |
85 | /* If call to enable VFs succeeded then allocate memory |
86 | * for per VF control structures. | |
87 | */ | |
88 | adapter->vfinfo = | |
89 | kcalloc(adapter->num_vfs, | |
90 | sizeof(struct vf_data_storage), GFP_KERNEL); | |
91 | if (adapter->vfinfo) { | |
73079ea0 AD |
92 | /* limit trafffic classes based on VFs enabled */ |
93 | if ((adapter->hw.mac.type == ixgbe_mac_82599EB) && | |
94 | (adapter->num_vfs < 16)) { | |
95 | adapter->dcb_cfg.num_tcs.pg_tcs = MAX_TRAFFIC_CLASS; | |
96 | adapter->dcb_cfg.num_tcs.pfc_tcs = MAX_TRAFFIC_CLASS; | |
97 | } else if (adapter->num_vfs < 32) { | |
98 | adapter->dcb_cfg.num_tcs.pg_tcs = 4; | |
99 | adapter->dcb_cfg.num_tcs.pfc_tcs = 4; | |
100 | } else { | |
101 | adapter->dcb_cfg.num_tcs.pg_tcs = 1; | |
102 | adapter->dcb_cfg.num_tcs.pfc_tcs = 1; | |
103 | } | |
104 | ||
c6bda30a GR |
105 | /* Disable RSC when in SR-IOV mode */ |
106 | adapter->flags2 &= ~(IXGBE_FLAG2_RSC_CAPABLE | | |
107 | IXGBE_FLAG2_RSC_ENABLED); | |
73079ea0 | 108 | |
e65ce0d3 VZ |
109 | for (i = 0; i < adapter->num_vfs; i++) { |
110 | /* enable spoof checking for all VFs */ | |
de4c7f65 | 111 | adapter->vfinfo[i].spoofchk_enabled = true; |
e65ce0d3 VZ |
112 | |
113 | /* We support VF RSS querying only for 82599 and x540 | |
114 | * devices at the moment. These devices share RSS | |
115 | * indirection table and RSS hash key with PF therefore | |
116 | * we want to disable the querying by default. | |
117 | */ | |
118 | adapter->vfinfo[i].rss_query_enabled = 0; | |
54011e4d HS |
119 | |
120 | /* Untrust all VFs */ | |
121 | adapter->vfinfo[i].trusted = false; | |
8443c1a4 HS |
122 | |
123 | /* set the default xcast mode */ | |
124 | adapter->vfinfo[i].xcast_mode = IXGBEVF_XCAST_MODE_NONE; | |
e65ce0d3 VZ |
125 | } |
126 | ||
66dcfd75 GR |
127 | return 0; |
128 | } | |
129 | ||
130 | return -ENOMEM; | |
131 | } | |
132 | ||
988d1307 MR |
133 | /** |
134 | * ixgbe_get_vfs - Find and take references to all vf devices | |
135 | * @adapter: Pointer to adapter struct | |
136 | */ | |
137 | static void ixgbe_get_vfs(struct ixgbe_adapter *adapter) | |
138 | { | |
139 | struct pci_dev *pdev = adapter->pdev; | |
140 | u16 vendor = pdev->vendor; | |
141 | struct pci_dev *vfdev; | |
142 | int vf = 0; | |
143 | u16 vf_id; | |
144 | int pos; | |
145 | ||
146 | pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV); | |
147 | if (!pos) | |
148 | return; | |
149 | pci_read_config_word(pdev, pos + PCI_SRIOV_VF_DID, &vf_id); | |
150 | ||
151 | vfdev = pci_get_device(vendor, vf_id, NULL); | |
152 | for (; vfdev; vfdev = pci_get_device(vendor, vf_id, vfdev)) { | |
153 | if (!vfdev->is_virtfn) | |
154 | continue; | |
155 | if (vfdev->physfn != pdev) | |
156 | continue; | |
157 | if (vf >= adapter->num_vfs) | |
158 | continue; | |
159 | pci_dev_get(vfdev); | |
160 | adapter->vfinfo[vf].vfdev = vfdev; | |
161 | ++vf; | |
162 | } | |
163 | } | |
164 | ||
66dcfd75 GR |
165 | /* Note this function is called when the user wants to enable SR-IOV |
166 | * VFs using the now deprecated module parameter | |
167 | */ | |
168 | void ixgbe_enable_sriov(struct ixgbe_adapter *adapter) | |
169 | { | |
170 | int pre_existing_vfs = 0; | |
171 | ||
172 | pre_existing_vfs = pci_num_vf(adapter->pdev); | |
173 | if (!pre_existing_vfs && !adapter->num_vfs) | |
c6bda30a | 174 | return; |
66dcfd75 | 175 | |
66dcfd75 GR |
176 | /* If there are pre-existing VFs then we have to force |
177 | * use of that many - over ride any module parameter value. | |
178 | * This may result from the user unloading the PF driver | |
179 | * while VFs were assigned to guest VMs or because the VFs | |
180 | * have been created via the new PCI SR-IOV sysfs interface. | |
181 | */ | |
182 | if (pre_existing_vfs) { | |
183 | adapter->num_vfs = pre_existing_vfs; | |
184 | dev_warn(&adapter->pdev->dev, | |
185 | "Virtual Functions already enabled for this device - Please reload all VF drivers to avoid spoofed packet errors\n"); | |
186 | } else { | |
187 | int err; | |
188 | /* | |
189 | * The 82599 supports up to 64 VFs per physical function | |
190 | * but this implementation limits allocation to 63 so that | |
191 | * basic networking resources are still available to the | |
dbedd44e | 192 | * physical function. If the user requests greater than |
66dcfd75 GR |
193 | * 63 VFs then it is an error - reset to default of zero. |
194 | */ | |
dcc23e3a | 195 | adapter->num_vfs = min_t(unsigned int, adapter->num_vfs, IXGBE_MAX_VFS_DRV_LIMIT); |
66dcfd75 GR |
196 | |
197 | err = pci_enable_sriov(adapter->pdev, adapter->num_vfs); | |
198 | if (err) { | |
199 | e_err(probe, "Failed to enable PCI sriov: %d\n", err); | |
200 | adapter->num_vfs = 0; | |
201 | return; | |
202 | } | |
c6bda30a GR |
203 | } |
204 | ||
988d1307 MR |
205 | if (!__ixgbe_enable_sriov(adapter)) { |
206 | ixgbe_get_vfs(adapter); | |
66dcfd75 | 207 | return; |
988d1307 | 208 | } |
66dcfd75 GR |
209 | |
210 | /* If we have gotten to this point then there is no memory available | |
211 | * to manage the VF devices - print message and bail. | |
212 | */ | |
c6bda30a GR |
213 | e_err(probe, "Unable to allocate memory for VF Data Storage - " |
214 | "SRIOV disabled\n"); | |
99d74487 | 215 | ixgbe_disable_sriov(adapter); |
c6bda30a | 216 | } |
c6bda30a | 217 | |
9297127b | 218 | #endif /* #ifdef CONFIG_PCI_IOV */ |
da36b647 | 219 | int ixgbe_disable_sriov(struct ixgbe_adapter *adapter) |
c6bda30a | 220 | { |
988d1307 | 221 | unsigned int num_vfs = adapter->num_vfs, vf; |
c6bda30a | 222 | struct ixgbe_hw *hw = &adapter->hw; |
c6bda30a GR |
223 | u32 gpie; |
224 | u32 vmdctl; | |
da36b647 | 225 | int rss; |
c6bda30a | 226 | |
d773d131 AD |
227 | /* set num VFs to 0 to prevent access to vfinfo */ |
228 | adapter->num_vfs = 0; | |
229 | ||
988d1307 MR |
230 | /* put the reference to all of the vf devices */ |
231 | for (vf = 0; vf < num_vfs; ++vf) { | |
232 | struct pci_dev *vfdev = adapter->vfinfo[vf].vfdev; | |
233 | ||
234 | if (!vfdev) | |
235 | continue; | |
236 | adapter->vfinfo[vf].vfdev = NULL; | |
237 | pci_dev_put(vfdev); | |
238 | } | |
239 | ||
d773d131 AD |
240 | /* free VF control structures */ |
241 | kfree(adapter->vfinfo); | |
242 | adapter->vfinfo = NULL; | |
243 | ||
244 | /* free macvlan list */ | |
245 | kfree(adapter->mv_list); | |
246 | adapter->mv_list = NULL; | |
247 | ||
99d74487 AD |
248 | /* if SR-IOV is already disabled then there is nothing to do */ |
249 | if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) | |
da36b647 | 250 | return 0; |
99d74487 | 251 | |
c6bda30a | 252 | #ifdef CONFIG_PCI_IOV |
9297127b AD |
253 | /* |
254 | * If our VFs are assigned we cannot shut down SR-IOV | |
255 | * without causing issues, so just leave the hardware | |
256 | * available but disabled | |
257 | */ | |
e507d0cd | 258 | if (pci_vfs_assigned(adapter->pdev)) { |
9297127b | 259 | e_dev_warn("Unloading driver while VFs are assigned - VFs will not be deallocated\n"); |
da36b647 | 260 | return -EPERM; |
d47e12d6 | 261 | } |
c6bda30a GR |
262 | /* disable iov and allow time for transactions to clear */ |
263 | pci_disable_sriov(adapter->pdev); | |
264 | #endif | |
265 | ||
266 | /* turn off device IOV mode */ | |
73079ea0 | 267 | IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, 0); |
c6bda30a GR |
268 | gpie = IXGBE_READ_REG(hw, IXGBE_GPIE); |
269 | gpie &= ~IXGBE_GPIE_VTMODE_MASK; | |
270 | IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie); | |
271 | ||
272 | /* set default pool back to 0 */ | |
273 | vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL); | |
274 | vmdctl &= ~IXGBE_VT_CTL_POOL_MASK; | |
275 | IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl); | |
276 | IXGBE_WRITE_FLUSH(hw); | |
277 | ||
1d9c0bfd | 278 | /* Disable VMDq flag so device will be set in VM mode */ |
2a47fa45 | 279 | if (adapter->ring_feature[RING_F_VMDQ].limit == 1) { |
1d9c0bfd | 280 | adapter->flags &= ~IXGBE_FLAG_VMDQ_ENABLED; |
2a47fa45 | 281 | adapter->flags &= ~IXGBE_FLAG_SRIOV_ENABLED; |
0f9b232b DS |
282 | rss = min_t(int, ixgbe_max_rss_indices(adapter), |
283 | num_online_cpus()); | |
2a47fa45 JF |
284 | } else { |
285 | rss = min_t(int, IXGBE_MAX_L2A_QUEUES, num_online_cpus()); | |
286 | } | |
1d9c0bfd | 287 | |
2a47fa45 | 288 | adapter->ring_feature[RING_F_VMDQ].offset = 0; |
da36b647 GR |
289 | adapter->ring_feature[RING_F_RSS].limit = rss; |
290 | ||
c6bda30a GR |
291 | /* take a breather then clean up driver data */ |
292 | msleep(100); | |
da36b647 GR |
293 | return 0; |
294 | } | |
295 | ||
296 | static int ixgbe_pci_sriov_enable(struct pci_dev *dev, int num_vfs) | |
297 | { | |
298 | #ifdef CONFIG_PCI_IOV | |
299 | struct ixgbe_adapter *adapter = pci_get_drvdata(dev); | |
300 | int err = 0; | |
301 | int i; | |
302 | int pre_existing_vfs = pci_num_vf(dev); | |
303 | ||
304 | if (pre_existing_vfs && pre_existing_vfs != num_vfs) | |
305 | err = ixgbe_disable_sriov(adapter); | |
306 | else if (pre_existing_vfs && pre_existing_vfs == num_vfs) | |
e90dd264 | 307 | return num_vfs; |
da36b647 GR |
308 | |
309 | if (err) | |
e90dd264 | 310 | return err; |
da36b647 | 311 | |
aac2f1bf JK |
312 | /* While the SR-IOV capability structure reports total VFs to be 64, |
313 | * we have to limit the actual number allocated based on two factors. | |
314 | * First, we reserve some transmit/receive resources for the PF. | |
315 | * Second, VMDQ also uses the same pools that SR-IOV does. We need to | |
316 | * account for this, so that we don't accidentally allocate more VFs | |
317 | * than we have available pools. The PCI bus driver already checks for | |
318 | * other values out of range. | |
da36b647 | 319 | */ |
aac2f1bf | 320 | if ((num_vfs + adapter->num_rx_pools) > IXGBE_MAX_VF_FUNCTIONS) |
e90dd264 | 321 | return -EPERM; |
da36b647 GR |
322 | |
323 | adapter->num_vfs = num_vfs; | |
324 | ||
325 | err = __ixgbe_enable_sriov(adapter); | |
326 | if (err) | |
e90dd264 | 327 | return err; |
da36b647 GR |
328 | |
329 | for (i = 0; i < adapter->num_vfs; i++) | |
330 | ixgbe_vf_configuration(dev, (i | 0x10000000)); | |
331 | ||
0c339bf9 ET |
332 | /* reset before enabling SRIOV to avoid mailbox issues */ |
333 | ixgbe_sriov_reinit(adapter); | |
334 | ||
da36b647 GR |
335 | err = pci_enable_sriov(dev, num_vfs); |
336 | if (err) { | |
337 | e_dev_warn("Failed to enable PCI sriov: %d\n", err); | |
e90dd264 | 338 | return err; |
da36b647 | 339 | } |
988d1307 | 340 | ixgbe_get_vfs(adapter); |
da36b647 | 341 | |
da36b647 | 342 | return num_vfs; |
e90dd264 | 343 | #else |
da36b647 | 344 | return 0; |
e90dd264 | 345 | #endif |
da36b647 GR |
346 | } |
347 | ||
348 | static int ixgbe_pci_sriov_disable(struct pci_dev *dev) | |
349 | { | |
350 | struct ixgbe_adapter *adapter = pci_get_drvdata(dev); | |
351 | int err; | |
8f48f5bc | 352 | #ifdef CONFIG_PCI_IOV |
da36b647 | 353 | u32 current_flags = adapter->flags; |
8f48f5bc | 354 | #endif |
da36b647 GR |
355 | |
356 | err = ixgbe_disable_sriov(adapter); | |
357 | ||
358 | /* Only reinit if no error and state changed */ | |
da36b647 | 359 | #ifdef CONFIG_PCI_IOV |
2a47fa45 | 360 | if (!err && current_flags != adapter->flags) |
da36b647 GR |
361 | ixgbe_sriov_reinit(adapter); |
362 | #endif | |
da36b647 GR |
363 | |
364 | return err; | |
365 | } | |
366 | ||
367 | int ixgbe_pci_sriov_configure(struct pci_dev *dev, int num_vfs) | |
368 | { | |
369 | if (num_vfs == 0) | |
370 | return ixgbe_pci_sriov_disable(dev); | |
371 | else | |
372 | return ixgbe_pci_sriov_enable(dev, num_vfs); | |
c6bda30a GR |
373 | } |
374 | ||
5d5b7c39 | 375 | static int ixgbe_set_vf_multicasts(struct ixgbe_adapter *adapter, |
58a02bee | 376 | u32 *msgbuf, u32 vf) |
17367270 | 377 | { |
58a02bee AD |
378 | int entries = (msgbuf[0] & IXGBE_VT_MSGINFO_MASK) |
379 | >> IXGBE_VT_MSGINFO_SHIFT; | |
380 | u16 *hash_list = (u16 *)&msgbuf[1]; | |
17367270 | 381 | struct vf_data_storage *vfinfo = &adapter->vfinfo[vf]; |
8a07a22d | 382 | struct ixgbe_hw *hw = &adapter->hw; |
17367270 | 383 | int i; |
8a07a22d GR |
384 | u32 vector_bit; |
385 | u32 vector_reg; | |
386 | u32 mta_reg; | |
b335e75b | 387 | u32 vmolr = IXGBE_READ_REG(hw, IXGBE_VMOLR(vf)); |
17367270 GR |
388 | |
389 | /* only so many hash values supported */ | |
390 | entries = min(entries, IXGBE_MAX_VF_MC_ENTRIES); | |
391 | ||
392 | /* | |
393 | * salt away the number of multi cast addresses assigned | |
394 | * to this VF for later use to restore when the PF multi cast | |
395 | * list changes | |
396 | */ | |
397 | vfinfo->num_vf_mc_hashes = entries; | |
398 | ||
399 | /* | |
400 | * VFs are limited to using the MTA hash table for their multicast | |
401 | * addresses | |
402 | */ | |
403 | for (i = 0; i < entries; i++) { | |
e81a1ba8 | 404 | vfinfo->vf_mc_hashes[i] = hash_list[i]; |
17367270 GR |
405 | } |
406 | ||
8a07a22d GR |
407 | for (i = 0; i < vfinfo->num_vf_mc_hashes; i++) { |
408 | vector_reg = (vfinfo->vf_mc_hashes[i] >> 5) & 0x7F; | |
409 | vector_bit = vfinfo->vf_mc_hashes[i] & 0x1F; | |
410 | mta_reg = IXGBE_READ_REG(hw, IXGBE_MTA(vector_reg)); | |
b4f47a48 | 411 | mta_reg |= BIT(vector_bit); |
8a07a22d GR |
412 | IXGBE_WRITE_REG(hw, IXGBE_MTA(vector_reg), mta_reg); |
413 | } | |
b335e75b JK |
414 | vmolr |= IXGBE_VMOLR_ROMPE; |
415 | IXGBE_WRITE_REG(hw, IXGBE_VMOLR(vf), vmolr); | |
17367270 GR |
416 | |
417 | return 0; | |
418 | } | |
419 | ||
b335e75b | 420 | #ifdef CONFIG_PCI_IOV |
17367270 GR |
421 | void ixgbe_restore_vf_multicasts(struct ixgbe_adapter *adapter) |
422 | { | |
423 | struct ixgbe_hw *hw = &adapter->hw; | |
424 | struct vf_data_storage *vfinfo; | |
425 | int i, j; | |
426 | u32 vector_bit; | |
427 | u32 vector_reg; | |
428 | u32 mta_reg; | |
429 | ||
430 | for (i = 0; i < adapter->num_vfs; i++) { | |
b335e75b | 431 | u32 vmolr = IXGBE_READ_REG(hw, IXGBE_VMOLR(i)); |
17367270 GR |
432 | vfinfo = &adapter->vfinfo[i]; |
433 | for (j = 0; j < vfinfo->num_vf_mc_hashes; j++) { | |
434 | hw->addr_ctrl.mta_in_use++; | |
435 | vector_reg = (vfinfo->vf_mc_hashes[j] >> 5) & 0x7F; | |
436 | vector_bit = vfinfo->vf_mc_hashes[j] & 0x1F; | |
437 | mta_reg = IXGBE_READ_REG(hw, IXGBE_MTA(vector_reg)); | |
b4f47a48 | 438 | mta_reg |= BIT(vector_bit); |
17367270 GR |
439 | IXGBE_WRITE_REG(hw, IXGBE_MTA(vector_reg), mta_reg); |
440 | } | |
b335e75b JK |
441 | |
442 | if (vfinfo->num_vf_mc_hashes) | |
443 | vmolr |= IXGBE_VMOLR_ROMPE; | |
444 | else | |
445 | vmolr &= ~IXGBE_VMOLR_ROMPE; | |
446 | IXGBE_WRITE_REG(hw, IXGBE_VMOLR(i), vmolr); | |
17367270 | 447 | } |
a1cbb15c GR |
448 | |
449 | /* Restore any VF macvlans */ | |
5d7daa35 | 450 | ixgbe_full_sync_mac_table(adapter); |
17367270 | 451 | } |
b335e75b | 452 | #endif |
17367270 | 453 | |
5d5b7c39 ET |
454 | static int ixgbe_set_vf_vlan(struct ixgbe_adapter *adapter, int add, int vid, |
455 | u32 vf) | |
17367270 | 456 | { |
b6488b66 AD |
457 | struct ixgbe_hw *hw = &adapter->hw; |
458 | int err; | |
459 | ||
b6488b66 AD |
460 | /* If VLAN overlaps with one the PF is currently monitoring make |
461 | * sure that we are able to allocate a VLVF entry. This may be | |
462 | * redundant but it guarantees PF will maintain visibility to | |
463 | * the VLAN. | |
464 | */ | |
465 | if (add && test_bit(vid, adapter->active_vlans)) { | |
466 | err = hw->mac.ops.set_vfta(hw, vid, VMDQ_P(0), true, false); | |
467 | if (err) | |
468 | return err; | |
469 | } | |
470 | ||
471 | err = hw->mac.ops.set_vfta(hw, vid, vf, !!add, false); | |
472 | ||
e1d0a2af AD |
473 | if (add && !err) |
474 | return err; | |
475 | ||
476 | /* If we failed to add the VF VLAN or we are removing the VF VLAN | |
477 | * we may need to drop the PF pool bit in order to allow us to free | |
478 | * up the VLVF resources. | |
479 | */ | |
480 | if (test_bit(vid, adapter->active_vlans) || | |
481 | (adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC)) | |
482 | ixgbe_update_pf_promisc_vlvf(adapter, vid); | |
483 | ||
b6488b66 | 484 | return err; |
17367270 GR |
485 | } |
486 | ||
872844dd | 487 | static s32 ixgbe_set_vf_lpe(struct ixgbe_adapter *adapter, u32 *msgbuf, u32 vf) |
e9f98072 GR |
488 | { |
489 | struct ixgbe_hw *hw = &adapter->hw; | |
872844dd | 490 | int max_frame = msgbuf[1]; |
e9f98072 | 491 | u32 max_frs; |
e9f98072 | 492 | |
872844dd AD |
493 | /* |
494 | * For 82599EB we have to keep all PFs and VFs operating with | |
495 | * the same max_frame value in order to avoid sending an oversize | |
496 | * frame to a VF. In order to guarantee this is handled correctly | |
497 | * for all cases we have several special exceptions to take into | |
498 | * account before we can enable the VF for receive | |
499 | */ | |
500 | if (adapter->hw.mac.type == ixgbe_mac_82599EB) { | |
501 | struct net_device *dev = adapter->netdev; | |
502 | int pf_max_frame = dev->mtu + ETH_HLEN; | |
503 | u32 reg_offset, vf_shift, vfre; | |
504 | s32 err = 0; | |
505 | ||
506 | #ifdef CONFIG_FCOE | |
507 | if (dev->features & NETIF_F_FCOE_MTU) | |
508 | pf_max_frame = max_t(int, pf_max_frame, | |
509 | IXGBE_FCOE_JUMBO_FRAME_SIZE); | |
510 | ||
511 | #endif /* CONFIG_FCOE */ | |
bffb3bc9 AD |
512 | switch (adapter->vfinfo[vf].vf_api) { |
513 | case ixgbe_mbox_api_11: | |
4ce37a4c | 514 | case ixgbe_mbox_api_12: |
bffb3bc9 AD |
515 | /* |
516 | * Version 1.1 supports jumbo frames on VFs if PF has | |
517 | * jumbo frames enabled which means legacy VFs are | |
518 | * disabled | |
519 | */ | |
520 | if (pf_max_frame > ETH_FRAME_LEN) | |
521 | break; | |
522 | default: | |
523 | /* | |
524 | * If the PF or VF are running w/ jumbo frames enabled | |
525 | * we need to shut down the VF Rx path as we cannot | |
526 | * support jumbo frames on legacy VFs | |
527 | */ | |
528 | if ((pf_max_frame > ETH_FRAME_LEN) || | |
529 | (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN))) | |
530 | err = -EINVAL; | |
531 | break; | |
532 | } | |
872844dd AD |
533 | |
534 | /* determine VF receive enable location */ | |
535 | vf_shift = vf % 32; | |
536 | reg_offset = vf / 32; | |
537 | ||
538 | /* enable or disable receive depending on error */ | |
539 | vfre = IXGBE_READ_REG(hw, IXGBE_VFRE(reg_offset)); | |
540 | if (err) | |
b4f47a48 | 541 | vfre &= ~BIT(vf_shift); |
872844dd | 542 | else |
b4f47a48 | 543 | vfre |= BIT(vf_shift); |
872844dd AD |
544 | IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), vfre); |
545 | ||
546 | if (err) { | |
547 | e_err(drv, "VF max_frame %d out of range\n", max_frame); | |
548 | return err; | |
549 | } | |
550 | } | |
e9f98072 GR |
551 | |
552 | /* MTU < 68 is an error and causes problems on some kernels */ | |
872844dd AD |
553 | if (max_frame > IXGBE_MAX_JUMBO_FRAME_SIZE) { |
554 | e_err(drv, "VF max_frame %d out of range\n", max_frame); | |
555 | return -EINVAL; | |
e9f98072 GR |
556 | } |
557 | ||
872844dd AD |
558 | /* pull current max frame size from hardware */ |
559 | max_frs = IXGBE_READ_REG(hw, IXGBE_MAXFRS); | |
560 | max_frs &= IXGBE_MHADD_MFS_MASK; | |
561 | max_frs >>= IXGBE_MHADD_MFS_SHIFT; | |
562 | ||
563 | if (max_frs < max_frame) { | |
564 | max_frs = max_frame << IXGBE_MHADD_MFS_SHIFT; | |
e9f98072 GR |
565 | IXGBE_WRITE_REG(hw, IXGBE_MAXFRS, max_frs); |
566 | } | |
567 | ||
872844dd AD |
568 | e_info(hw, "VF requests change max MTU to %d\n", max_frame); |
569 | ||
570 | return 0; | |
e9f98072 GR |
571 | } |
572 | ||
5d5b7c39 | 573 | static void ixgbe_set_vmolr(struct ixgbe_hw *hw, u32 vf, bool aupe) |
17367270 GR |
574 | { |
575 | u32 vmolr = IXGBE_READ_REG(hw, IXGBE_VMOLR(vf)); | |
b335e75b | 576 | vmolr |= IXGBE_VMOLR_BAM; |
f0412776 GR |
577 | if (aupe) |
578 | vmolr |= IXGBE_VMOLR_AUPE; | |
579 | else | |
580 | vmolr &= ~IXGBE_VMOLR_AUPE; | |
17367270 GR |
581 | IXGBE_WRITE_REG(hw, IXGBE_VMOLR(vf), vmolr); |
582 | } | |
583 | ||
107d3018 AD |
584 | static void ixgbe_clear_vmvir(struct ixgbe_adapter *adapter, u32 vf) |
585 | { | |
586 | struct ixgbe_hw *hw = &adapter->hw; | |
587 | ||
588 | IXGBE_WRITE_REG(hw, IXGBE_VMVIR(vf), 0); | |
589 | } | |
4c7f35f6 AD |
590 | |
591 | static void ixgbe_clear_vf_vlans(struct ixgbe_adapter *adapter, u32 vf) | |
592 | { | |
593 | struct ixgbe_hw *hw = &adapter->hw; | |
18be4fce AD |
594 | u32 vlvfb_mask, pool_mask, i; |
595 | ||
596 | /* create mask for VF and other pools */ | |
b4f47a48 JK |
597 | pool_mask = ~BIT(VMDQ_P(0) % 32); |
598 | vlvfb_mask = BIT(vf % 32); | |
4c7f35f6 AD |
599 | |
600 | /* post increment loop, covers VLVF_ENTRIES - 1 to 0 */ | |
601 | for (i = IXGBE_VLVF_ENTRIES; i--;) { | |
4c7f35f6 | 602 | u32 bits[2], vlvfb, vid, vfta, vlvf; |
ab3a3b7b | 603 | u32 word = i * 2 + vf / 32; |
18be4fce | 604 | u32 mask; |
4c7f35f6 | 605 | |
ab3a3b7b | 606 | vlvfb = IXGBE_READ_REG(hw, IXGBE_VLVFB(word)); |
4c7f35f6 AD |
607 | |
608 | /* if our bit isn't set we can skip it */ | |
18be4fce | 609 | if (!(vlvfb & vlvfb_mask)) |
4c7f35f6 AD |
610 | continue; |
611 | ||
612 | /* clear our bit from vlvfb */ | |
18be4fce | 613 | vlvfb ^= vlvfb_mask; |
4c7f35f6 AD |
614 | |
615 | /* create 64b mask to chedk to see if we should clear VLVF */ | |
616 | bits[word % 2] = vlvfb; | |
ab3a3b7b | 617 | bits[~word % 2] = IXGBE_READ_REG(hw, IXGBE_VLVFB(word ^ 1)); |
4c7f35f6 | 618 | |
4c7f35f6 | 619 | /* if other pools are present, just remove ourselves */ |
18be4fce AD |
620 | if (bits[(VMDQ_P(0) / 32) ^ 1] || |
621 | (bits[VMDQ_P(0) / 32] & pool_mask)) | |
4c7f35f6 AD |
622 | goto update_vlvfb; |
623 | ||
18be4fce AD |
624 | /* if PF is present, leave VFTA */ |
625 | if (bits[0] || bits[1]) | |
626 | goto update_vlvf; | |
627 | ||
4c7f35f6 AD |
628 | /* if we cannot determine VLAN just remove ourselves */ |
629 | vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(i)); | |
630 | if (!vlvf) | |
631 | goto update_vlvfb; | |
632 | ||
633 | vid = vlvf & VLAN_VID_MASK; | |
b4f47a48 | 634 | mask = BIT(vid % 32); |
4c7f35f6 AD |
635 | |
636 | /* clear bit from VFTA */ | |
637 | vfta = IXGBE_READ_REG(hw, IXGBE_VFTA(vid / 32)); | |
638 | if (vfta & mask) | |
639 | IXGBE_WRITE_REG(hw, IXGBE_VFTA(vid / 32), vfta ^ mask); | |
640 | update_vlvf: | |
641 | /* clear POOL selection enable */ | |
642 | IXGBE_WRITE_REG(hw, IXGBE_VLVF(i), 0); | |
18be4fce AD |
643 | |
644 | if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC)) | |
645 | vlvfb = 0; | |
4c7f35f6 AD |
646 | update_vlvfb: |
647 | /* clear pool bits */ | |
648 | IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), vlvfb); | |
649 | } | |
650 | } | |
651 | ||
5d5b7c39 | 652 | static inline void ixgbe_vf_reset_event(struct ixgbe_adapter *adapter, u32 vf) |
17367270 GR |
653 | { |
654 | struct ixgbe_hw *hw = &adapter->hw; | |
107d3018 | 655 | struct vf_data_storage *vfinfo = &adapter->vfinfo[vf]; |
107d3018 AD |
656 | u8 num_tcs = netdev_get_num_tc(adapter->netdev); |
657 | ||
4c7f35f6 AD |
658 | /* remove VLAN filters beloning to this VF */ |
659 | ixgbe_clear_vf_vlans(adapter, vf); | |
660 | ||
661 | /* add back PF assigned VLAN or VLAN 0 */ | |
107d3018 | 662 | ixgbe_set_vf_vlan(adapter, true, vfinfo->pf_vlan, vf); |
17367270 GR |
663 | |
664 | /* reset offloads to defaults */ | |
107d3018 AD |
665 | ixgbe_set_vmolr(hw, vf, !vfinfo->pf_vlan); |
666 | ||
667 | /* set outgoing tags for VFs */ | |
668 | if (!vfinfo->pf_vlan && !vfinfo->pf_qos && !num_tcs) { | |
669 | ixgbe_clear_vmvir(adapter, vf); | |
7f01648a | 670 | } else { |
107d3018 AD |
671 | if (vfinfo->pf_qos || !num_tcs) |
672 | ixgbe_set_vmvir(adapter, vfinfo->pf_vlan, | |
673 | vfinfo->pf_qos, vf); | |
674 | else | |
675 | ixgbe_set_vmvir(adapter, vfinfo->pf_vlan, | |
676 | adapter->default_up, vf); | |
677 | ||
678 | if (vfinfo->spoofchk_enabled) | |
679 | hw->mac.ops.set_vlan_anti_spoofing(hw, true, vf); | |
7f01648a | 680 | } |
17367270 GR |
681 | |
682 | /* reset multicast table array for vf */ | |
683 | adapter->vfinfo[vf].num_vf_mc_hashes = 0; | |
684 | ||
685 | /* Flush and reset the mta with the new values */ | |
686 | ixgbe_set_rx_mode(adapter->netdev); | |
687 | ||
5d7daa35 | 688 | ixgbe_del_mac_filter(adapter, adapter->vfinfo[vf].vf_mac_addresses, vf); |
374c65d6 AD |
689 | |
690 | /* reset VF api back to unknown */ | |
691 | adapter->vfinfo[vf].vf_api = ixgbe_mbox_api_10; | |
17367270 GR |
692 | } |
693 | ||
5d5b7c39 ET |
694 | static int ixgbe_set_vf_mac(struct ixgbe_adapter *adapter, |
695 | int vf, unsigned char *mac_addr) | |
17367270 | 696 | { |
5d7daa35 | 697 | ixgbe_del_mac_filter(adapter, adapter->vfinfo[vf].vf_mac_addresses, vf); |
d458cdf7 | 698 | memcpy(adapter->vfinfo[vf].vf_mac_addresses, mac_addr, ETH_ALEN); |
5d7daa35 | 699 | ixgbe_add_mac_filter(adapter, adapter->vfinfo[vf].vf_mac_addresses, vf); |
17367270 GR |
700 | |
701 | return 0; | |
702 | } | |
703 | ||
a1cbb15c GR |
704 | static int ixgbe_set_vf_macvlan(struct ixgbe_adapter *adapter, |
705 | int vf, int index, unsigned char *mac_addr) | |
706 | { | |
a1cbb15c GR |
707 | struct list_head *pos; |
708 | struct vf_macvlans *entry; | |
709 | ||
710 | if (index <= 1) { | |
711 | list_for_each(pos, &adapter->vf_mvs.l) { | |
712 | entry = list_entry(pos, struct vf_macvlans, l); | |
713 | if (entry->vf == vf) { | |
714 | entry->vf = -1; | |
715 | entry->free = true; | |
716 | entry->is_macvlan = false; | |
5d7daa35 JK |
717 | ixgbe_del_mac_filter(adapter, |
718 | entry->vf_macvlan, vf); | |
a1cbb15c GR |
719 | } |
720 | } | |
721 | } | |
722 | ||
723 | /* | |
724 | * If index was zero then we were asked to clear the uc list | |
725 | * for the VF. We're done. | |
726 | */ | |
727 | if (!index) | |
728 | return 0; | |
729 | ||
730 | entry = NULL; | |
731 | ||
732 | list_for_each(pos, &adapter->vf_mvs.l) { | |
733 | entry = list_entry(pos, struct vf_macvlans, l); | |
734 | if (entry->free) | |
735 | break; | |
736 | } | |
737 | ||
738 | /* | |
739 | * If we traversed the entire list and didn't find a free entry | |
740 | * then we're out of space on the RAR table. Also entry may | |
741 | * be NULL because the original memory allocation for the list | |
742 | * failed, which is not fatal but does mean we can't support | |
743 | * VF requests for MACVLAN because we couldn't allocate | |
744 | * memory for the list management required. | |
745 | */ | |
746 | if (!entry || !entry->free) | |
747 | return -ENOSPC; | |
748 | ||
749 | entry->free = false; | |
750 | entry->is_macvlan = true; | |
751 | entry->vf = vf; | |
752 | memcpy(entry->vf_macvlan, mac_addr, ETH_ALEN); | |
753 | ||
5d7daa35 | 754 | ixgbe_add_mac_filter(adapter, mac_addr, vf); |
a1cbb15c GR |
755 | |
756 | return 0; | |
757 | } | |
758 | ||
17367270 GR |
759 | int ixgbe_vf_configuration(struct pci_dev *pdev, unsigned int event_mask) |
760 | { | |
c60fbb00 | 761 | struct ixgbe_adapter *adapter = pci_get_drvdata(pdev); |
17367270 GR |
762 | unsigned int vfn = (event_mask & 0x3f); |
763 | ||
764 | bool enable = ((event_mask & 0x10000000U) != 0); | |
765 | ||
d458cdf7 JP |
766 | if (enable) |
767 | eth_zero_addr(adapter->vfinfo[vfn].vf_mac_addresses); | |
17367270 GR |
768 | |
769 | return 0; | |
770 | } | |
771 | ||
8d697e7e DS |
772 | static inline void ixgbe_write_qde(struct ixgbe_adapter *adapter, u32 vf, |
773 | u32 qde) | |
774 | { | |
775 | struct ixgbe_hw *hw = &adapter->hw; | |
776 | struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ]; | |
777 | u32 q_per_pool = __ALIGN_MASK(1, ~vmdq->mask); | |
778 | int i; | |
779 | ||
780 | for (i = vf * q_per_pool; i < ((vf + 1) * q_per_pool); i++) { | |
781 | u32 reg; | |
782 | ||
783 | /* flush previous write */ | |
784 | IXGBE_WRITE_FLUSH(hw); | |
785 | ||
786 | /* indicate to hardware that we want to set drop enable */ | |
787 | reg = IXGBE_QDE_WRITE | IXGBE_QDE_ENABLE; | |
788 | reg |= i << IXGBE_QDE_IDX_SHIFT; | |
789 | IXGBE_WRITE_REG(hw, IXGBE_QDE, reg); | |
790 | } | |
791 | } | |
792 | ||
58a02bee | 793 | static int ixgbe_vf_reset_msg(struct ixgbe_adapter *adapter, u32 vf) |
17367270 | 794 | { |
87397379 | 795 | struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ]; |
17367270 | 796 | struct ixgbe_hw *hw = &adapter->hw; |
58a02bee | 797 | unsigned char *vf_mac = adapter->vfinfo[vf].vf_mac_addresses; |
b08e1ed9 ET |
798 | u32 reg, reg_offset, vf_shift; |
799 | u32 msgbuf[4] = {0, 0, 0, 0}; | |
58a02bee | 800 | u8 *addr = (u8 *)(&msgbuf[1]); |
87397379 AD |
801 | u32 q_per_pool = __ALIGN_MASK(1, ~vmdq->mask); |
802 | int i; | |
58a02bee AD |
803 | |
804 | e_info(probe, "VF Reset msg received from vf %d\n", vf); | |
805 | ||
806 | /* reset the filters for the device */ | |
807 | ixgbe_vf_reset_event(adapter, vf); | |
808 | ||
809 | /* set vf mac address */ | |
35055928 GR |
810 | if (!is_zero_ether_addr(vf_mac)) |
811 | ixgbe_set_vf_mac(adapter, vf, vf_mac); | |
17367270 GR |
812 | |
813 | vf_shift = vf % 32; | |
814 | reg_offset = vf / 32; | |
815 | ||
58a02bee | 816 | /* enable transmit for vf */ |
17367270 | 817 | reg = IXGBE_READ_REG(hw, IXGBE_VFTE(reg_offset)); |
b4f47a48 | 818 | reg |= BIT(vf_shift); |
17367270 GR |
819 | IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), reg); |
820 | ||
87397379 | 821 | /* force drop enable for all VF Rx queues */ |
8d697e7e | 822 | ixgbe_write_qde(adapter, vf, IXGBE_QDE_ENABLE); |
87397379 | 823 | |
58a02bee | 824 | /* enable receive for vf */ |
17367270 | 825 | reg = IXGBE_READ_REG(hw, IXGBE_VFRE(reg_offset)); |
b4f47a48 | 826 | reg |= BIT(vf_shift); |
872844dd AD |
827 | /* |
828 | * The 82599 cannot support a mix of jumbo and non-jumbo PF/VFs. | |
829 | * For more info take a look at ixgbe_set_vf_lpe | |
830 | */ | |
831 | if (adapter->hw.mac.type == ixgbe_mac_82599EB) { | |
832 | struct net_device *dev = adapter->netdev; | |
833 | int pf_max_frame = dev->mtu + ETH_HLEN; | |
834 | ||
835 | #ifdef CONFIG_FCOE | |
836 | if (dev->features & NETIF_F_FCOE_MTU) | |
837 | pf_max_frame = max_t(int, pf_max_frame, | |
838 | IXGBE_FCOE_JUMBO_FRAME_SIZE); | |
839 | ||
840 | #endif /* CONFIG_FCOE */ | |
841 | if (pf_max_frame > ETH_FRAME_LEN) | |
b4f47a48 | 842 | reg &= ~BIT(vf_shift); |
872844dd | 843 | } |
17367270 GR |
844 | IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), reg); |
845 | ||
58a02bee AD |
846 | /* enable VF mailbox for further messages */ |
847 | adapter->vfinfo[vf].clear_to_send = true; | |
848 | ||
a985b6c3 GR |
849 | /* Enable counting of spoofed packets in the SSVPC register */ |
850 | reg = IXGBE_READ_REG(hw, IXGBE_VMECM(reg_offset)); | |
b4f47a48 | 851 | reg |= BIT(vf_shift); |
a985b6c3 GR |
852 | IXGBE_WRITE_REG(hw, IXGBE_VMECM(reg_offset), reg); |
853 | ||
dbf231af AD |
854 | /* |
855 | * Reset the VFs TDWBAL and TDWBAH registers | |
856 | * which are not cleared by an FLR | |
857 | */ | |
858 | for (i = 0; i < q_per_pool; i++) { | |
859 | IXGBE_WRITE_REG(hw, IXGBE_PVFTDWBAHn(q_per_pool, vf, i), 0); | |
860 | IXGBE_WRITE_REG(hw, IXGBE_PVFTDWBALn(q_per_pool, vf, i), 0); | |
861 | } | |
862 | ||
58a02bee | 863 | /* reply to reset with ack and vf mac address */ |
35055928 GR |
864 | msgbuf[0] = IXGBE_VF_RESET; |
865 | if (!is_zero_ether_addr(vf_mac)) { | |
866 | msgbuf[0] |= IXGBE_VT_MSGTYPE_ACK; | |
867 | memcpy(addr, vf_mac, ETH_ALEN); | |
868 | } else { | |
869 | msgbuf[0] |= IXGBE_VT_MSGTYPE_NACK; | |
870 | dev_warn(&adapter->pdev->dev, | |
871 | "VF %d has no MAC address assigned, you may have to assign one manually\n", | |
872 | vf); | |
873 | } | |
58a02bee AD |
874 | |
875 | /* | |
876 | * Piggyback the multicast filter type so VF can compute the | |
877 | * correct vectors | |
878 | */ | |
879 | msgbuf[3] = hw->mac.mc_filter_type; | |
880 | ixgbe_write_mbx(hw, msgbuf, IXGBE_VF_PERMADDR_MSG_LEN, vf); | |
881 | ||
882 | return 0; | |
883 | } | |
884 | ||
885 | static int ixgbe_set_vf_mac_addr(struct ixgbe_adapter *adapter, | |
886 | u32 *msgbuf, u32 vf) | |
887 | { | |
888 | u8 *new_mac = ((u8 *)(&msgbuf[1])); | |
889 | ||
890 | if (!is_valid_ether_addr(new_mac)) { | |
891 | e_warn(drv, "VF %d attempted to set invalid mac\n", vf); | |
892 | return -1; | |
893 | } | |
894 | ||
1d96cf98 | 895 | if (adapter->vfinfo[vf].pf_set_mac && !adapter->vfinfo[vf].trusted && |
4012dda3 | 896 | !ether_addr_equal(adapter->vfinfo[vf].vf_mac_addresses, new_mac)) { |
58a02bee AD |
897 | e_warn(drv, |
898 | "VF %d attempted to override administratively set MAC address\n" | |
899 | "Reload the VF driver to resume operations\n", | |
900 | vf); | |
901 | return -1; | |
902 | } | |
903 | ||
3970c323 | 904 | return ixgbe_set_vf_mac(adapter, vf, new_mac) < 0; |
58a02bee AD |
905 | } |
906 | ||
907 | static int ixgbe_set_vf_vlan_msg(struct ixgbe_adapter *adapter, | |
908 | u32 *msgbuf, u32 vf) | |
909 | { | |
e1d0a2af AD |
910 | u32 add = (msgbuf[0] & IXGBE_VT_MSGINFO_MASK) >> IXGBE_VT_MSGINFO_SHIFT; |
911 | u32 vid = (msgbuf[1] & IXGBE_VLVF_VLANID_MASK); | |
912 | u8 tcs = netdev_get_num_tc(adapter->netdev); | |
58a02bee | 913 | |
107d3018 | 914 | if (adapter->vfinfo[vf].pf_vlan || tcs) { |
58a02bee AD |
915 | e_warn(drv, |
916 | "VF %d attempted to override administratively set VLAN configuration\n" | |
917 | "Reload the VF driver to resume operations\n", | |
918 | vf); | |
919 | return -1; | |
920 | } | |
921 | ||
4c7f35f6 AD |
922 | /* VLAN 0 is a special case, don't allow it to be removed */ |
923 | if (!vid && !add) | |
924 | return 0; | |
925 | ||
d3dec7c7 | 926 | return ixgbe_set_vf_vlan(adapter, add, vid, vf); |
58a02bee AD |
927 | } |
928 | ||
929 | static int ixgbe_set_vf_macvlan_msg(struct ixgbe_adapter *adapter, | |
930 | u32 *msgbuf, u32 vf) | |
931 | { | |
932 | u8 *new_mac = ((u8 *)(&msgbuf[1])); | |
933 | int index = (msgbuf[0] & IXGBE_VT_MSGINFO_MASK) >> | |
934 | IXGBE_VT_MSGINFO_SHIFT; | |
935 | int err; | |
936 | ||
937 | if (adapter->vfinfo[vf].pf_set_mac && index > 0) { | |
938 | e_warn(drv, | |
939 | "VF %d requested MACVLAN filter but is administratively denied\n", | |
940 | vf); | |
941 | return -1; | |
942 | } | |
943 | ||
944 | /* An non-zero index indicates the VF is setting a filter */ | |
945 | if (index) { | |
946 | if (!is_valid_ether_addr(new_mac)) { | |
947 | e_warn(drv, "VF %d attempted to set invalid mac\n", vf); | |
948 | return -1; | |
949 | } | |
950 | ||
951 | /* | |
952 | * If the VF is allowed to set MAC filters then turn off | |
953 | * anti-spoofing to avoid false positives. | |
954 | */ | |
77f192af ET |
955 | if (adapter->vfinfo[vf].spoofchk_enabled) { |
956 | struct ixgbe_hw *hw = &adapter->hw; | |
957 | ||
958 | hw->mac.ops.set_mac_anti_spoofing(hw, false, vf); | |
581e0c7d | 959 | hw->mac.ops.set_vlan_anti_spoofing(hw, false, vf); |
77f192af | 960 | } |
58a02bee AD |
961 | } |
962 | ||
963 | err = ixgbe_set_vf_macvlan(adapter, vf, index, new_mac); | |
964 | if (err == -ENOSPC) | |
965 | e_warn(drv, | |
966 | "VF %d has requested a MACVLAN filter but there is no space for it\n", | |
967 | vf); | |
a3013405 GR |
968 | |
969 | return err < 0; | |
17367270 GR |
970 | } |
971 | ||
374c65d6 AD |
972 | static int ixgbe_negotiate_vf_api(struct ixgbe_adapter *adapter, |
973 | u32 *msgbuf, u32 vf) | |
974 | { | |
975 | int api = msgbuf[1]; | |
976 | ||
977 | switch (api) { | |
978 | case ixgbe_mbox_api_10: | |
bffb3bc9 | 979 | case ixgbe_mbox_api_11: |
4ce37a4c | 980 | case ixgbe_mbox_api_12: |
374c65d6 AD |
981 | adapter->vfinfo[vf].vf_api = api; |
982 | return 0; | |
983 | default: | |
984 | break; | |
985 | } | |
986 | ||
987 | e_info(drv, "VF %d requested invalid api version %u\n", vf, api); | |
988 | ||
989 | return -1; | |
990 | } | |
991 | ||
f591cd9d AD |
992 | static int ixgbe_get_vf_queues(struct ixgbe_adapter *adapter, |
993 | u32 *msgbuf, u32 vf) | |
994 | { | |
995 | struct net_device *dev = adapter->netdev; | |
996 | struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ]; | |
997 | unsigned int default_tc = 0; | |
998 | u8 num_tcs = netdev_get_num_tc(dev); | |
999 | ||
1000 | /* verify the PF is supporting the correct APIs */ | |
1001 | switch (adapter->vfinfo[vf].vf_api) { | |
1002 | case ixgbe_mbox_api_20: | |
1003 | case ixgbe_mbox_api_11: | |
4ce37a4c | 1004 | case ixgbe_mbox_api_12: |
f591cd9d AD |
1005 | break; |
1006 | default: | |
1007 | return -1; | |
1008 | } | |
1009 | ||
1010 | /* only allow 1 Tx queue for bandwidth limiting */ | |
1011 | msgbuf[IXGBE_VF_TX_QUEUES] = __ALIGN_MASK(1, ~vmdq->mask); | |
1012 | msgbuf[IXGBE_VF_RX_QUEUES] = __ALIGN_MASK(1, ~vmdq->mask); | |
1013 | ||
1014 | /* if TCs > 1 determine which TC belongs to default user priority */ | |
1015 | if (num_tcs > 1) | |
1016 | default_tc = netdev_get_prio_tc_map(dev, adapter->default_up); | |
1017 | ||
1018 | /* notify VF of need for VLAN tag stripping, and correct queue */ | |
1019 | if (num_tcs) | |
1020 | msgbuf[IXGBE_VF_TRANS_VLAN] = num_tcs; | |
1021 | else if (adapter->vfinfo[vf].pf_vlan || adapter->vfinfo[vf].pf_qos) | |
1022 | msgbuf[IXGBE_VF_TRANS_VLAN] = 1; | |
1023 | else | |
1024 | msgbuf[IXGBE_VF_TRANS_VLAN] = 0; | |
1025 | ||
1026 | /* notify VF of default queue */ | |
1027 | msgbuf[IXGBE_VF_DEF_QUEUE] = default_tc; | |
1028 | ||
1029 | return 0; | |
1030 | } | |
1031 | ||
4ce37a4c VZ |
1032 | static int ixgbe_get_vf_reta(struct ixgbe_adapter *adapter, u32 *msgbuf, u32 vf) |
1033 | { | |
1034 | u32 i, j; | |
1035 | u32 *out_buf = &msgbuf[1]; | |
1036 | const u8 *reta = adapter->rss_indir_tbl; | |
1037 | u32 reta_size = ixgbe_rss_indir_tbl_entries(adapter); | |
1038 | ||
1039 | /* Check if operation is permitted */ | |
1040 | if (!adapter->vfinfo[vf].rss_query_enabled) | |
1041 | return -EPERM; | |
1042 | ||
1043 | /* verify the PF is supporting the correct API */ | |
1044 | if (adapter->vfinfo[vf].vf_api != ixgbe_mbox_api_12) | |
1045 | return -EOPNOTSUPP; | |
1046 | ||
1047 | /* This mailbox command is supported (required) only for 82599 and x540 | |
1048 | * VFs which support up to 4 RSS queues. Therefore we will compress the | |
1049 | * RETA by saving only 2 bits from each entry. This way we will be able | |
1050 | * to transfer the whole RETA in a single mailbox operation. | |
1051 | */ | |
1052 | for (i = 0; i < reta_size / 16; i++) { | |
1053 | out_buf[i] = 0; | |
1054 | for (j = 0; j < 16; j++) | |
1055 | out_buf[i] |= (u32)(reta[16 * i + j] & 0x3) << (2 * j); | |
1056 | } | |
1057 | ||
1058 | return 0; | |
1059 | } | |
1060 | ||
3c0841a9 VZ |
1061 | static int ixgbe_get_vf_rss_key(struct ixgbe_adapter *adapter, |
1062 | u32 *msgbuf, u32 vf) | |
1063 | { | |
1064 | u32 *rss_key = &msgbuf[1]; | |
1065 | ||
1066 | /* Check if the operation is permitted */ | |
1067 | if (!adapter->vfinfo[vf].rss_query_enabled) | |
1068 | return -EPERM; | |
1069 | ||
1070 | /* verify the PF is supporting the correct API */ | |
1071 | if (adapter->vfinfo[vf].vf_api != ixgbe_mbox_api_12) | |
1072 | return -EOPNOTSUPP; | |
1073 | ||
1074 | memcpy(rss_key, adapter->rss_key, sizeof(adapter->rss_key)); | |
1075 | ||
1076 | return 0; | |
1077 | } | |
1078 | ||
8443c1a4 HS |
1079 | static int ixgbe_update_vf_xcast_mode(struct ixgbe_adapter *adapter, |
1080 | u32 *msgbuf, u32 vf) | |
1081 | { | |
1082 | struct ixgbe_hw *hw = &adapter->hw; | |
1083 | int xcast_mode = msgbuf[1]; | |
1084 | u32 vmolr, disable, enable; | |
1085 | ||
1086 | /* verify the PF is supporting the correct APIs */ | |
1087 | switch (adapter->vfinfo[vf].vf_api) { | |
1088 | case ixgbe_mbox_api_12: | |
1089 | break; | |
1090 | default: | |
1091 | return -EOPNOTSUPP; | |
1092 | } | |
1093 | ||
1094 | if (xcast_mode > IXGBEVF_XCAST_MODE_MULTI && | |
1095 | !adapter->vfinfo[vf].trusted) { | |
1096 | xcast_mode = IXGBEVF_XCAST_MODE_MULTI; | |
1097 | } | |
1098 | ||
1099 | if (adapter->vfinfo[vf].xcast_mode == xcast_mode) | |
1100 | goto out; | |
1101 | ||
1102 | switch (xcast_mode) { | |
1103 | case IXGBEVF_XCAST_MODE_NONE: | |
1104 | disable = IXGBE_VMOLR_BAM | IXGBE_VMOLR_ROMPE | IXGBE_VMOLR_MPE; | |
1105 | enable = 0; | |
1106 | break; | |
1107 | case IXGBEVF_XCAST_MODE_MULTI: | |
1108 | disable = IXGBE_VMOLR_MPE; | |
1109 | enable = IXGBE_VMOLR_BAM | IXGBE_VMOLR_ROMPE; | |
1110 | break; | |
1111 | case IXGBEVF_XCAST_MODE_ALLMULTI: | |
1112 | disable = 0; | |
1113 | enable = IXGBE_VMOLR_BAM | IXGBE_VMOLR_ROMPE | IXGBE_VMOLR_MPE; | |
1114 | break; | |
1115 | default: | |
1116 | return -EOPNOTSUPP; | |
1117 | } | |
1118 | ||
1119 | vmolr = IXGBE_READ_REG(hw, IXGBE_VMOLR(vf)); | |
1120 | vmolr &= ~disable; | |
1121 | vmolr |= enable; | |
1122 | IXGBE_WRITE_REG(hw, IXGBE_VMOLR(vf), vmolr); | |
1123 | ||
1124 | adapter->vfinfo[vf].xcast_mode = xcast_mode; | |
1125 | ||
1126 | out: | |
1127 | msgbuf[1] = xcast_mode; | |
1128 | ||
1129 | return 0; | |
1130 | } | |
1131 | ||
17367270 GR |
1132 | static int ixgbe_rcv_msg_from_vf(struct ixgbe_adapter *adapter, u32 vf) |
1133 | { | |
1134 | u32 mbx_size = IXGBE_VFMAILBOX_SIZE; | |
c050999e | 1135 | u32 msgbuf[IXGBE_VFMAILBOX_SIZE]; |
17367270 GR |
1136 | struct ixgbe_hw *hw = &adapter->hw; |
1137 | s32 retval; | |
17367270 GR |
1138 | |
1139 | retval = ixgbe_read_mbx(hw, msgbuf, mbx_size, vf); | |
1140 | ||
dcaccc82 | 1141 | if (retval) { |
849c4542 | 1142 | pr_err("Error receiving message from VF\n"); |
dcaccc82 AD |
1143 | return retval; |
1144 | } | |
17367270 GR |
1145 | |
1146 | /* this is a message we already processed, do nothing */ | |
1147 | if (msgbuf[0] & (IXGBE_VT_MSGTYPE_ACK | IXGBE_VT_MSGTYPE_NACK)) | |
e90dd264 | 1148 | return 0; |
17367270 | 1149 | |
dcaccc82 AD |
1150 | /* flush the ack before we write any messages back */ |
1151 | IXGBE_WRITE_FLUSH(hw); | |
1152 | ||
374c65d6 AD |
1153 | if (msgbuf[0] == IXGBE_VF_RESET) |
1154 | return ixgbe_vf_reset_msg(adapter, vf); | |
1155 | ||
17367270 GR |
1156 | /* |
1157 | * until the vf completes a virtual function reset it should not be | |
1158 | * allowed to start any configuration. | |
1159 | */ | |
17367270 GR |
1160 | if (!adapter->vfinfo[vf].clear_to_send) { |
1161 | msgbuf[0] |= IXGBE_VT_MSGTYPE_NACK; | |
1162 | ixgbe_write_mbx(hw, msgbuf, 1, vf); | |
e90dd264 | 1163 | return 0; |
17367270 GR |
1164 | } |
1165 | ||
1166 | switch ((msgbuf[0] & 0xFFFF)) { | |
1167 | case IXGBE_VF_SET_MAC_ADDR: | |
58a02bee | 1168 | retval = ixgbe_set_vf_mac_addr(adapter, msgbuf, vf); |
17367270 GR |
1169 | break; |
1170 | case IXGBE_VF_SET_MULTICAST: | |
58a02bee AD |
1171 | retval = ixgbe_set_vf_multicasts(adapter, msgbuf, vf); |
1172 | break; | |
1173 | case IXGBE_VF_SET_VLAN: | |
1174 | retval = ixgbe_set_vf_vlan_msg(adapter, msgbuf, vf); | |
17367270 GR |
1175 | break; |
1176 | case IXGBE_VF_SET_LPE: | |
872844dd | 1177 | retval = ixgbe_set_vf_lpe(adapter, msgbuf, vf); |
17367270 | 1178 | break; |
a1cbb15c | 1179 | case IXGBE_VF_SET_MACVLAN: |
58a02bee | 1180 | retval = ixgbe_set_vf_macvlan_msg(adapter, msgbuf, vf); |
a1cbb15c | 1181 | break; |
374c65d6 AD |
1182 | case IXGBE_VF_API_NEGOTIATE: |
1183 | retval = ixgbe_negotiate_vf_api(adapter, msgbuf, vf); | |
1184 | break; | |
f591cd9d AD |
1185 | case IXGBE_VF_GET_QUEUES: |
1186 | retval = ixgbe_get_vf_queues(adapter, msgbuf, vf); | |
1187 | break; | |
4ce37a4c VZ |
1188 | case IXGBE_VF_GET_RETA: |
1189 | retval = ixgbe_get_vf_reta(adapter, msgbuf, vf); | |
1190 | break; | |
3c0841a9 VZ |
1191 | case IXGBE_VF_GET_RSS_KEY: |
1192 | retval = ixgbe_get_vf_rss_key(adapter, msgbuf, vf); | |
1193 | break; | |
8443c1a4 HS |
1194 | case IXGBE_VF_UPDATE_XCAST_MODE: |
1195 | retval = ixgbe_update_vf_xcast_mode(adapter, msgbuf, vf); | |
1196 | break; | |
17367270 | 1197 | default: |
396e799c | 1198 | e_err(drv, "Unhandled Msg %8.8x\n", msgbuf[0]); |
17367270 GR |
1199 | retval = IXGBE_ERR_MBX; |
1200 | break; | |
1201 | } | |
1202 | ||
1203 | /* notify the VF of the results of what it sent us */ | |
1204 | if (retval) | |
1205 | msgbuf[0] |= IXGBE_VT_MSGTYPE_NACK; | |
1206 | else | |
1207 | msgbuf[0] |= IXGBE_VT_MSGTYPE_ACK; | |
1208 | ||
1209 | msgbuf[0] |= IXGBE_VT_MSGTYPE_CTS; | |
1210 | ||
374c65d6 | 1211 | ixgbe_write_mbx(hw, msgbuf, mbx_size, vf); |
17367270 GR |
1212 | |
1213 | return retval; | |
1214 | } | |
1215 | ||
1216 | static void ixgbe_rcv_ack_from_vf(struct ixgbe_adapter *adapter, u32 vf) | |
1217 | { | |
1218 | struct ixgbe_hw *hw = &adapter->hw; | |
1219 | u32 msg = IXGBE_VT_MSGTYPE_NACK; | |
1220 | ||
1221 | /* if device isn't clear to send it shouldn't be reading either */ | |
1222 | if (!adapter->vfinfo[vf].clear_to_send) | |
1223 | ixgbe_write_mbx(hw, &msg, 1, vf); | |
1224 | } | |
1225 | ||
1226 | void ixgbe_msg_task(struct ixgbe_adapter *adapter) | |
1227 | { | |
1228 | struct ixgbe_hw *hw = &adapter->hw; | |
1229 | u32 vf; | |
1230 | ||
1231 | for (vf = 0; vf < adapter->num_vfs; vf++) { | |
1232 | /* process any reset requests */ | |
1233 | if (!ixgbe_check_for_rst(hw, vf)) | |
1234 | ixgbe_vf_reset_event(adapter, vf); | |
1235 | ||
1236 | /* process any messages pending */ | |
1237 | if (!ixgbe_check_for_msg(hw, vf)) | |
1238 | ixgbe_rcv_msg_from_vf(adapter, vf); | |
1239 | ||
1240 | /* process any acks */ | |
1241 | if (!ixgbe_check_for_ack(hw, vf)) | |
1242 | ixgbe_rcv_ack_from_vf(adapter, vf); | |
1243 | } | |
1244 | } | |
1245 | ||
767081ad GR |
1246 | void ixgbe_disable_tx_rx(struct ixgbe_adapter *adapter) |
1247 | { | |
1248 | struct ixgbe_hw *hw = &adapter->hw; | |
1249 | ||
1250 | /* disable transmit and receive for all vfs */ | |
1251 | IXGBE_WRITE_REG(hw, IXGBE_VFTE(0), 0); | |
1252 | IXGBE_WRITE_REG(hw, IXGBE_VFTE(1), 0); | |
1253 | ||
1254 | IXGBE_WRITE_REG(hw, IXGBE_VFRE(0), 0); | |
1255 | IXGBE_WRITE_REG(hw, IXGBE_VFRE(1), 0); | |
1256 | } | |
1257 | ||
54011e4d HS |
1258 | static inline void ixgbe_ping_vf(struct ixgbe_adapter *adapter, int vf) |
1259 | { | |
1260 | struct ixgbe_hw *hw = &adapter->hw; | |
1261 | u32 ping; | |
1262 | ||
1263 | ping = IXGBE_PF_CONTROL_MSG; | |
1264 | if (adapter->vfinfo[vf].clear_to_send) | |
1265 | ping |= IXGBE_VT_MSGTYPE_CTS; | |
1266 | ixgbe_write_mbx(hw, &ping, 1, vf); | |
1267 | } | |
1268 | ||
767081ad GR |
1269 | void ixgbe_ping_all_vfs(struct ixgbe_adapter *adapter) |
1270 | { | |
1271 | struct ixgbe_hw *hw = &adapter->hw; | |
1272 | u32 ping; | |
1273 | int i; | |
1274 | ||
1275 | for (i = 0 ; i < adapter->num_vfs; i++) { | |
1276 | ping = IXGBE_PF_CONTROL_MSG; | |
1277 | if (adapter->vfinfo[i].clear_to_send) | |
1278 | ping |= IXGBE_VT_MSGTYPE_CTS; | |
1279 | ixgbe_write_mbx(hw, &ping, 1, i); | |
1280 | } | |
1281 | } | |
1282 | ||
7f01648a GR |
1283 | int ixgbe_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac) |
1284 | { | |
1285 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
1286 | if (!is_valid_ether_addr(mac) || (vf >= adapter->num_vfs)) | |
1287 | return -EINVAL; | |
1288 | adapter->vfinfo[vf].pf_set_mac = true; | |
1289 | dev_info(&adapter->pdev->dev, "setting MAC %pM on VF %d\n", mac, vf); | |
1290 | dev_info(&adapter->pdev->dev, "Reload the VF driver to make this" | |
1291 | " change effective."); | |
1292 | if (test_bit(__IXGBE_DOWN, &adapter->state)) { | |
1293 | dev_warn(&adapter->pdev->dev, "The VF MAC address has been set," | |
1294 | " but the PF device is not up.\n"); | |
1295 | dev_warn(&adapter->pdev->dev, "Bring the PF device up before" | |
1296 | " attempting to use the VF device.\n"); | |
1297 | } | |
1298 | return ixgbe_set_vf_mac(adapter, vf, mac); | |
1299 | } | |
1300 | ||
2b509c0c DS |
1301 | static int ixgbe_enable_port_vlan(struct ixgbe_adapter *adapter, int vf, |
1302 | u16 vlan, u8 qos) | |
1303 | { | |
1304 | struct ixgbe_hw *hw = &adapter->hw; | |
42ce2c8e | 1305 | int err; |
2b509c0c | 1306 | |
42ce2c8e | 1307 | err = ixgbe_set_vf_vlan(adapter, true, vlan, vf); |
2b509c0c DS |
1308 | if (err) |
1309 | goto out; | |
42ce2c8e | 1310 | |
4c7f35f6 AD |
1311 | /* Revoke tagless access via VLAN 0 */ |
1312 | ixgbe_set_vf_vlan(adapter, false, 0, vf); | |
1313 | ||
2b509c0c DS |
1314 | ixgbe_set_vmvir(adapter, vlan, qos, vf); |
1315 | ixgbe_set_vmolr(hw, vf, false); | |
9a75a1ac DS |
1316 | |
1317 | /* enable hide vlan on X550 */ | |
1318 | if (hw->mac.type >= ixgbe_mac_X550) | |
1319 | ixgbe_write_qde(adapter, vf, IXGBE_QDE_ENABLE | | |
1320 | IXGBE_QDE_HIDE_VLAN); | |
1321 | ||
2b509c0c DS |
1322 | adapter->vfinfo[vf].pf_vlan = vlan; |
1323 | adapter->vfinfo[vf].pf_qos = qos; | |
1324 | dev_info(&adapter->pdev->dev, | |
1325 | "Setting VLAN %d, QOS 0x%x on VF %d\n", vlan, qos, vf); | |
1326 | if (test_bit(__IXGBE_DOWN, &adapter->state)) { | |
1327 | dev_warn(&adapter->pdev->dev, | |
1328 | "The VF VLAN has been set, but the PF device is not up.\n"); | |
1329 | dev_warn(&adapter->pdev->dev, | |
1330 | "Bring the PF device up before attempting to use the VF device.\n"); | |
1331 | } | |
1332 | ||
1333 | out: | |
1334 | return err; | |
1335 | } | |
1336 | ||
1337 | static int ixgbe_disable_port_vlan(struct ixgbe_adapter *adapter, int vf) | |
1338 | { | |
1339 | struct ixgbe_hw *hw = &adapter->hw; | |
1340 | int err; | |
1341 | ||
1342 | err = ixgbe_set_vf_vlan(adapter, false, | |
1343 | adapter->vfinfo[vf].pf_vlan, vf); | |
4c7f35f6 AD |
1344 | /* Restore tagless access via VLAN 0 */ |
1345 | ixgbe_set_vf_vlan(adapter, true, 0, vf); | |
2b509c0c DS |
1346 | ixgbe_clear_vmvir(adapter, vf); |
1347 | ixgbe_set_vmolr(hw, vf, true); | |
42ce2c8e ET |
1348 | |
1349 | /* disable hide VLAN on X550 */ | |
1350 | if (hw->mac.type >= ixgbe_mac_X550) | |
1351 | ixgbe_write_qde(adapter, vf, IXGBE_QDE_ENABLE); | |
1352 | ||
2b509c0c DS |
1353 | adapter->vfinfo[vf].pf_vlan = 0; |
1354 | adapter->vfinfo[vf].pf_qos = 0; | |
1355 | ||
1356 | return err; | |
1357 | } | |
1358 | ||
79aab093 MS |
1359 | int ixgbe_ndo_set_vf_vlan(struct net_device *netdev, int vf, u16 vlan, |
1360 | u8 qos, __be16 vlan_proto) | |
7f01648a GR |
1361 | { |
1362 | int err = 0; | |
1363 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
1364 | ||
1365 | if ((vf >= adapter->num_vfs) || (vlan > 4095) || (qos > 7)) | |
1366 | return -EINVAL; | |
79aab093 MS |
1367 | if (vlan_proto != htons(ETH_P_8021Q)) |
1368 | return -EPROTONOSUPPORT; | |
7f01648a | 1369 | if (vlan || qos) { |
2b509c0c DS |
1370 | /* Check if there is already a port VLAN set, if so |
1371 | * we have to delete the old one first before we | |
1372 | * can set the new one. The usage model had | |
1373 | * previously assumed the user would delete the | |
1374 | * old port VLAN before setting a new one but this | |
1375 | * is not necessarily the case. | |
1376 | */ | |
026ac677 | 1377 | if (adapter->vfinfo[vf].pf_vlan) |
2b509c0c | 1378 | err = ixgbe_disable_port_vlan(adapter, vf); |
026ac677 GR |
1379 | if (err) |
1380 | goto out; | |
2b509c0c | 1381 | err = ixgbe_enable_port_vlan(adapter, vf, vlan, qos); |
7f01648a | 1382 | } else { |
2b509c0c | 1383 | err = ixgbe_disable_port_vlan(adapter, vf); |
e7cf745b | 1384 | } |
2b509c0c | 1385 | |
7f01648a | 1386 | out: |
e7cf745b | 1387 | return err; |
7f01648a GR |
1388 | } |
1389 | ||
c04f90e5 | 1390 | int ixgbe_link_mbps(struct ixgbe_adapter *adapter) |
ff4ab206 | 1391 | { |
9f66d3ee | 1392 | switch (adapter->link_speed) { |
ff4ab206 LL |
1393 | case IXGBE_LINK_SPEED_100_FULL: |
1394 | return 100; | |
1395 | case IXGBE_LINK_SPEED_1GB_FULL: | |
1396 | return 1000; | |
1397 | case IXGBE_LINK_SPEED_10GB_FULL: | |
1398 | return 10000; | |
1399 | default: | |
1400 | return 0; | |
1401 | } | |
1402 | } | |
1403 | ||
9f66d3ee | 1404 | static void ixgbe_set_vf_rate_limit(struct ixgbe_adapter *adapter, int vf) |
ff4ab206 | 1405 | { |
9f66d3ee AD |
1406 | struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ]; |
1407 | struct ixgbe_hw *hw = &adapter->hw; | |
1408 | u32 bcnrc_val = 0; | |
1409 | u16 queue, queues_per_pool; | |
1410 | u16 tx_rate = adapter->vfinfo[vf].tx_rate; | |
1411 | ||
1412 | if (tx_rate) { | |
1413 | /* start with base link speed value */ | |
1414 | bcnrc_val = adapter->vf_rate_link_speed; | |
ff4ab206 | 1415 | |
ff4ab206 | 1416 | /* Calculate the rate factor values to set */ |
9f66d3ee AD |
1417 | bcnrc_val <<= IXGBE_RTTBCNRC_RF_INT_SHIFT; |
1418 | bcnrc_val /= tx_rate; | |
1419 | ||
1420 | /* clear everything but the rate factor */ | |
1421 | bcnrc_val &= IXGBE_RTTBCNRC_RF_INT_MASK | | |
1422 | IXGBE_RTTBCNRC_RF_DEC_MASK; | |
1423 | ||
1424 | /* enable the rate scheduler */ | |
1425 | bcnrc_val |= IXGBE_RTTBCNRC_RS_ENA; | |
ff4ab206 LL |
1426 | } |
1427 | ||
7555e83d LL |
1428 | /* |
1429 | * Set global transmit compensation time to the MMW_SIZE in RTTBCNRM | |
1430 | * register. Typically MMW_SIZE=0x014 if 9728-byte jumbo is supported | |
1431 | * and 0x004 otherwise. | |
1432 | */ | |
1433 | switch (hw->mac.type) { | |
1434 | case ixgbe_mac_82599EB: | |
1435 | IXGBE_WRITE_REG(hw, IXGBE_RTTBCNRM, 0x4); | |
1436 | break; | |
1437 | case ixgbe_mac_X540: | |
1438 | IXGBE_WRITE_REG(hw, IXGBE_RTTBCNRM, 0x14); | |
1439 | break; | |
1440 | default: | |
1441 | break; | |
1442 | } | |
1443 | ||
9f66d3ee AD |
1444 | /* determine how many queues per pool based on VMDq mask */ |
1445 | queues_per_pool = __ALIGN_MASK(1, ~vmdq->mask); | |
1446 | ||
1447 | /* write value for all Tx queues belonging to VF */ | |
1448 | for (queue = 0; queue < queues_per_pool; queue++) { | |
1449 | unsigned int reg_idx = (vf * queues_per_pool) + queue; | |
1450 | ||
1451 | IXGBE_WRITE_REG(hw, IXGBE_RTTDQSEL, reg_idx); | |
1452 | IXGBE_WRITE_REG(hw, IXGBE_RTTBCNRC, bcnrc_val); | |
1453 | } | |
ff4ab206 LL |
1454 | } |
1455 | ||
1456 | void ixgbe_check_vf_rate_limit(struct ixgbe_adapter *adapter) | |
1457 | { | |
9f66d3ee | 1458 | int i; |
ff4ab206 LL |
1459 | |
1460 | /* VF Tx rate limit was not set */ | |
9f66d3ee | 1461 | if (!adapter->vf_rate_link_speed) |
ff4ab206 LL |
1462 | return; |
1463 | ||
9f66d3ee | 1464 | if (ixgbe_link_mbps(adapter) != adapter->vf_rate_link_speed) { |
ff4ab206 LL |
1465 | adapter->vf_rate_link_speed = 0; |
1466 | dev_info(&adapter->pdev->dev, | |
9f66d3ee | 1467 | "Link speed has been changed. VF Transmit rate is disabled\n"); |
ff4ab206 LL |
1468 | } |
1469 | ||
1470 | for (i = 0; i < adapter->num_vfs; i++) { | |
9f66d3ee | 1471 | if (!adapter->vf_rate_link_speed) |
ff4ab206 LL |
1472 | adapter->vfinfo[i].tx_rate = 0; |
1473 | ||
9f66d3ee | 1474 | ixgbe_set_vf_rate_limit(adapter, i); |
ff4ab206 LL |
1475 | } |
1476 | } | |
1477 | ||
ed616689 SC |
1478 | int ixgbe_ndo_set_vf_bw(struct net_device *netdev, int vf, int min_tx_rate, |
1479 | int max_tx_rate) | |
7f01648a | 1480 | { |
ff4ab206 | 1481 | struct ixgbe_adapter *adapter = netdev_priv(netdev); |
9f66d3ee AD |
1482 | int link_speed; |
1483 | ||
1484 | /* verify VF is active */ | |
1485 | if (vf >= adapter->num_vfs) | |
1486 | return -EINVAL; | |
1487 | ||
1488 | /* verify link is up */ | |
1489 | if (!adapter->link_up) | |
1490 | return -EINVAL; | |
1491 | ||
1492 | /* verify we are linked at 10Gbps */ | |
1493 | link_speed = ixgbe_link_mbps(adapter); | |
1494 | if (link_speed != 10000) | |
1495 | return -EINVAL; | |
ff4ab206 | 1496 | |
ed616689 SC |
1497 | if (min_tx_rate) |
1498 | return -EINVAL; | |
1499 | ||
9f66d3ee | 1500 | /* rate limit cannot be less than 10Mbs or greater than link speed */ |
ed616689 | 1501 | if (max_tx_rate && ((max_tx_rate <= 10) || (max_tx_rate > link_speed))) |
ff4ab206 LL |
1502 | return -EINVAL; |
1503 | ||
9f66d3ee AD |
1504 | /* store values */ |
1505 | adapter->vf_rate_link_speed = link_speed; | |
ed616689 | 1506 | adapter->vfinfo[vf].tx_rate = max_tx_rate; |
9f66d3ee AD |
1507 | |
1508 | /* update hardware configuration */ | |
1509 | ixgbe_set_vf_rate_limit(adapter, vf); | |
ff4ab206 LL |
1510 | |
1511 | return 0; | |
7f01648a GR |
1512 | } |
1513 | ||
de4c7f65 GR |
1514 | int ixgbe_ndo_set_vf_spoofchk(struct net_device *netdev, int vf, bool setting) |
1515 | { | |
1516 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
de4c7f65 | 1517 | struct ixgbe_hw *hw = &adapter->hw; |
de4c7f65 | 1518 | |
600a507d ET |
1519 | if (vf >= adapter->num_vfs) |
1520 | return -EINVAL; | |
1521 | ||
de4c7f65 GR |
1522 | adapter->vfinfo[vf].spoofchk_enabled = setting; |
1523 | ||
77f192af ET |
1524 | /* configure MAC spoofing */ |
1525 | hw->mac.ops.set_mac_anti_spoofing(hw, setting, vf); | |
1526 | ||
1527 | /* configure VLAN spoofing */ | |
d3dec7c7 | 1528 | hw->mac.ops.set_vlan_anti_spoofing(hw, setting, vf); |
77f192af ET |
1529 | |
1530 | /* Ensure LLDP and FC is set for Ethertype Antispoofing if we will be | |
1531 | * calling set_ethertype_anti_spoofing for each VF in loop below | |
1532 | */ | |
1533 | if (hw->mac.ops.set_ethertype_anti_spoofing) { | |
1534 | IXGBE_WRITE_REG(hw, IXGBE_ETQF(IXGBE_ETQF_FILTER_LLDP), | |
1535 | (IXGBE_ETQF_FILTER_EN | | |
1536 | IXGBE_ETQF_TX_ANTISPOOF | | |
1537 | IXGBE_ETH_P_LLDP)); | |
1538 | ||
1539 | IXGBE_WRITE_REG(hw, IXGBE_ETQF(IXGBE_ETQF_FILTER_FC), | |
1540 | (IXGBE_ETQF_FILTER_EN | | |
1541 | IXGBE_ETQF_TX_ANTISPOOF | | |
1542 | ETH_P_PAUSE)); | |
1543 | ||
1544 | hw->mac.ops.set_ethertype_anti_spoofing(hw, setting, vf); | |
de4c7f65 GR |
1545 | } |
1546 | ||
1547 | return 0; | |
1548 | } | |
1549 | ||
e65ce0d3 VZ |
1550 | int ixgbe_ndo_set_vf_rss_query_en(struct net_device *netdev, int vf, |
1551 | bool setting) | |
1552 | { | |
1553 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
1554 | ||
1555 | /* This operation is currently supported only for 82599 and x540 | |
1556 | * devices. | |
1557 | */ | |
1558 | if (adapter->hw.mac.type < ixgbe_mac_82599EB || | |
1559 | adapter->hw.mac.type >= ixgbe_mac_X550) | |
1560 | return -EOPNOTSUPP; | |
1561 | ||
1562 | if (vf >= adapter->num_vfs) | |
1563 | return -EINVAL; | |
1564 | ||
1565 | adapter->vfinfo[vf].rss_query_enabled = setting; | |
1566 | ||
1567 | return 0; | |
1568 | } | |
1569 | ||
54011e4d HS |
1570 | int ixgbe_ndo_set_vf_trust(struct net_device *netdev, int vf, bool setting) |
1571 | { | |
1572 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
1573 | ||
1574 | if (vf >= adapter->num_vfs) | |
1575 | return -EINVAL; | |
1576 | ||
1577 | /* nothing to do */ | |
1578 | if (adapter->vfinfo[vf].trusted == setting) | |
1579 | return 0; | |
1580 | ||
1581 | adapter->vfinfo[vf].trusted = setting; | |
1582 | ||
1583 | /* reset VF to reconfigure features */ | |
1584 | adapter->vfinfo[vf].clear_to_send = false; | |
1585 | ixgbe_ping_vf(adapter, vf); | |
1586 | ||
1587 | e_info(drv, "VF %u is %strusted\n", vf, setting ? "" : "not "); | |
1588 | ||
1589 | return 0; | |
1590 | } | |
1591 | ||
7f01648a GR |
1592 | int ixgbe_ndo_get_vf_config(struct net_device *netdev, |
1593 | int vf, struct ifla_vf_info *ivi) | |
1594 | { | |
1595 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
1596 | if (vf >= adapter->num_vfs) | |
1597 | return -EINVAL; | |
1598 | ivi->vf = vf; | |
1599 | memcpy(&ivi->mac, adapter->vfinfo[vf].vf_mac_addresses, ETH_ALEN); | |
ed616689 SC |
1600 | ivi->max_tx_rate = adapter->vfinfo[vf].tx_rate; |
1601 | ivi->min_tx_rate = 0; | |
7f01648a GR |
1602 | ivi->vlan = adapter->vfinfo[vf].pf_vlan; |
1603 | ivi->qos = adapter->vfinfo[vf].pf_qos; | |
de4c7f65 | 1604 | ivi->spoofchk = adapter->vfinfo[vf].spoofchk_enabled; |
e65ce0d3 | 1605 | ivi->rss_query_en = adapter->vfinfo[vf].rss_query_enabled; |
54011e4d | 1606 | ivi->trusted = adapter->vfinfo[vf].trusted; |
7f01648a GR |
1607 | return 0; |
1608 | } |