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17367270 GR |
1 | /******************************************************************************* |
2 | ||
3 | Intel 10 Gigabit PCI Express Linux driver | |
e90dd264 | 4 | Copyright(c) 1999 - 2014 Intel Corporation. |
17367270 GR |
5 | |
6 | This program is free software; you can redistribute it and/or modify it | |
7 | under the terms and conditions of the GNU General Public License, | |
8 | version 2, as published by the Free Software Foundation. | |
9 | ||
10 | This program is distributed in the hope it will be useful, but WITHOUT | |
11 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
12 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
13 | more details. | |
14 | ||
15 | You should have received a copy of the GNU General Public License along with | |
16 | this program; if not, write to the Free Software Foundation, Inc., | |
17 | 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. | |
18 | ||
19 | The full GNU General Public License is included in this distribution in | |
20 | the file called "COPYING". | |
21 | ||
22 | Contact Information: | |
b89aae71 | 23 | Linux NICS <linux.nics@intel.com> |
17367270 GR |
24 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> |
25 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
26 | ||
27 | *******************************************************************************/ | |
28 | ||
17367270 GR |
29 | #include <linux/types.h> |
30 | #include <linux/module.h> | |
31 | #include <linux/pci.h> | |
32 | #include <linux/netdevice.h> | |
33 | #include <linux/vmalloc.h> | |
34 | #include <linux/string.h> | |
35 | #include <linux/in.h> | |
36 | #include <linux/ip.h> | |
37 | #include <linux/tcp.h> | |
38 | #include <linux/ipv6.h> | |
aa2bacb6 | 39 | #include <linux/if_bridge.h> |
f646968f | 40 | #ifdef NETIF_F_HW_VLAN_CTAG_TX |
17367270 GR |
41 | #include <linux/if_vlan.h> |
42 | #endif | |
43 | ||
44 | #include "ixgbe.h" | |
c6bda30a | 45 | #include "ixgbe_type.h" |
17367270 GR |
46 | #include "ixgbe_sriov.h" |
47 | ||
c6bda30a | 48 | #ifdef CONFIG_PCI_IOV |
66dcfd75 | 49 | static int __ixgbe_enable_sriov(struct ixgbe_adapter *adapter) |
c6bda30a GR |
50 | { |
51 | struct ixgbe_hw *hw = &adapter->hw; | |
c6bda30a GR |
52 | int num_vf_macvlans, i; |
53 | struct vf_macvlans *mv_list; | |
c6bda30a | 54 | |
73079ea0 | 55 | adapter->flags |= IXGBE_FLAG_SRIOV_ENABLED; |
c6bda30a GR |
56 | e_info(probe, "SR-IOV enabled with %d VFs\n", adapter->num_vfs); |
57 | ||
73079ea0 AD |
58 | /* Enable VMDq flag so device will be set in VM mode */ |
59 | adapter->flags |= IXGBE_FLAG_VMDQ_ENABLED; | |
60 | if (!adapter->ring_feature[RING_F_VMDQ].limit) | |
61 | adapter->ring_feature[RING_F_VMDQ].limit = 1; | |
62 | adapter->ring_feature[RING_F_VMDQ].offset = adapter->num_vfs; | |
63 | ||
c6bda30a GR |
64 | num_vf_macvlans = hw->mac.num_rar_entries - |
65 | (IXGBE_MAX_PF_MACVLANS + 1 + adapter->num_vfs); | |
66 | ||
67 | adapter->mv_list = mv_list = kcalloc(num_vf_macvlans, | |
68 | sizeof(struct vf_macvlans), | |
69 | GFP_KERNEL); | |
70 | if (mv_list) { | |
71 | /* Initialize list of VF macvlans */ | |
72 | INIT_LIST_HEAD(&adapter->vf_mvs.l); | |
73 | for (i = 0; i < num_vf_macvlans; i++) { | |
74 | mv_list->vf = -1; | |
75 | mv_list->free = true; | |
c6bda30a GR |
76 | list_add(&mv_list->l, &adapter->vf_mvs.l); |
77 | mv_list++; | |
78 | } | |
79 | } | |
80 | ||
815cccbf JF |
81 | /* Initialize default switching mode VEB */ |
82 | IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN); | |
aa2bacb6 | 83 | adapter->bridge_mode = BRIDGE_MODE_VEB; |
815cccbf | 84 | |
c6bda30a GR |
85 | /* If call to enable VFs succeeded then allocate memory |
86 | * for per VF control structures. | |
87 | */ | |
88 | adapter->vfinfo = | |
89 | kcalloc(adapter->num_vfs, | |
90 | sizeof(struct vf_data_storage), GFP_KERNEL); | |
91 | if (adapter->vfinfo) { | |
73079ea0 AD |
92 | /* limit trafffic classes based on VFs enabled */ |
93 | if ((adapter->hw.mac.type == ixgbe_mac_82599EB) && | |
94 | (adapter->num_vfs < 16)) { | |
95 | adapter->dcb_cfg.num_tcs.pg_tcs = MAX_TRAFFIC_CLASS; | |
96 | adapter->dcb_cfg.num_tcs.pfc_tcs = MAX_TRAFFIC_CLASS; | |
97 | } else if (adapter->num_vfs < 32) { | |
98 | adapter->dcb_cfg.num_tcs.pg_tcs = 4; | |
99 | adapter->dcb_cfg.num_tcs.pfc_tcs = 4; | |
100 | } else { | |
101 | adapter->dcb_cfg.num_tcs.pg_tcs = 1; | |
102 | adapter->dcb_cfg.num_tcs.pfc_tcs = 1; | |
103 | } | |
104 | ||
c6bda30a GR |
105 | /* Disable RSC when in SR-IOV mode */ |
106 | adapter->flags2 &= ~(IXGBE_FLAG2_RSC_CAPABLE | | |
107 | IXGBE_FLAG2_RSC_ENABLED); | |
73079ea0 | 108 | |
e65ce0d3 VZ |
109 | for (i = 0; i < adapter->num_vfs; i++) { |
110 | /* enable spoof checking for all VFs */ | |
de4c7f65 | 111 | adapter->vfinfo[i].spoofchk_enabled = true; |
e65ce0d3 VZ |
112 | |
113 | /* We support VF RSS querying only for 82599 and x540 | |
114 | * devices at the moment. These devices share RSS | |
115 | * indirection table and RSS hash key with PF therefore | |
116 | * we want to disable the querying by default. | |
117 | */ | |
118 | adapter->vfinfo[i].rss_query_enabled = 0; | |
119 | } | |
120 | ||
66dcfd75 GR |
121 | return 0; |
122 | } | |
123 | ||
124 | return -ENOMEM; | |
125 | } | |
126 | ||
127 | /* Note this function is called when the user wants to enable SR-IOV | |
128 | * VFs using the now deprecated module parameter | |
129 | */ | |
130 | void ixgbe_enable_sriov(struct ixgbe_adapter *adapter) | |
131 | { | |
132 | int pre_existing_vfs = 0; | |
133 | ||
134 | pre_existing_vfs = pci_num_vf(adapter->pdev); | |
135 | if (!pre_existing_vfs && !adapter->num_vfs) | |
c6bda30a | 136 | return; |
66dcfd75 | 137 | |
66dcfd75 GR |
138 | /* If there are pre-existing VFs then we have to force |
139 | * use of that many - over ride any module parameter value. | |
140 | * This may result from the user unloading the PF driver | |
141 | * while VFs were assigned to guest VMs or because the VFs | |
142 | * have been created via the new PCI SR-IOV sysfs interface. | |
143 | */ | |
144 | if (pre_existing_vfs) { | |
145 | adapter->num_vfs = pre_existing_vfs; | |
146 | dev_warn(&adapter->pdev->dev, | |
147 | "Virtual Functions already enabled for this device - Please reload all VF drivers to avoid spoofed packet errors\n"); | |
148 | } else { | |
149 | int err; | |
150 | /* | |
151 | * The 82599 supports up to 64 VFs per physical function | |
152 | * but this implementation limits allocation to 63 so that | |
153 | * basic networking resources are still available to the | |
dbedd44e | 154 | * physical function. If the user requests greater than |
66dcfd75 GR |
155 | * 63 VFs then it is an error - reset to default of zero. |
156 | */ | |
dcc23e3a | 157 | adapter->num_vfs = min_t(unsigned int, adapter->num_vfs, IXGBE_MAX_VFS_DRV_LIMIT); |
66dcfd75 GR |
158 | |
159 | err = pci_enable_sriov(adapter->pdev, adapter->num_vfs); | |
160 | if (err) { | |
161 | e_err(probe, "Failed to enable PCI sriov: %d\n", err); | |
162 | adapter->num_vfs = 0; | |
163 | return; | |
164 | } | |
c6bda30a GR |
165 | } |
166 | ||
66dcfd75 GR |
167 | if (!__ixgbe_enable_sriov(adapter)) |
168 | return; | |
169 | ||
170 | /* If we have gotten to this point then there is no memory available | |
171 | * to manage the VF devices - print message and bail. | |
172 | */ | |
c6bda30a GR |
173 | e_err(probe, "Unable to allocate memory for VF Data Storage - " |
174 | "SRIOV disabled\n"); | |
99d74487 | 175 | ixgbe_disable_sriov(adapter); |
c6bda30a | 176 | } |
c6bda30a | 177 | |
9297127b | 178 | #endif /* #ifdef CONFIG_PCI_IOV */ |
da36b647 | 179 | int ixgbe_disable_sriov(struct ixgbe_adapter *adapter) |
c6bda30a GR |
180 | { |
181 | struct ixgbe_hw *hw = &adapter->hw; | |
c6bda30a GR |
182 | u32 gpie; |
183 | u32 vmdctl; | |
da36b647 | 184 | int rss; |
c6bda30a | 185 | |
d773d131 AD |
186 | /* set num VFs to 0 to prevent access to vfinfo */ |
187 | adapter->num_vfs = 0; | |
188 | ||
189 | /* free VF control structures */ | |
190 | kfree(adapter->vfinfo); | |
191 | adapter->vfinfo = NULL; | |
192 | ||
193 | /* free macvlan list */ | |
194 | kfree(adapter->mv_list); | |
195 | adapter->mv_list = NULL; | |
196 | ||
99d74487 AD |
197 | /* if SR-IOV is already disabled then there is nothing to do */ |
198 | if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) | |
da36b647 | 199 | return 0; |
99d74487 | 200 | |
c6bda30a | 201 | #ifdef CONFIG_PCI_IOV |
9297127b AD |
202 | /* |
203 | * If our VFs are assigned we cannot shut down SR-IOV | |
204 | * without causing issues, so just leave the hardware | |
205 | * available but disabled | |
206 | */ | |
e507d0cd | 207 | if (pci_vfs_assigned(adapter->pdev)) { |
9297127b | 208 | e_dev_warn("Unloading driver while VFs are assigned - VFs will not be deallocated\n"); |
da36b647 | 209 | return -EPERM; |
d47e12d6 | 210 | } |
c6bda30a GR |
211 | /* disable iov and allow time for transactions to clear */ |
212 | pci_disable_sriov(adapter->pdev); | |
213 | #endif | |
214 | ||
215 | /* turn off device IOV mode */ | |
73079ea0 | 216 | IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, 0); |
c6bda30a GR |
217 | gpie = IXGBE_READ_REG(hw, IXGBE_GPIE); |
218 | gpie &= ~IXGBE_GPIE_VTMODE_MASK; | |
219 | IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie); | |
220 | ||
221 | /* set default pool back to 0 */ | |
222 | vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL); | |
223 | vmdctl &= ~IXGBE_VT_CTL_POOL_MASK; | |
224 | IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl); | |
225 | IXGBE_WRITE_FLUSH(hw); | |
226 | ||
1d9c0bfd | 227 | /* Disable VMDq flag so device will be set in VM mode */ |
2a47fa45 | 228 | if (adapter->ring_feature[RING_F_VMDQ].limit == 1) { |
1d9c0bfd | 229 | adapter->flags &= ~IXGBE_FLAG_VMDQ_ENABLED; |
2a47fa45 | 230 | adapter->flags &= ~IXGBE_FLAG_SRIOV_ENABLED; |
0f9b232b DS |
231 | rss = min_t(int, ixgbe_max_rss_indices(adapter), |
232 | num_online_cpus()); | |
2a47fa45 JF |
233 | } else { |
234 | rss = min_t(int, IXGBE_MAX_L2A_QUEUES, num_online_cpus()); | |
235 | } | |
1d9c0bfd | 236 | |
2a47fa45 | 237 | adapter->ring_feature[RING_F_VMDQ].offset = 0; |
da36b647 GR |
238 | adapter->ring_feature[RING_F_RSS].limit = rss; |
239 | ||
c6bda30a GR |
240 | /* take a breather then clean up driver data */ |
241 | msleep(100); | |
da36b647 GR |
242 | return 0; |
243 | } | |
244 | ||
245 | static int ixgbe_pci_sriov_enable(struct pci_dev *dev, int num_vfs) | |
246 | { | |
247 | #ifdef CONFIG_PCI_IOV | |
248 | struct ixgbe_adapter *adapter = pci_get_drvdata(dev); | |
249 | int err = 0; | |
250 | int i; | |
251 | int pre_existing_vfs = pci_num_vf(dev); | |
252 | ||
253 | if (pre_existing_vfs && pre_existing_vfs != num_vfs) | |
254 | err = ixgbe_disable_sriov(adapter); | |
255 | else if (pre_existing_vfs && pre_existing_vfs == num_vfs) | |
e90dd264 | 256 | return num_vfs; |
da36b647 GR |
257 | |
258 | if (err) | |
e90dd264 | 259 | return err; |
da36b647 | 260 | |
aac2f1bf JK |
261 | /* While the SR-IOV capability structure reports total VFs to be 64, |
262 | * we have to limit the actual number allocated based on two factors. | |
263 | * First, we reserve some transmit/receive resources for the PF. | |
264 | * Second, VMDQ also uses the same pools that SR-IOV does. We need to | |
265 | * account for this, so that we don't accidentally allocate more VFs | |
266 | * than we have available pools. The PCI bus driver already checks for | |
267 | * other values out of range. | |
da36b647 | 268 | */ |
aac2f1bf | 269 | if ((num_vfs + adapter->num_rx_pools) > IXGBE_MAX_VF_FUNCTIONS) |
e90dd264 | 270 | return -EPERM; |
da36b647 GR |
271 | |
272 | adapter->num_vfs = num_vfs; | |
273 | ||
274 | err = __ixgbe_enable_sriov(adapter); | |
275 | if (err) | |
e90dd264 | 276 | return err; |
da36b647 GR |
277 | |
278 | for (i = 0; i < adapter->num_vfs; i++) | |
279 | ixgbe_vf_configuration(dev, (i | 0x10000000)); | |
280 | ||
281 | err = pci_enable_sriov(dev, num_vfs); | |
282 | if (err) { | |
283 | e_dev_warn("Failed to enable PCI sriov: %d\n", err); | |
e90dd264 | 284 | return err; |
da36b647 GR |
285 | } |
286 | ixgbe_sriov_reinit(adapter); | |
287 | ||
da36b647 | 288 | return num_vfs; |
e90dd264 | 289 | #else |
da36b647 | 290 | return 0; |
e90dd264 | 291 | #endif |
da36b647 GR |
292 | } |
293 | ||
294 | static int ixgbe_pci_sriov_disable(struct pci_dev *dev) | |
295 | { | |
296 | struct ixgbe_adapter *adapter = pci_get_drvdata(dev); | |
297 | int err; | |
8f48f5bc | 298 | #ifdef CONFIG_PCI_IOV |
da36b647 | 299 | u32 current_flags = adapter->flags; |
8f48f5bc | 300 | #endif |
da36b647 GR |
301 | |
302 | err = ixgbe_disable_sriov(adapter); | |
303 | ||
304 | /* Only reinit if no error and state changed */ | |
da36b647 | 305 | #ifdef CONFIG_PCI_IOV |
2a47fa45 | 306 | if (!err && current_flags != adapter->flags) |
da36b647 GR |
307 | ixgbe_sriov_reinit(adapter); |
308 | #endif | |
da36b647 GR |
309 | |
310 | return err; | |
311 | } | |
312 | ||
313 | int ixgbe_pci_sriov_configure(struct pci_dev *dev, int num_vfs) | |
314 | { | |
315 | if (num_vfs == 0) | |
316 | return ixgbe_pci_sriov_disable(dev); | |
317 | else | |
318 | return ixgbe_pci_sriov_enable(dev, num_vfs); | |
c6bda30a GR |
319 | } |
320 | ||
5d5b7c39 | 321 | static int ixgbe_set_vf_multicasts(struct ixgbe_adapter *adapter, |
58a02bee | 322 | u32 *msgbuf, u32 vf) |
17367270 | 323 | { |
58a02bee AD |
324 | int entries = (msgbuf[0] & IXGBE_VT_MSGINFO_MASK) |
325 | >> IXGBE_VT_MSGINFO_SHIFT; | |
326 | u16 *hash_list = (u16 *)&msgbuf[1]; | |
17367270 | 327 | struct vf_data_storage *vfinfo = &adapter->vfinfo[vf]; |
8a07a22d | 328 | struct ixgbe_hw *hw = &adapter->hw; |
17367270 | 329 | int i; |
8a07a22d GR |
330 | u32 vector_bit; |
331 | u32 vector_reg; | |
332 | u32 mta_reg; | |
b335e75b | 333 | u32 vmolr = IXGBE_READ_REG(hw, IXGBE_VMOLR(vf)); |
17367270 GR |
334 | |
335 | /* only so many hash values supported */ | |
336 | entries = min(entries, IXGBE_MAX_VF_MC_ENTRIES); | |
337 | ||
338 | /* | |
339 | * salt away the number of multi cast addresses assigned | |
340 | * to this VF for later use to restore when the PF multi cast | |
341 | * list changes | |
342 | */ | |
343 | vfinfo->num_vf_mc_hashes = entries; | |
344 | ||
345 | /* | |
346 | * VFs are limited to using the MTA hash table for their multicast | |
347 | * addresses | |
348 | */ | |
349 | for (i = 0; i < entries; i++) { | |
e81a1ba8 | 350 | vfinfo->vf_mc_hashes[i] = hash_list[i]; |
17367270 GR |
351 | } |
352 | ||
8a07a22d GR |
353 | for (i = 0; i < vfinfo->num_vf_mc_hashes; i++) { |
354 | vector_reg = (vfinfo->vf_mc_hashes[i] >> 5) & 0x7F; | |
355 | vector_bit = vfinfo->vf_mc_hashes[i] & 0x1F; | |
356 | mta_reg = IXGBE_READ_REG(hw, IXGBE_MTA(vector_reg)); | |
357 | mta_reg |= (1 << vector_bit); | |
358 | IXGBE_WRITE_REG(hw, IXGBE_MTA(vector_reg), mta_reg); | |
359 | } | |
b335e75b JK |
360 | vmolr |= IXGBE_VMOLR_ROMPE; |
361 | IXGBE_WRITE_REG(hw, IXGBE_VMOLR(vf), vmolr); | |
17367270 GR |
362 | |
363 | return 0; | |
364 | } | |
365 | ||
b335e75b | 366 | #ifdef CONFIG_PCI_IOV |
17367270 GR |
367 | void ixgbe_restore_vf_multicasts(struct ixgbe_adapter *adapter) |
368 | { | |
369 | struct ixgbe_hw *hw = &adapter->hw; | |
370 | struct vf_data_storage *vfinfo; | |
371 | int i, j; | |
372 | u32 vector_bit; | |
373 | u32 vector_reg; | |
374 | u32 mta_reg; | |
375 | ||
376 | for (i = 0; i < adapter->num_vfs; i++) { | |
b335e75b | 377 | u32 vmolr = IXGBE_READ_REG(hw, IXGBE_VMOLR(i)); |
17367270 GR |
378 | vfinfo = &adapter->vfinfo[i]; |
379 | for (j = 0; j < vfinfo->num_vf_mc_hashes; j++) { | |
380 | hw->addr_ctrl.mta_in_use++; | |
381 | vector_reg = (vfinfo->vf_mc_hashes[j] >> 5) & 0x7F; | |
382 | vector_bit = vfinfo->vf_mc_hashes[j] & 0x1F; | |
383 | mta_reg = IXGBE_READ_REG(hw, IXGBE_MTA(vector_reg)); | |
384 | mta_reg |= (1 << vector_bit); | |
385 | IXGBE_WRITE_REG(hw, IXGBE_MTA(vector_reg), mta_reg); | |
386 | } | |
b335e75b JK |
387 | |
388 | if (vfinfo->num_vf_mc_hashes) | |
389 | vmolr |= IXGBE_VMOLR_ROMPE; | |
390 | else | |
391 | vmolr &= ~IXGBE_VMOLR_ROMPE; | |
392 | IXGBE_WRITE_REG(hw, IXGBE_VMOLR(i), vmolr); | |
17367270 | 393 | } |
a1cbb15c GR |
394 | |
395 | /* Restore any VF macvlans */ | |
5d7daa35 | 396 | ixgbe_full_sync_mac_table(adapter); |
17367270 | 397 | } |
b335e75b | 398 | #endif |
17367270 | 399 | |
5d5b7c39 ET |
400 | static int ixgbe_set_vf_vlan(struct ixgbe_adapter *adapter, int add, int vid, |
401 | u32 vf) | |
17367270 | 402 | { |
b35d4d42 AD |
403 | /* VLAN 0 is a special case, don't allow it to be removed */ |
404 | if (!vid && !add) | |
405 | return 0; | |
406 | ||
17367270 GR |
407 | return adapter->hw.mac.ops.set_vfta(&adapter->hw, vid, vf, (bool)add); |
408 | } | |
409 | ||
872844dd | 410 | static s32 ixgbe_set_vf_lpe(struct ixgbe_adapter *adapter, u32 *msgbuf, u32 vf) |
e9f98072 GR |
411 | { |
412 | struct ixgbe_hw *hw = &adapter->hw; | |
872844dd | 413 | int max_frame = msgbuf[1]; |
e9f98072 | 414 | u32 max_frs; |
e9f98072 | 415 | |
872844dd AD |
416 | /* |
417 | * For 82599EB we have to keep all PFs and VFs operating with | |
418 | * the same max_frame value in order to avoid sending an oversize | |
419 | * frame to a VF. In order to guarantee this is handled correctly | |
420 | * for all cases we have several special exceptions to take into | |
421 | * account before we can enable the VF for receive | |
422 | */ | |
423 | if (adapter->hw.mac.type == ixgbe_mac_82599EB) { | |
424 | struct net_device *dev = adapter->netdev; | |
425 | int pf_max_frame = dev->mtu + ETH_HLEN; | |
426 | u32 reg_offset, vf_shift, vfre; | |
427 | s32 err = 0; | |
428 | ||
429 | #ifdef CONFIG_FCOE | |
430 | if (dev->features & NETIF_F_FCOE_MTU) | |
431 | pf_max_frame = max_t(int, pf_max_frame, | |
432 | IXGBE_FCOE_JUMBO_FRAME_SIZE); | |
433 | ||
434 | #endif /* CONFIG_FCOE */ | |
bffb3bc9 AD |
435 | switch (adapter->vfinfo[vf].vf_api) { |
436 | case ixgbe_mbox_api_11: | |
4ce37a4c | 437 | case ixgbe_mbox_api_12: |
bffb3bc9 AD |
438 | /* |
439 | * Version 1.1 supports jumbo frames on VFs if PF has | |
440 | * jumbo frames enabled which means legacy VFs are | |
441 | * disabled | |
442 | */ | |
443 | if (pf_max_frame > ETH_FRAME_LEN) | |
444 | break; | |
445 | default: | |
446 | /* | |
447 | * If the PF or VF are running w/ jumbo frames enabled | |
448 | * we need to shut down the VF Rx path as we cannot | |
449 | * support jumbo frames on legacy VFs | |
450 | */ | |
451 | if ((pf_max_frame > ETH_FRAME_LEN) || | |
452 | (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN))) | |
453 | err = -EINVAL; | |
454 | break; | |
455 | } | |
872844dd AD |
456 | |
457 | /* determine VF receive enable location */ | |
458 | vf_shift = vf % 32; | |
459 | reg_offset = vf / 32; | |
460 | ||
461 | /* enable or disable receive depending on error */ | |
462 | vfre = IXGBE_READ_REG(hw, IXGBE_VFRE(reg_offset)); | |
463 | if (err) | |
464 | vfre &= ~(1 << vf_shift); | |
465 | else | |
466 | vfre |= 1 << vf_shift; | |
467 | IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), vfre); | |
468 | ||
469 | if (err) { | |
470 | e_err(drv, "VF max_frame %d out of range\n", max_frame); | |
471 | return err; | |
472 | } | |
473 | } | |
e9f98072 GR |
474 | |
475 | /* MTU < 68 is an error and causes problems on some kernels */ | |
872844dd AD |
476 | if (max_frame > IXGBE_MAX_JUMBO_FRAME_SIZE) { |
477 | e_err(drv, "VF max_frame %d out of range\n", max_frame); | |
478 | return -EINVAL; | |
e9f98072 GR |
479 | } |
480 | ||
872844dd AD |
481 | /* pull current max frame size from hardware */ |
482 | max_frs = IXGBE_READ_REG(hw, IXGBE_MAXFRS); | |
483 | max_frs &= IXGBE_MHADD_MFS_MASK; | |
484 | max_frs >>= IXGBE_MHADD_MFS_SHIFT; | |
485 | ||
486 | if (max_frs < max_frame) { | |
487 | max_frs = max_frame << IXGBE_MHADD_MFS_SHIFT; | |
e9f98072 GR |
488 | IXGBE_WRITE_REG(hw, IXGBE_MAXFRS, max_frs); |
489 | } | |
490 | ||
872844dd AD |
491 | e_info(hw, "VF requests change max MTU to %d\n", max_frame); |
492 | ||
493 | return 0; | |
e9f98072 GR |
494 | } |
495 | ||
5d5b7c39 | 496 | static void ixgbe_set_vmolr(struct ixgbe_hw *hw, u32 vf, bool aupe) |
17367270 GR |
497 | { |
498 | u32 vmolr = IXGBE_READ_REG(hw, IXGBE_VMOLR(vf)); | |
b335e75b | 499 | vmolr |= IXGBE_VMOLR_BAM; |
f0412776 GR |
500 | if (aupe) |
501 | vmolr |= IXGBE_VMOLR_AUPE; | |
502 | else | |
503 | vmolr &= ~IXGBE_VMOLR_AUPE; | |
17367270 GR |
504 | IXGBE_WRITE_REG(hw, IXGBE_VMOLR(vf), vmolr); |
505 | } | |
506 | ||
107d3018 AD |
507 | static void ixgbe_clear_vmvir(struct ixgbe_adapter *adapter, u32 vf) |
508 | { | |
509 | struct ixgbe_hw *hw = &adapter->hw; | |
510 | ||
511 | IXGBE_WRITE_REG(hw, IXGBE_VMVIR(vf), 0); | |
512 | } | |
5d5b7c39 | 513 | static inline void ixgbe_vf_reset_event(struct ixgbe_adapter *adapter, u32 vf) |
17367270 GR |
514 | { |
515 | struct ixgbe_hw *hw = &adapter->hw; | |
107d3018 | 516 | struct vf_data_storage *vfinfo = &adapter->vfinfo[vf]; |
107d3018 AD |
517 | u8 num_tcs = netdev_get_num_tc(adapter->netdev); |
518 | ||
519 | /* add PF assigned VLAN or VLAN 0 */ | |
520 | ixgbe_set_vf_vlan(adapter, true, vfinfo->pf_vlan, vf); | |
17367270 GR |
521 | |
522 | /* reset offloads to defaults */ | |
107d3018 AD |
523 | ixgbe_set_vmolr(hw, vf, !vfinfo->pf_vlan); |
524 | ||
525 | /* set outgoing tags for VFs */ | |
526 | if (!vfinfo->pf_vlan && !vfinfo->pf_qos && !num_tcs) { | |
527 | ixgbe_clear_vmvir(adapter, vf); | |
7f01648a | 528 | } else { |
107d3018 AD |
529 | if (vfinfo->pf_qos || !num_tcs) |
530 | ixgbe_set_vmvir(adapter, vfinfo->pf_vlan, | |
531 | vfinfo->pf_qos, vf); | |
532 | else | |
533 | ixgbe_set_vmvir(adapter, vfinfo->pf_vlan, | |
534 | adapter->default_up, vf); | |
535 | ||
536 | if (vfinfo->spoofchk_enabled) | |
537 | hw->mac.ops.set_vlan_anti_spoofing(hw, true, vf); | |
7f01648a | 538 | } |
17367270 GR |
539 | |
540 | /* reset multicast table array for vf */ | |
541 | adapter->vfinfo[vf].num_vf_mc_hashes = 0; | |
542 | ||
543 | /* Flush and reset the mta with the new values */ | |
544 | ixgbe_set_rx_mode(adapter->netdev); | |
545 | ||
5d7daa35 | 546 | ixgbe_del_mac_filter(adapter, adapter->vfinfo[vf].vf_mac_addresses, vf); |
374c65d6 AD |
547 | |
548 | /* reset VF api back to unknown */ | |
549 | adapter->vfinfo[vf].vf_api = ixgbe_mbox_api_10; | |
17367270 GR |
550 | } |
551 | ||
5d5b7c39 ET |
552 | static int ixgbe_set_vf_mac(struct ixgbe_adapter *adapter, |
553 | int vf, unsigned char *mac_addr) | |
17367270 | 554 | { |
5d7daa35 | 555 | ixgbe_del_mac_filter(adapter, adapter->vfinfo[vf].vf_mac_addresses, vf); |
d458cdf7 | 556 | memcpy(adapter->vfinfo[vf].vf_mac_addresses, mac_addr, ETH_ALEN); |
5d7daa35 | 557 | ixgbe_add_mac_filter(adapter, adapter->vfinfo[vf].vf_mac_addresses, vf); |
17367270 GR |
558 | |
559 | return 0; | |
560 | } | |
561 | ||
a1cbb15c GR |
562 | static int ixgbe_set_vf_macvlan(struct ixgbe_adapter *adapter, |
563 | int vf, int index, unsigned char *mac_addr) | |
564 | { | |
a1cbb15c GR |
565 | struct list_head *pos; |
566 | struct vf_macvlans *entry; | |
567 | ||
568 | if (index <= 1) { | |
569 | list_for_each(pos, &adapter->vf_mvs.l) { | |
570 | entry = list_entry(pos, struct vf_macvlans, l); | |
571 | if (entry->vf == vf) { | |
572 | entry->vf = -1; | |
573 | entry->free = true; | |
574 | entry->is_macvlan = false; | |
5d7daa35 JK |
575 | ixgbe_del_mac_filter(adapter, |
576 | entry->vf_macvlan, vf); | |
a1cbb15c GR |
577 | } |
578 | } | |
579 | } | |
580 | ||
581 | /* | |
582 | * If index was zero then we were asked to clear the uc list | |
583 | * for the VF. We're done. | |
584 | */ | |
585 | if (!index) | |
586 | return 0; | |
587 | ||
588 | entry = NULL; | |
589 | ||
590 | list_for_each(pos, &adapter->vf_mvs.l) { | |
591 | entry = list_entry(pos, struct vf_macvlans, l); | |
592 | if (entry->free) | |
593 | break; | |
594 | } | |
595 | ||
596 | /* | |
597 | * If we traversed the entire list and didn't find a free entry | |
598 | * then we're out of space on the RAR table. Also entry may | |
599 | * be NULL because the original memory allocation for the list | |
600 | * failed, which is not fatal but does mean we can't support | |
601 | * VF requests for MACVLAN because we couldn't allocate | |
602 | * memory for the list management required. | |
603 | */ | |
604 | if (!entry || !entry->free) | |
605 | return -ENOSPC; | |
606 | ||
607 | entry->free = false; | |
608 | entry->is_macvlan = true; | |
609 | entry->vf = vf; | |
610 | memcpy(entry->vf_macvlan, mac_addr, ETH_ALEN); | |
611 | ||
5d7daa35 | 612 | ixgbe_add_mac_filter(adapter, mac_addr, vf); |
a1cbb15c GR |
613 | |
614 | return 0; | |
615 | } | |
616 | ||
17367270 GR |
617 | int ixgbe_vf_configuration(struct pci_dev *pdev, unsigned int event_mask) |
618 | { | |
c60fbb00 | 619 | struct ixgbe_adapter *adapter = pci_get_drvdata(pdev); |
17367270 GR |
620 | unsigned int vfn = (event_mask & 0x3f); |
621 | ||
622 | bool enable = ((event_mask & 0x10000000U) != 0); | |
623 | ||
d458cdf7 JP |
624 | if (enable) |
625 | eth_zero_addr(adapter->vfinfo[vfn].vf_mac_addresses); | |
17367270 GR |
626 | |
627 | return 0; | |
628 | } | |
629 | ||
8d697e7e DS |
630 | static inline void ixgbe_write_qde(struct ixgbe_adapter *adapter, u32 vf, |
631 | u32 qde) | |
632 | { | |
633 | struct ixgbe_hw *hw = &adapter->hw; | |
634 | struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ]; | |
635 | u32 q_per_pool = __ALIGN_MASK(1, ~vmdq->mask); | |
636 | int i; | |
637 | ||
638 | for (i = vf * q_per_pool; i < ((vf + 1) * q_per_pool); i++) { | |
639 | u32 reg; | |
640 | ||
641 | /* flush previous write */ | |
642 | IXGBE_WRITE_FLUSH(hw); | |
643 | ||
644 | /* indicate to hardware that we want to set drop enable */ | |
645 | reg = IXGBE_QDE_WRITE | IXGBE_QDE_ENABLE; | |
646 | reg |= i << IXGBE_QDE_IDX_SHIFT; | |
647 | IXGBE_WRITE_REG(hw, IXGBE_QDE, reg); | |
648 | } | |
649 | } | |
650 | ||
58a02bee | 651 | static int ixgbe_vf_reset_msg(struct ixgbe_adapter *adapter, u32 vf) |
17367270 | 652 | { |
87397379 | 653 | struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ]; |
17367270 | 654 | struct ixgbe_hw *hw = &adapter->hw; |
58a02bee | 655 | unsigned char *vf_mac = adapter->vfinfo[vf].vf_mac_addresses; |
b08e1ed9 ET |
656 | u32 reg, reg_offset, vf_shift; |
657 | u32 msgbuf[4] = {0, 0, 0, 0}; | |
58a02bee | 658 | u8 *addr = (u8 *)(&msgbuf[1]); |
87397379 AD |
659 | u32 q_per_pool = __ALIGN_MASK(1, ~vmdq->mask); |
660 | int i; | |
58a02bee AD |
661 | |
662 | e_info(probe, "VF Reset msg received from vf %d\n", vf); | |
663 | ||
664 | /* reset the filters for the device */ | |
665 | ixgbe_vf_reset_event(adapter, vf); | |
666 | ||
667 | /* set vf mac address */ | |
35055928 GR |
668 | if (!is_zero_ether_addr(vf_mac)) |
669 | ixgbe_set_vf_mac(adapter, vf, vf_mac); | |
17367270 GR |
670 | |
671 | vf_shift = vf % 32; | |
672 | reg_offset = vf / 32; | |
673 | ||
58a02bee | 674 | /* enable transmit for vf */ |
17367270 | 675 | reg = IXGBE_READ_REG(hw, IXGBE_VFTE(reg_offset)); |
872844dd | 676 | reg |= 1 << vf_shift; |
17367270 GR |
677 | IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), reg); |
678 | ||
87397379 | 679 | /* force drop enable for all VF Rx queues */ |
8d697e7e | 680 | ixgbe_write_qde(adapter, vf, IXGBE_QDE_ENABLE); |
87397379 | 681 | |
58a02bee | 682 | /* enable receive for vf */ |
17367270 | 683 | reg = IXGBE_READ_REG(hw, IXGBE_VFRE(reg_offset)); |
872844dd AD |
684 | reg |= 1 << vf_shift; |
685 | /* | |
686 | * The 82599 cannot support a mix of jumbo and non-jumbo PF/VFs. | |
687 | * For more info take a look at ixgbe_set_vf_lpe | |
688 | */ | |
689 | if (adapter->hw.mac.type == ixgbe_mac_82599EB) { | |
690 | struct net_device *dev = adapter->netdev; | |
691 | int pf_max_frame = dev->mtu + ETH_HLEN; | |
692 | ||
693 | #ifdef CONFIG_FCOE | |
694 | if (dev->features & NETIF_F_FCOE_MTU) | |
695 | pf_max_frame = max_t(int, pf_max_frame, | |
696 | IXGBE_FCOE_JUMBO_FRAME_SIZE); | |
697 | ||
698 | #endif /* CONFIG_FCOE */ | |
699 | if (pf_max_frame > ETH_FRAME_LEN) | |
700 | reg &= ~(1 << vf_shift); | |
701 | } | |
17367270 GR |
702 | IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), reg); |
703 | ||
58a02bee AD |
704 | /* enable VF mailbox for further messages */ |
705 | adapter->vfinfo[vf].clear_to_send = true; | |
706 | ||
a985b6c3 GR |
707 | /* Enable counting of spoofed packets in the SSVPC register */ |
708 | reg = IXGBE_READ_REG(hw, IXGBE_VMECM(reg_offset)); | |
709 | reg |= (1 << vf_shift); | |
710 | IXGBE_WRITE_REG(hw, IXGBE_VMECM(reg_offset), reg); | |
711 | ||
dbf231af AD |
712 | /* |
713 | * Reset the VFs TDWBAL and TDWBAH registers | |
714 | * which are not cleared by an FLR | |
715 | */ | |
716 | for (i = 0; i < q_per_pool; i++) { | |
717 | IXGBE_WRITE_REG(hw, IXGBE_PVFTDWBAHn(q_per_pool, vf, i), 0); | |
718 | IXGBE_WRITE_REG(hw, IXGBE_PVFTDWBALn(q_per_pool, vf, i), 0); | |
719 | } | |
720 | ||
58a02bee | 721 | /* reply to reset with ack and vf mac address */ |
35055928 GR |
722 | msgbuf[0] = IXGBE_VF_RESET; |
723 | if (!is_zero_ether_addr(vf_mac)) { | |
724 | msgbuf[0] |= IXGBE_VT_MSGTYPE_ACK; | |
725 | memcpy(addr, vf_mac, ETH_ALEN); | |
726 | } else { | |
727 | msgbuf[0] |= IXGBE_VT_MSGTYPE_NACK; | |
728 | dev_warn(&adapter->pdev->dev, | |
729 | "VF %d has no MAC address assigned, you may have to assign one manually\n", | |
730 | vf); | |
731 | } | |
58a02bee AD |
732 | |
733 | /* | |
734 | * Piggyback the multicast filter type so VF can compute the | |
735 | * correct vectors | |
736 | */ | |
737 | msgbuf[3] = hw->mac.mc_filter_type; | |
738 | ixgbe_write_mbx(hw, msgbuf, IXGBE_VF_PERMADDR_MSG_LEN, vf); | |
739 | ||
740 | return 0; | |
741 | } | |
742 | ||
743 | static int ixgbe_set_vf_mac_addr(struct ixgbe_adapter *adapter, | |
744 | u32 *msgbuf, u32 vf) | |
745 | { | |
746 | u8 *new_mac = ((u8 *)(&msgbuf[1])); | |
747 | ||
748 | if (!is_valid_ether_addr(new_mac)) { | |
749 | e_warn(drv, "VF %d attempted to set invalid mac\n", vf); | |
750 | return -1; | |
751 | } | |
752 | ||
753 | if (adapter->vfinfo[vf].pf_set_mac && | |
4012dda3 | 754 | !ether_addr_equal(adapter->vfinfo[vf].vf_mac_addresses, new_mac)) { |
58a02bee AD |
755 | e_warn(drv, |
756 | "VF %d attempted to override administratively set MAC address\n" | |
757 | "Reload the VF driver to resume operations\n", | |
758 | vf); | |
759 | return -1; | |
760 | } | |
761 | ||
3970c323 | 762 | return ixgbe_set_vf_mac(adapter, vf, new_mac) < 0; |
58a02bee AD |
763 | } |
764 | ||
670224f1 GR |
765 | static int ixgbe_find_vlvf_entry(struct ixgbe_hw *hw, u32 vlan) |
766 | { | |
767 | u32 vlvf; | |
768 | s32 regindex; | |
769 | ||
770 | /* short cut the special case */ | |
771 | if (vlan == 0) | |
772 | return 0; | |
773 | ||
774 | /* Search for the vlan id in the VLVF entries */ | |
775 | for (regindex = 1; regindex < IXGBE_VLVF_ENTRIES; regindex++) { | |
776 | vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(regindex)); | |
777 | if ((vlvf & VLAN_VID_MASK) == vlan) | |
778 | break; | |
779 | } | |
780 | ||
781 | /* Return a negative value if not found */ | |
782 | if (regindex >= IXGBE_VLVF_ENTRIES) | |
783 | regindex = -1; | |
784 | ||
785 | return regindex; | |
786 | } | |
787 | ||
58a02bee AD |
788 | static int ixgbe_set_vf_vlan_msg(struct ixgbe_adapter *adapter, |
789 | u32 *msgbuf, u32 vf) | |
790 | { | |
791 | struct ixgbe_hw *hw = &adapter->hw; | |
792 | int add = (msgbuf[0] & IXGBE_VT_MSGINFO_MASK) >> IXGBE_VT_MSGINFO_SHIFT; | |
793 | int vid = (msgbuf[1] & IXGBE_VLVF_VLANID_MASK); | |
794 | int err; | |
670224f1 GR |
795 | s32 reg_ndx; |
796 | u32 vlvf; | |
797 | u32 bits; | |
107d3018 | 798 | u8 tcs = netdev_get_num_tc(adapter->netdev); |
58a02bee | 799 | |
107d3018 | 800 | if (adapter->vfinfo[vf].pf_vlan || tcs) { |
58a02bee AD |
801 | e_warn(drv, |
802 | "VF %d attempted to override administratively set VLAN configuration\n" | |
803 | "Reload the VF driver to resume operations\n", | |
804 | vf); | |
805 | return -1; | |
806 | } | |
807 | ||
808 | if (add) | |
809 | adapter->vfinfo[vf].vlan_count++; | |
810 | else if (adapter->vfinfo[vf].vlan_count) | |
811 | adapter->vfinfo[vf].vlan_count--; | |
812 | ||
670224f1 GR |
813 | /* in case of promiscuous mode any VLAN filter set for a VF must |
814 | * also have the PF pool added to it. | |
815 | */ | |
816 | if (add && adapter->netdev->flags & IFF_PROMISC) | |
817 | err = ixgbe_set_vf_vlan(adapter, add, vid, VMDQ_P(0)); | |
818 | ||
58a02bee AD |
819 | err = ixgbe_set_vf_vlan(adapter, add, vid, vf); |
820 | if (!err && adapter->vfinfo[vf].spoofchk_enabled) | |
821 | hw->mac.ops.set_vlan_anti_spoofing(hw, true, vf); | |
822 | ||
670224f1 GR |
823 | /* Go through all the checks to see if the VLAN filter should |
824 | * be wiped completely. | |
825 | */ | |
826 | if (!add && adapter->netdev->flags & IFF_PROMISC) { | |
827 | reg_ndx = ixgbe_find_vlvf_entry(hw, vid); | |
828 | if (reg_ndx < 0) | |
e90dd264 | 829 | return err; |
670224f1 GR |
830 | vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(reg_ndx)); |
831 | /* See if any other pools are set for this VLAN filter | |
832 | * entry other than the PF. | |
833 | */ | |
834 | if (VMDQ_P(0) < 32) { | |
835 | bits = IXGBE_READ_REG(hw, IXGBE_VLVFB(reg_ndx * 2)); | |
836 | bits &= ~(1 << VMDQ_P(0)); | |
837 | bits |= IXGBE_READ_REG(hw, | |
838 | IXGBE_VLVFB(reg_ndx * 2) + 1); | |
839 | } else { | |
840 | bits = IXGBE_READ_REG(hw, | |
841 | IXGBE_VLVFB(reg_ndx * 2) + 1); | |
842 | bits &= ~(1 << (VMDQ_P(0) - 32)); | |
843 | bits |= IXGBE_READ_REG(hw, IXGBE_VLVFB(reg_ndx * 2)); | |
844 | } | |
845 | ||
846 | /* If the filter was removed then ensure PF pool bit | |
847 | * is cleared if the PF only added itself to the pool | |
848 | * because the PF is in promiscuous mode. | |
849 | */ | |
850 | if ((vlvf & VLAN_VID_MASK) == vid && | |
851 | !test_bit(vid, adapter->active_vlans) && !bits) | |
852 | ixgbe_set_vf_vlan(adapter, add, vid, VMDQ_P(0)); | |
853 | } | |
854 | ||
58a02bee AD |
855 | return err; |
856 | } | |
857 | ||
858 | static int ixgbe_set_vf_macvlan_msg(struct ixgbe_adapter *adapter, | |
859 | u32 *msgbuf, u32 vf) | |
860 | { | |
861 | u8 *new_mac = ((u8 *)(&msgbuf[1])); | |
862 | int index = (msgbuf[0] & IXGBE_VT_MSGINFO_MASK) >> | |
863 | IXGBE_VT_MSGINFO_SHIFT; | |
864 | int err; | |
865 | ||
866 | if (adapter->vfinfo[vf].pf_set_mac && index > 0) { | |
867 | e_warn(drv, | |
868 | "VF %d requested MACVLAN filter but is administratively denied\n", | |
869 | vf); | |
870 | return -1; | |
871 | } | |
872 | ||
873 | /* An non-zero index indicates the VF is setting a filter */ | |
874 | if (index) { | |
875 | if (!is_valid_ether_addr(new_mac)) { | |
876 | e_warn(drv, "VF %d attempted to set invalid mac\n", vf); | |
877 | return -1; | |
878 | } | |
879 | ||
880 | /* | |
881 | * If the VF is allowed to set MAC filters then turn off | |
882 | * anti-spoofing to avoid false positives. | |
883 | */ | |
884 | if (adapter->vfinfo[vf].spoofchk_enabled) | |
885 | ixgbe_ndo_set_vf_spoofchk(adapter->netdev, vf, false); | |
886 | } | |
887 | ||
888 | err = ixgbe_set_vf_macvlan(adapter, vf, index, new_mac); | |
889 | if (err == -ENOSPC) | |
890 | e_warn(drv, | |
891 | "VF %d has requested a MACVLAN filter but there is no space for it\n", | |
892 | vf); | |
a3013405 GR |
893 | |
894 | return err < 0; | |
17367270 GR |
895 | } |
896 | ||
374c65d6 AD |
897 | static int ixgbe_negotiate_vf_api(struct ixgbe_adapter *adapter, |
898 | u32 *msgbuf, u32 vf) | |
899 | { | |
900 | int api = msgbuf[1]; | |
901 | ||
902 | switch (api) { | |
903 | case ixgbe_mbox_api_10: | |
bffb3bc9 | 904 | case ixgbe_mbox_api_11: |
4ce37a4c | 905 | case ixgbe_mbox_api_12: |
374c65d6 AD |
906 | adapter->vfinfo[vf].vf_api = api; |
907 | return 0; | |
908 | default: | |
909 | break; | |
910 | } | |
911 | ||
912 | e_info(drv, "VF %d requested invalid api version %u\n", vf, api); | |
913 | ||
914 | return -1; | |
915 | } | |
916 | ||
f591cd9d AD |
917 | static int ixgbe_get_vf_queues(struct ixgbe_adapter *adapter, |
918 | u32 *msgbuf, u32 vf) | |
919 | { | |
920 | struct net_device *dev = adapter->netdev; | |
921 | struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ]; | |
922 | unsigned int default_tc = 0; | |
923 | u8 num_tcs = netdev_get_num_tc(dev); | |
924 | ||
925 | /* verify the PF is supporting the correct APIs */ | |
926 | switch (adapter->vfinfo[vf].vf_api) { | |
927 | case ixgbe_mbox_api_20: | |
928 | case ixgbe_mbox_api_11: | |
4ce37a4c | 929 | case ixgbe_mbox_api_12: |
f591cd9d AD |
930 | break; |
931 | default: | |
932 | return -1; | |
933 | } | |
934 | ||
935 | /* only allow 1 Tx queue for bandwidth limiting */ | |
936 | msgbuf[IXGBE_VF_TX_QUEUES] = __ALIGN_MASK(1, ~vmdq->mask); | |
937 | msgbuf[IXGBE_VF_RX_QUEUES] = __ALIGN_MASK(1, ~vmdq->mask); | |
938 | ||
939 | /* if TCs > 1 determine which TC belongs to default user priority */ | |
940 | if (num_tcs > 1) | |
941 | default_tc = netdev_get_prio_tc_map(dev, adapter->default_up); | |
942 | ||
943 | /* notify VF of need for VLAN tag stripping, and correct queue */ | |
944 | if (num_tcs) | |
945 | msgbuf[IXGBE_VF_TRANS_VLAN] = num_tcs; | |
946 | else if (adapter->vfinfo[vf].pf_vlan || adapter->vfinfo[vf].pf_qos) | |
947 | msgbuf[IXGBE_VF_TRANS_VLAN] = 1; | |
948 | else | |
949 | msgbuf[IXGBE_VF_TRANS_VLAN] = 0; | |
950 | ||
951 | /* notify VF of default queue */ | |
952 | msgbuf[IXGBE_VF_DEF_QUEUE] = default_tc; | |
953 | ||
954 | return 0; | |
955 | } | |
956 | ||
4ce37a4c VZ |
957 | static int ixgbe_get_vf_reta(struct ixgbe_adapter *adapter, u32 *msgbuf, u32 vf) |
958 | { | |
959 | u32 i, j; | |
960 | u32 *out_buf = &msgbuf[1]; | |
961 | const u8 *reta = adapter->rss_indir_tbl; | |
962 | u32 reta_size = ixgbe_rss_indir_tbl_entries(adapter); | |
963 | ||
964 | /* Check if operation is permitted */ | |
965 | if (!adapter->vfinfo[vf].rss_query_enabled) | |
966 | return -EPERM; | |
967 | ||
968 | /* verify the PF is supporting the correct API */ | |
969 | if (adapter->vfinfo[vf].vf_api != ixgbe_mbox_api_12) | |
970 | return -EOPNOTSUPP; | |
971 | ||
972 | /* This mailbox command is supported (required) only for 82599 and x540 | |
973 | * VFs which support up to 4 RSS queues. Therefore we will compress the | |
974 | * RETA by saving only 2 bits from each entry. This way we will be able | |
975 | * to transfer the whole RETA in a single mailbox operation. | |
976 | */ | |
977 | for (i = 0; i < reta_size / 16; i++) { | |
978 | out_buf[i] = 0; | |
979 | for (j = 0; j < 16; j++) | |
980 | out_buf[i] |= (u32)(reta[16 * i + j] & 0x3) << (2 * j); | |
981 | } | |
982 | ||
983 | return 0; | |
984 | } | |
985 | ||
17367270 GR |
986 | static int ixgbe_rcv_msg_from_vf(struct ixgbe_adapter *adapter, u32 vf) |
987 | { | |
988 | u32 mbx_size = IXGBE_VFMAILBOX_SIZE; | |
c050999e | 989 | u32 msgbuf[IXGBE_VFMAILBOX_SIZE]; |
17367270 GR |
990 | struct ixgbe_hw *hw = &adapter->hw; |
991 | s32 retval; | |
17367270 GR |
992 | |
993 | retval = ixgbe_read_mbx(hw, msgbuf, mbx_size, vf); | |
994 | ||
dcaccc82 | 995 | if (retval) { |
849c4542 | 996 | pr_err("Error receiving message from VF\n"); |
dcaccc82 AD |
997 | return retval; |
998 | } | |
17367270 GR |
999 | |
1000 | /* this is a message we already processed, do nothing */ | |
1001 | if (msgbuf[0] & (IXGBE_VT_MSGTYPE_ACK | IXGBE_VT_MSGTYPE_NACK)) | |
e90dd264 | 1002 | return 0; |
17367270 | 1003 | |
dcaccc82 AD |
1004 | /* flush the ack before we write any messages back */ |
1005 | IXGBE_WRITE_FLUSH(hw); | |
1006 | ||
374c65d6 AD |
1007 | if (msgbuf[0] == IXGBE_VF_RESET) |
1008 | return ixgbe_vf_reset_msg(adapter, vf); | |
1009 | ||
17367270 GR |
1010 | /* |
1011 | * until the vf completes a virtual function reset it should not be | |
1012 | * allowed to start any configuration. | |
1013 | */ | |
17367270 GR |
1014 | if (!adapter->vfinfo[vf].clear_to_send) { |
1015 | msgbuf[0] |= IXGBE_VT_MSGTYPE_NACK; | |
1016 | ixgbe_write_mbx(hw, msgbuf, 1, vf); | |
e90dd264 | 1017 | return 0; |
17367270 GR |
1018 | } |
1019 | ||
1020 | switch ((msgbuf[0] & 0xFFFF)) { | |
1021 | case IXGBE_VF_SET_MAC_ADDR: | |
58a02bee | 1022 | retval = ixgbe_set_vf_mac_addr(adapter, msgbuf, vf); |
17367270 GR |
1023 | break; |
1024 | case IXGBE_VF_SET_MULTICAST: | |
58a02bee AD |
1025 | retval = ixgbe_set_vf_multicasts(adapter, msgbuf, vf); |
1026 | break; | |
1027 | case IXGBE_VF_SET_VLAN: | |
1028 | retval = ixgbe_set_vf_vlan_msg(adapter, msgbuf, vf); | |
17367270 GR |
1029 | break; |
1030 | case IXGBE_VF_SET_LPE: | |
872844dd | 1031 | retval = ixgbe_set_vf_lpe(adapter, msgbuf, vf); |
17367270 | 1032 | break; |
a1cbb15c | 1033 | case IXGBE_VF_SET_MACVLAN: |
58a02bee | 1034 | retval = ixgbe_set_vf_macvlan_msg(adapter, msgbuf, vf); |
a1cbb15c | 1035 | break; |
374c65d6 AD |
1036 | case IXGBE_VF_API_NEGOTIATE: |
1037 | retval = ixgbe_negotiate_vf_api(adapter, msgbuf, vf); | |
1038 | break; | |
f591cd9d AD |
1039 | case IXGBE_VF_GET_QUEUES: |
1040 | retval = ixgbe_get_vf_queues(adapter, msgbuf, vf); | |
1041 | break; | |
4ce37a4c VZ |
1042 | case IXGBE_VF_GET_RETA: |
1043 | retval = ixgbe_get_vf_reta(adapter, msgbuf, vf); | |
1044 | break; | |
17367270 | 1045 | default: |
396e799c | 1046 | e_err(drv, "Unhandled Msg %8.8x\n", msgbuf[0]); |
17367270 GR |
1047 | retval = IXGBE_ERR_MBX; |
1048 | break; | |
1049 | } | |
1050 | ||
1051 | /* notify the VF of the results of what it sent us */ | |
1052 | if (retval) | |
1053 | msgbuf[0] |= IXGBE_VT_MSGTYPE_NACK; | |
1054 | else | |
1055 | msgbuf[0] |= IXGBE_VT_MSGTYPE_ACK; | |
1056 | ||
1057 | msgbuf[0] |= IXGBE_VT_MSGTYPE_CTS; | |
1058 | ||
374c65d6 | 1059 | ixgbe_write_mbx(hw, msgbuf, mbx_size, vf); |
17367270 GR |
1060 | |
1061 | return retval; | |
1062 | } | |
1063 | ||
1064 | static void ixgbe_rcv_ack_from_vf(struct ixgbe_adapter *adapter, u32 vf) | |
1065 | { | |
1066 | struct ixgbe_hw *hw = &adapter->hw; | |
1067 | u32 msg = IXGBE_VT_MSGTYPE_NACK; | |
1068 | ||
1069 | /* if device isn't clear to send it shouldn't be reading either */ | |
1070 | if (!adapter->vfinfo[vf].clear_to_send) | |
1071 | ixgbe_write_mbx(hw, &msg, 1, vf); | |
1072 | } | |
1073 | ||
1074 | void ixgbe_msg_task(struct ixgbe_adapter *adapter) | |
1075 | { | |
1076 | struct ixgbe_hw *hw = &adapter->hw; | |
1077 | u32 vf; | |
1078 | ||
1079 | for (vf = 0; vf < adapter->num_vfs; vf++) { | |
1080 | /* process any reset requests */ | |
1081 | if (!ixgbe_check_for_rst(hw, vf)) | |
1082 | ixgbe_vf_reset_event(adapter, vf); | |
1083 | ||
1084 | /* process any messages pending */ | |
1085 | if (!ixgbe_check_for_msg(hw, vf)) | |
1086 | ixgbe_rcv_msg_from_vf(adapter, vf); | |
1087 | ||
1088 | /* process any acks */ | |
1089 | if (!ixgbe_check_for_ack(hw, vf)) | |
1090 | ixgbe_rcv_ack_from_vf(adapter, vf); | |
1091 | } | |
1092 | } | |
1093 | ||
767081ad GR |
1094 | void ixgbe_disable_tx_rx(struct ixgbe_adapter *adapter) |
1095 | { | |
1096 | struct ixgbe_hw *hw = &adapter->hw; | |
1097 | ||
1098 | /* disable transmit and receive for all vfs */ | |
1099 | IXGBE_WRITE_REG(hw, IXGBE_VFTE(0), 0); | |
1100 | IXGBE_WRITE_REG(hw, IXGBE_VFTE(1), 0); | |
1101 | ||
1102 | IXGBE_WRITE_REG(hw, IXGBE_VFRE(0), 0); | |
1103 | IXGBE_WRITE_REG(hw, IXGBE_VFRE(1), 0); | |
1104 | } | |
1105 | ||
1106 | void ixgbe_ping_all_vfs(struct ixgbe_adapter *adapter) | |
1107 | { | |
1108 | struct ixgbe_hw *hw = &adapter->hw; | |
1109 | u32 ping; | |
1110 | int i; | |
1111 | ||
1112 | for (i = 0 ; i < adapter->num_vfs; i++) { | |
1113 | ping = IXGBE_PF_CONTROL_MSG; | |
1114 | if (adapter->vfinfo[i].clear_to_send) | |
1115 | ping |= IXGBE_VT_MSGTYPE_CTS; | |
1116 | ixgbe_write_mbx(hw, &ping, 1, i); | |
1117 | } | |
1118 | } | |
1119 | ||
7f01648a GR |
1120 | int ixgbe_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac) |
1121 | { | |
1122 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
1123 | if (!is_valid_ether_addr(mac) || (vf >= adapter->num_vfs)) | |
1124 | return -EINVAL; | |
1125 | adapter->vfinfo[vf].pf_set_mac = true; | |
1126 | dev_info(&adapter->pdev->dev, "setting MAC %pM on VF %d\n", mac, vf); | |
1127 | dev_info(&adapter->pdev->dev, "Reload the VF driver to make this" | |
1128 | " change effective."); | |
1129 | if (test_bit(__IXGBE_DOWN, &adapter->state)) { | |
1130 | dev_warn(&adapter->pdev->dev, "The VF MAC address has been set," | |
1131 | " but the PF device is not up.\n"); | |
1132 | dev_warn(&adapter->pdev->dev, "Bring the PF device up before" | |
1133 | " attempting to use the VF device.\n"); | |
1134 | } | |
1135 | return ixgbe_set_vf_mac(adapter, vf, mac); | |
1136 | } | |
1137 | ||
2b509c0c DS |
1138 | static int ixgbe_enable_port_vlan(struct ixgbe_adapter *adapter, int vf, |
1139 | u16 vlan, u8 qos) | |
1140 | { | |
1141 | struct ixgbe_hw *hw = &adapter->hw; | |
42ce2c8e | 1142 | int err; |
2b509c0c | 1143 | |
42ce2c8e | 1144 | err = ixgbe_set_vf_vlan(adapter, true, vlan, vf); |
2b509c0c DS |
1145 | if (err) |
1146 | goto out; | |
42ce2c8e | 1147 | |
2b509c0c DS |
1148 | ixgbe_set_vmvir(adapter, vlan, qos, vf); |
1149 | ixgbe_set_vmolr(hw, vf, false); | |
1150 | if (adapter->vfinfo[vf].spoofchk_enabled) | |
1151 | hw->mac.ops.set_vlan_anti_spoofing(hw, true, vf); | |
1152 | adapter->vfinfo[vf].vlan_count++; | |
9a75a1ac DS |
1153 | |
1154 | /* enable hide vlan on X550 */ | |
1155 | if (hw->mac.type >= ixgbe_mac_X550) | |
1156 | ixgbe_write_qde(adapter, vf, IXGBE_QDE_ENABLE | | |
1157 | IXGBE_QDE_HIDE_VLAN); | |
1158 | ||
2b509c0c DS |
1159 | adapter->vfinfo[vf].pf_vlan = vlan; |
1160 | adapter->vfinfo[vf].pf_qos = qos; | |
1161 | dev_info(&adapter->pdev->dev, | |
1162 | "Setting VLAN %d, QOS 0x%x on VF %d\n", vlan, qos, vf); | |
1163 | if (test_bit(__IXGBE_DOWN, &adapter->state)) { | |
1164 | dev_warn(&adapter->pdev->dev, | |
1165 | "The VF VLAN has been set, but the PF device is not up.\n"); | |
1166 | dev_warn(&adapter->pdev->dev, | |
1167 | "Bring the PF device up before attempting to use the VF device.\n"); | |
1168 | } | |
1169 | ||
1170 | out: | |
1171 | return err; | |
1172 | } | |
1173 | ||
1174 | static int ixgbe_disable_port_vlan(struct ixgbe_adapter *adapter, int vf) | |
1175 | { | |
1176 | struct ixgbe_hw *hw = &adapter->hw; | |
1177 | int err; | |
1178 | ||
1179 | err = ixgbe_set_vf_vlan(adapter, false, | |
1180 | adapter->vfinfo[vf].pf_vlan, vf); | |
1181 | ixgbe_clear_vmvir(adapter, vf); | |
1182 | ixgbe_set_vmolr(hw, vf, true); | |
1183 | hw->mac.ops.set_vlan_anti_spoofing(hw, false, vf); | |
1184 | if (adapter->vfinfo[vf].vlan_count) | |
1185 | adapter->vfinfo[vf].vlan_count--; | |
42ce2c8e ET |
1186 | |
1187 | /* disable hide VLAN on X550 */ | |
1188 | if (hw->mac.type >= ixgbe_mac_X550) | |
1189 | ixgbe_write_qde(adapter, vf, IXGBE_QDE_ENABLE); | |
1190 | ||
2b509c0c DS |
1191 | adapter->vfinfo[vf].pf_vlan = 0; |
1192 | adapter->vfinfo[vf].pf_qos = 0; | |
1193 | ||
1194 | return err; | |
1195 | } | |
1196 | ||
7f01648a GR |
1197 | int ixgbe_ndo_set_vf_vlan(struct net_device *netdev, int vf, u16 vlan, u8 qos) |
1198 | { | |
1199 | int err = 0; | |
1200 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
1201 | ||
1202 | if ((vf >= adapter->num_vfs) || (vlan > 4095) || (qos > 7)) | |
1203 | return -EINVAL; | |
1204 | if (vlan || qos) { | |
2b509c0c DS |
1205 | /* Check if there is already a port VLAN set, if so |
1206 | * we have to delete the old one first before we | |
1207 | * can set the new one. The usage model had | |
1208 | * previously assumed the user would delete the | |
1209 | * old port VLAN before setting a new one but this | |
1210 | * is not necessarily the case. | |
1211 | */ | |
026ac677 | 1212 | if (adapter->vfinfo[vf].pf_vlan) |
2b509c0c | 1213 | err = ixgbe_disable_port_vlan(adapter, vf); |
026ac677 GR |
1214 | if (err) |
1215 | goto out; | |
2b509c0c | 1216 | err = ixgbe_enable_port_vlan(adapter, vf, vlan, qos); |
7f01648a | 1217 | } else { |
2b509c0c | 1218 | err = ixgbe_disable_port_vlan(adapter, vf); |
e7cf745b | 1219 | } |
2b509c0c | 1220 | |
7f01648a | 1221 | out: |
e7cf745b | 1222 | return err; |
7f01648a GR |
1223 | } |
1224 | ||
9f66d3ee | 1225 | static int ixgbe_link_mbps(struct ixgbe_adapter *adapter) |
ff4ab206 | 1226 | { |
9f66d3ee | 1227 | switch (adapter->link_speed) { |
ff4ab206 LL |
1228 | case IXGBE_LINK_SPEED_100_FULL: |
1229 | return 100; | |
1230 | case IXGBE_LINK_SPEED_1GB_FULL: | |
1231 | return 1000; | |
1232 | case IXGBE_LINK_SPEED_10GB_FULL: | |
1233 | return 10000; | |
1234 | default: | |
1235 | return 0; | |
1236 | } | |
1237 | } | |
1238 | ||
9f66d3ee | 1239 | static void ixgbe_set_vf_rate_limit(struct ixgbe_adapter *adapter, int vf) |
ff4ab206 | 1240 | { |
9f66d3ee AD |
1241 | struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ]; |
1242 | struct ixgbe_hw *hw = &adapter->hw; | |
1243 | u32 bcnrc_val = 0; | |
1244 | u16 queue, queues_per_pool; | |
1245 | u16 tx_rate = adapter->vfinfo[vf].tx_rate; | |
1246 | ||
1247 | if (tx_rate) { | |
1248 | /* start with base link speed value */ | |
1249 | bcnrc_val = adapter->vf_rate_link_speed; | |
ff4ab206 | 1250 | |
ff4ab206 | 1251 | /* Calculate the rate factor values to set */ |
9f66d3ee AD |
1252 | bcnrc_val <<= IXGBE_RTTBCNRC_RF_INT_SHIFT; |
1253 | bcnrc_val /= tx_rate; | |
1254 | ||
1255 | /* clear everything but the rate factor */ | |
1256 | bcnrc_val &= IXGBE_RTTBCNRC_RF_INT_MASK | | |
1257 | IXGBE_RTTBCNRC_RF_DEC_MASK; | |
1258 | ||
1259 | /* enable the rate scheduler */ | |
1260 | bcnrc_val |= IXGBE_RTTBCNRC_RS_ENA; | |
ff4ab206 LL |
1261 | } |
1262 | ||
7555e83d LL |
1263 | /* |
1264 | * Set global transmit compensation time to the MMW_SIZE in RTTBCNRM | |
1265 | * register. Typically MMW_SIZE=0x014 if 9728-byte jumbo is supported | |
1266 | * and 0x004 otherwise. | |
1267 | */ | |
1268 | switch (hw->mac.type) { | |
1269 | case ixgbe_mac_82599EB: | |
1270 | IXGBE_WRITE_REG(hw, IXGBE_RTTBCNRM, 0x4); | |
1271 | break; | |
1272 | case ixgbe_mac_X540: | |
1273 | IXGBE_WRITE_REG(hw, IXGBE_RTTBCNRM, 0x14); | |
1274 | break; | |
1275 | default: | |
1276 | break; | |
1277 | } | |
1278 | ||
9f66d3ee AD |
1279 | /* determine how many queues per pool based on VMDq mask */ |
1280 | queues_per_pool = __ALIGN_MASK(1, ~vmdq->mask); | |
1281 | ||
1282 | /* write value for all Tx queues belonging to VF */ | |
1283 | for (queue = 0; queue < queues_per_pool; queue++) { | |
1284 | unsigned int reg_idx = (vf * queues_per_pool) + queue; | |
1285 | ||
1286 | IXGBE_WRITE_REG(hw, IXGBE_RTTDQSEL, reg_idx); | |
1287 | IXGBE_WRITE_REG(hw, IXGBE_RTTBCNRC, bcnrc_val); | |
1288 | } | |
ff4ab206 LL |
1289 | } |
1290 | ||
1291 | void ixgbe_check_vf_rate_limit(struct ixgbe_adapter *adapter) | |
1292 | { | |
9f66d3ee | 1293 | int i; |
ff4ab206 LL |
1294 | |
1295 | /* VF Tx rate limit was not set */ | |
9f66d3ee | 1296 | if (!adapter->vf_rate_link_speed) |
ff4ab206 LL |
1297 | return; |
1298 | ||
9f66d3ee | 1299 | if (ixgbe_link_mbps(adapter) != adapter->vf_rate_link_speed) { |
ff4ab206 LL |
1300 | adapter->vf_rate_link_speed = 0; |
1301 | dev_info(&adapter->pdev->dev, | |
9f66d3ee | 1302 | "Link speed has been changed. VF Transmit rate is disabled\n"); |
ff4ab206 LL |
1303 | } |
1304 | ||
1305 | for (i = 0; i < adapter->num_vfs; i++) { | |
9f66d3ee | 1306 | if (!adapter->vf_rate_link_speed) |
ff4ab206 LL |
1307 | adapter->vfinfo[i].tx_rate = 0; |
1308 | ||
9f66d3ee | 1309 | ixgbe_set_vf_rate_limit(adapter, i); |
ff4ab206 LL |
1310 | } |
1311 | } | |
1312 | ||
ed616689 SC |
1313 | int ixgbe_ndo_set_vf_bw(struct net_device *netdev, int vf, int min_tx_rate, |
1314 | int max_tx_rate) | |
7f01648a | 1315 | { |
ff4ab206 | 1316 | struct ixgbe_adapter *adapter = netdev_priv(netdev); |
9f66d3ee AD |
1317 | int link_speed; |
1318 | ||
1319 | /* verify VF is active */ | |
1320 | if (vf >= adapter->num_vfs) | |
1321 | return -EINVAL; | |
1322 | ||
1323 | /* verify link is up */ | |
1324 | if (!adapter->link_up) | |
1325 | return -EINVAL; | |
1326 | ||
1327 | /* verify we are linked at 10Gbps */ | |
1328 | link_speed = ixgbe_link_mbps(adapter); | |
1329 | if (link_speed != 10000) | |
1330 | return -EINVAL; | |
ff4ab206 | 1331 | |
ed616689 SC |
1332 | if (min_tx_rate) |
1333 | return -EINVAL; | |
1334 | ||
9f66d3ee | 1335 | /* rate limit cannot be less than 10Mbs or greater than link speed */ |
ed616689 | 1336 | if (max_tx_rate && ((max_tx_rate <= 10) || (max_tx_rate > link_speed))) |
ff4ab206 LL |
1337 | return -EINVAL; |
1338 | ||
9f66d3ee AD |
1339 | /* store values */ |
1340 | adapter->vf_rate_link_speed = link_speed; | |
ed616689 | 1341 | adapter->vfinfo[vf].tx_rate = max_tx_rate; |
9f66d3ee AD |
1342 | |
1343 | /* update hardware configuration */ | |
1344 | ixgbe_set_vf_rate_limit(adapter, vf); | |
ff4ab206 LL |
1345 | |
1346 | return 0; | |
7f01648a GR |
1347 | } |
1348 | ||
de4c7f65 GR |
1349 | int ixgbe_ndo_set_vf_spoofchk(struct net_device *netdev, int vf, bool setting) |
1350 | { | |
1351 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
1352 | int vf_target_reg = vf >> 3; | |
1353 | int vf_target_shift = vf % 8; | |
1354 | struct ixgbe_hw *hw = &adapter->hw; | |
1355 | u32 regval; | |
1356 | ||
600a507d ET |
1357 | if (vf >= adapter->num_vfs) |
1358 | return -EINVAL; | |
1359 | ||
de4c7f65 GR |
1360 | adapter->vfinfo[vf].spoofchk_enabled = setting; |
1361 | ||
1362 | regval = IXGBE_READ_REG(hw, IXGBE_PFVFSPOOF(vf_target_reg)); | |
1363 | regval &= ~(1 << vf_target_shift); | |
1364 | regval |= (setting << vf_target_shift); | |
1365 | IXGBE_WRITE_REG(hw, IXGBE_PFVFSPOOF(vf_target_reg), regval); | |
1366 | ||
1367 | if (adapter->vfinfo[vf].vlan_count) { | |
1368 | vf_target_shift += IXGBE_SPOOF_VLANAS_SHIFT; | |
1369 | regval = IXGBE_READ_REG(hw, IXGBE_PFVFSPOOF(vf_target_reg)); | |
1370 | regval &= ~(1 << vf_target_shift); | |
1371 | regval |= (setting << vf_target_shift); | |
1372 | IXGBE_WRITE_REG(hw, IXGBE_PFVFSPOOF(vf_target_reg), regval); | |
1373 | } | |
1374 | ||
1375 | return 0; | |
1376 | } | |
1377 | ||
e65ce0d3 VZ |
1378 | int ixgbe_ndo_set_vf_rss_query_en(struct net_device *netdev, int vf, |
1379 | bool setting) | |
1380 | { | |
1381 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
1382 | ||
1383 | /* This operation is currently supported only for 82599 and x540 | |
1384 | * devices. | |
1385 | */ | |
1386 | if (adapter->hw.mac.type < ixgbe_mac_82599EB || | |
1387 | adapter->hw.mac.type >= ixgbe_mac_X550) | |
1388 | return -EOPNOTSUPP; | |
1389 | ||
1390 | if (vf >= adapter->num_vfs) | |
1391 | return -EINVAL; | |
1392 | ||
1393 | adapter->vfinfo[vf].rss_query_enabled = setting; | |
1394 | ||
1395 | return 0; | |
1396 | } | |
1397 | ||
7f01648a GR |
1398 | int ixgbe_ndo_get_vf_config(struct net_device *netdev, |
1399 | int vf, struct ifla_vf_info *ivi) | |
1400 | { | |
1401 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
1402 | if (vf >= adapter->num_vfs) | |
1403 | return -EINVAL; | |
1404 | ivi->vf = vf; | |
1405 | memcpy(&ivi->mac, adapter->vfinfo[vf].vf_mac_addresses, ETH_ALEN); | |
ed616689 SC |
1406 | ivi->max_tx_rate = adapter->vfinfo[vf].tx_rate; |
1407 | ivi->min_tx_rate = 0; | |
7f01648a GR |
1408 | ivi->vlan = adapter->vfinfo[vf].pf_vlan; |
1409 | ivi->qos = adapter->vfinfo[vf].pf_qos; | |
de4c7f65 | 1410 | ivi->spoofchk = adapter->vfinfo[vf].spoofchk_enabled; |
e65ce0d3 | 1411 | ivi->rss_query_en = adapter->vfinfo[vf].rss_query_enabled; |
7f01648a GR |
1412 | return 0; |
1413 | } |