Commit | Line | Data |
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ae06c70b | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
51dce24b | 2 | /* Copyright(c) 1999 - 2018 Intel Corporation. */ |
9a799d71 AK |
3 | |
4 | #ifndef _IXGBE_COMMON_H_ | |
5 | #define _IXGBE_COMMON_H_ | |
6 | ||
7 | #include "ixgbe_type.h" | |
32f75466 | 8 | #include "ixgbe.h" |
9a799d71 | 9 | |
71161302 | 10 | u16 ixgbe_get_pcie_msix_count_generic(struct ixgbe_hw *hw); |
8f76c0f4 JJ |
11 | int ixgbe_init_hw_generic(struct ixgbe_hw *hw); |
12 | int ixgbe_start_hw_generic(struct ixgbe_hw *hw); | |
13 | int ixgbe_start_hw_gen2(struct ixgbe_hw *hw); | |
14 | int ixgbe_clear_hw_cntrs_generic(struct ixgbe_hw *hw); | |
15 | int ixgbe_read_pba_string_generic(struct ixgbe_hw *hw, u8 *pba_num, | |
e7cf745b | 16 | u32 pba_num_size); |
8f76c0f4 | 17 | int ixgbe_get_mac_addr_generic(struct ixgbe_hw *hw, u8 *mac_addr); |
ef1889d5 JK |
18 | enum ixgbe_bus_width ixgbe_convert_bus_width(u16 link_status); |
19 | enum ixgbe_bus_speed ixgbe_convert_bus_speed(u16 link_status); | |
8f76c0f4 | 20 | int ixgbe_get_bus_info_generic(struct ixgbe_hw *hw); |
11afc1b1 | 21 | void ixgbe_set_lan_id_multi_port_pcie(struct ixgbe_hw *hw); |
8f76c0f4 | 22 | int ixgbe_stop_adapter_generic(struct ixgbe_hw *hw); |
c44ade9e | 23 | |
8f76c0f4 JJ |
24 | int ixgbe_led_on_generic(struct ixgbe_hw *hw, u32 index); |
25 | int ixgbe_led_off_generic(struct ixgbe_hw *hw, u32 index); | |
26 | int ixgbe_init_led_link_act_generic(struct ixgbe_hw *hw); | |
c44ade9e | 27 | |
8f76c0f4 JJ |
28 | int ixgbe_init_eeprom_params_generic(struct ixgbe_hw *hw); |
29 | int ixgbe_write_eeprom_generic(struct ixgbe_hw *hw, u16 offset, u16 data); | |
30 | int ixgbe_write_eeprom_buffer_bit_bang_generic(struct ixgbe_hw *hw, u16 offset, | |
68c7005d | 31 | u16 words, u16 *data); |
8f76c0f4 JJ |
32 | int ixgbe_read_eerd_generic(struct ixgbe_hw *hw, u16 offset, u16 *data); |
33 | int ixgbe_read_eerd_buffer_generic(struct ixgbe_hw *hw, u16 offset, | |
68c7005d | 34 | u16 words, u16 *data); |
8f76c0f4 JJ |
35 | int ixgbe_write_eewr_generic(struct ixgbe_hw *hw, u16 offset, u16 data); |
36 | int ixgbe_write_eewr_buffer_generic(struct ixgbe_hw *hw, u16 offset, | |
68c7005d | 37 | u16 words, u16 *data); |
8f76c0f4 | 38 | int ixgbe_read_eeprom_bit_bang_generic(struct ixgbe_hw *hw, u16 offset, |
e7cf745b | 39 | u16 *data); |
8f76c0f4 | 40 | int ixgbe_read_eeprom_buffer_bit_bang_generic(struct ixgbe_hw *hw, u16 offset, |
68c7005d | 41 | u16 words, u16 *data); |
8f76c0f4 JJ |
42 | int ixgbe_calc_eeprom_checksum_generic(struct ixgbe_hw *hw); |
43 | int ixgbe_validate_eeprom_checksum_generic(struct ixgbe_hw *hw, | |
e7cf745b | 44 | u16 *checksum_val); |
8f76c0f4 | 45 | int ixgbe_update_eeprom_checksum_generic(struct ixgbe_hw *hw); |
c44ade9e | 46 | |
8f76c0f4 | 47 | int ixgbe_set_rar_generic(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq, |
e7cf745b | 48 | u32 enable_addr); |
8f76c0f4 JJ |
49 | int ixgbe_clear_rar_generic(struct ixgbe_hw *hw, u32 index); |
50 | int ixgbe_init_rx_addrs_generic(struct ixgbe_hw *hw); | |
51 | int ixgbe_update_mc_addr_list_generic(struct ixgbe_hw *hw, | |
2853eb89 | 52 | struct net_device *netdev); |
8f76c0f4 JJ |
53 | int ixgbe_enable_mc_generic(struct ixgbe_hw *hw); |
54 | int ixgbe_disable_mc_generic(struct ixgbe_hw *hw); | |
55 | int ixgbe_disable_rx_buff_generic(struct ixgbe_hw *hw); | |
56 | int ixgbe_enable_rx_buff_generic(struct ixgbe_hw *hw); | |
57 | int ixgbe_enable_rx_dma_generic(struct ixgbe_hw *hw, u32 regval); | |
58 | int ixgbe_fc_enable_generic(struct ixgbe_hw *hw); | |
59 | int ixgbe_setup_fc_generic(struct ixgbe_hw *); | |
73d80953 | 60 | bool ixgbe_device_supports_autoneg_fc(struct ixgbe_hw *hw); |
786e9a5f | 61 | void ixgbe_fc_autoneg(struct ixgbe_hw *hw); |
9a799d71 | 62 | |
8f76c0f4 | 63 | int ixgbe_acquire_swfw_sync(struct ixgbe_hw *hw, u32 mask); |
030eaece | 64 | void ixgbe_release_swfw_sync(struct ixgbe_hw *hw, u32 mask); |
8f76c0f4 JJ |
65 | int ixgbe_get_san_mac_addr_generic(struct ixgbe_hw *hw, u8 *san_mac_addr); |
66 | int ixgbe_set_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq); | |
67 | int ixgbe_set_vmdq_san_mac_generic(struct ixgbe_hw *hw, u32 vmdq); | |
68 | int ixgbe_clear_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq); | |
69 | int ixgbe_init_uta_tables_generic(struct ixgbe_hw *hw); | |
70 | int ixgbe_set_vfta_generic(struct ixgbe_hw *hw, u32 vlan, | |
b6488b66 | 71 | u32 vind, bool vlan_on, bool vlvf_bypass); |
8f76c0f4 JJ |
72 | int ixgbe_clear_vfta_generic(struct ixgbe_hw *hw); |
73 | int ixgbe_check_mac_link_generic(struct ixgbe_hw *hw, | |
e7cf745b JK |
74 | ixgbe_link_speed *speed, |
75 | bool *link_up, bool link_up_wait_to_complete); | |
8f76c0f4 | 76 | int ixgbe_get_wwn_prefix_generic(struct ixgbe_hw *hw, u16 *wwnn_prefix, |
e7cf745b | 77 | u16 *wwpn_prefix); |
429d6a3b | 78 | |
8f76c0f4 JJ |
79 | int prot_autoc_read_generic(struct ixgbe_hw *hw, bool *, u32 *reg_val); |
80 | int prot_autoc_write_generic(struct ixgbe_hw *hw, u32 reg_val, bool locked); | |
429d6a3b | 81 | |
8f76c0f4 JJ |
82 | int ixgbe_blink_led_start_generic(struct ixgbe_hw *hw, u32 index); |
83 | int ixgbe_blink_led_stop_generic(struct ixgbe_hw *hw, u32 index); | |
77f192af | 84 | void ixgbe_set_mac_anti_spoofing(struct ixgbe_hw *hw, bool enable, int vf); |
a985b6c3 | 85 | void ixgbe_set_vlan_anti_spoofing(struct ixgbe_hw *hw, bool enable, int vf); |
8f76c0f4 JJ |
86 | int ixgbe_get_device_caps_generic(struct ixgbe_hw *hw, u16 *device_caps); |
87 | int ixgbe_set_fw_drv_ver_generic(struct ixgbe_hw *hw, u8 maj, u8 min, | |
cb8e0514 TN |
88 | u8 build, u8 ver, u16 len, const char *str); |
89 | u8 ixgbe_calculate_checksum(u8 *buffer, u32 length); | |
8f76c0f4 | 90 | int ixgbe_host_interface_command(struct ixgbe_hw *hw, void *, u32 length, |
5cffde30 | 91 | u32 timeout, bool return_data); |
8f76c0f4 JJ |
92 | int ixgbe_hic_unlocked(struct ixgbe_hw *hw, u32 *buffer, u32 len, u32 timeout); |
93 | int ixgbe_fw_phy_activity(struct ixgbe_hw *hw, u16 activity, | |
12c78ef0 | 94 | u32 (*data)[FW_PHY_ACT_DATA_COUNT]); |
ff9d1a5a | 95 | void ixgbe_clear_tx_pending(struct ixgbe_hw *hw); |
bd8069ac | 96 | bool ixgbe_mng_present(struct ixgbe_hw *hw); |
7155d051 | 97 | bool ixgbe_mng_enabled(struct ixgbe_hw *hw); |
87c12017 | 98 | |
80605c65 JF |
99 | void ixgbe_set_rxpba_generic(struct ixgbe_hw *hw, int num_pb, |
100 | u32 headroom, int strategy); | |
101 | ||
9a900eca DS |
102 | extern const u32 ixgbe_mvals_8259X[IXGBE_MVALS_IDX_LIMIT]; |
103 | ||
e1ea9158 DS |
104 | #define IXGBE_I2C_THERMAL_SENSOR_ADDR 0xF8 |
105 | #define IXGBE_EMC_INTERNAL_DATA 0x00 | |
106 | #define IXGBE_EMC_INTERNAL_THERM_LIMIT 0x20 | |
107 | #define IXGBE_EMC_DIODE1_DATA 0x01 | |
108 | #define IXGBE_EMC_DIODE1_THERM_LIMIT 0x19 | |
109 | #define IXGBE_EMC_DIODE2_DATA 0x23 | |
110 | #define IXGBE_EMC_DIODE2_THERM_LIMIT 0x1A | |
111 | #define IXGBE_EMC_DIODE3_DATA 0x2A | |
112 | #define IXGBE_EMC_DIODE3_THERM_LIMIT 0x30 | |
113 | ||
8f76c0f4 JJ |
114 | int ixgbe_get_thermal_sensor_data_generic(struct ixgbe_hw *hw); |
115 | int ixgbe_init_thermal_sensor_thresh_generic(struct ixgbe_hw *hw); | |
73834aec PG |
116 | void ixgbe_get_etk_id(struct ixgbe_hw *hw, |
117 | struct ixgbe_nvm_version *nvm_ver); | |
118 | void ixgbe_get_oem_prod_version(struct ixgbe_hw *hw, | |
119 | struct ixgbe_nvm_version *nvm_ver); | |
120 | void ixgbe_get_orom_version(struct ixgbe_hw *hw, | |
121 | struct ixgbe_nvm_version *nvm_ver); | |
1f9ac57c DS |
122 | void ixgbe_disable_rx_generic(struct ixgbe_hw *hw); |
123 | void ixgbe_enable_rx_generic(struct ixgbe_hw *hw); | |
8f76c0f4 | 124 | int ixgbe_setup_mac_link_multispeed_fiber(struct ixgbe_hw *hw, |
6d373a1b MR |
125 | ixgbe_link_speed speed, |
126 | bool autoneg_wait_to_complete); | |
127 | void ixgbe_set_soft_rate_select_speed(struct ixgbe_hw *hw, | |
128 | ixgbe_link_speed speed); | |
e1ea9158 | 129 | |
1aa37845 | 130 | #define IXGBE_FAILED_READ_RETRIES 5 |
2a1a091c | 131 | #define IXGBE_FAILED_READ_REG 0xffffffffU |
14438464 MR |
132 | #define IXGBE_FAILED_READ_CFG_DWORD 0xffffffffU |
133 | #define IXGBE_FAILED_READ_CFG_WORD 0xffffU | |
134 | ||
135 | u16 ixgbe_read_pci_cfg_word(struct ixgbe_hw *hw, u32 reg); | |
ed19231c | 136 | void ixgbe_write_pci_cfg_word(struct ixgbe_hw *hw, u32 reg, u16 value); |
2a1a091c MR |
137 | |
138 | static inline bool ixgbe_removed(void __iomem *addr) | |
139 | { | |
140 | return unlikely(!addr); | |
141 | } | |
142 | ||
84227bcd MR |
143 | static inline void ixgbe_write_reg(struct ixgbe_hw *hw, u32 reg, u32 value) |
144 | { | |
6aa7de05 | 145 | u8 __iomem *reg_addr = READ_ONCE(hw->hw_addr); |
b12babd4 MR |
146 | |
147 | if (ixgbe_removed(reg_addr)) | |
148 | return; | |
149 | writel(value, reg_addr + reg); | |
84227bcd MR |
150 | } |
151 | #define IXGBE_WRITE_REG(a, reg, value) ixgbe_write_reg((a), (reg), (value)) | |
9a799d71 | 152 | |
11afc1b1 | 153 | #ifndef writeq |
84227bcd MR |
154 | #define writeq writeq |
155 | static inline void writeq(u64 val, void __iomem *addr) | |
156 | { | |
157 | writel((u32)val, addr); | |
158 | writel((u32)(val >> 32), addr + 4); | |
159 | } | |
11afc1b1 PW |
160 | #endif |
161 | ||
84227bcd MR |
162 | static inline void ixgbe_write_reg64(struct ixgbe_hw *hw, u32 reg, u64 value) |
163 | { | |
6aa7de05 | 164 | u8 __iomem *reg_addr = READ_ONCE(hw->hw_addr); |
b12babd4 MR |
165 | |
166 | if (ixgbe_removed(reg_addr)) | |
167 | return; | |
168 | writeq(value, reg_addr + reg); | |
84227bcd MR |
169 | } |
170 | #define IXGBE_WRITE_REG64(a, reg, value) ixgbe_write_reg64((a), (reg), (value)) | |
11afc1b1 | 171 | |
f8e2472f | 172 | u32 ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg); |
84227bcd | 173 | #define IXGBE_READ_REG(a, reg) ixgbe_read_reg((a), (reg)) |
9a799d71 | 174 | |
84227bcd MR |
175 | #define IXGBE_WRITE_REG_ARRAY(a, reg, offset, value) \ |
176 | ixgbe_write_reg((a), (reg) + ((offset) << 2), (value)) | |
9a799d71 | 177 | |
84227bcd MR |
178 | #define IXGBE_READ_REG_ARRAY(a, reg, offset) \ |
179 | ixgbe_read_reg((a), (reg) + ((offset) << 2)) | |
9a799d71 | 180 | |
84227bcd | 181 | #define IXGBE_WRITE_FLUSH(a) ixgbe_read_reg((a), IXGBE_STATUS) |
9a799d71 | 182 | |
be0c27b4 MR |
183 | #define ixgbe_hw_to_netdev(hw) (((struct ixgbe_adapter *)(hw)->back)->netdev) |
184 | ||
9a799d71 | 185 | #define hw_dbg(hw, format, arg...) \ |
be0c27b4 MR |
186 | netdev_dbg(ixgbe_hw_to_netdev(hw), format, ## arg) |
187 | #define hw_err(hw, format, arg...) \ | |
188 | netdev_err(ixgbe_hw_to_netdev(hw), format, ## arg) | |
849c4542 ET |
189 | #define e_dev_info(format, arg...) \ |
190 | dev_info(&adapter->pdev->dev, format, ## arg) | |
191 | #define e_dev_warn(format, arg...) \ | |
192 | dev_warn(&adapter->pdev->dev, format, ## arg) | |
193 | #define e_dev_err(format, arg...) \ | |
194 | dev_err(&adapter->pdev->dev, format, ## arg) | |
195 | #define e_dev_notice(format, arg...) \ | |
196 | dev_notice(&adapter->pdev->dev, format, ## arg) | |
396e799c ET |
197 | #define e_info(msglvl, format, arg...) \ |
198 | netif_info(adapter, msglvl, adapter->netdev, format, ## arg) | |
199 | #define e_err(msglvl, format, arg...) \ | |
200 | netif_err(adapter, msglvl, adapter->netdev, format, ## arg) | |
201 | #define e_warn(msglvl, format, arg...) \ | |
202 | netif_warn(adapter, msglvl, adapter->netdev, format, ## arg) | |
203 | #define e_crit(msglvl, format, arg...) \ | |
204 | netif_crit(adapter, msglvl, adapter->netdev, format, ## arg) | |
9a799d71 | 205 | #endif /* IXGBE_COMMON */ |