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ice: Add 52 byte RSS hash key support
[linux-2.6-block.git] / drivers / net / ethernet / intel / ice / ice_lib.c
CommitLineData
45d3d428
AV		 1// SPDX-License-Identifier: GPL-2.0
2/* Copyright (c) 2018, Intel Corporation. */
3
4#include "ice.h"
5#include "ice_lib.h"
7b9ffc76 6#include "ice_dcb_lib.h"
45d3d428 7
72adf242
AV		 8/**
9 * ice_setup_rx_ctx - Configure a receive ring context
10 * @ring: The Rx ring to configure
11 *
12 * Configure the Rx descriptor ring in RLAN context.
13 */
14static int ice_setup_rx_ctx(struct ice_ring *ring)
15{
16 struct ice_vsi *vsi = ring->vsi;
17 struct ice_hw *hw = &vsi->back->hw;
18 u32 rxdid = ICE_RXDID_FLEX_NIC;
19 struct ice_rlan_ctx rlan_ctx;
20 u32 regval;
21 u16 pf_q;
22 int err;
23
d337f2af 24 /* what is Rx queue number in global space of 2K Rx queues */
72adf242
AV		 25 pf_q = vsi->rxq_map[ring->q_index];
26
27 /* clear the context structure first */
28 memset(&rlan_ctx, 0, sizeof(rlan_ctx));
29
30 rlan_ctx.base = ring->dma >> 7;
31
32 rlan_ctx.qlen = ring->count;
33
34 /* Receive Packet Data Buffer Size.
35 * The Packet Data Buffer Size is defined in 128 byte units.
36 */
37 rlan_ctx.dbuf = vsi->rx_buf_len >> ICE_RLAN_CTX_DBUF_S;
38
39 /* use 32 byte descriptors */
40 rlan_ctx.dsize = 1;
41
42 /* Strip the Ethernet CRC bytes before the packet is posted to host
43 * memory.
44 */
45 rlan_ctx.crcstrip = 1;
46
47 /* L2TSEL flag defines the reported L2 Tags in the receive descriptor */
48 rlan_ctx.l2tsel = 1;
49
50 rlan_ctx.dtype = ICE_RX_DTYPE_NO_SPLIT;
51 rlan_ctx.hsplit_0 = ICE_RLAN_RX_HSPLIT_0_NO_SPLIT;
52 rlan_ctx.hsplit_1 = ICE_RLAN_RX_HSPLIT_1_NO_SPLIT;
53
54 /* This controls whether VLAN is stripped from inner headers
55 * The VLAN in the inner L2 header is stripped to the receive
56 * descriptor if enabled by this flag.
57 */
58 rlan_ctx.showiv = 0;
59
60 /* Max packet size for this queue - must not be set to a larger value
61 * than 5 x DBUF
62 */
63 rlan_ctx.rxmax = min_t(u16, vsi->max_frame,
64 ICE_MAX_CHAINED_RX_BUFS * vsi->rx_buf_len);
65
66 /* Rx queue threshold in units of 64 */
67 rlan_ctx.lrxqthresh = 1;
68
69 /* Enable Flexible Descriptors in the queue context which
70 * allows this driver to select a specific receive descriptor format
71 */
8ede0178
AV		 72 if (vsi->type != ICE_VSI_VF) {
73 regval = rd32(hw, QRXFLXP_CNTXT(pf_q));
74 regval |= (rxdid << QRXFLXP_CNTXT_RXDID_IDX_S) &
75 QRXFLXP_CNTXT_RXDID_IDX_M;
76
f9867df6 77 /* increasing context priority to pick up profile ID;
8ede0178
AV		 78 * default is 0x01; setting to 0x03 to ensure profile
79 * is programming if prev context is of same priority
80 */
81 regval |= (0x03 << QRXFLXP_CNTXT_RXDID_PRIO_S) &
82 QRXFLXP_CNTXT_RXDID_PRIO_M;
72adf242 83
8ede0178
AV		 84 wr32(hw, QRXFLXP_CNTXT(pf_q), regval);
85 }
72adf242
AV		 86
87 /* Absolute queue number out of 2K needs to be passed */
88 err = ice_write_rxq_ctx(hw, &rlan_ctx, pf_q);
89 if (err) {
90 dev_err(&vsi->back->pdev->dev,
91 "Failed to set LAN Rx queue context for absolute Rx queue %d error: %d\n",
92 pf_q, err);
93 return -EIO;
94 }
95
8ede0178
AV		 96 if (vsi->type == ICE_VSI_VF)
97 return 0;
98
72adf242
AV		 99 /* init queue specific tail register */
100 ring->tail = hw->hw_addr + QRX_TAIL(pf_q);
101 writel(0, ring->tail);
102 ice_alloc_rx_bufs(ring, ICE_DESC_UNUSED(ring));
103
104 return 0;
105}
106
107/**
108 * ice_setup_tx_ctx - setup a struct ice_tlan_ctx instance
109 * @ring: The Tx ring to configure
110 * @tlan_ctx: Pointer to the Tx LAN queue context structure to be initialized
111 * @pf_q: queue index in the PF space
112 *
113 * Configure the Tx descriptor ring in TLAN context.
114 */
115static void
116ice_setup_tx_ctx(struct ice_ring *ring, struct ice_tlan_ctx *tlan_ctx, u16 pf_q)
117{
118 struct ice_vsi *vsi = ring->vsi;
119 struct ice_hw *hw = &vsi->back->hw;
120
121 tlan_ctx->base = ring->dma >> ICE_TLAN_CTX_BASE_S;
122
123 tlan_ctx->port_num = vsi->port_info->lport;
124
125 /* Transmit Queue Length */
126 tlan_ctx->qlen = ring->count;
127
a629cf0a
AV		 128 ice_set_cgd_num(tlan_ctx, ring);
129
72adf242
AV		 130 /* PF number */
131 tlan_ctx->pf_num = hw->pf_id;
132
133 /* queue belongs to a specific VSI type
134 * VF / VM index should be programmed per vmvf_type setting:
135 * for vmvf_type = VF, it is VF number between 0-256
136 * for vmvf_type = VM, it is VM number between 0-767
137 * for PF or EMP this field should be set to zero
138 */
139 switch (vsi->type) {
140 case ICE_VSI_PF:
141 tlan_ctx->vmvf_type = ICE_TLAN_CTX_VMVF_TYPE_PF;
142 break;
8ede0178 143 case ICE_VSI_VF:
f9867df6 144 /* Firmware expects vmvf_num to be absolute VF ID */
8ede0178
AV		 145 tlan_ctx->vmvf_num = hw->func_caps.vf_base_id + vsi->vf_id;
146 tlan_ctx->vmvf_type = ICE_TLAN_CTX_VMVF_TYPE_VF;
147 break;
72adf242
AV		 148 default:
149 return;
150 }
151
152 /* make sure the context is associated with the right VSI */
4fb33f31 153 tlan_ctx->src_vsi = ice_get_hw_vsi_num(hw, vsi->idx);
72adf242
AV		 154
155 tlan_ctx->tso_ena = ICE_TX_LEGACY;
156 tlan_ctx->tso_qnum = pf_q;
157
158 /* Legacy or Advanced Host Interface:
159 * 0: Advanced Host Interface
160 * 1: Legacy Host Interface
161 */
162 tlan_ctx->legacy_int = ICE_TX_LEGACY;
163}
164
165/**
166 * ice_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
167 * @pf: the PF being configured
168 * @pf_q: the PF queue
169 * @ena: enable or disable state of the queue
170 *
171 * This routine will wait for the given Rx queue of the PF to reach the
172 * enabled or disabled state.
173 * Returns -ETIMEDOUT in case of failing to reach the requested state after
174 * multiple retries; else will return 0 in case of success.
175 */
176static int ice_pf_rxq_wait(struct ice_pf *pf, int pf_q, bool ena)
177{
178 int i;
179
7b8ff0f9 180 for (i = 0; i < ICE_Q_WAIT_MAX_RETRY; i++) {
16c3301b
BC		 181 if (ena == !!(rd32(&pf->hw, QRX_CTRL(pf_q)) &
182 QRX_CTRL_QENA_STAT_M))
183 return 0;
72adf242 184
7b8ff0f9 185 usleep_range(20, 40);
72adf242 186 }
72adf242 187
16c3301b 188 return -ETIMEDOUT;
72adf242
AV		 189}
190
191/**
192 * ice_vsi_ctrl_rx_rings - Start or stop a VSI's Rx rings
193 * @vsi: the VSI being configured
194 * @ena: start or stop the Rx rings
195 */
196static int ice_vsi_ctrl_rx_rings(struct ice_vsi *vsi, bool ena)
197{
198 struct ice_pf *pf = vsi->back;
199 struct ice_hw *hw = &pf->hw;
200 int i, j, ret = 0;
201
202 for (i = 0; i < vsi->num_rxq; i++) {
203 int pf_q = vsi->rxq_map[i];
204 u32 rx_reg;
205
206 for (j = 0; j < ICE_Q_WAIT_MAX_RETRY; j++) {
207 rx_reg = rd32(hw, QRX_CTRL(pf_q));
208 if (((rx_reg >> QRX_CTRL_QENA_REQ_S) & 1) ==
209 ((rx_reg >> QRX_CTRL_QENA_STAT_S) & 1))
210 break;
211 usleep_range(1000, 2000);
212 }
213
214 /* Skip if the queue is already in the requested state */
215 if (ena == !!(rx_reg & QRX_CTRL_QENA_STAT_M))
216 continue;
217
218 /* turn on/off the queue */
219 if (ena)
220 rx_reg |= QRX_CTRL_QENA_REQ_M;
221 else
222 rx_reg &= ~QRX_CTRL_QENA_REQ_M;
223 wr32(hw, QRX_CTRL(pf_q), rx_reg);
224
225 /* wait for the change to finish */
226 ret = ice_pf_rxq_wait(pf, pf_q, ena);
227 if (ret) {
228 dev_err(&pf->pdev->dev,
229 "VSI idx %d Rx ring %d %sable timeout\n",
230 vsi->idx, pf_q, (ena ? "en" : "dis"));
231 break;
232 }
233 }
234
235 return ret;
236}
237
28c2a645
AV		 238/**
239 * ice_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the VSI
240 * @vsi: VSI pointer
241 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
242 *
243 * On error: returns error code (negative)
244 * On success: returns 0
245 */
37bb8390 246static int ice_vsi_alloc_arrays(struct ice_vsi *vsi, bool alloc_qvectors)
28c2a645
AV		 247{
248 struct ice_pf *pf = vsi->back;
249
250 /* allocate memory for both Tx and Rx ring pointers */
251 vsi->tx_rings = devm_kcalloc(&pf->pdev->dev, vsi->alloc_txq,
c6dfd690 252 sizeof(*vsi->tx_rings), GFP_KERNEL);
28c2a645
AV		 253 if (!vsi->tx_rings)
254 goto err_txrings;
255
256 vsi->rx_rings = devm_kcalloc(&pf->pdev->dev, vsi->alloc_rxq,
c6dfd690 257 sizeof(*vsi->rx_rings), GFP_KERNEL);
28c2a645
AV		 258 if (!vsi->rx_rings)
259 goto err_rxrings;
260
261 if (alloc_qvectors) {
262 /* allocate memory for q_vector pointers */
263 vsi->q_vectors = devm_kcalloc(&pf->pdev->dev,
264 vsi->num_q_vectors,
c6dfd690 265 sizeof(*vsi->q_vectors),
28c2a645
AV		 266 GFP_KERNEL);
267 if (!vsi->q_vectors)
268 goto err_vectors;
269 }
270
271 return 0;
272
273err_vectors:
274 devm_kfree(&pf->pdev->dev, vsi->rx_rings);
275err_rxrings:
276 devm_kfree(&pf->pdev->dev, vsi->tx_rings);
277err_txrings:
278 return -ENOMEM;
279}
280
281/**
ad71b256
BC		 282 * ice_vsi_set_num_desc - Set number of descriptors for queues on this VSI
283 * @vsi: the VSI being configured
284 */
285static void ice_vsi_set_num_desc(struct ice_vsi *vsi)
286{
287 switch (vsi->type) {
288 case ICE_VSI_PF:
289 vsi->num_rx_desc = ICE_DFLT_NUM_RX_DESC;
290 vsi->num_tx_desc = ICE_DFLT_NUM_TX_DESC;
291 break;
292 default:
293 dev_dbg(&vsi->back->pdev->dev,
294 "Not setting number of Tx/Rx descriptors for VSI type %d\n",
295 vsi->type);
296 break;
297 }
298}
299
300/**
301 * ice_vsi_set_num_qs - Set number of queues, descriptors and vectors for a VSI
28c2a645 302 * @vsi: the VSI being configured
f9867df6 303 * @vf_id: ID of the VF being configured
28c2a645
AV		 304 *
305 * Return 0 on success and a negative value on error
306 */
5743020d 307static void ice_vsi_set_num_qs(struct ice_vsi *vsi, u16 vf_id)
28c2a645
AV		 308{
309 struct ice_pf *pf = vsi->back;
310
5743020d
AA		 311 struct ice_vf *vf = NULL;
312
313 if (vsi->type == ICE_VSI_VF)
314 vsi->vf_id = vf_id;
315
28c2a645
AV		 316 switch (vsi->type) {
317 case ICE_VSI_PF:
318 vsi->alloc_txq = pf->num_lan_tx;
319 vsi->alloc_rxq = pf->num_lan_rx;
28c2a645
AV		 320 vsi->num_q_vectors = max_t(int, pf->num_lan_rx, pf->num_lan_tx);
321 break;
8ede0178 322 case ICE_VSI_VF:
5743020d
AA		 323 vf = &pf->vf[vsi->vf_id];
324 vsi->alloc_txq = vf->num_vf_qs;
325 vsi->alloc_rxq = vf->num_vf_qs;
8ede0178
AV		 326 /* pf->num_vf_msix includes (VF miscellaneous vector +
327 * data queue interrupts). Since vsi->num_q_vectors is number
328 * of queues vectors, subtract 1 from the original vector
329 * count
330 */
331 vsi->num_q_vectors = pf->num_vf_msix - 1;
332 break;
28c2a645
AV		 333 default:
334 dev_warn(&vsi->back->pdev->dev, "Unknown VSI type %d\n",
335 vsi->type);
336 break;
337 }
ad71b256
BC		 338
339 ice_vsi_set_num_desc(vsi);
28c2a645
AV		 340}
341
342/**
343 * ice_get_free_slot - get the next non-NULL location index in array
344 * @array: array to search
345 * @size: size of the array
346 * @curr: last known occupied index to be used as a search hint
347 *
348 * void * is being used to keep the functionality generic. This lets us use this
349 * function on any array of pointers.
350 */
37bb8390 351static int ice_get_free_slot(void *array, int size, int curr)
28c2a645
AV		 352{
353 int **tmp_array = (int **)array;
354 int next;
355
356 if (curr < (size - 1) && !tmp_array[curr + 1]) {
357 next = curr + 1;
358 } else {
359 int i = 0;
360
361 while ((i < size) && (tmp_array[i]))
362 i++;
363 if (i == size)
364 next = ICE_NO_VSI;
365 else
366 next = i;
367 }
368 return next;
369}
370
5153a18e
AV		 371/**
372 * ice_vsi_delete - delete a VSI from the switch
373 * @vsi: pointer to VSI being removed
374 */
375void ice_vsi_delete(struct ice_vsi *vsi)
376{
377 struct ice_pf *pf = vsi->back;
198a666a 378 struct ice_vsi_ctx *ctxt;
5153a18e
AV		 379 enum ice_status status;
380
198a666a
BA		 381 ctxt = devm_kzalloc(&pf->pdev->dev, sizeof(*ctxt), GFP_KERNEL);
382 if (!ctxt)
383 return;
384
8ede0178 385 if (vsi->type == ICE_VSI_VF)
198a666a
BA		 386 ctxt->vf_num = vsi->vf_id;
387 ctxt->vsi_num = vsi->vsi_num;
5153a18e 388
198a666a 389 memcpy(&ctxt->info, &vsi->info, sizeof(ctxt->info));
5153a18e 390
198a666a 391 status = ice_free_vsi(&pf->hw, vsi->idx, ctxt, false, NULL);
5153a18e
AV		 392 if (status)
393 dev_err(&pf->pdev->dev, "Failed to delete VSI %i in FW\n",
394 vsi->vsi_num);
198a666a
BA		 395
396 devm_kfree(&pf->pdev->dev, ctxt);
5153a18e
AV		 397}
398
07309a0e
AV		 399/**
400 * ice_vsi_free_arrays - clean up VSI resources
401 * @vsi: pointer to VSI being cleared
402 * @free_qvectors: bool to specify if q_vectors should be deallocated
403 */
df0f8479 404static void ice_vsi_free_arrays(struct ice_vsi *vsi, bool free_qvectors)
07309a0e
AV		 405{
406 struct ice_pf *pf = vsi->back;
407
408 /* free the ring and vector containers */
409 if (free_qvectors && vsi->q_vectors) {
410 devm_kfree(&pf->pdev->dev, vsi->q_vectors);
411 vsi->q_vectors = NULL;
412 }
413 if (vsi->tx_rings) {
414 devm_kfree(&pf->pdev->dev, vsi->tx_rings);
415 vsi->tx_rings = NULL;
416 }
417 if (vsi->rx_rings) {
418 devm_kfree(&pf->pdev->dev, vsi->rx_rings);
419 vsi->rx_rings = NULL;
420 }
421}
422
423/**
424 * ice_vsi_clear - clean up and deallocate the provided VSI
425 * @vsi: pointer to VSI being cleared
426 *
427 * This deallocates the VSI's queue resources, removes it from the PF's
428 * VSI array if necessary, and deallocates the VSI
429 *
430 * Returns 0 on success, negative on failure
431 */
432int ice_vsi_clear(struct ice_vsi *vsi)
433{
434 struct ice_pf *pf = NULL;
435
436 if (!vsi)
437 return 0;
438
439 if (!vsi->back)
440 return -EINVAL;
441
442 pf = vsi->back;
443
444 if (!pf->vsi[vsi->idx] || pf->vsi[vsi->idx] != vsi) {
445 dev_dbg(&pf->pdev->dev, "vsi does not exist at pf->vsi[%d]\n",
446 vsi->idx);
447 return -EINVAL;
448 }
449
450 mutex_lock(&pf->sw_mutex);
451 /* updates the PF for this cleared VSI */
452
453 pf->vsi[vsi->idx] = NULL;
454 if (vsi->idx < pf->next_vsi)
455 pf->next_vsi = vsi->idx;
456
457 ice_vsi_free_arrays(vsi, true);
458 mutex_unlock(&pf->sw_mutex);
459 devm_kfree(&pf->pdev->dev, vsi);
460
461 return 0;
462}
463
5153a18e
AV		 464/**
465 * ice_msix_clean_rings - MSIX mode Interrupt Handler
466 * @irq: interrupt number
467 * @data: pointer to a q_vector
468 */
f3aaaaaa 469static irqreturn_t ice_msix_clean_rings(int __always_unused irq, void *data)
5153a18e
AV		 470{
471 struct ice_q_vector *q_vector = (struct ice_q_vector *)data;
472
473 if (!q_vector->tx.ring && !q_vector->rx.ring)
474 return IRQ_HANDLED;
475
476 napi_schedule(&q_vector->napi);
477
478 return IRQ_HANDLED;
479}
480
37bb8390
AV		 481/**
482 * ice_vsi_alloc - Allocates the next available struct VSI in the PF
483 * @pf: board private structure
484 * @type: type of VSI
f9867df6 485 * @vf_id: ID of the VF being configured
37bb8390
AV		 486 *
487 * returns a pointer to a VSI on success, NULL on failure.
488 */
5743020d
AA		 489static struct ice_vsi *
490ice_vsi_alloc(struct ice_pf *pf, enum ice_vsi_type type, u16 vf_id)
37bb8390
AV		 491{
492 struct ice_vsi *vsi = NULL;
493
494 /* Need to protect the allocation of the VSIs at the PF level */
495 mutex_lock(&pf->sw_mutex);
496
497 /* If we have already allocated our maximum number of VSIs,
498 * pf->next_vsi will be ICE_NO_VSI. If not, pf->next_vsi index
499 * is available to be populated
500 */
501 if (pf->next_vsi == ICE_NO_VSI) {
502 dev_dbg(&pf->pdev->dev, "out of VSI slots!\n");
503 goto unlock_pf;
504 }
505
506 vsi = devm_kzalloc(&pf->pdev->dev, sizeof(*vsi), GFP_KERNEL);
507 if (!vsi)
508 goto unlock_pf;
509
510 vsi->type = type;
511 vsi->back = pf;
512 set_bit(__ICE_DOWN, vsi->state);
513 vsi->idx = pf->next_vsi;
514 vsi->work_lmt = ICE_DFLT_IRQ_WORK;
515
5743020d
AA		 516 if (type == ICE_VSI_VF)
517 ice_vsi_set_num_qs(vsi, vf_id);
518 else
519 ice_vsi_set_num_qs(vsi, ICE_INVAL_VFID);
37bb8390
AV		 520
521 switch (vsi->type) {
522 case ICE_VSI_PF:
523 if (ice_vsi_alloc_arrays(vsi, true))
524 goto err_rings;
525
526 /* Setup default MSIX irq handler for VSI */
527 vsi->irq_handler = ice_msix_clean_rings;
528 break;
8ede0178
AV		 529 case ICE_VSI_VF:
530 if (ice_vsi_alloc_arrays(vsi, true))
531 goto err_rings;
532 break;
37bb8390
AV		 533 default:
534 dev_warn(&pf->pdev->dev, "Unknown VSI type %d\n", vsi->type);
535 goto unlock_pf;
536 }
537
538 /* fill VSI slot in the PF struct */
539 pf->vsi[pf->next_vsi] = vsi;
540
541 /* prepare pf->next_vsi for next use */
542 pf->next_vsi = ice_get_free_slot(pf->vsi, pf->num_alloc_vsi,
543 pf->next_vsi);
544 goto unlock_pf;
545
546err_rings:
547 devm_kfree(&pf->pdev->dev, vsi);
548 vsi = NULL;
549unlock_pf:
550 mutex_unlock(&pf->sw_mutex);
551 return vsi;
552}
553
df0f8479 554/**
03f7a986
AV		 555 * __ice_vsi_get_qs_contig - Assign a contiguous chunk of queues to VSI
556 * @qs_cfg: gathered variables needed for PF->VSI queues assignment
df0f8479 557 *
03f7a986 558 * Return 0 on success and -ENOMEM in case of no left space in PF queue bitmap
df0f8479 559 */
03f7a986 560static int __ice_vsi_get_qs_contig(struct ice_qs_cfg *qs_cfg)
df0f8479 561{
03f7a986 562 int offset, i;
df0f8479 563
03f7a986
AV		 564 mutex_lock(qs_cfg->qs_mutex);
565 offset = bitmap_find_next_zero_area(qs_cfg->pf_map, qs_cfg->pf_map_size,
566 0, qs_cfg->q_count, 0);
567 if (offset >= qs_cfg->pf_map_size) {
568 mutex_unlock(qs_cfg->qs_mutex);
569 return -ENOMEM;
df0f8479
AV		 570 }
571
03f7a986
AV		 572 bitmap_set(qs_cfg->pf_map, offset, qs_cfg->q_count);
573 for (i = 0; i < qs_cfg->q_count; i++)
574 qs_cfg->vsi_map[i + qs_cfg->vsi_map_offset] = i + offset;
575 mutex_unlock(qs_cfg->qs_mutex);
df0f8479 576
03f7a986 577 return 0;
df0f8479
AV		 578}
579
580/**
03f7a986
AV		 581 * __ice_vsi_get_qs_sc - Assign a scattered queues from PF to VSI
582 * @qs_cfg: gathered variables needed for PF->VSI queues assignment
df0f8479 583 *
03f7a986 584 * Return 0 on success and -ENOMEM in case of no left space in PF queue bitmap
df0f8479 585 */
03f7a986 586static int __ice_vsi_get_qs_sc(struct ice_qs_cfg *qs_cfg)
df0f8479 587{
df0f8479
AV		 588 int i, index = 0;
589
03f7a986
AV		 590 mutex_lock(qs_cfg->qs_mutex);
591 for (i = 0; i < qs_cfg->q_count; i++) {
592 index = find_next_zero_bit(qs_cfg->pf_map,
593 qs_cfg->pf_map_size, index);
594 if (index >= qs_cfg->pf_map_size)
595 goto err_scatter;
596 set_bit(index, qs_cfg->pf_map);
597 qs_cfg->vsi_map[i + qs_cfg->vsi_map_offset] = index;
df0f8479 598 }
03f7a986 599 mutex_unlock(qs_cfg->qs_mutex);
df0f8479 600
df0f8479 601 return 0;
03f7a986 602err_scatter:
df0f8479 603 for (index = 0; index < i; index++) {
03f7a986
AV		 604 clear_bit(qs_cfg->vsi_map[index], qs_cfg->pf_map);
605 qs_cfg->vsi_map[index + qs_cfg->vsi_map_offset] = 0;
df0f8479 606 }
03f7a986 607 mutex_unlock(qs_cfg->qs_mutex);
df0f8479 608
df0f8479
AV		 609 return -ENOMEM;
610}
611
03f7a986
AV		 612/**
613 * __ice_vsi_get_qs - helper function for assigning queues from PF to VSI
6c2f997a 614 * @qs_cfg: gathered variables needed for pf->vsi queues assignment
03f7a986 615 *
6c2f997a
AV		 616 * This function first tries to find contiguous space. If it is not successful,
617 * it tries with the scatter approach.
03f7a986
AV		 618 *
619 * Return 0 on success and -ENOMEM in case of no left space in PF queue bitmap
620 */
621static int __ice_vsi_get_qs(struct ice_qs_cfg *qs_cfg)
622{
623 int ret = 0;
624
625 ret = __ice_vsi_get_qs_contig(qs_cfg);
626 if (ret) {
627 /* contig failed, so try with scatter approach */
628 qs_cfg->mapping_mode = ICE_VSI_MAP_SCATTER;
629 qs_cfg->q_count = min_t(u16, qs_cfg->q_count,
630 qs_cfg->scatter_count);
631 ret = __ice_vsi_get_qs_sc(qs_cfg);
632 }
633 return ret;
634}
635
df0f8479
AV		 636/**
637 * ice_vsi_get_qs - Assign queues from PF to VSI
638 * @vsi: the VSI to assign queues to
639 *
640 * Returns 0 on success and a negative value on error
641 */
37bb8390 642static int ice_vsi_get_qs(struct ice_vsi *vsi)
df0f8479 643{
03f7a986
AV		 644 struct ice_pf *pf = vsi->back;
645 struct ice_qs_cfg tx_qs_cfg = {
646 .qs_mutex = &pf->avail_q_mutex,
647 .pf_map = pf->avail_txqs,
648 .pf_map_size = ICE_MAX_TXQS,
649 .q_count = vsi->alloc_txq,
650 .scatter_count = ICE_MAX_SCATTER_TXQS,
651 .vsi_map = vsi->txq_map,
652 .vsi_map_offset = 0,
653 .mapping_mode = vsi->tx_mapping_mode
654 };
655 struct ice_qs_cfg rx_qs_cfg = {
656 .qs_mutex = &pf->avail_q_mutex,
657 .pf_map = pf->avail_rxqs,
658 .pf_map_size = ICE_MAX_RXQS,
659 .q_count = vsi->alloc_rxq,
660 .scatter_count = ICE_MAX_SCATTER_RXQS,
661 .vsi_map = vsi->rxq_map,
662 .vsi_map_offset = 0,
663 .mapping_mode = vsi->rx_mapping_mode
664 };
df0f8479
AV		 665 int ret = 0;
666
667 vsi->tx_mapping_mode = ICE_VSI_MAP_CONTIG;
668 vsi->rx_mapping_mode = ICE_VSI_MAP_CONTIG;
669
03f7a986
AV		 670 ret = __ice_vsi_get_qs(&tx_qs_cfg);
671 if (!ret)
672 ret = __ice_vsi_get_qs(&rx_qs_cfg);
df0f8479
AV		 673
674 return ret;
675}
676
5153a18e
AV		 677/**
678 * ice_vsi_put_qs - Release queues from VSI to PF
679 * @vsi: the VSI that is going to release queues
680 */
681void ice_vsi_put_qs(struct ice_vsi *vsi)
682{
683 struct ice_pf *pf = vsi->back;
684 int i;
685
686 mutex_lock(&pf->avail_q_mutex);
687
688 for (i = 0; i < vsi->alloc_txq; i++) {
689 clear_bit(vsi->txq_map[i], pf->avail_txqs);
690 vsi->txq_map[i] = ICE_INVAL_Q_INDEX;
691 }
692
693 for (i = 0; i < vsi->alloc_rxq; i++) {
694 clear_bit(vsi->rxq_map[i], pf->avail_rxqs);
695 vsi->rxq_map[i] = ICE_INVAL_Q_INDEX;
696 }
697
698 mutex_unlock(&pf->avail_q_mutex);
699}
700
df0f8479
AV		 701/**
702 * ice_rss_clean - Delete RSS related VSI structures that hold user inputs
703 * @vsi: the VSI being removed
704 */
705static void ice_rss_clean(struct ice_vsi *vsi)
706{
707 struct ice_pf *pf;
708
709 pf = vsi->back;
710
711 if (vsi->rss_hkey_user)
712 devm_kfree(&pf->pdev->dev, vsi->rss_hkey_user);
713 if (vsi->rss_lut_user)
714 devm_kfree(&pf->pdev->dev, vsi->rss_lut_user);
715}
716
28c2a645
AV		 717/**
718 * ice_vsi_set_rss_params - Setup RSS capabilities per VSI type
719 * @vsi: the VSI being configured
720 */
37bb8390 721static void ice_vsi_set_rss_params(struct ice_vsi *vsi)
28c2a645
AV		 722{
723 struct ice_hw_common_caps *cap;
724 struct ice_pf *pf = vsi->back;
725
726 if (!test_bit(ICE_FLAG_RSS_ENA, pf->flags)) {
727 vsi->rss_size = 1;
728 return;
729 }
730
731 cap = &pf->hw.func_caps.common_cap;
732 switch (vsi->type) {
733 case ICE_VSI_PF:
734 /* PF VSI will inherit RSS instance of PF */
735 vsi->rss_table_size = cap->rss_table_size;
736 vsi->rss_size = min_t(int, num_online_cpus(),
737 BIT(cap->rss_table_entry_width));
738 vsi->rss_lut_type = ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_PF;
739 break;
8ede0178
AV		 740 case ICE_VSI_VF:
741 /* VF VSI will gets a small RSS table
742 * For VSI_LUT, LUT size should be set to 64 bytes
743 */
744 vsi->rss_table_size = ICE_VSIQF_HLUT_ARRAY_SIZE;
745 vsi->rss_size = min_t(int, num_online_cpus(),
746 BIT(cap->rss_table_entry_width));
747 vsi->rss_lut_type = ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_VSI;
748 break;
28c2a645
AV		 749 default:
750 dev_warn(&pf->pdev->dev, "Unknown VSI type %d\n",
751 vsi->type);
752 break;
753 }
754}
755
756/**
757 * ice_set_dflt_vsi_ctx - Set default VSI context before adding a VSI
758 * @ctxt: the VSI context being set
759 *
760 * This initializes a default VSI context for all sections except the Queues.
761 */
762static void ice_set_dflt_vsi_ctx(struct ice_vsi_ctx *ctxt)
763{
764 u32 table = 0;
765
766 memset(&ctxt->info, 0, sizeof(ctxt->info));
767 /* VSI's should be allocated from shared pool */
768 ctxt->alloc_from_pool = true;
769 /* Src pruning enabled by default */
770 ctxt->info.sw_flags = ICE_AQ_VSI_SW_FLAG_SRC_PRUNE;
771 /* Traffic from VSI can be sent to LAN */
772 ctxt->info.sw_flags2 = ICE_AQ_VSI_SW_FLAG_LAN_ENA;
773 /* By default bits 3 and 4 in vlan_flags are 0's which results in legacy
774 * behavior (show VLAN, DEI, and UP) in descriptor. Also, allow all
775 * packets untagged/tagged.
776 */
777 ctxt->info.vlan_flags = ((ICE_AQ_VSI_VLAN_MODE_ALL &
778 ICE_AQ_VSI_VLAN_MODE_M) >>
779 ICE_AQ_VSI_VLAN_MODE_S);
780 /* Have 1:1 UP mapping for both ingress/egress tables */
781 table |= ICE_UP_TABLE_TRANSLATE(0, 0);
782 table |= ICE_UP_TABLE_TRANSLATE(1, 1);
783 table |= ICE_UP_TABLE_TRANSLATE(2, 2);
784 table |= ICE_UP_TABLE_TRANSLATE(3, 3);
785 table |= ICE_UP_TABLE_TRANSLATE(4, 4);
786 table |= ICE_UP_TABLE_TRANSLATE(5, 5);
787 table |= ICE_UP_TABLE_TRANSLATE(6, 6);
788 table |= ICE_UP_TABLE_TRANSLATE(7, 7);
789 ctxt->info.ingress_table = cpu_to_le32(table);
790 ctxt->info.egress_table = cpu_to_le32(table);
791 /* Have 1:1 UP mapping for outer to inner UP table */
792 ctxt->info.outer_up_table = cpu_to_le32(table);
793 /* No Outer tag support outer_tag_flags remains to zero */
794}
795
796/**
797 * ice_vsi_setup_q_map - Setup a VSI queue map
798 * @vsi: the VSI being configured
799 * @ctxt: VSI context structure
800 */
801static void ice_vsi_setup_q_map(struct ice_vsi *vsi, struct ice_vsi_ctx *ctxt)
802{
c5a2a4a3 803 u16 offset = 0, qmap = 0, tx_count = 0;
28c2a645
AV		 804 u16 qcount_tx = vsi->alloc_txq;
805 u16 qcount_rx = vsi->alloc_rxq;
c5a2a4a3
UK		 806 u16 tx_numq_tc, rx_numq_tc;
807 u16 pow = 0, max_rss = 0;
28c2a645 808 bool ena_tc0 = false;
c5a2a4a3 809 u8 netdev_tc = 0;
28c2a645
AV		 810 int i;
811
812 /* at least TC0 should be enabled by default */
813 if (vsi->tc_cfg.numtc) {
814 if (!(vsi->tc_cfg.ena_tc & BIT(0)))
815 ena_tc0 = true;
816 } else {
817 ena_tc0 = true;
818 }
819
820 if (ena_tc0) {
821 vsi->tc_cfg.numtc++;
822 vsi->tc_cfg.ena_tc |= 1;
823 }
824
c5a2a4a3
UK		 825 rx_numq_tc = qcount_rx / vsi->tc_cfg.numtc;
826 if (!rx_numq_tc)
827 rx_numq_tc = 1;
828 tx_numq_tc = qcount_tx / vsi->tc_cfg.numtc;
829 if (!tx_numq_tc)
830 tx_numq_tc = 1;
28c2a645
AV		 831
832 /* TC mapping is a function of the number of Rx queues assigned to the
833 * VSI for each traffic class and the offset of these queues.
834 * The first 10 bits are for queue offset for TC0, next 4 bits for no:of
835 * queues allocated to TC0. No:of queues is a power-of-2.
836 *
837 * If TC is not enabled, the queue offset is set to 0, and allocate one
838 * queue, this way, traffic for the given TC will be sent to the default
839 * queue.
840 *
841 * Setup number and offset of Rx queues for all TCs for the VSI
842 */
843
c5a2a4a3
UK		 844 qcount_rx = rx_numq_tc;
845
28c2a645
AV		 846 /* qcount will change if RSS is enabled */
847 if (test_bit(ICE_FLAG_RSS_ENA, vsi->back->flags)) {
8ede0178
AV		 848 if (vsi->type == ICE_VSI_PF || vsi->type == ICE_VSI_VF) {
849 if (vsi->type == ICE_VSI_PF)
850 max_rss = ICE_MAX_LG_RSS_QS;
851 else
852 max_rss = ICE_MAX_SMALL_RSS_QS;
c5a2a4a3
UK		 853 qcount_rx = min_t(int, rx_numq_tc, max_rss);
854 qcount_rx = min_t(int, qcount_rx, vsi->rss_size);
8ede0178 855 }
28c2a645
AV		 856 }
857
858 /* find the (rounded up) power-of-2 of qcount */
c5a2a4a3 859 pow = order_base_2(qcount_rx);
28c2a645 860
2bdc97be 861 ice_for_each_traffic_class(i) {
28c2a645
AV		 862 if (!(vsi->tc_cfg.ena_tc & BIT(i))) {
863 /* TC is not enabled */
864 vsi->tc_cfg.tc_info[i].qoffset = 0;
c5a2a4a3
UK		 865 vsi->tc_cfg.tc_info[i].qcount_rx = 1;
866 vsi->tc_cfg.tc_info[i].qcount_tx = 1;
867 vsi->tc_cfg.tc_info[i].netdev_tc = 0;
28c2a645
AV		 868 ctxt->info.tc_mapping[i] = 0;
869 continue;
870 }
871
872 /* TC is enabled */
873 vsi->tc_cfg.tc_info[i].qoffset = offset;
c5a2a4a3
UK		 874 vsi->tc_cfg.tc_info[i].qcount_rx = qcount_rx;
875 vsi->tc_cfg.tc_info[i].qcount_tx = tx_numq_tc;
876 vsi->tc_cfg.tc_info[i].netdev_tc = netdev_tc++;
28c2a645
AV		 877
878 qmap = ((offset << ICE_AQ_VSI_TC_Q_OFFSET_S) &
879 ICE_AQ_VSI_TC_Q_OFFSET_M) |
880 ((pow << ICE_AQ_VSI_TC_Q_NUM_S) &
881 ICE_AQ_VSI_TC_Q_NUM_M);
c5a2a4a3
UK		 882 offset += qcount_rx;
883 tx_count += tx_numq_tc;
28c2a645
AV		 884 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
885 }
60dcc39e
KP		 886
887 /* if offset is non-zero, means it is calculated correctly based on
888 * enabled TCs for a given VSI otherwise qcount_rx will always
889 * be correct and non-zero because it is based off - VSI's
890 * allocated Rx queues which is at least 1 (hence qcount_tx will be
891 * at least 1)
892 */
893 if (offset)
894 vsi->num_rxq = offset;
895 else
896 vsi->num_rxq = qcount_rx;
897
c5a2a4a3 898 vsi->num_txq = tx_count;
28c2a645 899
8ede0178
AV		 900 if (vsi->type == ICE_VSI_VF && vsi->num_txq != vsi->num_rxq) {
901 dev_dbg(&vsi->back->pdev->dev, "VF VSI should have same number of Tx and Rx queues. Hence making them equal\n");
902 /* since there is a chance that num_rxq could have been changed
903 * in the above for loop, make num_txq equal to num_rxq.
904 */
905 vsi->num_txq = vsi->num_rxq;
906 }
907
28c2a645
AV		 908 /* Rx queue mapping */
909 ctxt->info.mapping_flags |= cpu_to_le16(ICE_AQ_VSI_Q_MAP_CONTIG);
910 /* q_mapping buffer holds the info for the first queue allocated for
911 * this VSI in the PF space and also the number of queues associated
912 * with this VSI.
913 */
914 ctxt->info.q_mapping[0] = cpu_to_le16(vsi->rxq_map[0]);
915 ctxt->info.q_mapping[1] = cpu_to_le16(vsi->num_rxq);
916}
917
918/**
919 * ice_set_rss_vsi_ctx - Set RSS VSI context before adding a VSI
920 * @ctxt: the VSI context being set
921 * @vsi: the VSI being configured
922 */
923static void ice_set_rss_vsi_ctx(struct ice_vsi_ctx *ctxt, struct ice_vsi *vsi)
924{
925 u8 lut_type, hash_type;
926
927 switch (vsi->type) {
928 case ICE_VSI_PF:
929 /* PF VSI will inherit RSS instance of PF */
930 lut_type = ICE_AQ_VSI_Q_OPT_RSS_LUT_PF;
931 hash_type = ICE_AQ_VSI_Q_OPT_RSS_TPLZ;
932 break;
8ede0178
AV		 933 case ICE_VSI_VF:
934 /* VF VSI will gets a small RSS table which is a VSI LUT type */
935 lut_type = ICE_AQ_VSI_Q_OPT_RSS_LUT_VSI;
936 hash_type = ICE_AQ_VSI_Q_OPT_RSS_TPLZ;
937 break;
28c2a645
AV		 938 default:
939 dev_warn(&vsi->back->pdev->dev, "Unknown VSI type %d\n",
940 vsi->type);
941 return;
942 }
943
944 ctxt->info.q_opt_rss = ((lut_type << ICE_AQ_VSI_Q_OPT_RSS_LUT_S) &
945 ICE_AQ_VSI_Q_OPT_RSS_LUT_M) |
946 ((hash_type << ICE_AQ_VSI_Q_OPT_RSS_HASH_S) &
947 ICE_AQ_VSI_Q_OPT_RSS_HASH_M);
948}
949
950/**
951 * ice_vsi_init - Create and initialize a VSI
952 * @vsi: the VSI being configured
953 *
954 * This initializes a VSI context depending on the VSI type to be added and
955 * passes it down to the add_vsi aq command to create a new VSI.
956 */
37bb8390 957static int ice_vsi_init(struct ice_vsi *vsi)
28c2a645 958{
28c2a645
AV		 959 struct ice_pf *pf = vsi->back;
960 struct ice_hw *hw = &pf->hw;
198a666a 961 struct ice_vsi_ctx *ctxt;
28c2a645
AV		 962 int ret = 0;
963
198a666a
BA		 964 ctxt = devm_kzalloc(&pf->pdev->dev, sizeof(*ctxt), GFP_KERNEL);
965 if (!ctxt)
966 return -ENOMEM;
967
cb93a952 968 ctxt->info = vsi->info;
28c2a645
AV		 969 switch (vsi->type) {
970 case ICE_VSI_PF:
198a666a 971 ctxt->flags = ICE_AQ_VSI_TYPE_PF;
28c2a645 972 break;
8ede0178 973 case ICE_VSI_VF:
198a666a 974 ctxt->flags = ICE_AQ_VSI_TYPE_VF;
8ede0178 975 /* VF number here is the absolute VF number (0-255) */
198a666a 976 ctxt->vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
8ede0178 977 break;
28c2a645
AV		 978 default:
979 return -ENODEV;
980 }
981
198a666a 982 ice_set_dflt_vsi_ctx(ctxt);
28c2a645
AV		 983 /* if the switch is in VEB mode, allow VSI loopback */
984 if (vsi->vsw->bridge_mode == BRIDGE_MODE_VEB)
198a666a 985 ctxt->info.sw_flags |= ICE_AQ_VSI_SW_FLAG_ALLOW_LB;
28c2a645
AV		 986
987 /* Set LUT type and HASH type if RSS is enabled */
988 if (test_bit(ICE_FLAG_RSS_ENA, pf->flags))
198a666a 989 ice_set_rss_vsi_ctx(ctxt, vsi);
28c2a645 990
198a666a
BA		 991 ctxt->info.sw_id = vsi->port_info->sw_id;
992 ice_vsi_setup_q_map(vsi, ctxt);
28c2a645 993
cb93a952
AA		 994 /* Enable MAC Antispoof with new VSI being initialized or updated */
995 if (vsi->type == ICE_VSI_VF && pf->vf[vsi->vf_id].spoofchk) {
996 ctxt->info.valid_sections |=
997 cpu_to_le16(ICE_AQ_VSI_PROP_SECURITY_VALID);
998 ctxt->info.sec_flags |=
999 ICE_AQ_VSI_SEC_FLAG_ENA_MAC_ANTI_SPOOF;
1000 }
1001
198a666a 1002 ret = ice_add_vsi(hw, vsi->idx, ctxt, NULL);
28c2a645
AV		 1003 if (ret) {
1004 dev_err(&pf->pdev->dev,
1005 "Add VSI failed, err %d\n", ret);
1006 return -EIO;
1007 }
1008
1009 /* keep context for update VSI operations */
198a666a 1010 vsi->info = ctxt->info;
28c2a645
AV		 1011
1012 /* record VSI number returned */
198a666a 1013 vsi->vsi_num = ctxt->vsi_num;
28c2a645 1014
198a666a 1015 devm_kfree(&pf->pdev->dev, ctxt);
28c2a645
AV		 1016 return ret;
1017}
1018
df0f8479
AV		 1019/**
1020 * ice_free_q_vector - Free memory allocated for a specific interrupt vector
1021 * @vsi: VSI having the memory freed
1022 * @v_idx: index of the vector to be freed
1023 */
1024static void ice_free_q_vector(struct ice_vsi *vsi, int v_idx)
1025{
1026 struct ice_q_vector *q_vector;
1027 struct ice_ring *ring;
1028
1029 if (!vsi->q_vectors[v_idx]) {
1030 dev_dbg(&vsi->back->pdev->dev, "Queue vector at index %d not found\n",
1031 v_idx);
1032 return;
1033 }
1034 q_vector = vsi->q_vectors[v_idx];
1035
1036 ice_for_each_ring(ring, q_vector->tx)
1037 ring->q_vector = NULL;
1038 ice_for_each_ring(ring, q_vector->rx)
1039 ring->q_vector = NULL;
1040
1041 /* only VSI with an associated netdev is set up with NAPI */
1042 if (vsi->netdev)
1043 netif_napi_del(&q_vector->napi);
1044
1045 devm_kfree(&vsi->back->pdev->dev, q_vector);
1046 vsi->q_vectors[v_idx] = NULL;
1047}
1048
1049/**
1050 * ice_vsi_free_q_vectors - Free memory allocated for interrupt vectors
1051 * @vsi: the VSI having memory freed
1052 */
1053void ice_vsi_free_q_vectors(struct ice_vsi *vsi)
1054{
1055 int v_idx;
1056
0c2561c8 1057 ice_for_each_q_vector(vsi, v_idx)
df0f8479
AV		 1058 ice_free_q_vector(vsi, v_idx);
1059}
1060
1061/**
1062 * ice_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
1063 * @vsi: the VSI being configured
1064 * @v_idx: index of the vector in the VSI struct
1065 *
df17b7e0 1066 * We allocate one q_vector. If allocation fails we return -ENOMEM.
df0f8479
AV		 1067 */
1068static int ice_vsi_alloc_q_vector(struct ice_vsi *vsi, int v_idx)
1069{
1070 struct ice_pf *pf = vsi->back;
1071 struct ice_q_vector *q_vector;
1072
1073 /* allocate q_vector */
1074 q_vector = devm_kzalloc(&pf->pdev->dev, sizeof(*q_vector), GFP_KERNEL);
1075 if (!q_vector)
1076 return -ENOMEM;
1077
1078 q_vector->vsi = vsi;
1079 q_vector->v_idx = v_idx;
8ede0178
AV		 1080 if (vsi->type == ICE_VSI_VF)
1081 goto out;
df0f8479
AV		 1082 /* only set affinity_mask if the CPU is online */
1083 if (cpu_online(v_idx))
1084 cpumask_set_cpu(v_idx, &q_vector->affinity_mask);
1085
1086 /* This will not be called in the driver load path because the netdev
1087 * will not be created yet. All other cases with register the NAPI
1088 * handler here (i.e. resume, reset/rebuild, etc.)
1089 */
1090 if (vsi->netdev)
1091 netif_napi_add(vsi->netdev, &q_vector->napi, ice_napi_poll,
1092 NAPI_POLL_WEIGHT);
1093
8ede0178 1094out:
df0f8479
AV		 1095 /* tie q_vector and VSI together */
1096 vsi->q_vectors[v_idx] = q_vector;
1097
1098 return 0;
1099}
1100
1101/**
1102 * ice_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
1103 * @vsi: the VSI being configured
1104 *
df17b7e0 1105 * We allocate one q_vector per queue interrupt. If allocation fails we
df0f8479
AV		 1106 * return -ENOMEM.
1107 */
37bb8390 1108static int ice_vsi_alloc_q_vectors(struct ice_vsi *vsi)
df0f8479
AV		 1109{
1110 struct ice_pf *pf = vsi->back;
1111 int v_idx = 0, num_q_vectors;
1112 int err;
1113
1114 if (vsi->q_vectors[0]) {
1115 dev_dbg(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
1116 vsi->vsi_num);
1117 return -EEXIST;
1118 }
1119
1120 if (test_bit(ICE_FLAG_MSIX_ENA, pf->flags)) {
1121 num_q_vectors = vsi->num_q_vectors;
1122 } else {
1123 err = -EINVAL;
1124 goto err_out;
1125 }
1126
1127 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
1128 err = ice_vsi_alloc_q_vector(vsi, v_idx);
1129 if (err)
1130 goto err_out;
1131 }
1132
1133 return 0;
1134
1135err_out:
1136 while (v_idx--)
1137 ice_free_q_vector(vsi, v_idx);
1138
1139 dev_err(&pf->pdev->dev,
1140 "Failed to allocate %d q_vector for VSI %d, ret=%d\n",
1141 vsi->num_q_vectors, vsi->vsi_num, err);
1142 vsi->num_q_vectors = 0;
1143 return err;
1144}
1145
1146/**
1147 * ice_vsi_setup_vector_base - Set up the base vector for the given VSI
1148 * @vsi: ptr to the VSI
1149 *
1150 * This should only be called after ice_vsi_alloc() which allocates the
1151 * corresponding SW VSI structure and initializes num_queue_pairs for the
1152 * newly allocated VSI.
1153 *
1154 * Returns 0 on success or negative on failure
1155 */
37bb8390 1156static int ice_vsi_setup_vector_base(struct ice_vsi *vsi)
df0f8479
AV		 1157{
1158 struct ice_pf *pf = vsi->back;
1159 int num_q_vectors = 0;
1160
eb0208ec
PB		 1161 if (vsi->sw_base_vector || vsi->hw_base_vector) {
1162 dev_dbg(&pf->pdev->dev, "VSI %d has non-zero HW base vector %d or SW base vector %d\n",
1163 vsi->vsi_num, vsi->hw_base_vector, vsi->sw_base_vector);
df0f8479
AV		 1164 return -EEXIST;
1165 }
1166
1167 if (!test_bit(ICE_FLAG_MSIX_ENA, pf->flags))
1168 return -ENOENT;
1169
1170 switch (vsi->type) {
1171 case ICE_VSI_PF:
1172 num_q_vectors = vsi->num_q_vectors;
eb0208ec
PB		 1173 /* reserve slots from OS requested IRQs */
1174 vsi->sw_base_vector = ice_get_res(pf, pf->sw_irq_tracker,
1175 num_q_vectors, vsi->idx);
1176 if (vsi->sw_base_vector < 0) {
1177 dev_err(&pf->pdev->dev,
1178 "Failed to get tracking for %d SW vectors for VSI %d, err=%d\n",
1179 num_q_vectors, vsi->vsi_num,
1180 vsi->sw_base_vector);
1181 return -ENOENT;
1182 }
1183 pf->num_avail_sw_msix -= num_q_vectors;
1184
1185 /* reserve slots from HW interrupts */
1186 vsi->hw_base_vector = ice_get_res(pf, pf->hw_irq_tracker,
1187 num_q_vectors, vsi->idx);
df0f8479 1188 break;
8ede0178
AV		 1189 case ICE_VSI_VF:
1190 /* take VF misc vector and data vectors into account */
1191 num_q_vectors = pf->num_vf_msix;
1192 /* For VF VSI, reserve slots only from HW interrupts */
1193 vsi->hw_base_vector = ice_get_res(pf, pf->hw_irq_tracker,
1194 num_q_vectors, vsi->idx);
1195 break;
df0f8479
AV		 1196 default:
1197 dev_warn(&vsi->back->pdev->dev, "Unknown VSI type %d\n",
1198 vsi->type);
1199 break;
1200 }
1201
eb0208ec 1202 if (vsi->hw_base_vector < 0) {
df0f8479 1203 dev_err(&pf->pdev->dev,
eb0208ec
PB		 1204 "Failed to get tracking for %d HW vectors for VSI %d, err=%d\n",
1205 num_q_vectors, vsi->vsi_num, vsi->hw_base_vector);
8ede0178
AV		 1206 if (vsi->type != ICE_VSI_VF) {
1207 ice_free_res(vsi->back->sw_irq_tracker,
1208 vsi->sw_base_vector, vsi->idx);
1209 pf->num_avail_sw_msix += num_q_vectors;
1210 }
df0f8479
AV		 1211 return -ENOENT;
1212 }
1213
eb0208ec
PB		 1214 pf->num_avail_hw_msix -= num_q_vectors;
1215
df0f8479
AV		 1216 return 0;
1217}
1218
28c2a645
AV		 1219/**
1220 * ice_vsi_clear_rings - Deallocates the Tx and Rx rings for VSI
1221 * @vsi: the VSI having rings deallocated
1222 */
df0f8479 1223static void ice_vsi_clear_rings(struct ice_vsi *vsi)
28c2a645
AV		 1224{
1225 int i;
1226
1227 if (vsi->tx_rings) {
1228 for (i = 0; i < vsi->alloc_txq; i++) {
1229 if (vsi->tx_rings[i]) {
1230 kfree_rcu(vsi->tx_rings[i], rcu);
1231 vsi->tx_rings[i] = NULL;
1232 }
1233 }
1234 }
1235 if (vsi->rx_rings) {
1236 for (i = 0; i < vsi->alloc_rxq; i++) {
1237 if (vsi->rx_rings[i]) {
1238 kfree_rcu(vsi->rx_rings[i], rcu);
1239 vsi->rx_rings[i] = NULL;
1240 }
1241 }
1242 }
1243}
1244
1245/**
1246 * ice_vsi_alloc_rings - Allocates Tx and Rx rings for the VSI
1247 * @vsi: VSI which is having rings allocated
1248 */
37bb8390 1249static int ice_vsi_alloc_rings(struct ice_vsi *vsi)
28c2a645
AV		 1250{
1251 struct ice_pf *pf = vsi->back;
1252 int i;
1253
d337f2af 1254 /* Allocate Tx rings */
28c2a645
AV		 1255 for (i = 0; i < vsi->alloc_txq; i++) {
1256 struct ice_ring *ring;
1257
1258 /* allocate with kzalloc(), free with kfree_rcu() */
1259 ring = kzalloc(sizeof(*ring), GFP_KERNEL);
1260
1261 if (!ring)
1262 goto err_out;
1263
1264 ring->q_index = i;
1265 ring->reg_idx = vsi->txq_map[i];
1266 ring->ring_active = false;
1267 ring->vsi = vsi;
1268 ring->dev = &pf->pdev->dev;
ad71b256 1269 ring->count = vsi->num_tx_desc;
28c2a645
AV		 1270 vsi->tx_rings[i] = ring;
1271 }
1272
d337f2af 1273 /* Allocate Rx rings */
28c2a645
AV		 1274 for (i = 0; i < vsi->alloc_rxq; i++) {
1275 struct ice_ring *ring;
1276
1277 /* allocate with kzalloc(), free with kfree_rcu() */
1278 ring = kzalloc(sizeof(*ring), GFP_KERNEL);
1279 if (!ring)
1280 goto err_out;
1281
1282 ring->q_index = i;
1283 ring->reg_idx = vsi->rxq_map[i];
1284 ring->ring_active = false;
1285 ring->vsi = vsi;
1286 ring->netdev = vsi->netdev;
1287 ring->dev = &pf->pdev->dev;
ad71b256 1288 ring->count = vsi->num_rx_desc;
28c2a645
AV		 1289 vsi->rx_rings[i] = ring;
1290 }
1291
1292 return 0;
1293
1294err_out:
1295 ice_vsi_clear_rings(vsi);
1296 return -ENOMEM;
1297}
1298
07309a0e
AV		 1299/**
1300 * ice_vsi_map_rings_to_vectors - Map VSI rings to interrupt vectors
1301 * @vsi: the VSI being configured
1302 *
1303 * This function maps descriptor rings to the queue-specific vectors allotted
1304 * through the MSI-X enabling code. On a constrained vector budget, we map Tx
1305 * and Rx rings to the vector as "efficiently" as possible.
1306 */
7b9ffc76
AV		 1307#ifdef CONFIG_DCB
1308void ice_vsi_map_rings_to_vectors(struct ice_vsi *vsi)
1309#else
37bb8390 1310static void ice_vsi_map_rings_to_vectors(struct ice_vsi *vsi)
7b9ffc76 1311#endif /* CONFIG_DCB */
07309a0e
AV		 1312{
1313 int q_vectors = vsi->num_q_vectors;
1314 int tx_rings_rem, rx_rings_rem;
1315 int v_id;
1316
1317 /* initially assigning remaining rings count to VSIs num queue value */
1318 tx_rings_rem = vsi->num_txq;
1319 rx_rings_rem = vsi->num_rxq;
1320
1321 for (v_id = 0; v_id < q_vectors; v_id++) {
1322 struct ice_q_vector *q_vector = vsi->q_vectors[v_id];
1323 int tx_rings_per_v, rx_rings_per_v, q_id, q_base;
1324
1325 /* Tx rings mapping to vector */
1326 tx_rings_per_v = DIV_ROUND_UP(tx_rings_rem, q_vectors - v_id);
1327 q_vector->num_ring_tx = tx_rings_per_v;
1328 q_vector->tx.ring = NULL;
d2b464a7 1329 q_vector->tx.itr_idx = ICE_TX_ITR;
07309a0e
AV		 1330 q_base = vsi->num_txq - tx_rings_rem;
1331
1332 for (q_id = q_base; q_id < (q_base + tx_rings_per_v); q_id++) {
1333 struct ice_ring *tx_ring = vsi->tx_rings[q_id];
1334
1335 tx_ring->q_vector = q_vector;
1336 tx_ring->next = q_vector->tx.ring;
1337 q_vector->tx.ring = tx_ring;
1338 }
1339 tx_rings_rem -= tx_rings_per_v;
1340
1341 /* Rx rings mapping to vector */
1342 rx_rings_per_v = DIV_ROUND_UP(rx_rings_rem, q_vectors - v_id);
1343 q_vector->num_ring_rx = rx_rings_per_v;
1344 q_vector->rx.ring = NULL;
d2b464a7 1345 q_vector->rx.itr_idx = ICE_RX_ITR;
07309a0e
AV		 1346 q_base = vsi->num_rxq - rx_rings_rem;
1347
1348 for (q_id = q_base; q_id < (q_base + rx_rings_per_v); q_id++) {
1349 struct ice_ring *rx_ring = vsi->rx_rings[q_id];
1350
1351 rx_ring->q_vector = q_vector;
1352 rx_ring->next = q_vector->rx.ring;
1353 q_vector->rx.ring = rx_ring;
1354 }
1355 rx_rings_rem -= rx_rings_per_v;
1356 }
1357}
1358
492af0ab
MFIP		 1359/**
1360 * ice_vsi_manage_rss_lut - disable/enable RSS
1361 * @vsi: the VSI being changed
1362 * @ena: boolean value indicating if this is an enable or disable request
1363 *
1364 * In the event of disable request for RSS, this function will zero out RSS
1365 * LUT, while in the event of enable request for RSS, it will reconfigure RSS
1366 * LUT.
1367 */
1368int ice_vsi_manage_rss_lut(struct ice_vsi *vsi, bool ena)
1369{
1370 int err = 0;
1371 u8 *lut;
1372
1373 lut = devm_kzalloc(&vsi->back->pdev->dev, vsi->rss_table_size,
1374 GFP_KERNEL);
1375 if (!lut)
1376 return -ENOMEM;
1377
1378 if (ena) {
1379 if (vsi->rss_lut_user)
1380 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
1381 else
1382 ice_fill_rss_lut(lut, vsi->rss_table_size,
1383 vsi->rss_size);
1384 }
1385
1386 err = ice_set_rss(vsi, NULL, lut, vsi->rss_table_size);
1387 devm_kfree(&vsi->back->pdev->dev, lut);
1388 return err;
1389}
1390
37bb8390
AV		 1391/**
1392 * ice_vsi_cfg_rss_lut_key - Configure RSS params for a VSI
1393 * @vsi: VSI to be configured
1394 */
1395static int ice_vsi_cfg_rss_lut_key(struct ice_vsi *vsi)
1396{
37bb8390
AV		 1397 struct ice_aqc_get_set_rss_keys *key;
1398 struct ice_pf *pf = vsi->back;
1399 enum ice_status status;
1400 int err = 0;
1401 u8 *lut;
1402
1403 vsi->rss_size = min_t(int, vsi->rss_size, vsi->num_rxq);
1404
1405 lut = devm_kzalloc(&pf->pdev->dev, vsi->rss_table_size, GFP_KERNEL);
1406 if (!lut)
1407 return -ENOMEM;
1408
1409 if (vsi->rss_lut_user)
1410 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
1411 else
1412 ice_fill_rss_lut(lut, vsi->rss_table_size, vsi->rss_size);
1413
4fb33f31
AV		 1414 status = ice_aq_set_rss_lut(&pf->hw, vsi->idx, vsi->rss_lut_type, lut,
1415 vsi->rss_table_size);
37bb8390
AV		 1416
1417 if (status) {
1418 dev_err(&vsi->back->pdev->dev,
1419 "set_rss_lut failed, error %d\n", status);
1420 err = -EIO;
1421 goto ice_vsi_cfg_rss_exit;
1422 }
1423
1424 key = devm_kzalloc(&vsi->back->pdev->dev, sizeof(*key), GFP_KERNEL);
1425 if (!key) {
1426 err = -ENOMEM;
1427 goto ice_vsi_cfg_rss_exit;
1428 }
1429
1430 if (vsi->rss_hkey_user)
b4b418b3
PG		 1431 memcpy(key,
1432 (struct ice_aqc_get_set_rss_keys *)vsi->rss_hkey_user,
1433 ICE_GET_SET_RSS_KEY_EXTEND_KEY_SIZE);
37bb8390 1434 else
b4b418b3
PG		 1435 netdev_rss_key_fill((void *)key,
1436 ICE_GET_SET_RSS_KEY_EXTEND_KEY_SIZE);
37bb8390 1437
4fb33f31 1438 status = ice_aq_set_rss_key(&pf->hw, vsi->idx, key);
37bb8390
AV		 1439
1440 if (status) {
1441 dev_err(&vsi->back->pdev->dev, "set_rss_key failed, error %d\n",
1442 status);
1443 err = -EIO;
1444 }
1445
1446 devm_kfree(&pf->pdev->dev, key);
1447ice_vsi_cfg_rss_exit:
1448 devm_kfree(&pf->pdev->dev, lut);
1449 return err;
1450}
1451
45d3d428 1452/**
f9867df6 1453 * ice_add_mac_to_list - Add a MAC address filter entry to the list
45d3d428
AV		 1454 * @vsi: the VSI to be forwarded to
1455 * @add_list: pointer to the list which contains MAC filter entries
1456 * @macaddr: the MAC address to be added.
1457 *
f9867df6 1458 * Adds MAC address filter entry to the temp list
45d3d428
AV		 1459 *
1460 * Returns 0 on success or ENOMEM on failure.
1461 */
1462int ice_add_mac_to_list(struct ice_vsi *vsi, struct list_head *add_list,
1463 const u8 *macaddr)
1464{
1465 struct ice_fltr_list_entry *tmp;
1466 struct ice_pf *pf = vsi->back;
1467
1468 tmp = devm_kzalloc(&pf->pdev->dev, sizeof(*tmp), GFP_ATOMIC);
1469 if (!tmp)
1470 return -ENOMEM;
1471
1472 tmp->fltr_info.flag = ICE_FLTR_TX;
5726ca0e 1473 tmp->fltr_info.src_id = ICE_SRC_ID_VSI;
45d3d428
AV		 1474 tmp->fltr_info.lkup_type = ICE_SW_LKUP_MAC;
1475 tmp->fltr_info.fltr_act = ICE_FWD_TO_VSI;
5726ca0e 1476 tmp->fltr_info.vsi_handle = vsi->idx;
45d3d428
AV		 1477 ether_addr_copy(tmp->fltr_info.l_data.mac.mac_addr, macaddr);
1478
1479 INIT_LIST_HEAD(&tmp->list_entry);
1480 list_add(&tmp->list_entry, add_list);
1481
1482 return 0;
1483}
1484
1485/**
1486 * ice_update_eth_stats - Update VSI-specific ethernet statistics counters
1487 * @vsi: the VSI to be updated
1488 */
1489void ice_update_eth_stats(struct ice_vsi *vsi)
1490{
1491 struct ice_eth_stats *prev_es, *cur_es;
1492 struct ice_hw *hw = &vsi->back->hw;
1493 u16 vsi_num = vsi->vsi_num; /* HW absolute index of a VSI */
1494
1495 prev_es = &vsi->eth_stats_prev;
1496 cur_es = &vsi->eth_stats;
1497
1498 ice_stat_update40(hw, GLV_GORCH(vsi_num), GLV_GORCL(vsi_num),
1499 vsi->stat_offsets_loaded, &prev_es->rx_bytes,
1500 &cur_es->rx_bytes);
1501
1502 ice_stat_update40(hw, GLV_UPRCH(vsi_num), GLV_UPRCL(vsi_num),
1503 vsi->stat_offsets_loaded, &prev_es->rx_unicast,
1504 &cur_es->rx_unicast);
1505
1506 ice_stat_update40(hw, GLV_MPRCH(vsi_num), GLV_MPRCL(vsi_num),
1507 vsi->stat_offsets_loaded, &prev_es->rx_multicast,
1508 &cur_es->rx_multicast);
1509
1510 ice_stat_update40(hw, GLV_BPRCH(vsi_num), GLV_BPRCL(vsi_num),
1511 vsi->stat_offsets_loaded, &prev_es->rx_broadcast,
1512 &cur_es->rx_broadcast);
1513
1514 ice_stat_update32(hw, GLV_RDPC(vsi_num), vsi->stat_offsets_loaded,
1515 &prev_es->rx_discards, &cur_es->rx_discards);
1516
1517 ice_stat_update40(hw, GLV_GOTCH(vsi_num), GLV_GOTCL(vsi_num),
1518 vsi->stat_offsets_loaded, &prev_es->tx_bytes,
1519 &cur_es->tx_bytes);
1520
1521 ice_stat_update40(hw, GLV_UPTCH(vsi_num), GLV_UPTCL(vsi_num),
1522 vsi->stat_offsets_loaded, &prev_es->tx_unicast,
1523 &cur_es->tx_unicast);
1524
1525 ice_stat_update40(hw, GLV_MPTCH(vsi_num), GLV_MPTCL(vsi_num),
1526 vsi->stat_offsets_loaded, &prev_es->tx_multicast,
1527 &cur_es->tx_multicast);
1528
1529 ice_stat_update40(hw, GLV_BPTCH(vsi_num), GLV_BPTCL(vsi_num),
1530 vsi->stat_offsets_loaded, &prev_es->tx_broadcast,
1531 &cur_es->tx_broadcast);
1532
1533 ice_stat_update32(hw, GLV_TEPC(vsi_num), vsi->stat_offsets_loaded,
1534 &prev_es->tx_errors, &cur_es->tx_errors);
1535
1536 vsi->stat_offsets_loaded = true;
1537}
1538
1539/**
1540 * ice_free_fltr_list - free filter lists helper
1541 * @dev: pointer to the device struct
1542 * @h: pointer to the list head to be freed
1543 *
1544 * Helper function to free filter lists previously created using
1545 * ice_add_mac_to_list
1546 */
1547void ice_free_fltr_list(struct device *dev, struct list_head *h)
1548{
1549 struct ice_fltr_list_entry *e, *tmp;
1550
1551 list_for_each_entry_safe(e, tmp, h, list_entry) {
1552 list_del(&e->list_entry);
1553 devm_kfree(dev, e);
1554 }
1555}
1556
1557/**
1558 * ice_vsi_add_vlan - Add VSI membership for given VLAN
1559 * @vsi: the VSI being configured
f9867df6 1560 * @vid: VLAN ID to be added
45d3d428
AV		 1561 */
1562int ice_vsi_add_vlan(struct ice_vsi *vsi, u16 vid)
1563{
1564 struct ice_fltr_list_entry *tmp;
1565 struct ice_pf *pf = vsi->back;
1566 LIST_HEAD(tmp_add_list);
1567 enum ice_status status;
1568 int err = 0;
1569
1570 tmp = devm_kzalloc(&pf->pdev->dev, sizeof(*tmp), GFP_KERNEL);
1571 if (!tmp)
1572 return -ENOMEM;
1573
1574 tmp->fltr_info.lkup_type = ICE_SW_LKUP_VLAN;
1575 tmp->fltr_info.fltr_act = ICE_FWD_TO_VSI;
1576 tmp->fltr_info.flag = ICE_FLTR_TX;
5726ca0e
AV		 1577 tmp->fltr_info.src_id = ICE_SRC_ID_VSI;
1578 tmp->fltr_info.vsi_handle = vsi->idx;
45d3d428
AV		 1579 tmp->fltr_info.l_data.vlan.vlan_id = vid;
1580
1581 INIT_LIST_HEAD(&tmp->list_entry);
1582 list_add(&tmp->list_entry, &tmp_add_list);
1583
1584 status = ice_add_vlan(&pf->hw, &tmp_add_list);
1585 if (status) {
1586 err = -ENODEV;
1587 dev_err(&pf->pdev->dev, "Failure Adding VLAN %d on VSI %i\n",
1588 vid, vsi->vsi_num);
1589 }
1590
1591 ice_free_fltr_list(&pf->pdev->dev, &tmp_add_list);
1592 return err;
1593}
1594
1595/**
1596 * ice_vsi_kill_vlan - Remove VSI membership for a given VLAN
1597 * @vsi: the VSI being configured
f9867df6 1598 * @vid: VLAN ID to be removed
45d3d428
AV		 1599 *
1600 * Returns 0 on success and negative on failure
1601 */
1602int ice_vsi_kill_vlan(struct ice_vsi *vsi, u16 vid)
1603{
1604 struct ice_fltr_list_entry *list;
1605 struct ice_pf *pf = vsi->back;
1606 LIST_HEAD(tmp_add_list);
1607 int status = 0;
1608
1609 list = devm_kzalloc(&pf->pdev->dev, sizeof(*list), GFP_KERNEL);
1610 if (!list)
1611 return -ENOMEM;
1612
1613 list->fltr_info.lkup_type = ICE_SW_LKUP_VLAN;
5726ca0e 1614 list->fltr_info.vsi_handle = vsi->idx;
45d3d428
AV		 1615 list->fltr_info.fltr_act = ICE_FWD_TO_VSI;
1616 list->fltr_info.l_data.vlan.vlan_id = vid;
1617 list->fltr_info.flag = ICE_FLTR_TX;
5726ca0e 1618 list->fltr_info.src_id = ICE_SRC_ID_VSI;
45d3d428
AV		 1619
1620 INIT_LIST_HEAD(&list->list_entry);
1621 list_add(&list->list_entry, &tmp_add_list);
1622
1623 if (ice_remove_vlan(&pf->hw, &tmp_add_list)) {
1624 dev_err(&pf->pdev->dev, "Error removing VLAN %d on vsi %i\n",
1625 vid, vsi->vsi_num);
1626 status = -EIO;
1627 }
1628
1629 ice_free_fltr_list(&pf->pdev->dev, &tmp_add_list);
1630 return status;
1631}
1632
72adf242
AV		 1633/**
1634 * ice_vsi_cfg_rxqs - Configure the VSI for Rx
1635 * @vsi: the VSI being configured
1636 *
1637 * Return 0 on success and a negative value on error
1638 * Configure the Rx VSI for operation.
1639 */
1640int ice_vsi_cfg_rxqs(struct ice_vsi *vsi)
1641{
72adf242
AV		 1642 u16 i;
1643
8ede0178
AV		 1644 if (vsi->type == ICE_VSI_VF)
1645 goto setup_rings;
1646
72adf242
AV		 1647 if (vsi->netdev && vsi->netdev->mtu > ETH_DATA_LEN)
1648 vsi->max_frame = vsi->netdev->mtu +
1649 ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
1650 else
1651 vsi->max_frame = ICE_RXBUF_2048;
1652
1653 vsi->rx_buf_len = ICE_RXBUF_2048;
8ede0178 1654setup_rings:
72adf242 1655 /* set up individual rings */
1553f4f7
BC		 1656 for (i = 0; i < vsi->num_rxq; i++) {
1657 int err;
72adf242 1658
1553f4f7
BC		 1659 err = ice_setup_rx_ctx(vsi->rx_rings[i]);
1660 if (err) {
1661 dev_err(&vsi->back->pdev->dev,
1662 "ice_setup_rx_ctx failed for RxQ %d, err %d\n",
1663 i, err);
1664 return err;
1665 }
72adf242 1666 }
1553f4f7
BC		 1667
1668 return 0;
72adf242
AV		 1669}
1670
1671/**
1672 * ice_vsi_cfg_txqs - Configure the VSI for Tx
1673 * @vsi: the VSI being configured
03f7a986
AV		 1674 * @rings: Tx ring array to be configured
1675 * @offset: offset within vsi->txq_map
72adf242
AV		 1676 *
1677 * Return 0 on success and a negative value on error
1678 * Configure the Tx VSI for operation.
1679 */
03f7a986
AV		 1680static int
1681ice_vsi_cfg_txqs(struct ice_vsi *vsi, struct ice_ring **rings, int offset)
72adf242
AV		 1682{
1683 struct ice_aqc_add_tx_qgrp *qg_buf;
1684 struct ice_aqc_add_txqs_perq *txq;
1685 struct ice_pf *pf = vsi->back;
c5a2a4a3 1686 u8 num_q_grps, q_idx = 0;
72adf242
AV		 1687 enum ice_status status;
1688 u16 buf_len, i, pf_q;
03f7a986 1689 int err = 0, tc;
72adf242 1690
c6dfd690 1691 buf_len = sizeof(*qg_buf);
72adf242
AV		 1692 qg_buf = devm_kzalloc(&pf->pdev->dev, buf_len, GFP_KERNEL);
1693 if (!qg_buf)
1694 return -ENOMEM;
1695
72adf242
AV		 1696 qg_buf->num_txqs = 1;
1697 num_q_grps = 1;
1698
c5a2a4a3 1699 /* set up and configure the Tx queues for each enabled TC */
2bdc97be 1700 ice_for_each_traffic_class(tc) {
c5a2a4a3
UK		 1701 if (!(vsi->tc_cfg.ena_tc & BIT(tc)))
1702 break;
72adf242 1703
c5a2a4a3
UK		 1704 for (i = 0; i < vsi->tc_cfg.tc_info[tc].qcount_tx; i++) {
1705 struct ice_tlan_ctx tlan_ctx = { 0 };
1706
03f7a986
AV		 1707 pf_q = vsi->txq_map[q_idx + offset];
1708 ice_setup_tx_ctx(rings[q_idx], &tlan_ctx, pf_q);
c5a2a4a3
UK		 1709 /* copy context contents into the qg_buf */
1710 qg_buf->txqs[0].txq_id = cpu_to_le16(pf_q);
1711 ice_set_ctx((u8 *)&tlan_ctx, qg_buf->txqs[0].txq_ctx,
1712 ice_tlan_ctx_info);
1713
1714 /* init queue specific tail reg. It is referred as
1715 * transmit comm scheduler queue doorbell.
1716 */
03f7a986 1717 rings[q_idx]->tail =
c5a2a4a3
UK		 1718 pf->hw.hw_addr + QTX_COMM_DBELL(pf_q);
1719 status = ice_ena_vsi_txq(vsi->port_info, vsi->idx, tc,
bb87ee0e
AV		 1720 i, num_q_grps, qg_buf,
1721 buf_len, NULL);
c5a2a4a3
UK		 1722 if (status) {
1723 dev_err(&vsi->back->pdev->dev,
1724 "Failed to set LAN Tx queue context, error: %d\n",
1725 status);
1726 err = -ENODEV;
1727 goto err_cfg_txqs;
1728 }
72adf242 1729
c5a2a4a3
UK		 1730 /* Add Tx Queue TEID into the VSI Tx ring from the
1731 * response. This will complete configuring and
1732 * enabling the queue.
1733 */
1734 txq = &qg_buf->txqs[0];
1735 if (pf_q == le16_to_cpu(txq->txq_id))
03f7a986 1736 rings[q_idx]->txq_teid =
c5a2a4a3 1737 le32_to_cpu(txq->q_teid);
72adf242 1738
c5a2a4a3
UK		 1739 q_idx++;
1740 }
72adf242
AV		 1741 }
1742err_cfg_txqs:
1743 devm_kfree(&pf->pdev->dev, qg_buf);
1744 return err;
1745}
1746
03f7a986
AV		 1747/**
1748 * ice_vsi_cfg_lan_txqs - Configure the VSI for Tx
1749 * @vsi: the VSI being configured
1750 *
1751 * Return 0 on success and a negative value on error
1752 * Configure the Tx VSI for operation.
1753 */
1754int ice_vsi_cfg_lan_txqs(struct ice_vsi *vsi)
1755{
1756 return ice_vsi_cfg_txqs(vsi, vsi->tx_rings, 0);
1757}
1758
9e4ab4c2
BC		 1759/**
1760 * ice_intrl_usec_to_reg - convert interrupt rate limit to register value
1761 * @intrl: interrupt rate limit in usecs
1762 * @gran: interrupt rate limit granularity in usecs
1763 *
1764 * This function converts a decimal interrupt rate limit in usecs to the format
1765 * expected by firmware.
1766 */
1767static u32 ice_intrl_usec_to_reg(u8 intrl, u8 gran)
1768{
1769 u32 val = intrl / gran;
1770
1771 if (val)
1772 return val | GLINT_RATE_INTRL_ENA_M;
1773 return 0;
1774}
1775
70457520
BC		 1776/**
1777 * ice_cfg_itr_gran - set the ITR granularity to 2 usecs if not already set
1778 * @hw: board specific structure
1779 */
1780static void ice_cfg_itr_gran(struct ice_hw *hw)
1781{
1782 u32 regval = rd32(hw, GLINT_CTL);
1783
1784 /* no need to update global register if ITR gran is already set */
1785 if (!(regval & GLINT_CTL_DIS_AUTOMASK_M) &&
1786 (((regval & GLINT_CTL_ITR_GRAN_200_M) >>
1787 GLINT_CTL_ITR_GRAN_200_S) == ICE_ITR_GRAN_US) &&
1788 (((regval & GLINT_CTL_ITR_GRAN_100_M) >>
1789 GLINT_CTL_ITR_GRAN_100_S) == ICE_ITR_GRAN_US) &&
1790 (((regval & GLINT_CTL_ITR_GRAN_50_M) >>
1791 GLINT_CTL_ITR_GRAN_50_S) == ICE_ITR_GRAN_US) &&
1792 (((regval & GLINT_CTL_ITR_GRAN_25_M) >>
1793 GLINT_CTL_ITR_GRAN_25_S) == ICE_ITR_GRAN_US))
1794 return;
1795
1796 regval = ((ICE_ITR_GRAN_US << GLINT_CTL_ITR_GRAN_200_S) &
1797 GLINT_CTL_ITR_GRAN_200_M) |
1798 ((ICE_ITR_GRAN_US << GLINT_CTL_ITR_GRAN_100_S) &
1799 GLINT_CTL_ITR_GRAN_100_M) |
1800 ((ICE_ITR_GRAN_US << GLINT_CTL_ITR_GRAN_50_S) &
1801 GLINT_CTL_ITR_GRAN_50_M) |
1802 ((ICE_ITR_GRAN_US << GLINT_CTL_ITR_GRAN_25_S) &
1803 GLINT_CTL_ITR_GRAN_25_M);
1804 wr32(hw, GLINT_CTL, regval);
1805}
1806
d2b464a7
BC		 1807/**
1808 * ice_cfg_itr - configure the initial interrupt throttle values
1809 * @hw: pointer to the HW structure
1810 * @q_vector: interrupt vector that's being configured
1811 * @vector: HW vector index to apply the interrupt throttling to
1812 *
1813 * Configure interrupt throttling values for the ring containers that are
1814 * associated with the interrupt vector passed in.
1815 */
1816static void
1817ice_cfg_itr(struct ice_hw *hw, struct ice_q_vector *q_vector, u16 vector)
1818{
70457520
BC		 1819 ice_cfg_itr_gran(hw);
1820
d2b464a7
BC		 1821 if (q_vector->num_ring_rx) {
1822 struct ice_ring_container *rc = &q_vector->rx;
1823
63f545ed
BC		 1824 /* if this value is set then don't overwrite with default */
1825 if (!rc->itr_setting)
1826 rc->itr_setting = ICE_DFLT_RX_ITR;
1827
1828 rc->target_itr = ITR_TO_REG(rc->itr_setting);
1829 rc->next_update = jiffies + 1;
1830 rc->current_itr = rc->target_itr;
63f545ed
BC		 1831 wr32(hw, GLINT_ITR(rc->itr_idx, vector),
1832 ITR_REG_ALIGN(rc->current_itr) >> ICE_ITR_GRAN_S);
d2b464a7
BC		 1833 }
1834
1835 if (q_vector->num_ring_tx) {
1836 struct ice_ring_container *rc = &q_vector->tx;
1837
63f545ed
BC		 1838 /* if this value is set then don't overwrite with default */
1839 if (!rc->itr_setting)
1840 rc->itr_setting = ICE_DFLT_TX_ITR;
1841
1842 rc->target_itr = ITR_TO_REG(rc->itr_setting);
1843 rc->next_update = jiffies + 1;
1844 rc->current_itr = rc->target_itr;
63f545ed
BC		 1845 wr32(hw, GLINT_ITR(rc->itr_idx, vector),
1846 ITR_REG_ALIGN(rc->current_itr) >> ICE_ITR_GRAN_S);
d2b464a7
BC		 1847 }
1848}
1849
72adf242
AV		 1850/**
1851 * ice_vsi_cfg_msix - MSIX mode Interrupt Config in the HW
1852 * @vsi: the VSI being configured
1853 */
1854void ice_vsi_cfg_msix(struct ice_vsi *vsi)
1855{
1856 struct ice_pf *pf = vsi->back;
eb0208ec 1857 u16 vector = vsi->hw_base_vector;
72adf242
AV		 1858 struct ice_hw *hw = &pf->hw;
1859 u32 txq = 0, rxq = 0;
d2b464a7 1860 int i, q;
72adf242
AV		 1861
1862 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
1863 struct ice_q_vector *q_vector = vsi->q_vectors[i];
1864
d2b464a7 1865 ice_cfg_itr(hw, q_vector, vector);
9e4ab4c2 1866
9e4ab4c2
BC		 1867 wr32(hw, GLINT_RATE(vector),
1868 ice_intrl_usec_to_reg(q_vector->intrl, hw->intrl_gran));
72adf242
AV		 1869
1870 /* Both Transmit Queue Interrupt Cause Control register
1871 * and Receive Queue Interrupt Cause control register
1872 * expects MSIX_INDX field to be the vector index
1873 * within the function space and not the absolute
1874 * vector index across PF or across device.
1875 * For SR-IOV VF VSIs queue vector index always starts
1876 * with 1 since first vector index(0) is used for OICR
1877 * in VF space. Since VMDq and other PF VSIs are within
1878 * the PF function space, use the vector index that is
1879 * tracked for this PF.
1880 */
1881 for (q = 0; q < q_vector->num_ring_tx; q++) {
d2b464a7 1882 int itr_idx = q_vector->tx.itr_idx;
72adf242
AV		 1883 u32 val;
1884
8ede0178
AV		 1885 if (vsi->type == ICE_VSI_VF)
1886 val = QINT_TQCTL_CAUSE_ENA_M |
d2b464a7 1887 (itr_idx << QINT_TQCTL_ITR_INDX_S) |
8ede0178
AV		 1888 ((i + 1) << QINT_TQCTL_MSIX_INDX_S);
1889 else
1890 val = QINT_TQCTL_CAUSE_ENA_M |
d2b464a7 1891 (itr_idx << QINT_TQCTL_ITR_INDX_S) |
8ede0178 1892 (vector << QINT_TQCTL_MSIX_INDX_S);
72adf242
AV		 1893 wr32(hw, QINT_TQCTL(vsi->txq_map[txq]), val);
1894 txq++;
1895 }
1896
1897 for (q = 0; q < q_vector->num_ring_rx; q++) {
d2b464a7 1898 int itr_idx = q_vector->rx.itr_idx;
72adf242
AV		 1899 u32 val;
1900
8ede0178
AV		 1901 if (vsi->type == ICE_VSI_VF)
1902 val = QINT_RQCTL_CAUSE_ENA_M |
d2b464a7 1903 (itr_idx << QINT_RQCTL_ITR_INDX_S) |
8ede0178
AV		 1904 ((i + 1) << QINT_RQCTL_MSIX_INDX_S);
1905 else
1906 val = QINT_RQCTL_CAUSE_ENA_M |
d2b464a7 1907 (itr_idx << QINT_RQCTL_ITR_INDX_S) |
8ede0178 1908 (vector << QINT_RQCTL_MSIX_INDX_S);
72adf242
AV		 1909 wr32(hw, QINT_RQCTL(vsi->rxq_map[rxq]), val);
1910 rxq++;
1911 }
1912 }
1913
1914 ice_flush(hw);
1915}
1916
45d3d428
AV		 1917/**
1918 * ice_vsi_manage_vlan_insertion - Manage VLAN insertion for the VSI for Tx
1919 * @vsi: the VSI being changed
1920 */
1921int ice_vsi_manage_vlan_insertion(struct ice_vsi *vsi)
1922{
1923 struct device *dev = &vsi->back->pdev->dev;
1924 struct ice_hw *hw = &vsi->back->hw;
198a666a 1925 struct ice_vsi_ctx *ctxt;
45d3d428 1926 enum ice_status status;
198a666a
BA		 1927 int ret = 0;
1928
1929 ctxt = devm_kzalloc(dev, sizeof(*ctxt), GFP_KERNEL);
1930 if (!ctxt)
1931 return -ENOMEM;
45d3d428
AV		 1932
1933 /* Here we are configuring the VSI to let the driver add VLAN tags by
1934 * setting vlan_flags to ICE_AQ_VSI_VLAN_MODE_ALL. The actual VLAN tag
1935 * insertion happens in the Tx hot path, in ice_tx_map.
1936 */
198a666a 1937 ctxt->info.vlan_flags = ICE_AQ_VSI_VLAN_MODE_ALL;
45d3d428 1938
198a666a 1939 ctxt->info.valid_sections = cpu_to_le16(ICE_AQ_VSI_PROP_VLAN_VALID);
45d3d428 1940
198a666a 1941 status = ice_update_vsi(hw, vsi->idx, ctxt, NULL);
45d3d428
AV		 1942 if (status) {
1943 dev_err(dev, "update VSI for VLAN insert failed, err %d aq_err %d\n",
1944 status, hw->adminq.sq_last_status);
198a666a
BA		 1945 ret = -EIO;
1946 goto out;
45d3d428
AV		 1947 }
1948
198a666a
BA		 1949 vsi->info.vlan_flags = ctxt->info.vlan_flags;
1950out:
1951 devm_kfree(dev, ctxt);
1952 return ret;
45d3d428
AV		 1953}
1954
1955/**
1956 * ice_vsi_manage_vlan_stripping - Manage VLAN stripping for the VSI for Rx
1957 * @vsi: the VSI being changed
1958 * @ena: boolean value indicating if this is a enable or disable request
1959 */
1960int ice_vsi_manage_vlan_stripping(struct ice_vsi *vsi, bool ena)
1961{
1962 struct device *dev = &vsi->back->pdev->dev;
1963 struct ice_hw *hw = &vsi->back->hw;
198a666a 1964 struct ice_vsi_ctx *ctxt;
45d3d428 1965 enum ice_status status;
198a666a
BA		 1966 int ret = 0;
1967
1968 ctxt = devm_kzalloc(dev, sizeof(*ctxt), GFP_KERNEL);
1969 if (!ctxt)
1970 return -ENOMEM;
45d3d428
AV		 1971
1972 /* Here we are configuring what the VSI should do with the VLAN tag in
1973 * the Rx packet. We can either leave the tag in the packet or put it in
1974 * the Rx descriptor.
1975 */
198a666a 1976 if (ena)
45d3d428 1977 /* Strip VLAN tag from Rx packet and put it in the desc */
198a666a
BA		 1978 ctxt->info.vlan_flags = ICE_AQ_VSI_VLAN_EMOD_STR_BOTH;
1979 else
45d3d428 1980 /* Disable stripping. Leave tag in packet */
198a666a 1981 ctxt->info.vlan_flags = ICE_AQ_VSI_VLAN_EMOD_NOTHING;
45d3d428
AV		 1982
1983 /* Allow all packets untagged/tagged */
198a666a 1984 ctxt->info.vlan_flags |= ICE_AQ_VSI_VLAN_MODE_ALL;
45d3d428 1985
198a666a 1986 ctxt->info.valid_sections = cpu_to_le16(ICE_AQ_VSI_PROP_VLAN_VALID);
45d3d428 1987
198a666a 1988 status = ice_update_vsi(hw, vsi->idx, ctxt, NULL);
45d3d428
AV		 1989 if (status) {
1990 dev_err(dev, "update VSI for VLAN strip failed, ena = %d err %d aq_err %d\n",
1991 ena, status, hw->adminq.sq_last_status);
198a666a
BA		 1992 ret = -EIO;
1993 goto out;
45d3d428
AV		 1994 }
1995
198a666a
BA		 1996 vsi->info.vlan_flags = ctxt->info.vlan_flags;
1997out:
1998 devm_kfree(dev, ctxt);
1999 return ret;
45d3d428 2000}
72adf242
AV		 2001
2002/**
2003 * ice_vsi_start_rx_rings - start VSI's Rx rings
2004 * @vsi: the VSI whose rings are to be started
2005 *
2006 * Returns 0 on success and a negative value on error
2007 */
2008int ice_vsi_start_rx_rings(struct ice_vsi *vsi)
2009{
2010 return ice_vsi_ctrl_rx_rings(vsi, true);
2011}
2012
2013/**
2014 * ice_vsi_stop_rx_rings - stop VSI's Rx rings
2015 * @vsi: the VSI
2016 *
2017 * Returns 0 on success and a negative value on error
2018 */
2019int ice_vsi_stop_rx_rings(struct ice_vsi *vsi)
2020{
2021 return ice_vsi_ctrl_rx_rings(vsi, false);
2022}
2023
2024/**
2025 * ice_vsi_stop_tx_rings - Disable Tx rings
2026 * @vsi: the VSI being configured
ddf30f7f 2027 * @rst_src: reset source
f9867df6 2028 * @rel_vmvf_num: Relative ID of VF/VM
03f7a986
AV		 2029 * @rings: Tx ring array to be stopped
2030 * @offset: offset within vsi->txq_map
72adf242 2031 */
03f7a986
AV		 2032static int
2033ice_vsi_stop_tx_rings(struct ice_vsi *vsi, enum ice_disq_rst_src rst_src,
2034 u16 rel_vmvf_num, struct ice_ring **rings, int offset)
72adf242
AV		 2035{
2036 struct ice_pf *pf = vsi->back;
2037 struct ice_hw *hw = &pf->hw;
bb87ee0e
AV		 2038 int tc, q_idx = 0, err = 0;
2039 u16 *q_ids, *q_handles, i;
72adf242
AV		 2040 enum ice_status status;
2041 u32 *q_teids, val;
72adf242
AV		 2042
2043 if (vsi->num_txq > ICE_LAN_TXQ_MAX_QDIS)
2044 return -EINVAL;
2045
2046 q_teids = devm_kcalloc(&pf->pdev->dev, vsi->num_txq, sizeof(*q_teids),
2047 GFP_KERNEL);
2048 if (!q_teids)
2049 return -ENOMEM;
2050
2051 q_ids = devm_kcalloc(&pf->pdev->dev, vsi->num_txq, sizeof(*q_ids),
2052 GFP_KERNEL);
2053 if (!q_ids) {
2054 err = -ENOMEM;
2055 goto err_alloc_q_ids;
2056 }
2057
bb87ee0e
AV		 2058 q_handles = devm_kcalloc(&pf->pdev->dev, vsi->num_txq,
2059 sizeof(*q_handles), GFP_KERNEL);
2060 if (!q_handles) {
2061 err = -ENOMEM;
2062 goto err_alloc_q_handles;
2063 }
72adf242 2064
bb87ee0e
AV		 2065 /* set up the Tx queue list to be disabled for each enabled TC */
2066 ice_for_each_traffic_class(tc) {
2067 if (!(vsi->tc_cfg.ena_tc & BIT(tc)))
2068 break;
2069
2070 for (i = 0; i < vsi->tc_cfg.tc_info[tc].qcount_tx; i++) {
2071 u16 v_idx;
2072
a92e1bb6
MF		 2073 if (!rings || !rings[q_idx] ||
2074 !rings[q_idx]->q_vector) {
bb87ee0e
AV		 2075 err = -EINVAL;
2076 goto err_out;
2077 }
72adf242 2078
bb87ee0e
AV		 2079 q_ids[i] = vsi->txq_map[q_idx + offset];
2080 q_teids[i] = rings[q_idx]->txq_teid;
2081 q_handles[i] = i;
72adf242 2082
bb87ee0e
AV		 2083 /* clear cause_ena bit for disabled queues */
2084 val = rd32(hw, QINT_TQCTL(rings[i]->reg_idx));
2085 val &= ~QINT_TQCTL_CAUSE_ENA_M;
2086 wr32(hw, QINT_TQCTL(rings[i]->reg_idx), val);
72adf242 2087
bb87ee0e
AV		 2088 /* software is expected to wait for 100 ns */
2089 ndelay(100);
72adf242 2090
bb87ee0e
AV		 2091 /* trigger a software interrupt for the vector
2092 * associated to the queue to schedule NAPI handler
2093 */
2094 v_idx = rings[i]->q_vector->v_idx;
2095 wr32(hw, GLINT_DYN_CTL(vsi->hw_base_vector + v_idx),
2096 GLINT_DYN_CTL_SWINT_TRIG_M |
2097 GLINT_DYN_CTL_INTENA_MSK_M);
2098 q_idx++;
2099 }
2100 status = ice_dis_vsi_txq(vsi->port_info, vsi->idx, tc,
2101 vsi->num_txq, q_handles, q_ids,
2102 q_teids, rst_src, rel_vmvf_num, NULL);
2103
2104 /* if the disable queue command was exercised during an active
2105 * reset flow, ICE_ERR_RESET_ONGOING is returned. This is not
2106 * an error as the reset operation disables queues at the
2107 * hardware level anyway.
72adf242 2108 */
bb87ee0e
AV		 2109 if (status == ICE_ERR_RESET_ONGOING) {
2110 dev_dbg(&pf->pdev->dev,
2111 "Reset in progress. LAN Tx queues already disabled\n");
2112 } else if (status) {
2113 dev_err(&pf->pdev->dev,
2114 "Failed to disable LAN Tx queues, error: %d\n",
2115 status);
2116 err = -ENODEV;
2117 }
72adf242
AV		 2118 }
2119
2120err_out:
bb87ee0e
AV		 2121 devm_kfree(&pf->pdev->dev, q_handles);
2122
2123err_alloc_q_handles:
72adf242
AV		 2124 devm_kfree(&pf->pdev->dev, q_ids);
2125
2126err_alloc_q_ids:
2127 devm_kfree(&pf->pdev->dev, q_teids);
2128
2129 return err;
2130}
5153a18e 2131
03f7a986
AV		 2132/**
2133 * ice_vsi_stop_lan_tx_rings - Disable LAN Tx rings
2134 * @vsi: the VSI being configured
2135 * @rst_src: reset source
f9867df6 2136 * @rel_vmvf_num: Relative ID of VF/VM
03f7a986 2137 */
c8b7abdd
BA		 2138int
2139ice_vsi_stop_lan_tx_rings(struct ice_vsi *vsi, enum ice_disq_rst_src rst_src,
2140 u16 rel_vmvf_num)
03f7a986
AV		 2141{
2142 return ice_vsi_stop_tx_rings(vsi, rst_src, rel_vmvf_num, vsi->tx_rings,
2143 0);
2144}
2145
5153a18e
AV		 2146/**
2147 * ice_cfg_vlan_pruning - enable or disable VLAN pruning on the VSI
2148 * @vsi: VSI to enable or disable VLAN pruning on
2149 * @ena: set to true to enable VLAN pruning and false to disable it
5eda8afd 2150 * @vlan_promisc: enable valid security flags if not in VLAN promiscuous mode
5153a18e
AV		 2151 *
2152 * returns 0 if VSI is updated, negative otherwise
2153 */
5eda8afd 2154int ice_cfg_vlan_pruning(struct ice_vsi *vsi, bool ena, bool vlan_promisc)
5153a18e
AV		 2155{
2156 struct ice_vsi_ctx *ctxt;
2157 struct device *dev;
2158 int status;
2159
2160 if (!vsi)
2161 return -EINVAL;
2162
2163 dev = &vsi->back->pdev->dev;
2164 ctxt = devm_kzalloc(dev, sizeof(*ctxt), GFP_KERNEL);
2165 if (!ctxt)
2166 return -ENOMEM;
2167
2168 ctxt->info = vsi->info;
2169
2170 if (ena) {
2171 ctxt->info.sec_flags |=
2172 ICE_AQ_VSI_SEC_TX_VLAN_PRUNE_ENA <<
2173 ICE_AQ_VSI_SEC_TX_PRUNE_ENA_S;
2174 ctxt->info.sw_flags2 |= ICE_AQ_VSI_SW_FLAG_RX_VLAN_PRUNE_ENA;
2175 } else {
2176 ctxt->info.sec_flags &=
2177 ~(ICE_AQ_VSI_SEC_TX_VLAN_PRUNE_ENA <<
2178 ICE_AQ_VSI_SEC_TX_PRUNE_ENA_S);
2179 ctxt->info.sw_flags2 &= ~ICE_AQ_VSI_SW_FLAG_RX_VLAN_PRUNE_ENA;
2180 }
2181
5eda8afd
AA		 2182 if (!vlan_promisc)
2183 ctxt->info.valid_sections =
2184 cpu_to_le16(ICE_AQ_VSI_PROP_SECURITY_VALID |
2185 ICE_AQ_VSI_PROP_SW_VALID);
5726ca0e
AV		 2186
2187 status = ice_update_vsi(&vsi->back->hw, vsi->idx, ctxt, NULL);
5153a18e 2188 if (status) {
5726ca0e 2189 netdev_err(vsi->netdev, "%sabling VLAN pruning on VSI handle: %d, VSI HW ID: %d failed, err = %d, aq_err = %d\n",
31082519 2190 ena ? "En" : "Dis", vsi->idx, vsi->vsi_num, status,
5153a18e
AV		 2191 vsi->back->hw.adminq.sq_last_status);
2192 goto err_out;
2193 }
2194
2195 vsi->info.sec_flags = ctxt->info.sec_flags;
2196 vsi->info.sw_flags2 = ctxt->info.sw_flags2;
2197
2198 devm_kfree(dev, ctxt);
2199 return 0;
2200
2201err_out:
2202 devm_kfree(dev, ctxt);
2203 return -EIO;
2204}
2205
7b9ffc76
AV		 2206static void ice_vsi_set_tc_cfg(struct ice_vsi *vsi)
2207{
2208 struct ice_dcbx_cfg *cfg = &vsi->port_info->local_dcbx_cfg;
2209
2210 vsi->tc_cfg.ena_tc = ice_dcb_get_ena_tc(cfg);
2211 vsi->tc_cfg.numtc = ice_dcb_get_num_tc(cfg);
2212}
2213
37bb8390
AV		 2214/**
2215 * ice_vsi_setup - Set up a VSI by a given type
2216 * @pf: board private structure
2217 * @pi: pointer to the port_info instance
2218 * @type: VSI type
f9867df6 2219 * @vf_id: defines VF ID to which this VSI connects. This field is meant to be
37bb8390
AV		 2220 * used only for ICE_VSI_VF VSI type. For other VSI types, should
2221 * fill-in ICE_INVAL_VFID as input.
2222 *
2223 * This allocates the sw VSI structure and its queue resources.
2224 *
2225 * Returns pointer to the successfully allocated and configured VSI sw struct on
2226 * success, NULL on failure.
2227 */
2228struct ice_vsi *
2229ice_vsi_setup(struct ice_pf *pf, struct ice_port_info *pi,
8ede0178 2230 enum ice_vsi_type type, u16 vf_id)
37bb8390
AV		 2231{
2232 u16 max_txqs[ICE_MAX_TRAFFIC_CLASS] = { 0 };
2233 struct device *dev = &pf->pdev->dev;
2234 struct ice_vsi *vsi;
2235 int ret, i;
2236
5743020d
AA		 2237 if (type == ICE_VSI_VF)
2238 vsi = ice_vsi_alloc(pf, type, vf_id);
2239 else
2240 vsi = ice_vsi_alloc(pf, type, ICE_INVAL_VFID);
2241
37bb8390
AV		 2242 if (!vsi) {
2243 dev_err(dev, "could not allocate VSI\n");
2244 return NULL;
2245 }
2246
2247 vsi->port_info = pi;
2248 vsi->vsw = pf->first_sw;
8ede0178
AV		 2249 if (vsi->type == ICE_VSI_VF)
2250 vsi->vf_id = vf_id;
37bb8390
AV		 2251
2252 if (ice_vsi_get_qs(vsi)) {
2253 dev_err(dev, "Failed to allocate queues. vsi->idx = %d\n",
2254 vsi->idx);
2255 goto unroll_get_qs;
2256 }
2257
2258 /* set RSS capabilities */
2259 ice_vsi_set_rss_params(vsi);
2260
f9867df6 2261 /* set TC configuration */
c5a2a4a3
UK		 2262 ice_vsi_set_tc_cfg(vsi);
2263
37bb8390
AV		 2264 /* create the VSI */
2265 ret = ice_vsi_init(vsi);
2266 if (ret)
2267 goto unroll_get_qs;
2268
2269 switch (vsi->type) {
2270 case ICE_VSI_PF:
2271 ret = ice_vsi_alloc_q_vectors(vsi);
2272 if (ret)
2273 goto unroll_vsi_init;
2274
2275 ret = ice_vsi_setup_vector_base(vsi);
2276 if (ret)
2277 goto unroll_alloc_q_vector;
2278
2279 ret = ice_vsi_alloc_rings(vsi);
2280 if (ret)
2281 goto unroll_vector_base;
2282
2283 ice_vsi_map_rings_to_vectors(vsi);
2284
2285 /* Do not exit if configuring RSS had an issue, at least
2286 * receive traffic on first queue. Hence no need to capture
2287 * return value
2288 */
2289 if (test_bit(ICE_FLAG_RSS_ENA, pf->flags))
2290 ice_vsi_cfg_rss_lut_key(vsi);
2291 break;
8ede0178
AV		 2292 case ICE_VSI_VF:
2293 /* VF driver will take care of creating netdev for this type and
2294 * map queues to vectors through Virtchnl, PF driver only
2295 * creates a VSI and corresponding structures for bookkeeping
2296 * purpose
2297 */
2298 ret = ice_vsi_alloc_q_vectors(vsi);
2299 if (ret)
2300 goto unroll_vsi_init;
2301
2302 ret = ice_vsi_alloc_rings(vsi);
2303 if (ret)
2304 goto unroll_alloc_q_vector;
2305
2306 /* Setup Vector base only during VF init phase or when VF asks
2307 * for more vectors than assigned number. In all other cases,
2308 * assign hw_base_vector to the value given earlier.
2309 */
2310 if (test_bit(ICE_VF_STATE_CFG_INTR, pf->vf[vf_id].vf_states)) {
2311 ret = ice_vsi_setup_vector_base(vsi);
2312 if (ret)
2313 goto unroll_vector_base;
2314 } else {
2315 vsi->hw_base_vector = pf->vf[vf_id].first_vector_idx;
2316 }
2317 pf->q_left_tx -= vsi->alloc_txq;
2318 pf->q_left_rx -= vsi->alloc_rxq;
2319 break;
37bb8390 2320 default:
df17b7e0 2321 /* clean up the resources and exit */
37bb8390
AV		 2322 goto unroll_vsi_init;
2323 }
2324
37bb8390
AV		 2325 /* configure VSI nodes based on number of queues and TC's */
2326 for (i = 0; i < vsi->tc_cfg.numtc; i++)
c5a2a4a3 2327 max_txqs[i] = pf->num_lan_tx;
37bb8390 2328
4fb33f31
AV		 2329 ret = ice_cfg_vsi_lan(vsi->port_info, vsi->idx, vsi->tc_cfg.ena_tc,
2330 max_txqs);
37bb8390
AV		 2331 if (ret) {
2332 dev_info(&pf->pdev->dev, "Failed VSI lan queue config\n");
2333 goto unroll_vector_base;
2334 }
2335
2336 return vsi;
2337
2338unroll_vector_base:
eb0208ec
PB		 2339 /* reclaim SW interrupts back to the common pool */
2340 ice_free_res(vsi->back->sw_irq_tracker, vsi->sw_base_vector, vsi->idx);
2341 pf->num_avail_sw_msix += vsi->num_q_vectors;
2342 /* reclaim HW interrupt back to the common pool */
2343 ice_free_res(vsi->back->hw_irq_tracker, vsi->hw_base_vector, vsi->idx);
2344 pf->num_avail_hw_msix += vsi->num_q_vectors;
37bb8390
AV		 2345unroll_alloc_q_vector:
2346 ice_vsi_free_q_vectors(vsi);
2347unroll_vsi_init:
2348 ice_vsi_delete(vsi);
2349unroll_get_qs:
2350 ice_vsi_put_qs(vsi);
2351 pf->q_left_tx += vsi->alloc_txq;
2352 pf->q_left_rx += vsi->alloc_rxq;
2353 ice_vsi_clear(vsi);
2354
2355 return NULL;
2356}
2357
5153a18e
AV		 2358/**
2359 * ice_vsi_release_msix - Clear the queue to Interrupt mapping in HW
2360 * @vsi: the VSI being cleaned up
2361 */
2362static void ice_vsi_release_msix(struct ice_vsi *vsi)
2363{
2364 struct ice_pf *pf = vsi->back;
eb0208ec 2365 u16 vector = vsi->hw_base_vector;
5153a18e
AV		 2366 struct ice_hw *hw = &pf->hw;
2367 u32 txq = 0;
2368 u32 rxq = 0;
2369 int i, q;
2370
2371 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
2372 struct ice_q_vector *q_vector = vsi->q_vectors[i];
2373
d2b464a7
BC		 2374 wr32(hw, GLINT_ITR(ICE_IDX_ITR0, vector), 0);
2375 wr32(hw, GLINT_ITR(ICE_IDX_ITR1, vector), 0);
5153a18e
AV		 2376 for (q = 0; q < q_vector->num_ring_tx; q++) {
2377 wr32(hw, QINT_TQCTL(vsi->txq_map[txq]), 0);
2378 txq++;
2379 }
2380
2381 for (q = 0; q < q_vector->num_ring_rx; q++) {
2382 wr32(hw, QINT_RQCTL(vsi->rxq_map[rxq]), 0);
2383 rxq++;
2384 }
2385 }
2386
2387 ice_flush(hw);
2388}
2389
2390/**
2391 * ice_vsi_free_irq - Free the IRQ association with the OS
2392 * @vsi: the VSI being configured
2393 */
2394void ice_vsi_free_irq(struct ice_vsi *vsi)
2395{
2396 struct ice_pf *pf = vsi->back;
eb0208ec 2397 int base = vsi->sw_base_vector;
5153a18e
AV		 2398
2399 if (test_bit(ICE_FLAG_MSIX_ENA, pf->flags)) {
2400 int i;
2401
2402 if (!vsi->q_vectors || !vsi->irqs_ready)
2403 return;
2404
eb0208ec 2405 ice_vsi_release_msix(vsi);
8ede0178
AV		 2406 if (vsi->type == ICE_VSI_VF)
2407 return;
eb0208ec 2408
5153a18e 2409 vsi->irqs_ready = false;
0c2561c8 2410 ice_for_each_q_vector(vsi, i) {
5153a18e
AV		 2411 u16 vector = i + base;
2412 int irq_num;
2413
2414 irq_num = pf->msix_entries[vector].vector;
2415
2416 /* free only the irqs that were actually requested */
2417 if (!vsi->q_vectors[i] ||
2418 !(vsi->q_vectors[i]->num_ring_tx ||
2419 vsi->q_vectors[i]->num_ring_rx))
2420 continue;
2421
2422 /* clear the affinity notifier in the IRQ descriptor */
2423 irq_set_affinity_notifier(irq_num, NULL);
2424
2425 /* clear the affinity_mask in the IRQ descriptor */
2426 irq_set_affinity_hint(irq_num, NULL);
2427 synchronize_irq(irq_num);
2428 devm_free_irq(&pf->pdev->dev, irq_num,
2429 vsi->q_vectors[i]);
2430 }
5153a18e
AV		 2431 }
2432}
2433
2434/**
2435 * ice_vsi_free_tx_rings - Free Tx resources for VSI queues
2436 * @vsi: the VSI having resources freed
2437 */
2438void ice_vsi_free_tx_rings(struct ice_vsi *vsi)
2439{
2440 int i;
2441
2442 if (!vsi->tx_rings)
2443 return;
2444
2445 ice_for_each_txq(vsi, i)
2446 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
2447 ice_free_tx_ring(vsi->tx_rings[i]);
2448}
2449
2450/**
2451 * ice_vsi_free_rx_rings - Free Rx resources for VSI queues
2452 * @vsi: the VSI having resources freed
2453 */
2454void ice_vsi_free_rx_rings(struct ice_vsi *vsi)
2455{
2456 int i;
2457
2458 if (!vsi->rx_rings)
2459 return;
2460
2461 ice_for_each_rxq(vsi, i)
2462 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
2463 ice_free_rx_ring(vsi->rx_rings[i]);
2464}
2465
07309a0e
AV		 2466/**
2467 * ice_vsi_close - Shut down a VSI
2468 * @vsi: the VSI being shut down
2469 */
2470void ice_vsi_close(struct ice_vsi *vsi)
2471{
2472 if (!test_and_set_bit(__ICE_DOWN, vsi->state))
2473 ice_down(vsi);
2474
2475 ice_vsi_free_irq(vsi);
2476 ice_vsi_free_tx_rings(vsi);
2477 ice_vsi_free_rx_rings(vsi);
2478}
2479
5153a18e
AV		 2480/**
2481 * ice_free_res - free a block of resources
2482 * @res: pointer to the resource
2483 * @index: starting index previously returned by ice_get_res
2484 * @id: identifier to track owner
2485 *
2486 * Returns number of resources freed
2487 */
2488int ice_free_res(struct ice_res_tracker *res, u16 index, u16 id)
2489{
2490 int count = 0;
2491 int i;
2492
2493 if (!res || index >= res->num_entries)
2494 return -EINVAL;
2495
2496 id |= ICE_RES_VALID_BIT;
2497 for (i = index; i < res->num_entries && res->list[i] == id; i++) {
2498 res->list[i] = 0;
2499 count++;
2500 }
2501
2502 return count;
2503}
2504
2505/**
2506 * ice_search_res - Search the tracker for a block of resources
2507 * @res: pointer to the resource
2508 * @needed: size of the block needed
2509 * @id: identifier to track owner
2510 *
2511 * Returns the base item index of the block, or -ENOMEM for error
2512 */
2513static int ice_search_res(struct ice_res_tracker *res, u16 needed, u16 id)
2514{
2515 int start = res->search_hint;
2516 int end = start;
2517
d337f2af 2518 if ((start + needed) > res->num_entries)
eb0208ec
PB		 2519 return -ENOMEM;
2520
5153a18e
AV		 2521 id |= ICE_RES_VALID_BIT;
2522
2523 do {
2524 /* skip already allocated entries */
2525 if (res->list[end++] & ICE_RES_VALID_BIT) {
2526 start = end;
2527 if ((start + needed) > res->num_entries)
2528 break;
2529 }
2530
2531 if (end == (start + needed)) {
2532 int i = start;
2533
2534 /* there was enough, so assign it to the requestor */
2535 while (i != end)
2536 res->list[i++] = id;
2537
2538 if (end == res->num_entries)
2539 end = 0;
2540
2541 res->search_hint = end;
2542 return start;
2543 }
2544 } while (1);
2545
2546 return -ENOMEM;
2547}
2548
2549/**
2550 * ice_get_res - get a block of resources
2551 * @pf: board private structure
2552 * @res: pointer to the resource
2553 * @needed: size of the block needed
2554 * @id: identifier to track owner
2555 *
2556 * Returns the base item index of the block, or -ENOMEM for error
2557 * The search_hint trick and lack of advanced fit-finding only works
2558 * because we're highly likely to have all the same sized requests.
2559 * Linear search time and any fragmentation should be minimal.
2560 */
2561int
2562ice_get_res(struct ice_pf *pf, struct ice_res_tracker *res, u16 needed, u16 id)
2563{
2564 int ret;
2565
2566 if (!res || !pf)
2567 return -EINVAL;
2568
2569 if (!needed || needed > res->num_entries || id >= ICE_RES_VALID_BIT) {
2570 dev_err(&pf->pdev->dev,
2571 "param err: needed=%d, num_entries = %d id=0x%04x\n",
2572 needed, res->num_entries, id);
2573 return -EINVAL;
2574 }
2575
2576 /* search based on search_hint */
2577 ret = ice_search_res(res, needed, id);
2578
2579 if (ret < 0) {
2580 /* previous search failed. Reset search hint and try again */
2581 res->search_hint = 0;
2582 ret = ice_search_res(res, needed, id);
2583 }
2584
2585 return ret;
2586}
2587
2588/**
2589 * ice_vsi_dis_irq - Mask off queue interrupt generation on the VSI
2590 * @vsi: the VSI being un-configured
2591 */
2592void ice_vsi_dis_irq(struct ice_vsi *vsi)
2593{
eb0208ec 2594 int base = vsi->sw_base_vector;
5153a18e
AV		 2595 struct ice_pf *pf = vsi->back;
2596 struct ice_hw *hw = &pf->hw;
5153a18e
AV		 2597 u32 val;
2598 int i;
2599
2600 /* disable interrupt causation from each queue */
2601 if (vsi->tx_rings) {
2602 ice_for_each_txq(vsi, i) {
2603 if (vsi->tx_rings[i]) {
2604 u16 reg;
2605
2606 reg = vsi->tx_rings[i]->reg_idx;
2607 val = rd32(hw, QINT_TQCTL(reg));
2608 val &= ~QINT_TQCTL_CAUSE_ENA_M;
2609 wr32(hw, QINT_TQCTL(reg), val);
2610 }
2611 }
2612 }
2613
2614 if (vsi->rx_rings) {
2615 ice_for_each_rxq(vsi, i) {
2616 if (vsi->rx_rings[i]) {
2617 u16 reg;
2618
2619 reg = vsi->rx_rings[i]->reg_idx;
2620 val = rd32(hw, QINT_RQCTL(reg));
2621 val &= ~QINT_RQCTL_CAUSE_ENA_M;
2622 wr32(hw, QINT_RQCTL(reg), val);
2623 }
2624 }
2625 }
2626
2627 /* disable each interrupt */
2628 if (test_bit(ICE_FLAG_MSIX_ENA, pf->flags)) {
eb0208ec
PB		 2629 for (i = vsi->hw_base_vector;
2630 i < (vsi->num_q_vectors + vsi->hw_base_vector); i++)
5153a18e
AV		 2631 wr32(hw, GLINT_DYN_CTL(i), 0);
2632
2633 ice_flush(hw);
0c2561c8 2634 ice_for_each_q_vector(vsi, i)
5153a18e
AV		 2635 synchronize_irq(pf->msix_entries[i + base].vector);
2636 }
2637}
2638
df0f8479
AV		 2639/**
2640 * ice_vsi_release - Delete a VSI and free its resources
2641 * @vsi: the VSI being removed
2642 *
2643 * Returns 0 on success or < 0 on error
2644 */
2645int ice_vsi_release(struct ice_vsi *vsi)
2646{
b751930c 2647 struct ice_vf *vf = NULL;
df0f8479
AV		 2648 struct ice_pf *pf;
2649
2650 if (!vsi->back)
2651 return -ENODEV;
2652 pf = vsi->back;
b751930c
BC		 2653
2654 if (vsi->type == ICE_VSI_VF)
2655 vf = &pf->vf[vsi->vf_id];
df0f8479
AV		 2656 /* do not unregister and free netdevs while driver is in the reset
2657 * recovery pending state. Since reset/rebuild happens through PF
2658 * service task workqueue, its not a good idea to unregister netdev
2659 * that is associated to the PF that is running the work queue items
2660 * currently. This is done to avoid check_flush_dependency() warning
2661 * on this wq
2662 */
5df7e45d 2663 if (vsi->netdev && !ice_is_reset_in_progress(pf->state)) {
25525b69 2664 ice_napi_del(vsi);
df0f8479
AV		 2665 unregister_netdev(vsi->netdev);
2666 free_netdev(vsi->netdev);
2667 vsi->netdev = NULL;
2668 }
2669
2670 if (test_bit(ICE_FLAG_RSS_ENA, pf->flags))
2671 ice_rss_clean(vsi);
2672
2673 /* Disable VSI and free resources */
2674 ice_vsi_dis_irq(vsi);
2675 ice_vsi_close(vsi);
2676
2677 /* reclaim interrupt vectors back to PF */
8ede0178
AV		 2678 if (vsi->type != ICE_VSI_VF) {
2679 /* reclaim SW interrupts back to the common pool */
2680 ice_free_res(vsi->back->sw_irq_tracker, vsi->sw_base_vector,
2681 vsi->idx);
2682 pf->num_avail_sw_msix += vsi->num_q_vectors;
2683 /* reclaim HW interrupts back to the common pool */
2684 ice_free_res(vsi->back->hw_irq_tracker, vsi->hw_base_vector,
2685 vsi->idx);
2686 pf->num_avail_hw_msix += vsi->num_q_vectors;
2687 } else if (test_bit(ICE_VF_STATE_CFG_INTR, vf->vf_states)) {
2688 /* Reclaim VF resources back only while freeing all VFs or
2689 * vector reassignment is requested
2690 */
2691 ice_free_res(vsi->back->hw_irq_tracker, vf->first_vector_idx,
2692 vsi->idx);
2693 pf->num_avail_hw_msix += pf->num_vf_msix;
2694 }
df0f8479 2695
5726ca0e 2696 ice_remove_vsi_fltr(&pf->hw, vsi->idx);
10e03a22 2697 ice_rm_vsi_lan_cfg(vsi->port_info, vsi->idx);
df0f8479
AV		 2698 ice_vsi_delete(vsi);
2699 ice_vsi_free_q_vectors(vsi);
2700 ice_vsi_clear_rings(vsi);
2701
2702 ice_vsi_put_qs(vsi);
2703 pf->q_left_tx += vsi->alloc_txq;
2704 pf->q_left_rx += vsi->alloc_rxq;
2705
2706 /* retain SW VSI data structure since it is needed to unregister and
2707 * free VSI netdev when PF is not in reset recovery pending state,\
2708 * for ex: during rmmod.
2709 */
5df7e45d 2710 if (!ice_is_reset_in_progress(pf->state))
df0f8479
AV		 2711 ice_vsi_clear(vsi);
2712
2713 return 0;
2714}
2715
2716/**
2717 * ice_vsi_rebuild - Rebuild VSI after reset
2718 * @vsi: VSI to be rebuild
2719 *
2720 * Returns 0 on success and negative value on failure
2721 */
2722int ice_vsi_rebuild(struct ice_vsi *vsi)
2723{
2724 u16 max_txqs[ICE_MAX_TRAFFIC_CLASS] = { 0 };
7eeac889 2725 struct ice_vf *vf = NULL;
c5a2a4a3 2726 struct ice_pf *pf;
df0f8479
AV		 2727 int ret, i;
2728
2729 if (!vsi)
2730 return -EINVAL;
2731
c5a2a4a3 2732 pf = vsi->back;
7eeac889
AA		 2733 if (vsi->type == ICE_VSI_VF)
2734 vf = &pf->vf[vsi->vf_id];
2735
47e3e53c 2736 ice_rm_vsi_lan_cfg(vsi->port_info, vsi->idx);
df0f8479 2737 ice_vsi_free_q_vectors(vsi);
7eeac889
AA		 2738
2739 if (vsi->type != ICE_VSI_VF) {
2740 /* reclaim SW interrupts back to the common pool */
2741 ice_free_res(pf->sw_irq_tracker, vsi->sw_base_vector, vsi->idx);
2742 pf->num_avail_sw_msix += vsi->num_q_vectors;
2743 vsi->sw_base_vector = 0;
2744 /* reclaim HW interrupts back to the common pool */
2745 ice_free_res(pf->hw_irq_tracker, vsi->hw_base_vector,
2746 vsi->idx);
2747 pf->num_avail_hw_msix += vsi->num_q_vectors;
2748 } else {
2749 /* Reclaim VF resources back to the common pool for reset and
2750 * and rebuild, with vector reassignment
2751 */
2752 ice_free_res(pf->hw_irq_tracker, vf->first_vector_idx,
2753 vsi->idx);
2754 pf->num_avail_hw_msix += pf->num_vf_msix;
2755 }
eb0208ec 2756 vsi->hw_base_vector = 0;
7eeac889 2757
df0f8479
AV		 2758 ice_vsi_clear_rings(vsi);
2759 ice_vsi_free_arrays(vsi, false);
f203dca3 2760 ice_dev_onetime_setup(&vsi->back->hw);
5743020d
AA		 2761 if (vsi->type == ICE_VSI_VF)
2762 ice_vsi_set_num_qs(vsi, vf->vf_id);
2763 else
2764 ice_vsi_set_num_qs(vsi, ICE_INVAL_VFID);
c5a2a4a3 2765 ice_vsi_set_tc_cfg(vsi);
df0f8479
AV		 2766
2767 /* Initialize VSI struct elements and create VSI in FW */
2768 ret = ice_vsi_init(vsi);
2769 if (ret < 0)
2770 goto err_vsi;
2771
2772 ret = ice_vsi_alloc_arrays(vsi, false);
2773 if (ret < 0)
2774 goto err_vsi;
2775
2776 switch (vsi->type) {
2777 case ICE_VSI_PF:
2778 ret = ice_vsi_alloc_q_vectors(vsi);
2779 if (ret)
2780 goto err_rings;
2781
2782 ret = ice_vsi_setup_vector_base(vsi);
2783 if (ret)
2784 goto err_vectors;
2785
2786 ret = ice_vsi_alloc_rings(vsi);
2787 if (ret)
2788 goto err_vectors;
2789
2790 ice_vsi_map_rings_to_vectors(vsi);
27a98aff
MFIP		 2791 /* Do not exit if configuring RSS had an issue, at least
2792 * receive traffic on first queue. Hence no need to capture
2793 * return value
2794 */
2795 if (test_bit(ICE_FLAG_RSS_ENA, vsi->back->flags))
2796 ice_vsi_cfg_rss_lut_key(vsi);
df0f8479 2797 break;
8ede0178
AV		 2798 case ICE_VSI_VF:
2799 ret = ice_vsi_alloc_q_vectors(vsi);
2800 if (ret)
2801 goto err_rings;
2802
2803 ret = ice_vsi_setup_vector_base(vsi);
2804 if (ret)
2805 goto err_vectors;
2806
2807 ret = ice_vsi_alloc_rings(vsi);
2808 if (ret)
2809 goto err_vectors;
2810
2811 vsi->back->q_left_tx -= vsi->alloc_txq;
2812 vsi->back->q_left_rx -= vsi->alloc_rxq;
2813 break;
df0f8479
AV		 2814 default:
2815 break;
2816 }
2817
df0f8479
AV		 2818 /* configure VSI nodes based on number of queues and TC's */
2819 for (i = 0; i < vsi->tc_cfg.numtc; i++)
c5a2a4a3 2820 max_txqs[i] = pf->num_lan_tx;
df0f8479 2821
4fb33f31
AV		 2822 ret = ice_cfg_vsi_lan(vsi->port_info, vsi->idx, vsi->tc_cfg.ena_tc,
2823 max_txqs);
df0f8479
AV		 2824 if (ret) {
2825 dev_info(&vsi->back->pdev->dev,
2826 "Failed VSI lan queue config\n");
2827 goto err_vectors;
2828 }
2829 return 0;
2830
2831err_vectors:
2832 ice_vsi_free_q_vectors(vsi);
2833err_rings:
2834 if (vsi->netdev) {
2835 vsi->current_netdev_flags = 0;
2836 unregister_netdev(vsi->netdev);
2837 free_netdev(vsi->netdev);
2838 vsi->netdev = NULL;
2839 }
2840err_vsi:
2841 ice_vsi_clear(vsi);
2842 set_bit(__ICE_RESET_FAILED, vsi->back->state);
2843 return ret;
2844}
2845
5153a18e 2846/**
5df7e45d 2847 * ice_is_reset_in_progress - check for a reset in progress
5153a18e
AV		 2848 * @state: pf state field
2849 */
5df7e45d 2850bool ice_is_reset_in_progress(unsigned long *state)
5153a18e 2851{
5df7e45d
DE		 2852 return test_bit(__ICE_RESET_OICR_RECV, state) ||
2853 test_bit(__ICE_PFR_REQ, state) ||
2854 test_bit(__ICE_CORER_REQ, state) ||
2855 test_bit(__ICE_GLOBR_REQ, state);
5153a18e 2856}
7b9ffc76
AV		 2857
2858#ifdef CONFIG_DCB
2859/**
2860 * ice_vsi_update_q_map - update our copy of the VSI info with new queue map
2861 * @vsi: VSI being configured
2862 * @ctx: the context buffer returned from AQ VSI update command
2863 */
2864static void ice_vsi_update_q_map(struct ice_vsi *vsi, struct ice_vsi_ctx *ctx)
2865{
2866 vsi->info.mapping_flags = ctx->info.mapping_flags;
2867 memcpy(&vsi->info.q_mapping, &ctx->info.q_mapping,
2868 sizeof(vsi->info.q_mapping));
2869 memcpy(&vsi->info.tc_mapping, ctx->info.tc_mapping,
2870 sizeof(vsi->info.tc_mapping));
2871}
2872
2873/**
2874 * ice_vsi_cfg_netdev_tc - Setup the netdev TC configuration
2875 * @vsi: the VSI being configured
2876 * @ena_tc: TC map to be enabled
2877 */
2878static void ice_vsi_cfg_netdev_tc(struct ice_vsi *vsi, u8 ena_tc)
2879{
2880 struct net_device *netdev = vsi->netdev;
2881 struct ice_pf *pf = vsi->back;
2882 struct ice_dcbx_cfg *dcbcfg;
2883 u8 netdev_tc;
2884 int i;
2885
2886 if (!netdev)
2887 return;
2888
2889 if (!ena_tc) {
2890 netdev_reset_tc(netdev);
2891 return;
2892 }
2893
2894 if (netdev_set_num_tc(netdev, vsi->tc_cfg.numtc))
2895 return;
2896
2897 dcbcfg = &pf->hw.port_info->local_dcbx_cfg;
2898
2899 ice_for_each_traffic_class(i)
2900 if (vsi->tc_cfg.ena_tc & BIT(i))
2901 netdev_set_tc_queue(netdev,
2902 vsi->tc_cfg.tc_info[i].netdev_tc,
2903 vsi->tc_cfg.tc_info[i].qcount_tx,
2904 vsi->tc_cfg.tc_info[i].qoffset);
2905
2906 for (i = 0; i < ICE_MAX_USER_PRIORITY; i++) {
2907 u8 ets_tc = dcbcfg->etscfg.prio_table[i];
2908
2909 /* Get the mapped netdev TC# for the UP */
2910 netdev_tc = vsi->tc_cfg.tc_info[ets_tc].netdev_tc;
2911 netdev_set_prio_tc_map(netdev, i, netdev_tc);
2912 }
2913}
2914
2915/**
2916 * ice_vsi_cfg_tc - Configure VSI Tx Sched for given TC map
2917 * @vsi: VSI to be configured
2918 * @ena_tc: TC bitmap
2919 *
2920 * VSI queues expected to be quiesced before calling this function
2921 */
2922int ice_vsi_cfg_tc(struct ice_vsi *vsi, u8 ena_tc)
2923{
2924 u16 max_txqs[ICE_MAX_TRAFFIC_CLASS] = { 0 };
2925 struct ice_vsi_ctx *ctx;
2926 struct ice_pf *pf = vsi->back;
2927 enum ice_status status;
2928 int i, ret = 0;
2929 u8 num_tc = 0;
2930
2931 ice_for_each_traffic_class(i) {
2932 /* build bitmap of enabled TCs */
2933 if (ena_tc & BIT(i))
2934 num_tc++;
2935 /* populate max_txqs per TC */
2936 max_txqs[i] = pf->num_lan_tx;
2937 }
2938
2939 vsi->tc_cfg.ena_tc = ena_tc;
2940 vsi->tc_cfg.numtc = num_tc;
2941
2942 ctx = devm_kzalloc(&pf->pdev->dev, sizeof(*ctx), GFP_KERNEL);
2943 if (!ctx)
2944 return -ENOMEM;
2945
2946 ctx->vf_num = 0;
2947 ctx->info = vsi->info;
2948
2949 ice_vsi_setup_q_map(vsi, ctx);
2950
2951 /* must to indicate which section of VSI context are being modified */
2952 ctx->info.valid_sections = cpu_to_le16(ICE_AQ_VSI_PROP_RXQ_MAP_VALID);
2953 status = ice_update_vsi(&pf->hw, vsi->idx, ctx, NULL);
2954 if (status) {
2955 dev_info(&pf->pdev->dev, "Failed VSI Update\n");
2956 ret = -EIO;
2957 goto out;
2958 }
2959
2960 status = ice_cfg_vsi_lan(vsi->port_info, vsi->idx, vsi->tc_cfg.ena_tc,
2961 max_txqs);
2962
2963 if (status) {
2964 dev_err(&pf->pdev->dev,
2965 "VSI %d failed TC config, error %d\n",
2966 vsi->vsi_num, status);
2967 ret = -EIO;
2968 goto out;
2969 }
2970 ice_vsi_update_q_map(vsi, ctx);
2971 vsi->info.valid_sections = 0;
2972
2973 ice_vsi_cfg_netdev_tc(vsi, ena_tc);
2974out:
2975 devm_kfree(&pf->pdev->dev, ctx);
2976 return ret;
2977}
2978#endif /* CONFIG_DCB */
Linux 6.x block layer and io_uring tree(s)