ice: Refactor a few Tx scheduler functions
[linux-2.6-block.git] / drivers / net / ethernet / intel / ice / ice_lib.c
CommitLineData
45d3d428
AV
1// SPDX-License-Identifier: GPL-2.0
2/* Copyright (c) 2018, Intel Corporation. */
3
4#include "ice.h"
5#include "ice_lib.h"
6
72adf242
AV
7/**
8 * ice_setup_rx_ctx - Configure a receive ring context
9 * @ring: The Rx ring to configure
10 *
11 * Configure the Rx descriptor ring in RLAN context.
12 */
13static int ice_setup_rx_ctx(struct ice_ring *ring)
14{
15 struct ice_vsi *vsi = ring->vsi;
16 struct ice_hw *hw = &vsi->back->hw;
17 u32 rxdid = ICE_RXDID_FLEX_NIC;
18 struct ice_rlan_ctx rlan_ctx;
19 u32 regval;
20 u16 pf_q;
21 int err;
22
d337f2af 23 /* what is Rx queue number in global space of 2K Rx queues */
72adf242
AV
24 pf_q = vsi->rxq_map[ring->q_index];
25
26 /* clear the context structure first */
27 memset(&rlan_ctx, 0, sizeof(rlan_ctx));
28
29 rlan_ctx.base = ring->dma >> 7;
30
31 rlan_ctx.qlen = ring->count;
32
33 /* Receive Packet Data Buffer Size.
34 * The Packet Data Buffer Size is defined in 128 byte units.
35 */
36 rlan_ctx.dbuf = vsi->rx_buf_len >> ICE_RLAN_CTX_DBUF_S;
37
38 /* use 32 byte descriptors */
39 rlan_ctx.dsize = 1;
40
41 /* Strip the Ethernet CRC bytes before the packet is posted to host
42 * memory.
43 */
44 rlan_ctx.crcstrip = 1;
45
46 /* L2TSEL flag defines the reported L2 Tags in the receive descriptor */
47 rlan_ctx.l2tsel = 1;
48
49 rlan_ctx.dtype = ICE_RX_DTYPE_NO_SPLIT;
50 rlan_ctx.hsplit_0 = ICE_RLAN_RX_HSPLIT_0_NO_SPLIT;
51 rlan_ctx.hsplit_1 = ICE_RLAN_RX_HSPLIT_1_NO_SPLIT;
52
53 /* This controls whether VLAN is stripped from inner headers
54 * The VLAN in the inner L2 header is stripped to the receive
55 * descriptor if enabled by this flag.
56 */
57 rlan_ctx.showiv = 0;
58
59 /* Max packet size for this queue - must not be set to a larger value
60 * than 5 x DBUF
61 */
62 rlan_ctx.rxmax = min_t(u16, vsi->max_frame,
63 ICE_MAX_CHAINED_RX_BUFS * vsi->rx_buf_len);
64
65 /* Rx queue threshold in units of 64 */
66 rlan_ctx.lrxqthresh = 1;
67
68 /* Enable Flexible Descriptors in the queue context which
69 * allows this driver to select a specific receive descriptor format
70 */
8ede0178
AV
71 if (vsi->type != ICE_VSI_VF) {
72 regval = rd32(hw, QRXFLXP_CNTXT(pf_q));
73 regval |= (rxdid << QRXFLXP_CNTXT_RXDID_IDX_S) &
74 QRXFLXP_CNTXT_RXDID_IDX_M;
75
76 /* increasing context priority to pick up profile id;
77 * default is 0x01; setting to 0x03 to ensure profile
78 * is programming if prev context is of same priority
79 */
80 regval |= (0x03 << QRXFLXP_CNTXT_RXDID_PRIO_S) &
81 QRXFLXP_CNTXT_RXDID_PRIO_M;
72adf242 82
8ede0178
AV
83 wr32(hw, QRXFLXP_CNTXT(pf_q), regval);
84 }
72adf242
AV
85
86 /* Absolute queue number out of 2K needs to be passed */
87 err = ice_write_rxq_ctx(hw, &rlan_ctx, pf_q);
88 if (err) {
89 dev_err(&vsi->back->pdev->dev,
90 "Failed to set LAN Rx queue context for absolute Rx queue %d error: %d\n",
91 pf_q, err);
92 return -EIO;
93 }
94
8ede0178
AV
95 if (vsi->type == ICE_VSI_VF)
96 return 0;
97
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AV
98 /* init queue specific tail register */
99 ring->tail = hw->hw_addr + QRX_TAIL(pf_q);
100 writel(0, ring->tail);
101 ice_alloc_rx_bufs(ring, ICE_DESC_UNUSED(ring));
102
103 return 0;
104}
105
106/**
107 * ice_setup_tx_ctx - setup a struct ice_tlan_ctx instance
108 * @ring: The Tx ring to configure
109 * @tlan_ctx: Pointer to the Tx LAN queue context structure to be initialized
110 * @pf_q: queue index in the PF space
111 *
112 * Configure the Tx descriptor ring in TLAN context.
113 */
114static void
115ice_setup_tx_ctx(struct ice_ring *ring, struct ice_tlan_ctx *tlan_ctx, u16 pf_q)
116{
117 struct ice_vsi *vsi = ring->vsi;
118 struct ice_hw *hw = &vsi->back->hw;
119
120 tlan_ctx->base = ring->dma >> ICE_TLAN_CTX_BASE_S;
121
122 tlan_ctx->port_num = vsi->port_info->lport;
123
124 /* Transmit Queue Length */
125 tlan_ctx->qlen = ring->count;
126
127 /* PF number */
128 tlan_ctx->pf_num = hw->pf_id;
129
130 /* queue belongs to a specific VSI type
131 * VF / VM index should be programmed per vmvf_type setting:
132 * for vmvf_type = VF, it is VF number between 0-256
133 * for vmvf_type = VM, it is VM number between 0-767
134 * for PF or EMP this field should be set to zero
135 */
136 switch (vsi->type) {
137 case ICE_VSI_PF:
138 tlan_ctx->vmvf_type = ICE_TLAN_CTX_VMVF_TYPE_PF;
139 break;
8ede0178
AV
140 case ICE_VSI_VF:
141 /* Firmware expects vmvf_num to be absolute VF id */
142 tlan_ctx->vmvf_num = hw->func_caps.vf_base_id + vsi->vf_id;
143 tlan_ctx->vmvf_type = ICE_TLAN_CTX_VMVF_TYPE_VF;
144 break;
72adf242
AV
145 default:
146 return;
147 }
148
149 /* make sure the context is associated with the right VSI */
4fb33f31 150 tlan_ctx->src_vsi = ice_get_hw_vsi_num(hw, vsi->idx);
72adf242
AV
151
152 tlan_ctx->tso_ena = ICE_TX_LEGACY;
153 tlan_ctx->tso_qnum = pf_q;
154
155 /* Legacy or Advanced Host Interface:
156 * 0: Advanced Host Interface
157 * 1: Legacy Host Interface
158 */
159 tlan_ctx->legacy_int = ICE_TX_LEGACY;
160}
161
162/**
163 * ice_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
164 * @pf: the PF being configured
165 * @pf_q: the PF queue
166 * @ena: enable or disable state of the queue
167 *
168 * This routine will wait for the given Rx queue of the PF to reach the
169 * enabled or disabled state.
170 * Returns -ETIMEDOUT in case of failing to reach the requested state after
171 * multiple retries; else will return 0 in case of success.
172 */
173static int ice_pf_rxq_wait(struct ice_pf *pf, int pf_q, bool ena)
174{
175 int i;
176
7b8ff0f9 177 for (i = 0; i < ICE_Q_WAIT_MAX_RETRY; i++) {
72adf242
AV
178 u32 rx_reg = rd32(&pf->hw, QRX_CTRL(pf_q));
179
180 if (ena == !!(rx_reg & QRX_CTRL_QENA_STAT_M))
181 break;
182
7b8ff0f9 183 usleep_range(20, 40);
72adf242 184 }
7b8ff0f9 185 if (i >= ICE_Q_WAIT_MAX_RETRY)
72adf242
AV
186 return -ETIMEDOUT;
187
188 return 0;
189}
190
191/**
192 * ice_vsi_ctrl_rx_rings - Start or stop a VSI's Rx rings
193 * @vsi: the VSI being configured
194 * @ena: start or stop the Rx rings
195 */
196static int ice_vsi_ctrl_rx_rings(struct ice_vsi *vsi, bool ena)
197{
198 struct ice_pf *pf = vsi->back;
199 struct ice_hw *hw = &pf->hw;
200 int i, j, ret = 0;
201
202 for (i = 0; i < vsi->num_rxq; i++) {
203 int pf_q = vsi->rxq_map[i];
204 u32 rx_reg;
205
206 for (j = 0; j < ICE_Q_WAIT_MAX_RETRY; j++) {
207 rx_reg = rd32(hw, QRX_CTRL(pf_q));
208 if (((rx_reg >> QRX_CTRL_QENA_REQ_S) & 1) ==
209 ((rx_reg >> QRX_CTRL_QENA_STAT_S) & 1))
210 break;
211 usleep_range(1000, 2000);
212 }
213
214 /* Skip if the queue is already in the requested state */
215 if (ena == !!(rx_reg & QRX_CTRL_QENA_STAT_M))
216 continue;
217
218 /* turn on/off the queue */
219 if (ena)
220 rx_reg |= QRX_CTRL_QENA_REQ_M;
221 else
222 rx_reg &= ~QRX_CTRL_QENA_REQ_M;
223 wr32(hw, QRX_CTRL(pf_q), rx_reg);
224
225 /* wait for the change to finish */
226 ret = ice_pf_rxq_wait(pf, pf_q, ena);
227 if (ret) {
228 dev_err(&pf->pdev->dev,
229 "VSI idx %d Rx ring %d %sable timeout\n",
230 vsi->idx, pf_q, (ena ? "en" : "dis"));
231 break;
232 }
233 }
234
235 return ret;
236}
237
28c2a645
AV
238/**
239 * ice_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the VSI
240 * @vsi: VSI pointer
241 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
242 *
243 * On error: returns error code (negative)
244 * On success: returns 0
245 */
37bb8390 246static int ice_vsi_alloc_arrays(struct ice_vsi *vsi, bool alloc_qvectors)
28c2a645
AV
247{
248 struct ice_pf *pf = vsi->back;
249
250 /* allocate memory for both Tx and Rx ring pointers */
251 vsi->tx_rings = devm_kcalloc(&pf->pdev->dev, vsi->alloc_txq,
252 sizeof(struct ice_ring *), GFP_KERNEL);
253 if (!vsi->tx_rings)
254 goto err_txrings;
255
256 vsi->rx_rings = devm_kcalloc(&pf->pdev->dev, vsi->alloc_rxq,
257 sizeof(struct ice_ring *), GFP_KERNEL);
258 if (!vsi->rx_rings)
259 goto err_rxrings;
260
261 if (alloc_qvectors) {
262 /* allocate memory for q_vector pointers */
263 vsi->q_vectors = devm_kcalloc(&pf->pdev->dev,
264 vsi->num_q_vectors,
265 sizeof(struct ice_q_vector *),
266 GFP_KERNEL);
267 if (!vsi->q_vectors)
268 goto err_vectors;
269 }
270
271 return 0;
272
273err_vectors:
274 devm_kfree(&pf->pdev->dev, vsi->rx_rings);
275err_rxrings:
276 devm_kfree(&pf->pdev->dev, vsi->tx_rings);
277err_txrings:
278 return -ENOMEM;
279}
280
281/**
282 * ice_vsi_set_num_qs - Set num queues, descriptors and vectors for a VSI
283 * @vsi: the VSI being configured
284 *
285 * Return 0 on success and a negative value on error
286 */
37bb8390 287static void ice_vsi_set_num_qs(struct ice_vsi *vsi)
28c2a645
AV
288{
289 struct ice_pf *pf = vsi->back;
290
291 switch (vsi->type) {
292 case ICE_VSI_PF:
293 vsi->alloc_txq = pf->num_lan_tx;
294 vsi->alloc_rxq = pf->num_lan_rx;
295 vsi->num_desc = ALIGN(ICE_DFLT_NUM_DESC, ICE_REQ_DESC_MULTIPLE);
296 vsi->num_q_vectors = max_t(int, pf->num_lan_rx, pf->num_lan_tx);
297 break;
8ede0178
AV
298 case ICE_VSI_VF:
299 vsi->alloc_txq = pf->num_vf_qps;
300 vsi->alloc_rxq = pf->num_vf_qps;
301 /* pf->num_vf_msix includes (VF miscellaneous vector +
302 * data queue interrupts). Since vsi->num_q_vectors is number
303 * of queues vectors, subtract 1 from the original vector
304 * count
305 */
306 vsi->num_q_vectors = pf->num_vf_msix - 1;
307 break;
28c2a645
AV
308 default:
309 dev_warn(&vsi->back->pdev->dev, "Unknown VSI type %d\n",
310 vsi->type);
311 break;
312 }
313}
314
315/**
316 * ice_get_free_slot - get the next non-NULL location index in array
317 * @array: array to search
318 * @size: size of the array
319 * @curr: last known occupied index to be used as a search hint
320 *
321 * void * is being used to keep the functionality generic. This lets us use this
322 * function on any array of pointers.
323 */
37bb8390 324static int ice_get_free_slot(void *array, int size, int curr)
28c2a645
AV
325{
326 int **tmp_array = (int **)array;
327 int next;
328
329 if (curr < (size - 1) && !tmp_array[curr + 1]) {
330 next = curr + 1;
331 } else {
332 int i = 0;
333
334 while ((i < size) && (tmp_array[i]))
335 i++;
336 if (i == size)
337 next = ICE_NO_VSI;
338 else
339 next = i;
340 }
341 return next;
342}
343
5153a18e
AV
344/**
345 * ice_vsi_delete - delete a VSI from the switch
346 * @vsi: pointer to VSI being removed
347 */
348void ice_vsi_delete(struct ice_vsi *vsi)
349{
350 struct ice_pf *pf = vsi->back;
351 struct ice_vsi_ctx ctxt;
352 enum ice_status status;
353
8ede0178
AV
354 if (vsi->type == ICE_VSI_VF)
355 ctxt.vf_num = vsi->vf_id;
5153a18e
AV
356 ctxt.vsi_num = vsi->vsi_num;
357
358 memcpy(&ctxt.info, &vsi->info, sizeof(struct ice_aqc_vsi_props));
359
360 status = ice_free_vsi(&pf->hw, vsi->idx, &ctxt, false, NULL);
361 if (status)
362 dev_err(&pf->pdev->dev, "Failed to delete VSI %i in FW\n",
363 vsi->vsi_num);
364}
365
07309a0e
AV
366/**
367 * ice_vsi_free_arrays - clean up VSI resources
368 * @vsi: pointer to VSI being cleared
369 * @free_qvectors: bool to specify if q_vectors should be deallocated
370 */
df0f8479 371static void ice_vsi_free_arrays(struct ice_vsi *vsi, bool free_qvectors)
07309a0e
AV
372{
373 struct ice_pf *pf = vsi->back;
374
375 /* free the ring and vector containers */
376 if (free_qvectors && vsi->q_vectors) {
377 devm_kfree(&pf->pdev->dev, vsi->q_vectors);
378 vsi->q_vectors = NULL;
379 }
380 if (vsi->tx_rings) {
381 devm_kfree(&pf->pdev->dev, vsi->tx_rings);
382 vsi->tx_rings = NULL;
383 }
384 if (vsi->rx_rings) {
385 devm_kfree(&pf->pdev->dev, vsi->rx_rings);
386 vsi->rx_rings = NULL;
387 }
388}
389
390/**
391 * ice_vsi_clear - clean up and deallocate the provided VSI
392 * @vsi: pointer to VSI being cleared
393 *
394 * This deallocates the VSI's queue resources, removes it from the PF's
395 * VSI array if necessary, and deallocates the VSI
396 *
397 * Returns 0 on success, negative on failure
398 */
399int ice_vsi_clear(struct ice_vsi *vsi)
400{
401 struct ice_pf *pf = NULL;
402
403 if (!vsi)
404 return 0;
405
406 if (!vsi->back)
407 return -EINVAL;
408
409 pf = vsi->back;
410
411 if (!pf->vsi[vsi->idx] || pf->vsi[vsi->idx] != vsi) {
412 dev_dbg(&pf->pdev->dev, "vsi does not exist at pf->vsi[%d]\n",
413 vsi->idx);
414 return -EINVAL;
415 }
416
417 mutex_lock(&pf->sw_mutex);
418 /* updates the PF for this cleared VSI */
419
420 pf->vsi[vsi->idx] = NULL;
421 if (vsi->idx < pf->next_vsi)
422 pf->next_vsi = vsi->idx;
423
424 ice_vsi_free_arrays(vsi, true);
425 mutex_unlock(&pf->sw_mutex);
426 devm_kfree(&pf->pdev->dev, vsi);
427
428 return 0;
429}
430
5153a18e
AV
431/**
432 * ice_msix_clean_rings - MSIX mode Interrupt Handler
433 * @irq: interrupt number
434 * @data: pointer to a q_vector
435 */
f3aaaaaa 436static irqreturn_t ice_msix_clean_rings(int __always_unused irq, void *data)
5153a18e
AV
437{
438 struct ice_q_vector *q_vector = (struct ice_q_vector *)data;
439
440 if (!q_vector->tx.ring && !q_vector->rx.ring)
441 return IRQ_HANDLED;
442
443 napi_schedule(&q_vector->napi);
444
445 return IRQ_HANDLED;
446}
447
37bb8390
AV
448/**
449 * ice_vsi_alloc - Allocates the next available struct VSI in the PF
450 * @pf: board private structure
451 * @type: type of VSI
452 *
453 * returns a pointer to a VSI on success, NULL on failure.
454 */
455static struct ice_vsi *ice_vsi_alloc(struct ice_pf *pf, enum ice_vsi_type type)
456{
457 struct ice_vsi *vsi = NULL;
458
459 /* Need to protect the allocation of the VSIs at the PF level */
460 mutex_lock(&pf->sw_mutex);
461
462 /* If we have already allocated our maximum number of VSIs,
463 * pf->next_vsi will be ICE_NO_VSI. If not, pf->next_vsi index
464 * is available to be populated
465 */
466 if (pf->next_vsi == ICE_NO_VSI) {
467 dev_dbg(&pf->pdev->dev, "out of VSI slots!\n");
468 goto unlock_pf;
469 }
470
471 vsi = devm_kzalloc(&pf->pdev->dev, sizeof(*vsi), GFP_KERNEL);
472 if (!vsi)
473 goto unlock_pf;
474
475 vsi->type = type;
476 vsi->back = pf;
477 set_bit(__ICE_DOWN, vsi->state);
478 vsi->idx = pf->next_vsi;
479 vsi->work_lmt = ICE_DFLT_IRQ_WORK;
480
481 ice_vsi_set_num_qs(vsi);
482
483 switch (vsi->type) {
484 case ICE_VSI_PF:
485 if (ice_vsi_alloc_arrays(vsi, true))
486 goto err_rings;
487
488 /* Setup default MSIX irq handler for VSI */
489 vsi->irq_handler = ice_msix_clean_rings;
490 break;
8ede0178
AV
491 case ICE_VSI_VF:
492 if (ice_vsi_alloc_arrays(vsi, true))
493 goto err_rings;
494 break;
37bb8390
AV
495 default:
496 dev_warn(&pf->pdev->dev, "Unknown VSI type %d\n", vsi->type);
497 goto unlock_pf;
498 }
499
500 /* fill VSI slot in the PF struct */
501 pf->vsi[pf->next_vsi] = vsi;
502
503 /* prepare pf->next_vsi for next use */
504 pf->next_vsi = ice_get_free_slot(pf->vsi, pf->num_alloc_vsi,
505 pf->next_vsi);
506 goto unlock_pf;
507
508err_rings:
509 devm_kfree(&pf->pdev->dev, vsi);
510 vsi = NULL;
511unlock_pf:
512 mutex_unlock(&pf->sw_mutex);
513 return vsi;
514}
515
df0f8479
AV
516/**
517 * ice_vsi_get_qs_contig - Assign a contiguous chunk of queues to VSI
518 * @vsi: the VSI getting queues
519 *
520 * Return 0 on success and a negative value on error
521 */
522static int ice_vsi_get_qs_contig(struct ice_vsi *vsi)
523{
524 struct ice_pf *pf = vsi->back;
525 int offset, ret = 0;
526
527 mutex_lock(&pf->avail_q_mutex);
528 /* look for contiguous block of queues for Tx */
529 offset = bitmap_find_next_zero_area(pf->avail_txqs, ICE_MAX_TXQS,
530 0, vsi->alloc_txq, 0);
531 if (offset < ICE_MAX_TXQS) {
532 int i;
533
534 bitmap_set(pf->avail_txqs, offset, vsi->alloc_txq);
535 for (i = 0; i < vsi->alloc_txq; i++)
536 vsi->txq_map[i] = i + offset;
537 } else {
538 ret = -ENOMEM;
539 vsi->tx_mapping_mode = ICE_VSI_MAP_SCATTER;
540 }
541
542 /* look for contiguous block of queues for Rx */
543 offset = bitmap_find_next_zero_area(pf->avail_rxqs, ICE_MAX_RXQS,
544 0, vsi->alloc_rxq, 0);
545 if (offset < ICE_MAX_RXQS) {
546 int i;
547
548 bitmap_set(pf->avail_rxqs, offset, vsi->alloc_rxq);
549 for (i = 0; i < vsi->alloc_rxq; i++)
550 vsi->rxq_map[i] = i + offset;
551 } else {
552 ret = -ENOMEM;
553 vsi->rx_mapping_mode = ICE_VSI_MAP_SCATTER;
554 }
555 mutex_unlock(&pf->avail_q_mutex);
556
557 return ret;
558}
559
560/**
561 * ice_vsi_get_qs_scatter - Assign a scattered queues to VSI
562 * @vsi: the VSI getting queues
563 *
564 * Return 0 on success and a negative value on error
565 */
566static int ice_vsi_get_qs_scatter(struct ice_vsi *vsi)
567{
568 struct ice_pf *pf = vsi->back;
569 int i, index = 0;
570
571 mutex_lock(&pf->avail_q_mutex);
572
573 if (vsi->tx_mapping_mode == ICE_VSI_MAP_SCATTER) {
574 for (i = 0; i < vsi->alloc_txq; i++) {
575 index = find_next_zero_bit(pf->avail_txqs,
576 ICE_MAX_TXQS, index);
577 if (index < ICE_MAX_TXQS) {
578 set_bit(index, pf->avail_txqs);
579 vsi->txq_map[i] = index;
580 } else {
581 goto err_scatter_tx;
582 }
583 }
584 }
585
586 if (vsi->rx_mapping_mode == ICE_VSI_MAP_SCATTER) {
587 for (i = 0; i < vsi->alloc_rxq; i++) {
588 index = find_next_zero_bit(pf->avail_rxqs,
589 ICE_MAX_RXQS, index);
590 if (index < ICE_MAX_RXQS) {
591 set_bit(index, pf->avail_rxqs);
592 vsi->rxq_map[i] = index;
593 } else {
594 goto err_scatter_rx;
595 }
596 }
597 }
598
599 mutex_unlock(&pf->avail_q_mutex);
600 return 0;
601
602err_scatter_rx:
603 /* unflag any queues we have grabbed (i is failed position) */
604 for (index = 0; index < i; index++) {
605 clear_bit(vsi->rxq_map[index], pf->avail_rxqs);
606 vsi->rxq_map[index] = 0;
607 }
608 i = vsi->alloc_txq;
609err_scatter_tx:
610 /* i is either position of failed attempt or vsi->alloc_txq */
611 for (index = 0; index < i; index++) {
612 clear_bit(vsi->txq_map[index], pf->avail_txqs);
613 vsi->txq_map[index] = 0;
614 }
615
616 mutex_unlock(&pf->avail_q_mutex);
617 return -ENOMEM;
618}
619
620/**
621 * ice_vsi_get_qs - Assign queues from PF to VSI
622 * @vsi: the VSI to assign queues to
623 *
624 * Returns 0 on success and a negative value on error
625 */
37bb8390 626static int ice_vsi_get_qs(struct ice_vsi *vsi)
df0f8479
AV
627{
628 int ret = 0;
629
630 vsi->tx_mapping_mode = ICE_VSI_MAP_CONTIG;
631 vsi->rx_mapping_mode = ICE_VSI_MAP_CONTIG;
632
633 /* NOTE: ice_vsi_get_qs_contig() will set the Rx/Tx mapping
634 * modes individually to scatter if assigning contiguous queues
635 * to Rx or Tx fails
636 */
637 ret = ice_vsi_get_qs_contig(vsi);
638 if (ret < 0) {
639 if (vsi->tx_mapping_mode == ICE_VSI_MAP_SCATTER)
640 vsi->alloc_txq = max_t(u16, vsi->alloc_txq,
641 ICE_MAX_SCATTER_TXQS);
642 if (vsi->rx_mapping_mode == ICE_VSI_MAP_SCATTER)
643 vsi->alloc_rxq = max_t(u16, vsi->alloc_rxq,
644 ICE_MAX_SCATTER_RXQS);
645 ret = ice_vsi_get_qs_scatter(vsi);
646 }
647
648 return ret;
649}
650
5153a18e
AV
651/**
652 * ice_vsi_put_qs - Release queues from VSI to PF
653 * @vsi: the VSI that is going to release queues
654 */
655void ice_vsi_put_qs(struct ice_vsi *vsi)
656{
657 struct ice_pf *pf = vsi->back;
658 int i;
659
660 mutex_lock(&pf->avail_q_mutex);
661
662 for (i = 0; i < vsi->alloc_txq; i++) {
663 clear_bit(vsi->txq_map[i], pf->avail_txqs);
664 vsi->txq_map[i] = ICE_INVAL_Q_INDEX;
665 }
666
667 for (i = 0; i < vsi->alloc_rxq; i++) {
668 clear_bit(vsi->rxq_map[i], pf->avail_rxqs);
669 vsi->rxq_map[i] = ICE_INVAL_Q_INDEX;
670 }
671
672 mutex_unlock(&pf->avail_q_mutex);
673}
674
df0f8479
AV
675/**
676 * ice_rss_clean - Delete RSS related VSI structures that hold user inputs
677 * @vsi: the VSI being removed
678 */
679static void ice_rss_clean(struct ice_vsi *vsi)
680{
681 struct ice_pf *pf;
682
683 pf = vsi->back;
684
685 if (vsi->rss_hkey_user)
686 devm_kfree(&pf->pdev->dev, vsi->rss_hkey_user);
687 if (vsi->rss_lut_user)
688 devm_kfree(&pf->pdev->dev, vsi->rss_lut_user);
689}
690
28c2a645
AV
691/**
692 * ice_vsi_set_rss_params - Setup RSS capabilities per VSI type
693 * @vsi: the VSI being configured
694 */
37bb8390 695static void ice_vsi_set_rss_params(struct ice_vsi *vsi)
28c2a645
AV
696{
697 struct ice_hw_common_caps *cap;
698 struct ice_pf *pf = vsi->back;
699
700 if (!test_bit(ICE_FLAG_RSS_ENA, pf->flags)) {
701 vsi->rss_size = 1;
702 return;
703 }
704
705 cap = &pf->hw.func_caps.common_cap;
706 switch (vsi->type) {
707 case ICE_VSI_PF:
708 /* PF VSI will inherit RSS instance of PF */
709 vsi->rss_table_size = cap->rss_table_size;
710 vsi->rss_size = min_t(int, num_online_cpus(),
711 BIT(cap->rss_table_entry_width));
712 vsi->rss_lut_type = ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_PF;
713 break;
8ede0178
AV
714 case ICE_VSI_VF:
715 /* VF VSI will gets a small RSS table
716 * For VSI_LUT, LUT size should be set to 64 bytes
717 */
718 vsi->rss_table_size = ICE_VSIQF_HLUT_ARRAY_SIZE;
719 vsi->rss_size = min_t(int, num_online_cpus(),
720 BIT(cap->rss_table_entry_width));
721 vsi->rss_lut_type = ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_VSI;
722 break;
28c2a645
AV
723 default:
724 dev_warn(&pf->pdev->dev, "Unknown VSI type %d\n",
725 vsi->type);
726 break;
727 }
728}
729
730/**
731 * ice_set_dflt_vsi_ctx - Set default VSI context before adding a VSI
732 * @ctxt: the VSI context being set
733 *
734 * This initializes a default VSI context for all sections except the Queues.
735 */
736static void ice_set_dflt_vsi_ctx(struct ice_vsi_ctx *ctxt)
737{
738 u32 table = 0;
739
740 memset(&ctxt->info, 0, sizeof(ctxt->info));
741 /* VSI's should be allocated from shared pool */
742 ctxt->alloc_from_pool = true;
743 /* Src pruning enabled by default */
744 ctxt->info.sw_flags = ICE_AQ_VSI_SW_FLAG_SRC_PRUNE;
745 /* Traffic from VSI can be sent to LAN */
746 ctxt->info.sw_flags2 = ICE_AQ_VSI_SW_FLAG_LAN_ENA;
747 /* By default bits 3 and 4 in vlan_flags are 0's which results in legacy
748 * behavior (show VLAN, DEI, and UP) in descriptor. Also, allow all
749 * packets untagged/tagged.
750 */
751 ctxt->info.vlan_flags = ((ICE_AQ_VSI_VLAN_MODE_ALL &
752 ICE_AQ_VSI_VLAN_MODE_M) >>
753 ICE_AQ_VSI_VLAN_MODE_S);
754 /* Have 1:1 UP mapping for both ingress/egress tables */
755 table |= ICE_UP_TABLE_TRANSLATE(0, 0);
756 table |= ICE_UP_TABLE_TRANSLATE(1, 1);
757 table |= ICE_UP_TABLE_TRANSLATE(2, 2);
758 table |= ICE_UP_TABLE_TRANSLATE(3, 3);
759 table |= ICE_UP_TABLE_TRANSLATE(4, 4);
760 table |= ICE_UP_TABLE_TRANSLATE(5, 5);
761 table |= ICE_UP_TABLE_TRANSLATE(6, 6);
762 table |= ICE_UP_TABLE_TRANSLATE(7, 7);
763 ctxt->info.ingress_table = cpu_to_le32(table);
764 ctxt->info.egress_table = cpu_to_le32(table);
765 /* Have 1:1 UP mapping for outer to inner UP table */
766 ctxt->info.outer_up_table = cpu_to_le32(table);
767 /* No Outer tag support outer_tag_flags remains to zero */
768}
769
770/**
771 * ice_vsi_setup_q_map - Setup a VSI queue map
772 * @vsi: the VSI being configured
773 * @ctxt: VSI context structure
774 */
775static void ice_vsi_setup_q_map(struct ice_vsi *vsi, struct ice_vsi_ctx *ctxt)
776{
c5a2a4a3 777 u16 offset = 0, qmap = 0, tx_count = 0;
28c2a645
AV
778 u16 qcount_tx = vsi->alloc_txq;
779 u16 qcount_rx = vsi->alloc_rxq;
c5a2a4a3
UK
780 u16 tx_numq_tc, rx_numq_tc;
781 u16 pow = 0, max_rss = 0;
28c2a645 782 bool ena_tc0 = false;
c5a2a4a3 783 u8 netdev_tc = 0;
28c2a645
AV
784 int i;
785
786 /* at least TC0 should be enabled by default */
787 if (vsi->tc_cfg.numtc) {
788 if (!(vsi->tc_cfg.ena_tc & BIT(0)))
789 ena_tc0 = true;
790 } else {
791 ena_tc0 = true;
792 }
793
794 if (ena_tc0) {
795 vsi->tc_cfg.numtc++;
796 vsi->tc_cfg.ena_tc |= 1;
797 }
798
c5a2a4a3
UK
799 rx_numq_tc = qcount_rx / vsi->tc_cfg.numtc;
800 if (!rx_numq_tc)
801 rx_numq_tc = 1;
802 tx_numq_tc = qcount_tx / vsi->tc_cfg.numtc;
803 if (!tx_numq_tc)
804 tx_numq_tc = 1;
28c2a645
AV
805
806 /* TC mapping is a function of the number of Rx queues assigned to the
807 * VSI for each traffic class and the offset of these queues.
808 * The first 10 bits are for queue offset for TC0, next 4 bits for no:of
809 * queues allocated to TC0. No:of queues is a power-of-2.
810 *
811 * If TC is not enabled, the queue offset is set to 0, and allocate one
812 * queue, this way, traffic for the given TC will be sent to the default
813 * queue.
814 *
815 * Setup number and offset of Rx queues for all TCs for the VSI
816 */
817
c5a2a4a3
UK
818 qcount_rx = rx_numq_tc;
819
28c2a645
AV
820 /* qcount will change if RSS is enabled */
821 if (test_bit(ICE_FLAG_RSS_ENA, vsi->back->flags)) {
8ede0178
AV
822 if (vsi->type == ICE_VSI_PF || vsi->type == ICE_VSI_VF) {
823 if (vsi->type == ICE_VSI_PF)
824 max_rss = ICE_MAX_LG_RSS_QS;
825 else
826 max_rss = ICE_MAX_SMALL_RSS_QS;
c5a2a4a3
UK
827 qcount_rx = min_t(int, rx_numq_tc, max_rss);
828 qcount_rx = min_t(int, qcount_rx, vsi->rss_size);
8ede0178 829 }
28c2a645
AV
830 }
831
832 /* find the (rounded up) power-of-2 of qcount */
c5a2a4a3 833 pow = order_base_2(qcount_rx);
28c2a645
AV
834
835 for (i = 0; i < ICE_MAX_TRAFFIC_CLASS; i++) {
836 if (!(vsi->tc_cfg.ena_tc & BIT(i))) {
837 /* TC is not enabled */
838 vsi->tc_cfg.tc_info[i].qoffset = 0;
c5a2a4a3
UK
839 vsi->tc_cfg.tc_info[i].qcount_rx = 1;
840 vsi->tc_cfg.tc_info[i].qcount_tx = 1;
841 vsi->tc_cfg.tc_info[i].netdev_tc = 0;
28c2a645
AV
842 ctxt->info.tc_mapping[i] = 0;
843 continue;
844 }
845
846 /* TC is enabled */
847 vsi->tc_cfg.tc_info[i].qoffset = offset;
c5a2a4a3
UK
848 vsi->tc_cfg.tc_info[i].qcount_rx = qcount_rx;
849 vsi->tc_cfg.tc_info[i].qcount_tx = tx_numq_tc;
850 vsi->tc_cfg.tc_info[i].netdev_tc = netdev_tc++;
28c2a645
AV
851
852 qmap = ((offset << ICE_AQ_VSI_TC_Q_OFFSET_S) &
853 ICE_AQ_VSI_TC_Q_OFFSET_M) |
854 ((pow << ICE_AQ_VSI_TC_Q_NUM_S) &
855 ICE_AQ_VSI_TC_Q_NUM_M);
c5a2a4a3
UK
856 offset += qcount_rx;
857 tx_count += tx_numq_tc;
28c2a645
AV
858 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
859 }
28c2a645 860 vsi->num_rxq = offset;
c5a2a4a3 861 vsi->num_txq = tx_count;
28c2a645 862
8ede0178
AV
863 if (vsi->type == ICE_VSI_VF && vsi->num_txq != vsi->num_rxq) {
864 dev_dbg(&vsi->back->pdev->dev, "VF VSI should have same number of Tx and Rx queues. Hence making them equal\n");
865 /* since there is a chance that num_rxq could have been changed
866 * in the above for loop, make num_txq equal to num_rxq.
867 */
868 vsi->num_txq = vsi->num_rxq;
869 }
870
28c2a645
AV
871 /* Rx queue mapping */
872 ctxt->info.mapping_flags |= cpu_to_le16(ICE_AQ_VSI_Q_MAP_CONTIG);
873 /* q_mapping buffer holds the info for the first queue allocated for
874 * this VSI in the PF space and also the number of queues associated
875 * with this VSI.
876 */
877 ctxt->info.q_mapping[0] = cpu_to_le16(vsi->rxq_map[0]);
878 ctxt->info.q_mapping[1] = cpu_to_le16(vsi->num_rxq);
879}
880
881/**
882 * ice_set_rss_vsi_ctx - Set RSS VSI context before adding a VSI
883 * @ctxt: the VSI context being set
884 * @vsi: the VSI being configured
885 */
886static void ice_set_rss_vsi_ctx(struct ice_vsi_ctx *ctxt, struct ice_vsi *vsi)
887{
888 u8 lut_type, hash_type;
889
890 switch (vsi->type) {
891 case ICE_VSI_PF:
892 /* PF VSI will inherit RSS instance of PF */
893 lut_type = ICE_AQ_VSI_Q_OPT_RSS_LUT_PF;
894 hash_type = ICE_AQ_VSI_Q_OPT_RSS_TPLZ;
895 break;
8ede0178
AV
896 case ICE_VSI_VF:
897 /* VF VSI will gets a small RSS table which is a VSI LUT type */
898 lut_type = ICE_AQ_VSI_Q_OPT_RSS_LUT_VSI;
899 hash_type = ICE_AQ_VSI_Q_OPT_RSS_TPLZ;
900 break;
28c2a645
AV
901 default:
902 dev_warn(&vsi->back->pdev->dev, "Unknown VSI type %d\n",
903 vsi->type);
904 return;
905 }
906
907 ctxt->info.q_opt_rss = ((lut_type << ICE_AQ_VSI_Q_OPT_RSS_LUT_S) &
908 ICE_AQ_VSI_Q_OPT_RSS_LUT_M) |
909 ((hash_type << ICE_AQ_VSI_Q_OPT_RSS_HASH_S) &
910 ICE_AQ_VSI_Q_OPT_RSS_HASH_M);
911}
912
913/**
914 * ice_vsi_init - Create and initialize a VSI
915 * @vsi: the VSI being configured
916 *
917 * This initializes a VSI context depending on the VSI type to be added and
918 * passes it down to the add_vsi aq command to create a new VSI.
919 */
37bb8390 920static int ice_vsi_init(struct ice_vsi *vsi)
28c2a645
AV
921{
922 struct ice_vsi_ctx ctxt = { 0 };
923 struct ice_pf *pf = vsi->back;
924 struct ice_hw *hw = &pf->hw;
925 int ret = 0;
926
927 switch (vsi->type) {
928 case ICE_VSI_PF:
929 ctxt.flags = ICE_AQ_VSI_TYPE_PF;
930 break;
8ede0178
AV
931 case ICE_VSI_VF:
932 ctxt.flags = ICE_AQ_VSI_TYPE_VF;
933 /* VF number here is the absolute VF number (0-255) */
934 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
935 break;
28c2a645
AV
936 default:
937 return -ENODEV;
938 }
939
940 ice_set_dflt_vsi_ctx(&ctxt);
941 /* if the switch is in VEB mode, allow VSI loopback */
942 if (vsi->vsw->bridge_mode == BRIDGE_MODE_VEB)
943 ctxt.info.sw_flags |= ICE_AQ_VSI_SW_FLAG_ALLOW_LB;
944
945 /* Set LUT type and HASH type if RSS is enabled */
946 if (test_bit(ICE_FLAG_RSS_ENA, pf->flags))
947 ice_set_rss_vsi_ctx(&ctxt, vsi);
948
949 ctxt.info.sw_id = vsi->port_info->sw_id;
950 ice_vsi_setup_q_map(vsi, &ctxt);
951
952 ret = ice_add_vsi(hw, vsi->idx, &ctxt, NULL);
953 if (ret) {
954 dev_err(&pf->pdev->dev,
955 "Add VSI failed, err %d\n", ret);
956 return -EIO;
957 }
958
959 /* keep context for update VSI operations */
960 vsi->info = ctxt.info;
961
962 /* record VSI number returned */
963 vsi->vsi_num = ctxt.vsi_num;
964
965 return ret;
966}
967
df0f8479
AV
968/**
969 * ice_free_q_vector - Free memory allocated for a specific interrupt vector
970 * @vsi: VSI having the memory freed
971 * @v_idx: index of the vector to be freed
972 */
973static void ice_free_q_vector(struct ice_vsi *vsi, int v_idx)
974{
975 struct ice_q_vector *q_vector;
976 struct ice_ring *ring;
977
978 if (!vsi->q_vectors[v_idx]) {
979 dev_dbg(&vsi->back->pdev->dev, "Queue vector at index %d not found\n",
980 v_idx);
981 return;
982 }
983 q_vector = vsi->q_vectors[v_idx];
984
985 ice_for_each_ring(ring, q_vector->tx)
986 ring->q_vector = NULL;
987 ice_for_each_ring(ring, q_vector->rx)
988 ring->q_vector = NULL;
989
990 /* only VSI with an associated netdev is set up with NAPI */
991 if (vsi->netdev)
992 netif_napi_del(&q_vector->napi);
993
994 devm_kfree(&vsi->back->pdev->dev, q_vector);
995 vsi->q_vectors[v_idx] = NULL;
996}
997
998/**
999 * ice_vsi_free_q_vectors - Free memory allocated for interrupt vectors
1000 * @vsi: the VSI having memory freed
1001 */
1002void ice_vsi_free_q_vectors(struct ice_vsi *vsi)
1003{
1004 int v_idx;
1005
1006 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
1007 ice_free_q_vector(vsi, v_idx);
1008}
1009
1010/**
1011 * ice_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
1012 * @vsi: the VSI being configured
1013 * @v_idx: index of the vector in the VSI struct
1014 *
df17b7e0 1015 * We allocate one q_vector. If allocation fails we return -ENOMEM.
df0f8479
AV
1016 */
1017static int ice_vsi_alloc_q_vector(struct ice_vsi *vsi, int v_idx)
1018{
1019 struct ice_pf *pf = vsi->back;
1020 struct ice_q_vector *q_vector;
1021
1022 /* allocate q_vector */
1023 q_vector = devm_kzalloc(&pf->pdev->dev, sizeof(*q_vector), GFP_KERNEL);
1024 if (!q_vector)
1025 return -ENOMEM;
1026
1027 q_vector->vsi = vsi;
1028 q_vector->v_idx = v_idx;
8ede0178
AV
1029 if (vsi->type == ICE_VSI_VF)
1030 goto out;
df0f8479
AV
1031 /* only set affinity_mask if the CPU is online */
1032 if (cpu_online(v_idx))
1033 cpumask_set_cpu(v_idx, &q_vector->affinity_mask);
1034
1035 /* This will not be called in the driver load path because the netdev
1036 * will not be created yet. All other cases with register the NAPI
1037 * handler here (i.e. resume, reset/rebuild, etc.)
1038 */
1039 if (vsi->netdev)
1040 netif_napi_add(vsi->netdev, &q_vector->napi, ice_napi_poll,
1041 NAPI_POLL_WEIGHT);
1042
8ede0178 1043out:
df0f8479
AV
1044 /* tie q_vector and VSI together */
1045 vsi->q_vectors[v_idx] = q_vector;
1046
1047 return 0;
1048}
1049
1050/**
1051 * ice_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
1052 * @vsi: the VSI being configured
1053 *
df17b7e0 1054 * We allocate one q_vector per queue interrupt. If allocation fails we
df0f8479
AV
1055 * return -ENOMEM.
1056 */
37bb8390 1057static int ice_vsi_alloc_q_vectors(struct ice_vsi *vsi)
df0f8479
AV
1058{
1059 struct ice_pf *pf = vsi->back;
1060 int v_idx = 0, num_q_vectors;
1061 int err;
1062
1063 if (vsi->q_vectors[0]) {
1064 dev_dbg(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
1065 vsi->vsi_num);
1066 return -EEXIST;
1067 }
1068
1069 if (test_bit(ICE_FLAG_MSIX_ENA, pf->flags)) {
1070 num_q_vectors = vsi->num_q_vectors;
1071 } else {
1072 err = -EINVAL;
1073 goto err_out;
1074 }
1075
1076 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
1077 err = ice_vsi_alloc_q_vector(vsi, v_idx);
1078 if (err)
1079 goto err_out;
1080 }
1081
1082 return 0;
1083
1084err_out:
1085 while (v_idx--)
1086 ice_free_q_vector(vsi, v_idx);
1087
1088 dev_err(&pf->pdev->dev,
1089 "Failed to allocate %d q_vector for VSI %d, ret=%d\n",
1090 vsi->num_q_vectors, vsi->vsi_num, err);
1091 vsi->num_q_vectors = 0;
1092 return err;
1093}
1094
1095/**
1096 * ice_vsi_setup_vector_base - Set up the base vector for the given VSI
1097 * @vsi: ptr to the VSI
1098 *
1099 * This should only be called after ice_vsi_alloc() which allocates the
1100 * corresponding SW VSI structure and initializes num_queue_pairs for the
1101 * newly allocated VSI.
1102 *
1103 * Returns 0 on success or negative on failure
1104 */
37bb8390 1105static int ice_vsi_setup_vector_base(struct ice_vsi *vsi)
df0f8479
AV
1106{
1107 struct ice_pf *pf = vsi->back;
1108 int num_q_vectors = 0;
1109
eb0208ec
PB
1110 if (vsi->sw_base_vector || vsi->hw_base_vector) {
1111 dev_dbg(&pf->pdev->dev, "VSI %d has non-zero HW base vector %d or SW base vector %d\n",
1112 vsi->vsi_num, vsi->hw_base_vector, vsi->sw_base_vector);
df0f8479
AV
1113 return -EEXIST;
1114 }
1115
1116 if (!test_bit(ICE_FLAG_MSIX_ENA, pf->flags))
1117 return -ENOENT;
1118
1119 switch (vsi->type) {
1120 case ICE_VSI_PF:
1121 num_q_vectors = vsi->num_q_vectors;
eb0208ec
PB
1122 /* reserve slots from OS requested IRQs */
1123 vsi->sw_base_vector = ice_get_res(pf, pf->sw_irq_tracker,
1124 num_q_vectors, vsi->idx);
1125 if (vsi->sw_base_vector < 0) {
1126 dev_err(&pf->pdev->dev,
1127 "Failed to get tracking for %d SW vectors for VSI %d, err=%d\n",
1128 num_q_vectors, vsi->vsi_num,
1129 vsi->sw_base_vector);
1130 return -ENOENT;
1131 }
1132 pf->num_avail_sw_msix -= num_q_vectors;
1133
1134 /* reserve slots from HW interrupts */
1135 vsi->hw_base_vector = ice_get_res(pf, pf->hw_irq_tracker,
1136 num_q_vectors, vsi->idx);
df0f8479 1137 break;
8ede0178
AV
1138 case ICE_VSI_VF:
1139 /* take VF misc vector and data vectors into account */
1140 num_q_vectors = pf->num_vf_msix;
1141 /* For VF VSI, reserve slots only from HW interrupts */
1142 vsi->hw_base_vector = ice_get_res(pf, pf->hw_irq_tracker,
1143 num_q_vectors, vsi->idx);
1144 break;
df0f8479
AV
1145 default:
1146 dev_warn(&vsi->back->pdev->dev, "Unknown VSI type %d\n",
1147 vsi->type);
1148 break;
1149 }
1150
eb0208ec 1151 if (vsi->hw_base_vector < 0) {
df0f8479 1152 dev_err(&pf->pdev->dev,
eb0208ec
PB
1153 "Failed to get tracking for %d HW vectors for VSI %d, err=%d\n",
1154 num_q_vectors, vsi->vsi_num, vsi->hw_base_vector);
8ede0178
AV
1155 if (vsi->type != ICE_VSI_VF) {
1156 ice_free_res(vsi->back->sw_irq_tracker,
1157 vsi->sw_base_vector, vsi->idx);
1158 pf->num_avail_sw_msix += num_q_vectors;
1159 }
df0f8479
AV
1160 return -ENOENT;
1161 }
1162
eb0208ec
PB
1163 pf->num_avail_hw_msix -= num_q_vectors;
1164
df0f8479
AV
1165 return 0;
1166}
1167
28c2a645
AV
1168/**
1169 * ice_vsi_clear_rings - Deallocates the Tx and Rx rings for VSI
1170 * @vsi: the VSI having rings deallocated
1171 */
df0f8479 1172static void ice_vsi_clear_rings(struct ice_vsi *vsi)
28c2a645
AV
1173{
1174 int i;
1175
1176 if (vsi->tx_rings) {
1177 for (i = 0; i < vsi->alloc_txq; i++) {
1178 if (vsi->tx_rings[i]) {
1179 kfree_rcu(vsi->tx_rings[i], rcu);
1180 vsi->tx_rings[i] = NULL;
1181 }
1182 }
1183 }
1184 if (vsi->rx_rings) {
1185 for (i = 0; i < vsi->alloc_rxq; i++) {
1186 if (vsi->rx_rings[i]) {
1187 kfree_rcu(vsi->rx_rings[i], rcu);
1188 vsi->rx_rings[i] = NULL;
1189 }
1190 }
1191 }
1192}
1193
1194/**
1195 * ice_vsi_alloc_rings - Allocates Tx and Rx rings for the VSI
1196 * @vsi: VSI which is having rings allocated
1197 */
37bb8390 1198static int ice_vsi_alloc_rings(struct ice_vsi *vsi)
28c2a645
AV
1199{
1200 struct ice_pf *pf = vsi->back;
1201 int i;
1202
d337f2af 1203 /* Allocate Tx rings */
28c2a645
AV
1204 for (i = 0; i < vsi->alloc_txq; i++) {
1205 struct ice_ring *ring;
1206
1207 /* allocate with kzalloc(), free with kfree_rcu() */
1208 ring = kzalloc(sizeof(*ring), GFP_KERNEL);
1209
1210 if (!ring)
1211 goto err_out;
1212
1213 ring->q_index = i;
1214 ring->reg_idx = vsi->txq_map[i];
1215 ring->ring_active = false;
1216 ring->vsi = vsi;
1217 ring->dev = &pf->pdev->dev;
1218 ring->count = vsi->num_desc;
1219 vsi->tx_rings[i] = ring;
1220 }
1221
d337f2af 1222 /* Allocate Rx rings */
28c2a645
AV
1223 for (i = 0; i < vsi->alloc_rxq; i++) {
1224 struct ice_ring *ring;
1225
1226 /* allocate with kzalloc(), free with kfree_rcu() */
1227 ring = kzalloc(sizeof(*ring), GFP_KERNEL);
1228 if (!ring)
1229 goto err_out;
1230
1231 ring->q_index = i;
1232 ring->reg_idx = vsi->rxq_map[i];
1233 ring->ring_active = false;
1234 ring->vsi = vsi;
1235 ring->netdev = vsi->netdev;
1236 ring->dev = &pf->pdev->dev;
1237 ring->count = vsi->num_desc;
1238 vsi->rx_rings[i] = ring;
1239 }
1240
1241 return 0;
1242
1243err_out:
1244 ice_vsi_clear_rings(vsi);
1245 return -ENOMEM;
1246}
1247
07309a0e
AV
1248/**
1249 * ice_vsi_map_rings_to_vectors - Map VSI rings to interrupt vectors
1250 * @vsi: the VSI being configured
1251 *
1252 * This function maps descriptor rings to the queue-specific vectors allotted
1253 * through the MSI-X enabling code. On a constrained vector budget, we map Tx
1254 * and Rx rings to the vector as "efficiently" as possible.
1255 */
37bb8390 1256static void ice_vsi_map_rings_to_vectors(struct ice_vsi *vsi)
07309a0e
AV
1257{
1258 int q_vectors = vsi->num_q_vectors;
1259 int tx_rings_rem, rx_rings_rem;
1260 int v_id;
1261
1262 /* initially assigning remaining rings count to VSIs num queue value */
1263 tx_rings_rem = vsi->num_txq;
1264 rx_rings_rem = vsi->num_rxq;
1265
1266 for (v_id = 0; v_id < q_vectors; v_id++) {
1267 struct ice_q_vector *q_vector = vsi->q_vectors[v_id];
1268 int tx_rings_per_v, rx_rings_per_v, q_id, q_base;
1269
1270 /* Tx rings mapping to vector */
1271 tx_rings_per_v = DIV_ROUND_UP(tx_rings_rem, q_vectors - v_id);
1272 q_vector->num_ring_tx = tx_rings_per_v;
1273 q_vector->tx.ring = NULL;
d2b464a7 1274 q_vector->tx.itr_idx = ICE_TX_ITR;
07309a0e
AV
1275 q_base = vsi->num_txq - tx_rings_rem;
1276
1277 for (q_id = q_base; q_id < (q_base + tx_rings_per_v); q_id++) {
1278 struct ice_ring *tx_ring = vsi->tx_rings[q_id];
1279
1280 tx_ring->q_vector = q_vector;
1281 tx_ring->next = q_vector->tx.ring;
1282 q_vector->tx.ring = tx_ring;
1283 }
1284 tx_rings_rem -= tx_rings_per_v;
1285
1286 /* Rx rings mapping to vector */
1287 rx_rings_per_v = DIV_ROUND_UP(rx_rings_rem, q_vectors - v_id);
1288 q_vector->num_ring_rx = rx_rings_per_v;
1289 q_vector->rx.ring = NULL;
d2b464a7 1290 q_vector->rx.itr_idx = ICE_RX_ITR;
07309a0e
AV
1291 q_base = vsi->num_rxq - rx_rings_rem;
1292
1293 for (q_id = q_base; q_id < (q_base + rx_rings_per_v); q_id++) {
1294 struct ice_ring *rx_ring = vsi->rx_rings[q_id];
1295
1296 rx_ring->q_vector = q_vector;
1297 rx_ring->next = q_vector->rx.ring;
1298 q_vector->rx.ring = rx_ring;
1299 }
1300 rx_rings_rem -= rx_rings_per_v;
1301 }
1302}
1303
492af0ab
MFIP
1304/**
1305 * ice_vsi_manage_rss_lut - disable/enable RSS
1306 * @vsi: the VSI being changed
1307 * @ena: boolean value indicating if this is an enable or disable request
1308 *
1309 * In the event of disable request for RSS, this function will zero out RSS
1310 * LUT, while in the event of enable request for RSS, it will reconfigure RSS
1311 * LUT.
1312 */
1313int ice_vsi_manage_rss_lut(struct ice_vsi *vsi, bool ena)
1314{
1315 int err = 0;
1316 u8 *lut;
1317
1318 lut = devm_kzalloc(&vsi->back->pdev->dev, vsi->rss_table_size,
1319 GFP_KERNEL);
1320 if (!lut)
1321 return -ENOMEM;
1322
1323 if (ena) {
1324 if (vsi->rss_lut_user)
1325 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
1326 else
1327 ice_fill_rss_lut(lut, vsi->rss_table_size,
1328 vsi->rss_size);
1329 }
1330
1331 err = ice_set_rss(vsi, NULL, lut, vsi->rss_table_size);
1332 devm_kfree(&vsi->back->pdev->dev, lut);
1333 return err;
1334}
1335
37bb8390
AV
1336/**
1337 * ice_vsi_cfg_rss_lut_key - Configure RSS params for a VSI
1338 * @vsi: VSI to be configured
1339 */
1340static int ice_vsi_cfg_rss_lut_key(struct ice_vsi *vsi)
1341{
1342 u8 seed[ICE_AQC_GET_SET_RSS_KEY_DATA_RSS_KEY_SIZE];
1343 struct ice_aqc_get_set_rss_keys *key;
1344 struct ice_pf *pf = vsi->back;
1345 enum ice_status status;
1346 int err = 0;
1347 u8 *lut;
1348
1349 vsi->rss_size = min_t(int, vsi->rss_size, vsi->num_rxq);
1350
1351 lut = devm_kzalloc(&pf->pdev->dev, vsi->rss_table_size, GFP_KERNEL);
1352 if (!lut)
1353 return -ENOMEM;
1354
1355 if (vsi->rss_lut_user)
1356 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
1357 else
1358 ice_fill_rss_lut(lut, vsi->rss_table_size, vsi->rss_size);
1359
4fb33f31
AV
1360 status = ice_aq_set_rss_lut(&pf->hw, vsi->idx, vsi->rss_lut_type, lut,
1361 vsi->rss_table_size);
37bb8390
AV
1362
1363 if (status) {
1364 dev_err(&vsi->back->pdev->dev,
1365 "set_rss_lut failed, error %d\n", status);
1366 err = -EIO;
1367 goto ice_vsi_cfg_rss_exit;
1368 }
1369
1370 key = devm_kzalloc(&vsi->back->pdev->dev, sizeof(*key), GFP_KERNEL);
1371 if (!key) {
1372 err = -ENOMEM;
1373 goto ice_vsi_cfg_rss_exit;
1374 }
1375
1376 if (vsi->rss_hkey_user)
1377 memcpy(seed, vsi->rss_hkey_user,
1378 ICE_AQC_GET_SET_RSS_KEY_DATA_RSS_KEY_SIZE);
1379 else
1380 netdev_rss_key_fill((void *)seed,
1381 ICE_AQC_GET_SET_RSS_KEY_DATA_RSS_KEY_SIZE);
1382 memcpy(&key->standard_rss_key, seed,
1383 ICE_AQC_GET_SET_RSS_KEY_DATA_RSS_KEY_SIZE);
1384
4fb33f31 1385 status = ice_aq_set_rss_key(&pf->hw, vsi->idx, key);
37bb8390
AV
1386
1387 if (status) {
1388 dev_err(&vsi->back->pdev->dev, "set_rss_key failed, error %d\n",
1389 status);
1390 err = -EIO;
1391 }
1392
1393 devm_kfree(&pf->pdev->dev, key);
1394ice_vsi_cfg_rss_exit:
1395 devm_kfree(&pf->pdev->dev, lut);
1396 return err;
1397}
1398
45d3d428
AV
1399/**
1400 * ice_add_mac_to_list - Add a mac address filter entry to the list
1401 * @vsi: the VSI to be forwarded to
1402 * @add_list: pointer to the list which contains MAC filter entries
1403 * @macaddr: the MAC address to be added.
1404 *
1405 * Adds mac address filter entry to the temp list
1406 *
1407 * Returns 0 on success or ENOMEM on failure.
1408 */
1409int ice_add_mac_to_list(struct ice_vsi *vsi, struct list_head *add_list,
1410 const u8 *macaddr)
1411{
1412 struct ice_fltr_list_entry *tmp;
1413 struct ice_pf *pf = vsi->back;
1414
1415 tmp = devm_kzalloc(&pf->pdev->dev, sizeof(*tmp), GFP_ATOMIC);
1416 if (!tmp)
1417 return -ENOMEM;
1418
1419 tmp->fltr_info.flag = ICE_FLTR_TX;
5726ca0e 1420 tmp->fltr_info.src_id = ICE_SRC_ID_VSI;
45d3d428
AV
1421 tmp->fltr_info.lkup_type = ICE_SW_LKUP_MAC;
1422 tmp->fltr_info.fltr_act = ICE_FWD_TO_VSI;
5726ca0e 1423 tmp->fltr_info.vsi_handle = vsi->idx;
45d3d428
AV
1424 ether_addr_copy(tmp->fltr_info.l_data.mac.mac_addr, macaddr);
1425
1426 INIT_LIST_HEAD(&tmp->list_entry);
1427 list_add(&tmp->list_entry, add_list);
1428
1429 return 0;
1430}
1431
1432/**
1433 * ice_update_eth_stats - Update VSI-specific ethernet statistics counters
1434 * @vsi: the VSI to be updated
1435 */
1436void ice_update_eth_stats(struct ice_vsi *vsi)
1437{
1438 struct ice_eth_stats *prev_es, *cur_es;
1439 struct ice_hw *hw = &vsi->back->hw;
1440 u16 vsi_num = vsi->vsi_num; /* HW absolute index of a VSI */
1441
1442 prev_es = &vsi->eth_stats_prev;
1443 cur_es = &vsi->eth_stats;
1444
1445 ice_stat_update40(hw, GLV_GORCH(vsi_num), GLV_GORCL(vsi_num),
1446 vsi->stat_offsets_loaded, &prev_es->rx_bytes,
1447 &cur_es->rx_bytes);
1448
1449 ice_stat_update40(hw, GLV_UPRCH(vsi_num), GLV_UPRCL(vsi_num),
1450 vsi->stat_offsets_loaded, &prev_es->rx_unicast,
1451 &cur_es->rx_unicast);
1452
1453 ice_stat_update40(hw, GLV_MPRCH(vsi_num), GLV_MPRCL(vsi_num),
1454 vsi->stat_offsets_loaded, &prev_es->rx_multicast,
1455 &cur_es->rx_multicast);
1456
1457 ice_stat_update40(hw, GLV_BPRCH(vsi_num), GLV_BPRCL(vsi_num),
1458 vsi->stat_offsets_loaded, &prev_es->rx_broadcast,
1459 &cur_es->rx_broadcast);
1460
1461 ice_stat_update32(hw, GLV_RDPC(vsi_num), vsi->stat_offsets_loaded,
1462 &prev_es->rx_discards, &cur_es->rx_discards);
1463
1464 ice_stat_update40(hw, GLV_GOTCH(vsi_num), GLV_GOTCL(vsi_num),
1465 vsi->stat_offsets_loaded, &prev_es->tx_bytes,
1466 &cur_es->tx_bytes);
1467
1468 ice_stat_update40(hw, GLV_UPTCH(vsi_num), GLV_UPTCL(vsi_num),
1469 vsi->stat_offsets_loaded, &prev_es->tx_unicast,
1470 &cur_es->tx_unicast);
1471
1472 ice_stat_update40(hw, GLV_MPTCH(vsi_num), GLV_MPTCL(vsi_num),
1473 vsi->stat_offsets_loaded, &prev_es->tx_multicast,
1474 &cur_es->tx_multicast);
1475
1476 ice_stat_update40(hw, GLV_BPTCH(vsi_num), GLV_BPTCL(vsi_num),
1477 vsi->stat_offsets_loaded, &prev_es->tx_broadcast,
1478 &cur_es->tx_broadcast);
1479
1480 ice_stat_update32(hw, GLV_TEPC(vsi_num), vsi->stat_offsets_loaded,
1481 &prev_es->tx_errors, &cur_es->tx_errors);
1482
1483 vsi->stat_offsets_loaded = true;
1484}
1485
1486/**
1487 * ice_free_fltr_list - free filter lists helper
1488 * @dev: pointer to the device struct
1489 * @h: pointer to the list head to be freed
1490 *
1491 * Helper function to free filter lists previously created using
1492 * ice_add_mac_to_list
1493 */
1494void ice_free_fltr_list(struct device *dev, struct list_head *h)
1495{
1496 struct ice_fltr_list_entry *e, *tmp;
1497
1498 list_for_each_entry_safe(e, tmp, h, list_entry) {
1499 list_del(&e->list_entry);
1500 devm_kfree(dev, e);
1501 }
1502}
1503
1504/**
1505 * ice_vsi_add_vlan - Add VSI membership for given VLAN
1506 * @vsi: the VSI being configured
1507 * @vid: VLAN id to be added
1508 */
1509int ice_vsi_add_vlan(struct ice_vsi *vsi, u16 vid)
1510{
1511 struct ice_fltr_list_entry *tmp;
1512 struct ice_pf *pf = vsi->back;
1513 LIST_HEAD(tmp_add_list);
1514 enum ice_status status;
1515 int err = 0;
1516
1517 tmp = devm_kzalloc(&pf->pdev->dev, sizeof(*tmp), GFP_KERNEL);
1518 if (!tmp)
1519 return -ENOMEM;
1520
1521 tmp->fltr_info.lkup_type = ICE_SW_LKUP_VLAN;
1522 tmp->fltr_info.fltr_act = ICE_FWD_TO_VSI;
1523 tmp->fltr_info.flag = ICE_FLTR_TX;
5726ca0e
AV
1524 tmp->fltr_info.src_id = ICE_SRC_ID_VSI;
1525 tmp->fltr_info.vsi_handle = vsi->idx;
45d3d428
AV
1526 tmp->fltr_info.l_data.vlan.vlan_id = vid;
1527
1528 INIT_LIST_HEAD(&tmp->list_entry);
1529 list_add(&tmp->list_entry, &tmp_add_list);
1530
1531 status = ice_add_vlan(&pf->hw, &tmp_add_list);
1532 if (status) {
1533 err = -ENODEV;
1534 dev_err(&pf->pdev->dev, "Failure Adding VLAN %d on VSI %i\n",
1535 vid, vsi->vsi_num);
1536 }
1537
1538 ice_free_fltr_list(&pf->pdev->dev, &tmp_add_list);
1539 return err;
1540}
1541
1542/**
1543 * ice_vsi_kill_vlan - Remove VSI membership for a given VLAN
1544 * @vsi: the VSI being configured
1545 * @vid: VLAN id to be removed
1546 *
1547 * Returns 0 on success and negative on failure
1548 */
1549int ice_vsi_kill_vlan(struct ice_vsi *vsi, u16 vid)
1550{
1551 struct ice_fltr_list_entry *list;
1552 struct ice_pf *pf = vsi->back;
1553 LIST_HEAD(tmp_add_list);
1554 int status = 0;
1555
1556 list = devm_kzalloc(&pf->pdev->dev, sizeof(*list), GFP_KERNEL);
1557 if (!list)
1558 return -ENOMEM;
1559
1560 list->fltr_info.lkup_type = ICE_SW_LKUP_VLAN;
5726ca0e 1561 list->fltr_info.vsi_handle = vsi->idx;
45d3d428
AV
1562 list->fltr_info.fltr_act = ICE_FWD_TO_VSI;
1563 list->fltr_info.l_data.vlan.vlan_id = vid;
1564 list->fltr_info.flag = ICE_FLTR_TX;
5726ca0e 1565 list->fltr_info.src_id = ICE_SRC_ID_VSI;
45d3d428
AV
1566
1567 INIT_LIST_HEAD(&list->list_entry);
1568 list_add(&list->list_entry, &tmp_add_list);
1569
1570 if (ice_remove_vlan(&pf->hw, &tmp_add_list)) {
1571 dev_err(&pf->pdev->dev, "Error removing VLAN %d on vsi %i\n",
1572 vid, vsi->vsi_num);
1573 status = -EIO;
1574 }
1575
1576 ice_free_fltr_list(&pf->pdev->dev, &tmp_add_list);
1577 return status;
1578}
1579
72adf242
AV
1580/**
1581 * ice_vsi_cfg_rxqs - Configure the VSI for Rx
1582 * @vsi: the VSI being configured
1583 *
1584 * Return 0 on success and a negative value on error
1585 * Configure the Rx VSI for operation.
1586 */
1587int ice_vsi_cfg_rxqs(struct ice_vsi *vsi)
1588{
1589 int err = 0;
1590 u16 i;
1591
8ede0178
AV
1592 if (vsi->type == ICE_VSI_VF)
1593 goto setup_rings;
1594
72adf242
AV
1595 if (vsi->netdev && vsi->netdev->mtu > ETH_DATA_LEN)
1596 vsi->max_frame = vsi->netdev->mtu +
1597 ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
1598 else
1599 vsi->max_frame = ICE_RXBUF_2048;
1600
1601 vsi->rx_buf_len = ICE_RXBUF_2048;
8ede0178 1602setup_rings:
72adf242
AV
1603 /* set up individual rings */
1604 for (i = 0; i < vsi->num_rxq && !err; i++)
1605 err = ice_setup_rx_ctx(vsi->rx_rings[i]);
1606
1607 if (err) {
1608 dev_err(&vsi->back->pdev->dev, "ice_setup_rx_ctx failed\n");
1609 return -EIO;
1610 }
1611 return err;
1612}
1613
1614/**
1615 * ice_vsi_cfg_txqs - Configure the VSI for Tx
1616 * @vsi: the VSI being configured
1617 *
1618 * Return 0 on success and a negative value on error
1619 * Configure the Tx VSI for operation.
1620 */
1621int ice_vsi_cfg_txqs(struct ice_vsi *vsi)
1622{
1623 struct ice_aqc_add_tx_qgrp *qg_buf;
1624 struct ice_aqc_add_txqs_perq *txq;
1625 struct ice_pf *pf = vsi->back;
c5a2a4a3 1626 u8 num_q_grps, q_idx = 0;
72adf242
AV
1627 enum ice_status status;
1628 u16 buf_len, i, pf_q;
1629 int err = 0, tc = 0;
72adf242
AV
1630
1631 buf_len = sizeof(struct ice_aqc_add_tx_qgrp);
1632 qg_buf = devm_kzalloc(&pf->pdev->dev, buf_len, GFP_KERNEL);
1633 if (!qg_buf)
1634 return -ENOMEM;
1635
72adf242
AV
1636 qg_buf->num_txqs = 1;
1637 num_q_grps = 1;
1638
c5a2a4a3
UK
1639 /* set up and configure the Tx queues for each enabled TC */
1640 for (tc = 0; tc < ICE_MAX_TRAFFIC_CLASS; tc++) {
1641 if (!(vsi->tc_cfg.ena_tc & BIT(tc)))
1642 break;
72adf242 1643
c5a2a4a3
UK
1644 for (i = 0; i < vsi->tc_cfg.tc_info[tc].qcount_tx; i++) {
1645 struct ice_tlan_ctx tlan_ctx = { 0 };
1646
1647 pf_q = vsi->txq_map[q_idx];
1648 ice_setup_tx_ctx(vsi->tx_rings[q_idx], &tlan_ctx,
1649 pf_q);
1650 /* copy context contents into the qg_buf */
1651 qg_buf->txqs[0].txq_id = cpu_to_le16(pf_q);
1652 ice_set_ctx((u8 *)&tlan_ctx, qg_buf->txqs[0].txq_ctx,
1653 ice_tlan_ctx_info);
1654
1655 /* init queue specific tail reg. It is referred as
1656 * transmit comm scheduler queue doorbell.
1657 */
1658 vsi->tx_rings[q_idx]->tail =
1659 pf->hw.hw_addr + QTX_COMM_DBELL(pf_q);
1660 status = ice_ena_vsi_txq(vsi->port_info, vsi->idx, tc,
1661 num_q_grps, qg_buf, buf_len,
1662 NULL);
1663 if (status) {
1664 dev_err(&vsi->back->pdev->dev,
1665 "Failed to set LAN Tx queue context, error: %d\n",
1666 status);
1667 err = -ENODEV;
1668 goto err_cfg_txqs;
1669 }
72adf242 1670
c5a2a4a3
UK
1671 /* Add Tx Queue TEID into the VSI Tx ring from the
1672 * response. This will complete configuring and
1673 * enabling the queue.
1674 */
1675 txq = &qg_buf->txqs[0];
1676 if (pf_q == le16_to_cpu(txq->txq_id))
1677 vsi->tx_rings[q_idx]->txq_teid =
1678 le32_to_cpu(txq->q_teid);
72adf242 1679
c5a2a4a3
UK
1680 q_idx++;
1681 }
72adf242
AV
1682 }
1683err_cfg_txqs:
1684 devm_kfree(&pf->pdev->dev, qg_buf);
1685 return err;
1686}
1687
9e4ab4c2
BC
1688/**
1689 * ice_intrl_usec_to_reg - convert interrupt rate limit to register value
1690 * @intrl: interrupt rate limit in usecs
1691 * @gran: interrupt rate limit granularity in usecs
1692 *
1693 * This function converts a decimal interrupt rate limit in usecs to the format
1694 * expected by firmware.
1695 */
1696static u32 ice_intrl_usec_to_reg(u8 intrl, u8 gran)
1697{
1698 u32 val = intrl / gran;
1699
1700 if (val)
1701 return val | GLINT_RATE_INTRL_ENA_M;
1702 return 0;
1703}
1704
d2b464a7
BC
1705/**
1706 * ice_cfg_itr - configure the initial interrupt throttle values
1707 * @hw: pointer to the HW structure
1708 * @q_vector: interrupt vector that's being configured
1709 * @vector: HW vector index to apply the interrupt throttling to
1710 *
1711 * Configure interrupt throttling values for the ring containers that are
1712 * associated with the interrupt vector passed in.
1713 */
1714static void
1715ice_cfg_itr(struct ice_hw *hw, struct ice_q_vector *q_vector, u16 vector)
1716{
1717 u8 itr_gran = hw->itr_gran;
1718
1719 if (q_vector->num_ring_rx) {
1720 struct ice_ring_container *rc = &q_vector->rx;
1721
1722 rc->itr = ITR_TO_REG(ICE_DFLT_RX_ITR, itr_gran);
1723 rc->latency_range = ICE_LOW_LATENCY;
1724 wr32(hw, GLINT_ITR(rc->itr_idx, vector), rc->itr);
1725 }
1726
1727 if (q_vector->num_ring_tx) {
1728 struct ice_ring_container *rc = &q_vector->tx;
1729
1730 rc->itr = ITR_TO_REG(ICE_DFLT_TX_ITR, itr_gran);
1731 rc->latency_range = ICE_LOW_LATENCY;
1732 wr32(hw, GLINT_ITR(rc->itr_idx, vector), rc->itr);
1733 }
1734}
1735
72adf242
AV
1736/**
1737 * ice_vsi_cfg_msix - MSIX mode Interrupt Config in the HW
1738 * @vsi: the VSI being configured
1739 */
1740void ice_vsi_cfg_msix(struct ice_vsi *vsi)
1741{
1742 struct ice_pf *pf = vsi->back;
eb0208ec 1743 u16 vector = vsi->hw_base_vector;
72adf242
AV
1744 struct ice_hw *hw = &pf->hw;
1745 u32 txq = 0, rxq = 0;
d2b464a7 1746 int i, q;
72adf242
AV
1747
1748 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
1749 struct ice_q_vector *q_vector = vsi->q_vectors[i];
1750
d2b464a7 1751 ice_cfg_itr(hw, q_vector, vector);
9e4ab4c2 1752
9e4ab4c2
BC
1753 wr32(hw, GLINT_RATE(vector),
1754 ice_intrl_usec_to_reg(q_vector->intrl, hw->intrl_gran));
72adf242
AV
1755
1756 /* Both Transmit Queue Interrupt Cause Control register
1757 * and Receive Queue Interrupt Cause control register
1758 * expects MSIX_INDX field to be the vector index
1759 * within the function space and not the absolute
1760 * vector index across PF or across device.
1761 * For SR-IOV VF VSIs queue vector index always starts
1762 * with 1 since first vector index(0) is used for OICR
1763 * in VF space. Since VMDq and other PF VSIs are within
1764 * the PF function space, use the vector index that is
1765 * tracked for this PF.
1766 */
1767 for (q = 0; q < q_vector->num_ring_tx; q++) {
d2b464a7 1768 int itr_idx = q_vector->tx.itr_idx;
72adf242
AV
1769 u32 val;
1770
8ede0178
AV
1771 if (vsi->type == ICE_VSI_VF)
1772 val = QINT_TQCTL_CAUSE_ENA_M |
d2b464a7 1773 (itr_idx << QINT_TQCTL_ITR_INDX_S) |
8ede0178
AV
1774 ((i + 1) << QINT_TQCTL_MSIX_INDX_S);
1775 else
1776 val = QINT_TQCTL_CAUSE_ENA_M |
d2b464a7 1777 (itr_idx << QINT_TQCTL_ITR_INDX_S) |
8ede0178 1778 (vector << QINT_TQCTL_MSIX_INDX_S);
72adf242
AV
1779 wr32(hw, QINT_TQCTL(vsi->txq_map[txq]), val);
1780 txq++;
1781 }
1782
1783 for (q = 0; q < q_vector->num_ring_rx; q++) {
d2b464a7 1784 int itr_idx = q_vector->rx.itr_idx;
72adf242
AV
1785 u32 val;
1786
8ede0178
AV
1787 if (vsi->type == ICE_VSI_VF)
1788 val = QINT_RQCTL_CAUSE_ENA_M |
d2b464a7 1789 (itr_idx << QINT_RQCTL_ITR_INDX_S) |
8ede0178
AV
1790 ((i + 1) << QINT_RQCTL_MSIX_INDX_S);
1791 else
1792 val = QINT_RQCTL_CAUSE_ENA_M |
d2b464a7 1793 (itr_idx << QINT_RQCTL_ITR_INDX_S) |
8ede0178 1794 (vector << QINT_RQCTL_MSIX_INDX_S);
72adf242
AV
1795 wr32(hw, QINT_RQCTL(vsi->rxq_map[rxq]), val);
1796 rxq++;
1797 }
1798 }
1799
1800 ice_flush(hw);
1801}
1802
45d3d428
AV
1803/**
1804 * ice_vsi_manage_vlan_insertion - Manage VLAN insertion for the VSI for Tx
1805 * @vsi: the VSI being changed
1806 */
1807int ice_vsi_manage_vlan_insertion(struct ice_vsi *vsi)
1808{
1809 struct device *dev = &vsi->back->pdev->dev;
1810 struct ice_hw *hw = &vsi->back->hw;
1811 struct ice_vsi_ctx ctxt = { 0 };
1812 enum ice_status status;
1813
1814 /* Here we are configuring the VSI to let the driver add VLAN tags by
1815 * setting vlan_flags to ICE_AQ_VSI_VLAN_MODE_ALL. The actual VLAN tag
1816 * insertion happens in the Tx hot path, in ice_tx_map.
1817 */
1818 ctxt.info.vlan_flags = ICE_AQ_VSI_VLAN_MODE_ALL;
1819
1820 ctxt.info.valid_sections = cpu_to_le16(ICE_AQ_VSI_PROP_VLAN_VALID);
45d3d428 1821
5726ca0e 1822 status = ice_update_vsi(hw, vsi->idx, &ctxt, NULL);
45d3d428
AV
1823 if (status) {
1824 dev_err(dev, "update VSI for VLAN insert failed, err %d aq_err %d\n",
1825 status, hw->adminq.sq_last_status);
1826 return -EIO;
1827 }
1828
1829 vsi->info.vlan_flags = ctxt.info.vlan_flags;
1830 return 0;
1831}
1832
1833/**
1834 * ice_vsi_manage_vlan_stripping - Manage VLAN stripping for the VSI for Rx
1835 * @vsi: the VSI being changed
1836 * @ena: boolean value indicating if this is a enable or disable request
1837 */
1838int ice_vsi_manage_vlan_stripping(struct ice_vsi *vsi, bool ena)
1839{
1840 struct device *dev = &vsi->back->pdev->dev;
1841 struct ice_hw *hw = &vsi->back->hw;
1842 struct ice_vsi_ctx ctxt = { 0 };
1843 enum ice_status status;
1844
1845 /* Here we are configuring what the VSI should do with the VLAN tag in
1846 * the Rx packet. We can either leave the tag in the packet or put it in
1847 * the Rx descriptor.
1848 */
1849 if (ena) {
1850 /* Strip VLAN tag from Rx packet and put it in the desc */
1851 ctxt.info.vlan_flags = ICE_AQ_VSI_VLAN_EMOD_STR_BOTH;
1852 } else {
1853 /* Disable stripping. Leave tag in packet */
1854 ctxt.info.vlan_flags = ICE_AQ_VSI_VLAN_EMOD_NOTHING;
1855 }
1856
1857 /* Allow all packets untagged/tagged */
1858 ctxt.info.vlan_flags |= ICE_AQ_VSI_VLAN_MODE_ALL;
1859
1860 ctxt.info.valid_sections = cpu_to_le16(ICE_AQ_VSI_PROP_VLAN_VALID);
45d3d428 1861
5726ca0e 1862 status = ice_update_vsi(hw, vsi->idx, &ctxt, NULL);
45d3d428
AV
1863 if (status) {
1864 dev_err(dev, "update VSI for VLAN strip failed, ena = %d err %d aq_err %d\n",
1865 ena, status, hw->adminq.sq_last_status);
1866 return -EIO;
1867 }
1868
1869 vsi->info.vlan_flags = ctxt.info.vlan_flags;
1870 return 0;
1871}
72adf242
AV
1872
1873/**
1874 * ice_vsi_start_rx_rings - start VSI's Rx rings
1875 * @vsi: the VSI whose rings are to be started
1876 *
1877 * Returns 0 on success and a negative value on error
1878 */
1879int ice_vsi_start_rx_rings(struct ice_vsi *vsi)
1880{
1881 return ice_vsi_ctrl_rx_rings(vsi, true);
1882}
1883
1884/**
1885 * ice_vsi_stop_rx_rings - stop VSI's Rx rings
1886 * @vsi: the VSI
1887 *
1888 * Returns 0 on success and a negative value on error
1889 */
1890int ice_vsi_stop_rx_rings(struct ice_vsi *vsi)
1891{
1892 return ice_vsi_ctrl_rx_rings(vsi, false);
1893}
1894
1895/**
1896 * ice_vsi_stop_tx_rings - Disable Tx rings
1897 * @vsi: the VSI being configured
ddf30f7f
AV
1898 * @rst_src: reset source
1899 * @rel_vmvf_num: Relative id of VF/VM
72adf242 1900 */
ddf30f7f
AV
1901int ice_vsi_stop_tx_rings(struct ice_vsi *vsi, enum ice_disq_rst_src rst_src,
1902 u16 rel_vmvf_num)
72adf242
AV
1903{
1904 struct ice_pf *pf = vsi->back;
1905 struct ice_hw *hw = &pf->hw;
1906 enum ice_status status;
1907 u32 *q_teids, val;
1908 u16 *q_ids, i;
1909 int err = 0;
1910
1911 if (vsi->num_txq > ICE_LAN_TXQ_MAX_QDIS)
1912 return -EINVAL;
1913
1914 q_teids = devm_kcalloc(&pf->pdev->dev, vsi->num_txq, sizeof(*q_teids),
1915 GFP_KERNEL);
1916 if (!q_teids)
1917 return -ENOMEM;
1918
1919 q_ids = devm_kcalloc(&pf->pdev->dev, vsi->num_txq, sizeof(*q_ids),
1920 GFP_KERNEL);
1921 if (!q_ids) {
1922 err = -ENOMEM;
1923 goto err_alloc_q_ids;
1924 }
1925
1926 /* set up the Tx queue list to be disabled */
1927 ice_for_each_txq(vsi, i) {
1928 u16 v_idx;
1929
b354e98f
TN
1930 if (!vsi->tx_rings || !vsi->tx_rings[i] ||
1931 !vsi->tx_rings[i]->q_vector) {
72adf242
AV
1932 err = -EINVAL;
1933 goto err_out;
1934 }
1935
1936 q_ids[i] = vsi->txq_map[i];
1937 q_teids[i] = vsi->tx_rings[i]->txq_teid;
1938
1939 /* clear cause_ena bit for disabled queues */
1940 val = rd32(hw, QINT_TQCTL(vsi->tx_rings[i]->reg_idx));
1941 val &= ~QINT_TQCTL_CAUSE_ENA_M;
1942 wr32(hw, QINT_TQCTL(vsi->tx_rings[i]->reg_idx), val);
1943
1944 /* software is expected to wait for 100 ns */
1945 ndelay(100);
1946
1947 /* trigger a software interrupt for the vector associated to
1948 * the queue to schedule NAPI handler
1949 */
1950 v_idx = vsi->tx_rings[i]->q_vector->v_idx;
eb0208ec 1951 wr32(hw, GLINT_DYN_CTL(vsi->hw_base_vector + v_idx),
72adf242
AV
1952 GLINT_DYN_CTL_SWINT_TRIG_M | GLINT_DYN_CTL_INTENA_MSK_M);
1953 }
1954 status = ice_dis_vsi_txq(vsi->port_info, vsi->num_txq, q_ids, q_teids,
ddf30f7f 1955 rst_src, rel_vmvf_num, NULL);
72adf242
AV
1956 /* if the disable queue command was exercised during an active reset
1957 * flow, ICE_ERR_RESET_ONGOING is returned. This is not an error as
1958 * the reset operation disables queues at the hardware level anyway.
1959 */
1960 if (status == ICE_ERR_RESET_ONGOING) {
1961 dev_info(&pf->pdev->dev,
1962 "Reset in progress. LAN Tx queues already disabled\n");
1963 } else if (status) {
1964 dev_err(&pf->pdev->dev,
1965 "Failed to disable LAN Tx queues, error: %d\n",
1966 status);
1967 err = -ENODEV;
1968 }
1969
1970err_out:
1971 devm_kfree(&pf->pdev->dev, q_ids);
1972
1973err_alloc_q_ids:
1974 devm_kfree(&pf->pdev->dev, q_teids);
1975
1976 return err;
1977}
5153a18e
AV
1978
1979/**
1980 * ice_cfg_vlan_pruning - enable or disable VLAN pruning on the VSI
1981 * @vsi: VSI to enable or disable VLAN pruning on
1982 * @ena: set to true to enable VLAN pruning and false to disable it
1983 *
1984 * returns 0 if VSI is updated, negative otherwise
1985 */
1986int ice_cfg_vlan_pruning(struct ice_vsi *vsi, bool ena)
1987{
1988 struct ice_vsi_ctx *ctxt;
1989 struct device *dev;
1990 int status;
1991
1992 if (!vsi)
1993 return -EINVAL;
1994
1995 dev = &vsi->back->pdev->dev;
1996 ctxt = devm_kzalloc(dev, sizeof(*ctxt), GFP_KERNEL);
1997 if (!ctxt)
1998 return -ENOMEM;
1999
2000 ctxt->info = vsi->info;
2001
2002 if (ena) {
2003 ctxt->info.sec_flags |=
2004 ICE_AQ_VSI_SEC_TX_VLAN_PRUNE_ENA <<
2005 ICE_AQ_VSI_SEC_TX_PRUNE_ENA_S;
2006 ctxt->info.sw_flags2 |= ICE_AQ_VSI_SW_FLAG_RX_VLAN_PRUNE_ENA;
2007 } else {
2008 ctxt->info.sec_flags &=
2009 ~(ICE_AQ_VSI_SEC_TX_VLAN_PRUNE_ENA <<
2010 ICE_AQ_VSI_SEC_TX_PRUNE_ENA_S);
2011 ctxt->info.sw_flags2 &= ~ICE_AQ_VSI_SW_FLAG_RX_VLAN_PRUNE_ENA;
2012 }
2013
2014 ctxt->info.valid_sections = cpu_to_le16(ICE_AQ_VSI_PROP_SECURITY_VALID |
2015 ICE_AQ_VSI_PROP_SW_VALID);
5726ca0e
AV
2016
2017 status = ice_update_vsi(&vsi->back->hw, vsi->idx, ctxt, NULL);
5153a18e 2018 if (status) {
5726ca0e 2019 netdev_err(vsi->netdev, "%sabling VLAN pruning on VSI handle: %d, VSI HW ID: %d failed, err = %d, aq_err = %d\n",
31082519 2020 ena ? "En" : "Dis", vsi->idx, vsi->vsi_num, status,
5153a18e
AV
2021 vsi->back->hw.adminq.sq_last_status);
2022 goto err_out;
2023 }
2024
2025 vsi->info.sec_flags = ctxt->info.sec_flags;
2026 vsi->info.sw_flags2 = ctxt->info.sw_flags2;
2027
2028 devm_kfree(dev, ctxt);
2029 return 0;
2030
2031err_out:
2032 devm_kfree(dev, ctxt);
2033 return -EIO;
2034}
2035
37bb8390
AV
2036/**
2037 * ice_vsi_setup - Set up a VSI by a given type
2038 * @pf: board private structure
2039 * @pi: pointer to the port_info instance
2040 * @type: VSI type
2041 * @vf_id: defines VF id to which this VSI connects. This field is meant to be
2042 * used only for ICE_VSI_VF VSI type. For other VSI types, should
2043 * fill-in ICE_INVAL_VFID as input.
2044 *
2045 * This allocates the sw VSI structure and its queue resources.
2046 *
2047 * Returns pointer to the successfully allocated and configured VSI sw struct on
2048 * success, NULL on failure.
2049 */
2050struct ice_vsi *
2051ice_vsi_setup(struct ice_pf *pf, struct ice_port_info *pi,
8ede0178 2052 enum ice_vsi_type type, u16 vf_id)
37bb8390
AV
2053{
2054 u16 max_txqs[ICE_MAX_TRAFFIC_CLASS] = { 0 };
2055 struct device *dev = &pf->pdev->dev;
2056 struct ice_vsi *vsi;
2057 int ret, i;
2058
2059 vsi = ice_vsi_alloc(pf, type);
2060 if (!vsi) {
2061 dev_err(dev, "could not allocate VSI\n");
2062 return NULL;
2063 }
2064
2065 vsi->port_info = pi;
2066 vsi->vsw = pf->first_sw;
8ede0178
AV
2067 if (vsi->type == ICE_VSI_VF)
2068 vsi->vf_id = vf_id;
37bb8390
AV
2069
2070 if (ice_vsi_get_qs(vsi)) {
2071 dev_err(dev, "Failed to allocate queues. vsi->idx = %d\n",
2072 vsi->idx);
2073 goto unroll_get_qs;
2074 }
2075
2076 /* set RSS capabilities */
2077 ice_vsi_set_rss_params(vsi);
2078
c5a2a4a3
UK
2079 /* set tc configuration */
2080 ice_vsi_set_tc_cfg(vsi);
2081
37bb8390
AV
2082 /* create the VSI */
2083 ret = ice_vsi_init(vsi);
2084 if (ret)
2085 goto unroll_get_qs;
2086
2087 switch (vsi->type) {
2088 case ICE_VSI_PF:
2089 ret = ice_vsi_alloc_q_vectors(vsi);
2090 if (ret)
2091 goto unroll_vsi_init;
2092
2093 ret = ice_vsi_setup_vector_base(vsi);
2094 if (ret)
2095 goto unroll_alloc_q_vector;
2096
2097 ret = ice_vsi_alloc_rings(vsi);
2098 if (ret)
2099 goto unroll_vector_base;
2100
2101 ice_vsi_map_rings_to_vectors(vsi);
2102
2103 /* Do not exit if configuring RSS had an issue, at least
2104 * receive traffic on first queue. Hence no need to capture
2105 * return value
2106 */
2107 if (test_bit(ICE_FLAG_RSS_ENA, pf->flags))
2108 ice_vsi_cfg_rss_lut_key(vsi);
2109 break;
8ede0178
AV
2110 case ICE_VSI_VF:
2111 /* VF driver will take care of creating netdev for this type and
2112 * map queues to vectors through Virtchnl, PF driver only
2113 * creates a VSI and corresponding structures for bookkeeping
2114 * purpose
2115 */
2116 ret = ice_vsi_alloc_q_vectors(vsi);
2117 if (ret)
2118 goto unroll_vsi_init;
2119
2120 ret = ice_vsi_alloc_rings(vsi);
2121 if (ret)
2122 goto unroll_alloc_q_vector;
2123
2124 /* Setup Vector base only during VF init phase or when VF asks
2125 * for more vectors than assigned number. In all other cases,
2126 * assign hw_base_vector to the value given earlier.
2127 */
2128 if (test_bit(ICE_VF_STATE_CFG_INTR, pf->vf[vf_id].vf_states)) {
2129 ret = ice_vsi_setup_vector_base(vsi);
2130 if (ret)
2131 goto unroll_vector_base;
2132 } else {
2133 vsi->hw_base_vector = pf->vf[vf_id].first_vector_idx;
2134 }
2135 pf->q_left_tx -= vsi->alloc_txq;
2136 pf->q_left_rx -= vsi->alloc_rxq;
2137 break;
37bb8390 2138 default:
df17b7e0 2139 /* clean up the resources and exit */
37bb8390
AV
2140 goto unroll_vsi_init;
2141 }
2142
37bb8390
AV
2143 /* configure VSI nodes based on number of queues and TC's */
2144 for (i = 0; i < vsi->tc_cfg.numtc; i++)
c5a2a4a3 2145 max_txqs[i] = pf->num_lan_tx;
37bb8390 2146
4fb33f31
AV
2147 ret = ice_cfg_vsi_lan(vsi->port_info, vsi->idx, vsi->tc_cfg.ena_tc,
2148 max_txqs);
37bb8390
AV
2149 if (ret) {
2150 dev_info(&pf->pdev->dev, "Failed VSI lan queue config\n");
2151 goto unroll_vector_base;
2152 }
2153
2154 return vsi;
2155
2156unroll_vector_base:
eb0208ec
PB
2157 /* reclaim SW interrupts back to the common pool */
2158 ice_free_res(vsi->back->sw_irq_tracker, vsi->sw_base_vector, vsi->idx);
2159 pf->num_avail_sw_msix += vsi->num_q_vectors;
2160 /* reclaim HW interrupt back to the common pool */
2161 ice_free_res(vsi->back->hw_irq_tracker, vsi->hw_base_vector, vsi->idx);
2162 pf->num_avail_hw_msix += vsi->num_q_vectors;
37bb8390
AV
2163unroll_alloc_q_vector:
2164 ice_vsi_free_q_vectors(vsi);
2165unroll_vsi_init:
2166 ice_vsi_delete(vsi);
2167unroll_get_qs:
2168 ice_vsi_put_qs(vsi);
2169 pf->q_left_tx += vsi->alloc_txq;
2170 pf->q_left_rx += vsi->alloc_rxq;
2171 ice_vsi_clear(vsi);
2172
2173 return NULL;
2174}
2175
5153a18e
AV
2176/**
2177 * ice_vsi_release_msix - Clear the queue to Interrupt mapping in HW
2178 * @vsi: the VSI being cleaned up
2179 */
2180static void ice_vsi_release_msix(struct ice_vsi *vsi)
2181{
2182 struct ice_pf *pf = vsi->back;
eb0208ec 2183 u16 vector = vsi->hw_base_vector;
5153a18e
AV
2184 struct ice_hw *hw = &pf->hw;
2185 u32 txq = 0;
2186 u32 rxq = 0;
2187 int i, q;
2188
2189 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
2190 struct ice_q_vector *q_vector = vsi->q_vectors[i];
2191
d2b464a7
BC
2192 wr32(hw, GLINT_ITR(ICE_IDX_ITR0, vector), 0);
2193 wr32(hw, GLINT_ITR(ICE_IDX_ITR1, vector), 0);
5153a18e
AV
2194 for (q = 0; q < q_vector->num_ring_tx; q++) {
2195 wr32(hw, QINT_TQCTL(vsi->txq_map[txq]), 0);
2196 txq++;
2197 }
2198
2199 for (q = 0; q < q_vector->num_ring_rx; q++) {
2200 wr32(hw, QINT_RQCTL(vsi->rxq_map[rxq]), 0);
2201 rxq++;
2202 }
2203 }
2204
2205 ice_flush(hw);
2206}
2207
2208/**
2209 * ice_vsi_free_irq - Free the IRQ association with the OS
2210 * @vsi: the VSI being configured
2211 */
2212void ice_vsi_free_irq(struct ice_vsi *vsi)
2213{
2214 struct ice_pf *pf = vsi->back;
eb0208ec 2215 int base = vsi->sw_base_vector;
5153a18e
AV
2216
2217 if (test_bit(ICE_FLAG_MSIX_ENA, pf->flags)) {
2218 int i;
2219
2220 if (!vsi->q_vectors || !vsi->irqs_ready)
2221 return;
2222
eb0208ec 2223 ice_vsi_release_msix(vsi);
8ede0178
AV
2224 if (vsi->type == ICE_VSI_VF)
2225 return;
eb0208ec 2226
5153a18e
AV
2227 vsi->irqs_ready = false;
2228 for (i = 0; i < vsi->num_q_vectors; i++) {
2229 u16 vector = i + base;
2230 int irq_num;
2231
2232 irq_num = pf->msix_entries[vector].vector;
2233
2234 /* free only the irqs that were actually requested */
2235 if (!vsi->q_vectors[i] ||
2236 !(vsi->q_vectors[i]->num_ring_tx ||
2237 vsi->q_vectors[i]->num_ring_rx))
2238 continue;
2239
2240 /* clear the affinity notifier in the IRQ descriptor */
2241 irq_set_affinity_notifier(irq_num, NULL);
2242
2243 /* clear the affinity_mask in the IRQ descriptor */
2244 irq_set_affinity_hint(irq_num, NULL);
2245 synchronize_irq(irq_num);
2246 devm_free_irq(&pf->pdev->dev, irq_num,
2247 vsi->q_vectors[i]);
2248 }
5153a18e
AV
2249 }
2250}
2251
2252/**
2253 * ice_vsi_free_tx_rings - Free Tx resources for VSI queues
2254 * @vsi: the VSI having resources freed
2255 */
2256void ice_vsi_free_tx_rings(struct ice_vsi *vsi)
2257{
2258 int i;
2259
2260 if (!vsi->tx_rings)
2261 return;
2262
2263 ice_for_each_txq(vsi, i)
2264 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
2265 ice_free_tx_ring(vsi->tx_rings[i]);
2266}
2267
2268/**
2269 * ice_vsi_free_rx_rings - Free Rx resources for VSI queues
2270 * @vsi: the VSI having resources freed
2271 */
2272void ice_vsi_free_rx_rings(struct ice_vsi *vsi)
2273{
2274 int i;
2275
2276 if (!vsi->rx_rings)
2277 return;
2278
2279 ice_for_each_rxq(vsi, i)
2280 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
2281 ice_free_rx_ring(vsi->rx_rings[i]);
2282}
2283
07309a0e
AV
2284/**
2285 * ice_vsi_close - Shut down a VSI
2286 * @vsi: the VSI being shut down
2287 */
2288void ice_vsi_close(struct ice_vsi *vsi)
2289{
2290 if (!test_and_set_bit(__ICE_DOWN, vsi->state))
2291 ice_down(vsi);
2292
2293 ice_vsi_free_irq(vsi);
2294 ice_vsi_free_tx_rings(vsi);
2295 ice_vsi_free_rx_rings(vsi);
2296}
2297
5153a18e
AV
2298/**
2299 * ice_free_res - free a block of resources
2300 * @res: pointer to the resource
2301 * @index: starting index previously returned by ice_get_res
2302 * @id: identifier to track owner
2303 *
2304 * Returns number of resources freed
2305 */
2306int ice_free_res(struct ice_res_tracker *res, u16 index, u16 id)
2307{
2308 int count = 0;
2309 int i;
2310
2311 if (!res || index >= res->num_entries)
2312 return -EINVAL;
2313
2314 id |= ICE_RES_VALID_BIT;
2315 for (i = index; i < res->num_entries && res->list[i] == id; i++) {
2316 res->list[i] = 0;
2317 count++;
2318 }
2319
2320 return count;
2321}
2322
2323/**
2324 * ice_search_res - Search the tracker for a block of resources
2325 * @res: pointer to the resource
2326 * @needed: size of the block needed
2327 * @id: identifier to track owner
2328 *
2329 * Returns the base item index of the block, or -ENOMEM for error
2330 */
2331static int ice_search_res(struct ice_res_tracker *res, u16 needed, u16 id)
2332{
2333 int start = res->search_hint;
2334 int end = start;
2335
d337f2af 2336 if ((start + needed) > res->num_entries)
eb0208ec
PB
2337 return -ENOMEM;
2338
5153a18e
AV
2339 id |= ICE_RES_VALID_BIT;
2340
2341 do {
2342 /* skip already allocated entries */
2343 if (res->list[end++] & ICE_RES_VALID_BIT) {
2344 start = end;
2345 if ((start + needed) > res->num_entries)
2346 break;
2347 }
2348
2349 if (end == (start + needed)) {
2350 int i = start;
2351
2352 /* there was enough, so assign it to the requestor */
2353 while (i != end)
2354 res->list[i++] = id;
2355
2356 if (end == res->num_entries)
2357 end = 0;
2358
2359 res->search_hint = end;
2360 return start;
2361 }
2362 } while (1);
2363
2364 return -ENOMEM;
2365}
2366
2367/**
2368 * ice_get_res - get a block of resources
2369 * @pf: board private structure
2370 * @res: pointer to the resource
2371 * @needed: size of the block needed
2372 * @id: identifier to track owner
2373 *
2374 * Returns the base item index of the block, or -ENOMEM for error
2375 * The search_hint trick and lack of advanced fit-finding only works
2376 * because we're highly likely to have all the same sized requests.
2377 * Linear search time and any fragmentation should be minimal.
2378 */
2379int
2380ice_get_res(struct ice_pf *pf, struct ice_res_tracker *res, u16 needed, u16 id)
2381{
2382 int ret;
2383
2384 if (!res || !pf)
2385 return -EINVAL;
2386
2387 if (!needed || needed > res->num_entries || id >= ICE_RES_VALID_BIT) {
2388 dev_err(&pf->pdev->dev,
2389 "param err: needed=%d, num_entries = %d id=0x%04x\n",
2390 needed, res->num_entries, id);
2391 return -EINVAL;
2392 }
2393
2394 /* search based on search_hint */
2395 ret = ice_search_res(res, needed, id);
2396
2397 if (ret < 0) {
2398 /* previous search failed. Reset search hint and try again */
2399 res->search_hint = 0;
2400 ret = ice_search_res(res, needed, id);
2401 }
2402
2403 return ret;
2404}
2405
2406/**
2407 * ice_vsi_dis_irq - Mask off queue interrupt generation on the VSI
2408 * @vsi: the VSI being un-configured
2409 */
2410void ice_vsi_dis_irq(struct ice_vsi *vsi)
2411{
eb0208ec 2412 int base = vsi->sw_base_vector;
5153a18e
AV
2413 struct ice_pf *pf = vsi->back;
2414 struct ice_hw *hw = &pf->hw;
5153a18e
AV
2415 u32 val;
2416 int i;
2417
2418 /* disable interrupt causation from each queue */
2419 if (vsi->tx_rings) {
2420 ice_for_each_txq(vsi, i) {
2421 if (vsi->tx_rings[i]) {
2422 u16 reg;
2423
2424 reg = vsi->tx_rings[i]->reg_idx;
2425 val = rd32(hw, QINT_TQCTL(reg));
2426 val &= ~QINT_TQCTL_CAUSE_ENA_M;
2427 wr32(hw, QINT_TQCTL(reg), val);
2428 }
2429 }
2430 }
2431
2432 if (vsi->rx_rings) {
2433 ice_for_each_rxq(vsi, i) {
2434 if (vsi->rx_rings[i]) {
2435 u16 reg;
2436
2437 reg = vsi->rx_rings[i]->reg_idx;
2438 val = rd32(hw, QINT_RQCTL(reg));
2439 val &= ~QINT_RQCTL_CAUSE_ENA_M;
2440 wr32(hw, QINT_RQCTL(reg), val);
2441 }
2442 }
2443 }
2444
2445 /* disable each interrupt */
2446 if (test_bit(ICE_FLAG_MSIX_ENA, pf->flags)) {
eb0208ec
PB
2447 for (i = vsi->hw_base_vector;
2448 i < (vsi->num_q_vectors + vsi->hw_base_vector); i++)
5153a18e
AV
2449 wr32(hw, GLINT_DYN_CTL(i), 0);
2450
2451 ice_flush(hw);
2452 for (i = 0; i < vsi->num_q_vectors; i++)
2453 synchronize_irq(pf->msix_entries[i + base].vector);
2454 }
2455}
2456
df0f8479
AV
2457/**
2458 * ice_vsi_release - Delete a VSI and free its resources
2459 * @vsi: the VSI being removed
2460 *
2461 * Returns 0 on success or < 0 on error
2462 */
2463int ice_vsi_release(struct ice_vsi *vsi)
2464{
2465 struct ice_pf *pf;
8ede0178 2466 struct ice_vf *vf;
df0f8479
AV
2467
2468 if (!vsi->back)
2469 return -ENODEV;
2470 pf = vsi->back;
8ede0178 2471 vf = &pf->vf[vsi->vf_id];
df0f8479
AV
2472 /* do not unregister and free netdevs while driver is in the reset
2473 * recovery pending state. Since reset/rebuild happens through PF
2474 * service task workqueue, its not a good idea to unregister netdev
2475 * that is associated to the PF that is running the work queue items
2476 * currently. This is done to avoid check_flush_dependency() warning
2477 * on this wq
2478 */
5df7e45d 2479 if (vsi->netdev && !ice_is_reset_in_progress(pf->state)) {
25525b69 2480 ice_napi_del(vsi);
df0f8479
AV
2481 unregister_netdev(vsi->netdev);
2482 free_netdev(vsi->netdev);
2483 vsi->netdev = NULL;
2484 }
2485
2486 if (test_bit(ICE_FLAG_RSS_ENA, pf->flags))
2487 ice_rss_clean(vsi);
2488
2489 /* Disable VSI and free resources */
2490 ice_vsi_dis_irq(vsi);
2491 ice_vsi_close(vsi);
2492
2493 /* reclaim interrupt vectors back to PF */
8ede0178
AV
2494 if (vsi->type != ICE_VSI_VF) {
2495 /* reclaim SW interrupts back to the common pool */
2496 ice_free_res(vsi->back->sw_irq_tracker, vsi->sw_base_vector,
2497 vsi->idx);
2498 pf->num_avail_sw_msix += vsi->num_q_vectors;
2499 /* reclaim HW interrupts back to the common pool */
2500 ice_free_res(vsi->back->hw_irq_tracker, vsi->hw_base_vector,
2501 vsi->idx);
2502 pf->num_avail_hw_msix += vsi->num_q_vectors;
2503 } else if (test_bit(ICE_VF_STATE_CFG_INTR, vf->vf_states)) {
2504 /* Reclaim VF resources back only while freeing all VFs or
2505 * vector reassignment is requested
2506 */
2507 ice_free_res(vsi->back->hw_irq_tracker, vf->first_vector_idx,
2508 vsi->idx);
2509 pf->num_avail_hw_msix += pf->num_vf_msix;
2510 }
df0f8479 2511
5726ca0e 2512 ice_remove_vsi_fltr(&pf->hw, vsi->idx);
10e03a22 2513 ice_rm_vsi_lan_cfg(vsi->port_info, vsi->idx);
df0f8479
AV
2514 ice_vsi_delete(vsi);
2515 ice_vsi_free_q_vectors(vsi);
2516 ice_vsi_clear_rings(vsi);
2517
2518 ice_vsi_put_qs(vsi);
2519 pf->q_left_tx += vsi->alloc_txq;
2520 pf->q_left_rx += vsi->alloc_rxq;
2521
2522 /* retain SW VSI data structure since it is needed to unregister and
2523 * free VSI netdev when PF is not in reset recovery pending state,\
2524 * for ex: during rmmod.
2525 */
5df7e45d 2526 if (!ice_is_reset_in_progress(pf->state))
df0f8479
AV
2527 ice_vsi_clear(vsi);
2528
2529 return 0;
2530}
2531
2532/**
2533 * ice_vsi_rebuild - Rebuild VSI after reset
2534 * @vsi: VSI to be rebuild
2535 *
2536 * Returns 0 on success and negative value on failure
2537 */
2538int ice_vsi_rebuild(struct ice_vsi *vsi)
2539{
2540 u16 max_txqs[ICE_MAX_TRAFFIC_CLASS] = { 0 };
c5a2a4a3 2541 struct ice_pf *pf;
df0f8479
AV
2542 int ret, i;
2543
2544 if (!vsi)
2545 return -EINVAL;
2546
c5a2a4a3 2547 pf = vsi->back;
47e3e53c 2548 ice_rm_vsi_lan_cfg(vsi->port_info, vsi->idx);
df0f8479 2549 ice_vsi_free_q_vectors(vsi);
eb0208ec
PB
2550 ice_free_res(vsi->back->sw_irq_tracker, vsi->sw_base_vector, vsi->idx);
2551 ice_free_res(vsi->back->hw_irq_tracker, vsi->hw_base_vector, vsi->idx);
2552 vsi->sw_base_vector = 0;
2553 vsi->hw_base_vector = 0;
df0f8479
AV
2554 ice_vsi_clear_rings(vsi);
2555 ice_vsi_free_arrays(vsi, false);
f203dca3 2556 ice_dev_onetime_setup(&vsi->back->hw);
df0f8479 2557 ice_vsi_set_num_qs(vsi);
c5a2a4a3 2558 ice_vsi_set_tc_cfg(vsi);
df0f8479
AV
2559
2560 /* Initialize VSI struct elements and create VSI in FW */
2561 ret = ice_vsi_init(vsi);
2562 if (ret < 0)
2563 goto err_vsi;
2564
2565 ret = ice_vsi_alloc_arrays(vsi, false);
2566 if (ret < 0)
2567 goto err_vsi;
2568
2569 switch (vsi->type) {
2570 case ICE_VSI_PF:
2571 ret = ice_vsi_alloc_q_vectors(vsi);
2572 if (ret)
2573 goto err_rings;
2574
2575 ret = ice_vsi_setup_vector_base(vsi);
2576 if (ret)
2577 goto err_vectors;
2578
2579 ret = ice_vsi_alloc_rings(vsi);
2580 if (ret)
2581 goto err_vectors;
2582
2583 ice_vsi_map_rings_to_vectors(vsi);
2584 break;
8ede0178
AV
2585 case ICE_VSI_VF:
2586 ret = ice_vsi_alloc_q_vectors(vsi);
2587 if (ret)
2588 goto err_rings;
2589
2590 ret = ice_vsi_setup_vector_base(vsi);
2591 if (ret)
2592 goto err_vectors;
2593
2594 ret = ice_vsi_alloc_rings(vsi);
2595 if (ret)
2596 goto err_vectors;
2597
2598 vsi->back->q_left_tx -= vsi->alloc_txq;
2599 vsi->back->q_left_rx -= vsi->alloc_rxq;
2600 break;
df0f8479
AV
2601 default:
2602 break;
2603 }
2604
df0f8479
AV
2605 /* configure VSI nodes based on number of queues and TC's */
2606 for (i = 0; i < vsi->tc_cfg.numtc; i++)
c5a2a4a3 2607 max_txqs[i] = pf->num_lan_tx;
df0f8479 2608
4fb33f31
AV
2609 ret = ice_cfg_vsi_lan(vsi->port_info, vsi->idx, vsi->tc_cfg.ena_tc,
2610 max_txqs);
df0f8479
AV
2611 if (ret) {
2612 dev_info(&vsi->back->pdev->dev,
2613 "Failed VSI lan queue config\n");
2614 goto err_vectors;
2615 }
2616 return 0;
2617
2618err_vectors:
2619 ice_vsi_free_q_vectors(vsi);
2620err_rings:
2621 if (vsi->netdev) {
2622 vsi->current_netdev_flags = 0;
2623 unregister_netdev(vsi->netdev);
2624 free_netdev(vsi->netdev);
2625 vsi->netdev = NULL;
2626 }
2627err_vsi:
2628 ice_vsi_clear(vsi);
2629 set_bit(__ICE_RESET_FAILED, vsi->back->state);
2630 return ret;
2631}
2632
5153a18e 2633/**
5df7e45d 2634 * ice_is_reset_in_progress - check for a reset in progress
5153a18e
AV
2635 * @state: pf state field
2636 */
5df7e45d 2637bool ice_is_reset_in_progress(unsigned long *state)
5153a18e 2638{
5df7e45d
DE
2639 return test_bit(__ICE_RESET_OICR_RECV, state) ||
2640 test_bit(__ICE_PFR_REQ, state) ||
2641 test_bit(__ICE_CORER_REQ, state) ||
2642 test_bit(__ICE_GLOBR_REQ, state);
5153a18e 2643}